projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
gas/
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
CommitLineData
252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
ed84b57b 3 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
ec2655a6 10 the Free Software Foundation; either version 3, or (at your option)
252b5132
RH		 11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132 22
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
252b5132 25#include "subsegs.h"
75e21f08 26#include "dw2gencfi.h"
252b5132
RH		 27#include "opcode/ppc.h"
28
29#ifdef OBJ_ELF
30#include "elf/ppc.h"
5d6f4f16 31#include "dwarf2dbg.h"
252b5132
RH		 32#endif
33
34#ifdef TE_PE
35#include "coff/pe.h"
36#endif
37
38/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
39
40/* Tell the main code what the endianness is. */
41extern int target_big_endian;
42
43/* Whether or not, we've set target_big_endian. */
44static int set_target_endian = 0;
45
46/* Whether to use user friendly register names. */
47#ifndef TARGET_REG_NAMES_P
48#ifdef TE_PE
b34976b6 49#define TARGET_REG_NAMES_P TRUE
252b5132 50#else
b34976b6 51#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 52#endif
53#endif
54
0baf16f2
AM		 55/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
56 HIGHESTA. */
57
58/* #lo(value) denotes the least significant 16 bits of the indicated. */
59#define PPC_LO(v) ((v) & 0xffff)
60
61/* #hi(value) denotes bits 16 through 31 of the indicated value. */
62#define PPC_HI(v) (((v) >> 16) & 0xffff)
63
64/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
65 the indicated value, compensating for #lo() being treated as a
66 signed number. */
15c1449b 67#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 68
69/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 70#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 71
72/* #highera(value) denotes bits 32 through 47 of the indicated value,
73 compensating for #lo() being treated as a signed number. */
15c1449b 74#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 75
76/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 77#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 78
79/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 80 compensating for #lo being treated as a signed number. */
81#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 82
83#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
84
b34976b6 85static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 86
98027b10
AM		 87static void ppc_macro (char *, const struct powerpc_macro *);
88static void ppc_byte (int);
0baf16f2
AM		 89
90#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
98027b10
AM		 91static void ppc_tc (int);
92static void ppc_machine (int);
0baf16f2 93#endif
252b5132
RH		 94
95#ifdef OBJ_XCOFF
98027b10
AM		 96static void ppc_comm (int);
97static void ppc_bb (int);
98static void ppc_bc (int);
99static void ppc_bf (int);
100static void ppc_biei (int);
101static void ppc_bs (int);
102static void ppc_eb (int);
103static void ppc_ec (int);
104static void ppc_ef (int);
105static void ppc_es (int);
106static void ppc_csect (int);
107static void ppc_change_csect (symbolS *, offsetT);
108static void ppc_function (int);
109static void ppc_extern (int);
110static void ppc_lglobl (int);
111static void ppc_section (int);
112static void ppc_named_section (int);
113static void ppc_stabx (int);
114static void ppc_rename (int);
115static void ppc_toc (int);
116static void ppc_xcoff_cons (int);
117static void ppc_vbyte (int);
252b5132
RH		 118#endif
119
120#ifdef OBJ_ELF
98027b10
AM		 121static void ppc_elf_cons (int);
122static void ppc_elf_rdata (int);
123static void ppc_elf_lcomm (int);
252b5132
RH		 124#endif
125
126#ifdef TE_PE
98027b10
AM		 127static void ppc_previous (int);
128static void ppc_pdata (int);
129static void ppc_ydata (int);
130static void ppc_reldata (int);
131static void ppc_rdata (int);
132static void ppc_ualong (int);
133static void ppc_znop (int);
134static void ppc_pe_comm (int);
135static void ppc_pe_section (int);
136static void ppc_pe_function (int);
137static void ppc_pe_tocd (int);
252b5132
RH		 138#endif
139\f
140/* Generic assembler global variables which must be defined by all
141 targets. */
142
143#ifdef OBJ_ELF
144/* This string holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful. The macro
146 tc_comment_chars points to this. We use this, rather than the
147 usual comment_chars, so that we can switch for Solaris conventions. */
148static const char ppc_solaris_comment_chars[] = "#!";
149static const char ppc_eabi_comment_chars[] = "#";
150
151#ifdef TARGET_SOLARIS_COMMENT
152const char *ppc_comment_chars = ppc_solaris_comment_chars;
153#else
154const char *ppc_comment_chars = ppc_eabi_comment_chars;
155#endif
156#else
157const char comment_chars[] = "#";
158#endif
159
160/* Characters which start a comment at the beginning of a line. */
161const char line_comment_chars[] = "#";
162
163/* Characters which may be used to separate multiple commands on a
164 single line. */
165const char line_separator_chars[] = ";";
166
167/* Characters which are used to indicate an exponent in a floating
168 point number. */
169const char EXP_CHARS[] = "eE";
170
171/* Characters which mean that a number is a floating point constant,
172 as in 0d1.0. */
173const char FLT_CHARS[] = "dD";
5ce8663f 174
5e02f92e 175/* Anything that can start an operand needs to be mentioned here,
ac805826 176 to stop the input scrubber eating whitespace. */
5e02f92e 177const char ppc_symbol_chars[] = "%[";
75e21f08
JJ		 178
179/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
180int ppc_cie_data_alignment;
783de163
AM		 181
182/* The type of processor we are assembling for. This is one or more
183 of the PPC_OPCODE flags defined in opcode/ppc.h. */
fa452fa6 184ppc_cpu_t ppc_cpu = 0;
252b5132
RH		 185\f
186/* The target specific pseudo-ops which we support. */
187
188const pseudo_typeS md_pseudo_table[] =
189{
190 /* Pseudo-ops which must be overridden. */
191 { "byte", ppc_byte, 0 },
192
193#ifdef OBJ_XCOFF
194 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
195 legitimately belong in the obj-*.c file. However, XCOFF is based
196 on COFF, and is only implemented for the RS/6000. We just use
197 obj-coff.c, and add what we need here. */
198 { "comm", ppc_comm, 0 },
199 { "lcomm", ppc_comm, 1 },
200 { "bb", ppc_bb, 0 },
201 { "bc", ppc_bc, 0 },
202 { "bf", ppc_bf, 0 },
203 { "bi", ppc_biei, 0 },
204 { "bs", ppc_bs, 0 },
205 { "csect", ppc_csect, 0 },
206 { "data", ppc_section, 'd' },
207 { "eb", ppc_eb, 0 },
208 { "ec", ppc_ec, 0 },
209 { "ef", ppc_ef, 0 },
210 { "ei", ppc_biei, 1 },
211 { "es", ppc_es, 0 },
212 { "extern", ppc_extern, 0 },
213 { "function", ppc_function, 0 },
214 { "lglobl", ppc_lglobl, 0 },
215 { "rename", ppc_rename, 0 },
216 { "section", ppc_named_section, 0 },
217 { "stabx", ppc_stabx, 0 },
218 { "text", ppc_section, 't' },
219 { "toc", ppc_toc, 0 },
220 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 221 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 222 { "word", ppc_xcoff_cons, 1 },
223 { "short", ppc_xcoff_cons, 1 },
224 { "vbyte", ppc_vbyte, 0 },
225#endif
226
227#ifdef OBJ_ELF
0baf16f2
AM		 228 { "llong", ppc_elf_cons, 8 },
229 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 230 { "long", ppc_elf_cons, 4 },
231 { "word", ppc_elf_cons, 2 },
232 { "short", ppc_elf_cons, 2 },
233 { "rdata", ppc_elf_rdata, 0 },
234 { "rodata", ppc_elf_rdata, 0 },
235 { "lcomm", ppc_elf_lcomm, 0 },
236#endif
237
238#ifdef TE_PE
99a814a1 239 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 240 { "previous", ppc_previous, 0 },
241 { "pdata", ppc_pdata, 0 },
242 { "ydata", ppc_ydata, 0 },
243 { "reldata", ppc_reldata, 0 },
244 { "rdata", ppc_rdata, 0 },
245 { "ualong", ppc_ualong, 0 },
246 { "znop", ppc_znop, 0 },
247 { "comm", ppc_pe_comm, 0 },
248 { "lcomm", ppc_pe_comm, 1 },
249 { "section", ppc_pe_section, 0 },
250 { "function", ppc_pe_function,0 },
251 { "tocd", ppc_pe_tocd, 0 },
252#endif
253
0baf16f2 254#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 255 { "tc", ppc_tc, 0 },
0baf16f2
AM		 256 { "machine", ppc_machine, 0 },
257#endif
252b5132
RH		 258
259 { NULL, NULL, 0 }
260};
261
262\f
99a814a1
AM		 263/* Predefined register names if -mregnames (or default for Windows NT).
264 In general, there are lots of them, in an attempt to be compatible
265 with a number of other Windows NT assemblers. */
252b5132
RH		 266
267/* Structure to hold information about predefined registers. */
268struct pd_reg
269 {
270 char *name;
271 int value;
272 };
273
274/* List of registers that are pre-defined:
275
276 Each general register has predefined names of the form:
277 1. r<reg_num> which has the value <reg_num>.
278 2. r.<reg_num> which has the value <reg_num>.
279
252b5132
RH		 280 Each floating point register has predefined names of the form:
281 1. f<reg_num> which has the value <reg_num>.
282 2. f.<reg_num> which has the value <reg_num>.
283
7a899fff
C		 284 Each vector unit register has predefined names of the form:
285 1. v<reg_num> which has the value <reg_num>.
286 2. v.<reg_num> which has the value <reg_num>.
287
252b5132
RH		 288 Each condition register has predefined names of the form:
289 1. cr<reg_num> which has the value <reg_num>.
290 2. cr.<reg_num> which has the value <reg_num>.
291
292 There are individual registers as well:
293 sp or r.sp has the value 1
294 rtoc or r.toc has the value 2
295 fpscr has the value 0
296 xer has the value 1
297 lr has the value 8
298 ctr has the value 9
299 pmr has the value 0
300 dar has the value 19
301 dsisr has the value 18
302 dec has the value 22
303 sdr1 has the value 25
304 srr0 has the value 26
305 srr1 has the value 27
306
81d4177b 307 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 308
309static const struct pd_reg pre_defined_registers[] =
310{
311 { "cr.0", 0 }, /* Condition Registers */
312 { "cr.1", 1 },
313 { "cr.2", 2 },
314 { "cr.3", 3 },
315 { "cr.4", 4 },
316 { "cr.5", 5 },
317 { "cr.6", 6 },
318 { "cr.7", 7 },
319
320 { "cr0", 0 },
321 { "cr1", 1 },
322 { "cr2", 2 },
323 { "cr3", 3 },
324 { "cr4", 4 },
325 { "cr5", 5 },
326 { "cr6", 6 },
327 { "cr7", 7 },
328
329 { "ctr", 9 },
330
331 { "dar", 19 }, /* Data Access Register */
332 { "dec", 22 }, /* Decrementer */
333 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
334
335 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 336 { "f.1", 1 },
337 { "f.10", 10 },
338 { "f.11", 11 },
339 { "f.12", 12 },
340 { "f.13", 13 },
341 { "f.14", 14 },
342 { "f.15", 15 },
343 { "f.16", 16 },
344 { "f.17", 17 },
345 { "f.18", 18 },
346 { "f.19", 19 },
347 { "f.2", 2 },
348 { "f.20", 20 },
349 { "f.21", 21 },
350 { "f.22", 22 },
351 { "f.23", 23 },
352 { "f.24", 24 },
353 { "f.25", 25 },
354 { "f.26", 26 },
355 { "f.27", 27 },
356 { "f.28", 28 },
357 { "f.29", 29 },
358 { "f.3", 3 },
252b5132
RH		 359 { "f.30", 30 },
360 { "f.31", 31 },
066be9f7
PB		 361
362 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
363 { "f.33", 33 },
364 { "f.34", 34 },
365 { "f.35", 35 },
366 { "f.36", 36 },
367 { "f.37", 37 },
368 { "f.38", 38 },
369 { "f.39", 39 },
81d4177b 370 { "f.4", 4 },
066be9f7
PB		 371 { "f.40", 40 },
372 { "f.41", 41 },
373 { "f.42", 42 },
374 { "f.43", 43 },
375 { "f.44", 44 },
376 { "f.45", 45 },
377 { "f.46", 46 },
378 { "f.47", 47 },
379 { "f.48", 48 },
380 { "f.49", 49 },
81d4177b 381 { "f.5", 5 },
066be9f7
PB		 382 { "f.50", 50 },
383 { "f.51", 51 },
384 { "f.52", 52 },
385 { "f.53", 53 },
386 { "f.54", 54 },
387 { "f.55", 55 },
388 { "f.56", 56 },
389 { "f.57", 57 },
390 { "f.58", 58 },
391 { "f.59", 59 },
81d4177b 392 { "f.6", 6 },
066be9f7
PB		 393 { "f.60", 60 },
394 { "f.61", 61 },
395 { "f.62", 62 },
396 { "f.63", 63 },
81d4177b
KH		 397 { "f.7", 7 },
398 { "f.8", 8 },
399 { "f.9", 9 },
400
401 { "f0", 0 },
402 { "f1", 1 },
403 { "f10", 10 },
404 { "f11", 11 },
405 { "f12", 12 },
406 { "f13", 13 },
407 { "f14", 14 },
408 { "f15", 15 },
409 { "f16", 16 },
410 { "f17", 17 },
411 { "f18", 18 },
412 { "f19", 19 },
413 { "f2", 2 },
414 { "f20", 20 },
415 { "f21", 21 },
416 { "f22", 22 },
417 { "f23", 23 },
418 { "f24", 24 },
419 { "f25", 25 },
420 { "f26", 26 },
421 { "f27", 27 },
422 { "f28", 28 },
423 { "f29", 29 },
424 { "f3", 3 },
252b5132
RH		 425 { "f30", 30 },
426 { "f31", 31 },
066be9f7
PB		 427
428 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
429 { "f33", 33 },
430 { "f34", 34 },
431 { "f35", 35 },
432 { "f36", 36 },
433 { "f37", 37 },
434 { "f38", 38 },
435 { "f39", 39 },
81d4177b 436 { "f4", 4 },
066be9f7
PB		 437 { "f40", 40 },
438 { "f41", 41 },
439 { "f42", 42 },
440 { "f43", 43 },
441 { "f44", 44 },
442 { "f45", 45 },
443 { "f46", 46 },
444 { "f47", 47 },
445 { "f48", 48 },
446 { "f49", 49 },
81d4177b 447 { "f5", 5 },
066be9f7
PB		 448 { "f50", 50 },
449 { "f51", 51 },
450 { "f52", 52 },
451 { "f53", 53 },
452 { "f54", 54 },
453 { "f55", 55 },
454 { "f56", 56 },
455 { "f57", 57 },
456 { "f58", 58 },
457 { "f59", 59 },
81d4177b 458 { "f6", 6 },
066be9f7
PB		 459 { "f60", 60 },
460 { "f61", 61 },
461 { "f62", 62 },
462 { "f63", 63 },
81d4177b
KH		 463 { "f7", 7 },
464 { "f8", 8 },
465 { "f9", 9 },
252b5132
RH		 466
467 { "fpscr", 0 },
468
c3d65c1c
BE		 469 /* Quantization registers used with pair single instructions. */
470 { "gqr.0", 0 },
471 { "gqr.1", 1 },
472 { "gqr.2", 2 },
473 { "gqr.3", 3 },
474 { "gqr.4", 4 },
475 { "gqr.5", 5 },
476 { "gqr.6", 6 },
477 { "gqr.7", 7 },
478 { "gqr0", 0 },
479 { "gqr1", 1 },
480 { "gqr2", 2 },
481 { "gqr3", 3 },
482 { "gqr4", 4 },
483 { "gqr5", 5 },
484 { "gqr6", 6 },
485 { "gqr7", 7 },
486
252b5132
RH		 487 { "lr", 8 }, /* Link Register */
488
489 { "pmr", 0 },
490
491 { "r.0", 0 }, /* General Purpose Registers */
492 { "r.1", 1 },
493 { "r.10", 10 },
494 { "r.11", 11 },
495 { "r.12", 12 },
496 { "r.13", 13 },
497 { "r.14", 14 },
498 { "r.15", 15 },
499 { "r.16", 16 },
500 { "r.17", 17 },
501 { "r.18", 18 },
502 { "r.19", 19 },
503 { "r.2", 2 },
504 { "r.20", 20 },
505 { "r.21", 21 },
506 { "r.22", 22 },
507 { "r.23", 23 },
508 { "r.24", 24 },
509 { "r.25", 25 },
510 { "r.26", 26 },
511 { "r.27", 27 },
512 { "r.28", 28 },
513 { "r.29", 29 },
514 { "r.3", 3 },
515 { "r.30", 30 },
516 { "r.31", 31 },
517 { "r.4", 4 },
518 { "r.5", 5 },
519 { "r.6", 6 },
520 { "r.7", 7 },
521 { "r.8", 8 },
522 { "r.9", 9 },
523
524 { "r.sp", 1 }, /* Stack Pointer */
525
526 { "r.toc", 2 }, /* Pointer to the table of contents */
527
528 { "r0", 0 }, /* More general purpose registers */
529 { "r1", 1 },
530 { "r10", 10 },
531 { "r11", 11 },
532 { "r12", 12 },
533 { "r13", 13 },
534 { "r14", 14 },
535 { "r15", 15 },
536 { "r16", 16 },
537 { "r17", 17 },
538 { "r18", 18 },
539 { "r19", 19 },
540 { "r2", 2 },
541 { "r20", 20 },
542 { "r21", 21 },
543 { "r22", 22 },
544 { "r23", 23 },
545 { "r24", 24 },
546 { "r25", 25 },
547 { "r26", 26 },
548 { "r27", 27 },
549 { "r28", 28 },
550 { "r29", 29 },
551 { "r3", 3 },
552 { "r30", 30 },
553 { "r31", 31 },
554 { "r4", 4 },
555 { "r5", 5 },
556 { "r6", 6 },
557 { "r7", 7 },
558 { "r8", 8 },
559 { "r9", 9 },
560
561 { "rtoc", 2 }, /* Table of contents */
562
563 { "sdr1", 25 }, /* Storage Description Register 1 */
564
565 { "sp", 1 },
566
567 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
568 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 569
066be9f7 570 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
81d4177b
KH		 571 { "v.1", 1 },
572 { "v.10", 10 },
573 { "v.11", 11 },
574 { "v.12", 12 },
575 { "v.13", 13 },
576 { "v.14", 14 },
577 { "v.15", 15 },
578 { "v.16", 16 },
579 { "v.17", 17 },
580 { "v.18", 18 },
581 { "v.19", 19 },
582 { "v.2", 2 },
583 { "v.20", 20 },
584 { "v.21", 21 },
585 { "v.22", 22 },
586 { "v.23", 23 },
587 { "v.24", 24 },
588 { "v.25", 25 },
589 { "v.26", 26 },
590 { "v.27", 27 },
591 { "v.28", 28 },
592 { "v.29", 29 },
593 { "v.3", 3 },
7a899fff
C		 594 { "v.30", 30 },
595 { "v.31", 31 },
81d4177b
KH		 596 { "v.4", 4 },
597 { "v.5", 5 },
598 { "v.6", 6 },
599 { "v.7", 7 },
600 { "v.8", 8 },
601 { "v.9", 9 },
7a899fff
C		 602
603 { "v0", 0 },
81d4177b
KH		 604 { "v1", 1 },
605 { "v10", 10 },
606 { "v11", 11 },
607 { "v12", 12 },
608 { "v13", 13 },
609 { "v14", 14 },
610 { "v15", 15 },
611 { "v16", 16 },
612 { "v17", 17 },
613 { "v18", 18 },
614 { "v19", 19 },
615 { "v2", 2 },
616 { "v20", 20 },
617 { "v21", 21 },
618 { "v22", 22 },
619 { "v23", 23 },
620 { "v24", 24 },
621 { "v25", 25 },
622 { "v26", 26 },
623 { "v27", 27 },
624 { "v28", 28 },
625 { "v29", 29 },
626 { "v3", 3 },
7a899fff
C		 627 { "v30", 30 },
628 { "v31", 31 },
81d4177b
KH		 629 { "v4", 4 },
630 { "v5", 5 },
631 { "v6", 6 },
632 { "v7", 7 },
633 { "v8", 8 },
7a899fff 634 { "v9", 9 },
252b5132 635
066be9f7
PB		 636 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
637 { "vs.1", 1 },
638 { "vs.10", 10 },
639 { "vs.11", 11 },
640 { "vs.12", 12 },
641 { "vs.13", 13 },
642 { "vs.14", 14 },
643 { "vs.15", 15 },
644 { "vs.16", 16 },
645 { "vs.17", 17 },
646 { "vs.18", 18 },
647 { "vs.19", 19 },
648 { "vs.2", 2 },
649 { "vs.20", 20 },
650 { "vs.21", 21 },
651 { "vs.22", 22 },
652 { "vs.23", 23 },
653 { "vs.24", 24 },
654 { "vs.25", 25 },
655 { "vs.26", 26 },
656 { "vs.27", 27 },
657 { "vs.28", 28 },
658 { "vs.29", 29 },
659 { "vs.3", 3 },
660 { "vs.30", 30 },
661 { "vs.31", 31 },
662 { "vs.32", 32 },
663 { "vs.33", 33 },
664 { "vs.34", 34 },
665 { "vs.35", 35 },
666 { "vs.36", 36 },
667 { "vs.37", 37 },
668 { "vs.38", 38 },
669 { "vs.39", 39 },
670 { "vs.4", 4 },
671 { "vs.40", 40 },
672 { "vs.41", 41 },
673 { "vs.42", 42 },
674 { "vs.43", 43 },
675 { "vs.44", 44 },
676 { "vs.45", 45 },
677 { "vs.46", 46 },
678 { "vs.47", 47 },
679 { "vs.48", 48 },
680 { "vs.49", 49 },
681 { "vs.5", 5 },
682 { "vs.50", 50 },
683 { "vs.51", 51 },
684 { "vs.52", 52 },
685 { "vs.53", 53 },
686 { "vs.54", 54 },
687 { "vs.55", 55 },
688 { "vs.56", 56 },
689 { "vs.57", 57 },
690 { "vs.58", 58 },
691 { "vs.59", 59 },
692 { "vs.6", 6 },
693 { "vs.60", 60 },
694 { "vs.61", 61 },
695 { "vs.62", 62 },
696 { "vs.63", 63 },
697 { "vs.7", 7 },
698 { "vs.8", 8 },
699 { "vs.9", 9 },
700
701 { "vs0", 0 },
702 { "vs1", 1 },
703 { "vs10", 10 },
704 { "vs11", 11 },
705 { "vs12", 12 },
706 { "vs13", 13 },
707 { "vs14", 14 },
708 { "vs15", 15 },
709 { "vs16", 16 },
710 { "vs17", 17 },
711 { "vs18", 18 },
712 { "vs19", 19 },
713 { "vs2", 2 },
714 { "vs20", 20 },
715 { "vs21", 21 },
716 { "vs22", 22 },
717 { "vs23", 23 },
718 { "vs24", 24 },
719 { "vs25", 25 },
720 { "vs26", 26 },
721 { "vs27", 27 },
722 { "vs28", 28 },
723 { "vs29", 29 },
724 { "vs3", 3 },
725 { "vs30", 30 },
726 { "vs31", 31 },
727 { "vs32", 32 },
728 { "vs33", 33 },
729 { "vs34", 34 },
730 { "vs35", 35 },
731 { "vs36", 36 },
732 { "vs37", 37 },
733 { "vs38", 38 },
734 { "vs39", 39 },
735 { "vs4", 4 },
736 { "vs40", 40 },
737 { "vs41", 41 },
738 { "vs42", 42 },
739 { "vs43", 43 },
740 { "vs44", 44 },
741 { "vs45", 45 },
742 { "vs46", 46 },
743 { "vs47", 47 },
744 { "vs48", 48 },
745 { "vs49", 49 },
746 { "vs5", 5 },
747 { "vs50", 50 },
748 { "vs51", 51 },
749 { "vs52", 52 },
750 { "vs53", 53 },
751 { "vs54", 54 },
752 { "vs55", 55 },
753 { "vs56", 56 },
754 { "vs57", 57 },
755 { "vs58", 58 },
756 { "vs59", 59 },
757 { "vs6", 6 },
758 { "vs60", 60 },
759 { "vs61", 61 },
760 { "vs62", 62 },
761 { "vs63", 63 },
762 { "vs7", 7 },
763 { "vs8", 8 },
764 { "vs9", 9 },
765
252b5132
RH		 766 { "xer", 1 },
767
768};
769
bc805888 770#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 771
772/* Given NAME, find the register number associated with that name, return
773 the integer value associated with the given name or -1 on failure. */
774
252b5132 775static int
98027b10 776reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
252b5132
RH		 777{
778 int middle, low, high;
779 int cmp;
780
781 low = 0;
782 high = regcount - 1;
783
784 do
785 {
786 middle = (low + high) / 2;
787 cmp = strcasecmp (name, regs[middle].name);
788 if (cmp < 0)
789 high = middle - 1;
790 else if (cmp > 0)
791 low = middle + 1;
792 else
793 return regs[middle].value;
794 }
795 while (low <= high);
796
797 return -1;
798}
799
800/*
99a814a1 801 * Summary of register_name.
252b5132
RH		 802 *
803 * in: Input_line_pointer points to 1st char of operand.
804 *
805 * out: A expressionS.
806 * The operand may have been a register: in this case, X_op == O_register,
807 * X_add_number is set to the register number, and truth is returned.
808 * Input_line_pointer->(next non-blank) char after operand, or is in its
809 * original state.
810 */
811
b34976b6 812static bfd_boolean
98027b10 813register_name (expressionS *expressionP)
252b5132
RH		 814{
815 int reg_number;
816 char *name;
817 char *start;
818 char c;
819
99a814a1 820 /* Find the spelling of the operand. */
252b5132 821 start = name = input_line_pointer;
3882b010 822 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 823 name = ++input_line_pointer;
824
3882b010 825 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 826 return FALSE;
252b5132
RH		 827
828 c = get_symbol_end ();
829 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
830
468cced8
AM		 831 /* Put back the delimiting char. */
832 *input_line_pointer = c;
833
99a814a1 834 /* Look to see if it's in the register table. */
81d4177b 835 if (reg_number >= 0)
252b5132
RH		 836 {
837 expressionP->X_op = O_register;
838 expressionP->X_add_number = reg_number;
81d4177b 839
99a814a1 840 /* Make the rest nice. */
252b5132
RH		 841 expressionP->X_add_symbol = NULL;
842 expressionP->X_op_symbol = NULL;
b34976b6 843 return TRUE;
252b5132 844 }
468cced8
AM		 845
846 /* Reset the line as if we had not done anything. */
847 input_line_pointer = start;
b34976b6 848 return FALSE;
252b5132
RH		 849}
850\f
851/* This function is called for each symbol seen in an expression. It
852 handles the special parsing which PowerPC assemblers are supposed
853 to use for condition codes. */
854
855/* Whether to do the special parsing. */
b34976b6 856static bfd_boolean cr_operand;
252b5132
RH		 857
858/* Names to recognize in a condition code. This table is sorted. */
859static const struct pd_reg cr_names[] =
860{
861 { "cr0", 0 },
862 { "cr1", 1 },
863 { "cr2", 2 },
864 { "cr3", 3 },
865 { "cr4", 4 },
866 { "cr5", 5 },
867 { "cr6", 6 },
868 { "cr7", 7 },
869 { "eq", 2 },
870 { "gt", 1 },
871 { "lt", 0 },
872 { "so", 3 },
873 { "un", 3 }
874};
875
876/* Parsing function. This returns non-zero if it recognized an
877 expression. */
878
879int
98027b10 880ppc_parse_name (const char *name, expressionS *expr)
252b5132
RH		 881{
882 int val;
883
884 if (! cr_operand)
885 return 0;
886
13abbae3
AM		 887 if (*name == '%')
888 ++name;
252b5132
RH		 889 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
890 name);
891 if (val < 0)
892 return 0;
893
894 expr->X_op = O_constant;
895 expr->X_add_number = val;
896
897 return 1;
898}
899\f
900/* Local variables. */
901
2b3c4602
AM		 902/* Whether to target xcoff64/elf64. */
903static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 904
252b5132
RH		 905/* Opcode hash table. */
906static struct hash_control *ppc_hash;
907
908/* Macro hash table. */
909static struct hash_control *ppc_macro_hash;
910
911#ifdef OBJ_ELF
99a814a1 912/* What type of shared library support to use. */
5d6f4f16 913static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 914
99a814a1 915/* Flags to set in the elf header. */
252b5132
RH		 916static flagword ppc_flags = 0;
917
918/* Whether this is Solaris or not. */
919#ifdef TARGET_SOLARIS_COMMENT
b34976b6 920#define SOLARIS_P TRUE
252b5132 921#else
b34976b6 922#define SOLARIS_P FALSE
252b5132
RH		 923#endif
924
b34976b6 925static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 926#endif
927
928#ifdef OBJ_XCOFF
929
930/* The RS/6000 assembler uses the .csect pseudo-op to generate code
931 using a bunch of different sections. These assembler sections,
932 however, are all encompassed within the .text or .data sections of
933 the final output file. We handle this by using different
934 subsegments within these main segments. */
935
936/* Next subsegment to allocate within the .text segment. */
937static subsegT ppc_text_subsegment = 2;
938
939/* Linked list of csects in the text section. */
940static symbolS *ppc_text_csects;
941
942/* Next subsegment to allocate within the .data segment. */
943static subsegT ppc_data_subsegment = 2;
944
945/* Linked list of csects in the data section. */
946static symbolS *ppc_data_csects;
947
948/* The current csect. */
949static symbolS *ppc_current_csect;
950
951/* The RS/6000 assembler uses a TOC which holds addresses of functions
952 and variables. Symbols are put in the TOC with the .tc pseudo-op.
953 A special relocation is used when accessing TOC entries. We handle
954 the TOC as a subsegment within the .data segment. We set it up if
955 we see a .toc pseudo-op, and save the csect symbol here. */
956static symbolS *ppc_toc_csect;
957
958/* The first frag in the TOC subsegment. */
959static fragS *ppc_toc_frag;
960
961/* The first frag in the first subsegment after the TOC in the .data
962 segment. NULL if there are no subsegments after the TOC. */
963static fragS *ppc_after_toc_frag;
964
965/* The current static block. */
966static symbolS *ppc_current_block;
967
968/* The COFF debugging section; set by md_begin. This is not the
969 .debug section, but is instead the secret BFD section which will
970 cause BFD to set the section number of a symbol to N_DEBUG. */
971static asection *ppc_coff_debug_section;
972
973#endif /* OBJ_XCOFF */
974
975#ifdef TE_PE
976
977/* Various sections that we need for PE coff support. */
978static segT ydata_section;
979static segT pdata_section;
980static segT reldata_section;
981static segT rdata_section;
982static segT tocdata_section;
983
81d4177b 984/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 985static segT ppc_previous_section;
986static segT ppc_current_section;
987
988#endif /* TE_PE */
989
990#ifdef OBJ_ELF
991symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 992#define PPC_APUINFO_ISEL 0x40
993#define PPC_APUINFO_PMR 0x41
994#define PPC_APUINFO_RFMCI 0x42
995#define PPC_APUINFO_CACHELCK 0x43
996#define PPC_APUINFO_SPE 0x100
997#define PPC_APUINFO_EFS 0x101
998#define PPC_APUINFO_BRLOCK 0x102
999
b34976b6
AM		 1000/*
1001 * We keep a list of APUinfo
6a0c61b7
EZ		 1002 */
1003unsigned long *ppc_apuinfo_list;
1004unsigned int ppc_apuinfo_num;
1005unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 1006#endif /* OBJ_ELF */
1007\f
1008#ifdef OBJ_ELF
15c1449b 1009const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 1010#else
15c1449b 1011const char *const md_shortopts = "um:";
252b5132 1012#endif
15c1449b 1013const struct option md_longopts[] = {
252b5132
RH		 1014 {NULL, no_argument, NULL, 0}
1015};
15c1449b 1016const size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH		 1017
1018int
98027b10 1019md_parse_option (int c, char *arg)
252b5132 1020{
69fe9ce5
AM		 1021 ppc_cpu_t new_cpu;
1022
252b5132
RH		 1023 switch (c)
1024 {
1025 case 'u':
1026 /* -u means that any undefined symbols should be treated as
1027 external, which is the default for gas anyhow. */
1028 break;
1029
1030#ifdef OBJ_ELF
1031 case 'l':
1032 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 1033 sake, recognize -be also. */
252b5132
RH		 1034 if (strcmp (arg, "e") == 0)
1035 {
1036 target_big_endian = 0;
1037 set_target_endian = 1;
1038 }
1039 else
1040 return 0;
1041
1042 break;
1043
1044 case 'b':
1045 if (strcmp (arg, "e") == 0)
1046 {
1047 target_big_endian = 1;
1048 set_target_endian = 1;
1049 }
1050 else
1051 return 0;
1052
1053 break;
1054
1055 case 'K':
99a814a1 1056 /* Recognize -K PIC. */
252b5132
RH		 1057 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1058 {
1059 shlib = SHLIB_PIC;
1060 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1061 }
1062 else
1063 return 0;
1064
1065 break;
1066#endif
1067
7f6d05e8
CP		 1068 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1069 case 'a':
1070 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 1071 {
1072#ifdef BFD64
1073 ppc_obj64 = 1;
1074#else
1075 as_fatal (_("%s unsupported"), "-a64");
1076#endif
1077 }
7f6d05e8 1078 else if (strcmp (arg, "32") == 0)
2b3c4602 1079 ppc_obj64 = 0;
7f6d05e8
CP		 1080 else
1081 return 0;
1082 break;
81d4177b 1083
252b5132 1084 case 'm':
69fe9ce5
AM		 1085 if ((new_cpu = ppc_parse_cpu (ppc_cpu, arg)) != 0)
1086 ppc_cpu = new_cpu;
252b5132
RH		 1087
1088 else if (strcmp (arg, "regnames") == 0)
b34976b6 1089 reg_names_p = TRUE;
252b5132
RH		 1090
1091 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1092 reg_names_p = FALSE;
252b5132
RH		 1093
1094#ifdef OBJ_ELF
99a814a1
AM		 1095 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1096 that require relocation. */
252b5132
RH		 1097 else if (strcmp (arg, "relocatable") == 0)
1098 {
5d6f4f16 1099 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1100 ppc_flags |= EF_PPC_RELOCATABLE;
1101 }
1102
1103 else if (strcmp (arg, "relocatable-lib") == 0)
1104 {
5d6f4f16 1105 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1106 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1107 }
1108
99a814a1 1109 /* -memb, set embedded bit. */
252b5132
RH		 1110 else if (strcmp (arg, "emb") == 0)
1111 ppc_flags |= EF_PPC_EMB;
1112
99a814a1
AM		 1113 /* -mlittle/-mbig set the endianess. */
1114 else if (strcmp (arg, "little") == 0
1115 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1116 {
1117 target_big_endian = 0;
1118 set_target_endian = 1;
1119 }
1120
1121 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1122 {
1123 target_big_endian = 1;
1124 set_target_endian = 1;
1125 }
1126
1127 else if (strcmp (arg, "solaris") == 0)
1128 {
b34976b6 1129 msolaris = TRUE;
252b5132
RH		 1130 ppc_comment_chars = ppc_solaris_comment_chars;
1131 }
1132
1133 else if (strcmp (arg, "no-solaris") == 0)
1134 {
b34976b6 1135 msolaris = FALSE;
252b5132
RH		 1136 ppc_comment_chars = ppc_eabi_comment_chars;
1137 }
1138#endif
1139 else
1140 {
1141 as_bad (_("invalid switch -m%s"), arg);
1142 return 0;
1143 }
1144 break;
1145
1146#ifdef OBJ_ELF
1147 /* -V: SVR4 argument to print version ID. */
1148 case 'V':
1149 print_version_id ();
1150 break;
1151
1152 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1153 should be emitted or not. FIXME: Not implemented. */
1154 case 'Q':
1155 break;
1156
1157 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1158 rather than .stabs.excl, which is ignored by the linker.
1159 FIXME: Not implemented. */
1160 case 's':
1161 if (arg)
1162 return 0;
1163
1164 break;
1165#endif
1166
1167 default:
1168 return 0;
1169 }
1170
1171 return 1;
1172}
1173
1174void
98027b10 1175md_show_usage (FILE *stream)
252b5132 1176{
bc805888 1177 fprintf (stream, _("\
252b5132 1178PowerPC options:\n\
df12615d
AM		 1179-a32 generate ELF32/XCOFF32\n\
1180-a64 generate ELF64/XCOFF64\n\
252b5132 1181-u ignored\n\
23e1d84c
AM		 1182-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1183-mpwr generate code for POWER (RIOS1)\n\
1184-m601 generate code for PowerPC 601\n\
418c1742 1185-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1186 generate code for PowerPC 603/604\n\
081ba1b3
AM		 1187-m403 generate code for PowerPC 403\n\
1188-m405 generate code for PowerPC 405\n\
3d8aea2f 1189-m440 generate code for PowerPC 440\n\
c8187e15 1190-m464 generate code for PowerPC 464\n\
9fe54b1c 1191-m476 generate code for PowerPC 476\n\
f5c120c5 1192-m7400, -m7410, -m7450, -m7455\n\
c3d65c1c
BE		 1193 generate code for PowerPC 7400/7410/7450/7455\n\
1194-m750cl generate code for PowerPC 750cl\n"));
df12615d 1195 fprintf (stream, _("\
23e1d84c 1196-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1197-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
2f3bb96a 1198-mbooke generate code for 32-bit PowerPC BookE\n\
634b50f2 1199-ma2 generate code for A2 architecture\n\
23e1d84c 1200-mpower4 generate code for Power4 architecture\n\
b0648eec 1201-mpower5 generate code for Power5 architecture\n\
9622b051 1202-mpower6 generate code for Power6 architecture\n\
9b4e5766 1203-mpower7 generate code for Power7 architecture\n\
ede602d7 1204-mcell generate code for Cell Broadband Engine architecture\n\
252b5132 1205-mcom generate code Power/PowerPC common instructions\n\
df12615d 1206-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1207 fprintf (stream, _("\
df12615d 1208-maltivec generate code for AltiVec\n\
9b4e5766 1209-mvsx generate code for Vector-Scalar (VSX) instructions\n\
36ae0db3 1210-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1211-me500, -me500x2 generate code for Motorola e500 core complex\n\
19a6653c 1212-me500mc, generate code for Freescale e500mc core complex\n\
df12615d
AM		 1213-mspe generate code for Motorola SPE instructions\n\
1214-mregnames Allow symbolic names for registers\n\
1215-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1216#ifdef OBJ_ELF
bc805888 1217 fprintf (stream, _("\
252b5132
RH		 1218-mrelocatable support for GCC's -mrelocatble option\n\
1219-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1220-memb set PPC_EMB bit in ELF flags\n\
df12615d 1221-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1222 generate code for a little endian machine\n\
df12615d
AM		 1223-mbig, -mbig-endian, -b, -be\n\
1224 generate code for a big endian machine\n\
252b5132
RH		 1225-msolaris generate code for Solaris\n\
1226-mno-solaris do not generate code for Solaris\n\
1227-V print assembler version number\n\
1228-Qy, -Qn ignored\n"));
1229#endif
1230}
1231\f
1232/* Set ppc_cpu if it is not already set. */
1233
1234static void
98027b10 1235ppc_set_cpu (void)
252b5132
RH		 1236{
1237 const char *default_os = TARGET_OS;
1238 const char *default_cpu = TARGET_CPU;
1239
3c9030c1 1240 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1241 {
2a98c3a6 1242 if (ppc_obj64)
3c9030c1 1243 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1244 else if (strncmp (default_os, "aix", 3) == 0
1245 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1246 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1247 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1248 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1249 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1250 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1251 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1252 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1253 else
99a814a1
AM		 1254 as_fatal (_("Unknown default cpu = %s, os = %s"),
1255 default_cpu, default_os);
252b5132
RH		 1256 }
1257}
1258
9232bbb0
AM		 1259/* Figure out the BFD architecture to use. This function and ppc_mach
1260 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1261
1262enum bfd_architecture
98027b10 1263ppc_arch (void)
252b5132
RH		 1264{
1265 const char *default_cpu = TARGET_CPU;
1266 ppc_set_cpu ();
1267
1268 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1269 return bfd_arch_powerpc;
1270 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1271 return bfd_arch_rs6000;
1272 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1273 {
1274 if (strcmp (default_cpu, "rs6000") == 0)
1275 return bfd_arch_rs6000;
0baf16f2 1276 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1277 return bfd_arch_powerpc;
1278 }
1279
1280 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1281 return bfd_arch_unknown;
1282}
1283
7f6d05e8 1284unsigned long
98027b10 1285ppc_mach (void)
7f6d05e8 1286{
2a98c3a6
AM		 1287 if (ppc_obj64)
1288 return bfd_mach_ppc64;
1289 else if (ppc_arch () == bfd_arch_rs6000)
1290 return bfd_mach_rs6k;
1291 else
1292 return bfd_mach_ppc;
7f6d05e8
CP		 1293}
1294
81d4177b 1295extern char*
98027b10 1296ppc_target_format (void)
7f6d05e8
CP		 1297{
1298#ifdef OBJ_COFF
1299#ifdef TE_PE
99a814a1 1300 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1301#elif TE_POWERMAC
0baf16f2 1302 return "xcoff-powermac";
7f6d05e8 1303#else
eb1e0e80 1304# ifdef TE_AIX5
2b3c4602 1305 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1306# else
2b3c4602 1307 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1308# endif
7f6d05e8 1309#endif
7f6d05e8
CP		 1310#endif
1311#ifdef OBJ_ELF
9d8504b1
PB		 1312# ifdef TE_VXWORKS
1313 return "elf32-powerpc-vxworks";
1314# else
0baf16f2 1315 return (target_big_endian
2b3c4602
AM		 1316 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1317 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1318# endif
7f6d05e8
CP		 1319#endif
1320}
1321
69c040df
AM		 1322/* Insert opcodes and macros into hash tables. Called at startup and
1323 for .cpu pseudo. */
252b5132 1324
69c040df
AM		 1325static void
1326ppc_setup_opcodes (void)
252b5132 1327{
98027b10 1328 const struct powerpc_opcode *op;
252b5132
RH		 1329 const struct powerpc_opcode *op_end;
1330 const struct powerpc_macro *macro;
1331 const struct powerpc_macro *macro_end;
b84bf58a 1332 bfd_boolean bad_insn = FALSE;
252b5132 1333
69c040df
AM		 1334 if (ppc_hash != NULL)
1335 hash_die (ppc_hash);
1336 if (ppc_macro_hash != NULL)
1337 hash_die (ppc_macro_hash);
252b5132
RH		 1338
1339 /* Insert the opcodes into a hash table. */
1340 ppc_hash = hash_new ();
1341
c43a438d 1342 if (ENABLE_CHECKING)
b84bf58a 1343 {
c43a438d 1344 unsigned int i;
b84bf58a 1345
c43a438d
AM		 1346 /* Check operand masks. Code here and in the disassembler assumes
1347 all the 1's in the mask are contiguous. */
1348 for (i = 0; i < num_powerpc_operands; ++i)
b84bf58a 1349 {
c43a438d
AM		 1350 unsigned long mask = powerpc_operands[i].bitm;
1351 unsigned long right_bit;
1352 unsigned int j;
1353
1354 right_bit = mask & -mask;
1355 mask += right_bit;
1356 right_bit = mask & -mask;
1357 if (mask != right_bit)
1358 {
1359 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1360 bad_insn = TRUE;
1361 }
1362 for (j = i + 1; j < num_powerpc_operands; ++j)
1363 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1364 sizeof (powerpc_operands[0])) == 0)
1365 {
1366 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1367 j, i);
1368 bad_insn = TRUE;
1369 }
b84bf58a
AM		 1370 }
1371 }
1372
252b5132
RH		 1373 op_end = powerpc_opcodes + powerpc_num_opcodes;
1374 for (op = powerpc_opcodes; op < op_end; op++)
1375 {
c43a438d 1376 if (ENABLE_CHECKING)
b84bf58a 1377 {
c43a438d
AM		 1378 const unsigned char *o;
1379 unsigned long omask = op->mask;
8dbcd839 1380
d815f1a9 1381 if (op != powerpc_opcodes)
8dbcd839 1382 {
d815f1a9
AM		 1383 /* The major opcodes had better be sorted. Code in the
1384 disassembler assumes the insns are sorted according to
1385 major opcode. */
1386 if (PPC_OP (op[0].opcode) < PPC_OP (op[-1].opcode))
1387 {
1388 as_bad (_("major opcode is not sorted for %s"),
1389 op->name);
1390 bad_insn = TRUE;
1391 }
1392
1393 /* Warn if the table isn't more strictly ordered.
1394 Unfortunately it doesn't seem possible to order the
1395 table on much more than the major opcode, which makes
1396 it difficult to implement a binary search in the
1397 disassembler. The problem is that we have multiple
1398 ways to disassemble instructions, and we usually want
1399 to choose a more specific form (with more bits set in
1400 the opcode) than a more general form. eg. all of the
1401 following are equivalent:
1402 bne label # opcode = 0x40820000, mask = 0xff830003
1403 bf 2,label # opcode = 0x40800000, mask = 0xff800003
1404 bc 4,2,label # opcode = 0x40000000, mask = 0xfc000003
1405
1406 There are also cases where the table needs to be out
1407 of order to disassemble the correct instruction for
2f3bb96a 1408 processor variants. */
d815f1a9
AM		 1409 else if (0)
1410 {
1411 unsigned long t1 = op[0].opcode;
1412 unsigned long t2 = op[-1].opcode;
1413
1414 if (((t1 ^ t2) & 0xfc0007ff) == 0
1415 && (t1 & 0xfc0006df) == 0x7c000286)
1416 {
1417 /* spr field is split. */
1418 t1 = ((t1 & ~0x1ff800)
1419 | ((t1 & 0xf800) << 5) | ((t1 & 0x1f0000) >> 5));
1420 t2 = ((t2 & ~0x1ff800)
1421 | ((t2 & 0xf800) << 5) | ((t2 & 0x1f0000) >> 5));
1422 }
1423 if (t1 < t2)
1424 as_warn (_("%s (%08lx %08lx) after %s (%08lx %08lx)"),
1425 op[0].name, op[0].opcode, op[0].mask,
1426 op[-1].name, op[-1].opcode, op[-1].mask);
1427 }
8dbcd839 1428 }
c43a438d
AM		 1429
1430 /* The mask had better not trim off opcode bits. */
1431 if ((op->opcode & omask) != op->opcode)
1432 {
1433 as_bad (_("mask trims opcode bits for %s"),
1434 op->name);
1435 bad_insn = TRUE;
1436 }
1437
1438 /* The operands must not overlap the opcode or each other. */
1439 for (o = op->operands; *o; ++o)
1440 if (*o >= num_powerpc_operands)
1441 {
1442 as_bad (_("operand index error for %s"),
1443 op->name);
1444 bad_insn = TRUE;
1445 }
1446 else
b84bf58a 1447 {
c43a438d
AM		 1448 const struct powerpc_operand *operand = &powerpc_operands[*o];
1449 if (operand->shift >= 0)
b84bf58a 1450 {
c43a438d
AM		 1451 unsigned long mask = operand->bitm << operand->shift;
1452 if (omask & mask)
1453 {
1454 as_bad (_("operand %d overlap in %s"),
1455 (int) (o - op->operands), op->name);
1456 bad_insn = TRUE;
1457 }
1458 omask |= mask;
b84bf58a 1459 }
b84bf58a 1460 }
c43a438d 1461 }
252b5132 1462
2b3c4602 1463 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1464 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1465 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1466 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1467 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
1cb0a767 1468 && !(ppc_cpu & op->deprecated))
252b5132
RH		 1469 {
1470 const char *retval;
1471
98027b10 1472 retval = hash_insert (ppc_hash, op->name, (void *) op);
69c040df 1473 if (retval != NULL)
252b5132 1474 {
99a814a1 1475 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1476 if ((ppc_cpu & PPC_OPCODE_601) != 0
1477 && (op->flags & PPC_OPCODE_POWER) != 0)
1478 continue;
1479
b84bf58a 1480 as_bad (_("duplicate instruction %s"),
99a814a1 1481 op->name);
b84bf58a 1482 bad_insn = TRUE;
252b5132
RH		 1483 }
1484 }
1485 }
1486
3c9030c1
AM		 1487 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1488 for (op = powerpc_opcodes; op < op_end; op++)
98027b10 1489 hash_insert (ppc_hash, op->name, (void *) op);
3c9030c1 1490
252b5132
RH		 1491 /* Insert the macros into a hash table. */
1492 ppc_macro_hash = hash_new ();
1493
1494 macro_end = powerpc_macros + powerpc_num_macros;
1495 for (macro = powerpc_macros; macro < macro_end; macro++)
1496 {
1497 if ((macro->flags & ppc_cpu) != 0)
1498 {
1499 const char *retval;
1500
98027b10 1501 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
252b5132
RH		 1502 if (retval != (const char *) NULL)
1503 {
b84bf58a
AM		 1504 as_bad (_("duplicate macro %s"), macro->name);
1505 bad_insn = TRUE;
252b5132
RH		 1506 }
1507 }
1508 }
1509
b84bf58a 1510 if (bad_insn)
252b5132 1511 abort ();
69c040df
AM		 1512}
1513
1514/* This function is called when the assembler starts up. It is called
1515 after the options have been parsed and the output file has been
1516 opened. */
1517
1518void
98027b10 1519md_begin (void)
69c040df
AM		 1520{
1521 ppc_set_cpu ();
1522
1523 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1524
1525#ifdef OBJ_ELF
1526 /* Set the ELF flags if desired. */
1527 if (ppc_flags && !msolaris)
1528 bfd_set_private_flags (stdoutput, ppc_flags);
1529#endif
1530
1531 ppc_setup_opcodes ();
252b5132 1532
67c1ffbe 1533 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1534 by the user. */
252b5132
RH		 1535 if (!set_target_endian)
1536 {
1537 set_target_endian = 1;
1538 target_big_endian = PPC_BIG_ENDIAN;
1539 }
1540
1541#ifdef OBJ_XCOFF
1542 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1543
1544 /* Create dummy symbols to serve as initial csects. This forces the
1545 text csects to precede the data csects. These symbols will not
1546 be output. */
1547 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1548 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1549 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1550 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1551#endif
1552
1553#ifdef TE_PE
1554
1555 ppc_current_section = text_section;
81d4177b 1556 ppc_previous_section = 0;
252b5132
RH		 1557
1558#endif
1559}
1560
6a0c61b7 1561void
98027b10 1562ppc_cleanup (void)
6a0c61b7 1563{
dc1d03fc 1564#ifdef OBJ_ELF
6a0c61b7
EZ		 1565 if (ppc_apuinfo_list == NULL)
1566 return;
1567
1568 /* Ok, so write the section info out. We have this layout:
1569
1570 byte data what
1571 ---- ---- ----
1572 0 8 length of "APUinfo\0"
1573 4 (n*4) number of APU's (4 bytes each)
1574 8 2 note type 2
1575 12 "APUinfo\0" name
1576 20 APU#1 first APU's info
1577 24 APU#2 second APU's info
1578 ... ...
1579 */
1580 {
1581 char *p;
1582 asection *seg = now_seg;
1583 subsegT subseg = now_subseg;
1584 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1585 unsigned int i;
6a0c61b7
EZ		 1586
1587 /* Create the .PPC.EMB.apuinfo section. */
1588 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1589 bfd_set_section_flags (stdoutput,
1590 apuinfo_secp,
e1a9cb8e 1591 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1592
1593 p = frag_more (4);
1594 md_number_to_chars (p, (valueT) 8, 4);
1595
1596 p = frag_more (4);
e98d298c 1597 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1598
1599 p = frag_more (4);
1600 md_number_to_chars (p, (valueT) 2, 4);
1601
1602 p = frag_more (8);
1603 strcpy (p, "APUinfo");
1604
1605 for (i = 0; i < ppc_apuinfo_num; i++)
1606 {
b34976b6
AM		 1607 p = frag_more (4);
1608 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1609 }
1610
1611 frag_align (2, 0, 0);
1612
1613 /* We probably can't restore the current segment, for there likely
1614 isn't one yet... */
1615 if (seg && subseg)
1616 subseg_set (seg, subseg);
1617 }
dc1d03fc 1618#endif
6a0c61b7
EZ		 1619}
1620
252b5132
RH		 1621/* Insert an operand value into an instruction. */
1622
1623static unsigned long
a1867a27
AM		 1624ppc_insert_operand (unsigned long insn,
1625 const struct powerpc_operand *operand,
1626 offsetT val,
fa452fa6 1627 ppc_cpu_t ppc_cpu,
a1867a27
AM		 1628 char *file,
1629 unsigned int line)
252b5132 1630{
b84bf58a 1631 long min, max, right;
eb42fac1 1632
b84bf58a
AM		 1633 max = operand->bitm;
1634 right = max & -max;
1635 min = 0;
1636
1637 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
252b5132 1638 {
b84bf58a 1639 if ((operand->flags & PPC_OPERAND_SIGNOPT) == 0)
931774a9
AM		 1640 max = (max >> 1) & -right;
1641 min = ~max & -right;
b84bf58a 1642 }
252b5132 1643
b84bf58a 1644 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
3896c469 1645 max++;
252b5132 1646
b84bf58a 1647 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
a1867a27
AM		 1648 {
1649 long tmp = min;
1650 min = -max;
1651 max = -tmp;
1652 }
b84bf58a 1653
a1867a27
AM		 1654 if (min <= max)
1655 {
1656 /* Some people write constants with the sign extension done by
1657 hand but only up to 32 bits. This shouldn't really be valid,
1658 but, to permit this code to assemble on a 64-bit host, we
1659 sign extend the 32-bit value to 64 bits if so doing makes the
1660 value valid. */
1661 if (val > max
1662 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1663 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1664 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1665 val = val - 0x80000000 - 0x80000000;
1666
1667 /* Similarly, people write expressions like ~(1<<15), and expect
1668 this to be OK for a 32-bit unsigned value. */
1669 else if (val < min
1670 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1671 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1672 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1673 val = val + 0x80000000 + 0x80000000;
1674
1675 else if (val < min
1676 || val > max
1677 || (val & (right - 1)) != 0)
1678 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1679 }
b84bf58a 1680
252b5132
RH		 1681 if (operand->insert)
1682 {
1683 const char *errmsg;
1684
1685 errmsg = NULL;
2b3c4602 1686 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1687 if (errmsg != (const char *) NULL)
ee2c9aa9 1688 as_bad_where (file, line, "%s", errmsg);
252b5132
RH		 1689 }
1690 else
b84bf58a 1691 insn |= ((long) val & operand->bitm) << operand->shift;
252b5132
RH		 1692
1693 return insn;
1694}
1695
1696\f
1697#ifdef OBJ_ELF
1698/* Parse @got, etc. and return the desired relocation. */
1699static bfd_reloc_code_real_type
98027b10 1700ppc_elf_suffix (char **str_p, expressionS *exp_p)
252b5132
RH		 1701{
1702 struct map_bfd {
1703 char *string;
b7d7dc63
AM		 1704 unsigned int length : 8;
1705 unsigned int valid32 : 1;
1706 unsigned int valid64 : 1;
1707 unsigned int reloc;
252b5132
RH		 1708 };
1709
1710 char ident[20];
1711 char *str = *str_p;
1712 char *str2;
1713 int ch;
1714 int len;
15c1449b 1715 const struct map_bfd *ptr;
252b5132 1716
b7d7dc63
AM		 1717#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1718#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1719#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1720
15c1449b 1721 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1722 MAP ("l", BFD_RELOC_LO16),
1723 MAP ("h", BFD_RELOC_HI16),
1724 MAP ("ha", BFD_RELOC_HI16_S),
1725 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1726 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1727 MAP ("got", BFD_RELOC_16_GOTOFF),
1728 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1729 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1730 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1731 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1732 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1733 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1734 MAP ("copy", BFD_RELOC_PPC_COPY),
1735 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1736 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1737 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1738 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1739 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1740 MAP ("tls", BFD_RELOC_PPC_TLS),
1741 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1742 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1743 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1744 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1745 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1746 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1747 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1748 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1749 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1750 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1751 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1752 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1753 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1754 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1755 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1756 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1757 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1758 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1759 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1760 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1761 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1762 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1763 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1764 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1765 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1766 MAP32 ("fixup", BFD_RELOC_CTOR),
1767 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1768 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1769 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1770 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1771 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1772 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1773 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1774 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1775 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1776 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1777 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1778 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1779 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1780 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1781 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1782 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1783 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1784 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1785 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1786 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1787 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1788 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1789 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1790 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1791 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1792 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1793 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1794 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1795 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1796 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1797 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1798 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1799 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1800 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1801 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1802 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1803 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1804 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1805 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1806 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1807 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1808 };
1809
1810 if (*str++ != '@')
1811 return BFD_RELOC_UNUSED;
1812
1813 for (ch = *str, str2 = ident;
1814 (str2 < ident + sizeof (ident) - 1
3882b010 1815 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1816 ch = *++str)
1817 {
3882b010 1818 *str2++ = TOLOWER (ch);
252b5132
RH		 1819 }
1820
1821 *str2 = '\0';
1822 len = str2 - ident;
1823
1824 ch = ident[0];
1825 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1826 if (ch == ptr->string[0]
1827 && len == ptr->length
b7d7dc63
AM		 1828 && memcmp (ident, ptr->string, ptr->length) == 0
1829 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1830 {
15c1449b
AM		 1831 int reloc = ptr->reloc;
1832
727fc41e
AM		 1833 if (!ppc_obj64 && exp_p->X_add_number != 0)
1834 {
1835 switch (reloc)
1836 {
1837 case BFD_RELOC_16_GOTOFF:
1838 case BFD_RELOC_LO16_GOTOFF:
1839 case BFD_RELOC_HI16_GOTOFF:
1840 case BFD_RELOC_HI16_S_GOTOFF:
1841 as_warn (_("identifier+constant@got means "
1842 "identifier@got+constant"));
1843 break;
1844
1845 case BFD_RELOC_PPC_GOT_TLSGD16:
1846 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
1847 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
1848 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
1849 case BFD_RELOC_PPC_GOT_TLSLD16:
1850 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
1851 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
1852 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
1853 case BFD_RELOC_PPC_GOT_DTPREL16:
1854 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
1855 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
1856 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
1857 case BFD_RELOC_PPC_GOT_TPREL16:
1858 case BFD_RELOC_PPC_GOT_TPREL16_LO:
1859 case BFD_RELOC_PPC_GOT_TPREL16_HI:
1860 case BFD_RELOC_PPC_GOT_TPREL16_HA:
1861 as_bad (_("symbol+offset not supported for got tls"));
1862 break;
1863 }
1864 }
5f6db75a
AM		 1865
1866 /* Now check for identifier@suffix+constant. */
1867 if (*str == '-' || *str == '+')
252b5132 1868 {
5f6db75a
AM		 1869 char *orig_line = input_line_pointer;
1870 expressionS new_exp;
1871
1872 input_line_pointer = str;
1873 expression (&new_exp);
1874 if (new_exp.X_op == O_constant)
252b5132 1875 {
5f6db75a
AM		 1876 exp_p->X_add_number += new_exp.X_add_number;
1877 str = input_line_pointer;
252b5132 1878 }
5f6db75a
AM		 1879
1880 if (&input_line_pointer != str_p)
1881 input_line_pointer = orig_line;
252b5132 1882 }
252b5132 1883 *str_p = str;
0baf16f2 1884
2b3c4602 1885 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1886 && exp_p->X_op == O_symbol
1887 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1888 {
9f2b53d7
AM		 1889 /* Change the symbol so that the dummy .TOC. symbol can be
1890 omitted from the object file. */
0baf16f2
AM		 1891 exp_p->X_add_symbol = &abs_symbol;
1892 }
1893
15c1449b 1894 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1895 }
1896
1897 return BFD_RELOC_UNUSED;
1898}
1899
99a814a1
AM		 1900/* Like normal .long/.short/.word, except support @got, etc.
1901 Clobbers input_line_pointer, checks end-of-line. */
252b5132 1902static void
98027b10 1903ppc_elf_cons (int nbytes /* 1=.byte, 2=.word, 4=.long, 8=.llong */)
252b5132
RH		 1904{
1905 expressionS exp;
1906 bfd_reloc_code_real_type reloc;
1907
1908 if (is_it_end_of_statement ())
1909 {
1910 demand_empty_rest_of_line ();
1911 return;
1912 }
1913
1914 do
1915 {
1916 expression (&exp);
1917 if (exp.X_op == O_symbol
1918 && *input_line_pointer == '@'
99a814a1
AM		 1919 && (reloc = ppc_elf_suffix (&input_line_pointer,
1920 &exp)) != BFD_RELOC_UNUSED)
252b5132 1921 {
99a814a1
AM		 1922 reloc_howto_type *reloc_howto;
1923 int size;
1924
1925 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1926 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1927
1928 if (size > nbytes)
0baf16f2
AM		 1929 {
1930 as_bad (_("%s relocations do not fit in %d bytes\n"),
1931 reloc_howto->name, nbytes);
1932 }
252b5132
RH		 1933 else
1934 {
0baf16f2
AM		 1935 char *p;
1936 int offset;
252b5132 1937
0baf16f2
AM		 1938 p = frag_more (nbytes);
1939 offset = 0;
1940 if (target_big_endian)
1941 offset = nbytes - size;
99a814a1
AM		 1942 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1943 &exp, 0, reloc);
252b5132
RH		 1944 }
1945 }
1946 else
1947 emit_expr (&exp, (unsigned int) nbytes);
1948 }
1949 while (*input_line_pointer++ == ',');
1950
99a814a1
AM		 1951 /* Put terminator back into stream. */
1952 input_line_pointer--;
252b5132
RH		 1953 demand_empty_rest_of_line ();
1954}
1955
1956/* Solaris pseduo op to change to the .rodata section. */
1957static void
98027b10 1958ppc_elf_rdata (int xxx)
252b5132
RH		 1959{
1960 char *save_line = input_line_pointer;
1961 static char section[] = ".rodata\n";
1962
99a814a1 1963 /* Just pretend this is .section .rodata */
252b5132
RH		 1964 input_line_pointer = section;
1965 obj_elf_section (xxx);
1966
1967 input_line_pointer = save_line;
1968}
1969
99a814a1 1970/* Pseudo op to make file scope bss items. */
252b5132 1971static void
98027b10 1972ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
252b5132 1973{
98027b10
AM		 1974 char *name;
1975 char c;
1976 char *p;
252b5132 1977 offsetT size;
98027b10 1978 symbolS *symbolP;
252b5132
RH		 1979 offsetT align;
1980 segT old_sec;
1981 int old_subsec;
1982 char *pfrag;
1983 int align2;
1984
1985 name = input_line_pointer;
1986 c = get_symbol_end ();
1987
99a814a1 1988 /* just after name is now '\0'. */
252b5132
RH		 1989 p = input_line_pointer;
1990 *p = c;
1991 SKIP_WHITESPACE ();
1992 if (*input_line_pointer != ',')
1993 {
1994 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1995 ignore_rest_of_line ();
1996 return;
1997 }
1998
1999 input_line_pointer++; /* skip ',' */
2000 if ((size = get_absolute_expression ()) < 0)
2001 {
2002 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2003 ignore_rest_of_line ();
2004 return;
2005 }
2006
2007 /* The third argument to .lcomm is the alignment. */
2008 if (*input_line_pointer != ',')
2009 align = 8;
2010 else
2011 {
2012 ++input_line_pointer;
2013 align = get_absolute_expression ();
2014 if (align <= 0)
2015 {
2016 as_warn (_("ignoring bad alignment"));
2017 align = 8;
2018 }
2019 }
2020
2021 *p = 0;
2022 symbolP = symbol_find_or_make (name);
2023 *p = c;
2024
2025 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2026 {
2027 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
2028 S_GET_NAME (symbolP));
2029 ignore_rest_of_line ();
2030 return;
2031 }
2032
2033 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2034 {
2035 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2036 S_GET_NAME (symbolP),
2037 (long) S_GET_VALUE (symbolP),
2038 (long) size);
2039
2040 ignore_rest_of_line ();
2041 return;
2042 }
2043
99a814a1 2044 /* Allocate_bss. */
252b5132
RH		 2045 old_sec = now_seg;
2046 old_subsec = now_subseg;
2047 if (align)
2048 {
99a814a1 2049 /* Convert to a power of 2 alignment. */
252b5132
RH		 2050 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2051 if (align != 1)
2052 {
2053 as_bad (_("Common alignment not a power of 2"));
2054 ignore_rest_of_line ();
2055 return;
2056 }
2057 }
2058 else
2059 align2 = 0;
2060
2061 record_alignment (bss_section, align2);
2062 subseg_set (bss_section, 0);
2063 if (align2)
2064 frag_align (align2, 0, 0);
2065 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 2066 symbol_get_frag (symbolP)->fr_symbol = 0;
2067 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 2068 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2069 (char *) 0);
2070 *pfrag = 0;
2071 S_SET_SIZE (symbolP, size);
2072 S_SET_SEGMENT (symbolP, bss_section);
2073 subseg_set (old_sec, old_subsec);
2074 demand_empty_rest_of_line ();
2075}
2076
2077/* Validate any relocations emitted for -mrelocatable, possibly adding
2078 fixups for word relocations in writable segments, so we can adjust
2079 them at runtime. */
2080static void
98027b10 2081ppc_elf_validate_fix (fixS *fixp, segT seg)
252b5132
RH		 2082{
2083 if (fixp->fx_done || fixp->fx_pcrel)
2084 return;
2085
2086 switch (shlib)
2087 {
2088 case SHLIB_NONE:
2089 case SHLIB_PIC:
2090 return;
2091
5d6f4f16 2092 case SHLIB_MRELOCATABLE:
252b5132
RH		 2093 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
2094 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2095 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2096 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2097 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 2098 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 2099 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2100 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2101 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 2102 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 2103 && strcmp (segment_name (seg), ".got2") != 0
2104 && strcmp (segment_name (seg), ".dtors") != 0
2105 && strcmp (segment_name (seg), ".ctors") != 0
2106 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 2107 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2108 && strcmp (segment_name (seg), ".eh_frame") != 0
2109 && strcmp (segment_name (seg), ".ex_shared") != 0)
2110 {
2111 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2112 || fixp->fx_r_type != BFD_RELOC_CTOR)
2113 {
2114 as_bad_where (fixp->fx_file, fixp->fx_line,
2115 _("Relocation cannot be done when using -mrelocatable"));
2116 }
2117 }
2118 return;
2119 }
2120}
0baf16f2 2121
7e8d4ab4
AM		 2122/* Prevent elf_frob_file_before_adjust removing a weak undefined
2123 function descriptor sym if the corresponding code sym is used. */
2124
2125void
98027b10 2126ppc_frob_file_before_adjust (void)
0baf16f2 2127{
7e8d4ab4 2128 symbolS *symp;
9232bbb0 2129 asection *toc;
0baf16f2 2130
7e8d4ab4
AM		 2131 if (!ppc_obj64)
2132 return;
2133
2134 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 2135 {
7e8d4ab4
AM		 2136 const char *name;
2137 char *dotname;
2138 symbolS *dotsym;
2139 size_t len;
2140
2141 name = S_GET_NAME (symp);
2142 if (name[0] == '.')
2143 continue;
2144
2145 if (! S_IS_WEAK (symp)
2146 || S_IS_DEFINED (symp))
2147 continue;
2148
2149 len = strlen (name) + 1;
2150 dotname = xmalloc (len + 1);
2151 dotname[0] = '.';
2152 memcpy (dotname + 1, name, len);
461b725f 2153 dotsym = symbol_find_noref (dotname, 1);
7e8d4ab4
AM		 2154 free (dotname);
2155 if (dotsym != NULL && (symbol_used_p (dotsym)
2156 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 2157 symbol_mark_used (symp);
2158
0baf16f2
AM		 2159 }
2160
9232bbb0
AM		 2161 toc = bfd_get_section_by_name (stdoutput, ".toc");
2162 if (toc != NULL
2163 && bfd_section_size (stdoutput, toc) > 0x10000)
2164 as_warn (_("TOC section size exceeds 64k"));
2165
7e8d4ab4
AM		 2166 /* Don't emit .TOC. symbol. */
2167 symp = symbol_find (".TOC.");
2168 if (symp != NULL)
2169 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 2170}
252b5132
RH		 2171#endif /* OBJ_ELF */
2172\f
2173#ifdef TE_PE
2174
2175/*
99a814a1 2176 * Summary of parse_toc_entry.
252b5132
RH		 2177 *
2178 * in: Input_line_pointer points to the '[' in one of:
2179 *
2180 * [toc] [tocv] [toc32] [toc64]
2181 *
2182 * Anything else is an error of one kind or another.
2183 *
81d4177b 2184 * out:
252b5132
RH		 2185 * return value: success or failure
2186 * toc_kind: kind of toc reference
2187 * input_line_pointer:
2188 * success: first char after the ']'
2189 * failure: unchanged
2190 *
2191 * settings:
2192 *
2193 * [toc] - rv == success, toc_kind = default_toc
2194 * [tocv] - rv == success, toc_kind = data_in_toc
2195 * [toc32] - rv == success, toc_kind = must_be_32
2196 * [toc64] - rv == success, toc_kind = must_be_64
2197 *
2198 */
2199
81d4177b
KH		 2200enum toc_size_qualifier
2201{
252b5132
RH		 2202 default_toc, /* The toc cell constructed should be the system default size */
2203 data_in_toc, /* This is a direct reference to a toc cell */
2204 must_be_32, /* The toc cell constructed must be 32 bits wide */
2205 must_be_64 /* The toc cell constructed must be 64 bits wide */
2206};
2207
2208static int
98027b10 2209parse_toc_entry (enum toc_size_qualifier *toc_kind)
252b5132
RH		 2210{
2211 char *start;
2212 char *toc_spec;
2213 char c;
2214 enum toc_size_qualifier t;
2215
99a814a1 2216 /* Save the input_line_pointer. */
252b5132
RH		 2217 start = input_line_pointer;
2218
99a814a1 2219 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2220 ++input_line_pointer;
2221 SKIP_WHITESPACE ();
81d4177b 2222
99a814a1 2223 /* Find the spelling of the operand. */
252b5132
RH		 2224 toc_spec = input_line_pointer;
2225 c = get_symbol_end ();
2226
99a814a1 2227 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2228 {
2229 t = default_toc;
2230 }
99a814a1 2231 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2232 {
2233 t = data_in_toc;
2234 }
99a814a1 2235 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2236 {
2237 t = must_be_32;
2238 }
99a814a1 2239 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2240 {
2241 t = must_be_64;
2242 }
2243 else
2244 {
2245 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2246 *input_line_pointer = c;
2247 input_line_pointer = start;
252b5132
RH		 2248 return 0;
2249 }
2250
99a814a1
AM		 2251 /* Now find the ']'. */
2252 *input_line_pointer = c;
252b5132 2253
81d4177b
KH		 2254 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2255 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2256
2257 if (c != ']')
2258 {
2259 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2260 input_line_pointer = start;
252b5132
RH		 2261 return 0;
2262 }
2263
99a814a1 2264 *toc_kind = t;
252b5132
RH		 2265 return 1;
2266}
2267#endif
2268\f
2269
dc1d03fc 2270#ifdef OBJ_ELF
6a0c61b7
EZ		 2271#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2272static void
98027b10 2273ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
6a0c61b7
EZ		 2274{
2275 unsigned int i;
2276
2277 /* Check we don't already exist. */
2278 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2279 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2280 return;
b34976b6 2281
6a0c61b7
EZ		 2282 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2283 {
2284 if (ppc_apuinfo_num_alloc == 0)
2285 {
2286 ppc_apuinfo_num_alloc = 4;
2287 ppc_apuinfo_list = (unsigned long *)
2288 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2289 }
2290 else
2291 {
2292 ppc_apuinfo_num_alloc += 4;
2293 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2294 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2295 }
2296 }
dc1d03fc 2297 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2298}
2299#undef APUID
dc1d03fc 2300#endif
6a0c61b7
EZ		 2301\f
2302
252b5132
RH		 2303/* We need to keep a list of fixups. We can't simply generate them as
2304 we go, because that would require us to first create the frag, and
2305 that would screw up references to ``.''. */
2306
2307struct ppc_fixup
2308{
2309 expressionS exp;
2310 int opindex;
2311 bfd_reloc_code_real_type reloc;
2312};
2313
2314#define MAX_INSN_FIXUPS (5)
2315
2316/* This routine is called for each instruction to be assembled. */
2317
2318void
98027b10 2319md_assemble (char *str)
252b5132
RH		 2320{
2321 char *s;
2322 const struct powerpc_opcode *opcode;
2323 unsigned long insn;
2324 const unsigned char *opindex_ptr;
2325 int skip_optional;
2326 int need_paren;
2327 int next_opindex;
2328 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2329 int fc;
2330 char *f;
09b935ac 2331 int addr_mod;
252b5132
RH		 2332 int i;
2333#ifdef OBJ_ELF
2334 bfd_reloc_code_real_type reloc;
2335#endif
2336
2337 /* Get the opcode. */
3882b010 2338 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2339 ;
2340 if (*s != '\0')
2341 *s++ = '\0';
2342
2343 /* Look up the opcode in the hash table. */
2344 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2345 if (opcode == (const struct powerpc_opcode *) NULL)
2346 {
2347 const struct powerpc_macro *macro;
2348
2349 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2350 if (macro == (const struct powerpc_macro *) NULL)
2351 as_bad (_("Unrecognized opcode: `%s'"), str);
2352 else
2353 ppc_macro (s, macro);
2354
2355 return;
2356 }
2357
2358 insn = opcode->opcode;
2359
2360 str = s;
3882b010 2361 while (ISSPACE (*str))
252b5132
RH		 2362 ++str;
2363
2364 /* PowerPC operands are just expressions. The only real issue is
2365 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2366 an optional operand separate the operands only with commas (in some
2367 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2368 have optional operands). Most instructions with optional operands
2369 have only one. Those that have more than one optional operand can
2370 take either all their operands or none. So, before we start seriously
2371 parsing the operands, we check to see if we have optional operands,
2372 and if we do, we count the number of commas to see which operands
2373 have been omitted. */
252b5132
RH		 2374 skip_optional = 0;
2375 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2376 {
2377 const struct powerpc_operand *operand;
2378
2379 operand = &powerpc_operands[*opindex_ptr];
2380 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2381 {
2382 unsigned int opcount;
7fe9cf6b
NC		 2383 unsigned int num_operands_expected;
2384 unsigned int i;
252b5132
RH		 2385
2386 /* There is an optional operand. Count the number of
2387 commas in the input line. */
2388 if (*str == '\0')
2389 opcount = 0;
2390 else
2391 {
2392 opcount = 1;
2393 s = str;
2394 while ((s = strchr (s, ',')) != (char *) NULL)
2395 {
2396 ++opcount;
2397 ++s;
2398 }
2399 }
2400
7fe9cf6b
NC		 2401 /* Compute the number of expected operands.
2402 Do not count fake operands. */
2403 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2404 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2405 ++ num_operands_expected;
2406
252b5132
RH		 2407 /* If there are fewer operands in the line then are called
2408 for by the instruction, we want to skip the optional
1f6c9eb0 2409 operands. */
7fe9cf6b 2410 if (opcount < num_operands_expected)
252b5132
RH		 2411 skip_optional = 1;
2412
2413 break;
2414 }
2415 }
2416
2417 /* Gather the operands. */
2418 need_paren = 0;
2419 next_opindex = 0;
2420 fc = 0;
2421 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2422 {
2423 const struct powerpc_operand *operand;
2424 const char *errmsg;
2425 char *hold;
2426 expressionS ex;
2427 char endc;
2428
2429 if (next_opindex == 0)
2430 operand = &powerpc_operands[*opindex_ptr];
2431 else
2432 {
2433 operand = &powerpc_operands[next_opindex];
2434 next_opindex = 0;
2435 }
252b5132
RH		 2436 errmsg = NULL;
2437
2438 /* If this is a fake operand, then we do not expect anything
2439 from the input. */
2440 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2441 {
2b3c4602 2442 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2443 if (errmsg != (const char *) NULL)
ee2c9aa9 2444 as_bad ("%s", errmsg);
252b5132
RH		 2445 continue;
2446 }
2447
2448 /* If this is an optional operand, and we are skipping it, just
2449 insert a zero. */
2450 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2451 && skip_optional)
2452 {
2453 if (operand->insert)
2454 {
2b3c4602 2455 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132 2456 if (errmsg != (const char *) NULL)
ee2c9aa9 2457 as_bad ("%s", errmsg);
252b5132
RH		 2458 }
2459 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2460 next_opindex = *opindex_ptr + 1;
2461 continue;
2462 }
2463
2464 /* Gather the operand. */
2465 hold = input_line_pointer;
2466 input_line_pointer = str;
2467
2468#ifdef TE_PE
81d4177b 2469 if (*input_line_pointer == '[')
252b5132
RH		 2470 {
2471 /* We are expecting something like the second argument here:
99a814a1
AM		 2472 *
2473 * lwz r4,[toc].GS.0.static_int(rtoc)
2474 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2475 * The argument following the `]' must be a symbol name, and the
2476 * register must be the toc register: 'rtoc' or '2'
2477 *
2478 * The effect is to 0 as the displacement field
2479 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2480 * the appropriate variation) reloc against it based on the symbol.
2481 * The linker will build the toc, and insert the resolved toc offset.
2482 *
2483 * Note:
2484 * o The size of the toc entry is currently assumed to be
2485 * 32 bits. This should not be assumed to be a hard coded
2486 * number.
2487 * o In an effort to cope with a change from 32 to 64 bits,
2488 * there are also toc entries that are specified to be
2489 * either 32 or 64 bits:
2490 * lwz r4,[toc32].GS.0.static_int(rtoc)
2491 * lwz r4,[toc64].GS.0.static_int(rtoc)
2492 * These demand toc entries of the specified size, and the
2493 * instruction probably requires it.
2494 */
252b5132
RH		 2495
2496 int valid_toc;
2497 enum toc_size_qualifier toc_kind;
2498 bfd_reloc_code_real_type toc_reloc;
2499
99a814a1
AM		 2500 /* Go parse off the [tocXX] part. */
2501 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2502
81d4177b 2503 if (!valid_toc)
252b5132 2504 {
99a814a1
AM		 2505 /* Note: message has already been issued.
2506 FIXME: what sort of recovery should we do?
2507 demand_rest_of_line (); return; ? */
252b5132
RH		 2508 }
2509
99a814a1
AM		 2510 /* Now get the symbol following the ']'. */
2511 expression (&ex);
252b5132
RH		 2512
2513 switch (toc_kind)
2514 {
2515 case default_toc:
99a814a1
AM		 2516 /* In this case, we may not have seen the symbol yet,
2517 since it is allowed to appear on a .extern or .globl
2518 or just be a label in the .data section. */
252b5132
RH		 2519 toc_reloc = BFD_RELOC_PPC_TOC16;
2520 break;
2521 case data_in_toc:
99a814a1
AM		 2522 /* 1. The symbol must be defined and either in the toc
2523 section, or a global.
2524 2. The reloc generated must have the TOCDEFN flag set
2525 in upper bit mess of the reloc type.
2526 FIXME: It's a little confusing what the tocv
2527 qualifier can be used for. At the very least, I've
2528 seen three uses, only one of which I'm sure I can
2529 explain. */
81d4177b
KH		 2530 if (ex.X_op == O_symbol)
2531 {
9c2799c2 2532 gas_assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2533 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2534 != tocdata_section)
252b5132 2535 {
99a814a1 2536 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2537 }
2538 }
2539
2540 toc_reloc = BFD_RELOC_PPC_TOC16;
2541 break;
2542 case must_be_32:
99a814a1
AM		 2543 /* FIXME: these next two specifically specify 32/64 bit
2544 toc entries. We don't support them today. Is this
2545 the right way to say that? */
252b5132
RH		 2546 toc_reloc = BFD_RELOC_UNUSED;
2547 as_bad (_("Unimplemented toc32 expression modifier"));
2548 break;
2549 case must_be_64:
99a814a1 2550 /* FIXME: see above. */
252b5132
RH		 2551 toc_reloc = BFD_RELOC_UNUSED;
2552 as_bad (_("Unimplemented toc64 expression modifier"));
2553 break;
2554 default:
bc805888 2555 fprintf (stderr,
99a814a1
AM		 2556 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2557 toc_kind);
bc805888 2558 abort ();
252b5132
RH		 2559 break;
2560 }
2561
2562 /* We need to generate a fixup for this expression. */
2563 if (fc >= MAX_INSN_FIXUPS)
2564 as_fatal (_("too many fixups"));
2565
2566 fixups[fc].reloc = toc_reloc;
2567 fixups[fc].exp = ex;
2568 fixups[fc].opindex = *opindex_ptr;
2569 ++fc;
2570
99a814a1
AM		 2571 /* Ok. We've set up the fixup for the instruction. Now make it
2572 look like the constant 0 was found here. */
252b5132
RH		 2573 ex.X_unsigned = 1;
2574 ex.X_op = O_constant;
2575 ex.X_add_number = 0;
2576 ex.X_add_symbol = NULL;
2577 ex.X_op_symbol = NULL;
2578 }
2579
2580 else
2581#endif /* TE_PE */
2582 {
2ad068be
AM		 2583 if ((reg_names_p && (operand->flags & PPC_OPERAND_CR) != 0)
2584 || !register_name (&ex))
252b5132 2585 {
13abbae3
AM		 2586 char save_lex = lex_type['%'];
2587
252b5132 2588 if ((operand->flags & PPC_OPERAND_CR) != 0)
13abbae3
AM		 2589 {
2590 cr_operand = TRUE;
2591 lex_type['%'] |= LEX_BEGIN_NAME;
2592 }
252b5132 2593 expression (&ex);
b34976b6 2594 cr_operand = FALSE;
13abbae3 2595 lex_type['%'] = save_lex;
252b5132
RH		 2596 }
2597 }
2598
2599 str = input_line_pointer;
2600 input_line_pointer = hold;
2601
2602 if (ex.X_op == O_illegal)
2603 as_bad (_("illegal operand"));
2604 else if (ex.X_op == O_absent)
2605 as_bad (_("missing operand"));
2606 else if (ex.X_op == O_register)
2607 {
2608 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2609 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2610 }
2611 else if (ex.X_op == O_constant)
2612 {
2613#ifdef OBJ_ELF
81d4177b 2614 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2615 char *orig_str = str;
2616
2617 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2618 switch (reloc)
2619 {
2620 default:
2621 str = orig_str;
2622 break;
2623
2624 case BFD_RELOC_LO16:
2625 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2626 something which cleared it, we always produce a
2627 signed value. */
2628 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2629 ex.X_add_number &= 0xffff;
2630 else
0baf16f2 2631 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2632 break;
2633
2634 case BFD_RELOC_HI16:
0baf16f2
AM		 2635 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2636 ex.X_add_number = PPC_HI (ex.X_add_number);
2637 else
2638 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2639 break;
2640
2641 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2642 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2643 ex.X_add_number = PPC_HA (ex.X_add_number);
2644 else
2645 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2646 break;
2647
0baf16f2
AM		 2648 case BFD_RELOC_PPC64_HIGHER:
2649 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2650 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2651 else
2652 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2653 break;
2654
2655 case BFD_RELOC_PPC64_HIGHER_S:
2656 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2657 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2658 else
2659 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2660 break;
0baf16f2
AM		 2661
2662 case BFD_RELOC_PPC64_HIGHEST:
2663 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2664 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2665 else
2666 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2667 break;
2668
2669 case BFD_RELOC_PPC64_HIGHEST_S:
2670 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2671 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2672 else
2673 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2674 break;
252b5132 2675 }
0baf16f2 2676#endif /* OBJ_ELF */
252b5132 2677 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
783de163 2678 ppc_cpu, (char *) NULL, 0);
252b5132
RH		 2679 }
2680#ifdef OBJ_ELF
727fc41e 2681 else
252b5132 2682 {
727fc41e 2683 if (ex.X_op == O_symbol && str[0] == '(')
cdba85ec 2684 {
727fc41e
AM		 2685 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
2686 if (sym_name[0] == '.')
2687 ++sym_name;
cdba85ec 2688
727fc41e 2689 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
252b5132 2690 {
727fc41e
AM		 2691 expressionS tls_exp;
2692
2693 hold = input_line_pointer;
2694 input_line_pointer = str + 1;
2695 expression (&tls_exp);
2696 if (tls_exp.X_op == O_symbol)
2697 {
2698 reloc = BFD_RELOC_UNUSED;
2699 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
2700 {
2701 reloc = BFD_RELOC_PPC_TLSGD;
2702 input_line_pointer += 7;
2703 }
2704 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
2705 {
2706 reloc = BFD_RELOC_PPC_TLSLD;
2707 input_line_pointer += 7;
2708 }
2709 if (reloc != BFD_RELOC_UNUSED)
2710 {
2711 SKIP_WHITESPACE ();
2712 str = input_line_pointer;
2713
2714 if (fc >= MAX_INSN_FIXUPS)
2715 as_fatal (_("too many fixups"));
2716 fixups[fc].exp = tls_exp;
2717 fixups[fc].opindex = *opindex_ptr;
2718 fixups[fc].reloc = reloc;
2719 ++fc;
2720 }
2721 }
2722 input_line_pointer = hold;
252b5132
RH		 2723 }
2724 }
2725
727fc41e 2726 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
0baf16f2 2727 {
727fc41e 2728 /* Some TLS tweaks. */
0baf16f2
AM		 2729 switch (reloc)
2730 {
727fc41e 2731 default:
cdba85ec 2732 break;
727fc41e
AM		 2733
2734 case BFD_RELOC_PPC_TLS:
2735 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2736 ppc_cpu, (char *) NULL, 0);
cdba85ec 2737 break;
727fc41e
AM		 2738
2739 /* We'll only use the 32 (or 64) bit form of these relocations
2740 in constants. Instructions get the 16 bit form. */
2741 case BFD_RELOC_PPC_DTPREL:
2742 reloc = BFD_RELOC_PPC_DTPREL16;
cdba85ec 2743 break;
727fc41e
AM		 2744 case BFD_RELOC_PPC_TPREL:
2745 reloc = BFD_RELOC_PPC_TPREL16;
0baf16f2
AM		 2746 break;
2747 }
727fc41e
AM		 2748
2749 /* For the absolute forms of branches, convert the PC
2750 relative form back into the absolute. */
2751 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2752 {
2753 switch (reloc)
2754 {
2755 case BFD_RELOC_PPC_B26:
2756 reloc = BFD_RELOC_PPC_BA26;
2757 break;
2758 case BFD_RELOC_PPC_B16:
2759 reloc = BFD_RELOC_PPC_BA16;
2760 break;
2761 case BFD_RELOC_PPC_B16_BRTAKEN:
2762 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2763 break;
2764 case BFD_RELOC_PPC_B16_BRNTAKEN:
2765 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2766 break;
2767 default:
2768 break;
2769 }
2770 }
2771
2772 if (ppc_obj64
2773 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
2774 {
2775 switch (reloc)
2776 {
2777 case BFD_RELOC_16:
2778 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2779 break;
2780 case BFD_RELOC_LO16:
2781 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2782 break;
2783 case BFD_RELOC_16_GOTOFF:
2784 reloc = BFD_RELOC_PPC64_GOT16_DS;
2785 break;
2786 case BFD_RELOC_LO16_GOTOFF:
2787 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2788 break;
2789 case BFD_RELOC_LO16_PLTOFF:
2790 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2791 break;
2792 case BFD_RELOC_16_BASEREL:
2793 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2794 break;
2795 case BFD_RELOC_LO16_BASEREL:
2796 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2797 break;
2798 case BFD_RELOC_PPC_TOC16:
2799 reloc = BFD_RELOC_PPC64_TOC16_DS;
2800 break;
2801 case BFD_RELOC_PPC64_TOC16_LO:
2802 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2803 break;
2804 case BFD_RELOC_PPC64_PLTGOT16:
2805 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2806 break;
2807 case BFD_RELOC_PPC64_PLTGOT16_LO:
2808 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2809 break;
2810 case BFD_RELOC_PPC_DTPREL16:
2811 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2812 break;
2813 case BFD_RELOC_PPC_DTPREL16_LO:
2814 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2815 break;
2816 case BFD_RELOC_PPC_TPREL16:
2817 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2818 break;
2819 case BFD_RELOC_PPC_TPREL16_LO:
2820 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2821 break;
2822 case BFD_RELOC_PPC_GOT_DTPREL16:
2823 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2824 case BFD_RELOC_PPC_GOT_TPREL16:
2825 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2826 break;
2827 default:
2828 as_bad (_("unsupported relocation for DS offset field"));
2829 break;
2830 }
2831 }
0baf16f2
AM		 2832 }
2833
252b5132
RH		 2834 /* We need to generate a fixup for this expression. */
2835 if (fc >= MAX_INSN_FIXUPS)
2836 as_fatal (_("too many fixups"));
2837 fixups[fc].exp = ex;
727fc41e 2838 fixups[fc].opindex = *opindex_ptr;
252b5132
RH		 2839 fixups[fc].reloc = reloc;
2840 ++fc;
2841 }
727fc41e 2842#else /* OBJ_ELF */
252b5132
RH		 2843 else
2844 {
2845 /* We need to generate a fixup for this expression. */
2846 if (fc >= MAX_INSN_FIXUPS)
2847 as_fatal (_("too many fixups"));
2848 fixups[fc].exp = ex;
2849 fixups[fc].opindex = *opindex_ptr;
2850 fixups[fc].reloc = BFD_RELOC_UNUSED;
2851 ++fc;
2852 }
727fc41e 2853#endif /* OBJ_ELF */
252b5132
RH		 2854
2855 if (need_paren)
2856 {
2857 endc = ')';
2858 need_paren = 0;
c3d65c1c
BE		 2859 /* If expecting more operands, then we want to see "),". */
2860 if (*str == endc && opindex_ptr[1] != 0)
2861 {
2862 do
2863 ++str;
2864 while (ISSPACE (*str));
2865 endc = ',';
2866 }
252b5132
RH		 2867 }
2868 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2869 {
2870 endc = '(';
2871 need_paren = 1;
2872 }
2873 else
2874 endc = ',';
2875
2876 /* The call to expression should have advanced str past any
2877 whitespace. */
2878 if (*str != endc
2879 && (endc != ',' || *str != '\0'))
2880 {
2881 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2882 break;
2883 }
2884
2885 if (*str != '\0')
2886 ++str;
2887 }
2888
3882b010 2889 while (ISSPACE (*str))
252b5132
RH		 2890 ++str;
2891
2892 if (*str != '\0')
2893 as_bad (_("junk at end of line: `%s'"), str);
2894
dc1d03fc 2895#ifdef OBJ_ELF
6a0c61b7 2896 /* Do we need/want a APUinfo section? */
ed84b57b 2897 if ((ppc_cpu & PPC_OPCODE_E500MC) != 0)
6a0c61b7
EZ		 2898 {
2899 /* These are all version "1". */
2900 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2901 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2902 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2903 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2904 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2905 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2906 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2907 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2908 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2909 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2910 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2911 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2912 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2913 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2914 }
dc1d03fc 2915#endif
6a0c61b7 2916
252b5132
RH		 2917 /* Write out the instruction. */
2918 f = frag_more (4);
09b935ac
AM		 2919 addr_mod = frag_now_fix () & 3;
2920 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2921 as_bad (_("instruction address is not a multiple of 4"));
2922 frag_now->insn_addr = addr_mod;
2923 frag_now->has_code = 1;
252b5132
RH		 2924 md_number_to_chars (f, insn, 4);
2925
5d6f4f16
GK		 2926#ifdef OBJ_ELF
2927 dwarf2_emit_insn (4);
2928#endif
2929
252b5132
RH		 2930 /* Create any fixups. At this point we do not use a
2931 bfd_reloc_code_real_type, but instead just use the
2932 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2933 handle fixups for any operand type, although that is admittedly
2934 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2935 md_apply_fix. */
252b5132
RH		 2936 for (i = 0; i < fc; i++)
2937 {
252b5132
RH		 2938 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2939 {
99a814a1 2940 reloc_howto_type *reloc_howto;
252b5132
RH		 2941 int size;
2942 int offset;
2943 fixS *fixP;
2944
99a814a1 2945 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2946 if (!reloc_howto)
2947 abort ();
2948
2949 size = bfd_get_reloc_size (reloc_howto);
2950 offset = target_big_endian ? (4 - size) : 0;
2951
2952 if (size < 1 || size > 4)
bc805888 2953 abort ();
252b5132 2954
99a814a1
AM		 2955 fixP = fix_new_exp (frag_now,
2956 f - frag_now->fr_literal + offset,
2957 size,
2958 &fixups[i].exp,
2959 reloc_howto->pc_relative,
252b5132
RH		 2960 fixups[i].reloc);
2961
2962 /* Turn off complaints that the addend is too large for things like
2963 foo+100000@ha. */
2964 switch (fixups[i].reloc)
2965 {
2966 case BFD_RELOC_16_GOTOFF:
2967 case BFD_RELOC_PPC_TOC16:
2968 case BFD_RELOC_LO16:
2969 case BFD_RELOC_HI16:
2970 case BFD_RELOC_HI16_S:
0baf16f2 2971#ifdef OBJ_ELF
0baf16f2
AM		 2972 case BFD_RELOC_PPC64_HIGHER:
2973 case BFD_RELOC_PPC64_HIGHER_S:
2974 case BFD_RELOC_PPC64_HIGHEST:
2975 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2976#endif
252b5132
RH		 2977 fixP->fx_no_overflow = 1;
2978 break;
2979 default:
2980 break;
2981 }
2982 }
2983 else
727fc41e
AM		 2984 {
2985 const struct powerpc_operand *operand;
2986
2987 operand = &powerpc_operands[fixups[i].opindex];
2988 fix_new_exp (frag_now,
2989 f - frag_now->fr_literal,
2990 4,
2991 &fixups[i].exp,
2992 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2993 ((bfd_reloc_code_real_type)
2994 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
2995 }
252b5132
RH		 2996 }
2997}
2998
2999/* Handle a macro. Gather all the operands, transform them as
3000 described by the macro, and call md_assemble recursively. All the
3001 operands are separated by commas; we don't accept parentheses
3002 around operands here. */
3003
3004static void
98027b10 3005ppc_macro (char *str, const struct powerpc_macro *macro)
252b5132
RH		 3006{
3007 char *operands[10];
3008 unsigned int count;
3009 char *s;
3010 unsigned int len;
3011 const char *format;
db557034 3012 unsigned int arg;
252b5132
RH		 3013 char *send;
3014 char *complete;
3015
3016 /* Gather the users operands into the operands array. */
3017 count = 0;
3018 s = str;
3019 while (1)
3020 {
3021 if (count >= sizeof operands / sizeof operands[0])
3022 break;
3023 operands[count++] = s;
3024 s = strchr (s, ',');
3025 if (s == (char *) NULL)
3026 break;
3027 *s++ = '\0';
81d4177b 3028 }
252b5132
RH		 3029
3030 if (count != macro->operands)
3031 {
3032 as_bad (_("wrong number of operands"));
3033 return;
3034 }
3035
3036 /* Work out how large the string must be (the size is unbounded
3037 because it includes user input). */
3038 len = 0;
3039 format = macro->format;
3040 while (*format != '\0')
3041 {
3042 if (*format != '%')
3043 {
3044 ++len;
3045 ++format;
3046 }
3047 else
3048 {
3049 arg = strtol (format + 1, &send, 10);
db557034 3050 know (send != format && arg < count);
252b5132
RH		 3051 len += strlen (operands[arg]);
3052 format = send;
3053 }
3054 }
3055
3056 /* Put the string together. */
3057 complete = s = (char *) alloca (len + 1);
3058 format = macro->format;
3059 while (*format != '\0')
3060 {
3061 if (*format != '%')
3062 *s++ = *format++;
3063 else
3064 {
3065 arg = strtol (format + 1, &send, 10);
3066 strcpy (s, operands[arg]);
3067 s += strlen (s);
3068 format = send;
3069 }
3070 }
3071 *s = '\0';
3072
3073 /* Assemble the constructed instruction. */
3074 md_assemble (complete);
81d4177b 3075}
252b5132
RH		 3076\f
3077#ifdef OBJ_ELF
99a814a1 3078/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132 3079
01e1a5bc 3080bfd_vma
98027b10 3081ppc_section_letter (int letter, char **ptr_msg)
252b5132
RH		 3082{
3083 if (letter == 'e')
3084 return SHF_EXCLUDE;
3085
13ae64f3 3086 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 3087 return -1;
252b5132
RH		 3088}
3089
01e1a5bc 3090bfd_vma
98027b10 3091ppc_section_word (char *str, size_t len)
252b5132 3092{
9de8d8f1
RH		 3093 if (len == 7 && strncmp (str, "exclude", 7) == 0)
3094 return SHF_EXCLUDE;
252b5132 3095
9de8d8f1 3096 return -1;
252b5132
RH		 3097}
3098
3099int
98027b10 3100ppc_section_type (char *str, size_t len)
252b5132 3101{
9de8d8f1
RH		 3102 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3103 return SHT_ORDERED;
252b5132 3104
9de8d8f1 3105 return -1;
252b5132
RH		 3106}
3107
3108int
01e1a5bc 3109ppc_section_flags (flagword flags, bfd_vma attr, int type)
252b5132
RH		 3110{
3111 if (type == SHT_ORDERED)
3112 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3113
3114 if (attr & SHF_EXCLUDE)
3115 flags |= SEC_EXCLUDE;
3116
3117 return flags;
3118}
3119#endif /* OBJ_ELF */
3120
3121\f
3122/* Pseudo-op handling. */
3123
3124/* The .byte pseudo-op. This is similar to the normal .byte
3125 pseudo-op, but it can also take a single ASCII string. */
3126
3127static void
98027b10 3128ppc_byte (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3129{
3130 if (*input_line_pointer != '\"')
3131 {
3132 cons (1);
3133 return;
3134 }
3135
3136 /* Gather characters. A real double quote is doubled. Unusual
3137 characters are not permitted. */
3138 ++input_line_pointer;
3139 while (1)
3140 {
3141 char c;
3142
3143 c = *input_line_pointer++;
3144
3145 if (c == '\"')
3146 {
3147 if (*input_line_pointer != '\"')
3148 break;
3149 ++input_line_pointer;
3150 }
3151
3152 FRAG_APPEND_1_CHAR (c);
3153 }
3154
3155 demand_empty_rest_of_line ();
3156}
3157\f
3158#ifdef OBJ_XCOFF
3159
3160/* XCOFF specific pseudo-op handling. */
3161
3162/* This is set if we are creating a .stabx symbol, since we don't want
3163 to handle symbol suffixes for such symbols. */
b34976b6 3164static bfd_boolean ppc_stab_symbol;
252b5132
RH		 3165
3166/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3167 symbols in the .bss segment as though they were local common
67c1ffbe 3168 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 3169 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 3170
3171static void
98027b10 3172ppc_comm (int lcomm)
252b5132
RH		 3173{
3174 asection *current_seg = now_seg;
3175 subsegT current_subseg = now_subseg;
3176 char *name;
3177 char endc;
3178 char *end_name;
3179 offsetT size;
3180 offsetT align;
3181 symbolS *lcomm_sym = NULL;
3182 symbolS *sym;
3183 char *pfrag;
3184
3185 name = input_line_pointer;
3186 endc = get_symbol_end ();
3187 end_name = input_line_pointer;
3188 *end_name = endc;
3189
3190 if (*input_line_pointer != ',')
3191 {
3192 as_bad (_("missing size"));
3193 ignore_rest_of_line ();
3194 return;
3195 }
3196 ++input_line_pointer;
3197
3198 size = get_absolute_expression ();
3199 if (size < 0)
3200 {
3201 as_bad (_("negative size"));
3202 ignore_rest_of_line ();
3203 return;
3204 }
3205
3206 if (! lcomm)
3207 {
3208 /* The third argument to .comm is the alignment. */
3209 if (*input_line_pointer != ',')
1ad63b2f 3210 align = 2;
252b5132
RH		 3211 else
3212 {
3213 ++input_line_pointer;
3214 align = get_absolute_expression ();
3215 if (align <= 0)
3216 {
3217 as_warn (_("ignoring bad alignment"));
1ad63b2f 3218 align = 2;
252b5132
RH		 3219 }
3220 }
3221 }
3222 else
3223 {
3224 char *lcomm_name;
3225 char lcomm_endc;
3226
1ad63b2f 3227 if (size <= 4)
252b5132
RH		 3228 align = 2;
3229 else
3230 align = 3;
3231
3232 /* The third argument to .lcomm appears to be the real local
3233 common symbol to create. References to the symbol named in
3234 the first argument are turned into references to the third
3235 argument. */
3236 if (*input_line_pointer != ',')
3237 {
3238 as_bad (_("missing real symbol name"));
3239 ignore_rest_of_line ();
3240 return;
3241 }
3242 ++input_line_pointer;
3243
3244 lcomm_name = input_line_pointer;
3245 lcomm_endc = get_symbol_end ();
81d4177b 3246
252b5132
RH		 3247 lcomm_sym = symbol_find_or_make (lcomm_name);
3248
3249 *input_line_pointer = lcomm_endc;
3250 }
3251
3252 *end_name = '\0';
3253 sym = symbol_find_or_make (name);
3254 *end_name = endc;
3255
3256 if (S_IS_DEFINED (sym)
3257 || S_GET_VALUE (sym) != 0)
3258 {
3259 as_bad (_("attempt to redefine symbol"));
3260 ignore_rest_of_line ();
3261 return;
3262 }
81d4177b 3263
252b5132 3264 record_alignment (bss_section, align);
81d4177b 3265
252b5132
RH		 3266 if (! lcomm
3267 || ! S_IS_DEFINED (lcomm_sym))
3268 {
3269 symbolS *def_sym;
3270 offsetT def_size;
3271
3272 if (! lcomm)
3273 {
3274 def_sym = sym;
3275 def_size = size;
3276 S_SET_EXTERNAL (sym);
3277 }
3278 else
3279 {
809ffe0d 3280 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3281 def_sym = lcomm_sym;
3282 def_size = 0;
3283 }
3284
3285 subseg_set (bss_section, 1);
3286 frag_align (align, 0, 0);
81d4177b 3287
809ffe0d 3288 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3289 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3290 def_size, (char *) NULL);
3291 *pfrag = 0;
3292 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3293 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3294 }
3295 else if (lcomm)
3296 {
3297 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3298 symbol_get_frag (lcomm_sym)->fr_offset =
3299 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3300 &~ ((1 << align) - 1));
809ffe0d
ILT		 3301 if (align > symbol_get_tc (lcomm_sym)->align)
3302 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3303 }
3304
3305 if (lcomm)
3306 {
3307 /* Make sym an offset from lcomm_sym. */
3308 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3309 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3310 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3311 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3312 }
3313
3314 subseg_set (current_seg, current_subseg);
3315
3316 demand_empty_rest_of_line ();
3317}
3318
3319/* The .csect pseudo-op. This switches us into a different
3320 subsegment. The first argument is a symbol whose value is the
3321 start of the .csect. In COFF, csect symbols get special aux
3322 entries defined by the x_csect field of union internal_auxent. The
3323 optional second argument is the alignment (the default is 2). */
3324
3325static void
98027b10 3326ppc_csect (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3327{
3328 char *name;
3329 char endc;
3330 symbolS *sym;
931e13a6 3331 offsetT align;
252b5132
RH		 3332
3333 name = input_line_pointer;
3334 endc = get_symbol_end ();
81d4177b 3335
252b5132
RH		 3336 sym = symbol_find_or_make (name);
3337
3338 *input_line_pointer = endc;
3339
3340 if (S_GET_NAME (sym)[0] == '\0')
3341 {
3342 /* An unnamed csect is assumed to be [PR]. */
96d56e9f 3343 symbol_get_tc (sym)->symbol_class = XMC_PR;
252b5132
RH		 3344 }
3345
931e13a6 3346 align = 2;
252b5132
RH		 3347 if (*input_line_pointer == ',')
3348 {
3349 ++input_line_pointer;
931e13a6 3350 align = get_absolute_expression ();
252b5132
RH		 3351 }
3352
931e13a6
AM		 3353 ppc_change_csect (sym, align);
3354
252b5132
RH		 3355 demand_empty_rest_of_line ();
3356}
3357
3358/* Change to a different csect. */
3359
3360static void
98027b10 3361ppc_change_csect (symbolS *sym, offsetT align)
252b5132
RH		 3362{
3363 if (S_IS_DEFINED (sym))
809ffe0d 3364 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3365 else
3366 {
3367 symbolS **list_ptr;
3368 int after_toc;
3369 int hold_chunksize;
3370 symbolS *list;
931e13a6
AM		 3371 int is_code;
3372 segT sec;
252b5132
RH		 3373
3374 /* This is a new csect. We need to look at the symbol class to
3375 figure out whether it should go in the text section or the
3376 data section. */
3377 after_toc = 0;
931e13a6 3378 is_code = 0;
96d56e9f 3379 switch (symbol_get_tc (sym)->symbol_class)
252b5132
RH		 3380 {
3381 case XMC_PR:
3382 case XMC_RO:
3383 case XMC_DB:
3384 case XMC_GL:
3385 case XMC_XO:
3386 case XMC_SV:
3387 case XMC_TI:
3388 case XMC_TB:
3389 S_SET_SEGMENT (sym, text_section);
809ffe0d 3390 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3391 ++ppc_text_subsegment;
3392 list_ptr = &ppc_text_csects;
931e13a6 3393 is_code = 1;
252b5132
RH		 3394 break;
3395 case XMC_RW:
3396 case XMC_TC0:
3397 case XMC_TC:
3398 case XMC_DS:
3399 case XMC_UA:
3400 case XMC_BS:
3401 case XMC_UC:
3402 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3403 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3404 == ppc_data_subsegment))
252b5132
RH		 3405 after_toc = 1;
3406 S_SET_SEGMENT (sym, data_section);
809ffe0d 3407 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3408 ++ppc_data_subsegment;
3409 list_ptr = &ppc_data_csects;
3410 break;
3411 default:
3412 abort ();
3413 }
3414
3415 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3416 changing subsegments, so that we don't use a lot of memory
3417 space for what may be a small section. */
252b5132
RH		 3418 hold_chunksize = chunksize;
3419 chunksize = 64;
3420
931e13a6
AM		 3421 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3422 symbol_get_tc (sym)->subseg);
252b5132
RH		 3423
3424 chunksize = hold_chunksize;
3425
3426 if (after_toc)
3427 ppc_after_toc_frag = frag_now;
3428
931e13a6
AM		 3429 record_alignment (sec, align);
3430 if (is_code)
3431 frag_align_code (align, 0);
3432 else
3433 frag_align (align, 0, 0);
3434
809ffe0d 3435 symbol_set_frag (sym, frag_now);
252b5132
RH		 3436 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3437
931e13a6 3438 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3439 symbol_get_tc (sym)->output = 1;
3440 symbol_get_tc (sym)->within = sym;
81d4177b 3441
252b5132 3442 for (list = *list_ptr;
809ffe0d
ILT		 3443 symbol_get_tc (list)->next != (symbolS *) NULL;
3444 list = symbol_get_tc (list)->next)
252b5132 3445 ;
809ffe0d 3446 symbol_get_tc (list)->next = sym;
81d4177b 3447
252b5132 3448 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3449 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3450 &symbol_lastP);
252b5132
RH		 3451 }
3452
3453 ppc_current_csect = sym;
3454}
3455
3456/* This function handles the .text and .data pseudo-ops. These
3457 pseudo-ops aren't really used by XCOFF; we implement them for the
3458 convenience of people who aren't used to XCOFF. */
3459
3460static void
98027b10 3461ppc_section (int type)
252b5132
RH		 3462{
3463 const char *name;
3464 symbolS *sym;
3465
3466 if (type == 't')
3467 name = ".text[PR]";
3468 else if (type == 'd')
3469 name = ".data[RW]";
3470 else
3471 abort ();
3472
3473 sym = symbol_find_or_make (name);
3474
931e13a6 3475 ppc_change_csect (sym, 2);
252b5132
RH		 3476
3477 demand_empty_rest_of_line ();
3478}
3479
3480/* This function handles the .section pseudo-op. This is mostly to
3481 give an error, since XCOFF only supports .text, .data and .bss, but
3482 we do permit the user to name the text or data section. */
3483
3484static void
98027b10 3485ppc_named_section (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3486{
3487 char *user_name;
3488 const char *real_name;
3489 char c;
3490 symbolS *sym;
3491
3492 user_name = input_line_pointer;
3493 c = get_symbol_end ();
3494
3495 if (strcmp (user_name, ".text") == 0)
3496 real_name = ".text[PR]";
3497 else if (strcmp (user_name, ".data") == 0)
3498 real_name = ".data[RW]";
3499 else
3500 {
3501 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3502 *input_line_pointer = c;
3503 ignore_rest_of_line ();
3504 return;
3505 }
3506
3507 *input_line_pointer = c;
3508
3509 sym = symbol_find_or_make (real_name);
3510
931e13a6 3511 ppc_change_csect (sym, 2);
252b5132
RH		 3512
3513 demand_empty_rest_of_line ();
3514}
3515
3516/* The .extern pseudo-op. We create an undefined symbol. */
3517
3518static void
98027b10 3519ppc_extern (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3520{
3521 char *name;
3522 char endc;
3523
3524 name = input_line_pointer;
3525 endc = get_symbol_end ();
3526
3527 (void) symbol_find_or_make (name);
3528
3529 *input_line_pointer = endc;
3530
3531 demand_empty_rest_of_line ();
3532}
3533
3534/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3535
3536static void
98027b10 3537ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3538{
3539 char *name;
3540 char endc;
3541 symbolS *sym;
3542
3543 name = input_line_pointer;
3544 endc = get_symbol_end ();
3545
3546 sym = symbol_find_or_make (name);
3547
3548 *input_line_pointer = endc;
3549
809ffe0d 3550 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3551
3552 demand_empty_rest_of_line ();
3553}
3554
3555/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3556 although I don't know why it bothers. */
3557
3558static void
98027b10 3559ppc_rename (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3560{
3561 char *name;
3562 char endc;
3563 symbolS *sym;
3564 int len;
3565
3566 name = input_line_pointer;
3567 endc = get_symbol_end ();
3568
3569 sym = symbol_find_or_make (name);
3570
3571 *input_line_pointer = endc;
3572
3573 if (*input_line_pointer != ',')
3574 {
3575 as_bad (_("missing rename string"));
3576 ignore_rest_of_line ();
3577 return;
3578 }
3579 ++input_line_pointer;
3580
809ffe0d 3581 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3582
3583 demand_empty_rest_of_line ();
3584}
3585
3586/* The .stabx pseudo-op. This is similar to a normal .stabs
3587 pseudo-op, but slightly different. A sample is
3588 .stabx "main:F-1",.main,142,0
3589 The first argument is the symbol name to create. The second is the
3590 value, and the third is the storage class. The fourth seems to be
3591 always zero, and I am assuming it is the type. */
3592
3593static void
98027b10 3594ppc_stabx (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3595{
3596 char *name;
3597 int len;
3598 symbolS *sym;
3599 expressionS exp;
3600
3601 name = demand_copy_C_string (&len);
3602
3603 if (*input_line_pointer != ',')
3604 {
3605 as_bad (_("missing value"));
3606 return;
3607 }
3608 ++input_line_pointer;
3609
b34976b6 3610 ppc_stab_symbol = TRUE;
252b5132 3611 sym = symbol_make (name);
b34976b6 3612 ppc_stab_symbol = FALSE;
252b5132 3613
809ffe0d 3614 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3615
3616 (void) expression (&exp);
3617
3618 switch (exp.X_op)
3619 {
3620 case O_illegal:
3621 case O_absent:
3622 case O_big:
3623 as_bad (_("illegal .stabx expression; zero assumed"));
3624 exp.X_add_number = 0;
3625 /* Fall through. */
3626 case O_constant:
3627 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3628 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3629 break;
3630
3631 case O_symbol:
3632 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3633 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3634 else
3635 {
3636 S_SET_VALUE (sym,
3637 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3638 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3639 }
3640 break;
3641
3642 default:
3643 /* The value is some complex expression. This will probably
99a814a1
AM		 3644 fail at some later point, but this is probably the right
3645 thing to do here. */
809ffe0d 3646 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3647 break;
3648 }
3649
3650 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3651 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3652
3653 if (*input_line_pointer != ',')
3654 {
3655 as_bad (_("missing class"));
3656 return;
3657 }
3658 ++input_line_pointer;
3659
3660 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3661
3662 if (*input_line_pointer != ',')
3663 {
3664 as_bad (_("missing type"));
3665 return;
3666 }
3667 ++input_line_pointer;
3668
3669 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3670
809ffe0d 3671 symbol_get_tc (sym)->output = 1;
252b5132 3672
6877bb43 3673 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3674
809ffe0d 3675 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3676
41ea10b1 3677 /* In this case :
99a814a1 3678
41ea10b1
TR		 3679 .bs name
3680 .stabx "z",arrays_,133,0
3681 .es
99a814a1 3682
41ea10b1 3683 .comm arrays_,13768,3
99a814a1 3684
41ea10b1
TR		 3685 resolve_symbol_value will copy the exp's "within" into sym's when the
3686 offset is 0. Since this seems to be corner case problem,
3687 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3688 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3689
3690 if (exp.X_op == O_symbol)
41ea10b1
TR		 3691 {
3692 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3693 }
6877bb43 3694 }
99a814a1 3695
252b5132
RH		 3696 if (exp.X_op != O_symbol
3697 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3698 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3699 ppc_frob_label (sym);
3700 else
3701 {
3702 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3703 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3704 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3705 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3706 }
3707
3708 demand_empty_rest_of_line ();
3709}
3710
3711/* The .function pseudo-op. This takes several arguments. The first
3712 argument seems to be the external name of the symbol. The second
67c1ffbe 3713 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3714 uses the same name for both. I have no idea what the third and
3715 fourth arguments are meant to be. The optional fifth argument is
3716 an expression for the size of the function. In COFF this symbol
3717 gets an aux entry like that used for a csect. */
3718
3719static void
98027b10 3720ppc_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3721{
3722 char *name;
3723 char endc;
3724 char *s;
3725 symbolS *ext_sym;
3726 symbolS *lab_sym;
3727
3728 name = input_line_pointer;
3729 endc = get_symbol_end ();
3730
3731 /* Ignore any [PR] suffix. */
3732 name = ppc_canonicalize_symbol_name (name);
3733 s = strchr (name, '[');
3734 if (s != (char *) NULL
3735 && strcmp (s + 1, "PR]") == 0)
3736 *s = '\0';
3737
3738 ext_sym = symbol_find_or_make (name);
3739
3740 *input_line_pointer = endc;
3741
3742 if (*input_line_pointer != ',')
3743 {
3744 as_bad (_("missing symbol name"));
3745 ignore_rest_of_line ();
3746 return;
3747 }
3748 ++input_line_pointer;
3749
3750 name = input_line_pointer;
3751 endc = get_symbol_end ();
3752
3753 lab_sym = symbol_find_or_make (name);
3754
3755 *input_line_pointer = endc;
3756
3757 if (ext_sym != lab_sym)
3758 {
809ffe0d
ILT		 3759 expressionS exp;
3760
3761 exp.X_op = O_symbol;
3762 exp.X_add_symbol = lab_sym;
3763 exp.X_op_symbol = NULL;
3764 exp.X_add_number = 0;
3765 exp.X_unsigned = 0;
3766 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3767 }
3768
96d56e9f
NC		 3769 if (symbol_get_tc (ext_sym)->symbol_class == -1)
3770 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
809ffe0d 3771 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3772
3773 if (*input_line_pointer == ',')
3774 {
3775 expressionS ignore;
3776
3777 /* Ignore the third argument. */
3778 ++input_line_pointer;
3779 expression (&ignore);
3780 if (*input_line_pointer == ',')
3781 {
3782 /* Ignore the fourth argument. */
3783 ++input_line_pointer;
3784 expression (&ignore);
3785 if (*input_line_pointer == ',')
3786 {
3787 /* The fifth argument is the function size. */
3788 ++input_line_pointer;
809ffe0d
ILT		 3789 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3790 absolute_section,
3791 (valueT) 0,
3792 &zero_address_frag);
3793 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3794 }
3795 }
3796 }
3797
3798 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3799 SF_SET_FUNCTION (ext_sym);
3800 SF_SET_PROCESS (ext_sym);
3801 coff_add_linesym (ext_sym);
3802
3803 demand_empty_rest_of_line ();
3804}
3805
3806/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3807 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3808 with the correct line number */
5d6255fe 3809
8642cce8 3810static symbolS *saved_bi_sym = 0;
252b5132
RH		 3811
3812static void
98027b10 3813ppc_bf (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3814{
3815 symbolS *sym;
3816
3817 sym = symbol_make (".bf");
3818 S_SET_SEGMENT (sym, text_section);
809ffe0d 3819 symbol_set_frag (sym, frag_now);
252b5132
RH		 3820 S_SET_VALUE (sym, frag_now_fix ());
3821 S_SET_STORAGE_CLASS (sym, C_FCN);
3822
3823 coff_line_base = get_absolute_expression ();
3824
3825 S_SET_NUMBER_AUXILIARY (sym, 1);
3826 SA_SET_SYM_LNNO (sym, coff_line_base);
3827
8642cce8 3828 /* Line number for bi. */
5d6255fe 3829 if (saved_bi_sym)
8642cce8
TR		 3830 {
3831 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3832 saved_bi_sym = 0;
3833 }
5d6255fe 3834
8642cce8 3835
809ffe0d 3836 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3837
3838 ppc_frob_label (sym);
3839
3840 demand_empty_rest_of_line ();
3841}
3842
3843/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3844 ".ef", except that the line number is absolute, not relative to the
3845 most recent ".bf" symbol. */
3846
3847static void
98027b10 3848ppc_ef (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3849{
3850 symbolS *sym;
3851
3852 sym = symbol_make (".ef");
3853 S_SET_SEGMENT (sym, text_section);
809ffe0d 3854 symbol_set_frag (sym, frag_now);
252b5132
RH		 3855 S_SET_VALUE (sym, frag_now_fix ());
3856 S_SET_STORAGE_CLASS (sym, C_FCN);
3857 S_SET_NUMBER_AUXILIARY (sym, 1);
3858 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3859 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3860
3861 ppc_frob_label (sym);
3862
3863 demand_empty_rest_of_line ();
3864}
3865
3866/* The .bi and .ei pseudo-ops. These take a string argument and
3867 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3868 the symbol list. The value of .bi will be know when the next .bf
3869 is encountered. */
252b5132
RH		 3870
3871static void
98027b10 3872ppc_biei (int ei)
252b5132
RH		 3873{
3874 static symbolS *last_biei;
3875
3876 char *name;
3877 int len;
3878 symbolS *sym;
3879 symbolS *look;
3880
3881 name = demand_copy_C_string (&len);
3882
3883 /* The value of these symbols is actually file offset. Here we set
3884 the value to the index into the line number entries. In
3885 ppc_frob_symbols we set the fix_line field, which will cause BFD
3886 to do the right thing. */
3887
3888 sym = symbol_make (name);
3889 /* obj-coff.c currently only handles line numbers correctly in the
3890 .text section. */
3891 S_SET_SEGMENT (sym, text_section);
3892 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3893 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3894
3895 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3896 symbol_get_tc (sym)->output = 1;
81d4177b 3897
8642cce8 3898 /* Save bi. */
5d6255fe 3899 if (ei)
8642cce8
TR		 3900 saved_bi_sym = 0;
3901 else
3902 saved_bi_sym = sym;
3903
252b5132
RH		 3904 for (look = last_biei ? last_biei : symbol_rootP;
3905 (look != (symbolS *) NULL
3906 && (S_GET_STORAGE_CLASS (look) == C_FILE
3907 || S_GET_STORAGE_CLASS (look) == C_BINCL
3908 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3909 look = symbol_next (look))
3910 ;
3911 if (look != (symbolS *) NULL)
3912 {
3913 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3914 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3915 last_biei = sym;
3916 }
3917
3918 demand_empty_rest_of_line ();
3919}
3920
3921/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3922 There is one argument, which is a csect symbol. The value of the
3923 .bs symbol is the index of this csect symbol. */
3924
3925static void
98027b10 3926ppc_bs (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3927{
3928 char *name;
3929 char endc;
3930 symbolS *csect;
3931 symbolS *sym;
3932
3933 if (ppc_current_block != NULL)
3934 as_bad (_("nested .bs blocks"));
3935
3936 name = input_line_pointer;
3937 endc = get_symbol_end ();
3938
3939 csect = symbol_find_or_make (name);
3940
3941 *input_line_pointer = endc;
3942
3943 sym = symbol_make (".bs");
3944 S_SET_SEGMENT (sym, now_seg);
3945 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3946 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3947 symbol_get_tc (sym)->output = 1;
252b5132 3948
809ffe0d 3949 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3950
3951 ppc_frob_label (sym);
3952
3953 ppc_current_block = sym;
3954
3955 demand_empty_rest_of_line ();
3956}
3957
3958/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3959
3960static void
98027b10 3961ppc_es (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3962{
3963 symbolS *sym;
3964
3965 if (ppc_current_block == NULL)
3966 as_bad (_(".es without preceding .bs"));
3967
3968 sym = symbol_make (".es");
3969 S_SET_SEGMENT (sym, now_seg);
3970 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3971 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3972 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3973
3974 ppc_frob_label (sym);
3975
3976 ppc_current_block = NULL;
3977
3978 demand_empty_rest_of_line ();
3979}
3980
3981/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3982 line number. */
3983
3984static void
98027b10 3985ppc_bb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 3986{
3987 symbolS *sym;
3988
3989 sym = symbol_make (".bb");
3990 S_SET_SEGMENT (sym, text_section);
809ffe0d 3991 symbol_set_frag (sym, frag_now);
252b5132
RH		 3992 S_SET_VALUE (sym, frag_now_fix ());
3993 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3994
3995 S_SET_NUMBER_AUXILIARY (sym, 1);
3996 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3997
809ffe0d 3998 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3999
4000 SF_SET_PROCESS (sym);
4001
4002 ppc_frob_label (sym);
4003
4004 demand_empty_rest_of_line ();
4005}
4006
4007/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4008 line number. */
4009
4010static void
98027b10 4011ppc_eb (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4012{
4013 symbolS *sym;
4014
4015 sym = symbol_make (".eb");
4016 S_SET_SEGMENT (sym, text_section);
809ffe0d 4017 symbol_set_frag (sym, frag_now);
252b5132
RH		 4018 S_SET_VALUE (sym, frag_now_fix ());
4019 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4020 S_SET_NUMBER_AUXILIARY (sym, 1);
4021 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 4022 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4023
4024 SF_SET_PROCESS (sym);
4025
4026 ppc_frob_label (sym);
4027
4028 demand_empty_rest_of_line ();
4029}
4030
4031/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4032 specified name. */
4033
4034static void
98027b10 4035ppc_bc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4036{
4037 char *name;
4038 int len;
4039 symbolS *sym;
4040
4041 name = demand_copy_C_string (&len);
4042 sym = symbol_make (name);
4043 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4044 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4045 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4046 S_SET_VALUE (sym, 0);
809ffe0d 4047 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4048
4049 ppc_frob_label (sym);
4050
4051 demand_empty_rest_of_line ();
4052}
4053
4054/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4055
4056static void
98027b10 4057ppc_ec (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4058{
4059 symbolS *sym;
4060
4061 sym = symbol_make (".ec");
4062 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 4063 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 4064 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4065 S_SET_VALUE (sym, 0);
809ffe0d 4066 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4067
4068 ppc_frob_label (sym);
4069
4070 demand_empty_rest_of_line ();
4071}
4072
4073/* The .toc pseudo-op. Switch to the .toc subsegment. */
4074
4075static void
98027b10 4076ppc_toc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4077{
4078 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 4079 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 4080 else
4081 {
4082 subsegT subseg;
4083 symbolS *sym;
4084 symbolS *list;
81d4177b 4085
252b5132
RH		 4086 subseg = ppc_data_subsegment;
4087 ++ppc_data_subsegment;
4088
4089 subseg_new (segment_name (data_section), subseg);
4090 ppc_toc_frag = frag_now;
4091
4092 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 4093 symbol_set_frag (sym, frag_now);
252b5132
RH		 4094 S_SET_SEGMENT (sym, data_section);
4095 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 4096 symbol_get_tc (sym)->subseg = subseg;
4097 symbol_get_tc (sym)->output = 1;
4098 symbol_get_tc (sym)->within = sym;
252b5132
RH		 4099
4100 ppc_toc_csect = sym;
81d4177b 4101
252b5132 4102 for (list = ppc_data_csects;
809ffe0d
ILT		 4103 symbol_get_tc (list)->next != (symbolS *) NULL;
4104 list = symbol_get_tc (list)->next)
252b5132 4105 ;
809ffe0d 4106 symbol_get_tc (list)->next = sym;
252b5132
RH		 4107
4108 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4109 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4110 &symbol_lastP);
252b5132
RH		 4111 }
4112
4113 ppc_current_csect = ppc_toc_csect;
4114
4115 demand_empty_rest_of_line ();
4116}
4117
4118/* The AIX assembler automatically aligns the operands of a .long or
4119 .short pseudo-op, and we want to be compatible. */
4120
4121static void
98027b10 4122ppc_xcoff_cons (int log_size)
252b5132
RH		 4123{
4124 frag_align (log_size, 0, 0);
4125 record_alignment (now_seg, log_size);
4126 cons (1 << log_size);
4127}
4128
4129static void
98027b10 4130ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
252b5132
RH		 4131{
4132 expressionS exp;
4133 int byte_count;
4134
4135 (void) expression (&exp);
4136
4137 if (exp.X_op != O_constant)
4138 {
4139 as_bad (_("non-constant byte count"));
4140 return;
4141 }
4142
4143 byte_count = exp.X_add_number;
4144
4145 if (*input_line_pointer != ',')
4146 {
4147 as_bad (_("missing value"));
4148 return;
4149 }
4150
4151 ++input_line_pointer;
4152 cons (byte_count);
4153}
4154
4155#endif /* OBJ_XCOFF */
0baf16f2 4156#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 4157\f
4158/* The .tc pseudo-op. This is used when generating either XCOFF or
4159 ELF. This takes two or more arguments.
4160
4161 When generating XCOFF output, the first argument is the name to
4162 give to this location in the toc; this will be a symbol with class
0baf16f2 4163 TC. The rest of the arguments are N-byte values to actually put at
252b5132 4164 this location in the TOC; often there is just one more argument, a
1049f94e 4165 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 4166 depends on target word size. A 32-bit target uses 4-byte values, a
4167 64-bit target uses 8-byte values.
252b5132
RH		 4168
4169 When not generating XCOFF output, the arguments are the same, but
4170 the first argument is simply ignored. */
4171
4172static void
98027b10 4173ppc_tc (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4174{
4175#ifdef OBJ_XCOFF
4176
4177 /* Define the TOC symbol name. */
4178 {
4179 char *name;
4180 char endc;
4181 symbolS *sym;
4182
4183 if (ppc_toc_csect == (symbolS *) NULL
4184 || ppc_toc_csect != ppc_current_csect)
4185 {
4186 as_bad (_(".tc not in .toc section"));
4187 ignore_rest_of_line ();
4188 return;
4189 }
4190
4191 name = input_line_pointer;
4192 endc = get_symbol_end ();
4193
4194 sym = symbol_find_or_make (name);
4195
4196 *input_line_pointer = endc;
4197
4198 if (S_IS_DEFINED (sym))
4199 {
4200 symbolS *label;
4201
809ffe0d 4202 label = symbol_get_tc (ppc_current_csect)->within;
96d56e9f 4203 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
252b5132
RH		 4204 {
4205 as_bad (_(".tc with no label"));
4206 ignore_rest_of_line ();
4207 return;
4208 }
4209
4210 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 4211 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 4212 S_SET_VALUE (label, S_GET_VALUE (sym));
4213
4214 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4215 ++input_line_pointer;
4216
4217 return;
4218 }
4219
4220 S_SET_SEGMENT (sym, now_seg);
809ffe0d 4221 symbol_set_frag (sym, frag_now);
252b5132 4222 S_SET_VALUE (sym, (valueT) frag_now_fix ());
96d56e9f 4223 symbol_get_tc (sym)->symbol_class = XMC_TC;
809ffe0d 4224 symbol_get_tc (sym)->output = 1;
252b5132
RH		 4225
4226 ppc_frob_label (sym);
4227 }
4228
0baf16f2
AM		 4229#endif /* OBJ_XCOFF */
4230#ifdef OBJ_ELF
9c7977b3 4231 int align;
252b5132
RH		 4232
4233 /* Skip the TOC symbol name. */
4234 while (is_part_of_name (*input_line_pointer)
d13d4015 4235 || *input_line_pointer == ' '
252b5132
RH		 4236 || *input_line_pointer == '['
4237 || *input_line_pointer == ']'
4238 || *input_line_pointer == '{'
4239 || *input_line_pointer == '}')
4240 ++input_line_pointer;
4241
0baf16f2 4242 /* Align to a four/eight byte boundary. */
2b3c4602 4243 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4244 frag_align (align, 0, 0);
4245 record_alignment (now_seg, align);
0baf16f2 4246#endif /* OBJ_ELF */
252b5132
RH		 4247
4248 if (*input_line_pointer != ',')
4249 demand_empty_rest_of_line ();
4250 else
4251 {
4252 ++input_line_pointer;
2b3c4602 4253 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4254 }
4255}
0baf16f2
AM		 4256
4257/* Pseudo-op .machine. */
0baf16f2
AM		 4258
4259static void
98027b10 4260ppc_machine (int ignore ATTRIBUTE_UNUSED)
0baf16f2 4261{
69c040df
AM		 4262 char *cpu_string;
4263#define MAX_HISTORY 100
fa452fa6 4264 static ppc_cpu_t *cpu_history;
69c040df
AM		 4265 static int curr_hist;
4266
4267 SKIP_WHITESPACE ();
4268
4269 if (*input_line_pointer == '"')
4270 {
4271 int len;
4272 cpu_string = demand_copy_C_string (&len);
4273 }
4274 else
4275 {
4276 char c;
4277 cpu_string = input_line_pointer;
4278 c = get_symbol_end ();
4279 cpu_string = xstrdup (cpu_string);
4280 *input_line_pointer = c;
4281 }
4282
4283 if (cpu_string != NULL)
4284 {
fa452fa6 4285 ppc_cpu_t old_cpu = ppc_cpu;
69fe9ce5 4286 ppc_cpu_t new_cpu;
69c040df
AM		 4287 char *p;
4288
4289 for (p = cpu_string; *p != 0; p++)
4290 *p = TOLOWER (*p);
4291
4292 if (strcmp (cpu_string, "push") == 0)
4293 {
4294 if (cpu_history == NULL)
4295 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4296
4297 if (curr_hist >= MAX_HISTORY)
4298 as_bad (_(".machine stack overflow"));
4299 else
4300 cpu_history[curr_hist++] = ppc_cpu;
4301 }
4302 else if (strcmp (cpu_string, "pop") == 0)
4303 {
4304 if (curr_hist <= 0)
4305 as_bad (_(".machine stack underflow"));
4306 else
4307 ppc_cpu = cpu_history[--curr_hist];
4308 }
69fe9ce5
AM		 4309 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0)
4310 ppc_cpu = new_cpu;
69c040df
AM		 4311 else
4312 as_bad (_("invalid machine `%s'"), cpu_string);
4313
4314 if (ppc_cpu != old_cpu)
4315 ppc_setup_opcodes ();
4316 }
4317
4318 demand_empty_rest_of_line ();
0baf16f2
AM		 4319}
4320
4321/* See whether a symbol is in the TOC section. */
4322
4323static int
98027b10 4324ppc_is_toc_sym (symbolS *sym)
0baf16f2
AM		 4325{
4326#ifdef OBJ_XCOFF
96d56e9f 4327 return symbol_get_tc (sym)->symbol_class == XMC_TC;
0baf16f2
AM		 4328#endif
4329#ifdef OBJ_ELF
4330 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4331 if (ppc_obj64)
0baf16f2
AM		 4332 return strcmp (sname, ".toc") == 0;
4333 else
4334 return strcmp (sname, ".got") == 0;
4335#endif
4336}
4337#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4338\f
4339#ifdef TE_PE
4340
99a814a1 4341/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4342
4343/* Set the current section. */
4344static void
98027b10 4345ppc_set_current_section (segT new)
252b5132
RH		 4346{
4347 ppc_previous_section = ppc_current_section;
4348 ppc_current_section = new;
4349}
4350
4351/* pseudo-op: .previous
4352 behaviour: toggles the current section with the previous section.
4353 errors: None
99a814a1
AM		 4354 warnings: "No previous section" */
4355
252b5132 4356static void
98027b10 4357ppc_previous (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4358{
4359 symbolS *tmp;
4360
81d4177b 4361 if (ppc_previous_section == NULL)
252b5132 4362 {
99a814a1 4363 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4364 return;
4365 }
4366
99a814a1 4367 subseg_set (ppc_previous_section, 0);
252b5132 4368
99a814a1 4369 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4370}
4371
4372/* pseudo-op: .pdata
4373 behaviour: predefined read only data section
b34976b6 4374 double word aligned
252b5132
RH		 4375 errors: None
4376 warnings: None
4377 initial: .section .pdata "adr3"
b34976b6 4378 a - don't know -- maybe a misprint
252b5132
RH		 4379 d - initialized data
4380 r - readable
4381 3 - double word aligned (that would be 4 byte boundary)
4382
4383 commentary:
4384 Tag index tables (also known as the function table) for exception
99a814a1 4385 handling, debugging, etc. */
252b5132 4386
252b5132 4387static void
98027b10 4388ppc_pdata (int ignore ATTRIBUTE_UNUSED)
252b5132 4389{
81d4177b 4390 if (pdata_section == 0)
252b5132
RH		 4391 {
4392 pdata_section = subseg_new (".pdata", 0);
81d4177b 4393
252b5132
RH		 4394 bfd_set_section_flags (stdoutput, pdata_section,
4395 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4396 | SEC_READONLY | SEC_DATA ));
81d4177b 4397
252b5132
RH		 4398 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4399 }
4400 else
4401 {
99a814a1 4402 pdata_section = subseg_new (".pdata", 0);
252b5132 4403 }
99a814a1 4404 ppc_set_current_section (pdata_section);
252b5132
RH		 4405}
4406
4407/* pseudo-op: .ydata
4408 behaviour: predefined read only data section
b34976b6 4409 double word aligned
252b5132
RH		 4410 errors: None
4411 warnings: None
4412 initial: .section .ydata "drw3"
b34976b6 4413 a - don't know -- maybe a misprint
252b5132
RH		 4414 d - initialized data
4415 r - readable
4416 3 - double word aligned (that would be 4 byte boundary)
4417 commentary:
4418 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4419 debugging, etc. */
4420
252b5132 4421static void
98027b10 4422ppc_ydata (int ignore ATTRIBUTE_UNUSED)
252b5132 4423{
81d4177b 4424 if (ydata_section == 0)
252b5132
RH		 4425 {
4426 ydata_section = subseg_new (".ydata", 0);
4427 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4428 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4429 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4430
4431 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4432 }
4433 else
4434 {
4435 ydata_section = subseg_new (".ydata", 0);
4436 }
99a814a1 4437 ppc_set_current_section (ydata_section);
252b5132
RH		 4438}
4439
4440/* pseudo-op: .reldata
4441 behaviour: predefined read write data section
b34976b6 4442 double word aligned (4-byte)
252b5132
RH		 4443 FIXME: relocation is applied to it
4444 FIXME: what's the difference between this and .data?
4445 errors: None
4446 warnings: None
4447 initial: .section .reldata "drw3"
4448 d - initialized data
4449 r - readable
4450 w - writeable
4451 3 - double word aligned (that would be 8 byte boundary)
4452
4453 commentary:
4454 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4455 function descriptors, etc. */
4456
252b5132 4457static void
98027b10 4458ppc_reldata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4459{
4460 if (reldata_section == 0)
4461 {
4462 reldata_section = subseg_new (".reldata", 0);
4463
4464 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4465 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4466 | SEC_DATA));
252b5132
RH		 4467
4468 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4469 }
4470 else
4471 {
4472 reldata_section = subseg_new (".reldata", 0);
4473 }
99a814a1 4474 ppc_set_current_section (reldata_section);
252b5132
RH		 4475}
4476
4477/* pseudo-op: .rdata
4478 behaviour: predefined read only data section
b34976b6 4479 double word aligned
252b5132
RH		 4480 errors: None
4481 warnings: None
4482 initial: .section .rdata "dr3"
4483 d - initialized data
4484 r - readable
99a814a1
AM		 4485 3 - double word aligned (that would be 4 byte boundary) */
4486
252b5132 4487static void
98027b10 4488ppc_rdata (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4489{
4490 if (rdata_section == 0)
4491 {
4492 rdata_section = subseg_new (".rdata", 0);
4493 bfd_set_section_flags (stdoutput, rdata_section,
4494 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4495 | SEC_READONLY | SEC_DATA ));
4496
4497 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4498 }
4499 else
4500 {
4501 rdata_section = subseg_new (".rdata", 0);
4502 }
99a814a1 4503 ppc_set_current_section (rdata_section);
252b5132
RH		 4504}
4505
4506/* pseudo-op: .ualong
81d4177b 4507 behaviour: much like .int, with the exception that no alignment is
b34976b6 4508 performed.
252b5132
RH		 4509 FIXME: test the alignment statement
4510 errors: None
99a814a1
AM		 4511 warnings: None */
4512
252b5132 4513static void
98027b10 4514ppc_ualong (int ignore ATTRIBUTE_UNUSED)
252b5132 4515{
99a814a1
AM		 4516 /* Try for long. */
4517 cons (4);
252b5132
RH		 4518}
4519
4520/* pseudo-op: .znop <symbol name>
4521 behaviour: Issue a nop instruction
b34976b6 4522 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4523 the supplied symbol name.
4524 errors: None
99a814a1
AM		 4525 warnings: Missing symbol name */
4526
252b5132 4527static void
98027b10 4528ppc_znop (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4529{
4530 unsigned long insn;
4531 const struct powerpc_opcode *opcode;
4532 expressionS ex;
4533 char *f;
252b5132 4534 symbolS *sym;
252b5132
RH		 4535 char *symbol_name;
4536 char c;
4537 char *name;
4538 unsigned int exp;
4539 flagword flags;
4540 asection *sec;
4541
99a814a1 4542 /* Strip out the symbol name. */
252b5132
RH		 4543 symbol_name = input_line_pointer;
4544 c = get_symbol_end ();
4545
4546 name = xmalloc (input_line_pointer - symbol_name + 1);
4547 strcpy (name, symbol_name);
4548
4549 sym = symbol_find_or_make (name);
4550
4551 *input_line_pointer = c;
4552
4553 SKIP_WHITESPACE ();
4554
4555 /* Look up the opcode in the hash table. */
4556 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4557
99a814a1 4558 /* Stick in the nop. */
252b5132
RH		 4559 insn = opcode->opcode;
4560
4561 /* Write out the instruction. */
4562 f = frag_more (4);
4563 md_number_to_chars (f, insn, 4);
4564 fix_new (frag_now,
4565 f - frag_now->fr_literal,
4566 4,
4567 sym,
4568 0,
4569 0,
4570 BFD_RELOC_16_GOT_PCREL);
4571
4572}
4573
81d4177b
KH		 4574/* pseudo-op:
4575 behaviour:
4576 errors:
99a814a1
AM		 4577 warnings: */
4578
252b5132 4579static void
98027b10 4580ppc_pe_comm (int lcomm)
252b5132 4581{
98027b10
AM		 4582 char *name;
4583 char c;
4584 char *p;
252b5132 4585 offsetT temp;
98027b10 4586 symbolS *symbolP;
252b5132
RH		 4587 offsetT align;
4588
4589 name = input_line_pointer;
4590 c = get_symbol_end ();
4591
99a814a1 4592 /* just after name is now '\0'. */
252b5132
RH		 4593 p = input_line_pointer;
4594 *p = c;
4595 SKIP_WHITESPACE ();
4596 if (*input_line_pointer != ',')
4597 {
4598 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4599 ignore_rest_of_line ();
4600 return;
4601 }
4602
4603 input_line_pointer++; /* skip ',' */
4604 if ((temp = get_absolute_expression ()) < 0)
4605 {
4606 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4607 ignore_rest_of_line ();
4608 return;
4609 }
4610
4611 if (! lcomm)
4612 {
4613 /* The third argument to .comm is the alignment. */
4614 if (*input_line_pointer != ',')
4615 align = 3;
4616 else
4617 {
4618 ++input_line_pointer;
4619 align = get_absolute_expression ();
4620 if (align <= 0)
4621 {
4622 as_warn (_("ignoring bad alignment"));
4623 align = 3;
4624 }
4625 }
4626 }
4627
4628 *p = 0;
4629 symbolP = symbol_find_or_make (name);
4630
4631 *p = c;
4632 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4633 {
4634 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4635 S_GET_NAME (symbolP));
4636 ignore_rest_of_line ();
4637 return;
4638 }
4639
4640 if (S_GET_VALUE (symbolP))
4641 {
4642 if (S_GET_VALUE (symbolP) != (valueT) temp)
4643 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4644 S_GET_NAME (symbolP),
4645 (long) S_GET_VALUE (symbolP),
4646 (long) temp);
4647 }
4648 else
4649 {
4650 S_SET_VALUE (symbolP, (valueT) temp);
4651 S_SET_EXTERNAL (symbolP);
86ebace2 4652 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
252b5132
RH		 4653 }
4654
4655 demand_empty_rest_of_line ();
4656}
4657
4658/*
4659 * implement the .section pseudo op:
4660 * .section name {, "flags"}
4661 * ^ ^
4662 * | +--- optional flags: 'b' for bss
4663 * | 'i' for info
4664 * +-- section name 'l' for lib
4665 * 'n' for noload
4666 * 'o' for over
4667 * 'w' for data
4668 * 'd' (apparently m88k for data)
4669 * 'x' for text
4670 * But if the argument is not a quoted string, treat it as a
4671 * subsegment number.
4672 *
4673 * FIXME: this is a copy of the section processing from obj-coff.c, with
4674 * additions/changes for the moto-pas assembler support. There are three
4675 * categories:
4676 *
81d4177b 4677 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4678 * setting bits that bfd probably neither understands or uses. The
4679 * correct approach (?) will have to incorporate extra fields attached
4680 * to the section to hold the system specific stuff. (krk)
4681 *
4682 * Section Contents:
4683 * 'a' - unknown - referred to in documentation, but no definition supplied
4684 * 'c' - section has code
4685 * 'd' - section has initialized data
4686 * 'u' - section has uninitialized data
4687 * 'i' - section contains directives (info)
4688 * 'n' - section can be discarded
4689 * 'R' - remove section at link time
4690 *
4691 * Section Protection:
4692 * 'r' - section is readable
4693 * 'w' - section is writeable
4694 * 'x' - section is executable
4695 * 's' - section is sharable
4696 *
4697 * Section Alignment:
4698 * '0' - align to byte boundary
4699 * '1' - align to halfword undary
4700 * '2' - align to word boundary
4701 * '3' - align to doubleword boundary
4702 * '4' - align to quadword boundary
4703 * '5' - align to 32 byte boundary
4704 * '6' - align to 64 byte boundary
4705 *
4706 */
4707
4708void
98027b10 4709ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
252b5132 4710{
99a814a1 4711 /* Strip out the section name. */
252b5132
RH		 4712 char *section_name;
4713 char c;
4714 char *name;
4715 unsigned int exp;
4716 flagword flags;
4717 segT sec;
4718 int align;
4719
4720 section_name = input_line_pointer;
4721 c = get_symbol_end ();
4722
4723 name = xmalloc (input_line_pointer - section_name + 1);
4724 strcpy (name, section_name);
4725
4726 *input_line_pointer = c;
4727
4728 SKIP_WHITESPACE ();
4729
4730 exp = 0;
4731 flags = SEC_NO_FLAGS;
4732
4733 if (strcmp (name, ".idata$2") == 0)
4734 {
4735 align = 0;
4736 }
4737 else if (strcmp (name, ".idata$3") == 0)
4738 {
4739 align = 0;
4740 }
4741 else if (strcmp (name, ".idata$4") == 0)
4742 {
4743 align = 2;
4744 }
4745 else if (strcmp (name, ".idata$5") == 0)
4746 {
4747 align = 2;
4748 }
4749 else if (strcmp (name, ".idata$6") == 0)
4750 {
4751 align = 1;
4752 }
4753 else
99a814a1
AM		 4754 /* Default alignment to 16 byte boundary. */
4755 align = 4;
252b5132
RH		 4756
4757 if (*input_line_pointer == ',')
4758 {
4759 ++input_line_pointer;
4760 SKIP_WHITESPACE ();
4761 if (*input_line_pointer != '"')
4762 exp = get_absolute_expression ();
4763 else
4764 {
4765 ++input_line_pointer;
4766 while (*input_line_pointer != '"'
4767 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4768 {
4769 switch (*input_line_pointer)
4770 {
4771 /* Section Contents */
4772 case 'a': /* unknown */
4773 as_bad (_("Unsupported section attribute -- 'a'"));
4774 break;
4775 case 'c': /* code section */
81d4177b 4776 flags |= SEC_CODE;
252b5132
RH		 4777 break;
4778 case 'd': /* section has initialized data */
4779 flags |= SEC_DATA;
4780 break;
4781 case 'u': /* section has uninitialized data */
4782 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4783 in winnt.h */
4784 flags |= SEC_ROM;
4785 break;
4786 case 'i': /* section contains directives (info) */
4787 /* FIXME: This is IMAGE_SCN_LNK_INFO
4788 in winnt.h */
4789 flags |= SEC_HAS_CONTENTS;
4790 break;
4791 case 'n': /* section can be discarded */
81d4177b 4792 flags &=~ SEC_LOAD;
252b5132
RH		 4793 break;
4794 case 'R': /* Remove section at link time */
4795 flags |= SEC_NEVER_LOAD;
4796 break;
8d452c78 4797#if IFLICT_BRAIN_DAMAGE
252b5132
RH		 4798 /* Section Protection */
4799 case 'r': /* section is readable */
4800 flags |= IMAGE_SCN_MEM_READ;
4801 break;
4802 case 'w': /* section is writeable */
4803 flags |= IMAGE_SCN_MEM_WRITE;
4804 break;
4805 case 'x': /* section is executable */
4806 flags |= IMAGE_SCN_MEM_EXECUTE;
4807 break;
4808 case 's': /* section is sharable */
4809 flags |= IMAGE_SCN_MEM_SHARED;
4810 break;
4811
4812 /* Section Alignment */
4813 case '0': /* align to byte boundary */
4814 flags |= IMAGE_SCN_ALIGN_1BYTES;
4815 align = 0;
4816 break;
4817 case '1': /* align to halfword boundary */
4818 flags |= IMAGE_SCN_ALIGN_2BYTES;
4819 align = 1;
4820 break;
4821 case '2': /* align to word boundary */
4822 flags |= IMAGE_SCN_ALIGN_4BYTES;
4823 align = 2;
4824 break;
4825 case '3': /* align to doubleword boundary */
4826 flags |= IMAGE_SCN_ALIGN_8BYTES;
4827 align = 3;
4828 break;
4829 case '4': /* align to quadword boundary */
4830 flags |= IMAGE_SCN_ALIGN_16BYTES;
4831 align = 4;
4832 break;
4833 case '5': /* align to 32 byte boundary */
4834 flags |= IMAGE_SCN_ALIGN_32BYTES;
4835 align = 5;
4836 break;
4837 case '6': /* align to 64 byte boundary */
4838 flags |= IMAGE_SCN_ALIGN_64BYTES;
4839 align = 6;
4840 break;
8d452c78 4841#endif
252b5132 4842 default:
99a814a1
AM		 4843 as_bad (_("unknown section attribute '%c'"),
4844 *input_line_pointer);
252b5132
RH		 4845 break;
4846 }
4847 ++input_line_pointer;
4848 }
4849 if (*input_line_pointer == '"')
4850 ++input_line_pointer;
4851 }
4852 }
4853
4854 sec = subseg_new (name, (subsegT) exp);
4855
99a814a1 4856 ppc_set_current_section (sec);
252b5132
RH		 4857
4858 if (flags != SEC_NO_FLAGS)
4859 {
4860 if (! bfd_set_section_flags (stdoutput, sec, flags))
4861 as_bad (_("error setting flags for \"%s\": %s"),
4862 bfd_section_name (stdoutput, sec),
4863 bfd_errmsg (bfd_get_error ()));
4864 }
4865
99a814a1 4866 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4867}
4868
4869static void
98027b10 4870ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4871{
4872 char *name;
4873 char endc;
4874 symbolS *ext_sym;
4875
4876 name = input_line_pointer;
4877 endc = get_symbol_end ();
4878
4879 ext_sym = symbol_find_or_make (name);
4880
4881 *input_line_pointer = endc;
4882
4883 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4884 SF_SET_FUNCTION (ext_sym);
4885 SF_SET_PROCESS (ext_sym);
4886 coff_add_linesym (ext_sym);
4887
4888 demand_empty_rest_of_line ();
4889}
4890
4891static void
98027b10 4892ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
252b5132
RH		 4893{
4894 if (tocdata_section == 0)
4895 {
4896 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4897 /* FIXME: section flags won't work. */
252b5132
RH		 4898 bfd_set_section_flags (stdoutput, tocdata_section,
4899 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4900 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4901
4902 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4903 }
4904 else
4905 {
4906 rdata_section = subseg_new (".tocd", 0);
4907 }
4908
99a814a1 4909 ppc_set_current_section (tocdata_section);
252b5132
RH		 4910
4911 demand_empty_rest_of_line ();
4912}
4913
4914/* Don't adjust TOC relocs to use the section symbol. */
4915
4916int
98027b10 4917ppc_pe_fix_adjustable (fixS *fix)
252b5132
RH		 4918{
4919 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4920}
4921
4922#endif
4923\f
4924#ifdef OBJ_XCOFF
4925
4926/* XCOFF specific symbol and file handling. */
4927
4928/* Canonicalize the symbol name. We use the to force the suffix, if
4929 any, to use square brackets, and to be in upper case. */
4930
4931char *
98027b10 4932ppc_canonicalize_symbol_name (char *name)
252b5132
RH		 4933{
4934 char *s;
4935
4936 if (ppc_stab_symbol)
4937 return name;
4938
4939 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4940 ;
4941 if (*s != '\0')
4942 {
4943 char brac;
4944
4945 if (*s == '[')
4946 brac = ']';
4947 else
4948 {
4949 *s = '[';
4950 brac = '}';
4951 }
4952
4953 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4954 *s = TOUPPER (*s);
252b5132
RH		 4955
4956 if (*s == '\0' || s[1] != '\0')
4957 as_bad (_("bad symbol suffix"));
4958
4959 *s = ']';
4960 }
4961
4962 return name;
4963}
4964
4965/* Set the class of a symbol based on the suffix, if any. This is
4966 called whenever a new symbol is created. */
4967
4968void
98027b10 4969ppc_symbol_new_hook (symbolS *sym)
252b5132 4970{
809ffe0d 4971 struct ppc_tc_sy *tc;
252b5132
RH		 4972 const char *s;
4973
809ffe0d
ILT		 4974 tc = symbol_get_tc (sym);
4975 tc->next = NULL;
4976 tc->output = 0;
96d56e9f 4977 tc->symbol_class = -1;
809ffe0d
ILT		 4978 tc->real_name = NULL;
4979 tc->subseg = 0;
4980 tc->align = 0;
4981 tc->size = NULL;
4982 tc->within = NULL;
252b5132
RH		 4983
4984 if (ppc_stab_symbol)
4985 return;
4986
4987 s = strchr (S_GET_NAME (sym), '[');
4988 if (s == (const char *) NULL)
4989 {
4990 /* There is no suffix. */
4991 return;
4992 }
4993
4994 ++s;
4995
4996 switch (s[0])
4997 {
4998 case 'B':
4999 if (strcmp (s, "BS]") == 0)
96d56e9f 5000 tc->symbol_class = XMC_BS;
252b5132
RH		 5001 break;
5002 case 'D':
5003 if (strcmp (s, "DB]") == 0)
96d56e9f 5004 tc->symbol_class = XMC_DB;
252b5132 5005 else if (strcmp (s, "DS]") == 0)
96d56e9f 5006 tc->symbol_class = XMC_DS;
252b5132
RH		 5007 break;
5008 case 'G':
5009 if (strcmp (s, "GL]") == 0)
96d56e9f 5010 tc->symbol_class = XMC_GL;
252b5132
RH		 5011 break;
5012 case 'P':
5013 if (strcmp (s, "PR]") == 0)
96d56e9f 5014 tc->symbol_class = XMC_PR;
252b5132
RH		 5015 break;
5016 case 'R':
5017 if (strcmp (s, "RO]") == 0)
96d56e9f 5018 tc->symbol_class = XMC_RO;
252b5132 5019 else if (strcmp (s, "RW]") == 0)
96d56e9f 5020 tc->symbol_class = XMC_RW;
252b5132
RH		 5021 break;
5022 case 'S':
5023 if (strcmp (s, "SV]") == 0)
96d56e9f 5024 tc->symbol_class = XMC_SV;
252b5132
RH		 5025 break;
5026 case 'T':
5027 if (strcmp (s, "TC]") == 0)
96d56e9f 5028 tc->symbol_class = XMC_TC;
252b5132 5029 else if (strcmp (s, "TI]") == 0)
96d56e9f 5030 tc->symbol_class = XMC_TI;
252b5132 5031 else if (strcmp (s, "TB]") == 0)
96d56e9f 5032 tc->symbol_class = XMC_TB;
252b5132 5033 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
96d56e9f 5034 tc->symbol_class = XMC_TC0;
252b5132
RH		 5035 break;
5036 case 'U':
5037 if (strcmp (s, "UA]") == 0)
96d56e9f 5038 tc->symbol_class = XMC_UA;
252b5132 5039 else if (strcmp (s, "UC]") == 0)
96d56e9f 5040 tc->symbol_class = XMC_UC;
252b5132
RH		 5041 break;
5042 case 'X':
5043 if (strcmp (s, "XO]") == 0)
96d56e9f 5044 tc->symbol_class = XMC_XO;
252b5132
RH		 5045 break;
5046 }
5047
96d56e9f 5048 if (tc->symbol_class == -1)
252b5132
RH		 5049 as_bad (_("Unrecognized symbol suffix"));
5050}
5051
5052/* Set the class of a label based on where it is defined. This
5053 handles symbols without suffixes. Also, move the symbol so that it
5054 follows the csect symbol. */
5055
5056void
98027b10 5057ppc_frob_label (symbolS *sym)
252b5132
RH		 5058{
5059 if (ppc_current_csect != (symbolS *) NULL)
5060 {
96d56e9f
NC		 5061 if (symbol_get_tc (sym)->symbol_class == -1)
5062 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
252b5132
RH		 5063
5064 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 5065 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5066 &symbol_rootP, &symbol_lastP);
5067 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132 5068 }
07a53e5c
RH		 5069
5070#ifdef OBJ_ELF
5071 dwarf2_emit_label (sym);
5072#endif
252b5132
RH		 5073}
5074
5075/* This variable is set by ppc_frob_symbol if any absolute symbols are
5076 seen. It tells ppc_adjust_symtab whether it needs to look through
5077 the symbols. */
5078
b34976b6 5079static bfd_boolean ppc_saw_abs;
252b5132
RH		 5080
5081/* Change the name of a symbol just before writing it out. Set the
5082 real name if the .rename pseudo-op was used. Otherwise, remove any
5083 class suffix. Return 1 if the symbol should not be included in the
5084 symbol table. */
5085
5086int
98027b10 5087ppc_frob_symbol (symbolS *sym)
252b5132
RH		 5088{
5089 static symbolS *ppc_last_function;
5090 static symbolS *set_end;
5091
5092 /* Discard symbols that should not be included in the output symbol
5093 table. */
809ffe0d
ILT		 5094 if (! symbol_used_in_reloc_p (sym)
5095 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 5096 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5097 && ! symbol_get_tc (sym)->output
252b5132
RH		 5098 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5099 return 1;
5100
a161fe53
AM		 5101 /* This one will disappear anyway. Don't make a csect sym for it. */
5102 if (sym == abs_section_sym)
5103 return 1;
5104
809ffe0d
ILT		 5105 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5106 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 5107 else
5108 {
5109 const char *name;
5110 const char *s;
5111
5112 name = S_GET_NAME (sym);
5113 s = strchr (name, '[');
5114 if (s != (char *) NULL)
5115 {
5116 unsigned int len;
5117 char *snew;
5118
5119 len = s - name;
5120 snew = xmalloc (len + 1);
5121 memcpy (snew, name, len);
5122 snew[len] = '\0';
5123
5124 S_SET_NAME (sym, snew);
5125 }
5126 }
5127
5128 if (set_end != (symbolS *) NULL)
5129 {
5130 SA_SET_SYM_ENDNDX (set_end, sym);
5131 set_end = NULL;
5132 }
5133
5134 if (SF_GET_FUNCTION (sym))
5135 {
5136 if (ppc_last_function != (symbolS *) NULL)
5137 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5138 ppc_last_function = sym;
809ffe0d 5139 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 5140 {
6386f3a7 5141 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 5142 SA_SET_SYM_FSIZE (sym,
5143 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 5144 }
5145 }
5146 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5147 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5148 {
5149 if (ppc_last_function == (symbolS *) NULL)
5150 as_bad (_(".ef with no preceding .function"));
5151 else
5152 {
5153 set_end = ppc_last_function;
5154 ppc_last_function = NULL;
5155
5156 /* We don't have a C_EFCN symbol, but we need to force the
5157 COFF backend to believe that it has seen one. */
5158 coff_last_function = NULL;
5159 }
5160 }
5161
670ec21d 5162 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 5163 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 5164 && S_GET_STORAGE_CLASS (sym) != C_FILE
5165 && S_GET_STORAGE_CLASS (sym) != C_FCN
5166 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5167 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5168 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5169 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5170 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5171 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5172 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5173
5174 if (S_GET_STORAGE_CLASS (sym) == C_EXT
8602d4fe 5175 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
252b5132
RH		 5176 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5177 {
5178 int i;
5179 union internal_auxent *a;
5180
5181 /* Create a csect aux. */
5182 i = S_GET_NUMBER_AUXILIARY (sym);
5183 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d 5184 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
96d56e9f 5185 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
252b5132
RH		 5186 {
5187 /* This is the TOC table. */
5188 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5189 a->x_csect.x_scnlen.l = 0;
5190 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5191 }
809ffe0d 5192 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 5193 {
5194 /* This is a csect symbol. x_scnlen is the size of the
5195 csect. */
809ffe0d 5196 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 5197 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5198 S_GET_SEGMENT (sym))
5199 - S_GET_VALUE (sym));
5200 else
5201 {
6386f3a7 5202 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 5203 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 5204 - S_GET_VALUE (sym));
5205 }
809ffe0d 5206 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 5207 }
5208 else if (S_GET_SEGMENT (sym) == bss_section)
5209 {
5210 /* This is a common symbol. */
809ffe0d
ILT		 5211 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5212 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 5213 if (S_IS_EXTERNAL (sym))
96d56e9f 5214 symbol_get_tc (sym)->symbol_class = XMC_RW;
252b5132 5215 else
96d56e9f 5216 symbol_get_tc (sym)->symbol_class = XMC_BS;
252b5132
RH		 5217 }
5218 else if (S_GET_SEGMENT (sym) == absolute_section)
5219 {
5220 /* This is an absolute symbol. The csect will be created by
99a814a1 5221 ppc_adjust_symtab. */
b34976b6 5222 ppc_saw_abs = TRUE;
252b5132 5223 a->x_csect.x_smtyp = XTY_LD;
96d56e9f
NC		 5224 if (symbol_get_tc (sym)->symbol_class == -1)
5225 symbol_get_tc (sym)->symbol_class = XMC_XO;
252b5132
RH		 5226 }
5227 else if (! S_IS_DEFINED (sym))
5228 {
5229 /* This is an external symbol. */
5230 a->x_csect.x_scnlen.l = 0;
5231 a->x_csect.x_smtyp = XTY_ER;
5232 }
96d56e9f 5233 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
252b5132
RH		 5234 {
5235 symbolS *next;
5236
5237 /* This is a TOC definition. x_scnlen is the size of the
5238 TOC entry. */
5239 next = symbol_next (sym);
96d56e9f 5240 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
252b5132
RH		 5241 next = symbol_next (next);
5242 if (next == (symbolS *) NULL
96d56e9f 5243 || symbol_get_tc (next)->symbol_class != XMC_TC)
252b5132
RH		 5244 {
5245 if (ppc_after_toc_frag == (fragS *) NULL)
5246 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5247 data_section)
5248 - S_GET_VALUE (sym));
5249 else
5250 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5251 - S_GET_VALUE (sym));
5252 }
5253 else
5254 {
6386f3a7 5255 resolve_symbol_value (next);
252b5132
RH		 5256 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5257 - S_GET_VALUE (sym));
5258 }
5259 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5260 }
5261 else
5262 {
5263 symbolS *csect;
5264
5265 /* This is a normal symbol definition. x_scnlen is the
5266 symbol index of the containing csect. */
5267 if (S_GET_SEGMENT (sym) == text_section)
5268 csect = ppc_text_csects;
5269 else if (S_GET_SEGMENT (sym) == data_section)
5270 csect = ppc_data_csects;
5271 else
5272 abort ();
5273
5274 /* Skip the initial dummy symbol. */
809ffe0d 5275 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5276
5277 if (csect == (symbolS *) NULL)
5278 {
5279 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5280 a->x_csect.x_scnlen.l = 0;
5281 }
5282 else
5283 {
809ffe0d 5284 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5285 {
6386f3a7 5286 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5287 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5288 > S_GET_VALUE (sym))
252b5132 5289 break;
809ffe0d 5290 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5291 }
5292
809ffe0d
ILT		 5293 a->x_csect.x_scnlen.p =
5294 coffsymbol (symbol_get_bfdsym (csect))->native;
5295 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5296 1;
252b5132
RH		 5297 }
5298 a->x_csect.x_smtyp = XTY_LD;
5299 }
81d4177b 5300
252b5132
RH		 5301 a->x_csect.x_parmhash = 0;
5302 a->x_csect.x_snhash = 0;
96d56e9f 5303 if (symbol_get_tc (sym)->symbol_class == -1)
252b5132
RH		 5304 a->x_csect.x_smclas = XMC_PR;
5305 else
96d56e9f 5306 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
252b5132
RH		 5307 a->x_csect.x_stab = 0;
5308 a->x_csect.x_snstab = 0;
5309
5310 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5311 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5312 }
5313 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5314 {
5315 /* We want the value to be the symbol index of the referenced
5316 csect symbol. BFD will do that for us if we set the right
5317 flags. */
b782de16
AM		 5318 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5319 combined_entry_type *c = coffsymbol (bsym)->native;
5320
5321 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5322 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5323 }
5324 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5325 {
5326 symbolS *block;
5327 symbolS *csect;
5328
5329 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5330 block = symbol_get_tc (sym)->within;
5331 csect = symbol_get_tc (block)->within;
6386f3a7 5332 resolve_symbol_value (csect);
252b5132
RH		 5333 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5334 }
5335 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5336 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5337 {
5338 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5339 BFD will do that for us if we set the right flags. We have
5340 already set the value correctly. */
809ffe0d 5341 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5342 }
5343
5344 return 0;
5345}
5346
5347/* Adjust the symbol table. This creates csect symbols for all
5348 absolute symbols. */
5349
5350void
98027b10 5351ppc_adjust_symtab (void)
252b5132
RH		 5352{
5353 symbolS *sym;
5354
5355 if (! ppc_saw_abs)
5356 return;
5357
5358 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5359 {
5360 symbolS *csect;
5361 int i;
5362 union internal_auxent *a;
5363
5364 if (S_GET_SEGMENT (sym) != absolute_section)
5365 continue;
5366
5367 csect = symbol_create (".abs[XO]", absolute_section,
5368 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5369 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5370 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5371 i = S_GET_NUMBER_AUXILIARY (csect);
5372 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5373 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5374 a->x_csect.x_scnlen.l = 0;
5375 a->x_csect.x_smtyp = XTY_SD;
5376 a->x_csect.x_parmhash = 0;
5377 a->x_csect.x_snhash = 0;
5378 a->x_csect.x_smclas = XMC_XO;
5379 a->x_csect.x_stab = 0;
5380 a->x_csect.x_snstab = 0;
5381
5382 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5383
5384 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5385 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5386 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5387 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5388 }
5389
b34976b6 5390 ppc_saw_abs = FALSE;
252b5132
RH		 5391}
5392
5393/* Set the VMA for a section. This is called on all the sections in
5394 turn. */
5395
5396void
98027b10 5397ppc_frob_section (asection *sec)
252b5132 5398{
931e13a6 5399 static bfd_vma vma = 0;
252b5132 5400
931e13a6 5401 vma = md_section_align (sec, vma);
252b5132
RH		 5402 bfd_set_section_vma (stdoutput, sec, vma);
5403 vma += bfd_section_size (stdoutput, sec);
5404}
5405
5406#endif /* OBJ_XCOFF */
5407\f
252b5132 5408char *
98027b10 5409md_atof (int type, char *litp, int *sizep)
252b5132 5410{
499ac353 5411 return ieee_md_atof (type, litp, sizep, target_big_endian);
252b5132
RH		 5412}
5413
5414/* Write a value out to the object file, using the appropriate
5415 endianness. */
5416
5417void
98027b10 5418md_number_to_chars (char *buf, valueT val, int n)
252b5132
RH		 5419{
5420 if (target_big_endian)
5421 number_to_chars_bigendian (buf, val, n);
5422 else
5423 number_to_chars_littleendian (buf, val, n);
5424}
5425
5426/* Align a section (I don't know why this is machine dependent). */
5427
5428valueT
3aeeedbb 5429md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
252b5132 5430{
3aeeedbb
AM		 5431#ifdef OBJ_ELF
5432 return addr;
5433#else
252b5132
RH		 5434 int align = bfd_get_section_alignment (stdoutput, seg);
5435
5436 return ((addr + (1 << align) - 1) & (-1 << align));
3aeeedbb 5437#endif
252b5132
RH		 5438}
5439
5440/* We don't have any form of relaxing. */
5441
5442int
98027b10
AM		 5443md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
5444 asection *seg ATTRIBUTE_UNUSED)
252b5132
RH		 5445{
5446 abort ();
5447 return 0;
5448}
5449
5450/* Convert a machine dependent frag. We never generate these. */
5451
5452void
98027b10
AM		 5453md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
5454 asection *sec ATTRIBUTE_UNUSED,
5455 fragS *fragp ATTRIBUTE_UNUSED)
252b5132
RH		 5456{
5457 abort ();
5458}
5459
5460/* We have no need to default values of symbols. */
5461
252b5132 5462symbolS *
98027b10 5463md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
252b5132
RH		 5464{
5465 return 0;
5466}
5467\f
5468/* Functions concerning relocs. */
5469
5470/* The location from which a PC relative jump should be calculated,
5471 given a PC relative reloc. */
5472
5473long
98027b10 5474md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
252b5132
RH		 5475{
5476 return fixp->fx_frag->fr_address + fixp->fx_where;
5477}
5478
5479#ifdef OBJ_XCOFF
5480
5481/* This is called to see whether a fixup should be adjusted to use a
5482 section symbol. We take the opportunity to change a fixup against
5483 a symbol in the TOC subsegment into a reloc against the
5484 corresponding .tc symbol. */
5485
5486int
98027b10 5487ppc_fix_adjustable (fixS *fix)
252b5132 5488{
b782de16
AM		 5489 valueT val = resolve_symbol_value (fix->fx_addsy);
5490 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5491 TC_SYMFIELD_TYPE *tc;
5492
5493 if (symseg == absolute_section)
5494 return 0;
252b5132 5495
252b5132 5496 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5497 && fix->fx_addsy != ppc_toc_csect
b782de16 5498 && symseg == data_section
252b5132
RH		 5499 && val >= ppc_toc_frag->fr_address
5500 && (ppc_after_toc_frag == (fragS *) NULL
5501 || val < ppc_after_toc_frag->fr_address))
5502 {
5503 symbolS *sy;
5504
5505 for (sy = symbol_next (ppc_toc_csect);
5506 sy != (symbolS *) NULL;
5507 sy = symbol_next (sy))
5508 {
b782de16
AM		 5509 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5510
96d56e9f 5511 if (sy_tc->symbol_class == XMC_TC0)
252b5132 5512 continue;
96d56e9f 5513 if (sy_tc->symbol_class != XMC_TC)
252b5132 5514 break;
b782de16 5515 if (val == resolve_symbol_value (sy))
252b5132
RH		 5516 {
5517 fix->fx_addsy = sy;
5518 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5519 return 0;
5520 }
5521 }
5522
5523 as_bad_where (fix->fx_file, fix->fx_line,
5524 _("symbol in .toc does not match any .tc"));
5525 }
5526
5527 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5528 tc = symbol_get_tc (fix->fx_addsy);
5529 if (tc->subseg == 0
96d56e9f
NC		 5530 && tc->symbol_class != XMC_TC0
5531 && tc->symbol_class != XMC_TC
b782de16 5532 && symseg != bss_section
252b5132 5533 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5534 && (symseg != data_section
252b5132
RH		 5535 || ppc_toc_csect == NULL
5536 || val < ppc_toc_frag->fr_address
5537 || (ppc_after_toc_frag != NULL
5538 && val >= ppc_after_toc_frag->fr_address)))
5539 {
5540 symbolS *csect;
b782de16 5541 symbolS *next_csect;
252b5132 5542
b782de16 5543 if (symseg == text_section)
252b5132 5544 csect = ppc_text_csects;
b782de16 5545 else if (symseg == data_section)
252b5132
RH		 5546 csect = ppc_data_csects;
5547 else
5548 abort ();
5549
5550 /* Skip the initial dummy symbol. */
809ffe0d 5551 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5552
5553 if (csect != (symbolS *) NULL)
5554 {
b782de16
AM		 5555 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5556 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5557 {
5558 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5559 have to look through the full symbol table to see
5560 whether this is the csect we want. Note that we will
5561 only get here if the csect has zero length. */
b782de16
AM		 5562 if (symbol_get_frag (csect)->fr_address == val
5563 && S_GET_VALUE (csect) == val)
252b5132
RH		 5564 {
5565 symbolS *scan;
5566
809ffe0d 5567 for (scan = symbol_next (csect);
252b5132 5568 scan != NULL;
809ffe0d 5569 scan = symbol_next (scan))
252b5132 5570 {
809ffe0d 5571 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5572 break;
5573 if (scan == fix->fx_addsy)
5574 break;
5575 }
5576
5577 /* If we found the symbol before the next csect
99a814a1 5578 symbol, then this is the csect we want. */
252b5132
RH		 5579 if (scan == fix->fx_addsy)
5580 break;
5581 }
5582
b782de16 5583 csect = next_csect;
252b5132
RH		 5584 }
5585
b782de16 5586 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5587 fix->fx_addsy = csect;
5588 }
b782de16 5589 return 0;
252b5132
RH		 5590 }
5591
5592 /* Adjust a reloc against a .lcomm symbol to be against the base
5593 .lcomm. */
b782de16 5594 if (symseg == bss_section
252b5132
RH		 5595 && ! S_IS_EXTERNAL (fix->fx_addsy))
5596 {
b782de16
AM		 5597 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5598
5599 fix->fx_offset += val - resolve_symbol_value (sy);
5600 fix->fx_addsy = sy;
252b5132
RH		 5601 }
5602
5603 return 0;
5604}
5605
5606/* A reloc from one csect to another must be kept. The assembler
5607 will, of course, keep relocs between sections, and it will keep
5608 absolute relocs, but we need to force it to keep PC relative relocs
5609 between two csects in the same section. */
5610
5611int
98027b10 5612ppc_force_relocation (fixS *fix)
252b5132
RH		 5613{
5614 /* At this point fix->fx_addsy should already have been converted to
5615 a csect symbol. If the csect does not include the fragment, then
5616 we need to force the relocation. */
5617 if (fix->fx_pcrel
5618 && fix->fx_addsy != NULL
809ffe0d
ILT		 5619 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5620 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5621 > fix->fx_frag->fr_address)
5622 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5623 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5624 <= fix->fx_frag->fr_address))))
5625 return 1;
5626
ae6063d4 5627 return generic_force_reloc (fix);
252b5132
RH		 5628}
5629
5630#endif /* OBJ_XCOFF */
5631
0baf16f2 5632#ifdef OBJ_ELF
a161fe53
AM		 5633/* If this function returns non-zero, it guarantees that a relocation
5634 will be emitted for a fixup. */
5635
5636int
98027b10 5637ppc_force_relocation (fixS *fix)
a161fe53
AM		 5638{
5639 /* Branch prediction relocations must force a relocation, as must
5640 the vtable description relocs. */
5641 switch (fix->fx_r_type)
5642 {
5643 case BFD_RELOC_PPC_B16_BRTAKEN:
5644 case BFD_RELOC_PPC_B16_BRNTAKEN:
5645 case BFD_RELOC_PPC_BA16_BRTAKEN:
5646 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5647 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5648 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5649 return 1;
5650 default:
5651 break;
5652 }
5653
cdba85ec
AM		 5654 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5655 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5656 return 1;
5657
ae6063d4 5658 return generic_force_reloc (fix);
a161fe53
AM		 5659}
5660
0baf16f2 5661int
98027b10 5662ppc_fix_adjustable (fixS *fix)
252b5132 5663{
0baf16f2
AM		 5664 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5665 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5666 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5667 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5668 && fix->fx_r_type != BFD_RELOC_GPREL16
5669 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5670 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5671 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5672 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5673}
0baf16f2 5674#endif
252b5132 5675
3aeeedbb
AM		 5676/* Implement HANDLE_ALIGN. This writes the NOP pattern into an
5677 rs_align_code frag. */
5678
5679void
5680ppc_handle_align (struct frag *fragP)
5681{
5682 valueT count = (fragP->fr_next->fr_address
5683 - (fragP->fr_address + fragP->fr_fix));
5684
5685 if (count != 0 && (count & 3) == 0)
5686 {
5687 char *dest = fragP->fr_literal + fragP->fr_fix;
5688
5689 fragP->fr_var = 4;
5690 md_number_to_chars (dest, 0x60000000, 4);
5691
42240548
PB		 5692 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
5693 || (ppc_cpu & PPC_OPCODE_POWER7) != 0)
3aeeedbb 5694 {
42240548
PB		 5695 /* For power6 and power7, we want the last nop to be a group
5696 terminating one. Do this by inserting an rs_fill frag immediately
5697 after this one, with its address set to the last nop location.
5698 This will automatically reduce the number of nops in the current
5699 frag by one. */
3aeeedbb
AM		 5700 if (count > 4)
5701 {
5702 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
5703
5704 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
5705 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
5706 group_nop->fr_fix = 0;
5707 group_nop->fr_offset = 1;
5708 group_nop->fr_type = rs_fill;
5709 fragP->fr_next = group_nop;
5710 dest = group_nop->fr_literal;
5711 }
5712
42240548
PB		 5713 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
5714 /* power7 group terminating nop: "ori 2,2,0". */
5715 md_number_to_chars (dest, 0x60420000, 4);
5716 else
5717 /* power6 group terminating nop: "ori 1,1,0". */
5718 md_number_to_chars (dest, 0x60210000, 4);
3aeeedbb
AM		 5719 }
5720 }
5721}
5722
252b5132
RH		 5723/* Apply a fixup to the object code. This is called for all the
5724 fixups we generated by the call to fix_new_exp, above. In the call
5725 above we used a reloc code which was the largest legal reloc code
5726 plus the operand index. Here we undo that to recover the operand
5727 index. At this point all symbol values should be fully resolved,
5728 and we attempt to completely resolve the reloc. If we can not do
5729 that, we determine the correct reloc code and put it back in the
5730 fixup. */
5731
94f592af 5732void
98027b10 5733md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
252b5132 5734{
94f592af 5735 valueT value = * valP;
252b5132
RH		 5736
5737#ifdef OBJ_ELF
94f592af 5738 if (fixP->fx_addsy != NULL)
252b5132 5739 {
a161fe53 5740 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5741 if (fixP->fx_pcrel)
5742 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5743 }
5744 else
94f592af 5745 fixP->fx_done = 1;
252b5132 5746#else
a161fe53 5747 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5748 the symbol values. If we are doing this relocation the code in
5749 write.c is going to call bfd_install_relocation, which is also
5750 going to use the symbol value. That means that if the reloc is
5751 fully resolved we want to use *valP since bfd_install_relocation is
5752 not being used.
9f0eb232
RS		 5753 However, if the reloc is not fully resolved we do not want to
5754 use *valP, and must use fx_offset instead. If the relocation
5755 is PC-relative, we then need to re-apply md_pcrel_from_section
5756 to this new relocation value. */
94f592af
NC		 5757 if (fixP->fx_addsy == (symbolS *) NULL)
5758 fixP->fx_done = 1;
5759
252b5132 5760 else
9f0eb232
RS		 5761 {
5762 value = fixP->fx_offset;
5763 if (fixP->fx_pcrel)
5764 value -= md_pcrel_from_section (fixP, seg);
5765 }
a161fe53
AM		 5766#endif
5767
5768 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5769 {
a161fe53
AM		 5770 /* We can't actually support subtracting a symbol. */
5771 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5772 }
252b5132 5773
94f592af 5774 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5775 {
5776 int opindex;
5777 const struct powerpc_operand *operand;
5778 char *where;
5779 unsigned long insn;
5780
94f592af 5781 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5782
5783 operand = &powerpc_operands[opindex];
5784
5785#ifdef OBJ_XCOFF
0baf16f2
AM		 5786 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5787 does not generate a reloc. It uses the offset of `sym' within its
5788 csect. Other usages, such as `.long sym', generate relocs. This
5789 is the documented behaviour of non-TOC symbols. */
252b5132 5790 if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5791 && (operand->bitm & 0xfff0) == 0xfff0
252b5132 5792 && operand->shift == 0
2b3c4602 5793 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5794 && fixP->fx_addsy != NULL
5795 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
96d56e9f
NC		 5796 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
5797 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
94f592af 5798 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5799 {
94f592af
NC		 5800 value = fixP->fx_offset;
5801 fixP->fx_done = 1;
252b5132
RH		 5802 }
5803#endif
5804
5805 /* Fetch the instruction, insert the fully resolved operand
5806 value, and stuff the instruction back again. */
94f592af 5807 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5808 if (target_big_endian)
5809 insn = bfd_getb32 ((unsigned char *) where);
5810 else
5811 insn = bfd_getl32 ((unsigned char *) where);
5812 insn = ppc_insert_operand (insn, operand, (offsetT) value,
783de163 5813 fixP->tc_fix_data.ppc_cpu,
94f592af 5814 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5815 if (target_big_endian)
5816 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5817 else
5818 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5819
94f592af
NC		 5820 if (fixP->fx_done)
5821 /* Nothing else to do here. */
5822 return;
252b5132 5823
9c2799c2 5824 gas_assert (fixP->fx_addsy != NULL);
0baf16f2 5825
252b5132
RH		 5826 /* Determine a BFD reloc value based on the operand information.
5827 We are only prepared to turn a few of the operands into
0baf16f2 5828 relocs. */
11b37b7b 5829 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5830 && operand->bitm == 0x3fffffc
11b37b7b 5831 && operand->shift == 0)
94f592af 5832 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b 5833 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
b84bf58a 5834 && operand->bitm == 0xfffc
11b37b7b 5835 && operand->shift == 0)
95210096
AM		 5836 {
5837 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5838#ifdef OBJ_XCOFF
5839 fixP->fx_size = 2;
5840 if (target_big_endian)
5841 fixP->fx_where += 2;
5842#endif
5843 }
11b37b7b 5844 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5845 && operand->bitm == 0x3fffffc
11b37b7b 5846 && operand->shift == 0)
94f592af 5847 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b 5848 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
b84bf58a 5849 && operand->bitm == 0xfffc
11b37b7b 5850 && operand->shift == 0)
95210096
AM		 5851 {
5852 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5853#ifdef OBJ_XCOFF
5854 fixP->fx_size = 2;
5855 if (target_big_endian)
5856 fixP->fx_where += 2;
5857#endif
5858 }
0baf16f2 5859#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b 5860 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
b84bf58a 5861 && (operand->bitm & 0xfff0) == 0xfff0
a7fc733f 5862 && operand->shift == 0)
11b37b7b 5863 {
a7fc733f
AM		 5864 if (ppc_is_toc_sym (fixP->fx_addsy))
5865 {
5866 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5867#ifdef OBJ_ELF
a7fc733f
AM		 5868 if (ppc_obj64
5869 && (operand->flags & PPC_OPERAND_DS) != 0)
5870 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5871#endif
5872 }
5873 else
5874 {
5875 fixP->fx_r_type = BFD_RELOC_16;
5876#ifdef OBJ_ELF
5877 if (ppc_obj64
5878 && (operand->flags & PPC_OPERAND_DS) != 0)
5879 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5880#endif
a7fc733f 5881 }
94f592af 5882 fixP->fx_size = 2;
11b37b7b 5883 if (target_big_endian)
94f592af 5884 fixP->fx_where += 2;
11b37b7b 5885 }
0baf16f2 5886#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5887 else
252b5132
RH		 5888 {
5889 char *sfile;
5890 unsigned int sline;
5891
5892 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5893 symbol. */
94f592af
NC		 5894 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5895 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5896 _("unresolved expression that must be resolved"));
5897 else
94f592af 5898 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5899 _("unsupported relocation against %s"),
94f592af
NC		 5900 S_GET_NAME (fixP->fx_addsy));
5901 fixP->fx_done = 1;
5902 return;
252b5132
RH		 5903 }
5904 }
5905 else
5906 {
5907#ifdef OBJ_ELF
94f592af 5908 ppc_elf_validate_fix (fixP, seg);
252b5132 5909#endif
94f592af 5910 switch (fixP->fx_r_type)
252b5132 5911 {
252b5132 5912 case BFD_RELOC_CTOR:
2b3c4602 5913 if (ppc_obj64)
9c7977b3
AM		 5914 goto ctor64;
5915 /* fall through */
5916
0baf16f2 5917 case BFD_RELOC_32:
94f592af
NC		 5918 if (fixP->fx_pcrel)
5919 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5920 /* fall through */
252b5132
RH		 5921
5922 case BFD_RELOC_RVA:
5923 case BFD_RELOC_32_PCREL:
252b5132 5924 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5925 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5926 value, 4);
5927 break;
5928
7f6d05e8 5929 case BFD_RELOC_64:
9c7977b3 5930 ctor64:
94f592af
NC		 5931 if (fixP->fx_pcrel)
5932 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5933 /* fall through */
0baf16f2 5934
7f6d05e8 5935 case BFD_RELOC_64_PCREL:
94f592af 5936 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5937 value, 8);
81d4177b 5938 break;
0baf16f2 5939
252b5132
RH		 5940 case BFD_RELOC_GPREL16:
5941 case BFD_RELOC_16_GOT_PCREL:
5942 case BFD_RELOC_16_GOTOFF:
5943 case BFD_RELOC_LO16_GOTOFF:
5944 case BFD_RELOC_HI16_GOTOFF:
5945 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5946 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5947 case BFD_RELOC_LO16_BASEREL:
5948 case BFD_RELOC_HI16_BASEREL:
5949 case BFD_RELOC_HI16_S_BASEREL:
5950 case BFD_RELOC_PPC_EMB_NADDR16:
5951 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5952 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5953 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5954 case BFD_RELOC_PPC_EMB_SDAI16:
5955 case BFD_RELOC_PPC_EMB_SDA2REL:
5956 case BFD_RELOC_PPC_EMB_SDA2I16:
5957 case BFD_RELOC_PPC_EMB_RELSEC16:
5958 case BFD_RELOC_PPC_EMB_RELST_LO:
5959 case BFD_RELOC_PPC_EMB_RELST_HI:
5960 case BFD_RELOC_PPC_EMB_RELST_HA:
5961 case BFD_RELOC_PPC_EMB_RELSDA:
5962 case BFD_RELOC_PPC_TOC16:
0baf16f2 5963#ifdef OBJ_ELF
0baf16f2
AM		 5964 case BFD_RELOC_PPC64_TOC16_LO:
5965 case BFD_RELOC_PPC64_TOC16_HI:
5966 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5967#endif
94f592af 5968 if (fixP->fx_pcrel)
252b5132 5969 {
94f592af
NC		 5970 if (fixP->fx_addsy != NULL)
5971 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5972 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5973 bfd_get_reloc_code_name (fixP->fx_r_type),
5974 S_GET_NAME (fixP->fx_addsy));
252b5132 5975 else
94f592af 5976 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5977 _("cannot emit PC relative %s relocation"),
94f592af 5978 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5979 }
5980
94f592af 5981 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5982 value, 2);
5983 break;
5984
3c9d25f4
AM		 5985 case BFD_RELOC_16:
5986 if (fixP->fx_pcrel)
5987 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5988 /* fall through */
5989
5990 case BFD_RELOC_16_PCREL:
5991 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5992 value, 2);
5993 break;
5994
5995 case BFD_RELOC_LO16:
5996 if (fixP->fx_pcrel)
5997 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5998 /* fall through */
5999
6000 case BFD_RELOC_LO16_PCREL:
6001 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6002 value, 2);
6003 break;
6004
252b5132
RH		 6005 /* This case happens when you write, for example,
6006 lis %r3,(L1-L2)@ha
6007 where L1 and L2 are defined later. */
6008 case BFD_RELOC_HI16:
94f592af 6009 if (fixP->fx_pcrel)
3c9d25f4
AM		 6010 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6011 /* fall through */
6012
6013 case BFD_RELOC_HI16_PCREL:
94f592af 6014 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6015 PPC_HI (value), 2);
252b5132 6016 break;
0baf16f2 6017
252b5132 6018 case BFD_RELOC_HI16_S:
94f592af 6019 if (fixP->fx_pcrel)
3c9d25f4
AM		 6020 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6021 /* fall through */
6022
6023 case BFD_RELOC_HI16_S_PCREL:
94f592af 6024 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6025 PPC_HA (value), 2);
6026 break;
6027
6028#ifdef OBJ_ELF
0baf16f2 6029 case BFD_RELOC_PPC64_HIGHER:
94f592af 6030 if (fixP->fx_pcrel)
0baf16f2 6031 abort ();
94f592af 6032 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 6033 PPC_HIGHER (value), 2);
252b5132
RH		 6034 break;
6035
0baf16f2 6036 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 6037 if (fixP->fx_pcrel)
0baf16f2 6038 abort ();
94f592af 6039 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6040 PPC_HIGHERA (value), 2);
6041 break;
6042
6043 case BFD_RELOC_PPC64_HIGHEST:
94f592af 6044 if (fixP->fx_pcrel)
0baf16f2 6045 abort ();
94f592af 6046 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6047 PPC_HIGHEST (value), 2);
6048 break;
6049
6050 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 6051 if (fixP->fx_pcrel)
0baf16f2 6052 abort ();
94f592af 6053 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 6054 PPC_HIGHESTA (value), 2);
6055 break;
6056
6057 case BFD_RELOC_PPC64_ADDR16_DS:
6058 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6059 case BFD_RELOC_PPC64_GOT16_DS:
6060 case BFD_RELOC_PPC64_GOT16_LO_DS:
6061 case BFD_RELOC_PPC64_PLT16_LO_DS:
6062 case BFD_RELOC_PPC64_SECTOFF_DS:
6063 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6064 case BFD_RELOC_PPC64_TOC16_DS:
6065 case BFD_RELOC_PPC64_TOC16_LO_DS:
6066 case BFD_RELOC_PPC64_PLTGOT16_DS:
6067 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 6068 if (fixP->fx_pcrel)
0baf16f2
AM		 6069 abort ();
6070 {
2132e3a3 6071 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 6072 unsigned long val, mask;
0baf16f2
AM		 6073
6074 if (target_big_endian)
adadcc0c 6075 val = bfd_getb32 (where - 2);
0baf16f2 6076 else
adadcc0c
AM		 6077 val = bfd_getl32 (where);
6078 mask = 0xfffc;
6079 /* lq insns reserve the four lsbs. */
6080 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 6081 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 6082 mask = 0xfff0;
6083 val |= value & mask;
0baf16f2
AM		 6084 if (target_big_endian)
6085 bfd_putb16 ((bfd_vma) val, where);
6086 else
6087 bfd_putl16 ((bfd_vma) val, where);
6088 }
6089 break;
cdba85ec 6090
ba0b2174
AM		 6091 case BFD_RELOC_PPC_B16_BRTAKEN:
6092 case BFD_RELOC_PPC_B16_BRNTAKEN:
6093 case BFD_RELOC_PPC_BA16_BRTAKEN:
6094 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6095 break;
6096
cdba85ec 6097 case BFD_RELOC_PPC_TLS:
727fc41e
AM		 6098 case BFD_RELOC_PPC_TLSGD:
6099 case BFD_RELOC_PPC_TLSLD:
7c1d0959
L		 6100 break;
6101
cdba85ec
AM		 6102 case BFD_RELOC_PPC_DTPMOD:
6103 case BFD_RELOC_PPC_TPREL16:
6104 case BFD_RELOC_PPC_TPREL16_LO:
6105 case BFD_RELOC_PPC_TPREL16_HI:
6106 case BFD_RELOC_PPC_TPREL16_HA:
6107 case BFD_RELOC_PPC_TPREL:
6108 case BFD_RELOC_PPC_DTPREL16:
6109 case BFD_RELOC_PPC_DTPREL16_LO:
6110 case BFD_RELOC_PPC_DTPREL16_HI:
6111 case BFD_RELOC_PPC_DTPREL16_HA:
6112 case BFD_RELOC_PPC_DTPREL:
6113 case BFD_RELOC_PPC_GOT_TLSGD16:
6114 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6115 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6116 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6117 case BFD_RELOC_PPC_GOT_TLSLD16:
6118 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6119 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6120 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6121 case BFD_RELOC_PPC_GOT_TPREL16:
6122 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6123 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6124 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6125 case BFD_RELOC_PPC_GOT_DTPREL16:
6126 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6127 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6128 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6129 case BFD_RELOC_PPC64_TPREL16_DS:
6130 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6131 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6132 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6133 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6134 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6135 case BFD_RELOC_PPC64_DTPREL16_DS:
6136 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6137 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6138 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6139 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6140 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 6141 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 6142 break;
0baf16f2 6143#endif
252b5132 6144 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 6145 bytes, rather than 2, so offset it here appropriately. */
252b5132 6146 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 6147 if (fixP->fx_pcrel)
252b5132
RH		 6148 abort ();
6149
94f592af 6150 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 6151 + ((target_big_endian) ? 2 : 0),
6152 value, 2);
6153 break;
6154
6155 case BFD_RELOC_8:
94f592af 6156 if (fixP->fx_pcrel)
31a91399
NC		 6157 {
6158 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 6159 ".byte <undefined_symbol> - ." */
31a91399
NC		 6160 if (fixP->fx_addsy)
6161 as_bad (_("Unable to handle reference to symbol %s"),
6162 S_GET_NAME (fixP->fx_addsy));
6163 else
6164 as_bad (_("Unable to resolve expression"));
6165 fixP->fx_done = 1;
6166 }
6167 else
6168 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6169 value, 1);
252b5132
RH		 6170 break;
6171
6172 case BFD_RELOC_24_PLT_PCREL:
6173 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 6174 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 6175 abort ();
6176
94f592af 6177 if (fixP->fx_done)
99a814a1
AM		 6178 {
6179 char *where;
6180 unsigned long insn;
6181
6182 /* Fetch the instruction, insert the fully resolved operand
6183 value, and stuff the instruction back again. */
94f592af 6184 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 6185 if (target_big_endian)
6186 insn = bfd_getb32 ((unsigned char *) where);
6187 else
6188 insn = bfd_getl32 ((unsigned char *) where);
6189 if ((value & 3) != 0)
94f592af 6190 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6191 _("must branch to an address a multiple of 4"));
6192 if ((offsetT) value < -0x40000000
6193 || (offsetT) value >= 0x40000000)
94f592af 6194 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 6195 _("@local or @plt branch destination is too far away, %ld bytes"),
6196 (long) value);
6197 insn = insn | (value & 0x03fffffc);
6198 if (target_big_endian)
6199 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
6200 else
6201 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
6202 }
252b5132
RH		 6203 break;
6204
6205 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 6206 fixP->fx_done = 0;
6207 if (fixP->fx_addsy
6208 && !S_IS_DEFINED (fixP->fx_addsy)
6209 && !S_IS_WEAK (fixP->fx_addsy))
6210 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 6211 break;
6212
6213 case BFD_RELOC_VTABLE_ENTRY:
94f592af 6214 fixP->fx_done = 0;
252b5132
RH		 6215 break;
6216
0baf16f2 6217#ifdef OBJ_ELF
0baf16f2
AM		 6218 /* Generated by reference to `sym@tocbase'. The sym is
6219 ignored by the linker. */
6220 case BFD_RELOC_PPC64_TOC:
94f592af 6221 fixP->fx_done = 0;
0baf16f2 6222 break;
0baf16f2 6223#endif
252b5132 6224 default:
bc805888 6225 fprintf (stderr,
94f592af 6226 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6227 fflush (stderr);
252b5132
RH		 6228 abort ();
6229 }
6230 }
6231
6232#ifdef OBJ_ELF
94f592af 6233 fixP->fx_addnumber = value;
4e6935a6
AM		 6234
6235 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6236 from the section contents. If we are going to be emitting a reloc
6237 then the section contents are immaterial, so don't warn if they
6238 happen to overflow. Leave such warnings to ld. */
6239 if (!fixP->fx_done)
6240 fixP->fx_no_overflow = 1;
252b5132 6241#else
94f592af
NC		 6242 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6243 fixP->fx_addnumber = 0;
252b5132
RH		 6244 else
6245 {
6246#ifdef TE_PE
94f592af 6247 fixP->fx_addnumber = 0;
252b5132 6248#else
8edcbfcd
TG		 6249 /* We want to use the offset within the toc, not the actual VMA
6250 of the symbol. */
94f592af 6251 fixP->fx_addnumber =
8edcbfcd
TG		 6252 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
6253 - S_GET_VALUE (ppc_toc_csect);
252b5132
RH		 6254#endif
6255 }
6256#endif
252b5132
RH		 6257}
6258
6259/* Generate a reloc for a fixup. */
6260
6261arelent *
98027b10 6262tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
252b5132
RH		 6263{
6264 arelent *reloc;
6265
6266 reloc = (arelent *) xmalloc (sizeof (arelent));
6267
49309057
ILT		 6268 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6269 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6270 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6271 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6272 if (reloc->howto == (reloc_howto_type *) NULL)
6273 {
6274 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6275 _("reloc %d not supported by object file format"),
6276 (int) fixp->fx_r_type);
252b5132
RH		 6277 return NULL;
6278 }
6279 reloc->addend = fixp->fx_addnumber;
6280
6281 return reloc;
6282}
75e21f08
JJ		 6283
6284void
98027b10 6285ppc_cfi_frame_initial_instructions (void)
75e21f08
JJ		 6286{
6287 cfi_add_CFA_def_cfa (1, 0);
6288}
6289
6290int
1df69f4f 6291tc_ppc_regname_to_dw2regnum (char *regname)
75e21f08
JJ		 6292{
6293 unsigned int regnum = -1;
6294 unsigned int i;
6295 const char *p;
6296 char *q;
6297 static struct { char *name; int dw2regnum; } regnames[] =
6298 {
6299 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6300 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6301 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6302 { "spe_acc", 111 }, { "spefscr", 112 }
6303 };
6304
6305 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6306 if (strcmp (regnames[i].name, regname) == 0)
6307 return regnames[i].dw2regnum;
6308
6309 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6310 {
6311 p = regname + 1 + (regname[1] == '.');
6312 regnum = strtoul (p, &q, 10);
6313 if (p == q || *q || regnum >= 32)
6314 return -1;
6315 if (regname[0] == 'f')
b7d7dc63 6316 regnum += 32;
75e21f08 6317 else if (regname[0] == 'v')
b7d7dc63 6318 regnum += 77;
75e21f08
JJ		 6319 }
6320 else if (regname[0] == 'c' && regname[1] == 'r')
6321 {
6322 p = regname + 2 + (regname[2] == '.');
6323 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6324 return -1;
75e21f08
JJ		 6325 regnum = p[0] - '0' + 68;
6326 }
6327 return regnum;
6328}
GDB Binutils - Deliverables
This page took 0.813079 seconds and 4 git commands to generate.