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PR 1036
[deliverable/binutils-gdb.git] / gas / config / tc-ppc.c
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252b5132 1/* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
b7d7dc63 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
2132e3a3 3 2004, 2005 Free Software Foundation, Inc.
252b5132
RH		 4 Written by Ian Lance Taylor, Cygnus Support.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
4b4da160
NC		 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
21 02110-1301, USA. */
252b5132
RH		 22
23#include <stdio.h>
252b5132 24#include "as.h"
3882b010 25#include "safe-ctype.h"
252b5132 26#include "subsegs.h"
75e21f08 27#include "dw2gencfi.h"
252b5132
RH		 28#include "opcode/ppc.h"
29
30#ifdef OBJ_ELF
31#include "elf/ppc.h"
5d6f4f16 32#include "dwarf2dbg.h"
252b5132
RH		 33#endif
34
35#ifdef TE_PE
36#include "coff/pe.h"
37#endif
38
39/* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
40
41/* Tell the main code what the endianness is. */
42extern int target_big_endian;
43
44/* Whether or not, we've set target_big_endian. */
45static int set_target_endian = 0;
46
47/* Whether to use user friendly register names. */
48#ifndef TARGET_REG_NAMES_P
49#ifdef TE_PE
b34976b6 50#define TARGET_REG_NAMES_P TRUE
252b5132 51#else
b34976b6 52#define TARGET_REG_NAMES_P FALSE
252b5132
RH		 53#endif
54#endif
55
0baf16f2
AM		 56/* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
57 HIGHESTA. */
58
59/* #lo(value) denotes the least significant 16 bits of the indicated. */
60#define PPC_LO(v) ((v) & 0xffff)
61
62/* #hi(value) denotes bits 16 through 31 of the indicated value. */
63#define PPC_HI(v) (((v) >> 16) & 0xffff)
64
65/* #ha(value) denotes the high adjusted value: bits 16 through 31 of
66 the indicated value, compensating for #lo() being treated as a
67 signed number. */
15c1449b 68#define PPC_HA(v) PPC_HI ((v) + 0x8000)
0baf16f2
AM		 69
70/* #higher(value) denotes bits 32 through 47 of the indicated value. */
2a98c3a6 71#define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
0baf16f2
AM		 72
73/* #highera(value) denotes bits 32 through 47 of the indicated value,
74 compensating for #lo() being treated as a signed number. */
15c1449b 75#define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
0baf16f2
AM		 76
77/* #highest(value) denotes bits 48 through 63 of the indicated value. */
2a98c3a6 78#define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
0baf16f2
AM		 79
80/* #highesta(value) denotes bits 48 through 63 of the indicated value,
15c1449b
AM		 81 compensating for #lo being treated as a signed number. */
82#define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
0baf16f2
AM		 83
84#define SEX16(val) ((((val) & 0xffff) ^ 0x8000) - 0x8000)
85
b34976b6 86static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
252b5132 87
b34976b6 88static bfd_boolean register_name PARAMS ((expressionS *));
252b5132
RH		 89static void ppc_set_cpu PARAMS ((void));
90static unsigned long ppc_insert_operand
91 PARAMS ((unsigned long insn, const struct powerpc_operand *operand,
92 offsetT val, char *file, unsigned int line));
93static void ppc_macro PARAMS ((char *str, const struct powerpc_macro *macro));
94static void ppc_byte PARAMS ((int));
0baf16f2
AM		 95
96#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 97static int ppc_is_toc_sym PARAMS ((symbolS *sym));
98static void ppc_tc PARAMS ((int));
0baf16f2
AM		 99static void ppc_machine PARAMS ((int));
100#endif
252b5132
RH		 101
102#ifdef OBJ_XCOFF
103static void ppc_comm PARAMS ((int));
104static void ppc_bb PARAMS ((int));
105static void ppc_bc PARAMS ((int));
106static void ppc_bf PARAMS ((int));
107static void ppc_biei PARAMS ((int));
108static void ppc_bs PARAMS ((int));
109static void ppc_eb PARAMS ((int));
110static void ppc_ec PARAMS ((int));
111static void ppc_ef PARAMS ((int));
112static void ppc_es PARAMS ((int));
113static void ppc_csect PARAMS ((int));
931e13a6 114static void ppc_change_csect PARAMS ((symbolS *, offsetT));
252b5132
RH		 115static void ppc_function PARAMS ((int));
116static void ppc_extern PARAMS ((int));
117static void ppc_lglobl PARAMS ((int));
118static void ppc_section PARAMS ((int));
119static void ppc_named_section PARAMS ((int));
120static void ppc_stabx PARAMS ((int));
121static void ppc_rename PARAMS ((int));
122static void ppc_toc PARAMS ((int));
123static void ppc_xcoff_cons PARAMS ((int));
124static void ppc_vbyte PARAMS ((int));
125#endif
126
127#ifdef OBJ_ELF
128static bfd_reloc_code_real_type ppc_elf_suffix PARAMS ((char **, expressionS *));
129static void ppc_elf_cons PARAMS ((int));
130static void ppc_elf_rdata PARAMS ((int));
131static void ppc_elf_lcomm PARAMS ((int));
132static void ppc_elf_validate_fix PARAMS ((fixS *, segT));
dc1d03fc 133static void ppc_apuinfo_section_add PARAMS ((unsigned int apu, unsigned int version));
252b5132
RH		 134#endif
135
136#ifdef TE_PE
137static void ppc_set_current_section PARAMS ((segT));
138static void ppc_previous PARAMS ((int));
139static void ppc_pdata PARAMS ((int));
140static void ppc_ydata PARAMS ((int));
141static void ppc_reldata PARAMS ((int));
142static void ppc_rdata PARAMS ((int));
143static void ppc_ualong PARAMS ((int));
144static void ppc_znop PARAMS ((int));
145static void ppc_pe_comm PARAMS ((int));
146static void ppc_pe_section PARAMS ((int));
147static void ppc_pe_function PARAMS ((int));
148static void ppc_pe_tocd PARAMS ((int));
149#endif
150\f
151/* Generic assembler global variables which must be defined by all
152 targets. */
153
154#ifdef OBJ_ELF
155/* This string holds the chars that always start a comment. If the
156 pre-processor is disabled, these aren't very useful. The macro
157 tc_comment_chars points to this. We use this, rather than the
158 usual comment_chars, so that we can switch for Solaris conventions. */
159static const char ppc_solaris_comment_chars[] = "#!";
160static const char ppc_eabi_comment_chars[] = "#";
161
162#ifdef TARGET_SOLARIS_COMMENT
163const char *ppc_comment_chars = ppc_solaris_comment_chars;
164#else
165const char *ppc_comment_chars = ppc_eabi_comment_chars;
166#endif
167#else
168const char comment_chars[] = "#";
169#endif
170
171/* Characters which start a comment at the beginning of a line. */
172const char line_comment_chars[] = "#";
173
174/* Characters which may be used to separate multiple commands on a
175 single line. */
176const char line_separator_chars[] = ";";
177
178/* Characters which are used to indicate an exponent in a floating
179 point number. */
180const char EXP_CHARS[] = "eE";
181
182/* Characters which mean that a number is a floating point constant,
183 as in 0d1.0. */
184const char FLT_CHARS[] = "dD";
5ce8663f 185
b7d7dc63 186/* '+' and '-' can be used as postfix predicate predictors for conditional
ac805826
AM		 187 branches. So they need to be accepted as symbol characters.
188 Also, anything that can start an operand needs to be mentioned here,
189 to stop the input scrubber eating whitespace. */
190const char ppc_symbol_chars[] = "+-%[";
75e21f08
JJ		 191
192/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
193int ppc_cie_data_alignment;
252b5132
RH		 194\f
195/* The target specific pseudo-ops which we support. */
196
197const pseudo_typeS md_pseudo_table[] =
198{
199 /* Pseudo-ops which must be overridden. */
200 { "byte", ppc_byte, 0 },
201
202#ifdef OBJ_XCOFF
203 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
204 legitimately belong in the obj-*.c file. However, XCOFF is based
205 on COFF, and is only implemented for the RS/6000. We just use
206 obj-coff.c, and add what we need here. */
207 { "comm", ppc_comm, 0 },
208 { "lcomm", ppc_comm, 1 },
209 { "bb", ppc_bb, 0 },
210 { "bc", ppc_bc, 0 },
211 { "bf", ppc_bf, 0 },
212 { "bi", ppc_biei, 0 },
213 { "bs", ppc_bs, 0 },
214 { "csect", ppc_csect, 0 },
215 { "data", ppc_section, 'd' },
216 { "eb", ppc_eb, 0 },
217 { "ec", ppc_ec, 0 },
218 { "ef", ppc_ef, 0 },
219 { "ei", ppc_biei, 1 },
220 { "es", ppc_es, 0 },
221 { "extern", ppc_extern, 0 },
222 { "function", ppc_function, 0 },
223 { "lglobl", ppc_lglobl, 0 },
224 { "rename", ppc_rename, 0 },
225 { "section", ppc_named_section, 0 },
226 { "stabx", ppc_stabx, 0 },
227 { "text", ppc_section, 't' },
228 { "toc", ppc_toc, 0 },
229 { "long", ppc_xcoff_cons, 2 },
7f6d05e8 230 { "llong", ppc_xcoff_cons, 3 },
252b5132
RH		 231 { "word", ppc_xcoff_cons, 1 },
232 { "short", ppc_xcoff_cons, 1 },
233 { "vbyte", ppc_vbyte, 0 },
234#endif
235
236#ifdef OBJ_ELF
0baf16f2
AM		 237 { "llong", ppc_elf_cons, 8 },
238 { "quad", ppc_elf_cons, 8 },
252b5132
RH		 239 { "long", ppc_elf_cons, 4 },
240 { "word", ppc_elf_cons, 2 },
241 { "short", ppc_elf_cons, 2 },
242 { "rdata", ppc_elf_rdata, 0 },
243 { "rodata", ppc_elf_rdata, 0 },
244 { "lcomm", ppc_elf_lcomm, 0 },
245#endif
246
247#ifdef TE_PE
99a814a1 248 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 249 { "previous", ppc_previous, 0 },
250 { "pdata", ppc_pdata, 0 },
251 { "ydata", ppc_ydata, 0 },
252 { "reldata", ppc_reldata, 0 },
253 { "rdata", ppc_rdata, 0 },
254 { "ualong", ppc_ualong, 0 },
255 { "znop", ppc_znop, 0 },
256 { "comm", ppc_pe_comm, 0 },
257 { "lcomm", ppc_pe_comm, 1 },
258 { "section", ppc_pe_section, 0 },
259 { "function", ppc_pe_function,0 },
260 { "tocd", ppc_pe_tocd, 0 },
261#endif
262
0baf16f2 263#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132 264 { "tc", ppc_tc, 0 },
0baf16f2
AM		 265 { "machine", ppc_machine, 0 },
266#endif
252b5132
RH		 267
268 { NULL, NULL, 0 }
269};
270
271\f
99a814a1
AM		 272/* Predefined register names if -mregnames (or default for Windows NT).
273 In general, there are lots of them, in an attempt to be compatible
274 with a number of other Windows NT assemblers. */
252b5132
RH		 275
276/* Structure to hold information about predefined registers. */
277struct pd_reg
278 {
279 char *name;
280 int value;
281 };
282
283/* List of registers that are pre-defined:
284
285 Each general register has predefined names of the form:
286 1. r<reg_num> which has the value <reg_num>.
287 2. r.<reg_num> which has the value <reg_num>.
288
252b5132
RH		 289 Each floating point register has predefined names of the form:
290 1. f<reg_num> which has the value <reg_num>.
291 2. f.<reg_num> which has the value <reg_num>.
292
7a899fff
C		 293 Each vector unit register has predefined names of the form:
294 1. v<reg_num> which has the value <reg_num>.
295 2. v.<reg_num> which has the value <reg_num>.
296
252b5132
RH		 297 Each condition register has predefined names of the form:
298 1. cr<reg_num> which has the value <reg_num>.
299 2. cr.<reg_num> which has the value <reg_num>.
300
301 There are individual registers as well:
302 sp or r.sp has the value 1
303 rtoc or r.toc has the value 2
304 fpscr has the value 0
305 xer has the value 1
306 lr has the value 8
307 ctr has the value 9
308 pmr has the value 0
309 dar has the value 19
310 dsisr has the value 18
311 dec has the value 22
312 sdr1 has the value 25
313 srr0 has the value 26
314 srr1 has the value 27
315
81d4177b 316 The table is sorted. Suitable for searching by a binary search. */
252b5132
RH		 317
318static const struct pd_reg pre_defined_registers[] =
319{
320 { "cr.0", 0 }, /* Condition Registers */
321 { "cr.1", 1 },
322 { "cr.2", 2 },
323 { "cr.3", 3 },
324 { "cr.4", 4 },
325 { "cr.5", 5 },
326 { "cr.6", 6 },
327 { "cr.7", 7 },
328
329 { "cr0", 0 },
330 { "cr1", 1 },
331 { "cr2", 2 },
332 { "cr3", 3 },
333 { "cr4", 4 },
334 { "cr5", 5 },
335 { "cr6", 6 },
336 { "cr7", 7 },
337
338 { "ctr", 9 },
339
340 { "dar", 19 }, /* Data Access Register */
341 { "dec", 22 }, /* Decrementer */
342 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
343
344 { "f.0", 0 }, /* Floating point registers */
81d4177b
KH		 345 { "f.1", 1 },
346 { "f.10", 10 },
347 { "f.11", 11 },
348 { "f.12", 12 },
349 { "f.13", 13 },
350 { "f.14", 14 },
351 { "f.15", 15 },
352 { "f.16", 16 },
353 { "f.17", 17 },
354 { "f.18", 18 },
355 { "f.19", 19 },
356 { "f.2", 2 },
357 { "f.20", 20 },
358 { "f.21", 21 },
359 { "f.22", 22 },
360 { "f.23", 23 },
361 { "f.24", 24 },
362 { "f.25", 25 },
363 { "f.26", 26 },
364 { "f.27", 27 },
365 { "f.28", 28 },
366 { "f.29", 29 },
367 { "f.3", 3 },
252b5132
RH		 368 { "f.30", 30 },
369 { "f.31", 31 },
81d4177b
KH		 370 { "f.4", 4 },
371 { "f.5", 5 },
372 { "f.6", 6 },
373 { "f.7", 7 },
374 { "f.8", 8 },
375 { "f.9", 9 },
376
377 { "f0", 0 },
378 { "f1", 1 },
379 { "f10", 10 },
380 { "f11", 11 },
381 { "f12", 12 },
382 { "f13", 13 },
383 { "f14", 14 },
384 { "f15", 15 },
385 { "f16", 16 },
386 { "f17", 17 },
387 { "f18", 18 },
388 { "f19", 19 },
389 { "f2", 2 },
390 { "f20", 20 },
391 { "f21", 21 },
392 { "f22", 22 },
393 { "f23", 23 },
394 { "f24", 24 },
395 { "f25", 25 },
396 { "f26", 26 },
397 { "f27", 27 },
398 { "f28", 28 },
399 { "f29", 29 },
400 { "f3", 3 },
252b5132
RH		 401 { "f30", 30 },
402 { "f31", 31 },
81d4177b
KH		 403 { "f4", 4 },
404 { "f5", 5 },
405 { "f6", 6 },
406 { "f7", 7 },
407 { "f8", 8 },
408 { "f9", 9 },
252b5132
RH		 409
410 { "fpscr", 0 },
411
412 { "lr", 8 }, /* Link Register */
413
414 { "pmr", 0 },
415
416 { "r.0", 0 }, /* General Purpose Registers */
417 { "r.1", 1 },
418 { "r.10", 10 },
419 { "r.11", 11 },
420 { "r.12", 12 },
421 { "r.13", 13 },
422 { "r.14", 14 },
423 { "r.15", 15 },
424 { "r.16", 16 },
425 { "r.17", 17 },
426 { "r.18", 18 },
427 { "r.19", 19 },
428 { "r.2", 2 },
429 { "r.20", 20 },
430 { "r.21", 21 },
431 { "r.22", 22 },
432 { "r.23", 23 },
433 { "r.24", 24 },
434 { "r.25", 25 },
435 { "r.26", 26 },
436 { "r.27", 27 },
437 { "r.28", 28 },
438 { "r.29", 29 },
439 { "r.3", 3 },
440 { "r.30", 30 },
441 { "r.31", 31 },
442 { "r.4", 4 },
443 { "r.5", 5 },
444 { "r.6", 6 },
445 { "r.7", 7 },
446 { "r.8", 8 },
447 { "r.9", 9 },
448
449 { "r.sp", 1 }, /* Stack Pointer */
450
451 { "r.toc", 2 }, /* Pointer to the table of contents */
452
453 { "r0", 0 }, /* More general purpose registers */
454 { "r1", 1 },
455 { "r10", 10 },
456 { "r11", 11 },
457 { "r12", 12 },
458 { "r13", 13 },
459 { "r14", 14 },
460 { "r15", 15 },
461 { "r16", 16 },
462 { "r17", 17 },
463 { "r18", 18 },
464 { "r19", 19 },
465 { "r2", 2 },
466 { "r20", 20 },
467 { "r21", 21 },
468 { "r22", 22 },
469 { "r23", 23 },
470 { "r24", 24 },
471 { "r25", 25 },
472 { "r26", 26 },
473 { "r27", 27 },
474 { "r28", 28 },
475 { "r29", 29 },
476 { "r3", 3 },
477 { "r30", 30 },
478 { "r31", 31 },
479 { "r4", 4 },
480 { "r5", 5 },
481 { "r6", 6 },
482 { "r7", 7 },
483 { "r8", 8 },
484 { "r9", 9 },
485
486 { "rtoc", 2 }, /* Table of contents */
487
488 { "sdr1", 25 }, /* Storage Description Register 1 */
489
490 { "sp", 1 },
491
492 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
493 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
81d4177b 494
7a899fff 495 { "v.0", 0 }, /* Vector registers */
81d4177b
KH		 496 { "v.1", 1 },
497 { "v.10", 10 },
498 { "v.11", 11 },
499 { "v.12", 12 },
500 { "v.13", 13 },
501 { "v.14", 14 },
502 { "v.15", 15 },
503 { "v.16", 16 },
504 { "v.17", 17 },
505 { "v.18", 18 },
506 { "v.19", 19 },
507 { "v.2", 2 },
508 { "v.20", 20 },
509 { "v.21", 21 },
510 { "v.22", 22 },
511 { "v.23", 23 },
512 { "v.24", 24 },
513 { "v.25", 25 },
514 { "v.26", 26 },
515 { "v.27", 27 },
516 { "v.28", 28 },
517 { "v.29", 29 },
518 { "v.3", 3 },
7a899fff
C		 519 { "v.30", 30 },
520 { "v.31", 31 },
81d4177b
KH		 521 { "v.4", 4 },
522 { "v.5", 5 },
523 { "v.6", 6 },
524 { "v.7", 7 },
525 { "v.8", 8 },
526 { "v.9", 9 },
7a899fff
C		 527
528 { "v0", 0 },
81d4177b
KH		 529 { "v1", 1 },
530 { "v10", 10 },
531 { "v11", 11 },
532 { "v12", 12 },
533 { "v13", 13 },
534 { "v14", 14 },
535 { "v15", 15 },
536 { "v16", 16 },
537 { "v17", 17 },
538 { "v18", 18 },
539 { "v19", 19 },
540 { "v2", 2 },
541 { "v20", 20 },
542 { "v21", 21 },
543 { "v22", 22 },
544 { "v23", 23 },
545 { "v24", 24 },
546 { "v25", 25 },
547 { "v26", 26 },
548 { "v27", 27 },
549 { "v28", 28 },
550 { "v29", 29 },
551 { "v3", 3 },
7a899fff
C		 552 { "v30", 30 },
553 { "v31", 31 },
81d4177b
KH		 554 { "v4", 4 },
555 { "v5", 5 },
556 { "v6", 6 },
557 { "v7", 7 },
558 { "v8", 8 },
7a899fff 559 { "v9", 9 },
252b5132
RH		 560
561 { "xer", 1 },
562
563};
564
bc805888 565#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
252b5132
RH		 566
567/* Given NAME, find the register number associated with that name, return
568 the integer value associated with the given name or -1 on failure. */
569
570static int reg_name_search
571 PARAMS ((const struct pd_reg *, int, const char * name));
572
573static int
574reg_name_search (regs, regcount, name)
575 const struct pd_reg *regs;
576 int regcount;
577 const char *name;
578{
579 int middle, low, high;
580 int cmp;
581
582 low = 0;
583 high = regcount - 1;
584
585 do
586 {
587 middle = (low + high) / 2;
588 cmp = strcasecmp (name, regs[middle].name);
589 if (cmp < 0)
590 high = middle - 1;
591 else if (cmp > 0)
592 low = middle + 1;
593 else
594 return regs[middle].value;
595 }
596 while (low <= high);
597
598 return -1;
599}
600
601/*
99a814a1 602 * Summary of register_name.
252b5132
RH		 603 *
604 * in: Input_line_pointer points to 1st char of operand.
605 *
606 * out: A expressionS.
607 * The operand may have been a register: in this case, X_op == O_register,
608 * X_add_number is set to the register number, and truth is returned.
609 * Input_line_pointer->(next non-blank) char after operand, or is in its
610 * original state.
611 */
612
b34976b6 613static bfd_boolean
252b5132
RH		 614register_name (expressionP)
615 expressionS *expressionP;
616{
617 int reg_number;
618 char *name;
619 char *start;
620 char c;
621
99a814a1 622 /* Find the spelling of the operand. */
252b5132 623 start = name = input_line_pointer;
3882b010 624 if (name[0] == '%' && ISALPHA (name[1]))
252b5132
RH		 625 name = ++input_line_pointer;
626
3882b010 627 else if (!reg_names_p || !ISALPHA (name[0]))
b34976b6 628 return FALSE;
252b5132
RH		 629
630 c = get_symbol_end ();
631 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
632
468cced8
AM		 633 /* Put back the delimiting char. */
634 *input_line_pointer = c;
635
99a814a1 636 /* Look to see if it's in the register table. */
81d4177b 637 if (reg_number >= 0)
252b5132
RH		 638 {
639 expressionP->X_op = O_register;
640 expressionP->X_add_number = reg_number;
81d4177b 641
99a814a1 642 /* Make the rest nice. */
252b5132
RH		 643 expressionP->X_add_symbol = NULL;
644 expressionP->X_op_symbol = NULL;
b34976b6 645 return TRUE;
252b5132 646 }
468cced8
AM		 647
648 /* Reset the line as if we had not done anything. */
649 input_line_pointer = start;
b34976b6 650 return FALSE;
252b5132
RH		 651}
652\f
653/* This function is called for each symbol seen in an expression. It
654 handles the special parsing which PowerPC assemblers are supposed
655 to use for condition codes. */
656
657/* Whether to do the special parsing. */
b34976b6 658static bfd_boolean cr_operand;
252b5132
RH		 659
660/* Names to recognize in a condition code. This table is sorted. */
661static const struct pd_reg cr_names[] =
662{
663 { "cr0", 0 },
664 { "cr1", 1 },
665 { "cr2", 2 },
666 { "cr3", 3 },
667 { "cr4", 4 },
668 { "cr5", 5 },
669 { "cr6", 6 },
670 { "cr7", 7 },
671 { "eq", 2 },
672 { "gt", 1 },
673 { "lt", 0 },
674 { "so", 3 },
675 { "un", 3 }
676};
677
678/* Parsing function. This returns non-zero if it recognized an
679 expression. */
680
681int
682ppc_parse_name (name, expr)
683 const char *name;
684 expressionS *expr;
685{
686 int val;
687
688 if (! cr_operand)
689 return 0;
690
691 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
692 name);
693 if (val < 0)
694 return 0;
695
696 expr->X_op = O_constant;
697 expr->X_add_number = val;
698
699 return 1;
700}
701\f
702/* Local variables. */
703
704/* The type of processor we are assembling for. This is one or more
705 of the PPC_OPCODE flags defined in opcode/ppc.h. */
2b3c4602 706static unsigned long ppc_cpu = 0;
252b5132 707
2b3c4602
AM		 708/* Whether to target xcoff64/elf64. */
709static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
7f6d05e8 710
252b5132
RH		 711/* Opcode hash table. */
712static struct hash_control *ppc_hash;
713
714/* Macro hash table. */
715static struct hash_control *ppc_macro_hash;
716
717#ifdef OBJ_ELF
99a814a1 718/* What type of shared library support to use. */
5d6f4f16 719static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
252b5132 720
99a814a1 721/* Flags to set in the elf header. */
252b5132
RH		 722static flagword ppc_flags = 0;
723
724/* Whether this is Solaris or not. */
725#ifdef TARGET_SOLARIS_COMMENT
b34976b6 726#define SOLARIS_P TRUE
252b5132 727#else
b34976b6 728#define SOLARIS_P FALSE
252b5132
RH		 729#endif
730
b34976b6 731static bfd_boolean msolaris = SOLARIS_P;
252b5132
RH		 732#endif
733
734#ifdef OBJ_XCOFF
735
736/* The RS/6000 assembler uses the .csect pseudo-op to generate code
737 using a bunch of different sections. These assembler sections,
738 however, are all encompassed within the .text or .data sections of
739 the final output file. We handle this by using different
740 subsegments within these main segments. */
741
742/* Next subsegment to allocate within the .text segment. */
743static subsegT ppc_text_subsegment = 2;
744
745/* Linked list of csects in the text section. */
746static symbolS *ppc_text_csects;
747
748/* Next subsegment to allocate within the .data segment. */
749static subsegT ppc_data_subsegment = 2;
750
751/* Linked list of csects in the data section. */
752static symbolS *ppc_data_csects;
753
754/* The current csect. */
755static symbolS *ppc_current_csect;
756
757/* The RS/6000 assembler uses a TOC which holds addresses of functions
758 and variables. Symbols are put in the TOC with the .tc pseudo-op.
759 A special relocation is used when accessing TOC entries. We handle
760 the TOC as a subsegment within the .data segment. We set it up if
761 we see a .toc pseudo-op, and save the csect symbol here. */
762static symbolS *ppc_toc_csect;
763
764/* The first frag in the TOC subsegment. */
765static fragS *ppc_toc_frag;
766
767/* The first frag in the first subsegment after the TOC in the .data
768 segment. NULL if there are no subsegments after the TOC. */
769static fragS *ppc_after_toc_frag;
770
771/* The current static block. */
772static symbolS *ppc_current_block;
773
774/* The COFF debugging section; set by md_begin. This is not the
775 .debug section, but is instead the secret BFD section which will
776 cause BFD to set the section number of a symbol to N_DEBUG. */
777static asection *ppc_coff_debug_section;
778
779#endif /* OBJ_XCOFF */
780
781#ifdef TE_PE
782
783/* Various sections that we need for PE coff support. */
784static segT ydata_section;
785static segT pdata_section;
786static segT reldata_section;
787static segT rdata_section;
788static segT tocdata_section;
789
81d4177b 790/* The current section and the previous section. See ppc_previous. */
252b5132
RH		 791static segT ppc_previous_section;
792static segT ppc_current_section;
793
794#endif /* TE_PE */
795
796#ifdef OBJ_ELF
797symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
6a0c61b7
EZ		 798#define PPC_APUINFO_ISEL 0x40
799#define PPC_APUINFO_PMR 0x41
800#define PPC_APUINFO_RFMCI 0x42
801#define PPC_APUINFO_CACHELCK 0x43
802#define PPC_APUINFO_SPE 0x100
803#define PPC_APUINFO_EFS 0x101
804#define PPC_APUINFO_BRLOCK 0x102
805
b34976b6
AM		 806/*
807 * We keep a list of APUinfo
6a0c61b7
EZ		 808 */
809unsigned long *ppc_apuinfo_list;
810unsigned int ppc_apuinfo_num;
811unsigned int ppc_apuinfo_num_alloc;
252b5132
RH		 812#endif /* OBJ_ELF */
813\f
814#ifdef OBJ_ELF
15c1449b 815const char *const md_shortopts = "b:l:usm:K:VQ:";
252b5132 816#else
15c1449b 817const char *const md_shortopts = "um:";
252b5132 818#endif
15c1449b 819const struct option md_longopts[] = {
252b5132
RH		 820 {NULL, no_argument, NULL, 0}
821};
15c1449b 822const size_t md_longopts_size = sizeof (md_longopts);
252b5132 823
69c040df
AM		 824
825/* Handle -m options that set cpu type, and .machine arg. */
826
827static int
828parse_cpu (const char *arg)
829{
830 /* -mpwrx and -mpwr2 mean to assemble for the IBM POWER/2
831 (RIOS2). */
832 if (strcmp (arg, "pwrx") == 0 || strcmp (arg, "pwr2") == 0)
833 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32;
834 /* -mpwr means to assemble for the IBM POWER (RIOS1). */
835 else if (strcmp (arg, "pwr") == 0)
836 ppc_cpu = PPC_OPCODE_POWER | PPC_OPCODE_32;
837 /* -m601 means to assemble for the PowerPC 601, which includes
838 instructions that are holdovers from the Power. */
839 else if (strcmp (arg, "601") == 0)
840 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
841 | PPC_OPCODE_601 | PPC_OPCODE_32);
842 /* -mppc, -mppc32, -m603, and -m604 mean to assemble for the
843 PowerPC 603/604. */
844 else if (strcmp (arg, "ppc") == 0
845 || strcmp (arg, "ppc32") == 0
846 || strcmp (arg, "603") == 0
847 || strcmp (arg, "604") == 0)
848 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
849 /* -m403 and -m405 mean to assemble for the PowerPC 403/405. */
850 else if (strcmp (arg, "403") == 0
851 || strcmp (arg, "405") == 0)
852 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
853 | PPC_OPCODE_403 | PPC_OPCODE_32);
854 else if (strcmp (arg, "440") == 0)
855 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32
856 | PPC_OPCODE_440 | PPC_OPCODE_ISEL | PPC_OPCODE_RFMCI);
857 else if (strcmp (arg, "7400") == 0
858 || strcmp (arg, "7410") == 0
859 || strcmp (arg, "7450") == 0
860 || strcmp (arg, "7455") == 0)
861 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
862 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_32);
36ae0db3
DJ		 863 else if (strcmp (arg, "e300") == 0)
864 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32
865 | PPC_OPCODE_E300);
69c040df
AM		 866 else if (strcmp (arg, "altivec") == 0)
867 {
868 if (ppc_cpu == 0)
869 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ALTIVEC;
870 else
871 ppc_cpu |= PPC_OPCODE_ALTIVEC;
872 }
873 else if (strcmp (arg, "e500") == 0 || strcmp (arg, "e500x2") == 0)
874 {
875 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
876 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
877 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
878 | PPC_OPCODE_RFMCI);
879 }
880 else if (strcmp (arg, "spe") == 0)
881 {
882 if (ppc_cpu == 0)
883 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_SPE | PPC_OPCODE_EFS;
884 else
885 ppc_cpu |= PPC_OPCODE_SPE;
886 }
887 /* -mppc64 and -m620 mean to assemble for the 64-bit PowerPC
888 620. */
889 else if (strcmp (arg, "ppc64") == 0 || strcmp (arg, "620") == 0)
890 {
891 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
892 }
893 else if (strcmp (arg, "ppc64bridge") == 0)
894 {
895 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
896 | PPC_OPCODE_64_BRIDGE | PPC_OPCODE_64);
897 }
898 /* -mbooke/-mbooke32 mean enable 32-bit BookE support. */
899 else if (strcmp (arg, "booke") == 0 || strcmp (arg, "booke32") == 0)
900 {
901 ppc_cpu = PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_32;
902 }
903 /* -mbooke64 means enable 64-bit BookE support. */
904 else if (strcmp (arg, "booke64") == 0)
905 {
906 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE
907 | PPC_OPCODE_BOOKE64 | PPC_OPCODE_64);
908 }
909 else if (strcmp (arg, "power4") == 0)
910 {
911 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
912 | PPC_OPCODE_64 | PPC_OPCODE_POWER4);
913 }
b0648eec
AM		 914 else if (strcmp (arg, "power5") == 0)
915 {
916 ppc_cpu = (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC
917 | PPC_OPCODE_64 | PPC_OPCODE_POWER4
918 | PPC_OPCODE_POWER5);
919 }
69c040df
AM		 920 /* -mcom means assemble for the common intersection between Power
921 and PowerPC. At present, we just allow the union, rather
922 than the intersection. */
923 else if (strcmp (arg, "com") == 0)
924 ppc_cpu = PPC_OPCODE_COMMON | PPC_OPCODE_32;
925 /* -many means to assemble for any architecture (PWR/PWRX/PPC). */
926 else if (strcmp (arg, "any") == 0)
927 ppc_cpu |= PPC_OPCODE_ANY;
928 else
929 return 0;
930
931 return 1;
932}
933
252b5132
RH		 934int
935md_parse_option (c, arg)
936 int c;
937 char *arg;
938{
939 switch (c)
940 {
941 case 'u':
942 /* -u means that any undefined symbols should be treated as
943 external, which is the default for gas anyhow. */
944 break;
945
946#ifdef OBJ_ELF
947 case 'l':
948 /* Solaris as takes -le (presumably for little endian). For completeness
99a814a1 949 sake, recognize -be also. */
252b5132
RH		 950 if (strcmp (arg, "e") == 0)
951 {
952 target_big_endian = 0;
953 set_target_endian = 1;
954 }
955 else
956 return 0;
957
958 break;
959
960 case 'b':
961 if (strcmp (arg, "e") == 0)
962 {
963 target_big_endian = 1;
964 set_target_endian = 1;
965 }
966 else
967 return 0;
968
969 break;
970
971 case 'K':
99a814a1 972 /* Recognize -K PIC. */
252b5132
RH		 973 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
974 {
975 shlib = SHLIB_PIC;
976 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
977 }
978 else
979 return 0;
980
981 break;
982#endif
983
7f6d05e8
CP		 984 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
985 case 'a':
986 if (strcmp (arg, "64") == 0)
2a98c3a6
AM		 987 {
988#ifdef BFD64
989 ppc_obj64 = 1;
990#else
991 as_fatal (_("%s unsupported"), "-a64");
992#endif
993 }
7f6d05e8 994 else if (strcmp (arg, "32") == 0)
2b3c4602 995 ppc_obj64 = 0;
7f6d05e8
CP		 996 else
997 return 0;
998 break;
81d4177b 999
252b5132 1000 case 'm':
69c040df
AM		 1001 if (parse_cpu (arg))
1002 ;
252b5132
RH		 1003
1004 else if (strcmp (arg, "regnames") == 0)
b34976b6 1005 reg_names_p = TRUE;
252b5132
RH		 1006
1007 else if (strcmp (arg, "no-regnames") == 0)
b34976b6 1008 reg_names_p = FALSE;
252b5132
RH		 1009
1010#ifdef OBJ_ELF
99a814a1
AM		 1011 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1012 that require relocation. */
252b5132
RH		 1013 else if (strcmp (arg, "relocatable") == 0)
1014 {
5d6f4f16 1015 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1016 ppc_flags |= EF_PPC_RELOCATABLE;
1017 }
1018
1019 else if (strcmp (arg, "relocatable-lib") == 0)
1020 {
5d6f4f16 1021 shlib = SHLIB_MRELOCATABLE;
252b5132
RH		 1022 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1023 }
1024
99a814a1 1025 /* -memb, set embedded bit. */
252b5132
RH		 1026 else if (strcmp (arg, "emb") == 0)
1027 ppc_flags |= EF_PPC_EMB;
1028
99a814a1
AM		 1029 /* -mlittle/-mbig set the endianess. */
1030 else if (strcmp (arg, "little") == 0
1031 || strcmp (arg, "little-endian") == 0)
252b5132
RH		 1032 {
1033 target_big_endian = 0;
1034 set_target_endian = 1;
1035 }
1036
1037 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1038 {
1039 target_big_endian = 1;
1040 set_target_endian = 1;
1041 }
1042
1043 else if (strcmp (arg, "solaris") == 0)
1044 {
b34976b6 1045 msolaris = TRUE;
252b5132
RH		 1046 ppc_comment_chars = ppc_solaris_comment_chars;
1047 }
1048
1049 else if (strcmp (arg, "no-solaris") == 0)
1050 {
b34976b6 1051 msolaris = FALSE;
252b5132
RH		 1052 ppc_comment_chars = ppc_eabi_comment_chars;
1053 }
1054#endif
1055 else
1056 {
1057 as_bad (_("invalid switch -m%s"), arg);
1058 return 0;
1059 }
1060 break;
1061
1062#ifdef OBJ_ELF
1063 /* -V: SVR4 argument to print version ID. */
1064 case 'V':
1065 print_version_id ();
1066 break;
1067
1068 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1069 should be emitted or not. FIXME: Not implemented. */
1070 case 'Q':
1071 break;
1072
1073 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1074 rather than .stabs.excl, which is ignored by the linker.
1075 FIXME: Not implemented. */
1076 case 's':
1077 if (arg)
1078 return 0;
1079
1080 break;
1081#endif
1082
1083 default:
1084 return 0;
1085 }
1086
1087 return 1;
1088}
1089
1090void
1091md_show_usage (stream)
1092 FILE *stream;
1093{
bc805888 1094 fprintf (stream, _("\
252b5132 1095PowerPC options:\n\
df12615d
AM		 1096-a32 generate ELF32/XCOFF32\n\
1097-a64 generate ELF64/XCOFF64\n\
252b5132 1098-u ignored\n\
23e1d84c
AM		 1099-mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1100-mpwr generate code for POWER (RIOS1)\n\
1101-m601 generate code for PowerPC 601\n\
418c1742 1102-mppc, -mppc32, -m603, -m604\n\
23e1d84c 1103 generate code for PowerPC 603/604\n\
df12615d 1104-m403, -m405 generate code for PowerPC 403/405\n\
3d8aea2f 1105-m440 generate code for PowerPC 440\n\
f5c120c5 1106-m7400, -m7410, -m7450, -m7455\n\
df12615d
AM		 1107 generate code For PowerPC 7400/7410/7450/7455\n"));
1108 fprintf (stream, _("\
23e1d84c 1109-mppc64, -m620 generate code for PowerPC 620/625/630\n\
d0e9a01c 1110-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
a09cf9bd
MG		 1111-mbooke64 generate code for 64-bit PowerPC BookE\n\
1112-mbooke, mbooke32 generate code for 32-bit PowerPC BookE\n\
23e1d84c 1113-mpower4 generate code for Power4 architecture\n\
b0648eec 1114-mpower5 generate code for Power5 architecture\n\
252b5132 1115-mcom generate code Power/PowerPC common instructions\n\
df12615d 1116-many generate code for any architecture (PWR/PWRX/PPC)\n"));
6a0c61b7 1117 fprintf (stream, _("\
df12615d 1118-maltivec generate code for AltiVec\n\
36ae0db3 1119-me300 generate code for PowerPC e300 family\n\
6a0c61b7 1120-me500, -me500x2 generate code for Motorola e500 core complex\n\
df12615d
AM		 1121-mspe generate code for Motorola SPE instructions\n\
1122-mregnames Allow symbolic names for registers\n\
1123-mno-regnames Do not allow symbolic names for registers\n"));
252b5132 1124#ifdef OBJ_ELF
bc805888 1125 fprintf (stream, _("\
252b5132
RH		 1126-mrelocatable support for GCC's -mrelocatble option\n\
1127-mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1128-memb set PPC_EMB bit in ELF flags\n\
df12615d 1129-mlittle, -mlittle-endian, -l, -le\n\
252b5132 1130 generate code for a little endian machine\n\
df12615d
AM		 1131-mbig, -mbig-endian, -b, -be\n\
1132 generate code for a big endian machine\n\
252b5132
RH		 1133-msolaris generate code for Solaris\n\
1134-mno-solaris do not generate code for Solaris\n\
1135-V print assembler version number\n\
1136-Qy, -Qn ignored\n"));
1137#endif
1138}
1139\f
1140/* Set ppc_cpu if it is not already set. */
1141
1142static void
1143ppc_set_cpu ()
1144{
1145 const char *default_os = TARGET_OS;
1146 const char *default_cpu = TARGET_CPU;
1147
3c9030c1 1148 if ((ppc_cpu & ~PPC_OPCODE_ANY) == 0)
252b5132 1149 {
2a98c3a6 1150 if (ppc_obj64)
3c9030c1 1151 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64;
2a98c3a6
AM		 1152 else if (strncmp (default_os, "aix", 3) == 0
1153 && default_os[3] >= '4' && default_os[3] <= '9')
3c9030c1 1154 ppc_cpu |= PPC_OPCODE_COMMON | PPC_OPCODE_32;
252b5132 1155 else if (strncmp (default_os, "aix3", 4) == 0)
3c9030c1 1156 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
252b5132 1157 else if (strcmp (default_cpu, "rs6000") == 0)
3c9030c1 1158 ppc_cpu |= PPC_OPCODE_POWER | PPC_OPCODE_32;
0baf16f2 1159 else if (strncmp (default_cpu, "powerpc", 7) == 0)
23d36e92 1160 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32;
252b5132 1161 else
99a814a1
AM		 1162 as_fatal (_("Unknown default cpu = %s, os = %s"),
1163 default_cpu, default_os);
252b5132
RH		 1164 }
1165}
1166
9232bbb0
AM		 1167/* Figure out the BFD architecture to use. This function and ppc_mach
1168 are called well before md_begin, when the output file is opened. */
252b5132
RH		 1169
1170enum bfd_architecture
1171ppc_arch ()
1172{
1173 const char *default_cpu = TARGET_CPU;
1174 ppc_set_cpu ();
1175
1176 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1177 return bfd_arch_powerpc;
1178 else if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1179 return bfd_arch_rs6000;
1180 else if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1181 {
1182 if (strcmp (default_cpu, "rs6000") == 0)
1183 return bfd_arch_rs6000;
0baf16f2 1184 else if (strncmp (default_cpu, "powerpc", 7) == 0)
252b5132
RH		 1185 return bfd_arch_powerpc;
1186 }
1187
1188 as_fatal (_("Neither Power nor PowerPC opcodes were selected."));
1189 return bfd_arch_unknown;
1190}
1191
7f6d05e8
CP		 1192unsigned long
1193ppc_mach ()
1194{
2a98c3a6
AM		 1195 if (ppc_obj64)
1196 return bfd_mach_ppc64;
1197 else if (ppc_arch () == bfd_arch_rs6000)
1198 return bfd_mach_rs6k;
1199 else
1200 return bfd_mach_ppc;
7f6d05e8
CP		 1201}
1202
81d4177b 1203extern char*
99a814a1 1204ppc_target_format ()
7f6d05e8
CP		 1205{
1206#ifdef OBJ_COFF
1207#ifdef TE_PE
99a814a1 1208 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
7f6d05e8 1209#elif TE_POWERMAC
0baf16f2 1210 return "xcoff-powermac";
7f6d05e8 1211#else
eb1e0e80 1212# ifdef TE_AIX5
2b3c4602 1213 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1214# else
2b3c4602 1215 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
eb1e0e80 1216# endif
7f6d05e8 1217#endif
7f6d05e8
CP		 1218#endif
1219#ifdef OBJ_ELF
9d8504b1
PB		 1220# ifdef TE_VXWORKS
1221 return "elf32-powerpc-vxworks";
1222# else
0baf16f2 1223 return (target_big_endian
2b3c4602
AM		 1224 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1225 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
9d8504b1 1226# endif
7f6d05e8
CP		 1227#endif
1228}
1229
69c040df
AM		 1230/* Insert opcodes and macros into hash tables. Called at startup and
1231 for .cpu pseudo. */
252b5132 1232
69c040df
AM		 1233static void
1234ppc_setup_opcodes (void)
252b5132
RH		 1235{
1236 register const struct powerpc_opcode *op;
1237 const struct powerpc_opcode *op_end;
1238 const struct powerpc_macro *macro;
1239 const struct powerpc_macro *macro_end;
b34976b6 1240 bfd_boolean dup_insn = FALSE;
252b5132 1241
69c040df
AM		 1242 if (ppc_hash != NULL)
1243 hash_die (ppc_hash);
1244 if (ppc_macro_hash != NULL)
1245 hash_die (ppc_macro_hash);
252b5132
RH		 1246
1247 /* Insert the opcodes into a hash table. */
1248 ppc_hash = hash_new ();
1249
1250 op_end = powerpc_opcodes + powerpc_num_opcodes;
1251 for (op = powerpc_opcodes; op < op_end; op++)
1252 {
1253 know ((op->opcode & op->mask) == op->opcode);
1254
2b3c4602 1255 if ((op->flags & ppc_cpu & ~(PPC_OPCODE_32 | PPC_OPCODE_64)) != 0
252b5132 1256 && ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64)) == 0
2b3c4602
AM		 1257 || ((op->flags & (PPC_OPCODE_32 | PPC_OPCODE_64))
1258 == (ppc_cpu & (PPC_OPCODE_32 | PPC_OPCODE_64)))
23e1d84c 1259 || (ppc_cpu & PPC_OPCODE_64_BRIDGE) != 0)
341026c1
NC		 1260 /* Certain instructions (eg: extsw) do not exist in the
1261 32-bit BookE instruction set, but they do exist in the
1262 64-bit BookE instruction set, and other PPC instruction
1263 sets. Check to see if the opcode has the BOOKE64 flag set.
1264 If it does make sure that the target CPU is not the BookE32. */
1265 && ((op->flags & PPC_OPCODE_BOOKE64) == 0
1266 || (ppc_cpu & PPC_OPCODE_BOOKE64) == PPC_OPCODE_BOOKE64
1267 || (ppc_cpu & PPC_OPCODE_BOOKE) == 0)
23e1d84c
AM		 1268 && ((op->flags & (PPC_OPCODE_POWER4 | PPC_OPCODE_NOPOWER4)) == 0
1269 || ((op->flags & PPC_OPCODE_POWER4)
b0648eec
AM		 1270 == (ppc_cpu & PPC_OPCODE_POWER4)))
1271 && ((op->flags & PPC_OPCODE_POWER5) == 0
1272 || ((op->flags & PPC_OPCODE_POWER5)
1273 == (ppc_cpu & PPC_OPCODE_POWER5))))
252b5132
RH		 1274 {
1275 const char *retval;
1276
1277 retval = hash_insert (ppc_hash, op->name, (PTR) op);
69c040df 1278 if (retval != NULL)
252b5132 1279 {
99a814a1 1280 /* Ignore Power duplicates for -m601. */
252b5132
RH		 1281 if ((ppc_cpu & PPC_OPCODE_601) != 0
1282 && (op->flags & PPC_OPCODE_POWER) != 0)
1283 continue;
1284
99a814a1
AM		 1285 as_bad (_("Internal assembler error for instruction %s"),
1286 op->name);
b34976b6 1287 dup_insn = TRUE;
252b5132
RH		 1288 }
1289 }
1290 }
1291
3c9030c1
AM		 1292 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1293 for (op = powerpc_opcodes; op < op_end; op++)
1294 hash_insert (ppc_hash, op->name, (PTR) op);
1295
252b5132
RH		 1296 /* Insert the macros into a hash table. */
1297 ppc_macro_hash = hash_new ();
1298
1299 macro_end = powerpc_macros + powerpc_num_macros;
1300 for (macro = powerpc_macros; macro < macro_end; macro++)
1301 {
1302 if ((macro->flags & ppc_cpu) != 0)
1303 {
1304 const char *retval;
1305
1306 retval = hash_insert (ppc_macro_hash, macro->name, (PTR) macro);
1307 if (retval != (const char *) NULL)
1308 {
1309 as_bad (_("Internal assembler error for macro %s"), macro->name);
b34976b6 1310 dup_insn = TRUE;
252b5132
RH		 1311 }
1312 }
1313 }
1314
1315 if (dup_insn)
1316 abort ();
69c040df
AM		 1317}
1318
1319/* This function is called when the assembler starts up. It is called
1320 after the options have been parsed and the output file has been
1321 opened. */
1322
1323void
1324md_begin ()
1325{
1326 ppc_set_cpu ();
1327
1328 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1329
1330#ifdef OBJ_ELF
1331 /* Set the ELF flags if desired. */
1332 if (ppc_flags && !msolaris)
1333 bfd_set_private_flags (stdoutput, ppc_flags);
1334#endif
1335
1336 ppc_setup_opcodes ();
252b5132 1337
67c1ffbe 1338 /* Tell the main code what the endianness is if it is not overridden
99a814a1 1339 by the user. */
252b5132
RH		 1340 if (!set_target_endian)
1341 {
1342 set_target_endian = 1;
1343 target_big_endian = PPC_BIG_ENDIAN;
1344 }
1345
1346#ifdef OBJ_XCOFF
1347 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1348
1349 /* Create dummy symbols to serve as initial csects. This forces the
1350 text csects to precede the data csects. These symbols will not
1351 be output. */
1352 ppc_text_csects = symbol_make ("dummy\001");
809ffe0d 1353 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
252b5132 1354 ppc_data_csects = symbol_make ("dummy\001");
809ffe0d 1355 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
252b5132
RH		 1356#endif
1357
1358#ifdef TE_PE
1359
1360 ppc_current_section = text_section;
81d4177b 1361 ppc_previous_section = 0;
252b5132
RH		 1362
1363#endif
1364}
1365
6a0c61b7
EZ		 1366void
1367ppc_cleanup ()
1368{
dc1d03fc 1369#ifdef OBJ_ELF
6a0c61b7
EZ		 1370 if (ppc_apuinfo_list == NULL)
1371 return;
1372
1373 /* Ok, so write the section info out. We have this layout:
1374
1375 byte data what
1376 ---- ---- ----
1377 0 8 length of "APUinfo\0"
1378 4 (n*4) number of APU's (4 bytes each)
1379 8 2 note type 2
1380 12 "APUinfo\0" name
1381 20 APU#1 first APU's info
1382 24 APU#2 second APU's info
1383 ... ...
1384 */
1385 {
1386 char *p;
1387 asection *seg = now_seg;
1388 subsegT subseg = now_subseg;
1389 asection *apuinfo_secp = (asection *) NULL;
49181a6a 1390 unsigned int i;
6a0c61b7
EZ		 1391
1392 /* Create the .PPC.EMB.apuinfo section. */
1393 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1394 bfd_set_section_flags (stdoutput,
1395 apuinfo_secp,
e1a9cb8e 1396 SEC_HAS_CONTENTS | SEC_READONLY);
6a0c61b7
EZ		 1397
1398 p = frag_more (4);
1399 md_number_to_chars (p, (valueT) 8, 4);
1400
1401 p = frag_more (4);
e98d298c 1402 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
6a0c61b7
EZ		 1403
1404 p = frag_more (4);
1405 md_number_to_chars (p, (valueT) 2, 4);
1406
1407 p = frag_more (8);
1408 strcpy (p, "APUinfo");
1409
1410 for (i = 0; i < ppc_apuinfo_num; i++)
1411 {
b34976b6
AM		 1412 p = frag_more (4);
1413 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
6a0c61b7
EZ		 1414 }
1415
1416 frag_align (2, 0, 0);
1417
1418 /* We probably can't restore the current segment, for there likely
1419 isn't one yet... */
1420 if (seg && subseg)
1421 subseg_set (seg, subseg);
1422 }
dc1d03fc 1423#endif
6a0c61b7
EZ		 1424}
1425
252b5132
RH		 1426/* Insert an operand value into an instruction. */
1427
1428static unsigned long
1429ppc_insert_operand (insn, operand, val, file, line)
1430 unsigned long insn;
1431 const struct powerpc_operand *operand;
1432 offsetT val;
1433 char *file;
1434 unsigned int line;
1435{
1436 if (operand->bits != 32)
1437 {
1438 long min, max;
1439 offsetT test;
1440
1441 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1442 {
d0e9a01c 1443 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
252b5132
RH		 1444 max = (1 << operand->bits) - 1;
1445 else
1446 max = (1 << (operand->bits - 1)) - 1;
1447 min = - (1 << (operand->bits - 1));
1448
2b3c4602 1449 if (!ppc_obj64)
252b5132
RH		 1450 {
1451 /* Some people write 32 bit hex constants with the sign
1452 extension done by hand. This shouldn't really be
1453 valid, but, to permit this code to assemble on a 64
1454 bit host, we sign extend the 32 bit value. */
1455 if (val > 0
92161534
ILT		 1456 && (val & (offsetT) 0x80000000) != 0
1457 && (val & (offsetT) 0xffffffff) == val)
252b5132
RH		 1458 {
1459 val -= 0x80000000;
1460 val -= 0x80000000;
1461 }
1462 }
1463 }
1464 else
1465 {
1466 max = (1 << operand->bits) - 1;
1467 min = 0;
1468 }
1469
1470 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1471 test = - val;
1472 else
1473 test = val;
1474
1475 if (test < (offsetT) min || test > (offsetT) max)
e5976317 1476 as_bad_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line);
252b5132
RH		 1477 }
1478
1479 if (operand->insert)
1480 {
1481 const char *errmsg;
1482
1483 errmsg = NULL;
2b3c4602 1484 insn = (*operand->insert) (insn, (long) val, ppc_cpu, &errmsg);
252b5132 1485 if (errmsg != (const char *) NULL)
0baf16f2 1486 as_bad_where (file, line, errmsg);
252b5132
RH		 1487 }
1488 else
1489 insn |= (((long) val & ((1 << operand->bits) - 1))
1490 << operand->shift);
1491
1492 return insn;
1493}
1494
1495\f
1496#ifdef OBJ_ELF
1497/* Parse @got, etc. and return the desired relocation. */
1498static bfd_reloc_code_real_type
1499ppc_elf_suffix (str_p, exp_p)
1500 char **str_p;
1501 expressionS *exp_p;
1502{
1503 struct map_bfd {
1504 char *string;
b7d7dc63
AM		 1505 unsigned int length : 8;
1506 unsigned int valid32 : 1;
1507 unsigned int valid64 : 1;
1508 unsigned int reloc;
252b5132
RH		 1509 };
1510
1511 char ident[20];
1512 char *str = *str_p;
1513 char *str2;
1514 int ch;
1515 int len;
15c1449b 1516 const struct map_bfd *ptr;
252b5132 1517
b7d7dc63
AM		 1518#define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1519#define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1520#define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
252b5132 1521
15c1449b 1522 static const struct map_bfd mapping[] = {
b7d7dc63
AM		 1523 MAP ("l", BFD_RELOC_LO16),
1524 MAP ("h", BFD_RELOC_HI16),
1525 MAP ("ha", BFD_RELOC_HI16_S),
1526 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1527 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1528 MAP ("got", BFD_RELOC_16_GOTOFF),
1529 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1530 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1531 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1532 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1533 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1534 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1535 MAP ("copy", BFD_RELOC_PPC_COPY),
1536 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1537 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1538 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1539 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1540 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1541 MAP ("tls", BFD_RELOC_PPC_TLS),
1542 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1543 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1544 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1545 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1546 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1547 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1548 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1549 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1550 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1551 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1552 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1553 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1554 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1555 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1556 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1557 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1558 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1559 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1560 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1561 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1562 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1563 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1564 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1565 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1566 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1567 MAP32 ("fixup", BFD_RELOC_CTOR),
1568 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1569 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1570 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1571 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1572 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1573 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1574 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1575 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1576 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1577 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1578 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1579 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1580 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1581 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1582 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1583 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1584 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1585 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1586 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1587 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1588 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1589 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1590 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1591 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1592 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1593 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1594 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1595 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1596 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1597 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1598 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1599 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1600 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1601 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1602 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1603 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1604 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1605 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1606 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1607 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1608 { (char *) 0, 0, 0, 0, BFD_RELOC_UNUSED }
252b5132
RH		 1609 };
1610
1611 if (*str++ != '@')
1612 return BFD_RELOC_UNUSED;
1613
1614 for (ch = *str, str2 = ident;
1615 (str2 < ident + sizeof (ident) - 1
3882b010 1616 && (ISALNUM (ch) || ch == '@'));
252b5132
RH		 1617 ch = *++str)
1618 {
3882b010 1619 *str2++ = TOLOWER (ch);
252b5132
RH		 1620 }
1621
1622 *str2 = '\0';
1623 len = str2 - ident;
1624
1625 ch = ident[0];
1626 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1627 if (ch == ptr->string[0]
1628 && len == ptr->length
b7d7dc63
AM		 1629 && memcmp (ident, ptr->string, ptr->length) == 0
1630 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
252b5132 1631 {
15c1449b
AM		 1632 int reloc = ptr->reloc;
1633
cdba85ec 1634 if (!ppc_obj64)
5f6db75a
AM		 1635 if (exp_p->X_add_number != 0
1636 && (reloc == (int) BFD_RELOC_16_GOTOFF
1637 || reloc == (int) BFD_RELOC_LO16_GOTOFF
1638 || reloc == (int) BFD_RELOC_HI16_GOTOFF
1639 || reloc == (int) BFD_RELOC_HI16_S_GOTOFF))
1640 as_warn (_("identifier+constant@got means identifier@got+constant"));
1641
1642 /* Now check for identifier@suffix+constant. */
1643 if (*str == '-' || *str == '+')
252b5132 1644 {
5f6db75a
AM		 1645 char *orig_line = input_line_pointer;
1646 expressionS new_exp;
1647
1648 input_line_pointer = str;
1649 expression (&new_exp);
1650 if (new_exp.X_op == O_constant)
252b5132 1651 {
5f6db75a
AM		 1652 exp_p->X_add_number += new_exp.X_add_number;
1653 str = input_line_pointer;
252b5132 1654 }
5f6db75a
AM		 1655
1656 if (&input_line_pointer != str_p)
1657 input_line_pointer = orig_line;
252b5132 1658 }
252b5132 1659 *str_p = str;
0baf16f2 1660
2b3c4602 1661 if (reloc == (int) BFD_RELOC_PPC64_TOC
9f2b53d7
AM		 1662 && exp_p->X_op == O_symbol
1663 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
0baf16f2 1664 {
9f2b53d7
AM		 1665 /* Change the symbol so that the dummy .TOC. symbol can be
1666 omitted from the object file. */
0baf16f2
AM		 1667 exp_p->X_add_symbol = &abs_symbol;
1668 }
1669
15c1449b 1670 return (bfd_reloc_code_real_type) reloc;
252b5132
RH		 1671 }
1672
1673 return BFD_RELOC_UNUSED;
1674}
1675
99a814a1
AM		 1676/* Like normal .long/.short/.word, except support @got, etc.
1677 Clobbers input_line_pointer, checks end-of-line. */
252b5132
RH		 1678static void
1679ppc_elf_cons (nbytes)
0baf16f2 1680 register int nbytes; /* 1=.byte, 2=.word, 4=.long, 8=.llong. */
252b5132
RH		 1681{
1682 expressionS exp;
1683 bfd_reloc_code_real_type reloc;
1684
1685 if (is_it_end_of_statement ())
1686 {
1687 demand_empty_rest_of_line ();
1688 return;
1689 }
1690
1691 do
1692 {
1693 expression (&exp);
1694 if (exp.X_op == O_symbol
1695 && *input_line_pointer == '@'
99a814a1
AM		 1696 && (reloc = ppc_elf_suffix (&input_line_pointer,
1697 &exp)) != BFD_RELOC_UNUSED)
252b5132 1698 {
99a814a1
AM		 1699 reloc_howto_type *reloc_howto;
1700 int size;
1701
1702 reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
1703 size = bfd_get_reloc_size (reloc_howto);
252b5132
RH		 1704
1705 if (size > nbytes)
0baf16f2
AM		 1706 {
1707 as_bad (_("%s relocations do not fit in %d bytes\n"),
1708 reloc_howto->name, nbytes);
1709 }
252b5132
RH		 1710 else
1711 {
0baf16f2
AM		 1712 char *p;
1713 int offset;
252b5132 1714
0baf16f2
AM		 1715 p = frag_more (nbytes);
1716 offset = 0;
1717 if (target_big_endian)
1718 offset = nbytes - size;
99a814a1
AM		 1719 fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size,
1720 &exp, 0, reloc);
252b5132
RH		 1721 }
1722 }
1723 else
1724 emit_expr (&exp, (unsigned int) nbytes);
1725 }
1726 while (*input_line_pointer++ == ',');
1727
99a814a1
AM		 1728 /* Put terminator back into stream. */
1729 input_line_pointer--;
252b5132
RH		 1730 demand_empty_rest_of_line ();
1731}
1732
1733/* Solaris pseduo op to change to the .rodata section. */
1734static void
1735ppc_elf_rdata (xxx)
1736 int xxx;
1737{
1738 char *save_line = input_line_pointer;
1739 static char section[] = ".rodata\n";
1740
99a814a1 1741 /* Just pretend this is .section .rodata */
252b5132
RH		 1742 input_line_pointer = section;
1743 obj_elf_section (xxx);
1744
1745 input_line_pointer = save_line;
1746}
1747
99a814a1 1748/* Pseudo op to make file scope bss items. */
252b5132 1749static void
99a814a1 1750ppc_elf_lcomm (xxx)
92161534 1751 int xxx ATTRIBUTE_UNUSED;
252b5132
RH		 1752{
1753 register char *name;
1754 register char c;
1755 register char *p;
1756 offsetT size;
1757 register symbolS *symbolP;
1758 offsetT align;
1759 segT old_sec;
1760 int old_subsec;
1761 char *pfrag;
1762 int align2;
1763
1764 name = input_line_pointer;
1765 c = get_symbol_end ();
1766
99a814a1 1767 /* just after name is now '\0'. */
252b5132
RH		 1768 p = input_line_pointer;
1769 *p = c;
1770 SKIP_WHITESPACE ();
1771 if (*input_line_pointer != ',')
1772 {
1773 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
1774 ignore_rest_of_line ();
1775 return;
1776 }
1777
1778 input_line_pointer++; /* skip ',' */
1779 if ((size = get_absolute_expression ()) < 0)
1780 {
1781 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
1782 ignore_rest_of_line ();
1783 return;
1784 }
1785
1786 /* The third argument to .lcomm is the alignment. */
1787 if (*input_line_pointer != ',')
1788 align = 8;
1789 else
1790 {
1791 ++input_line_pointer;
1792 align = get_absolute_expression ();
1793 if (align <= 0)
1794 {
1795 as_warn (_("ignoring bad alignment"));
1796 align = 8;
1797 }
1798 }
1799
1800 *p = 0;
1801 symbolP = symbol_find_or_make (name);
1802 *p = c;
1803
1804 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
1805 {
1806 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
1807 S_GET_NAME (symbolP));
1808 ignore_rest_of_line ();
1809 return;
1810 }
1811
1812 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
1813 {
1814 as_bad (_("Length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
1815 S_GET_NAME (symbolP),
1816 (long) S_GET_VALUE (symbolP),
1817 (long) size);
1818
1819 ignore_rest_of_line ();
1820 return;
1821 }
1822
99a814a1 1823 /* Allocate_bss. */
252b5132
RH		 1824 old_sec = now_seg;
1825 old_subsec = now_subseg;
1826 if (align)
1827 {
99a814a1 1828 /* Convert to a power of 2 alignment. */
252b5132
RH		 1829 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
1830 if (align != 1)
1831 {
1832 as_bad (_("Common alignment not a power of 2"));
1833 ignore_rest_of_line ();
1834 return;
1835 }
1836 }
1837 else
1838 align2 = 0;
1839
1840 record_alignment (bss_section, align2);
1841 subseg_set (bss_section, 0);
1842 if (align2)
1843 frag_align (align2, 0, 0);
1844 if (S_GET_SEGMENT (symbolP) == bss_section)
49309057
ILT		 1845 symbol_get_frag (symbolP)->fr_symbol = 0;
1846 symbol_set_frag (symbolP, frag_now);
252b5132
RH		 1847 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
1848 (char *) 0);
1849 *pfrag = 0;
1850 S_SET_SIZE (symbolP, size);
1851 S_SET_SEGMENT (symbolP, bss_section);
1852 subseg_set (old_sec, old_subsec);
1853 demand_empty_rest_of_line ();
1854}
1855
1856/* Validate any relocations emitted for -mrelocatable, possibly adding
1857 fixups for word relocations in writable segments, so we can adjust
1858 them at runtime. */
1859static void
1860ppc_elf_validate_fix (fixp, seg)
1861 fixS *fixp;
1862 segT seg;
1863{
1864 if (fixp->fx_done || fixp->fx_pcrel)
1865 return;
1866
1867 switch (shlib)
1868 {
1869 case SHLIB_NONE:
1870 case SHLIB_PIC:
1871 return;
1872
5d6f4f16 1873 case SHLIB_MRELOCATABLE:
252b5132
RH		 1874 if (fixp->fx_r_type <= BFD_RELOC_UNUSED
1875 && fixp->fx_r_type != BFD_RELOC_16_GOTOFF
1876 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
1877 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
1878 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
1cfc59d5 1879 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
252b5132
RH		 1880 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
1881 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
1882 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
e138127a 1883 && (seg->flags & SEC_LOAD) != 0
252b5132
RH		 1884 && strcmp (segment_name (seg), ".got2") != 0
1885 && strcmp (segment_name (seg), ".dtors") != 0
1886 && strcmp (segment_name (seg), ".ctors") != 0
1887 && strcmp (segment_name (seg), ".fixup") != 0
252b5132
RH		 1888 && strcmp (segment_name (seg), ".gcc_except_table") != 0
1889 && strcmp (segment_name (seg), ".eh_frame") != 0
1890 && strcmp (segment_name (seg), ".ex_shared") != 0)
1891 {
1892 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
1893 || fixp->fx_r_type != BFD_RELOC_CTOR)
1894 {
1895 as_bad_where (fixp->fx_file, fixp->fx_line,
1896 _("Relocation cannot be done when using -mrelocatable"));
1897 }
1898 }
1899 return;
1900 }
1901}
0baf16f2 1902
7e8d4ab4
AM		 1903/* Prevent elf_frob_file_before_adjust removing a weak undefined
1904 function descriptor sym if the corresponding code sym is used. */
1905
1906void
1907ppc_frob_file_before_adjust ()
0baf16f2 1908{
7e8d4ab4 1909 symbolS *symp;
9232bbb0 1910 asection *toc;
0baf16f2 1911
7e8d4ab4
AM		 1912 if (!ppc_obj64)
1913 return;
1914
1915 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
0baf16f2 1916 {
7e8d4ab4
AM		 1917 const char *name;
1918 char *dotname;
1919 symbolS *dotsym;
1920 size_t len;
1921
1922 name = S_GET_NAME (symp);
1923 if (name[0] == '.')
1924 continue;
1925
1926 if (! S_IS_WEAK (symp)
1927 || S_IS_DEFINED (symp))
1928 continue;
1929
1930 len = strlen (name) + 1;
1931 dotname = xmalloc (len + 1);
1932 dotname[0] = '.';
1933 memcpy (dotname + 1, name, len);
1934 dotsym = symbol_find (dotname);
1935 free (dotname);
1936 if (dotsym != NULL && (symbol_used_p (dotsym)
1937 || symbol_used_in_reloc_p (dotsym)))
670ec21d
NC		 1938 symbol_mark_used (symp);
1939
0baf16f2
AM		 1940 }
1941
9232bbb0
AM		 1942 toc = bfd_get_section_by_name (stdoutput, ".toc");
1943 if (toc != NULL
1944 && bfd_section_size (stdoutput, toc) > 0x10000)
1945 as_warn (_("TOC section size exceeds 64k"));
1946
7e8d4ab4
AM		 1947 /* Don't emit .TOC. symbol. */
1948 symp = symbol_find (".TOC.");
1949 if (symp != NULL)
1950 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
0baf16f2 1951}
252b5132
RH		 1952#endif /* OBJ_ELF */
1953\f
1954#ifdef TE_PE
1955
1956/*
99a814a1 1957 * Summary of parse_toc_entry.
252b5132
RH		 1958 *
1959 * in: Input_line_pointer points to the '[' in one of:
1960 *
1961 * [toc] [tocv] [toc32] [toc64]
1962 *
1963 * Anything else is an error of one kind or another.
1964 *
81d4177b 1965 * out:
252b5132
RH		 1966 * return value: success or failure
1967 * toc_kind: kind of toc reference
1968 * input_line_pointer:
1969 * success: first char after the ']'
1970 * failure: unchanged
1971 *
1972 * settings:
1973 *
1974 * [toc] - rv == success, toc_kind = default_toc
1975 * [tocv] - rv == success, toc_kind = data_in_toc
1976 * [toc32] - rv == success, toc_kind = must_be_32
1977 * [toc64] - rv == success, toc_kind = must_be_64
1978 *
1979 */
1980
81d4177b
KH		 1981enum toc_size_qualifier
1982{
252b5132
RH		 1983 default_toc, /* The toc cell constructed should be the system default size */
1984 data_in_toc, /* This is a direct reference to a toc cell */
1985 must_be_32, /* The toc cell constructed must be 32 bits wide */
1986 must_be_64 /* The toc cell constructed must be 64 bits wide */
1987};
1988
1989static int
99a814a1 1990parse_toc_entry (toc_kind)
252b5132
RH		 1991 enum toc_size_qualifier *toc_kind;
1992{
1993 char *start;
1994 char *toc_spec;
1995 char c;
1996 enum toc_size_qualifier t;
1997
99a814a1 1998 /* Save the input_line_pointer. */
252b5132
RH		 1999 start = input_line_pointer;
2000
99a814a1 2001 /* Skip over the '[' , and whitespace. */
252b5132
RH		 2002 ++input_line_pointer;
2003 SKIP_WHITESPACE ();
81d4177b 2004
99a814a1 2005 /* Find the spelling of the operand. */
252b5132
RH		 2006 toc_spec = input_line_pointer;
2007 c = get_symbol_end ();
2008
99a814a1 2009 if (strcmp (toc_spec, "toc") == 0)
252b5132
RH		 2010 {
2011 t = default_toc;
2012 }
99a814a1 2013 else if (strcmp (toc_spec, "tocv") == 0)
252b5132
RH		 2014 {
2015 t = data_in_toc;
2016 }
99a814a1 2017 else if (strcmp (toc_spec, "toc32") == 0)
252b5132
RH		 2018 {
2019 t = must_be_32;
2020 }
99a814a1 2021 else if (strcmp (toc_spec, "toc64") == 0)
252b5132
RH		 2022 {
2023 t = must_be_64;
2024 }
2025 else
2026 {
2027 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
99a814a1
AM		 2028 *input_line_pointer = c;
2029 input_line_pointer = start;
252b5132
RH		 2030 return 0;
2031 }
2032
99a814a1
AM		 2033 /* Now find the ']'. */
2034 *input_line_pointer = c;
252b5132 2035
81d4177b
KH		 2036 SKIP_WHITESPACE (); /* leading whitespace could be there. */
2037 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
252b5132
RH		 2038
2039 if (c != ']')
2040 {
2041 as_bad (_("syntax error: expected `]', found `%c'"), c);
99a814a1 2042 input_line_pointer = start;
252b5132
RH		 2043 return 0;
2044 }
2045
99a814a1 2046 *toc_kind = t;
252b5132
RH		 2047 return 1;
2048}
2049#endif
2050\f
2051
dc1d03fc 2052#ifdef OBJ_ELF
6a0c61b7
EZ		 2053#define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2054static void
dc1d03fc 2055ppc_apuinfo_section_add (apu, version)
6a0c61b7
EZ		 2056 unsigned int apu, version;
2057{
2058 unsigned int i;
2059
2060 /* Check we don't already exist. */
2061 for (i = 0; i < ppc_apuinfo_num; i++)
dc1d03fc 2062 if (ppc_apuinfo_list[i] == APUID (apu, version))
6a0c61b7 2063 return;
b34976b6 2064
6a0c61b7
EZ		 2065 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2066 {
2067 if (ppc_apuinfo_num_alloc == 0)
2068 {
2069 ppc_apuinfo_num_alloc = 4;
2070 ppc_apuinfo_list = (unsigned long *)
2071 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2072 }
2073 else
2074 {
2075 ppc_apuinfo_num_alloc += 4;
2076 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2077 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2078 }
2079 }
dc1d03fc 2080 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
6a0c61b7
EZ		 2081}
2082#undef APUID
dc1d03fc 2083#endif
6a0c61b7
EZ		 2084\f
2085
252b5132
RH		 2086/* We need to keep a list of fixups. We can't simply generate them as
2087 we go, because that would require us to first create the frag, and
2088 that would screw up references to ``.''. */
2089
2090struct ppc_fixup
2091{
2092 expressionS exp;
2093 int opindex;
2094 bfd_reloc_code_real_type reloc;
2095};
2096
2097#define MAX_INSN_FIXUPS (5)
2098
2099/* This routine is called for each instruction to be assembled. */
2100
2101void
2102md_assemble (str)
2103 char *str;
2104{
2105 char *s;
2106 const struct powerpc_opcode *opcode;
2107 unsigned long insn;
2108 const unsigned char *opindex_ptr;
2109 int skip_optional;
2110 int need_paren;
2111 int next_opindex;
2112 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2113 int fc;
2114 char *f;
09b935ac 2115 int addr_mod;
252b5132
RH		 2116 int i;
2117#ifdef OBJ_ELF
2118 bfd_reloc_code_real_type reloc;
2119#endif
2120
2121 /* Get the opcode. */
3882b010 2122 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132
RH		 2123 ;
2124 if (*s != '\0')
2125 *s++ = '\0';
2126
2127 /* Look up the opcode in the hash table. */
2128 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2129 if (opcode == (const struct powerpc_opcode *) NULL)
2130 {
2131 const struct powerpc_macro *macro;
2132
2133 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2134 if (macro == (const struct powerpc_macro *) NULL)
2135 as_bad (_("Unrecognized opcode: `%s'"), str);
2136 else
2137 ppc_macro (s, macro);
2138
2139 return;
2140 }
2141
2142 insn = opcode->opcode;
2143
2144 str = s;
3882b010 2145 while (ISSPACE (*str))
252b5132
RH		 2146 ++str;
2147
2148 /* PowerPC operands are just expressions. The only real issue is
2149 that a few operand types are optional. All cases which might use
1f6c9eb0
ZW		 2150 an optional operand separate the operands only with commas (in some
2151 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2152 have optional operands). Most instructions with optional operands
2153 have only one. Those that have more than one optional operand can
2154 take either all their operands or none. So, before we start seriously
2155 parsing the operands, we check to see if we have optional operands,
2156 and if we do, we count the number of commas to see which operands
2157 have been omitted. */
252b5132
RH		 2158 skip_optional = 0;
2159 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2160 {
2161 const struct powerpc_operand *operand;
2162
2163 operand = &powerpc_operands[*opindex_ptr];
2164 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2165 {
2166 unsigned int opcount;
7fe9cf6b
NC		 2167 unsigned int num_operands_expected;
2168 unsigned int i;
252b5132
RH		 2169
2170 /* There is an optional operand. Count the number of
2171 commas in the input line. */
2172 if (*str == '\0')
2173 opcount = 0;
2174 else
2175 {
2176 opcount = 1;
2177 s = str;
2178 while ((s = strchr (s, ',')) != (char *) NULL)
2179 {
2180 ++opcount;
2181 ++s;
2182 }
2183 }
2184
7fe9cf6b
NC		 2185 /* Compute the number of expected operands.
2186 Do not count fake operands. */
2187 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2188 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2189 ++ num_operands_expected;
2190
252b5132
RH		 2191 /* If there are fewer operands in the line then are called
2192 for by the instruction, we want to skip the optional
1f6c9eb0 2193 operands. */
7fe9cf6b 2194 if (opcount < num_operands_expected)
252b5132
RH		 2195 skip_optional = 1;
2196
2197 break;
2198 }
2199 }
2200
2201 /* Gather the operands. */
2202 need_paren = 0;
2203 next_opindex = 0;
2204 fc = 0;
2205 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2206 {
2207 const struct powerpc_operand *operand;
2208 const char *errmsg;
2209 char *hold;
2210 expressionS ex;
2211 char endc;
2212
2213 if (next_opindex == 0)
2214 operand = &powerpc_operands[*opindex_ptr];
2215 else
2216 {
2217 operand = &powerpc_operands[next_opindex];
2218 next_opindex = 0;
2219 }
252b5132
RH		 2220 errmsg = NULL;
2221
2222 /* If this is a fake operand, then we do not expect anything
2223 from the input. */
2224 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2225 {
2b3c4602 2226 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2227 if (errmsg != (const char *) NULL)
2228 as_bad (errmsg);
2229 continue;
2230 }
2231
2232 /* If this is an optional operand, and we are skipping it, just
2233 insert a zero. */
2234 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2235 && skip_optional)
2236 {
2237 if (operand->insert)
2238 {
2b3c4602 2239 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
252b5132
RH		 2240 if (errmsg != (const char *) NULL)
2241 as_bad (errmsg);
2242 }
2243 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2244 next_opindex = *opindex_ptr + 1;
2245 continue;
2246 }
2247
2248 /* Gather the operand. */
2249 hold = input_line_pointer;
2250 input_line_pointer = str;
2251
2252#ifdef TE_PE
81d4177b 2253 if (*input_line_pointer == '[')
252b5132
RH		 2254 {
2255 /* We are expecting something like the second argument here:
99a814a1
AM		 2256 *
2257 * lwz r4,[toc].GS.0.static_int(rtoc)
2258 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2259 * The argument following the `]' must be a symbol name, and the
2260 * register must be the toc register: 'rtoc' or '2'
2261 *
2262 * The effect is to 0 as the displacement field
2263 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2264 * the appropriate variation) reloc against it based on the symbol.
2265 * The linker will build the toc, and insert the resolved toc offset.
2266 *
2267 * Note:
2268 * o The size of the toc entry is currently assumed to be
2269 * 32 bits. This should not be assumed to be a hard coded
2270 * number.
2271 * o In an effort to cope with a change from 32 to 64 bits,
2272 * there are also toc entries that are specified to be
2273 * either 32 or 64 bits:
2274 * lwz r4,[toc32].GS.0.static_int(rtoc)
2275 * lwz r4,[toc64].GS.0.static_int(rtoc)
2276 * These demand toc entries of the specified size, and the
2277 * instruction probably requires it.
2278 */
252b5132
RH		 2279
2280 int valid_toc;
2281 enum toc_size_qualifier toc_kind;
2282 bfd_reloc_code_real_type toc_reloc;
2283
99a814a1
AM		 2284 /* Go parse off the [tocXX] part. */
2285 valid_toc = parse_toc_entry (&toc_kind);
252b5132 2286
81d4177b 2287 if (!valid_toc)
252b5132 2288 {
99a814a1
AM		 2289 /* Note: message has already been issued.
2290 FIXME: what sort of recovery should we do?
2291 demand_rest_of_line (); return; ? */
252b5132
RH		 2292 }
2293
99a814a1
AM		 2294 /* Now get the symbol following the ']'. */
2295 expression (&ex);
252b5132
RH		 2296
2297 switch (toc_kind)
2298 {
2299 case default_toc:
99a814a1
AM		 2300 /* In this case, we may not have seen the symbol yet,
2301 since it is allowed to appear on a .extern or .globl
2302 or just be a label in the .data section. */
252b5132
RH		 2303 toc_reloc = BFD_RELOC_PPC_TOC16;
2304 break;
2305 case data_in_toc:
99a814a1
AM		 2306 /* 1. The symbol must be defined and either in the toc
2307 section, or a global.
2308 2. The reloc generated must have the TOCDEFN flag set
2309 in upper bit mess of the reloc type.
2310 FIXME: It's a little confusing what the tocv
2311 qualifier can be used for. At the very least, I've
2312 seen three uses, only one of which I'm sure I can
2313 explain. */
81d4177b
KH		 2314 if (ex.X_op == O_symbol)
2315 {
252b5132 2316 assert (ex.X_add_symbol != NULL);
fed9b18a
ILT		 2317 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2318 != tocdata_section)
252b5132 2319 {
99a814a1 2320 as_bad (_("[tocv] symbol is not a toc symbol"));
252b5132
RH		 2321 }
2322 }
2323
2324 toc_reloc = BFD_RELOC_PPC_TOC16;
2325 break;
2326 case must_be_32:
99a814a1
AM		 2327 /* FIXME: these next two specifically specify 32/64 bit
2328 toc entries. We don't support them today. Is this
2329 the right way to say that? */
252b5132
RH		 2330 toc_reloc = BFD_RELOC_UNUSED;
2331 as_bad (_("Unimplemented toc32 expression modifier"));
2332 break;
2333 case must_be_64:
99a814a1 2334 /* FIXME: see above. */
252b5132
RH		 2335 toc_reloc = BFD_RELOC_UNUSED;
2336 as_bad (_("Unimplemented toc64 expression modifier"));
2337 break;
2338 default:
bc805888 2339 fprintf (stderr,
99a814a1
AM		 2340 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2341 toc_kind);
bc805888 2342 abort ();
252b5132
RH		 2343 break;
2344 }
2345
2346 /* We need to generate a fixup for this expression. */
2347 if (fc >= MAX_INSN_FIXUPS)
2348 as_fatal (_("too many fixups"));
2349
2350 fixups[fc].reloc = toc_reloc;
2351 fixups[fc].exp = ex;
2352 fixups[fc].opindex = *opindex_ptr;
2353 ++fc;
2354
99a814a1
AM		 2355 /* Ok. We've set up the fixup for the instruction. Now make it
2356 look like the constant 0 was found here. */
252b5132
RH		 2357 ex.X_unsigned = 1;
2358 ex.X_op = O_constant;
2359 ex.X_add_number = 0;
2360 ex.X_add_symbol = NULL;
2361 ex.X_op_symbol = NULL;
2362 }
2363
2364 else
2365#endif /* TE_PE */
2366 {
2367 if (! register_name (&ex))
2368 {
2369 if ((operand->flags & PPC_OPERAND_CR) != 0)
b34976b6 2370 cr_operand = TRUE;
252b5132 2371 expression (&ex);
b34976b6 2372 cr_operand = FALSE;
252b5132
RH		 2373 }
2374 }
2375
2376 str = input_line_pointer;
2377 input_line_pointer = hold;
2378
2379 if (ex.X_op == O_illegal)
2380 as_bad (_("illegal operand"));
2381 else if (ex.X_op == O_absent)
2382 as_bad (_("missing operand"));
2383 else if (ex.X_op == O_register)
2384 {
2385 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2386 (char *) NULL, 0);
2387 }
2388 else if (ex.X_op == O_constant)
2389 {
2390#ifdef OBJ_ELF
81d4177b 2391 /* Allow @HA, @L, @H on constants. */
252b5132
RH		 2392 char *orig_str = str;
2393
2394 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2395 switch (reloc)
2396 {
2397 default:
2398 str = orig_str;
2399 break;
2400
2401 case BFD_RELOC_LO16:
2402 /* X_unsigned is the default, so if the user has done
0baf16f2
AM		 2403 something which cleared it, we always produce a
2404 signed value. */
2405 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
252b5132
RH		 2406 ex.X_add_number &= 0xffff;
2407 else
0baf16f2 2408 ex.X_add_number = SEX16 (ex.X_add_number);
252b5132
RH		 2409 break;
2410
2411 case BFD_RELOC_HI16:
0baf16f2
AM		 2412 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2413 ex.X_add_number = PPC_HI (ex.X_add_number);
2414 else
2415 ex.X_add_number = SEX16 (PPC_HI (ex.X_add_number));
252b5132
RH		 2416 break;
2417
2418 case BFD_RELOC_HI16_S:
0baf16f2
AM		 2419 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2420 ex.X_add_number = PPC_HA (ex.X_add_number);
2421 else
2422 ex.X_add_number = SEX16 (PPC_HA (ex.X_add_number));
2423 break;
2424
0baf16f2
AM		 2425 case BFD_RELOC_PPC64_HIGHER:
2426 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2427 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2428 else
2429 ex.X_add_number = SEX16 (PPC_HIGHER (ex.X_add_number));
2430 break;
2431
2432 case BFD_RELOC_PPC64_HIGHER_S:
2433 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2434 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2435 else
2436 ex.X_add_number = SEX16 (PPC_HIGHERA (ex.X_add_number));
252b5132 2437 break;
0baf16f2
AM		 2438
2439 case BFD_RELOC_PPC64_HIGHEST:
2440 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2441 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2442 else
2443 ex.X_add_number = SEX16 (PPC_HIGHEST (ex.X_add_number));
2444 break;
2445
2446 case BFD_RELOC_PPC64_HIGHEST_S:
2447 if (ex.X_unsigned && ! (operand->flags & PPC_OPERAND_SIGNED))
2448 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2449 else
2450 ex.X_add_number = SEX16 (PPC_HIGHESTA (ex.X_add_number));
2451 break;
252b5132 2452 }
0baf16f2 2453#endif /* OBJ_ELF */
252b5132
RH		 2454 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2455 (char *) NULL, 0);
2456 }
2457#ifdef OBJ_ELF
2458 else if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_UNUSED)
2459 {
cdba85ec
AM		 2460 /* Some TLS tweaks. */
2461 switch (reloc)
2462 {
2463 default:
2464 break;
2465 case BFD_RELOC_PPC_TLS:
2466 insn = ppc_insert_operand (insn, operand, ppc_obj64 ? 13 : 2,
2467 (char *) NULL, 0);
2468 break;
2469 /* We'll only use the 32 (or 64) bit form of these relocations
2470 in constants. Instructions get the 16 bit form. */
2471 case BFD_RELOC_PPC_DTPREL:
2472 reloc = BFD_RELOC_PPC_DTPREL16;
2473 break;
2474 case BFD_RELOC_PPC_TPREL:
2475 reloc = BFD_RELOC_PPC_TPREL16;
2476 break;
2477 }
2478
99a814a1
AM		 2479 /* For the absolute forms of branches, convert the PC
2480 relative form back into the absolute. */
252b5132
RH		 2481 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
2482 {
2483 switch (reloc)
2484 {
2485 case BFD_RELOC_PPC_B26:
2486 reloc = BFD_RELOC_PPC_BA26;
2487 break;
2488 case BFD_RELOC_PPC_B16:
2489 reloc = BFD_RELOC_PPC_BA16;
2490 break;
2491 case BFD_RELOC_PPC_B16_BRTAKEN:
2492 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
2493 break;
2494 case BFD_RELOC_PPC_B16_BRNTAKEN:
2495 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
2496 break;
2497 default:
2498 break;
2499 }
2500 }
2501
2b3c4602 2502 if (ppc_obj64
adadcc0c 2503 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
0baf16f2
AM		 2504 {
2505 switch (reloc)
2506 {
2507 case BFD_RELOC_16:
2508 reloc = BFD_RELOC_PPC64_ADDR16_DS;
2509 break;
2510 case BFD_RELOC_LO16:
2511 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
2512 break;
2513 case BFD_RELOC_16_GOTOFF:
2514 reloc = BFD_RELOC_PPC64_GOT16_DS;
2515 break;
2516 case BFD_RELOC_LO16_GOTOFF:
2517 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
2518 break;
2519 case BFD_RELOC_LO16_PLTOFF:
2520 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
2521 break;
1cfc59d5 2522 case BFD_RELOC_16_BASEREL:
0baf16f2
AM		 2523 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
2524 break;
2525 case BFD_RELOC_LO16_BASEREL:
2526 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
2527 break;
2528 case BFD_RELOC_PPC_TOC16:
2529 reloc = BFD_RELOC_PPC64_TOC16_DS;
2530 break;
2531 case BFD_RELOC_PPC64_TOC16_LO:
2532 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
2533 break;
2534 case BFD_RELOC_PPC64_PLTGOT16:
2535 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
2536 break;
2537 case BFD_RELOC_PPC64_PLTGOT16_LO:
2538 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
2539 break;
cdba85ec
AM		 2540 case BFD_RELOC_PPC_DTPREL16:
2541 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
2542 break;
2543 case BFD_RELOC_PPC_DTPREL16_LO:
2544 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
2545 break;
2546 case BFD_RELOC_PPC_TPREL16:
2547 reloc = BFD_RELOC_PPC64_TPREL16_DS;
2548 break;
2549 case BFD_RELOC_PPC_TPREL16_LO:
2550 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
2551 break;
2552 case BFD_RELOC_PPC_GOT_DTPREL16:
2553 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2554 case BFD_RELOC_PPC_GOT_TPREL16:
2555 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2556 break;
0baf16f2
AM		 2557 default:
2558 as_bad (_("unsupported relocation for DS offset field"));
2559 break;
2560 }
2561 }
2562
252b5132
RH		 2563 /* We need to generate a fixup for this expression. */
2564 if (fc >= MAX_INSN_FIXUPS)
2565 as_fatal (_("too many fixups"));
2566 fixups[fc].exp = ex;
2567 fixups[fc].opindex = 0;
2568 fixups[fc].reloc = reloc;
2569 ++fc;
2570 }
2571#endif /* OBJ_ELF */
2572
2573 else
2574 {
2575 /* We need to generate a fixup for this expression. */
2576 if (fc >= MAX_INSN_FIXUPS)
2577 as_fatal (_("too many fixups"));
2578 fixups[fc].exp = ex;
2579 fixups[fc].opindex = *opindex_ptr;
2580 fixups[fc].reloc = BFD_RELOC_UNUSED;
2581 ++fc;
2582 }
2583
2584 if (need_paren)
2585 {
2586 endc = ')';
2587 need_paren = 0;
2588 }
2589 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
2590 {
2591 endc = '(';
2592 need_paren = 1;
2593 }
2594 else
2595 endc = ',';
2596
2597 /* The call to expression should have advanced str past any
2598 whitespace. */
2599 if (*str != endc
2600 && (endc != ',' || *str != '\0'))
2601 {
2602 as_bad (_("syntax error; found `%c' but expected `%c'"), *str, endc);
2603 break;
2604 }
2605
2606 if (*str != '\0')
2607 ++str;
2608 }
2609
3882b010 2610 while (ISSPACE (*str))
252b5132
RH		 2611 ++str;
2612
2613 if (*str != '\0')
2614 as_bad (_("junk at end of line: `%s'"), str);
2615
dc1d03fc 2616#ifdef OBJ_ELF
6a0c61b7
EZ		 2617 /* Do we need/want a APUinfo section? */
2618 if (ppc_cpu & (PPC_OPCODE_SPE
2619 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS
2620 | PPC_OPCODE_BRLOCK | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK
2621 | PPC_OPCODE_RFMCI))
2622 {
2623 /* These are all version "1". */
2624 if (opcode->flags & PPC_OPCODE_SPE)
b34976b6 2625 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
6a0c61b7 2626 if (opcode->flags & PPC_OPCODE_ISEL)
b34976b6 2627 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
6a0c61b7 2628 if (opcode->flags & PPC_OPCODE_EFS)
b34976b6 2629 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
6a0c61b7 2630 if (opcode->flags & PPC_OPCODE_BRLOCK)
b34976b6 2631 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
6a0c61b7 2632 if (opcode->flags & PPC_OPCODE_PMR)
b34976b6 2633 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
6a0c61b7 2634 if (opcode->flags & PPC_OPCODE_CACHELCK)
b34976b6 2635 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
6a0c61b7 2636 if (opcode->flags & PPC_OPCODE_RFMCI)
b34976b6 2637 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
6a0c61b7 2638 }
dc1d03fc 2639#endif
6a0c61b7 2640
252b5132
RH		 2641 /* Write out the instruction. */
2642 f = frag_more (4);
09b935ac
AM		 2643 addr_mod = frag_now_fix () & 3;
2644 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
2645 as_bad (_("instruction address is not a multiple of 4"));
2646 frag_now->insn_addr = addr_mod;
2647 frag_now->has_code = 1;
252b5132
RH		 2648 md_number_to_chars (f, insn, 4);
2649
5d6f4f16
GK		 2650#ifdef OBJ_ELF
2651 dwarf2_emit_insn (4);
2652#endif
2653
252b5132
RH		 2654 /* Create any fixups. At this point we do not use a
2655 bfd_reloc_code_real_type, but instead just use the
2656 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2657 handle fixups for any operand type, although that is admittedly
2658 not a very exciting feature. We pick a BFD reloc type in
55cf6793 2659 md_apply_fix. */
252b5132
RH		 2660 for (i = 0; i < fc; i++)
2661 {
2662 const struct powerpc_operand *operand;
2663
2664 operand = &powerpc_operands[fixups[i].opindex];
2665 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2666 {
99a814a1 2667 reloc_howto_type *reloc_howto;
252b5132
RH		 2668 int size;
2669 int offset;
2670 fixS *fixP;
2671
99a814a1 2672 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
252b5132
RH		 2673 if (!reloc_howto)
2674 abort ();
2675
2676 size = bfd_get_reloc_size (reloc_howto);
2677 offset = target_big_endian ? (4 - size) : 0;
2678
2679 if (size < 1 || size > 4)
bc805888 2680 abort ();
252b5132 2681
99a814a1
AM		 2682 fixP = fix_new_exp (frag_now,
2683 f - frag_now->fr_literal + offset,
2684 size,
2685 &fixups[i].exp,
2686 reloc_howto->pc_relative,
252b5132
RH		 2687 fixups[i].reloc);
2688
2689 /* Turn off complaints that the addend is too large for things like
2690 foo+100000@ha. */
2691 switch (fixups[i].reloc)
2692 {
2693 case BFD_RELOC_16_GOTOFF:
2694 case BFD_RELOC_PPC_TOC16:
2695 case BFD_RELOC_LO16:
2696 case BFD_RELOC_HI16:
2697 case BFD_RELOC_HI16_S:
0baf16f2 2698#ifdef OBJ_ELF
0baf16f2
AM		 2699 case BFD_RELOC_PPC64_HIGHER:
2700 case BFD_RELOC_PPC64_HIGHER_S:
2701 case BFD_RELOC_PPC64_HIGHEST:
2702 case BFD_RELOC_PPC64_HIGHEST_S:
0baf16f2 2703#endif
252b5132
RH		 2704 fixP->fx_no_overflow = 1;
2705 break;
2706 default:
2707 break;
2708 }
2709 }
2710 else
99a814a1
AM		 2711 fix_new_exp (frag_now,
2712 f - frag_now->fr_literal,
2713 4,
252b5132
RH		 2714 &fixups[i].exp,
2715 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
2716 ((bfd_reloc_code_real_type)
99a814a1 2717 (fixups[i].opindex + (int) BFD_RELOC_UNUSED)));
252b5132
RH		 2718 }
2719}
2720
2721/* Handle a macro. Gather all the operands, transform them as
2722 described by the macro, and call md_assemble recursively. All the
2723 operands are separated by commas; we don't accept parentheses
2724 around operands here. */
2725
2726static void
2727ppc_macro (str, macro)
2728 char *str;
2729 const struct powerpc_macro *macro;
2730{
2731 char *operands[10];
2732 unsigned int count;
2733 char *s;
2734 unsigned int len;
2735 const char *format;
2736 int arg;
2737 char *send;
2738 char *complete;
2739
2740 /* Gather the users operands into the operands array. */
2741 count = 0;
2742 s = str;
2743 while (1)
2744 {
2745 if (count >= sizeof operands / sizeof operands[0])
2746 break;
2747 operands[count++] = s;
2748 s = strchr (s, ',');
2749 if (s == (char *) NULL)
2750 break;
2751 *s++ = '\0';
81d4177b 2752 }
252b5132
RH		 2753
2754 if (count != macro->operands)
2755 {
2756 as_bad (_("wrong number of operands"));
2757 return;
2758 }
2759
2760 /* Work out how large the string must be (the size is unbounded
2761 because it includes user input). */
2762 len = 0;
2763 format = macro->format;
2764 while (*format != '\0')
2765 {
2766 if (*format != '%')
2767 {
2768 ++len;
2769 ++format;
2770 }
2771 else
2772 {
2773 arg = strtol (format + 1, &send, 10);
2774 know (send != format && arg >= 0 && arg < count);
2775 len += strlen (operands[arg]);
2776 format = send;
2777 }
2778 }
2779
2780 /* Put the string together. */
2781 complete = s = (char *) alloca (len + 1);
2782 format = macro->format;
2783 while (*format != '\0')
2784 {
2785 if (*format != '%')
2786 *s++ = *format++;
2787 else
2788 {
2789 arg = strtol (format + 1, &send, 10);
2790 strcpy (s, operands[arg]);
2791 s += strlen (s);
2792 format = send;
2793 }
2794 }
2795 *s = '\0';
2796
2797 /* Assemble the constructed instruction. */
2798 md_assemble (complete);
81d4177b 2799}
252b5132
RH		 2800\f
2801#ifdef OBJ_ELF
99a814a1 2802/* For ELF, add support for SHF_EXCLUDE and SHT_ORDERED. */
252b5132
RH		 2803
2804int
2805ppc_section_letter (letter, ptr_msg)
2806 int letter;
2807 char **ptr_msg;
2808{
2809 if (letter == 'e')
2810 return SHF_EXCLUDE;
2811
13ae64f3 2812 *ptr_msg = _("Bad .section directive: want a,e,w,x,M,S,G,T in string");
711ef82f 2813 return -1;
252b5132
RH		 2814}
2815
2816int
9de8d8f1
RH		 2817ppc_section_word (str, len)
2818 char *str;
2819 size_t len;
252b5132 2820{
9de8d8f1
RH		 2821 if (len == 7 && strncmp (str, "exclude", 7) == 0)
2822 return SHF_EXCLUDE;
252b5132 2823
9de8d8f1 2824 return -1;
252b5132
RH		 2825}
2826
2827int
9de8d8f1
RH		 2828ppc_section_type (str, len)
2829 char *str;
2830 size_t len;
252b5132 2831{
9de8d8f1
RH		 2832 if (len == 7 && strncmp (str, "ordered", 7) == 0)
2833 return SHT_ORDERED;
252b5132 2834
9de8d8f1 2835 return -1;
252b5132
RH		 2836}
2837
2838int
2839ppc_section_flags (flags, attr, type)
2840 int flags;
2841 int attr;
2842 int type;
2843{
2844 if (type == SHT_ORDERED)
2845 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
2846
2847 if (attr & SHF_EXCLUDE)
2848 flags |= SEC_EXCLUDE;
2849
2850 return flags;
2851}
2852#endif /* OBJ_ELF */
2853
2854\f
2855/* Pseudo-op handling. */
2856
2857/* The .byte pseudo-op. This is similar to the normal .byte
2858 pseudo-op, but it can also take a single ASCII string. */
2859
2860static void
2861ppc_byte (ignore)
92161534 2862 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 2863{
2864 if (*input_line_pointer != '\"')
2865 {
2866 cons (1);
2867 return;
2868 }
2869
2870 /* Gather characters. A real double quote is doubled. Unusual
2871 characters are not permitted. */
2872 ++input_line_pointer;
2873 while (1)
2874 {
2875 char c;
2876
2877 c = *input_line_pointer++;
2878
2879 if (c == '\"')
2880 {
2881 if (*input_line_pointer != '\"')
2882 break;
2883 ++input_line_pointer;
2884 }
2885
2886 FRAG_APPEND_1_CHAR (c);
2887 }
2888
2889 demand_empty_rest_of_line ();
2890}
2891\f
2892#ifdef OBJ_XCOFF
2893
2894/* XCOFF specific pseudo-op handling. */
2895
2896/* This is set if we are creating a .stabx symbol, since we don't want
2897 to handle symbol suffixes for such symbols. */
b34976b6 2898static bfd_boolean ppc_stab_symbol;
252b5132
RH		 2899
2900/* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
2901 symbols in the .bss segment as though they were local common
67c1ffbe 2902 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
1ad63b2f 2903 aligns .comm and .lcomm to 4 bytes. */
252b5132
RH		 2904
2905static void
2906ppc_comm (lcomm)
2907 int lcomm;
2908{
2909 asection *current_seg = now_seg;
2910 subsegT current_subseg = now_subseg;
2911 char *name;
2912 char endc;
2913 char *end_name;
2914 offsetT size;
2915 offsetT align;
2916 symbolS *lcomm_sym = NULL;
2917 symbolS *sym;
2918 char *pfrag;
2919
2920 name = input_line_pointer;
2921 endc = get_symbol_end ();
2922 end_name = input_line_pointer;
2923 *end_name = endc;
2924
2925 if (*input_line_pointer != ',')
2926 {
2927 as_bad (_("missing size"));
2928 ignore_rest_of_line ();
2929 return;
2930 }
2931 ++input_line_pointer;
2932
2933 size = get_absolute_expression ();
2934 if (size < 0)
2935 {
2936 as_bad (_("negative size"));
2937 ignore_rest_of_line ();
2938 return;
2939 }
2940
2941 if (! lcomm)
2942 {
2943 /* The third argument to .comm is the alignment. */
2944 if (*input_line_pointer != ',')
1ad63b2f 2945 align = 2;
252b5132
RH		 2946 else
2947 {
2948 ++input_line_pointer;
2949 align = get_absolute_expression ();
2950 if (align <= 0)
2951 {
2952 as_warn (_("ignoring bad alignment"));
1ad63b2f 2953 align = 2;
252b5132
RH		 2954 }
2955 }
2956 }
2957 else
2958 {
2959 char *lcomm_name;
2960 char lcomm_endc;
2961
1ad63b2f 2962 if (size <= 4)
252b5132
RH		 2963 align = 2;
2964 else
2965 align = 3;
2966
2967 /* The third argument to .lcomm appears to be the real local
2968 common symbol to create. References to the symbol named in
2969 the first argument are turned into references to the third
2970 argument. */
2971 if (*input_line_pointer != ',')
2972 {
2973 as_bad (_("missing real symbol name"));
2974 ignore_rest_of_line ();
2975 return;
2976 }
2977 ++input_line_pointer;
2978
2979 lcomm_name = input_line_pointer;
2980 lcomm_endc = get_symbol_end ();
81d4177b 2981
252b5132
RH		 2982 lcomm_sym = symbol_find_or_make (lcomm_name);
2983
2984 *input_line_pointer = lcomm_endc;
2985 }
2986
2987 *end_name = '\0';
2988 sym = symbol_find_or_make (name);
2989 *end_name = endc;
2990
2991 if (S_IS_DEFINED (sym)
2992 || S_GET_VALUE (sym) != 0)
2993 {
2994 as_bad (_("attempt to redefine symbol"));
2995 ignore_rest_of_line ();
2996 return;
2997 }
81d4177b 2998
252b5132 2999 record_alignment (bss_section, align);
81d4177b 3000
252b5132
RH		 3001 if (! lcomm
3002 || ! S_IS_DEFINED (lcomm_sym))
3003 {
3004 symbolS *def_sym;
3005 offsetT def_size;
3006
3007 if (! lcomm)
3008 {
3009 def_sym = sym;
3010 def_size = size;
3011 S_SET_EXTERNAL (sym);
3012 }
3013 else
3014 {
809ffe0d 3015 symbol_get_tc (lcomm_sym)->output = 1;
252b5132
RH		 3016 def_sym = lcomm_sym;
3017 def_size = 0;
3018 }
3019
3020 subseg_set (bss_section, 1);
3021 frag_align (align, 0, 0);
81d4177b 3022
809ffe0d 3023 symbol_set_frag (def_sym, frag_now);
252b5132
RH		 3024 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3025 def_size, (char *) NULL);
3026 *pfrag = 0;
3027 S_SET_SEGMENT (def_sym, bss_section);
809ffe0d 3028 symbol_get_tc (def_sym)->align = align;
252b5132
RH		 3029 }
3030 else if (lcomm)
3031 {
3032 /* Align the size of lcomm_sym. */
809ffe0d
ILT		 3033 symbol_get_frag (lcomm_sym)->fr_offset =
3034 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
252b5132 3035 &~ ((1 << align) - 1));
809ffe0d
ILT		 3036 if (align > symbol_get_tc (lcomm_sym)->align)
3037 symbol_get_tc (lcomm_sym)->align = align;
252b5132
RH		 3038 }
3039
3040 if (lcomm)
3041 {
3042 /* Make sym an offset from lcomm_sym. */
3043 S_SET_SEGMENT (sym, bss_section);
809ffe0d
ILT		 3044 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3045 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3046 symbol_get_frag (lcomm_sym)->fr_offset += size;
252b5132
RH		 3047 }
3048
3049 subseg_set (current_seg, current_subseg);
3050
3051 demand_empty_rest_of_line ();
3052}
3053
3054/* The .csect pseudo-op. This switches us into a different
3055 subsegment. The first argument is a symbol whose value is the
3056 start of the .csect. In COFF, csect symbols get special aux
3057 entries defined by the x_csect field of union internal_auxent. The
3058 optional second argument is the alignment (the default is 2). */
3059
3060static void
3061ppc_csect (ignore)
5480ccf3 3062 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3063{
3064 char *name;
3065 char endc;
3066 symbolS *sym;
931e13a6 3067 offsetT align;
252b5132
RH		 3068
3069 name = input_line_pointer;
3070 endc = get_symbol_end ();
81d4177b 3071
252b5132
RH		 3072 sym = symbol_find_or_make (name);
3073
3074 *input_line_pointer = endc;
3075
3076 if (S_GET_NAME (sym)[0] == '\0')
3077 {
3078 /* An unnamed csect is assumed to be [PR]. */
809ffe0d 3079 symbol_get_tc (sym)->class = XMC_PR;
252b5132
RH		 3080 }
3081
931e13a6 3082 align = 2;
252b5132
RH		 3083 if (*input_line_pointer == ',')
3084 {
3085 ++input_line_pointer;
931e13a6 3086 align = get_absolute_expression ();
252b5132
RH		 3087 }
3088
931e13a6
AM		 3089 ppc_change_csect (sym, align);
3090
252b5132
RH		 3091 demand_empty_rest_of_line ();
3092}
3093
3094/* Change to a different csect. */
3095
3096static void
931e13a6 3097ppc_change_csect (sym, align)
252b5132 3098 symbolS *sym;
931e13a6 3099 offsetT align;
252b5132
RH		 3100{
3101 if (S_IS_DEFINED (sym))
809ffe0d 3102 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
252b5132
RH		 3103 else
3104 {
3105 symbolS **list_ptr;
3106 int after_toc;
3107 int hold_chunksize;
3108 symbolS *list;
931e13a6
AM		 3109 int is_code;
3110 segT sec;
252b5132
RH		 3111
3112 /* This is a new csect. We need to look at the symbol class to
3113 figure out whether it should go in the text section or the
3114 data section. */
3115 after_toc = 0;
931e13a6 3116 is_code = 0;
809ffe0d 3117 switch (symbol_get_tc (sym)->class)
252b5132
RH		 3118 {
3119 case XMC_PR:
3120 case XMC_RO:
3121 case XMC_DB:
3122 case XMC_GL:
3123 case XMC_XO:
3124 case XMC_SV:
3125 case XMC_TI:
3126 case XMC_TB:
3127 S_SET_SEGMENT (sym, text_section);
809ffe0d 3128 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
252b5132
RH		 3129 ++ppc_text_subsegment;
3130 list_ptr = &ppc_text_csects;
931e13a6 3131 is_code = 1;
252b5132
RH		 3132 break;
3133 case XMC_RW:
3134 case XMC_TC0:
3135 case XMC_TC:
3136 case XMC_DS:
3137 case XMC_UA:
3138 case XMC_BS:
3139 case XMC_UC:
3140 if (ppc_toc_csect != NULL
809ffe0d
ILT		 3141 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3142 == ppc_data_subsegment))
252b5132
RH		 3143 after_toc = 1;
3144 S_SET_SEGMENT (sym, data_section);
809ffe0d 3145 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
252b5132
RH		 3146 ++ppc_data_subsegment;
3147 list_ptr = &ppc_data_csects;
3148 break;
3149 default:
3150 abort ();
3151 }
3152
3153 /* We set the obstack chunk size to a small value before
99a814a1
AM		 3154 changing subsegments, so that we don't use a lot of memory
3155 space for what may be a small section. */
252b5132
RH		 3156 hold_chunksize = chunksize;
3157 chunksize = 64;
3158
931e13a6
AM		 3159 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3160 symbol_get_tc (sym)->subseg);
252b5132
RH		 3161
3162 chunksize = hold_chunksize;
3163
3164 if (after_toc)
3165 ppc_after_toc_frag = frag_now;
3166
931e13a6
AM		 3167 record_alignment (sec, align);
3168 if (is_code)
3169 frag_align_code (align, 0);
3170 else
3171 frag_align (align, 0, 0);
3172
809ffe0d 3173 symbol_set_frag (sym, frag_now);
252b5132
RH		 3174 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3175
931e13a6 3176 symbol_get_tc (sym)->align = align;
809ffe0d
ILT		 3177 symbol_get_tc (sym)->output = 1;
3178 symbol_get_tc (sym)->within = sym;
81d4177b 3179
252b5132 3180 for (list = *list_ptr;
809ffe0d
ILT		 3181 symbol_get_tc (list)->next != (symbolS *) NULL;
3182 list = symbol_get_tc (list)->next)
252b5132 3183 ;
809ffe0d 3184 symbol_get_tc (list)->next = sym;
81d4177b 3185
252b5132 3186 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3187 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3188 &symbol_lastP);
252b5132
RH		 3189 }
3190
3191 ppc_current_csect = sym;
3192}
3193
3194/* This function handles the .text and .data pseudo-ops. These
3195 pseudo-ops aren't really used by XCOFF; we implement them for the
3196 convenience of people who aren't used to XCOFF. */
3197
3198static void
3199ppc_section (type)
3200 int type;
3201{
3202 const char *name;
3203 symbolS *sym;
3204
3205 if (type == 't')
3206 name = ".text[PR]";
3207 else if (type == 'd')
3208 name = ".data[RW]";
3209 else
3210 abort ();
3211
3212 sym = symbol_find_or_make (name);
3213
931e13a6 3214 ppc_change_csect (sym, 2);
252b5132
RH		 3215
3216 demand_empty_rest_of_line ();
3217}
3218
3219/* This function handles the .section pseudo-op. This is mostly to
3220 give an error, since XCOFF only supports .text, .data and .bss, but
3221 we do permit the user to name the text or data section. */
3222
3223static void
3224ppc_named_section (ignore)
5480ccf3 3225 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3226{
3227 char *user_name;
3228 const char *real_name;
3229 char c;
3230 symbolS *sym;
3231
3232 user_name = input_line_pointer;
3233 c = get_symbol_end ();
3234
3235 if (strcmp (user_name, ".text") == 0)
3236 real_name = ".text[PR]";
3237 else if (strcmp (user_name, ".data") == 0)
3238 real_name = ".data[RW]";
3239 else
3240 {
3241 as_bad (_("The XCOFF file format does not support arbitrary sections"));
3242 *input_line_pointer = c;
3243 ignore_rest_of_line ();
3244 return;
3245 }
3246
3247 *input_line_pointer = c;
3248
3249 sym = symbol_find_or_make (real_name);
3250
931e13a6 3251 ppc_change_csect (sym, 2);
252b5132
RH		 3252
3253 demand_empty_rest_of_line ();
3254}
3255
3256/* The .extern pseudo-op. We create an undefined symbol. */
3257
3258static void
3259ppc_extern (ignore)
5480ccf3 3260 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3261{
3262 char *name;
3263 char endc;
3264
3265 name = input_line_pointer;
3266 endc = get_symbol_end ();
3267
3268 (void) symbol_find_or_make (name);
3269
3270 *input_line_pointer = endc;
3271
3272 demand_empty_rest_of_line ();
3273}
3274
3275/* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
3276
3277static void
3278ppc_lglobl (ignore)
5480ccf3 3279 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3280{
3281 char *name;
3282 char endc;
3283 symbolS *sym;
3284
3285 name = input_line_pointer;
3286 endc = get_symbol_end ();
3287
3288 sym = symbol_find_or_make (name);
3289
3290 *input_line_pointer = endc;
3291
809ffe0d 3292 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3293
3294 demand_empty_rest_of_line ();
3295}
3296
3297/* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
3298 although I don't know why it bothers. */
3299
3300static void
3301ppc_rename (ignore)
5480ccf3 3302 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3303{
3304 char *name;
3305 char endc;
3306 symbolS *sym;
3307 int len;
3308
3309 name = input_line_pointer;
3310 endc = get_symbol_end ();
3311
3312 sym = symbol_find_or_make (name);
3313
3314 *input_line_pointer = endc;
3315
3316 if (*input_line_pointer != ',')
3317 {
3318 as_bad (_("missing rename string"));
3319 ignore_rest_of_line ();
3320 return;
3321 }
3322 ++input_line_pointer;
3323
809ffe0d 3324 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
252b5132
RH		 3325
3326 demand_empty_rest_of_line ();
3327}
3328
3329/* The .stabx pseudo-op. This is similar to a normal .stabs
3330 pseudo-op, but slightly different. A sample is
3331 .stabx "main:F-1",.main,142,0
3332 The first argument is the symbol name to create. The second is the
3333 value, and the third is the storage class. The fourth seems to be
3334 always zero, and I am assuming it is the type. */
3335
3336static void
3337ppc_stabx (ignore)
5480ccf3 3338 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3339{
3340 char *name;
3341 int len;
3342 symbolS *sym;
3343 expressionS exp;
3344
3345 name = demand_copy_C_string (&len);
3346
3347 if (*input_line_pointer != ',')
3348 {
3349 as_bad (_("missing value"));
3350 return;
3351 }
3352 ++input_line_pointer;
3353
b34976b6 3354 ppc_stab_symbol = TRUE;
252b5132 3355 sym = symbol_make (name);
b34976b6 3356 ppc_stab_symbol = FALSE;
252b5132 3357
809ffe0d 3358 symbol_get_tc (sym)->real_name = name;
252b5132
RH		 3359
3360 (void) expression (&exp);
3361
3362 switch (exp.X_op)
3363 {
3364 case O_illegal:
3365 case O_absent:
3366 case O_big:
3367 as_bad (_("illegal .stabx expression; zero assumed"));
3368 exp.X_add_number = 0;
3369 /* Fall through. */
3370 case O_constant:
3371 S_SET_VALUE (sym, (valueT) exp.X_add_number);
809ffe0d 3372 symbol_set_frag (sym, &zero_address_frag);
252b5132
RH		 3373 break;
3374
3375 case O_symbol:
3376 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
809ffe0d 3377 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3378 else
3379 {
3380 S_SET_VALUE (sym,
3381 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
809ffe0d 3382 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
252b5132
RH		 3383 }
3384 break;
3385
3386 default:
3387 /* The value is some complex expression. This will probably
99a814a1
AM		 3388 fail at some later point, but this is probably the right
3389 thing to do here. */
809ffe0d 3390 symbol_set_value_expression (sym, &exp);
252b5132
RH		 3391 break;
3392 }
3393
3394 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3395 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3396
3397 if (*input_line_pointer != ',')
3398 {
3399 as_bad (_("missing class"));
3400 return;
3401 }
3402 ++input_line_pointer;
3403
3404 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
3405
3406 if (*input_line_pointer != ',')
3407 {
3408 as_bad (_("missing type"));
3409 return;
3410 }
3411 ++input_line_pointer;
3412
3413 S_SET_DATA_TYPE (sym, get_absolute_expression ());
3414
809ffe0d 3415 symbol_get_tc (sym)->output = 1;
252b5132 3416
6877bb43 3417 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) {
99a814a1 3418
809ffe0d 3419 symbol_get_tc (sym)->within = ppc_current_block;
252b5132 3420
41ea10b1 3421 /* In this case :
99a814a1 3422
41ea10b1
TR		 3423 .bs name
3424 .stabx "z",arrays_,133,0
3425 .es
99a814a1 3426
41ea10b1 3427 .comm arrays_,13768,3
99a814a1 3428
41ea10b1
TR		 3429 resolve_symbol_value will copy the exp's "within" into sym's when the
3430 offset is 0. Since this seems to be corner case problem,
3431 only do the correction for storage class C_STSYM. A better solution
0baf16f2 3432 would be to have the tc field updated in ppc_symbol_new_hook. */
99a814a1
AM		 3433
3434 if (exp.X_op == O_symbol)
41ea10b1
TR		 3435 {
3436 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
3437 }
6877bb43 3438 }
99a814a1 3439
252b5132
RH		 3440 if (exp.X_op != O_symbol
3441 || ! S_IS_EXTERNAL (exp.X_add_symbol)
3442 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
3443 ppc_frob_label (sym);
3444 else
3445 {
3446 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3447 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3448 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
3449 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 3450 }
3451
3452 demand_empty_rest_of_line ();
3453}
3454
3455/* The .function pseudo-op. This takes several arguments. The first
3456 argument seems to be the external name of the symbol. The second
67c1ffbe 3457 argument seems to be the label for the start of the function. gcc
252b5132
RH		 3458 uses the same name for both. I have no idea what the third and
3459 fourth arguments are meant to be. The optional fifth argument is
3460 an expression for the size of the function. In COFF this symbol
3461 gets an aux entry like that used for a csect. */
3462
3463static void
3464ppc_function (ignore)
5480ccf3 3465 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3466{
3467 char *name;
3468 char endc;
3469 char *s;
3470 symbolS *ext_sym;
3471 symbolS *lab_sym;
3472
3473 name = input_line_pointer;
3474 endc = get_symbol_end ();
3475
3476 /* Ignore any [PR] suffix. */
3477 name = ppc_canonicalize_symbol_name (name);
3478 s = strchr (name, '[');
3479 if (s != (char *) NULL
3480 && strcmp (s + 1, "PR]") == 0)
3481 *s = '\0';
3482
3483 ext_sym = symbol_find_or_make (name);
3484
3485 *input_line_pointer = endc;
3486
3487 if (*input_line_pointer != ',')
3488 {
3489 as_bad (_("missing symbol name"));
3490 ignore_rest_of_line ();
3491 return;
3492 }
3493 ++input_line_pointer;
3494
3495 name = input_line_pointer;
3496 endc = get_symbol_end ();
3497
3498 lab_sym = symbol_find_or_make (name);
3499
3500 *input_line_pointer = endc;
3501
3502 if (ext_sym != lab_sym)
3503 {
809ffe0d
ILT		 3504 expressionS exp;
3505
3506 exp.X_op = O_symbol;
3507 exp.X_add_symbol = lab_sym;
3508 exp.X_op_symbol = NULL;
3509 exp.X_add_number = 0;
3510 exp.X_unsigned = 0;
3511 symbol_set_value_expression (ext_sym, &exp);
252b5132
RH		 3512 }
3513
809ffe0d
ILT		 3514 if (symbol_get_tc (ext_sym)->class == -1)
3515 symbol_get_tc (ext_sym)->class = XMC_PR;
3516 symbol_get_tc (ext_sym)->output = 1;
252b5132
RH		 3517
3518 if (*input_line_pointer == ',')
3519 {
3520 expressionS ignore;
3521
3522 /* Ignore the third argument. */
3523 ++input_line_pointer;
3524 expression (&ignore);
3525 if (*input_line_pointer == ',')
3526 {
3527 /* Ignore the fourth argument. */
3528 ++input_line_pointer;
3529 expression (&ignore);
3530 if (*input_line_pointer == ',')
3531 {
3532 /* The fifth argument is the function size. */
3533 ++input_line_pointer;
809ffe0d
ILT		 3534 symbol_get_tc (ext_sym)->size = symbol_new ("L0\001",
3535 absolute_section,
3536 (valueT) 0,
3537 &zero_address_frag);
3538 pseudo_set (symbol_get_tc (ext_sym)->size);
252b5132
RH		 3539 }
3540 }
3541 }
3542
3543 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
3544 SF_SET_FUNCTION (ext_sym);
3545 SF_SET_PROCESS (ext_sym);
3546 coff_add_linesym (ext_sym);
3547
3548 demand_empty_rest_of_line ();
3549}
3550
3551/* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
8642cce8
TR		 3552 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
3553 with the correct line number */
5d6255fe 3554
8642cce8 3555static symbolS *saved_bi_sym = 0;
252b5132
RH		 3556
3557static void
3558ppc_bf (ignore)
5480ccf3 3559 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3560{
3561 symbolS *sym;
3562
3563 sym = symbol_make (".bf");
3564 S_SET_SEGMENT (sym, text_section);
809ffe0d 3565 symbol_set_frag (sym, frag_now);
252b5132
RH		 3566 S_SET_VALUE (sym, frag_now_fix ());
3567 S_SET_STORAGE_CLASS (sym, C_FCN);
3568
3569 coff_line_base = get_absolute_expression ();
3570
3571 S_SET_NUMBER_AUXILIARY (sym, 1);
3572 SA_SET_SYM_LNNO (sym, coff_line_base);
3573
8642cce8 3574 /* Line number for bi. */
5d6255fe 3575 if (saved_bi_sym)
8642cce8
TR		 3576 {
3577 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
3578 saved_bi_sym = 0;
3579 }
5d6255fe 3580
8642cce8 3581
809ffe0d 3582 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3583
3584 ppc_frob_label (sym);
3585
3586 demand_empty_rest_of_line ();
3587}
3588
3589/* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
3590 ".ef", except that the line number is absolute, not relative to the
3591 most recent ".bf" symbol. */
3592
3593static void
3594ppc_ef (ignore)
5480ccf3 3595 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3596{
3597 symbolS *sym;
3598
3599 sym = symbol_make (".ef");
3600 S_SET_SEGMENT (sym, text_section);
809ffe0d 3601 symbol_set_frag (sym, frag_now);
252b5132
RH		 3602 S_SET_VALUE (sym, frag_now_fix ());
3603 S_SET_STORAGE_CLASS (sym, C_FCN);
3604 S_SET_NUMBER_AUXILIARY (sym, 1);
3605 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3606 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3607
3608 ppc_frob_label (sym);
3609
3610 demand_empty_rest_of_line ();
3611}
3612
3613/* The .bi and .ei pseudo-ops. These take a string argument and
3614 generates a C_BINCL or C_EINCL symbol, which goes at the start of
8642cce8
TR		 3615 the symbol list. The value of .bi will be know when the next .bf
3616 is encountered. */
252b5132
RH		 3617
3618static void
3619ppc_biei (ei)
3620 int ei;
3621{
3622 static symbolS *last_biei;
3623
3624 char *name;
3625 int len;
3626 symbolS *sym;
3627 symbolS *look;
3628
3629 name = demand_copy_C_string (&len);
3630
3631 /* The value of these symbols is actually file offset. Here we set
3632 the value to the index into the line number entries. In
3633 ppc_frob_symbols we set the fix_line field, which will cause BFD
3634 to do the right thing. */
3635
3636 sym = symbol_make (name);
3637 /* obj-coff.c currently only handles line numbers correctly in the
3638 .text section. */
3639 S_SET_SEGMENT (sym, text_section);
3640 S_SET_VALUE (sym, coff_n_line_nos);
809ffe0d 3641 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3642
3643 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
809ffe0d 3644 symbol_get_tc (sym)->output = 1;
81d4177b 3645
8642cce8 3646 /* Save bi. */
5d6255fe 3647 if (ei)
8642cce8
TR		 3648 saved_bi_sym = 0;
3649 else
3650 saved_bi_sym = sym;
3651
252b5132
RH		 3652 for (look = last_biei ? last_biei : symbol_rootP;
3653 (look != (symbolS *) NULL
3654 && (S_GET_STORAGE_CLASS (look) == C_FILE
3655 || S_GET_STORAGE_CLASS (look) == C_BINCL
3656 || S_GET_STORAGE_CLASS (look) == C_EINCL));
3657 look = symbol_next (look))
3658 ;
3659 if (look != (symbolS *) NULL)
3660 {
3661 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3662 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
3663 last_biei = sym;
3664 }
3665
3666 demand_empty_rest_of_line ();
3667}
3668
3669/* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
3670 There is one argument, which is a csect symbol. The value of the
3671 .bs symbol is the index of this csect symbol. */
3672
3673static void
3674ppc_bs (ignore)
5480ccf3 3675 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3676{
3677 char *name;
3678 char endc;
3679 symbolS *csect;
3680 symbolS *sym;
3681
3682 if (ppc_current_block != NULL)
3683 as_bad (_("nested .bs blocks"));
3684
3685 name = input_line_pointer;
3686 endc = get_symbol_end ();
3687
3688 csect = symbol_find_or_make (name);
3689
3690 *input_line_pointer = endc;
3691
3692 sym = symbol_make (".bs");
3693 S_SET_SEGMENT (sym, now_seg);
3694 S_SET_STORAGE_CLASS (sym, C_BSTAT);
809ffe0d
ILT		 3695 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3696 symbol_get_tc (sym)->output = 1;
252b5132 3697
809ffe0d 3698 symbol_get_tc (sym)->within = csect;
252b5132
RH		 3699
3700 ppc_frob_label (sym);
3701
3702 ppc_current_block = sym;
3703
3704 demand_empty_rest_of_line ();
3705}
3706
3707/* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
3708
3709static void
3710ppc_es (ignore)
5480ccf3 3711 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3712{
3713 symbolS *sym;
3714
3715 if (ppc_current_block == NULL)
3716 as_bad (_(".es without preceding .bs"));
3717
3718 sym = symbol_make (".es");
3719 S_SET_SEGMENT (sym, now_seg);
3720 S_SET_STORAGE_CLASS (sym, C_ESTAT);
809ffe0d
ILT		 3721 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
3722 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3723
3724 ppc_frob_label (sym);
3725
3726 ppc_current_block = NULL;
3727
3728 demand_empty_rest_of_line ();
3729}
3730
3731/* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
3732 line number. */
3733
3734static void
3735ppc_bb (ignore)
5480ccf3 3736 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3737{
3738 symbolS *sym;
3739
3740 sym = symbol_make (".bb");
3741 S_SET_SEGMENT (sym, text_section);
809ffe0d 3742 symbol_set_frag (sym, frag_now);
252b5132
RH		 3743 S_SET_VALUE (sym, frag_now_fix ());
3744 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3745
3746 S_SET_NUMBER_AUXILIARY (sym, 1);
3747 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
3748
809ffe0d 3749 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3750
3751 SF_SET_PROCESS (sym);
3752
3753 ppc_frob_label (sym);
3754
3755 demand_empty_rest_of_line ();
3756}
3757
3758/* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
3759 line number. */
3760
3761static void
3762ppc_eb (ignore)
5480ccf3 3763 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3764{
3765 symbolS *sym;
3766
3767 sym = symbol_make (".eb");
3768 S_SET_SEGMENT (sym, text_section);
809ffe0d 3769 symbol_set_frag (sym, frag_now);
252b5132
RH		 3770 S_SET_VALUE (sym, frag_now_fix ());
3771 S_SET_STORAGE_CLASS (sym, C_BLOCK);
3772 S_SET_NUMBER_AUXILIARY (sym, 1);
3773 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
809ffe0d 3774 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3775
3776 SF_SET_PROCESS (sym);
3777
3778 ppc_frob_label (sym);
3779
3780 demand_empty_rest_of_line ();
3781}
3782
3783/* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
3784 specified name. */
3785
3786static void
3787ppc_bc (ignore)
5480ccf3 3788 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3789{
3790 char *name;
3791 int len;
3792 symbolS *sym;
3793
3794 name = demand_copy_C_string (&len);
3795 sym = symbol_make (name);
3796 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3797 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3798 S_SET_STORAGE_CLASS (sym, C_BCOMM);
3799 S_SET_VALUE (sym, 0);
809ffe0d 3800 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3801
3802 ppc_frob_label (sym);
3803
3804 demand_empty_rest_of_line ();
3805}
3806
3807/* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
3808
3809static void
3810ppc_ec (ignore)
5480ccf3 3811 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3812{
3813 symbolS *sym;
3814
3815 sym = symbol_make (".ec");
3816 S_SET_SEGMENT (sym, ppc_coff_debug_section);
809ffe0d 3817 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
252b5132
RH		 3818 S_SET_STORAGE_CLASS (sym, C_ECOMM);
3819 S_SET_VALUE (sym, 0);
809ffe0d 3820 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3821
3822 ppc_frob_label (sym);
3823
3824 demand_empty_rest_of_line ();
3825}
3826
3827/* The .toc pseudo-op. Switch to the .toc subsegment. */
3828
3829static void
3830ppc_toc (ignore)
5480ccf3 3831 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3832{
3833 if (ppc_toc_csect != (symbolS *) NULL)
809ffe0d 3834 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
252b5132
RH		 3835 else
3836 {
3837 subsegT subseg;
3838 symbolS *sym;
3839 symbolS *list;
81d4177b 3840
252b5132
RH		 3841 subseg = ppc_data_subsegment;
3842 ++ppc_data_subsegment;
3843
3844 subseg_new (segment_name (data_section), subseg);
3845 ppc_toc_frag = frag_now;
3846
3847 sym = symbol_find_or_make ("TOC[TC0]");
809ffe0d 3848 symbol_set_frag (sym, frag_now);
252b5132
RH		 3849 S_SET_SEGMENT (sym, data_section);
3850 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3851 symbol_get_tc (sym)->subseg = subseg;
3852 symbol_get_tc (sym)->output = 1;
3853 symbol_get_tc (sym)->within = sym;
252b5132
RH		 3854
3855 ppc_toc_csect = sym;
81d4177b 3856
252b5132 3857 for (list = ppc_data_csects;
809ffe0d
ILT		 3858 symbol_get_tc (list)->next != (symbolS *) NULL;
3859 list = symbol_get_tc (list)->next)
252b5132 3860 ;
809ffe0d 3861 symbol_get_tc (list)->next = sym;
252b5132
RH		 3862
3863 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 3864 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3865 &symbol_lastP);
252b5132
RH		 3866 }
3867
3868 ppc_current_csect = ppc_toc_csect;
3869
3870 demand_empty_rest_of_line ();
3871}
3872
3873/* The AIX assembler automatically aligns the operands of a .long or
3874 .short pseudo-op, and we want to be compatible. */
3875
3876static void
3877ppc_xcoff_cons (log_size)
3878 int log_size;
3879{
3880 frag_align (log_size, 0, 0);
3881 record_alignment (now_seg, log_size);
3882 cons (1 << log_size);
3883}
3884
3885static void
3886ppc_vbyte (dummy)
5480ccf3 3887 int dummy ATTRIBUTE_UNUSED;
252b5132
RH		 3888{
3889 expressionS exp;
3890 int byte_count;
3891
3892 (void) expression (&exp);
3893
3894 if (exp.X_op != O_constant)
3895 {
3896 as_bad (_("non-constant byte count"));
3897 return;
3898 }
3899
3900 byte_count = exp.X_add_number;
3901
3902 if (*input_line_pointer != ',')
3903 {
3904 as_bad (_("missing value"));
3905 return;
3906 }
3907
3908 ++input_line_pointer;
3909 cons (byte_count);
3910}
3911
3912#endif /* OBJ_XCOFF */
0baf16f2 3913#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
252b5132
RH		 3914\f
3915/* The .tc pseudo-op. This is used when generating either XCOFF or
3916 ELF. This takes two or more arguments.
3917
3918 When generating XCOFF output, the first argument is the name to
3919 give to this location in the toc; this will be a symbol with class
0baf16f2 3920 TC. The rest of the arguments are N-byte values to actually put at
252b5132 3921 this location in the TOC; often there is just one more argument, a
1049f94e 3922 relocatable symbol reference. The size of the value to store
0baf16f2
AM		 3923 depends on target word size. A 32-bit target uses 4-byte values, a
3924 64-bit target uses 8-byte values.
252b5132
RH		 3925
3926 When not generating XCOFF output, the arguments are the same, but
3927 the first argument is simply ignored. */
3928
3929static void
3930ppc_tc (ignore)
92161534 3931 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 3932{
3933#ifdef OBJ_XCOFF
3934
3935 /* Define the TOC symbol name. */
3936 {
3937 char *name;
3938 char endc;
3939 symbolS *sym;
3940
3941 if (ppc_toc_csect == (symbolS *) NULL
3942 || ppc_toc_csect != ppc_current_csect)
3943 {
3944 as_bad (_(".tc not in .toc section"));
3945 ignore_rest_of_line ();
3946 return;
3947 }
3948
3949 name = input_line_pointer;
3950 endc = get_symbol_end ();
3951
3952 sym = symbol_find_or_make (name);
3953
3954 *input_line_pointer = endc;
3955
3956 if (S_IS_DEFINED (sym))
3957 {
3958 symbolS *label;
3959
809ffe0d
ILT		 3960 label = symbol_get_tc (ppc_current_csect)->within;
3961 if (symbol_get_tc (label)->class != XMC_TC0)
252b5132
RH		 3962 {
3963 as_bad (_(".tc with no label"));
3964 ignore_rest_of_line ();
3965 return;
3966 }
3967
3968 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
809ffe0d 3969 symbol_set_frag (label, symbol_get_frag (sym));
252b5132
RH		 3970 S_SET_VALUE (label, S_GET_VALUE (sym));
3971
3972 while (! is_end_of_line[(unsigned char) *input_line_pointer])
3973 ++input_line_pointer;
3974
3975 return;
3976 }
3977
3978 S_SET_SEGMENT (sym, now_seg);
809ffe0d 3979 symbol_set_frag (sym, frag_now);
252b5132 3980 S_SET_VALUE (sym, (valueT) frag_now_fix ());
809ffe0d
ILT		 3981 symbol_get_tc (sym)->class = XMC_TC;
3982 symbol_get_tc (sym)->output = 1;
252b5132
RH		 3983
3984 ppc_frob_label (sym);
3985 }
3986
0baf16f2
AM		 3987#endif /* OBJ_XCOFF */
3988#ifdef OBJ_ELF
9c7977b3 3989 int align;
252b5132
RH		 3990
3991 /* Skip the TOC symbol name. */
3992 while (is_part_of_name (*input_line_pointer)
3993 || *input_line_pointer == '['
3994 || *input_line_pointer == ']'
3995 || *input_line_pointer == '{'
3996 || *input_line_pointer == '}')
3997 ++input_line_pointer;
3998
0baf16f2 3999 /* Align to a four/eight byte boundary. */
2b3c4602 4000 align = ppc_obj64 ? 3 : 2;
9c7977b3
AM		 4001 frag_align (align, 0, 0);
4002 record_alignment (now_seg, align);
0baf16f2 4003#endif /* OBJ_ELF */
252b5132
RH		 4004
4005 if (*input_line_pointer != ',')
4006 demand_empty_rest_of_line ();
4007 else
4008 {
4009 ++input_line_pointer;
2b3c4602 4010 cons (ppc_obj64 ? 8 : 4);
252b5132
RH		 4011 }
4012}
0baf16f2
AM		 4013
4014/* Pseudo-op .machine. */
0baf16f2
AM		 4015
4016static void
4017ppc_machine (ignore)
4018 int ignore ATTRIBUTE_UNUSED;
4019{
69c040df
AM		 4020 char *cpu_string;
4021#define MAX_HISTORY 100
4022 static unsigned long *cpu_history;
4023 static int curr_hist;
4024
4025 SKIP_WHITESPACE ();
4026
4027 if (*input_line_pointer == '"')
4028 {
4029 int len;
4030 cpu_string = demand_copy_C_string (&len);
4031 }
4032 else
4033 {
4034 char c;
4035 cpu_string = input_line_pointer;
4036 c = get_symbol_end ();
4037 cpu_string = xstrdup (cpu_string);
4038 *input_line_pointer = c;
4039 }
4040
4041 if (cpu_string != NULL)
4042 {
4043 unsigned long old_cpu = ppc_cpu;
4044 char *p;
4045
4046 for (p = cpu_string; *p != 0; p++)
4047 *p = TOLOWER (*p);
4048
4049 if (strcmp (cpu_string, "push") == 0)
4050 {
4051 if (cpu_history == NULL)
4052 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4053
4054 if (curr_hist >= MAX_HISTORY)
4055 as_bad (_(".machine stack overflow"));
4056 else
4057 cpu_history[curr_hist++] = ppc_cpu;
4058 }
4059 else if (strcmp (cpu_string, "pop") == 0)
4060 {
4061 if (curr_hist <= 0)
4062 as_bad (_(".machine stack underflow"));
4063 else
4064 ppc_cpu = cpu_history[--curr_hist];
4065 }
4066 else if (parse_cpu (cpu_string))
4067 ;
4068 else
4069 as_bad (_("invalid machine `%s'"), cpu_string);
4070
4071 if (ppc_cpu != old_cpu)
4072 ppc_setup_opcodes ();
4073 }
4074
4075 demand_empty_rest_of_line ();
0baf16f2
AM		 4076}
4077
4078/* See whether a symbol is in the TOC section. */
4079
4080static int
4081ppc_is_toc_sym (sym)
4082 symbolS *sym;
4083{
4084#ifdef OBJ_XCOFF
4085 return symbol_get_tc (sym)->class == XMC_TC;
4086#endif
4087#ifdef OBJ_ELF
4088 const char *sname = segment_name (S_GET_SEGMENT (sym));
2b3c4602 4089 if (ppc_obj64)
0baf16f2
AM		 4090 return strcmp (sname, ".toc") == 0;
4091 else
4092 return strcmp (sname, ".got") == 0;
4093#endif
4094}
4095#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
252b5132
RH		 4096\f
4097#ifdef TE_PE
4098
99a814a1 4099/* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
252b5132
RH		 4100
4101/* Set the current section. */
4102static void
4103ppc_set_current_section (new)
4104 segT new;
4105{
4106 ppc_previous_section = ppc_current_section;
4107 ppc_current_section = new;
4108}
4109
4110/* pseudo-op: .previous
4111 behaviour: toggles the current section with the previous section.
4112 errors: None
99a814a1
AM		 4113 warnings: "No previous section" */
4114
252b5132 4115static void
99a814a1 4116ppc_previous (ignore)
5480ccf3 4117 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4118{
4119 symbolS *tmp;
4120
81d4177b 4121 if (ppc_previous_section == NULL)
252b5132 4122 {
99a814a1 4123 as_warn (_("No previous section to return to. Directive ignored."));
252b5132
RH		 4124 return;
4125 }
4126
99a814a1 4127 subseg_set (ppc_previous_section, 0);
252b5132 4128
99a814a1 4129 ppc_set_current_section (ppc_previous_section);
252b5132
RH		 4130}
4131
4132/* pseudo-op: .pdata
4133 behaviour: predefined read only data section
b34976b6 4134 double word aligned
252b5132
RH		 4135 errors: None
4136 warnings: None
4137 initial: .section .pdata "adr3"
b34976b6 4138 a - don't know -- maybe a misprint
252b5132
RH		 4139 d - initialized data
4140 r - readable
4141 3 - double word aligned (that would be 4 byte boundary)
4142
4143 commentary:
4144 Tag index tables (also known as the function table) for exception
99a814a1 4145 handling, debugging, etc. */
252b5132 4146
252b5132 4147static void
99a814a1 4148ppc_pdata (ignore)
5480ccf3 4149 int ignore ATTRIBUTE_UNUSED;
252b5132 4150{
81d4177b 4151 if (pdata_section == 0)
252b5132
RH		 4152 {
4153 pdata_section = subseg_new (".pdata", 0);
81d4177b 4154
252b5132
RH		 4155 bfd_set_section_flags (stdoutput, pdata_section,
4156 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4157 | SEC_READONLY | SEC_DATA ));
81d4177b 4158
252b5132
RH		 4159 bfd_set_section_alignment (stdoutput, pdata_section, 2);
4160 }
4161 else
4162 {
99a814a1 4163 pdata_section = subseg_new (".pdata", 0);
252b5132 4164 }
99a814a1 4165 ppc_set_current_section (pdata_section);
252b5132
RH		 4166}
4167
4168/* pseudo-op: .ydata
4169 behaviour: predefined read only data section
b34976b6 4170 double word aligned
252b5132
RH		 4171 errors: None
4172 warnings: None
4173 initial: .section .ydata "drw3"
b34976b6 4174 a - don't know -- maybe a misprint
252b5132
RH		 4175 d - initialized data
4176 r - readable
4177 3 - double word aligned (that would be 4 byte boundary)
4178 commentary:
4179 Tag tables (also known as the scope table) for exception handling,
99a814a1
AM		 4180 debugging, etc. */
4181
252b5132 4182static void
99a814a1 4183ppc_ydata (ignore)
5480ccf3 4184 int ignore ATTRIBUTE_UNUSED;
252b5132 4185{
81d4177b 4186 if (ydata_section == 0)
252b5132
RH		 4187 {
4188 ydata_section = subseg_new (".ydata", 0);
4189 bfd_set_section_flags (stdoutput, ydata_section,
99a814a1
AM		 4190 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4191 | SEC_READONLY | SEC_DATA ));
252b5132
RH		 4192
4193 bfd_set_section_alignment (stdoutput, ydata_section, 3);
4194 }
4195 else
4196 {
4197 ydata_section = subseg_new (".ydata", 0);
4198 }
99a814a1 4199 ppc_set_current_section (ydata_section);
252b5132
RH		 4200}
4201
4202/* pseudo-op: .reldata
4203 behaviour: predefined read write data section
b34976b6 4204 double word aligned (4-byte)
252b5132
RH		 4205 FIXME: relocation is applied to it
4206 FIXME: what's the difference between this and .data?
4207 errors: None
4208 warnings: None
4209 initial: .section .reldata "drw3"
4210 d - initialized data
4211 r - readable
4212 w - writeable
4213 3 - double word aligned (that would be 8 byte boundary)
4214
4215 commentary:
4216 Like .data, but intended to hold data subject to relocation, such as
99a814a1
AM		 4217 function descriptors, etc. */
4218
252b5132 4219static void
99a814a1 4220ppc_reldata (ignore)
5480ccf3 4221 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4222{
4223 if (reldata_section == 0)
4224 {
4225 reldata_section = subseg_new (".reldata", 0);
4226
4227 bfd_set_section_flags (stdoutput, reldata_section,
99a814a1
AM		 4228 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4229 | SEC_DATA));
252b5132
RH		 4230
4231 bfd_set_section_alignment (stdoutput, reldata_section, 2);
4232 }
4233 else
4234 {
4235 reldata_section = subseg_new (".reldata", 0);
4236 }
99a814a1 4237 ppc_set_current_section (reldata_section);
252b5132
RH		 4238}
4239
4240/* pseudo-op: .rdata
4241 behaviour: predefined read only data section
b34976b6 4242 double word aligned
252b5132
RH		 4243 errors: None
4244 warnings: None
4245 initial: .section .rdata "dr3"
4246 d - initialized data
4247 r - readable
99a814a1
AM		 4248 3 - double word aligned (that would be 4 byte boundary) */
4249
252b5132 4250static void
99a814a1 4251ppc_rdata (ignore)
5480ccf3 4252 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4253{
4254 if (rdata_section == 0)
4255 {
4256 rdata_section = subseg_new (".rdata", 0);
4257 bfd_set_section_flags (stdoutput, rdata_section,
4258 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
4259 | SEC_READONLY | SEC_DATA ));
4260
4261 bfd_set_section_alignment (stdoutput, rdata_section, 2);
4262 }
4263 else
4264 {
4265 rdata_section = subseg_new (".rdata", 0);
4266 }
99a814a1 4267 ppc_set_current_section (rdata_section);
252b5132
RH		 4268}
4269
4270/* pseudo-op: .ualong
81d4177b 4271 behaviour: much like .int, with the exception that no alignment is
b34976b6 4272 performed.
252b5132
RH		 4273 FIXME: test the alignment statement
4274 errors: None
99a814a1
AM		 4275 warnings: None */
4276
252b5132 4277static void
99a814a1 4278ppc_ualong (ignore)
5480ccf3 4279 int ignore ATTRIBUTE_UNUSED;
252b5132 4280{
99a814a1
AM		 4281 /* Try for long. */
4282 cons (4);
252b5132
RH		 4283}
4284
4285/* pseudo-op: .znop <symbol name>
4286 behaviour: Issue a nop instruction
b34976b6 4287 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
252b5132
RH		 4288 the supplied symbol name.
4289 errors: None
99a814a1
AM		 4290 warnings: Missing symbol name */
4291
252b5132 4292static void
99a814a1 4293ppc_znop (ignore)
5480ccf3 4294 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4295{
4296 unsigned long insn;
4297 const struct powerpc_opcode *opcode;
4298 expressionS ex;
4299 char *f;
252b5132 4300 symbolS *sym;
252b5132
RH		 4301 char *symbol_name;
4302 char c;
4303 char *name;
4304 unsigned int exp;
4305 flagword flags;
4306 asection *sec;
4307
99a814a1 4308 /* Strip out the symbol name. */
252b5132
RH		 4309 symbol_name = input_line_pointer;
4310 c = get_symbol_end ();
4311
4312 name = xmalloc (input_line_pointer - symbol_name + 1);
4313 strcpy (name, symbol_name);
4314
4315 sym = symbol_find_or_make (name);
4316
4317 *input_line_pointer = c;
4318
4319 SKIP_WHITESPACE ();
4320
4321 /* Look up the opcode in the hash table. */
4322 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
4323
99a814a1 4324 /* Stick in the nop. */
252b5132
RH		 4325 insn = opcode->opcode;
4326
4327 /* Write out the instruction. */
4328 f = frag_more (4);
4329 md_number_to_chars (f, insn, 4);
4330 fix_new (frag_now,
4331 f - frag_now->fr_literal,
4332 4,
4333 sym,
4334 0,
4335 0,
4336 BFD_RELOC_16_GOT_PCREL);
4337
4338}
4339
81d4177b
KH		 4340/* pseudo-op:
4341 behaviour:
4342 errors:
99a814a1
AM		 4343 warnings: */
4344
252b5132 4345static void
99a814a1 4346ppc_pe_comm (lcomm)
252b5132
RH		 4347 int lcomm;
4348{
4349 register char *name;
4350 register char c;
4351 register char *p;
4352 offsetT temp;
4353 register symbolS *symbolP;
4354 offsetT align;
4355
4356 name = input_line_pointer;
4357 c = get_symbol_end ();
4358
99a814a1 4359 /* just after name is now '\0'. */
252b5132
RH		 4360 p = input_line_pointer;
4361 *p = c;
4362 SKIP_WHITESPACE ();
4363 if (*input_line_pointer != ',')
4364 {
4365 as_bad (_("Expected comma after symbol-name: rest of line ignored."));
4366 ignore_rest_of_line ();
4367 return;
4368 }
4369
4370 input_line_pointer++; /* skip ',' */
4371 if ((temp = get_absolute_expression ()) < 0)
4372 {
4373 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4374 ignore_rest_of_line ();
4375 return;
4376 }
4377
4378 if (! lcomm)
4379 {
4380 /* The third argument to .comm is the alignment. */
4381 if (*input_line_pointer != ',')
4382 align = 3;
4383 else
4384 {
4385 ++input_line_pointer;
4386 align = get_absolute_expression ();
4387 if (align <= 0)
4388 {
4389 as_warn (_("ignoring bad alignment"));
4390 align = 3;
4391 }
4392 }
4393 }
4394
4395 *p = 0;
4396 symbolP = symbol_find_or_make (name);
4397
4398 *p = c;
4399 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4400 {
4401 as_bad (_("Ignoring attempt to re-define symbol `%s'."),
4402 S_GET_NAME (symbolP));
4403 ignore_rest_of_line ();
4404 return;
4405 }
4406
4407 if (S_GET_VALUE (symbolP))
4408 {
4409 if (S_GET_VALUE (symbolP) != (valueT) temp)
4410 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4411 S_GET_NAME (symbolP),
4412 (long) S_GET_VALUE (symbolP),
4413 (long) temp);
4414 }
4415 else
4416 {
4417 S_SET_VALUE (symbolP, (valueT) temp);
4418 S_SET_EXTERNAL (symbolP);
4419 }
4420
4421 demand_empty_rest_of_line ();
4422}
4423
4424/*
4425 * implement the .section pseudo op:
4426 * .section name {, "flags"}
4427 * ^ ^
4428 * | +--- optional flags: 'b' for bss
4429 * | 'i' for info
4430 * +-- section name 'l' for lib
4431 * 'n' for noload
4432 * 'o' for over
4433 * 'w' for data
4434 * 'd' (apparently m88k for data)
4435 * 'x' for text
4436 * But if the argument is not a quoted string, treat it as a
4437 * subsegment number.
4438 *
4439 * FIXME: this is a copy of the section processing from obj-coff.c, with
4440 * additions/changes for the moto-pas assembler support. There are three
4441 * categories:
4442 *
81d4177b 4443 * FIXME: I just noticed this. This doesn't work at all really. It it
252b5132
RH		 4444 * setting bits that bfd probably neither understands or uses. The
4445 * correct approach (?) will have to incorporate extra fields attached
4446 * to the section to hold the system specific stuff. (krk)
4447 *
4448 * Section Contents:
4449 * 'a' - unknown - referred to in documentation, but no definition supplied
4450 * 'c' - section has code
4451 * 'd' - section has initialized data
4452 * 'u' - section has uninitialized data
4453 * 'i' - section contains directives (info)
4454 * 'n' - section can be discarded
4455 * 'R' - remove section at link time
4456 *
4457 * Section Protection:
4458 * 'r' - section is readable
4459 * 'w' - section is writeable
4460 * 'x' - section is executable
4461 * 's' - section is sharable
4462 *
4463 * Section Alignment:
4464 * '0' - align to byte boundary
4465 * '1' - align to halfword undary
4466 * '2' - align to word boundary
4467 * '3' - align to doubleword boundary
4468 * '4' - align to quadword boundary
4469 * '5' - align to 32 byte boundary
4470 * '6' - align to 64 byte boundary
4471 *
4472 */
4473
4474void
4475ppc_pe_section (ignore)
5480ccf3 4476 int ignore ATTRIBUTE_UNUSED;
252b5132 4477{
99a814a1 4478 /* Strip out the section name. */
252b5132
RH		 4479 char *section_name;
4480 char c;
4481 char *name;
4482 unsigned int exp;
4483 flagword flags;
4484 segT sec;
4485 int align;
4486
4487 section_name = input_line_pointer;
4488 c = get_symbol_end ();
4489
4490 name = xmalloc (input_line_pointer - section_name + 1);
4491 strcpy (name, section_name);
4492
4493 *input_line_pointer = c;
4494
4495 SKIP_WHITESPACE ();
4496
4497 exp = 0;
4498 flags = SEC_NO_FLAGS;
4499
4500 if (strcmp (name, ".idata$2") == 0)
4501 {
4502 align = 0;
4503 }
4504 else if (strcmp (name, ".idata$3") == 0)
4505 {
4506 align = 0;
4507 }
4508 else if (strcmp (name, ".idata$4") == 0)
4509 {
4510 align = 2;
4511 }
4512 else if (strcmp (name, ".idata$5") == 0)
4513 {
4514 align = 2;
4515 }
4516 else if (strcmp (name, ".idata$6") == 0)
4517 {
4518 align = 1;
4519 }
4520 else
99a814a1
AM		 4521 /* Default alignment to 16 byte boundary. */
4522 align = 4;
252b5132
RH		 4523
4524 if (*input_line_pointer == ',')
4525 {
4526 ++input_line_pointer;
4527 SKIP_WHITESPACE ();
4528 if (*input_line_pointer != '"')
4529 exp = get_absolute_expression ();
4530 else
4531 {
4532 ++input_line_pointer;
4533 while (*input_line_pointer != '"'
4534 && ! is_end_of_line[(unsigned char) *input_line_pointer])
4535 {
4536 switch (*input_line_pointer)
4537 {
4538 /* Section Contents */
4539 case 'a': /* unknown */
4540 as_bad (_("Unsupported section attribute -- 'a'"));
4541 break;
4542 case 'c': /* code section */
81d4177b 4543 flags |= SEC_CODE;
252b5132
RH		 4544 break;
4545 case 'd': /* section has initialized data */
4546 flags |= SEC_DATA;
4547 break;
4548 case 'u': /* section has uninitialized data */
4549 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
4550 in winnt.h */
4551 flags |= SEC_ROM;
4552 break;
4553 case 'i': /* section contains directives (info) */
4554 /* FIXME: This is IMAGE_SCN_LNK_INFO
4555 in winnt.h */
4556 flags |= SEC_HAS_CONTENTS;
4557 break;
4558 case 'n': /* section can be discarded */
81d4177b 4559 flags &=~ SEC_LOAD;
252b5132
RH		 4560 break;
4561 case 'R': /* Remove section at link time */
4562 flags |= SEC_NEVER_LOAD;
4563 break;
4564
4565 /* Section Protection */
4566 case 'r': /* section is readable */
4567 flags |= IMAGE_SCN_MEM_READ;
4568 break;
4569 case 'w': /* section is writeable */
4570 flags |= IMAGE_SCN_MEM_WRITE;
4571 break;
4572 case 'x': /* section is executable */
4573 flags |= IMAGE_SCN_MEM_EXECUTE;
4574 break;
4575 case 's': /* section is sharable */
4576 flags |= IMAGE_SCN_MEM_SHARED;
4577 break;
4578
4579 /* Section Alignment */
4580 case '0': /* align to byte boundary */
4581 flags |= IMAGE_SCN_ALIGN_1BYTES;
4582 align = 0;
4583 break;
4584 case '1': /* align to halfword boundary */
4585 flags |= IMAGE_SCN_ALIGN_2BYTES;
4586 align = 1;
4587 break;
4588 case '2': /* align to word boundary */
4589 flags |= IMAGE_SCN_ALIGN_4BYTES;
4590 align = 2;
4591 break;
4592 case '3': /* align to doubleword boundary */
4593 flags |= IMAGE_SCN_ALIGN_8BYTES;
4594 align = 3;
4595 break;
4596 case '4': /* align to quadword boundary */
4597 flags |= IMAGE_SCN_ALIGN_16BYTES;
4598 align = 4;
4599 break;
4600 case '5': /* align to 32 byte boundary */
4601 flags |= IMAGE_SCN_ALIGN_32BYTES;
4602 align = 5;
4603 break;
4604 case '6': /* align to 64 byte boundary */
4605 flags |= IMAGE_SCN_ALIGN_64BYTES;
4606 align = 6;
4607 break;
4608
4609 default:
99a814a1
AM		 4610 as_bad (_("unknown section attribute '%c'"),
4611 *input_line_pointer);
252b5132
RH		 4612 break;
4613 }
4614 ++input_line_pointer;
4615 }
4616 if (*input_line_pointer == '"')
4617 ++input_line_pointer;
4618 }
4619 }
4620
4621 sec = subseg_new (name, (subsegT) exp);
4622
99a814a1 4623 ppc_set_current_section (sec);
252b5132
RH		 4624
4625 if (flags != SEC_NO_FLAGS)
4626 {
4627 if (! bfd_set_section_flags (stdoutput, sec, flags))
4628 as_bad (_("error setting flags for \"%s\": %s"),
4629 bfd_section_name (stdoutput, sec),
4630 bfd_errmsg (bfd_get_error ()));
4631 }
4632
99a814a1 4633 bfd_set_section_alignment (stdoutput, sec, align);
252b5132
RH		 4634
4635}
4636
4637static void
4638ppc_pe_function (ignore)
5480ccf3 4639 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4640{
4641 char *name;
4642 char endc;
4643 symbolS *ext_sym;
4644
4645 name = input_line_pointer;
4646 endc = get_symbol_end ();
4647
4648 ext_sym = symbol_find_or_make (name);
4649
4650 *input_line_pointer = endc;
4651
4652 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4653 SF_SET_FUNCTION (ext_sym);
4654 SF_SET_PROCESS (ext_sym);
4655 coff_add_linesym (ext_sym);
4656
4657 demand_empty_rest_of_line ();
4658}
4659
4660static void
4661ppc_pe_tocd (ignore)
5480ccf3 4662 int ignore ATTRIBUTE_UNUSED;
252b5132
RH		 4663{
4664 if (tocdata_section == 0)
4665 {
4666 tocdata_section = subseg_new (".tocd", 0);
99a814a1 4667 /* FIXME: section flags won't work. */
252b5132
RH		 4668 bfd_set_section_flags (stdoutput, tocdata_section,
4669 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
99a814a1 4670 | SEC_READONLY | SEC_DATA));
252b5132
RH		 4671
4672 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
4673 }
4674 else
4675 {
4676 rdata_section = subseg_new (".tocd", 0);
4677 }
4678
99a814a1 4679 ppc_set_current_section (tocdata_section);
252b5132
RH		 4680
4681 demand_empty_rest_of_line ();
4682}
4683
4684/* Don't adjust TOC relocs to use the section symbol. */
4685
4686int
4687ppc_pe_fix_adjustable (fix)
4688 fixS *fix;
4689{
4690 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
4691}
4692
4693#endif
4694\f
4695#ifdef OBJ_XCOFF
4696
4697/* XCOFF specific symbol and file handling. */
4698
4699/* Canonicalize the symbol name. We use the to force the suffix, if
4700 any, to use square brackets, and to be in upper case. */
4701
4702char *
4703ppc_canonicalize_symbol_name (name)
4704 char *name;
4705{
4706 char *s;
4707
4708 if (ppc_stab_symbol)
4709 return name;
4710
4711 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
4712 ;
4713 if (*s != '\0')
4714 {
4715 char brac;
4716
4717 if (*s == '[')
4718 brac = ']';
4719 else
4720 {
4721 *s = '[';
4722 brac = '}';
4723 }
4724
4725 for (s++; *s != '\0' && *s != brac; s++)
3882b010 4726 *s = TOUPPER (*s);
252b5132
RH		 4727
4728 if (*s == '\0' || s[1] != '\0')
4729 as_bad (_("bad symbol suffix"));
4730
4731 *s = ']';
4732 }
4733
4734 return name;
4735}
4736
4737/* Set the class of a symbol based on the suffix, if any. This is
4738 called whenever a new symbol is created. */
4739
4740void
4741ppc_symbol_new_hook (sym)
4742 symbolS *sym;
4743{
809ffe0d 4744 struct ppc_tc_sy *tc;
252b5132
RH		 4745 const char *s;
4746
809ffe0d
ILT		 4747 tc = symbol_get_tc (sym);
4748 tc->next = NULL;
4749 tc->output = 0;
4750 tc->class = -1;
4751 tc->real_name = NULL;
4752 tc->subseg = 0;
4753 tc->align = 0;
4754 tc->size = NULL;
4755 tc->within = NULL;
252b5132
RH		 4756
4757 if (ppc_stab_symbol)
4758 return;
4759
4760 s = strchr (S_GET_NAME (sym), '[');
4761 if (s == (const char *) NULL)
4762 {
4763 /* There is no suffix. */
4764 return;
4765 }
4766
4767 ++s;
4768
4769 switch (s[0])
4770 {
4771 case 'B':
4772 if (strcmp (s, "BS]") == 0)
809ffe0d 4773 tc->class = XMC_BS;
252b5132
RH		 4774 break;
4775 case 'D':
4776 if (strcmp (s, "DB]") == 0)
809ffe0d 4777 tc->class = XMC_DB;
252b5132 4778 else if (strcmp (s, "DS]") == 0)
809ffe0d 4779 tc->class = XMC_DS;
252b5132
RH		 4780 break;
4781 case 'G':
4782 if (strcmp (s, "GL]") == 0)
809ffe0d 4783 tc->class = XMC_GL;
252b5132
RH		 4784 break;
4785 case 'P':
4786 if (strcmp (s, "PR]") == 0)
809ffe0d 4787 tc->class = XMC_PR;
252b5132
RH		 4788 break;
4789 case 'R':
4790 if (strcmp (s, "RO]") == 0)
809ffe0d 4791 tc->class = XMC_RO;
252b5132 4792 else if (strcmp (s, "RW]") == 0)
809ffe0d 4793 tc->class = XMC_RW;
252b5132
RH		 4794 break;
4795 case 'S':
4796 if (strcmp (s, "SV]") == 0)
809ffe0d 4797 tc->class = XMC_SV;
252b5132
RH		 4798 break;
4799 case 'T':
4800 if (strcmp (s, "TC]") == 0)
809ffe0d 4801 tc->class = XMC_TC;
252b5132 4802 else if (strcmp (s, "TI]") == 0)
809ffe0d 4803 tc->class = XMC_TI;
252b5132 4804 else if (strcmp (s, "TB]") == 0)
809ffe0d 4805 tc->class = XMC_TB;
252b5132 4806 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
809ffe0d 4807 tc->class = XMC_TC0;
252b5132
RH		 4808 break;
4809 case 'U':
4810 if (strcmp (s, "UA]") == 0)
809ffe0d 4811 tc->class = XMC_UA;
252b5132 4812 else if (strcmp (s, "UC]") == 0)
809ffe0d 4813 tc->class = XMC_UC;
252b5132
RH		 4814 break;
4815 case 'X':
4816 if (strcmp (s, "XO]") == 0)
809ffe0d 4817 tc->class = XMC_XO;
252b5132
RH		 4818 break;
4819 }
4820
809ffe0d 4821 if (tc->class == -1)
252b5132
RH		 4822 as_bad (_("Unrecognized symbol suffix"));
4823}
4824
4825/* Set the class of a label based on where it is defined. This
4826 handles symbols without suffixes. Also, move the symbol so that it
4827 follows the csect symbol. */
4828
4829void
4830ppc_frob_label (sym)
4831 symbolS *sym;
4832{
4833 if (ppc_current_csect != (symbolS *) NULL)
4834 {
809ffe0d
ILT		 4835 if (symbol_get_tc (sym)->class == -1)
4836 symbol_get_tc (sym)->class = symbol_get_tc (ppc_current_csect)->class;
252b5132
RH		 4837
4838 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
809ffe0d
ILT		 4839 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
4840 &symbol_rootP, &symbol_lastP);
4841 symbol_get_tc (ppc_current_csect)->within = sym;
252b5132
RH		 4842 }
4843}
4844
4845/* This variable is set by ppc_frob_symbol if any absolute symbols are
4846 seen. It tells ppc_adjust_symtab whether it needs to look through
4847 the symbols. */
4848
b34976b6 4849static bfd_boolean ppc_saw_abs;
252b5132
RH		 4850
4851/* Change the name of a symbol just before writing it out. Set the
4852 real name if the .rename pseudo-op was used. Otherwise, remove any
4853 class suffix. Return 1 if the symbol should not be included in the
4854 symbol table. */
4855
4856int
4857ppc_frob_symbol (sym)
4858 symbolS *sym;
4859{
4860 static symbolS *ppc_last_function;
4861 static symbolS *set_end;
4862
4863 /* Discard symbols that should not be included in the output symbol
4864 table. */
809ffe0d
ILT		 4865 if (! symbol_used_in_reloc_p (sym)
4866 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
670ec21d 4867 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4868 && ! symbol_get_tc (sym)->output
252b5132
RH		 4869 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
4870 return 1;
4871
a161fe53
AM		 4872 /* This one will disappear anyway. Don't make a csect sym for it. */
4873 if (sym == abs_section_sym)
4874 return 1;
4875
809ffe0d
ILT		 4876 if (symbol_get_tc (sym)->real_name != (char *) NULL)
4877 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
252b5132
RH		 4878 else
4879 {
4880 const char *name;
4881 const char *s;
4882
4883 name = S_GET_NAME (sym);
4884 s = strchr (name, '[');
4885 if (s != (char *) NULL)
4886 {
4887 unsigned int len;
4888 char *snew;
4889
4890 len = s - name;
4891 snew = xmalloc (len + 1);
4892 memcpy (snew, name, len);
4893 snew[len] = '\0';
4894
4895 S_SET_NAME (sym, snew);
4896 }
4897 }
4898
4899 if (set_end != (symbolS *) NULL)
4900 {
4901 SA_SET_SYM_ENDNDX (set_end, sym);
4902 set_end = NULL;
4903 }
4904
4905 if (SF_GET_FUNCTION (sym))
4906 {
4907 if (ppc_last_function != (symbolS *) NULL)
4908 as_bad (_("two .function pseudo-ops with no intervening .ef"));
4909 ppc_last_function = sym;
809ffe0d 4910 if (symbol_get_tc (sym)->size != (symbolS *) NULL)
252b5132 4911 {
6386f3a7 4912 resolve_symbol_value (symbol_get_tc (sym)->size);
809ffe0d
ILT		 4913 SA_SET_SYM_FSIZE (sym,
4914 (long) S_GET_VALUE (symbol_get_tc (sym)->size));
252b5132
RH		 4915 }
4916 }
4917 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
4918 && strcmp (S_GET_NAME (sym), ".ef") == 0)
4919 {
4920 if (ppc_last_function == (symbolS *) NULL)
4921 as_bad (_(".ef with no preceding .function"));
4922 else
4923 {
4924 set_end = ppc_last_function;
4925 ppc_last_function = NULL;
4926
4927 /* We don't have a C_EFCN symbol, but we need to force the
4928 COFF backend to believe that it has seen one. */
4929 coff_last_function = NULL;
4930 }
4931 }
4932
670ec21d 4933 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
809ffe0d 4934 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
252b5132
RH		 4935 && S_GET_STORAGE_CLASS (sym) != C_FILE
4936 && S_GET_STORAGE_CLASS (sym) != C_FCN
4937 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
4938 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
4939 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
4940 && S_GET_STORAGE_CLASS (sym) != C_BINCL
4941 && S_GET_STORAGE_CLASS (sym) != C_EINCL
4942 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
4943 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
4944
4945 if (S_GET_STORAGE_CLASS (sym) == C_EXT
4946 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
4947 {
4948 int i;
4949 union internal_auxent *a;
4950
4951 /* Create a csect aux. */
4952 i = S_GET_NUMBER_AUXILIARY (sym);
4953 S_SET_NUMBER_AUXILIARY (sym, i + 1);
809ffe0d
ILT		 4954 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
4955 if (symbol_get_tc (sym)->class == XMC_TC0)
252b5132
RH		 4956 {
4957 /* This is the TOC table. */
4958 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
4959 a->x_csect.x_scnlen.l = 0;
4960 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
4961 }
809ffe0d 4962 else if (symbol_get_tc (sym)->subseg != 0)
252b5132
RH		 4963 {
4964 /* This is a csect symbol. x_scnlen is the size of the
4965 csect. */
809ffe0d 4966 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
252b5132
RH		 4967 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
4968 S_GET_SEGMENT (sym))
4969 - S_GET_VALUE (sym));
4970 else
4971 {
6386f3a7 4972 resolve_symbol_value (symbol_get_tc (sym)->next);
809ffe0d 4973 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
252b5132
RH		 4974 - S_GET_VALUE (sym));
4975 }
809ffe0d 4976 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
252b5132
RH		 4977 }
4978 else if (S_GET_SEGMENT (sym) == bss_section)
4979 {
4980 /* This is a common symbol. */
809ffe0d
ILT		 4981 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
4982 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
252b5132 4983 if (S_IS_EXTERNAL (sym))
809ffe0d 4984 symbol_get_tc (sym)->class = XMC_RW;
252b5132 4985 else
809ffe0d 4986 symbol_get_tc (sym)->class = XMC_BS;
252b5132
RH		 4987 }
4988 else if (S_GET_SEGMENT (sym) == absolute_section)
4989 {
4990 /* This is an absolute symbol. The csect will be created by
99a814a1 4991 ppc_adjust_symtab. */
b34976b6 4992 ppc_saw_abs = TRUE;
252b5132 4993 a->x_csect.x_smtyp = XTY_LD;
809ffe0d
ILT		 4994 if (symbol_get_tc (sym)->class == -1)
4995 symbol_get_tc (sym)->class = XMC_XO;
252b5132
RH		 4996 }
4997 else if (! S_IS_DEFINED (sym))
4998 {
4999 /* This is an external symbol. */
5000 a->x_csect.x_scnlen.l = 0;
5001 a->x_csect.x_smtyp = XTY_ER;
5002 }
809ffe0d 5003 else if (symbol_get_tc (sym)->class == XMC_TC)
252b5132
RH		 5004 {
5005 symbolS *next;
5006
5007 /* This is a TOC definition. x_scnlen is the size of the
5008 TOC entry. */
5009 next = symbol_next (sym);
809ffe0d 5010 while (symbol_get_tc (next)->class == XMC_TC0)
252b5132
RH		 5011 next = symbol_next (next);
5012 if (next == (symbolS *) NULL
809ffe0d 5013 || symbol_get_tc (next)->class != XMC_TC)
252b5132
RH		 5014 {
5015 if (ppc_after_toc_frag == (fragS *) NULL)
5016 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5017 data_section)
5018 - S_GET_VALUE (sym));
5019 else
5020 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5021 - S_GET_VALUE (sym));
5022 }
5023 else
5024 {
6386f3a7 5025 resolve_symbol_value (next);
252b5132
RH		 5026 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5027 - S_GET_VALUE (sym));
5028 }
5029 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5030 }
5031 else
5032 {
5033 symbolS *csect;
5034
5035 /* This is a normal symbol definition. x_scnlen is the
5036 symbol index of the containing csect. */
5037 if (S_GET_SEGMENT (sym) == text_section)
5038 csect = ppc_text_csects;
5039 else if (S_GET_SEGMENT (sym) == data_section)
5040 csect = ppc_data_csects;
5041 else
5042 abort ();
5043
5044 /* Skip the initial dummy symbol. */
809ffe0d 5045 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5046
5047 if (csect == (symbolS *) NULL)
5048 {
5049 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5050 a->x_csect.x_scnlen.l = 0;
5051 }
5052 else
5053 {
809ffe0d 5054 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
252b5132 5055 {
6386f3a7 5056 resolve_symbol_value (symbol_get_tc (csect)->next);
809ffe0d
ILT		 5057 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5058 > S_GET_VALUE (sym))
252b5132 5059 break;
809ffe0d 5060 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5061 }
5062
809ffe0d
ILT		 5063 a->x_csect.x_scnlen.p =
5064 coffsymbol (symbol_get_bfdsym (csect))->native;
5065 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5066 1;
252b5132
RH		 5067 }
5068 a->x_csect.x_smtyp = XTY_LD;
5069 }
81d4177b 5070
252b5132
RH		 5071 a->x_csect.x_parmhash = 0;
5072 a->x_csect.x_snhash = 0;
809ffe0d 5073 if (symbol_get_tc (sym)->class == -1)
252b5132
RH		 5074 a->x_csect.x_smclas = XMC_PR;
5075 else
809ffe0d 5076 a->x_csect.x_smclas = symbol_get_tc (sym)->class;
252b5132
RH		 5077 a->x_csect.x_stab = 0;
5078 a->x_csect.x_snstab = 0;
5079
5080 /* Don't let the COFF backend resort these symbols. */
809ffe0d 5081 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
252b5132
RH		 5082 }
5083 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5084 {
5085 /* We want the value to be the symbol index of the referenced
5086 csect symbol. BFD will do that for us if we set the right
5087 flags. */
b782de16
AM		 5088 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5089 combined_entry_type *c = coffsymbol (bsym)->native;
5090
5091 S_SET_VALUE (sym, (valueT) (size_t) c);
809ffe0d 5092 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
252b5132
RH		 5093 }
5094 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5095 {
5096 symbolS *block;
5097 symbolS *csect;
5098
5099 /* The value is the offset from the enclosing csect. */
809ffe0d
ILT		 5100 block = symbol_get_tc (sym)->within;
5101 csect = symbol_get_tc (block)->within;
6386f3a7 5102 resolve_symbol_value (csect);
252b5132
RH		 5103 S_SET_VALUE (sym, S_GET_VALUE (sym) - S_GET_VALUE (csect));
5104 }
5105 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5106 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5107 {
5108 /* We want the value to be a file offset into the line numbers.
99a814a1
AM		 5109 BFD will do that for us if we set the right flags. We have
5110 already set the value correctly. */
809ffe0d 5111 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
252b5132
RH		 5112 }
5113
5114 return 0;
5115}
5116
5117/* Adjust the symbol table. This creates csect symbols for all
5118 absolute symbols. */
5119
5120void
5121ppc_adjust_symtab ()
5122{
5123 symbolS *sym;
5124
5125 if (! ppc_saw_abs)
5126 return;
5127
5128 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
5129 {
5130 symbolS *csect;
5131 int i;
5132 union internal_auxent *a;
5133
5134 if (S_GET_SEGMENT (sym) != absolute_section)
5135 continue;
5136
5137 csect = symbol_create (".abs[XO]", absolute_section,
5138 S_GET_VALUE (sym), &zero_address_frag);
809ffe0d 5139 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
252b5132
RH		 5140 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
5141 i = S_GET_NUMBER_AUXILIARY (csect);
5142 S_SET_NUMBER_AUXILIARY (csect, i + 1);
809ffe0d 5143 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
252b5132
RH		 5144 a->x_csect.x_scnlen.l = 0;
5145 a->x_csect.x_smtyp = XTY_SD;
5146 a->x_csect.x_parmhash = 0;
5147 a->x_csect.x_snhash = 0;
5148 a->x_csect.x_smclas = XMC_XO;
5149 a->x_csect.x_stab = 0;
5150 a->x_csect.x_snstab = 0;
5151
5152 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
5153
5154 i = S_GET_NUMBER_AUXILIARY (sym);
809ffe0d
ILT		 5155 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
5156 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
5157 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
252b5132
RH		 5158 }
5159
b34976b6 5160 ppc_saw_abs = FALSE;
252b5132
RH		 5161}
5162
5163/* Set the VMA for a section. This is called on all the sections in
5164 turn. */
5165
5166void
5167ppc_frob_section (sec)
5168 asection *sec;
5169{
931e13a6 5170 static bfd_vma vma = 0;
252b5132 5171
931e13a6 5172 vma = md_section_align (sec, vma);
252b5132
RH		 5173 bfd_set_section_vma (stdoutput, sec, vma);
5174 vma += bfd_section_size (stdoutput, sec);
5175}
5176
5177#endif /* OBJ_XCOFF */
5178\f
5179/* Turn a string in input_line_pointer into a floating point constant
bc0d738a
NC		 5180 of type TYPE, and store the appropriate bytes in *LITP. The number
5181 of LITTLENUMS emitted is stored in *SIZEP. An error message is
252b5132
RH		 5182 returned, or NULL on OK. */
5183
5184char *
5185md_atof (type, litp, sizep)
5186 int type;
5187 char *litp;
5188 int *sizep;
5189{
5190 int prec;
5191 LITTLENUM_TYPE words[4];
5192 char *t;
5193 int i;
5194
5195 switch (type)
5196 {
5197 case 'f':
5198 prec = 2;
5199 break;
5200
5201 case 'd':
5202 prec = 4;
5203 break;
5204
5205 default:
5206 *sizep = 0;
5207 return _("bad call to md_atof");
5208 }
5209
5210 t = atof_ieee (input_line_pointer, type, words);
5211 if (t)
5212 input_line_pointer = t;
5213
5214 *sizep = prec * 2;
5215
5216 if (target_big_endian)
5217 {
5218 for (i = 0; i < prec; i++)
5219 {
5220 md_number_to_chars (litp, (valueT) words[i], 2);
5221 litp += 2;
5222 }
5223 }
5224 else
5225 {
5226 for (i = prec - 1; i >= 0; i--)
5227 {
5228 md_number_to_chars (litp, (valueT) words[i], 2);
5229 litp += 2;
5230 }
5231 }
81d4177b 5232
252b5132
RH		 5233 return NULL;
5234}
5235
5236/* Write a value out to the object file, using the appropriate
5237 endianness. */
5238
5239void
5240md_number_to_chars (buf, val, n)
5241 char *buf;
5242 valueT val;
5243 int n;
5244{
5245 if (target_big_endian)
5246 number_to_chars_bigendian (buf, val, n);
5247 else
5248 number_to_chars_littleendian (buf, val, n);
5249}
5250
5251/* Align a section (I don't know why this is machine dependent). */
5252
5253valueT
5254md_section_align (seg, addr)
5255 asection *seg;
5256 valueT addr;
5257{
5258 int align = bfd_get_section_alignment (stdoutput, seg);
5259
5260 return ((addr + (1 << align) - 1) & (-1 << align));
5261}
5262
5263/* We don't have any form of relaxing. */
5264
5265int
5266md_estimate_size_before_relax (fragp, seg)
92161534
ILT		 5267 fragS *fragp ATTRIBUTE_UNUSED;
5268 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 5269{
5270 abort ();
5271 return 0;
5272}
5273
5274/* Convert a machine dependent frag. We never generate these. */
5275
5276void
5277md_convert_frag (abfd, sec, fragp)
92161534
ILT		 5278 bfd *abfd ATTRIBUTE_UNUSED;
5279 asection *sec ATTRIBUTE_UNUSED;
5280 fragS *fragp ATTRIBUTE_UNUSED;
252b5132
RH		 5281{
5282 abort ();
5283}
5284
5285/* We have no need to default values of symbols. */
5286
252b5132
RH		 5287symbolS *
5288md_undefined_symbol (name)
92161534 5289 char *name ATTRIBUTE_UNUSED;
252b5132
RH		 5290{
5291 return 0;
5292}
5293\f
5294/* Functions concerning relocs. */
5295
5296/* The location from which a PC relative jump should be calculated,
5297 given a PC relative reloc. */
5298
5299long
5300md_pcrel_from_section (fixp, sec)
5301 fixS *fixp;
92161534 5302 segT sec ATTRIBUTE_UNUSED;
252b5132
RH		 5303{
5304 return fixp->fx_frag->fr_address + fixp->fx_where;
5305}
5306
5307#ifdef OBJ_XCOFF
5308
5309/* This is called to see whether a fixup should be adjusted to use a
5310 section symbol. We take the opportunity to change a fixup against
5311 a symbol in the TOC subsegment into a reloc against the
5312 corresponding .tc symbol. */
5313
5314int
5315ppc_fix_adjustable (fix)
5316 fixS *fix;
5317{
b782de16
AM		 5318 valueT val = resolve_symbol_value (fix->fx_addsy);
5319 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
5320 TC_SYMFIELD_TYPE *tc;
5321
5322 if (symseg == absolute_section)
5323 return 0;
252b5132 5324
252b5132 5325 if (ppc_toc_csect != (symbolS *) NULL
252b5132 5326 && fix->fx_addsy != ppc_toc_csect
b782de16 5327 && symseg == data_section
252b5132
RH		 5328 && val >= ppc_toc_frag->fr_address
5329 && (ppc_after_toc_frag == (fragS *) NULL
5330 || val < ppc_after_toc_frag->fr_address))
5331 {
5332 symbolS *sy;
5333
5334 for (sy = symbol_next (ppc_toc_csect);
5335 sy != (symbolS *) NULL;
5336 sy = symbol_next (sy))
5337 {
b782de16
AM		 5338 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
5339
5340 if (sy_tc->class == XMC_TC0)
252b5132 5341 continue;
b782de16 5342 if (sy_tc->class != XMC_TC)
252b5132 5343 break;
b782de16 5344 if (val == resolve_symbol_value (sy))
252b5132
RH		 5345 {
5346 fix->fx_addsy = sy;
5347 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
5348 return 0;
5349 }
5350 }
5351
5352 as_bad_where (fix->fx_file, fix->fx_line,
5353 _("symbol in .toc does not match any .tc"));
5354 }
5355
5356 /* Possibly adjust the reloc to be against the csect. */
b782de16
AM		 5357 tc = symbol_get_tc (fix->fx_addsy);
5358 if (tc->subseg == 0
5359 && tc->class != XMC_TC0
5360 && tc->class != XMC_TC
5361 && symseg != bss_section
252b5132 5362 /* Don't adjust if this is a reloc in the toc section. */
b782de16 5363 && (symseg != data_section
252b5132
RH		 5364 || ppc_toc_csect == NULL
5365 || val < ppc_toc_frag->fr_address
5366 || (ppc_after_toc_frag != NULL
5367 && val >= ppc_after_toc_frag->fr_address)))
5368 {
5369 symbolS *csect;
b782de16 5370 symbolS *next_csect;
252b5132 5371
b782de16 5372 if (symseg == text_section)
252b5132 5373 csect = ppc_text_csects;
b782de16 5374 else if (symseg == data_section)
252b5132
RH		 5375 csect = ppc_data_csects;
5376 else
5377 abort ();
5378
5379 /* Skip the initial dummy symbol. */
809ffe0d 5380 csect = symbol_get_tc (csect)->next;
252b5132
RH		 5381
5382 if (csect != (symbolS *) NULL)
5383 {
b782de16
AM		 5384 while ((next_csect = symbol_get_tc (csect)->next) != (symbolS *) NULL
5385 && (symbol_get_frag (next_csect)->fr_address <= val))
252b5132
RH		 5386 {
5387 /* If the csect address equals the symbol value, then we
99a814a1
AM		 5388 have to look through the full symbol table to see
5389 whether this is the csect we want. Note that we will
5390 only get here if the csect has zero length. */
b782de16
AM		 5391 if (symbol_get_frag (csect)->fr_address == val
5392 && S_GET_VALUE (csect) == val)
252b5132
RH		 5393 {
5394 symbolS *scan;
5395
809ffe0d 5396 for (scan = symbol_next (csect);
252b5132 5397 scan != NULL;
809ffe0d 5398 scan = symbol_next (scan))
252b5132 5399 {
809ffe0d 5400 if (symbol_get_tc (scan)->subseg != 0)
252b5132
RH		 5401 break;
5402 if (scan == fix->fx_addsy)
5403 break;
5404 }
5405
5406 /* If we found the symbol before the next csect
99a814a1 5407 symbol, then this is the csect we want. */
252b5132
RH		 5408 if (scan == fix->fx_addsy)
5409 break;
5410 }
5411
b782de16 5412 csect = next_csect;
252b5132
RH		 5413 }
5414
b782de16 5415 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
252b5132
RH		 5416 fix->fx_addsy = csect;
5417 }
b782de16 5418 return 0;
252b5132
RH		 5419 }
5420
5421 /* Adjust a reloc against a .lcomm symbol to be against the base
5422 .lcomm. */
b782de16 5423 if (symseg == bss_section
252b5132
RH		 5424 && ! S_IS_EXTERNAL (fix->fx_addsy))
5425 {
b782de16
AM		 5426 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
5427
5428 fix->fx_offset += val - resolve_symbol_value (sy);
5429 fix->fx_addsy = sy;
252b5132
RH		 5430 }
5431
5432 return 0;
5433}
5434
5435/* A reloc from one csect to another must be kept. The assembler
5436 will, of course, keep relocs between sections, and it will keep
5437 absolute relocs, but we need to force it to keep PC relative relocs
5438 between two csects in the same section. */
5439
5440int
5441ppc_force_relocation (fix)
5442 fixS *fix;
5443{
5444 /* At this point fix->fx_addsy should already have been converted to
5445 a csect symbol. If the csect does not include the fragment, then
5446 we need to force the relocation. */
5447 if (fix->fx_pcrel
5448 && fix->fx_addsy != NULL
809ffe0d
ILT		 5449 && symbol_get_tc (fix->fx_addsy)->subseg != 0
5450 && ((symbol_get_frag (fix->fx_addsy)->fr_address
5451 > fix->fx_frag->fr_address)
5452 || (symbol_get_tc (fix->fx_addsy)->next != NULL
5453 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
252b5132
RH		 5454 <= fix->fx_frag->fr_address))))
5455 return 1;
5456
ae6063d4 5457 return generic_force_reloc (fix);
252b5132
RH		 5458}
5459
5460#endif /* OBJ_XCOFF */
5461
0baf16f2 5462#ifdef OBJ_ELF
a161fe53
AM		 5463/* If this function returns non-zero, it guarantees that a relocation
5464 will be emitted for a fixup. */
5465
5466int
5467ppc_force_relocation (fix)
5468 fixS *fix;
5469{
5470 /* Branch prediction relocations must force a relocation, as must
5471 the vtable description relocs. */
5472 switch (fix->fx_r_type)
5473 {
5474 case BFD_RELOC_PPC_B16_BRTAKEN:
5475 case BFD_RELOC_PPC_B16_BRNTAKEN:
5476 case BFD_RELOC_PPC_BA16_BRTAKEN:
5477 case BFD_RELOC_PPC_BA16_BRNTAKEN:
c744ecf2 5478 case BFD_RELOC_24_PLT_PCREL:
a161fe53 5479 case BFD_RELOC_PPC64_TOC:
a161fe53
AM		 5480 return 1;
5481 default:
5482 break;
5483 }
5484
cdba85ec
AM		 5485 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
5486 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
5487 return 1;
5488
ae6063d4 5489 return generic_force_reloc (fix);
a161fe53
AM		 5490}
5491
0baf16f2
AM		 5492int
5493ppc_fix_adjustable (fix)
5494 fixS *fix;
252b5132 5495{
0baf16f2
AM		 5496 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
5497 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
5498 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
5499 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
5500 && fix->fx_r_type != BFD_RELOC_GPREL16
5501 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
5502 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
cdba85ec 5503 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
ab1e9ef7 5504 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
252b5132 5505}
0baf16f2 5506#endif
252b5132
RH		 5507
5508/* Apply a fixup to the object code. This is called for all the
5509 fixups we generated by the call to fix_new_exp, above. In the call
5510 above we used a reloc code which was the largest legal reloc code
5511 plus the operand index. Here we undo that to recover the operand
5512 index. At this point all symbol values should be fully resolved,
5513 and we attempt to completely resolve the reloc. If we can not do
5514 that, we determine the correct reloc code and put it back in the
5515 fixup. */
5516
94f592af 5517void
55cf6793 5518md_apply_fix (fixP, valP, seg)
94f592af
NC		 5519 fixS *fixP;
5520 valueT * valP;
0baf16f2 5521 segT seg ATTRIBUTE_UNUSED;
252b5132 5522{
94f592af 5523 valueT value = * valP;
252b5132
RH		 5524
5525#ifdef OBJ_ELF
94f592af 5526 if (fixP->fx_addsy != NULL)
252b5132 5527 {
a161fe53 5528 /* Hack around bfd_install_relocation brain damage. */
94f592af
NC		 5529 if (fixP->fx_pcrel)
5530 value += fixP->fx_frag->fr_address + fixP->fx_where;
252b5132
RH		 5531 }
5532 else
94f592af 5533 fixP->fx_done = 1;
252b5132 5534#else
a161fe53 5535 /* FIXME FIXME FIXME: The value we are passed in *valP includes
7be1c489
AM		 5536 the symbol values. If we are doing this relocation the code in
5537 write.c is going to call bfd_install_relocation, which is also
5538 going to use the symbol value. That means that if the reloc is
5539 fully resolved we want to use *valP since bfd_install_relocation is
5540 not being used.
252b5132 5541 However, if the reloc is not fully resolved we do not want to use
a161fe53
AM		 5542 *valP, and must use fx_offset instead. However, if the reloc
5543 is PC relative, we do want to use *valP since it includes the
252b5132 5544 result of md_pcrel_from. This is confusing. */
94f592af
NC		 5545 if (fixP->fx_addsy == (symbolS *) NULL)
5546 fixP->fx_done = 1;
5547
5548 else if (fixP->fx_pcrel)
5549 ;
5550
252b5132 5551 else
a161fe53
AM		 5552 value = fixP->fx_offset;
5553#endif
5554
5555 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 5556 {
a161fe53
AM		 5557 /* We can't actually support subtracting a symbol. */
5558 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
252b5132 5559 }
252b5132 5560
94f592af 5561 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132
RH		 5562 {
5563 int opindex;
5564 const struct powerpc_operand *operand;
5565 char *where;
5566 unsigned long insn;
5567
94f592af 5568 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
252b5132
RH		 5569
5570 operand = &powerpc_operands[opindex];
5571
5572#ifdef OBJ_XCOFF
0baf16f2
AM		 5573 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
5574 does not generate a reloc. It uses the offset of `sym' within its
5575 csect. Other usages, such as `.long sym', generate relocs. This
5576 is the documented behaviour of non-TOC symbols. */
252b5132
RH		 5577 if ((operand->flags & PPC_OPERAND_PARENS) != 0
5578 && operand->bits == 16
5579 && operand->shift == 0
2b3c4602 5580 && (operand->insert == NULL || ppc_obj64)
94f592af
NC		 5581 && fixP->fx_addsy != NULL
5582 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
5583 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC
5584 && symbol_get_tc (fixP->fx_addsy)->class != XMC_TC0
5585 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
252b5132 5586 {
94f592af
NC		 5587 value = fixP->fx_offset;
5588 fixP->fx_done = 1;
252b5132
RH		 5589 }
5590#endif
5591
5592 /* Fetch the instruction, insert the fully resolved operand
5593 value, and stuff the instruction back again. */
94f592af 5594 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH		 5595 if (target_big_endian)
5596 insn = bfd_getb32 ((unsigned char *) where);
5597 else
5598 insn = bfd_getl32 ((unsigned char *) where);
5599 insn = ppc_insert_operand (insn, operand, (offsetT) value,
94f592af 5600 fixP->fx_file, fixP->fx_line);
252b5132
RH		 5601 if (target_big_endian)
5602 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5603 else
5604 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5605
94f592af
NC		 5606 if (fixP->fx_done)
5607 /* Nothing else to do here. */
5608 return;
252b5132 5609
94f592af 5610 assert (fixP->fx_addsy != NULL);
0baf16f2 5611
252b5132
RH		 5612 /* Determine a BFD reloc value based on the operand information.
5613 We are only prepared to turn a few of the operands into
0baf16f2 5614 relocs. */
11b37b7b
AM		 5615 if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5616 && operand->bits == 26
5617 && operand->shift == 0)
94f592af 5618 fixP->fx_r_type = BFD_RELOC_PPC_B26;
11b37b7b
AM		 5619 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
5620 && operand->bits == 16
5621 && operand->shift == 0)
95210096
AM		 5622 {
5623 fixP->fx_r_type = BFD_RELOC_PPC_B16;
5624#ifdef OBJ_XCOFF
5625 fixP->fx_size = 2;
5626 if (target_big_endian)
5627 fixP->fx_where += 2;
5628#endif
5629 }
11b37b7b
AM		 5630 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5631 && operand->bits == 26
5632 && operand->shift == 0)
94f592af 5633 fixP->fx_r_type = BFD_RELOC_PPC_BA26;
11b37b7b
AM		 5634 else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0
5635 && operand->bits == 16
5636 && operand->shift == 0)
95210096
AM		 5637 {
5638 fixP->fx_r_type = BFD_RELOC_PPC_BA16;
5639#ifdef OBJ_XCOFF
5640 fixP->fx_size = 2;
5641 if (target_big_endian)
5642 fixP->fx_where += 2;
5643#endif
5644 }
0baf16f2 5645#if defined (OBJ_XCOFF) || defined (OBJ_ELF)
11b37b7b
AM		 5646 else if ((operand->flags & PPC_OPERAND_PARENS) != 0
5647 && operand->bits == 16
a7fc733f 5648 && operand->shift == 0)
11b37b7b 5649 {
a7fc733f
AM		 5650 if (ppc_is_toc_sym (fixP->fx_addsy))
5651 {
5652 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
0baf16f2 5653#ifdef OBJ_ELF
a7fc733f
AM		 5654 if (ppc_obj64
5655 && (operand->flags & PPC_OPERAND_DS) != 0)
5656 fixP->fx_r_type = BFD_RELOC_PPC64_TOC16_DS;
5657#endif
5658 }
5659 else
5660 {
5661 fixP->fx_r_type = BFD_RELOC_16;
5662#ifdef OBJ_ELF
5663 if (ppc_obj64
5664 && (operand->flags & PPC_OPERAND_DS) != 0)
5665 fixP->fx_r_type = BFD_RELOC_PPC64_ADDR16_DS;
0baf16f2 5666#endif
a7fc733f 5667 }
94f592af 5668 fixP->fx_size = 2;
11b37b7b 5669 if (target_big_endian)
94f592af 5670 fixP->fx_where += 2;
11b37b7b 5671 }
0baf16f2 5672#endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
11b37b7b 5673 else
252b5132
RH		 5674 {
5675 char *sfile;
5676 unsigned int sline;
5677
5678 /* Use expr_symbol_where to see if this is an expression
0baf16f2 5679 symbol. */
94f592af
NC		 5680 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
5681 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH		 5682 _("unresolved expression that must be resolved"));
5683 else
94f592af 5684 as_bad_where (fixP->fx_file, fixP->fx_line,
0baf16f2 5685 _("unsupported relocation against %s"),
94f592af
NC		 5686 S_GET_NAME (fixP->fx_addsy));
5687 fixP->fx_done = 1;
5688 return;
252b5132
RH		 5689 }
5690 }
5691 else
5692 {
5693#ifdef OBJ_ELF
94f592af 5694 ppc_elf_validate_fix (fixP, seg);
252b5132 5695#endif
94f592af 5696 switch (fixP->fx_r_type)
252b5132 5697 {
252b5132 5698 case BFD_RELOC_CTOR:
2b3c4602 5699 if (ppc_obj64)
9c7977b3
AM		 5700 goto ctor64;
5701 /* fall through */
5702
0baf16f2 5703 case BFD_RELOC_32:
94f592af
NC		 5704 if (fixP->fx_pcrel)
5705 fixP->fx_r_type = BFD_RELOC_32_PCREL;
99a814a1 5706 /* fall through */
252b5132
RH		 5707
5708 case BFD_RELOC_RVA:
5709 case BFD_RELOC_32_PCREL:
252b5132 5710 case BFD_RELOC_PPC_EMB_NADDR32:
94f592af 5711 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5712 value, 4);
5713 break;
5714
7f6d05e8 5715 case BFD_RELOC_64:
9c7977b3 5716 ctor64:
94f592af
NC		 5717 if (fixP->fx_pcrel)
5718 fixP->fx_r_type = BFD_RELOC_64_PCREL;
99a814a1 5719 /* fall through */
0baf16f2 5720
7f6d05e8 5721 case BFD_RELOC_64_PCREL:
94f592af 5722 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7f6d05e8 5723 value, 8);
81d4177b 5724 break;
0baf16f2 5725
252b5132
RH		 5726 case BFD_RELOC_GPREL16:
5727 case BFD_RELOC_16_GOT_PCREL:
5728 case BFD_RELOC_16_GOTOFF:
5729 case BFD_RELOC_LO16_GOTOFF:
5730 case BFD_RELOC_HI16_GOTOFF:
5731 case BFD_RELOC_HI16_S_GOTOFF:
1cfc59d5 5732 case BFD_RELOC_16_BASEREL:
252b5132
RH		 5733 case BFD_RELOC_LO16_BASEREL:
5734 case BFD_RELOC_HI16_BASEREL:
5735 case BFD_RELOC_HI16_S_BASEREL:
5736 case BFD_RELOC_PPC_EMB_NADDR16:
5737 case BFD_RELOC_PPC_EMB_NADDR16_LO:
5738 case BFD_RELOC_PPC_EMB_NADDR16_HI:
5739 case BFD_RELOC_PPC_EMB_NADDR16_HA:
5740 case BFD_RELOC_PPC_EMB_SDAI16:
5741 case BFD_RELOC_PPC_EMB_SDA2REL:
5742 case BFD_RELOC_PPC_EMB_SDA2I16:
5743 case BFD_RELOC_PPC_EMB_RELSEC16:
5744 case BFD_RELOC_PPC_EMB_RELST_LO:
5745 case BFD_RELOC_PPC_EMB_RELST_HI:
5746 case BFD_RELOC_PPC_EMB_RELST_HA:
5747 case BFD_RELOC_PPC_EMB_RELSDA:
5748 case BFD_RELOC_PPC_TOC16:
0baf16f2 5749#ifdef OBJ_ELF
0baf16f2
AM		 5750 case BFD_RELOC_PPC64_TOC16_LO:
5751 case BFD_RELOC_PPC64_TOC16_HI:
5752 case BFD_RELOC_PPC64_TOC16_HA:
0baf16f2 5753#endif
94f592af 5754 if (fixP->fx_pcrel)
252b5132 5755 {
94f592af
NC		 5756 if (fixP->fx_addsy != NULL)
5757 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5758 _("cannot emit PC relative %s relocation against %s"),
94f592af
NC		 5759 bfd_get_reloc_code_name (fixP->fx_r_type),
5760 S_GET_NAME (fixP->fx_addsy));
252b5132 5761 else
94f592af 5762 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132 5763 _("cannot emit PC relative %s relocation"),
94f592af 5764 bfd_get_reloc_code_name (fixP->fx_r_type));
252b5132
RH		 5765 }
5766
94f592af 5767 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
252b5132
RH		 5768 value, 2);
5769 break;
5770
3c9d25f4
AM		 5771 case BFD_RELOC_16:
5772 if (fixP->fx_pcrel)
5773 fixP->fx_r_type = BFD_RELOC_16_PCREL;
5774 /* fall through */
5775
5776 case BFD_RELOC_16_PCREL:
5777 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5778 value, 2);
5779 break;
5780
5781 case BFD_RELOC_LO16:
5782 if (fixP->fx_pcrel)
5783 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
5784 /* fall through */
5785
5786 case BFD_RELOC_LO16_PCREL:
5787 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5788 value, 2);
5789 break;
5790
252b5132
RH		 5791 /* This case happens when you write, for example,
5792 lis %r3,(L1-L2)@ha
5793 where L1 and L2 are defined later. */
5794 case BFD_RELOC_HI16:
94f592af 5795 if (fixP->fx_pcrel)
3c9d25f4
AM		 5796 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
5797 /* fall through */
5798
5799 case BFD_RELOC_HI16_PCREL:
94f592af 5800 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5801 PPC_HI (value), 2);
252b5132 5802 break;
0baf16f2 5803
252b5132 5804 case BFD_RELOC_HI16_S:
94f592af 5805 if (fixP->fx_pcrel)
3c9d25f4
AM		 5806 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
5807 /* fall through */
5808
5809 case BFD_RELOC_HI16_S_PCREL:
94f592af 5810 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5811 PPC_HA (value), 2);
5812 break;
5813
5814#ifdef OBJ_ELF
0baf16f2 5815 case BFD_RELOC_PPC64_HIGHER:
94f592af 5816 if (fixP->fx_pcrel)
0baf16f2 5817 abort ();
94f592af 5818 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2 5819 PPC_HIGHER (value), 2);
252b5132
RH		 5820 break;
5821
0baf16f2 5822 case BFD_RELOC_PPC64_HIGHER_S:
94f592af 5823 if (fixP->fx_pcrel)
0baf16f2 5824 abort ();
94f592af 5825 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5826 PPC_HIGHERA (value), 2);
5827 break;
5828
5829 case BFD_RELOC_PPC64_HIGHEST:
94f592af 5830 if (fixP->fx_pcrel)
0baf16f2 5831 abort ();
94f592af 5832 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5833 PPC_HIGHEST (value), 2);
5834 break;
5835
5836 case BFD_RELOC_PPC64_HIGHEST_S:
94f592af 5837 if (fixP->fx_pcrel)
0baf16f2 5838 abort ();
94f592af 5839 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
0baf16f2
AM		 5840 PPC_HIGHESTA (value), 2);
5841 break;
5842
5843 case BFD_RELOC_PPC64_ADDR16_DS:
5844 case BFD_RELOC_PPC64_ADDR16_LO_DS:
5845 case BFD_RELOC_PPC64_GOT16_DS:
5846 case BFD_RELOC_PPC64_GOT16_LO_DS:
5847 case BFD_RELOC_PPC64_PLT16_LO_DS:
5848 case BFD_RELOC_PPC64_SECTOFF_DS:
5849 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
5850 case BFD_RELOC_PPC64_TOC16_DS:
5851 case BFD_RELOC_PPC64_TOC16_LO_DS:
5852 case BFD_RELOC_PPC64_PLTGOT16_DS:
5853 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
94f592af 5854 if (fixP->fx_pcrel)
0baf16f2
AM		 5855 abort ();
5856 {
2132e3a3 5857 char *where = fixP->fx_frag->fr_literal + fixP->fx_where;
3d8aea2f 5858 unsigned long val, mask;
0baf16f2
AM		 5859
5860 if (target_big_endian)
adadcc0c 5861 val = bfd_getb32 (where - 2);
0baf16f2 5862 else
adadcc0c
AM		 5863 val = bfd_getl32 (where);
5864 mask = 0xfffc;
5865 /* lq insns reserve the four lsbs. */
5866 if ((ppc_cpu & PPC_OPCODE_POWER4) != 0
77a6138a 5867 && (val & (0x3f << 26)) == (56u << 26))
adadcc0c
AM		 5868 mask = 0xfff0;
5869 val |= value & mask;
0baf16f2
AM		 5870 if (target_big_endian)
5871 bfd_putb16 ((bfd_vma) val, where);
5872 else
5873 bfd_putl16 ((bfd_vma) val, where);
5874 }
5875 break;
cdba85ec 5876
ba0b2174
AM		 5877 case BFD_RELOC_PPC_B16_BRTAKEN:
5878 case BFD_RELOC_PPC_B16_BRNTAKEN:
5879 case BFD_RELOC_PPC_BA16_BRTAKEN:
5880 case BFD_RELOC_PPC_BA16_BRNTAKEN:
5881 break;
5882
cdba85ec 5883 case BFD_RELOC_PPC_TLS:
7c1d0959
L		 5884 break;
5885
cdba85ec
AM		 5886 case BFD_RELOC_PPC_DTPMOD:
5887 case BFD_RELOC_PPC_TPREL16:
5888 case BFD_RELOC_PPC_TPREL16_LO:
5889 case BFD_RELOC_PPC_TPREL16_HI:
5890 case BFD_RELOC_PPC_TPREL16_HA:
5891 case BFD_RELOC_PPC_TPREL:
5892 case BFD_RELOC_PPC_DTPREL16:
5893 case BFD_RELOC_PPC_DTPREL16_LO:
5894 case BFD_RELOC_PPC_DTPREL16_HI:
5895 case BFD_RELOC_PPC_DTPREL16_HA:
5896 case BFD_RELOC_PPC_DTPREL:
5897 case BFD_RELOC_PPC_GOT_TLSGD16:
5898 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
5899 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
5900 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
5901 case BFD_RELOC_PPC_GOT_TLSLD16:
5902 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
5903 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
5904 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
5905 case BFD_RELOC_PPC_GOT_TPREL16:
5906 case BFD_RELOC_PPC_GOT_TPREL16_LO:
5907 case BFD_RELOC_PPC_GOT_TPREL16_HI:
5908 case BFD_RELOC_PPC_GOT_TPREL16_HA:
5909 case BFD_RELOC_PPC_GOT_DTPREL16:
5910 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
5911 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
5912 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
5913 case BFD_RELOC_PPC64_TPREL16_DS:
5914 case BFD_RELOC_PPC64_TPREL16_LO_DS:
5915 case BFD_RELOC_PPC64_TPREL16_HIGHER:
5916 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
5917 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
5918 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
5919 case BFD_RELOC_PPC64_DTPREL16_DS:
5920 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
5921 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
5922 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
5923 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
5924 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7c1d0959 5925 S_SET_THREAD_LOCAL (fixP->fx_addsy);
cdba85ec 5926 break;
0baf16f2 5927#endif
252b5132 5928 /* Because SDA21 modifies the register field, the size is set to 4
99a814a1 5929 bytes, rather than 2, so offset it here appropriately. */
252b5132 5930 case BFD_RELOC_PPC_EMB_SDA21:
94f592af 5931 if (fixP->fx_pcrel)
252b5132
RH		 5932 abort ();
5933
94f592af 5934 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where
252b5132
RH		 5935 + ((target_big_endian) ? 2 : 0),
5936 value, 2);
5937 break;
5938
5939 case BFD_RELOC_8:
94f592af 5940 if (fixP->fx_pcrel)
31a91399
NC		 5941 {
5942 /* This can occur if there is a bug in the input assembler, eg:
b7d7dc63 5943 ".byte <undefined_symbol> - ." */
31a91399
NC		 5944 if (fixP->fx_addsy)
5945 as_bad (_("Unable to handle reference to symbol %s"),
5946 S_GET_NAME (fixP->fx_addsy));
5947 else
5948 as_bad (_("Unable to resolve expression"));
5949 fixP->fx_done = 1;
5950 }
5951 else
5952 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
5953 value, 1);
252b5132
RH		 5954 break;
5955
5956 case BFD_RELOC_24_PLT_PCREL:
5957 case BFD_RELOC_PPC_LOCAL24PC:
94f592af 5958 if (!fixP->fx_pcrel && !fixP->fx_done)
252b5132
RH		 5959 abort ();
5960
94f592af 5961 if (fixP->fx_done)
99a814a1
AM		 5962 {
5963 char *where;
5964 unsigned long insn;
5965
5966 /* Fetch the instruction, insert the fully resolved operand
5967 value, and stuff the instruction back again. */
94f592af 5968 where = fixP->fx_frag->fr_literal + fixP->fx_where;
99a814a1
AM		 5969 if (target_big_endian)
5970 insn = bfd_getb32 ((unsigned char *) where);
5971 else
5972 insn = bfd_getl32 ((unsigned char *) where);
5973 if ((value & 3) != 0)
94f592af 5974 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5975 _("must branch to an address a multiple of 4"));
5976 if ((offsetT) value < -0x40000000
5977 || (offsetT) value >= 0x40000000)
94f592af 5978 as_bad_where (fixP->fx_file, fixP->fx_line,
99a814a1
AM		 5979 _("@local or @plt branch destination is too far away, %ld bytes"),
5980 (long) value);
5981 insn = insn | (value & 0x03fffffc);
5982 if (target_big_endian)
5983 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
5984 else
5985 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
5986 }
252b5132
RH		 5987 break;
5988
5989 case BFD_RELOC_VTABLE_INHERIT:
94f592af
NC		 5990 fixP->fx_done = 0;
5991 if (fixP->fx_addsy
5992 && !S_IS_DEFINED (fixP->fx_addsy)
5993 && !S_IS_WEAK (fixP->fx_addsy))
5994 S_SET_WEAK (fixP->fx_addsy);
252b5132
RH		 5995 break;
5996
5997 case BFD_RELOC_VTABLE_ENTRY:
94f592af 5998 fixP->fx_done = 0;
252b5132
RH		 5999 break;
6000
0baf16f2 6001#ifdef OBJ_ELF
0baf16f2
AM		 6002 /* Generated by reference to `sym@tocbase'. The sym is
6003 ignored by the linker. */
6004 case BFD_RELOC_PPC64_TOC:
94f592af 6005 fixP->fx_done = 0;
0baf16f2 6006 break;
0baf16f2 6007#endif
252b5132 6008 default:
bc805888 6009 fprintf (stderr,
94f592af 6010 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
99a814a1 6011 fflush (stderr);
252b5132
RH		 6012 abort ();
6013 }
6014 }
6015
6016#ifdef OBJ_ELF
94f592af 6017 fixP->fx_addnumber = value;
4e6935a6
AM		 6018
6019 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
6020 from the section contents. If we are going to be emitting a reloc
6021 then the section contents are immaterial, so don't warn if they
6022 happen to overflow. Leave such warnings to ld. */
6023 if (!fixP->fx_done)
6024 fixP->fx_no_overflow = 1;
252b5132 6025#else
94f592af
NC		 6026 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
6027 fixP->fx_addnumber = 0;
252b5132
RH		 6028 else
6029 {
6030#ifdef TE_PE
94f592af 6031 fixP->fx_addnumber = 0;
252b5132
RH		 6032#else
6033 /* We want to use the offset within the data segment of the
6034 symbol, not the actual VMA of the symbol. */
94f592af
NC		 6035 fixP->fx_addnumber =
6036 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy));
252b5132
RH		 6037#endif
6038 }
6039#endif
252b5132
RH		 6040}
6041
6042/* Generate a reloc for a fixup. */
6043
6044arelent *
6045tc_gen_reloc (seg, fixp)
92161534 6046 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH		 6047 fixS *fixp;
6048{
6049 arelent *reloc;
6050
6051 reloc = (arelent *) xmalloc (sizeof (arelent));
6052
49309057
ILT		 6053 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
6054 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH		 6055 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
6056 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
6057 if (reloc->howto == (reloc_howto_type *) NULL)
6058 {
6059 as_bad_where (fixp->fx_file, fixp->fx_line,
99a814a1
AM		 6060 _("reloc %d not supported by object file format"),
6061 (int) fixp->fx_r_type);
252b5132
RH		 6062 return NULL;
6063 }
6064 reloc->addend = fixp->fx_addnumber;
6065
6066 return reloc;
6067}
75e21f08
JJ		 6068
6069void
6070ppc_cfi_frame_initial_instructions ()
6071{
6072 cfi_add_CFA_def_cfa (1, 0);
6073}
6074
6075int
6076tc_ppc_regname_to_dw2regnum (const char *regname)
6077{
6078 unsigned int regnum = -1;
6079 unsigned int i;
6080 const char *p;
6081 char *q;
6082 static struct { char *name; int dw2regnum; } regnames[] =
6083 {
6084 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
6085 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
80f846b6 6086 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
75e21f08
JJ		 6087 { "spe_acc", 111 }, { "spefscr", 112 }
6088 };
6089
6090 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
6091 if (strcmp (regnames[i].name, regname) == 0)
6092 return regnames[i].dw2regnum;
6093
6094 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
6095 {
6096 p = regname + 1 + (regname[1] == '.');
6097 regnum = strtoul (p, &q, 10);
6098 if (p == q || *q || regnum >= 32)
6099 return -1;
6100 if (regname[0] == 'f')
b7d7dc63 6101 regnum += 32;
75e21f08 6102 else if (regname[0] == 'v')
b7d7dc63 6103 regnum += 77;
75e21f08
JJ		 6104 }
6105 else if (regname[0] == 'c' && regname[1] == 'r')
6106 {
6107 p = regname + 2 + (regname[2] == '.');
6108 if (p[0] < '0' || p[0] > '7' || p[1])
b7d7dc63 6109 return -1;
75e21f08
JJ		 6110 regnum = p[0] - '0' + 68;
6111 }
6112 return regnum;
6113}
GDB Binutils - Deliverables
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