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[ARM]: Don't tail-pad over-aligned functions to the alignment boundary.
[deliverable/binutils-gdb.git] / gas / config / tc-rl78.c
CommitLineData
99c513f6 1/* tc-rl78.c -- Assembler for the Renesas RL78
b90efa5b 2 Copyright (C) 2011-2015 Free Software Foundation, Inc.
99c513f6
DD		 3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to the Free
18 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
19 02110-1301, USA. */
20
21#include "as.h"
22#include "struc-symbol.h"
99c513f6
DD		 23#include "safe-ctype.h"
24#include "dwarf2dbg.h"
25#include "libbfd.h"
26#include "elf/common.h"
27#include "elf/rl78.h"
28#include "rl78-defs.h"
29#include "filenames.h"
30#include "listing.h"
31#include "sb.h"
32#include "macro.h"
33
34const char comment_chars[] = ";";
35/* Note that input_file.c hand checks for '#' at the beginning of the
36 first line of the input file. This is because the compiler outputs
37 #NO_APP at the beginning of its output. */
38const char line_comment_chars[] = "#";
cbf1fdc9
DD		 39/* Use something that isn't going to be needed by any expressions or
40 other syntax. */
41const char line_separator_chars[] = "@";
99c513f6
DD		 42
43const char EXP_CHARS[] = "eE";
44const char FLT_CHARS[] = "dD";
45
4046d87a
NC		 46/* ELF flags to set in the output file header. */
47static int elf_flags = 0;
48
99c513f6
DD		 49/*------------------------------------------------------------------*/
50
51char * rl78_lex_start;
52char * rl78_lex_end;
53
54typedef struct rl78_bytesT
55{
56 char prefix[1];
57 int n_prefix;
58 char base[4];
59 int n_base;
60 char ops[8];
61 int n_ops;
62 struct
63 {
64 expressionS exp;
65 char offset;
66 char nbits;
67 char type; /* RL78REL_*. */
68 int reloc;
69 fixS * fixP;
70 } fixups[2];
71 int n_fixups;
72 struct
73 {
74 char type;
75 char field_pos;
76 char val_ofs;
77 } relax[2];
78 int n_relax;
79 int link_relax;
80 fixS *link_relax_fixP;
81 char times_grown;
82 char times_shrank;
83} rl78_bytesT;
84
85static rl78_bytesT rl78_bytes;
86
0c315784
DD		 87void
88rl78_relax (int type, int pos)
89{
90 rl78_bytes.relax[rl78_bytes.n_relax].type = type;
91 rl78_bytes.relax[rl78_bytes.n_relax].field_pos = pos;
92 rl78_bytes.relax[rl78_bytes.n_relax].val_ofs = rl78_bytes.n_base + rl78_bytes.n_ops;
93 rl78_bytes.n_relax ++;
94}
95
9cea966c
DD		 96void
97rl78_linkrelax_addr16 (void)
98{
99 rl78_bytes.link_relax |= RL78_RELAXA_ADDR16;
100}
101
102void
103rl78_linkrelax_branch (void)
104{
105 rl78_bytes.link_relax |= RL78_RELAXA_BRA;
106}
107
99c513f6
DD		 108static void
109rl78_fixup (expressionS exp, int offsetbits, int nbits, int type)
110{
111 rl78_bytes.fixups[rl78_bytes.n_fixups].exp = exp;
112 rl78_bytes.fixups[rl78_bytes.n_fixups].offset = offsetbits;
113 rl78_bytes.fixups[rl78_bytes.n_fixups].nbits = nbits;
114 rl78_bytes.fixups[rl78_bytes.n_fixups].type = type;
115 rl78_bytes.fixups[rl78_bytes.n_fixups].reloc = exp.X_md;
116 rl78_bytes.n_fixups ++;
117}
118
119#define rl78_field_fixup(exp, offset, nbits, type) \
120 rl78_fixup (exp, offset + 8 * rl78_bytes.n_prefix), nbits, type)
121
122#define rl78_op_fixup(exp, offset, nbits, type) \
123 rl78_fixup (exp, offset + 8 * (rl78_bytes.n_prefix + rl78_bytes.n_base), nbits, type)
124
125void
126rl78_prefix (int p)
127{
128 rl78_bytes.prefix[0] = p;
129 rl78_bytes.n_prefix = 1;
130}
131
132int
133rl78_has_prefix ()
134{
135 return rl78_bytes.n_prefix;
136}
137
138void
139rl78_base1 (int b1)
140{
141 rl78_bytes.base[0] = b1;
142 rl78_bytes.n_base = 1;
143}
144
145void
146rl78_base2 (int b1, int b2)
147{
148 rl78_bytes.base[0] = b1;
149 rl78_bytes.base[1] = b2;
150 rl78_bytes.n_base = 2;
151}
152
153void
154rl78_base3 (int b1, int b2, int b3)
155{
156 rl78_bytes.base[0] = b1;
157 rl78_bytes.base[1] = b2;
158 rl78_bytes.base[2] = b3;
159 rl78_bytes.n_base = 3;
160}
161
162void
163rl78_base4 (int b1, int b2, int b3, int b4)
164{
165 rl78_bytes.base[0] = b1;
166 rl78_bytes.base[1] = b2;
167 rl78_bytes.base[2] = b3;
168 rl78_bytes.base[3] = b4;
169 rl78_bytes.n_base = 4;
170}
171
172#define F_PRECISION 2
173
174void
175rl78_op (expressionS exp, int nbytes, int type)
176{
177 int v = 0;
178
179 if ((exp.X_op == O_constant || exp.X_op == O_big)
180 && type != RL78REL_PCREL)
181 {
182 if (exp.X_op == O_big && exp.X_add_number <= 0)
183 {
184 LITTLENUM_TYPE w[2];
185 char * ip = rl78_bytes.ops + rl78_bytes.n_ops;
186
187 gen_to_words (w, F_PRECISION, 8);
188 ip[3] = w[0] >> 8;
189 ip[2] = w[0];
190 ip[1] = w[1] >> 8;
191 ip[0] = w[1];
192 rl78_bytes.n_ops += 4;
193 }
194 else
195 {
196 v = exp.X_add_number;
197 while (nbytes)
198 {
199 rl78_bytes.ops[rl78_bytes.n_ops++] =v & 0xff;
200 v >>= 8;
201 nbytes --;
202 }
203 }
204 }
205 else
206 {
4107ae22
DD		 207 if (nbytes > 2
208 && exp.X_md == BFD_RELOC_RL78_CODE)
209 exp.X_md = 0;
b3fe4307
NC		 210
211 if (nbytes == 1
212 && (exp.X_md == BFD_RELOC_RL78_LO16
213 || exp.X_md == BFD_RELOC_RL78_HI16))
214 as_bad (_("16-bit relocation used in 8-bit operand"));
215
216 if (nbytes == 2
217 && exp.X_md == BFD_RELOC_RL78_HI8)
218 as_bad (_("8-bit relocation used in 16-bit operand"));
219
99c513f6
DD		 220 rl78_op_fixup (exp, rl78_bytes.n_ops * 8, nbytes * 8, type);
221 memset (rl78_bytes.ops + rl78_bytes.n_ops, 0, nbytes);
222 rl78_bytes.n_ops += nbytes;
223 }
224}
225
226/* This gets complicated when the field spans bytes, because fields
227 are numbered from the MSB of the first byte as zero, and bits are
228 stored LSB towards the LSB of the byte. Thus, a simple four-bit
229 insertion of 12 at position 4 of 0x00 yields: 0x0b. A three-bit
230 insertion of b'MXL at position 7 is like this:
231
232 - - - - - - - - - - - - - - - -
233 M X L */
234
235void
236rl78_field (int val, int pos, int sz)
237{
238 int valm;
239 int bytep, bitp;
240
241 if (sz > 0)
242 {
243 if (val < 0 || val >= (1 << sz))
244 as_bad (_("Value %d doesn't fit in unsigned %d-bit field"), val, sz);
245 }
246 else
247 {
248 sz = - sz;
249 if (val < -(1 << (sz - 1)) || val >= (1 << (sz - 1)))
250 as_bad (_("Value %d doesn't fit in signed %d-bit field"), val, sz);
251 }
252
253 /* This code points at 'M' in the above example. */
254 bytep = pos / 8;
255 bitp = pos % 8;
256
257 while (bitp + sz > 8)
258 {
259 int ssz = 8 - bitp;
260 int svalm;
261
262 svalm = val >> (sz - ssz);
263 svalm = svalm & ((1 << ssz) - 1);
264 svalm = svalm << (8 - bitp - ssz);
265 gas_assert (bytep < rl78_bytes.n_base);
266 rl78_bytes.base[bytep] |= svalm;
267
268 bitp = 0;
269 sz -= ssz;
270 bytep ++;
271 }
272 valm = val & ((1 << sz) - 1);
273 valm = valm << (8 - bitp - sz);
274 gas_assert (bytep < rl78_bytes.n_base);
275 rl78_bytes.base[bytep] |= valm;
276}
277
278/*------------------------------------------------------------------*/
279
9cea966c
DD		 280enum options
281{
282 OPTION_RELAX = OPTION_MD_BASE,
4046d87a 283 OPTION_G10,
1740ba0c
NC		 284 OPTION_G13,
285 OPTION_G14,
856ea05c
KP		 286 OPTION_32BIT_DOUBLES,
287 OPTION_64BIT_DOUBLES,
9cea966c
DD		 288};
289
99c513f6
DD		 290#define RL78_SHORTOPTS ""
291const char * md_shortopts = RL78_SHORTOPTS;
292
293/* Assembler options. */
294struct option md_longopts[] =
295{
9cea966c 296 {"relax", no_argument, NULL, OPTION_RELAX},
4046d87a 297 {"mg10", no_argument, NULL, OPTION_G10},
1740ba0c
NC		 298 {"mg13", no_argument, NULL, OPTION_G13},
299 {"mg14", no_argument, NULL, OPTION_G14},
300 {"mrl78", no_argument, NULL, OPTION_G14},
856ea05c
KP		 301 {"m32bit-doubles", no_argument, NULL, OPTION_32BIT_DOUBLES},
302 {"m64bit-doubles", no_argument, NULL, OPTION_64BIT_DOUBLES},
99c513f6
DD		 303 {NULL, no_argument, NULL, 0}
304};
305size_t md_longopts_size = sizeof (md_longopts);
306
307int
9cea966c 308md_parse_option (int c, char * arg ATTRIBUTE_UNUSED)
99c513f6 309{
9cea966c
DD		 310 switch (c)
311 {
312 case OPTION_RELAX:
313 linkrelax = 1;
314 return 1;
315
4046d87a 316 case OPTION_G10:
1740ba0c 317 elf_flags &= ~ E_FLAG_RL78_CPU_MASK;
4046d87a
NC		 318 elf_flags |= E_FLAG_RL78_G10;
319 return 1;
856ea05c 320
1740ba0c
NC		 321 case OPTION_G13:
322 elf_flags &= ~ E_FLAG_RL78_CPU_MASK;
323 elf_flags |= E_FLAG_RL78_G13;
324 return 1;
325
326 case OPTION_G14:
327 elf_flags &= ~ E_FLAG_RL78_CPU_MASK;
328 elf_flags |= E_FLAG_RL78_G14;
329 return 1;
330
856ea05c
KP		 331 case OPTION_32BIT_DOUBLES:
332 elf_flags &= ~ E_FLAG_RL78_64BIT_DOUBLES;
333 return 1;
334
335 case OPTION_64BIT_DOUBLES:
336 elf_flags |= E_FLAG_RL78_64BIT_DOUBLES;
337 return 1;
9cea966c 338 }
99c513f6
DD		 339 return 0;
340}
341
342void
6ff71e76 343md_show_usage (FILE * stream)
99c513f6 344{
856ea05c 345 fprintf (stream, _(" RL78 specific command line options:\n"));
6ff71e76 346 fprintf (stream, _(" --mrelax Enable link time relaxation\n"));
856ea05c 347 fprintf (stream, _(" --mg10 Enable support for G10 variant\n"));
1740ba0c
NC		 348 fprintf (stream, _(" --mg13 Selects the G13 core.\n"));
349 fprintf (stream, _(" --mg14 Selects the G14 core [default]\n"));
350 fprintf (stream, _(" --mrl78 Alias for --mg14\n"));
856ea05c 351 fprintf (stream, _(" --m32bit-doubles [default]\n"));
6ff71e76 352 fprintf (stream, _(" --m64bit-doubles Source code uses 64-bit doubles\n"));
99c513f6
DD		 353}
354
99c513f6
DD		 355static void
356s_bss (int ignore ATTRIBUTE_UNUSED)
357{
358 int temp;
359
360 temp = get_absolute_expression ();
361 subseg_set (bss_section, (subsegT) temp);
362 demand_empty_rest_of_line ();
363}
364
856ea05c
KP		 365static void
366rl78_float_cons (int ignore ATTRIBUTE_UNUSED)
367{
368 if (elf_flags & E_FLAG_RL78_64BIT_DOUBLES)
369 return float_cons ('d');
370 return float_cons ('f');
371}
372
99c513f6
DD		 373/* The target specific pseudo-ops which we support. */
374const pseudo_typeS md_pseudo_table[] =
375{
856ea05c
KP		 376 /* Our "standard" pseudos. */
377 { "double", rl78_float_cons, 'd' },
378 { "bss", s_bss, 0 },
379 { "3byte", cons, 3 },
380 { "int", cons, 4 },
381 { "word", cons, 4 },
99c513f6
DD		 382
383 /* End of list marker. */
384 { NULL, NULL, 0 }
385};
386
387void
388md_begin (void)
389{
390}
391
392void
393rl78_md_end (void)
394{
395}
396
4046d87a
NC		 397/* Set the ELF specific flags. */
398void
399rl78_elf_final_processing (void)
400{
401 elf_elfheader (stdoutput)->e_flags |= elf_flags;
402}
403
99c513f6
DD		 404/* Write a value out to the object file, using the appropriate endianness. */
405void
406md_number_to_chars (char * buf, valueT val, int n)
407{
408 number_to_chars_littleendian (buf, val, n);
409}
410
c9d66558
DD		 411static void
412require_end_of_expr (char *fname)
413{
414 while (* input_line_pointer == ' '
415 || * input_line_pointer == '\t')
416 input_line_pointer ++;
417
418 if (! * input_line_pointer
419 || strchr ("\n\r,", * input_line_pointer)
420 || strchr (comment_chars, * input_line_pointer)
421 || strchr (line_comment_chars, * input_line_pointer)
422 || strchr (line_separator_chars, * input_line_pointer))
423 return;
424
425 as_bad (_("%%%s() must be outermost term in expression"), fname);
426}
427
99c513f6
DD		 428static struct
429{
430 char * fname;
431 int reloc;
432}
433reloc_functions[] =
434{
4107ae22 435 { "code", BFD_RELOC_RL78_CODE },
99c513f6
DD		 436 { "lo16", BFD_RELOC_RL78_LO16 },
437 { "hi16", BFD_RELOC_RL78_HI16 },
438 { "hi8", BFD_RELOC_RL78_HI8 },
439 { 0, 0 }
440};
441
442void
443md_operand (expressionS * exp ATTRIBUTE_UNUSED)
444{
445 int reloc = 0;
446 int i;
447
448 for (i = 0; reloc_functions[i].fname; i++)
449 {
450 int flen = strlen (reloc_functions[i].fname);
451
452 if (input_line_pointer[0] == '%'
453 && strncasecmp (input_line_pointer + 1, reloc_functions[i].fname, flen) == 0
454 && input_line_pointer[flen + 1] == '(')
455 {
456 reloc = reloc_functions[i].reloc;
457 input_line_pointer += flen + 2;
458 break;
459 }
460 }
461 if (reloc == 0)
462 return;
463
464 expression (exp);
465 if (* input_line_pointer == ')')
466 input_line_pointer ++;
467
468 exp->X_md = reloc;
c9d66558
DD		 469
470 require_end_of_expr (reloc_functions[i].fname);
99c513f6
DD		 471}
472
473void
474rl78_frag_init (fragS * fragP)
475{
9cea966c
DD		 476 if (rl78_bytes.n_relax || rl78_bytes.link_relax)
477 {
478 fragP->tc_frag_data = malloc (sizeof (rl78_bytesT));
479 memcpy (fragP->tc_frag_data, & rl78_bytes, sizeof (rl78_bytesT));
480 }
481 else
482 fragP->tc_frag_data = 0;
483}
484
485/* When relaxing, we need to output a reloc for any .align directive
486 so that we can retain this alignment as we adjust opcode sizes. */
487void
488rl78_handle_align (fragS * frag)
489{
490 if (linkrelax
491 && (frag->fr_type == rs_align
492 || frag->fr_type == rs_align_code)
493 && frag->fr_address + frag->fr_fix > 0
494 && frag->fr_offset > 0
495 && now_seg != bss_section)
496 {
497 fix_new (frag, frag->fr_fix, 0,
498 &abs_symbol, RL78_RELAXA_ALIGN + frag->fr_offset,
499 0, BFD_RELOC_RL78_RELAX);
500 /* For the purposes of relaxation, this relocation is attached
501 to the byte *after* the alignment - i.e. the byte that must
502 remain aligned. */
503 fix_new (frag->fr_next, 0, 0,
504 &abs_symbol, RL78_RELAXA_ELIGN + frag->fr_offset,
505 0, BFD_RELOC_RL78_RELAX);
506 }
99c513f6
DD		 507}
508
509char *
510md_atof (int type, char * litP, int * sizeP)
511{
512 return ieee_md_atof (type, litP, sizeP, target_big_endian);
513}
514
515symbolS *
516md_undefined_symbol (char * name ATTRIBUTE_UNUSED)
517{
518 return NULL;
519}
520
521#define APPEND(B, N_B) \
522 if (rl78_bytes.N_B) \
523 { \
524 memcpy (bytes + idx, rl78_bytes.B, rl78_bytes.N_B); \
525 idx += rl78_bytes.N_B; \
526 }
527
528
529void
530md_assemble (char * str)
531{
532 char * bytes;
533 fragS * frag_then = frag_now;
534 int idx = 0;
535 int i;
536 int rel;
537 expressionS *exp;
538
539 /*printf("\033[32mASM: %s\033[0m\n", str);*/
540
541 dwarf2_emit_insn (0);
542
543 memset (& rl78_bytes, 0, sizeof (rl78_bytes));
544
545 rl78_lex_init (str, str + strlen (str));
546
547 rl78_parse ();
548
9cea966c 549 /* This simplifies the relaxation code. */
0c315784 550 if (rl78_bytes.n_relax || rl78_bytes.link_relax)
9cea966c
DD		 551 {
552 int olen = rl78_bytes.n_prefix + rl78_bytes.n_base + rl78_bytes.n_ops;
553 /* We do it this way because we want the frag to have the
0c315784
DD		 554 rl78_bytes in it, which we initialize above. The extra bytes
555 are for relaxing. */
556 bytes = frag_more (olen + 3);
9cea966c
DD		 557 frag_then = frag_now;
558 frag_variant (rs_machine_dependent,
559 olen /* max_chars */,
560 0 /* var */,
561 olen /* subtype */,
562 0 /* symbol */,
563 0 /* offset */,
564 0 /* opcode */);
565 frag_then->fr_opcode = bytes;
566 frag_then->fr_fix = olen + (bytes - frag_then->fr_literal);
567 frag_then->fr_subtype = olen;
568 frag_then->fr_var = 0;
569 }
570 else
571 {
572 bytes = frag_more (rl78_bytes.n_prefix + rl78_bytes.n_base + rl78_bytes.n_ops);
573 frag_then = frag_now;
574 }
99c513f6
DD		 575
576 APPEND (prefix, n_prefix);
577 APPEND (base, n_base);
578 APPEND (ops, n_ops);
579
9cea966c
DD		 580 if (rl78_bytes.link_relax)
581 {
582 fixS * f;
583
584 f = fix_new (frag_then,
585 (char *) bytes - frag_then->fr_literal,
586 0,
587 abs_section_sym,
588 rl78_bytes.link_relax | rl78_bytes.n_fixups,
589 0,
590 BFD_RELOC_RL78_RELAX);
591 frag_then->tc_frag_data->link_relax_fixP = f;
592 }
593
99c513f6
DD		 594 for (i = 0; i < rl78_bytes.n_fixups; i ++)
595 {
596 /* index: [nbytes][type] */
597 static int reloc_map[5][4] =
598 {
599 { 0, 0 },
600 { BFD_RELOC_8, BFD_RELOC_8_PCREL },
601 { BFD_RELOC_16, BFD_RELOC_16_PCREL },
602 { BFD_RELOC_24, BFD_RELOC_24_PCREL },
603 { BFD_RELOC_32, BFD_RELOC_32_PCREL },
604 };
605 fixS * f;
606
607 idx = rl78_bytes.fixups[i].offset / 8;
608 rel = reloc_map [rl78_bytes.fixups[i].nbits / 8][(int) rl78_bytes.fixups[i].type];
609
610 if (rl78_bytes.fixups[i].reloc)
611 rel = rl78_bytes.fixups[i].reloc;
612
613 if (frag_then->tc_frag_data)
614 exp = & frag_then->tc_frag_data->fixups[i].exp;
615 else
616 exp = & rl78_bytes.fixups[i].exp;
617
618 f = fix_new_exp (frag_then,
619 (char *) bytes + idx - frag_then->fr_literal,
620 rl78_bytes.fixups[i].nbits / 8,
621 exp,
622 rl78_bytes.fixups[i].type == RL78REL_PCREL ? 1 : 0,
623 rel);
624 if (frag_then->tc_frag_data)
625 frag_then->tc_frag_data->fixups[i].fixP = f;
626 }
627}
628
629void
630rl78_cons_fix_new (fragS * frag,
631 int where,
632 int size,
633 expressionS * exp)
634{
635 bfd_reloc_code_real_type type;
c9d66558 636 fixS *fixP;
99c513f6
DD		 637
638 switch (size)
639 {
640 case 1:
641 type = BFD_RELOC_8;
642 break;
643 case 2:
644 type = BFD_RELOC_16;
645 break;
646 case 3:
647 type = BFD_RELOC_24;
648 break;
649 case 4:
650 type = BFD_RELOC_32;
651 break;
652 default:
653 as_bad (_("unsupported constant size %d\n"), size);
654 return;
655 }
656
392ca752
DD		 657 switch (exp->X_md)
658 {
4107ae22
DD		 659 case BFD_RELOC_RL78_CODE:
660 if (size == 2)
661 type = exp->X_md;
662 break;
392ca752
DD		 663 case BFD_RELOC_RL78_LO16:
664 case BFD_RELOC_RL78_HI16:
665 if (size != 2)
6ff71e76
NC		 666 {
667 /* Fixups to assembler generated expressions do not use %hi or %lo. */
668 if (frag->fr_file)
669 as_bad (_("%%hi16/%%lo16 only applies to .short or .hword"));
670 }
671 else
672 type = exp->X_md;
392ca752
DD		 673 break;
674 case BFD_RELOC_RL78_HI8:
675 if (size != 1)
6ff71e76
NC		 676 {
677 /* Fixups to assembler generated expressions do not use %hi or %lo. */
678 if (frag->fr_file)
679 as_bad (_("%%hi8 only applies to .byte"));
680 }
681 else
682 type = exp->X_md;
392ca752
DD		 683 break;
684 default:
685 break;
686 }
687
99c513f6
DD		 688 if (exp->X_op == O_subtract && exp->X_op_symbol)
689 {
690 if (size != 4 && size != 2 && size != 1)
691 as_bad (_("difference of two symbols only supported with .long, .short, or .byte"));
692 else
693 type = BFD_RELOC_RL78_DIFF;
694 }
695
c9d66558
DD		 696 fixP = fix_new_exp (frag, where, (int) size, exp, 0, type);
697 switch (exp->X_md)
698 {
699 /* These are intended to have values larger than the container,
700 since the backend puts only the portion we need in it.
701 However, we don't have a backend-specific reloc for them as
702 they're handled with complex relocations. */
703 case BFD_RELOC_RL78_LO16:
704 case BFD_RELOC_RL78_HI16:
705 case BFD_RELOC_RL78_HI8:
706 fixP->fx_no_overflow = 1;
707 break;
708 default:
709 break;
710 }
99c513f6
DD		 711}
712
0c315784
DD		 713\f
714/*----------------------------------------------------------------------*/
715/* To recap: we estimate everything based on md_estimate_size, then
716 adjust based on rl78_relax_frag. When it all settles, we call
717 md_convert frag to update the bytes. The relaxation types and
718 relocations are in fragP->tc_frag_data, which is a copy of that
719 rl78_bytes.
720
721 Our scheme is as follows: fr_fix has the size of the smallest
722 opcode (like BRA.S). We store the number of total bytes we need in
723 fr_subtype. When we're done relaxing, we use fr_subtype and the
724 existing opcode bytes to figure out what actual opcode we need to
725 put in there. If the fixup isn't resolvable now, we use the
726 maximal size. */
727
728#define TRACE_RELAX 0
729#define tprintf if (TRACE_RELAX) printf
730
731
732typedef enum
733{
734 OT_other,
735 OT_bt,
736 OT_bt_sfr,
737 OT_bt_es,
738 OT_bc,
739 OT_bh
740} op_type_T;
741
742/* We're looking for these types of relaxations:
743
744 BT 00110001 sbit0cc1 addr---- (cc is 10 (BF) or 01 (BT))
745 B~T 00110001 sbit0cc1 00000011 11101110 pcrel16- -------- (BR $!pcrel20)
746
747 BT sfr 00110001 sbit0cc0 sfr----- addr----
748 BT ES: 00010001 00101110 sbit0cc1 addr----
749
750 BC 110111cc addr----
751 B~C 110111cc 00000011 11101110 pcrel16- -------- (BR $!pcrel20)
752
753 BH 01100001 110c0011 00000011 11101110 pcrel16- -------- (BR $!pcrel20)
754 B~H 01100001 110c0011 00000011 11101110 pcrel16- -------- (BR $!pcrel20)
755*/
756
757/* Given the opcode bytes at OP, figure out which opcode it is and
758 return the type of opcode. We use this to re-encode the opcode as
759 a different size later. */
760
761static op_type_T
762rl78_opcode_type (char * op)
763{
764 if (op[0] == 0x31
765 && ((op[1] & 0x0f) == 0x05
766 || (op[1] & 0x0f) == 0x03))
767 return OT_bt;
768
769 if (op[0] == 0x31
770 && ((op[1] & 0x0f) == 0x04
771 || (op[1] & 0x0f) == 0x02))
772 return OT_bt_sfr;
773
774 if (op[0] == 0x11
775 && op[1] == 0x31
776 && ((op[2] & 0x0f) == 0x05
777 || (op[2] & 0x0f) == 0x03))
778 return OT_bt_es;
779
780 if ((op[0] & 0xfc) == 0xdc)
781 return OT_bc;
782
783 if (op[0] == 0x61
784 && (op[1] & 0xef) == 0xc3)
785 return OT_bh;
786
787 return OT_other;
788}
789
790/* Returns zero if *addrP has the target address. Else returns nonzero
791 if we cannot compute the target address yet. */
792
793static int
794rl78_frag_fix_value (fragS * fragP,
795 segT segment,
796 int which,
797 addressT * addrP,
798 int need_diff,
799 addressT * sym_addr)
800{
801 addressT addr = 0;
802 rl78_bytesT * b = fragP->tc_frag_data;
803 expressionS * exp = & b->fixups[which].exp;
804
805 if (need_diff && exp->X_op != O_subtract)
806 return 1;
807
808 if (exp->X_add_symbol)
809 {
810 if (S_FORCE_RELOC (exp->X_add_symbol, 1))
811 return 1;
812 if (S_GET_SEGMENT (exp->X_add_symbol) != segment)
813 return 1;
814 addr += S_GET_VALUE (exp->X_add_symbol);
815 }
816
817 if (exp->X_op_symbol)
818 {
819 if (exp->X_op != O_subtract)
820 return 1;
821 if (S_FORCE_RELOC (exp->X_op_symbol, 1))
822 return 1;
823 if (S_GET_SEGMENT (exp->X_op_symbol) != segment)
824 return 1;
825 addr -= S_GET_VALUE (exp->X_op_symbol);
826 }
827 if (sym_addr)
828 * sym_addr = addr;
829 addr += exp->X_add_number;
830 * addrP = addr;
831 return 0;
832}
833
834/* Estimate how big the opcode is after this relax pass. The return
835 value is the difference between fr_fix and the actual size. We
836 compute the total size in rl78_relax_frag and store it in fr_subtype,
6ff71e76 837 so we only need to subtract fx_fix and return it. */
0c315784 838
99c513f6
DD		 839int
840md_estimate_size_before_relax (fragS * fragP ATTRIBUTE_UNUSED, segT segment ATTRIBUTE_UNUSED)
841{
0c315784
DD		 842 int opfixsize;
843 int delta;
844
845 /* This is the size of the opcode that's accounted for in fr_fix. */
846 opfixsize = fragP->fr_fix - (fragP->fr_opcode - fragP->fr_literal);
847 /* This is the size of the opcode that isn't. */
848 delta = (fragP->fr_subtype - opfixsize);
849
850 tprintf (" -> opfixsize %d delta %d\n", opfixsize, delta);
851 return delta;
852}
853
854/* Given the new addresses for this relax pass, figure out how big
855 each opcode must be. We store the total number of bytes needed in
856 fr_subtype. The return value is the difference between the size
857 after the last pass and the size after this pass, so we use the old
858 fr_subtype to calculate the difference. */
859
860int
861rl78_relax_frag (segT segment ATTRIBUTE_UNUSED, fragS * fragP, long stretch)
862{
863 addressT addr0, sym_addr;
864 addressT mypc;
865 int disp;
866 int oldsize = fragP->fr_subtype;
867 int newsize = oldsize;
868 op_type_T optype;
869 int ri;
870
871 mypc = fragP->fr_address + (fragP->fr_opcode - fragP->fr_literal);
872
873 /* If we ever get more than one reloc per opcode, this is the one
874 we're relaxing. */
875 ri = 0;
876
877 optype = rl78_opcode_type (fragP->fr_opcode);
878 /* Try to get the target address. */
879 if (rl78_frag_fix_value (fragP, segment, ri, & addr0,
880 fragP->tc_frag_data->relax[ri].type != RL78_RELAX_BRANCH,
881 & sym_addr))
882 {
883 /* If we don't, we must use the maximum size for the linker. */
884 switch (fragP->tc_frag_data->relax[ri].type)
885 {
886 case RL78_RELAX_BRANCH:
887 switch (optype)
888 {
889 case OT_bt:
890 newsize = 6;
891 break;
892 case OT_bt_sfr:
893 case OT_bt_es:
894 newsize = 7;
895 break;
896 case OT_bc:
897 newsize = 5;
898 break;
899 case OT_bh:
900 newsize = 6;
901 break;
902 case OT_other:
903 newsize = oldsize;
904 break;
905 }
906 break;
907
908 }
909 fragP->fr_subtype = newsize;
910 tprintf (" -> new %d old %d delta %d (external)\n", newsize, oldsize, newsize-oldsize);
911 return newsize - oldsize;
912 }
913
914 if (sym_addr > mypc)
915 addr0 += stretch;
916
917 switch (fragP->tc_frag_data->relax[ri].type)
918 {
919 case RL78_RELAX_BRANCH:
920 disp = (int) addr0 - (int) mypc;
921
922 switch (optype)
923 {
924 case OT_bt:
925 if (disp >= -128 && (disp - (oldsize-2)) <= 127)
926 newsize = 3;
927 else
928 newsize = 6;
929 break;
930 case OT_bt_sfr:
931 case OT_bt_es:
932 if (disp >= -128 && (disp - (oldsize-3)) <= 127)
933 newsize = 4;
934 else
935 newsize = 7;
936 break;
937 case OT_bc:
938 if (disp >= -128 && (disp - (oldsize-1)) <= 127)
939 newsize = 2;
940 else
941 newsize = 5;
942 break;
943 case OT_bh:
944 if (disp >= -128 && (disp - (oldsize-2)) <= 127)
945 newsize = 3;
946 else
947 newsize = 6;
948 break;
949 case OT_other:
950 newsize = oldsize;
951 break;
952 }
953 break;
954 }
955
956 /* This prevents infinite loops in align-heavy sources. */
957 if (newsize < oldsize)
958 {
959 if (fragP->tc_frag_data->times_shrank > 10
960 && fragP->tc_frag_data->times_grown > 10)
961 newsize = oldsize;
962 if (fragP->tc_frag_data->times_shrank < 20)
963 fragP->tc_frag_data->times_shrank ++;
964 }
965 else if (newsize > oldsize)
966 {
967 if (fragP->tc_frag_data->times_grown < 20)
968 fragP->tc_frag_data->times_grown ++;
969 }
970
971 fragP->fr_subtype = newsize;
972 tprintf (" -> new %d old %d delta %d\n", newsize, oldsize, newsize-oldsize);
973 return newsize - oldsize;
6ff71e76
NC		 974}
975
0c315784
DD		 976/* This lets us test for the opcode type and the desired size in a
977 switch statement. */
978#define OPCODE(type,size) ((type) * 16 + (size))
979
980/* Given the opcode stored in fr_opcode and the number of bytes we
981 think we need, encode a new opcode. We stored a pointer to the
982 fixup for this opcode in the tc_frag_data structure. If we can do
983 the fixup here, we change the relocation type to "none" (we test
984 for that in tc_gen_reloc) else we change it to the right type for
985 the new (biggest) opcode. */
986
987void
988md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
989 segT segment ATTRIBUTE_UNUSED,
990 fragS * fragP ATTRIBUTE_UNUSED)
991{
992 rl78_bytesT * rl78b = fragP->tc_frag_data;
993 addressT addr0, mypc;
994 int disp;
995 int reloc_type, reloc_adjust;
996 char * op = fragP->fr_opcode;
997 int keep_reloc = 0;
998 int ri;
999 int fi = (rl78b->n_fixups > 1) ? 1 : 0;
1000 fixS * fix = rl78b->fixups[fi].fixP;
1001
1002 /* If we ever get more than one reloc per opcode, this is the one
1003 we're relaxing. */
1004 ri = 0;
1005
1006 /* We used a new frag for this opcode, so the opcode address should
1007 be the frag address. */
1008 mypc = fragP->fr_address + (fragP->fr_opcode - fragP->fr_literal);
1009 tprintf("\033[32mmypc: 0x%x\033[0m\n", (int)mypc);
1010
1011 /* Try to get the target address. If we fail here, we just use the
1012 largest format. */
1013 if (rl78_frag_fix_value (fragP, segment, 0, & addr0,
1014 fragP->tc_frag_data->relax[ri].type != RL78_RELAX_BRANCH, 0))
1015 {
1016 /* We don't know the target address. */
1017 keep_reloc = 1;
1018 addr0 = 0;
1019 disp = 0;
1020 tprintf ("unknown addr ? - %x = ?\n", (int)mypc);
1021 }
1022 else
1023 {
1024 /* We know the target address, and it's in addr0. */
1025 disp = (int) addr0 - (int) mypc;
1026 tprintf ("known addr %x - %x = %d\n", (int)addr0, (int)mypc, disp);
1027 }
1028
1029 if (linkrelax)
1030 keep_reloc = 1;
1031
1032 reloc_type = BFD_RELOC_NONE;
1033 reloc_adjust = 0;
1034
1035 switch (fragP->tc_frag_data->relax[ri].type)
1036 {
1037 case RL78_RELAX_BRANCH:
1038 switch (OPCODE (rl78_opcode_type (fragP->fr_opcode), fragP->fr_subtype))
1039 {
1040
1041 case OPCODE (OT_bt, 3): /* BT A,$ - no change. */
1042 disp -= 3;
1043 op[2] = disp;
1044 break;
1045
1046 case OPCODE (OT_bt, 6): /* BT A,$ - long version. */
1047 disp -= 3;
1048 op[1] ^= 0x06; /* toggle conditional. */
1049 op[2] = 3; /* displacement over long branch. */
1050 disp -= 3;
1051 op[3] = 0xEE; /* BR $!addr20 */
1052 op[4] = disp & 0xff;
1053 op[5] = disp >> 8;
1054 reloc_type = keep_reloc ? BFD_RELOC_16_PCREL : BFD_RELOC_NONE;
1055 reloc_adjust = 2;
1056 break;
1057
1058 case OPCODE (OT_bt_sfr, 4): /* BT PSW,$ - no change. */
1059 disp -= 4;
1060 op[3] = disp;
1061 break;
1062
1063 case OPCODE (OT_bt_sfr, 7): /* BT PSW,$ - long version. */
1064 disp -= 4;
1065 op[1] ^= 0x06; /* toggle conditional. */
1066 op[3] = 3; /* displacement over long branch. */
1067 disp -= 3;
1068 op[4] = 0xEE; /* BR $!addr20 */
1069 op[5] = disp & 0xff;
1070 op[6] = disp >> 8;
1071 reloc_type = keep_reloc ? BFD_RELOC_16_PCREL : BFD_RELOC_NONE;
1072 reloc_adjust = 2;
1073 break;
1074
1075 case OPCODE (OT_bt_es, 4): /* BT ES:[HL],$ - no change. */
1076 disp -= 4;
1077 op[3] = disp;
1078 break;
1079
1080 case OPCODE (OT_bt_es, 7): /* BT PSW,$ - long version. */
1081 disp -= 4;
1082 op[2] ^= 0x06; /* toggle conditional. */
1083 op[3] = 3; /* displacement over long branch. */
1084 disp -= 3;
1085 op[4] = 0xEE; /* BR $!addr20 */
1086 op[5] = disp & 0xff;
1087 op[6] = disp >> 8;
1088 reloc_type = keep_reloc ? BFD_RELOC_16_PCREL : BFD_RELOC_NONE;
1089 reloc_adjust = 2;
1090 break;
1091
1092 case OPCODE (OT_bc, 2): /* BC $ - no change. */
1093 disp -= 2;
1094 op[1] = disp;
1095 break;
1096
1097 case OPCODE (OT_bc, 5): /* BC $ - long version. */
1098 disp -= 2;
1099 op[0] ^= 0x02; /* toggle conditional. */
1100 op[1] = 3;
1101 disp -= 3;
1102 op[2] = 0xEE; /* BR $!addr20 */
1103 op[3] = disp & 0xff;
1104 op[4] = disp >> 8;
1105 reloc_type = keep_reloc ? BFD_RELOC_16_PCREL : BFD_RELOC_NONE;
1106 reloc_adjust = 2;
1107 break;
1108
1109 case OPCODE (OT_bh, 3): /* BH $ - no change. */
1110 disp -= 3;
1111 op[2] = disp;
1112 break;
1113
1114 case OPCODE (OT_bh, 6): /* BC $ - long version. */
1115 disp -= 3;
1116 op[1] ^= 0x10; /* toggle conditional. */
1117 op[2] = 3;
1118 disp -= 3;
1119 op[3] = 0xEE; /* BR $!addr20 */
1120 op[4] = disp & 0xff;
1121 op[5] = disp >> 8;
1122 reloc_type = keep_reloc ? BFD_RELOC_16_PCREL : BFD_RELOC_NONE;
1123 reloc_adjust = 2;
1124 break;
1125
1126 default:
1127 fprintf(stderr, "Missed case %d %d at 0x%lx\n",
1128 rl78_opcode_type (fragP->fr_opcode), fragP->fr_subtype, mypc);
1129 abort ();
1130
1131 }
1132 break;
1133
1134 default:
1135 if (rl78b->n_fixups)
1136 {
1137 reloc_type = fix->fx_r_type;
1138 reloc_adjust = 0;
1139 }
1140 break;
1141 }
1142
1143 if (rl78b->n_fixups)
1144 {
1145
1146 fix->fx_r_type = reloc_type;
1147 fix->fx_where += reloc_adjust;
1148 switch (reloc_type)
1149 {
1150 case BFD_RELOC_NONE:
1151 fix->fx_size = 0;
1152 break;
1153 case BFD_RELOC_8:
1154 fix->fx_size = 1;
1155 break;
1156 case BFD_RELOC_16_PCREL:
1157 fix->fx_size = 2;
1158 break;
1159 }
1160 }
1161
1162 fragP->fr_fix = fragP->fr_subtype + (fragP->fr_opcode - fragP->fr_literal);
1163 tprintf ("fragP->fr_fix now %ld (%d + (%p - %p)\n", (long) fragP->fr_fix,
1164 fragP->fr_subtype, fragP->fr_opcode, fragP->fr_literal);
1165 fragP->fr_var = 0;
1166
1167 tprintf ("compare 0x%lx vs 0x%lx - 0x%lx = 0x%lx (%p)\n",
1168 (long)fragP->fr_fix,
1169 (long)fragP->fr_next->fr_address, (long)fragP->fr_address,
1170 (long)(fragP->fr_next->fr_address - fragP->fr_address),
1171 fragP->fr_next);
1172
1173 if (fragP->fr_next != NULL
1174 && ((offsetT) (fragP->fr_next->fr_address - fragP->fr_address)
1175 != fragP->fr_fix))
1176 as_bad (_("bad frag at %p : fix %ld addr %ld %ld \n"), fragP,
1177 (long) fragP->fr_fix,
1178 (long) fragP->fr_address, (long) fragP->fr_next->fr_address);
99c513f6 1179}
9cea966c 1180
0c315784
DD		 1181/* End of relaxation code.
1182 ----------------------------------------------------------------------*/
1183\f
1184
99c513f6
DD		 1185arelent **
1186tc_gen_reloc (asection * seg ATTRIBUTE_UNUSED, fixS * fixp)
1187{
1188 static arelent * reloc[8];
1189 int rp;
99c513f6
DD		 1190
1191 if (fixp->fx_r_type == BFD_RELOC_NONE)
1192 {
1193 reloc[0] = NULL;
1194 return reloc;
1195 }
1196
1197 if (fixp->fx_subsy
1198 && S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
1199 {
1200 fixp->fx_offset -= S_GET_VALUE (fixp->fx_subsy);
1201 fixp->fx_subsy = NULL;
1202 }
1203
1204 reloc[0] = (arelent *) xmalloc (sizeof (arelent));
1205 reloc[0]->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1206 * reloc[0]->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1207 reloc[0]->address = fixp->fx_frag->fr_address + fixp->fx_where;
1208 reloc[0]->addend = fixp->fx_offset;
1209
1210 if (fixp->fx_r_type == BFD_RELOC_RL78_32_OP
1211 && fixp->fx_subsy)
1212 {
1213 fixp->fx_r_type = BFD_RELOC_RL78_DIFF;
99c513f6
DD		 1214 }
1215
1216#define OPX(REL,SYM,ADD) \
1217 reloc[rp] = (arelent *) xmalloc (sizeof (arelent)); \
1218 reloc[rp]->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); \
1219 reloc[rp]->howto = bfd_reloc_type_lookup (stdoutput, REL); \
1220 reloc[rp]->addend = ADD; \
1221 * reloc[rp]->sym_ptr_ptr = SYM; \
1222 reloc[rp]->address = fixp->fx_frag->fr_address + fixp->fx_where; \
1223 reloc[++rp] = NULL
1224#define OPSYM(SYM) OPX(BFD_RELOC_RL78_SYM, SYM, 0)
1225#define OPIMM(IMM) OPX(BFD_RELOC_RL78_SYM, abs_symbol.bsym, IMM)
1226#define OP(OP) OPX(BFD_RELOC_RL78_##OP, *reloc[0]->sym_ptr_ptr, 0)
1227#define SYM0() reloc[0]->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_RL78_SYM)
1228
1229 rp = 1;
1230
1231 /* Certain BFD relocations cannot be translated directly into
1232 a single (non-Red Hat) RL78 relocation, but instead need
1233 multiple RL78 relocations - handle them here. */
1234 switch (fixp->fx_r_type)
1235 {
1236 case BFD_RELOC_RL78_DIFF:
1237 SYM0 ();
1238 OPSYM (symbol_get_bfdsym (fixp->fx_subsy));
1239 OP(OP_SUBTRACT);
1240
1241 switch (fixp->fx_size)
1242 {
1243 case 1:
1244 OP(ABS8);
1245 break;
1246 case 2:
1247 OP (ABS16);
1248 break;
1249 case 4:
1250 OP (ABS32);
1251 break;
1252 }
1253 break;
1254
1255 case BFD_RELOC_RL78_NEG32:
1256 SYM0 ();
1257 OP (OP_NEG);
1258 OP (ABS32);
1259 break;
1260
4107ae22 1261 case BFD_RELOC_RL78_CODE:
b3fe4307
NC		 1262 reloc[0]->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_RL78_16U);
1263 reloc[1] = NULL;
4107ae22
DD		 1264 break;
1265
99c513f6
DD		 1266 case BFD_RELOC_RL78_LO16:
1267 SYM0 ();
1268 OPIMM (0xffff);
1269 OP (OP_AND);
1270 OP (ABS16);
1271 break;
1272
1273 case BFD_RELOC_RL78_HI16:
1274 SYM0 ();
1275 OPIMM (16);
1276 OP (OP_SHRA);
1277 OP (ABS16);
1278 break;
1279
1280 case BFD_RELOC_RL78_HI8:
1281 SYM0 ();
1282 OPIMM (16);
1283 OP (OP_SHRA);
1284 OPIMM (0xff);
1285 OP (OP_AND);
1286 OP (ABS8);
1287 break;
1288
1289 default:
1290 reloc[0]->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1291 reloc[1] = NULL;
1292 break;
1293 }
1294
1295 return reloc;
1296}
1297
1298int
1299rl78_validate_fix_sub (struct fix * f)
1300{
1301 /* We permit the subtraction of two symbols in a few cases. */
1302 /* mov #sym1-sym2, R3 */
1303 if (f->fx_r_type == BFD_RELOC_RL78_32_OP)
1304 return 1;
1305 /* .long sym1-sym2 */
1306 if (f->fx_r_type == BFD_RELOC_RL78_DIFF
1307 && ! f->fx_pcrel
1308 && (f->fx_size == 4 || f->fx_size == 2 || f->fx_size == 1))
1309 return 1;
1310 return 0;
1311}
1312
1313long
1314md_pcrel_from_section (fixS * fixP, segT sec)
1315{
1316 long rv;
1317
1318 if (fixP->fx_addsy != NULL
1319 && (! S_IS_DEFINED (fixP->fx_addsy)
1320 || S_GET_SEGMENT (fixP->fx_addsy) != sec))
1321 /* The symbol is undefined (or is defined but not in this section).
1322 Let the linker figure it out. */
1323 return 0;
1324
1325 rv = fixP->fx_frag->fr_address + fixP->fx_where;
1326 switch (fixP->fx_r_type)
1327 {
1328 case BFD_RELOC_8_PCREL:
1329 rv += 1;
1330 break;
1331 case BFD_RELOC_16_PCREL:
1332 rv += 2;
1333 break;
1334 default:
1335 break;
1336 }
1337 return rv;
1338}
1339
1340void
1341md_apply_fix (struct fix * f ATTRIBUTE_UNUSED,
1342 valueT * t ATTRIBUTE_UNUSED,
1343 segT s ATTRIBUTE_UNUSED)
1344{
1345 char * op;
1346 unsigned long val;
1347
1348 if (f->fx_addsy && S_FORCE_RELOC (f->fx_addsy, 1))
1349 return;
1350 if (f->fx_subsy && S_FORCE_RELOC (f->fx_subsy, 1))
1351 return;
1352
1353 op = f->fx_frag->fr_literal + f->fx_where;
1354 val = (unsigned long) * t;
1355
1356 switch (f->fx_r_type)
1357 {
1358 case BFD_RELOC_NONE:
1359 break;
1360
9cea966c
DD		 1361 case BFD_RELOC_RL78_RELAX:
1362 f->fx_done = 1;
1363 break;
1364
99c513f6 1365 case BFD_RELOC_8_PCREL:
0a899fd5
DD		 1366 if ((long)val < -128 || (long)val > 127)
1367 as_bad_where (f->fx_file, f->fx_line,
1368 _("value of %ld too large for 8-bit branch"),
1369 val);
1370 /* Fall through. */
1371 case BFD_RELOC_8:
99c513f6
DD		 1372 op[0] = val;
1373 break;
1374
99c513f6 1375 case BFD_RELOC_16_PCREL:
0a899fd5
DD		 1376 if ((long)val < -32768 || (long)val > 32767)
1377 as_bad_where (f->fx_file, f->fx_line,
1378 _("value of %ld too large for 16-bit branch"),
1379 val);
1380 /* Fall through. */
1381 case BFD_RELOC_16:
4107ae22 1382 case BFD_RELOC_RL78_CODE:
99c513f6
DD		 1383 op[0] = val;
1384 op[1] = val >> 8;
1385 break;
1386
1387 case BFD_RELOC_24:
1388 op[0] = val;
1389 op[1] = val >> 8;
1390 op[2] = val >> 16;
1391 break;
1392
1393 case BFD_RELOC_32:
99c513f6
DD		 1394 op[0] = val;
1395 op[1] = val >> 8;
1396 op[2] = val >> 16;
1397 op[3] = val >> 24;
1398 break;
1399
3ce3a066
NC		 1400 case BFD_RELOC_RL78_DIFF:
1401 op[0] = val;
1402 if (f->fx_size > 1)
1403 op[1] = val >> 8;
1404 if (f->fx_size > 2)
1405 op[2] = val >> 16;
1406 if (f->fx_size > 3)
1407 op[3] = val >> 24;
1408 break;
1409
b3fe4307
NC		 1410 case BFD_RELOC_RL78_HI8:
1411 val = val >> 16;
1412 op[0] = val;
1413 break;
1414
1415 case BFD_RELOC_RL78_HI16:
1416 val = val >> 16;
1417 op[0] = val;
1418 op[1] = val >> 8;
1419 break;
1420
1421 case BFD_RELOC_RL78_LO16:
1422 op[0] = val;
1423 op[1] = val >> 8;
1424 break;
1425
99c513f6
DD		 1426 default:
1427 as_bad (_("Unknown reloc in md_apply_fix: %s"),
1428 bfd_get_reloc_code_name (f->fx_r_type));
1429 break;
1430 }
1431
1432 if (f->fx_addsy == NULL)
1433 f->fx_done = 1;
1434}
1435
1436valueT
1437md_section_align (segT segment, valueT size)
1438{
1439 int align = bfd_get_section_alignment (stdoutput, segment);
1440 return ((size + (1 << align) - 1) & (-1 << align));
1441}
GDB Binutils - Deliverables
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