Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* tc-sh.c -- Assemble code for the Hitachi Super-H |
f7e42eb4 NC |
2 | Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001 |
3 | Free Software Foundation, Inc. | |
252b5132 RH |
4 | |
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
6b31947e | 22 | /* Written By Steve Chamberlain <sac@cygnus.com> */ |
252b5132 RH |
23 | |
24 | #include <stdio.h> | |
25 | #include "as.h" | |
26 | #include "bfd.h" | |
27 | #include "subsegs.h" | |
28 | #define DEFINE_TABLE | |
29 | #include "opcodes/sh-opc.h" | |
30 | #include <ctype.h> | |
43841e91 | 31 | #include "struc-symbol.h" |
d4845d57 JR |
32 | |
33 | #ifdef OBJ_ELF | |
34 | #include "elf/sh.h" | |
35 | #endif | |
36 | ||
0d10e182 | 37 | #include "dwarf2dbg.h" |
0d10e182 | 38 | |
252b5132 RH |
39 | const char comment_chars[] = "!"; |
40 | const char line_separator_chars[] = ";"; | |
41 | const char line_comment_chars[] = "!#"; | |
42 | ||
43 | static void s_uses PARAMS ((int)); | |
44 | ||
45 | static void sh_count_relocs PARAMS ((bfd *, segT, PTR)); | |
46 | static void sh_frob_section PARAMS ((bfd *, segT, PTR)); | |
47 | ||
252b5132 RH |
48 | void cons (); |
49 | void s_align_bytes (); | |
50 | static void s_uacons PARAMS ((int)); | |
d4845d57 | 51 | static sh_opcode_info *find_cooked_opcode PARAMS ((char **)); |
0d10e182 | 52 | static unsigned int assemble_ppi PARAMS ((char *, sh_opcode_info *)); |
252b5132 | 53 | |
a1cc9221 AO |
54 | #ifdef OBJ_ELF |
55 | static void sh_elf_cons PARAMS ((int)); | |
56 | ||
57 | symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ | |
58 | #endif | |
59 | ||
252b5132 RH |
60 | int shl = 0; |
61 | ||
62 | static void | |
63 | little (ignore) | |
43841e91 | 64 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
65 | { |
66 | shl = 1; | |
67 | target_big_endian = 0; | |
68 | } | |
69 | ||
d4845d57 JR |
70 | /* This table describes all the machine specific pseudo-ops the assembler |
71 | has to support. The fields are: | |
72 | pseudo-op name without dot | |
73 | function to call to execute this pseudo-op | |
6b31947e | 74 | Integer arg to pass to the function. */ |
d4845d57 | 75 | |
252b5132 RH |
76 | const pseudo_typeS md_pseudo_table[] = |
77 | { | |
a1cc9221 AO |
78 | #ifdef OBJ_ELF |
79 | {"long", sh_elf_cons, 4}, | |
80 | {"int", sh_elf_cons, 4}, | |
81 | {"word", sh_elf_cons, 2}, | |
82 | {"short", sh_elf_cons, 2}, | |
83 | #else | |
252b5132 RH |
84 | {"int", cons, 4}, |
85 | {"word", cons, 2}, | |
a1cc9221 | 86 | #endif /* OBJ_ELF */ |
252b5132 RH |
87 | {"form", listing_psize, 0}, |
88 | {"little", little, 0}, | |
89 | {"heading", listing_title, 0}, | |
90 | {"import", s_ignore, 0}, | |
91 | {"page", listing_eject, 0}, | |
92 | {"program", s_ignore, 0}, | |
93 | {"uses", s_uses, 0}, | |
94 | {"uaword", s_uacons, 2}, | |
95 | {"ualong", s_uacons, 4}, | |
de68de20 AO |
96 | {"uaquad", s_uacons, 8}, |
97 | {"2byte", s_uacons, 2}, | |
98 | {"4byte", s_uacons, 4}, | |
99 | {"8byte", s_uacons, 8}, | |
100 | {"file", dwarf2_directive_file, 0 }, | |
101 | {"loc", dwarf2_directive_loc, 0 }, | |
252b5132 RH |
102 | {0, 0, 0} |
103 | }; | |
104 | ||
105 | /*int md_reloc_size; */ | |
106 | ||
107 | int sh_relax; /* set if -relax seen */ | |
108 | ||
109 | /* Whether -small was seen. */ | |
110 | ||
111 | int sh_small; | |
112 | ||
d4845d57 JR |
113 | /* Whether -dsp was seen. */ |
114 | ||
115 | static int sh_dsp; | |
116 | ||
117 | /* The bit mask of architectures that could | |
118 | accomodate the insns seen so far. */ | |
119 | static int valid_arch; | |
120 | ||
252b5132 RH |
121 | const char EXP_CHARS[] = "eE"; |
122 | ||
6b31947e | 123 | /* Chars that mean this number is a floating point constant. */ |
252b5132 RH |
124 | /* As in 0f12.456 */ |
125 | /* or 0d1.2345e12 */ | |
126 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
127 | ||
128 | #define C(a,b) ENCODE_RELAX(a,b) | |
129 | ||
252b5132 RH |
130 | #define ENCODE_RELAX(what,length) (((what) << 4) + (length)) |
131 | #define GET_WHAT(x) ((x>>4)) | |
132 | ||
6b31947e | 133 | /* These are the three types of relaxable instrction. */ |
252b5132 RH |
134 | #define COND_JUMP 1 |
135 | #define COND_JUMP_DELAY 2 | |
136 | #define UNCOND_JUMP 3 | |
137 | #define END 4 | |
138 | ||
139 | #define UNDEF_DISP 0 | |
140 | #define COND8 1 | |
141 | #define COND12 2 | |
142 | #define COND32 3 | |
252b5132 RH |
143 | #define UNDEF_WORD_DISP 4 |
144 | ||
145 | #define UNCOND12 1 | |
146 | #define UNCOND32 2 | |
147 | ||
148 | /* Branch displacements are from the address of the branch plus | |
149 | four, thus all minimum and maximum values have 4 added to them. */ | |
150 | #define COND8_F 258 | |
151 | #define COND8_M -252 | |
152 | #define COND8_LENGTH 2 | |
153 | ||
154 | /* There is one extra instruction before the branch, so we must add | |
155 | two more bytes to account for it. */ | |
156 | #define COND12_F 4100 | |
157 | #define COND12_M -4090 | |
158 | #define COND12_LENGTH 6 | |
159 | ||
160 | #define COND12_DELAY_LENGTH 4 | |
161 | ||
162 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
163 | since this relocation type is not supported yet. */ | |
164 | #define COND32_F (1<<30) | |
165 | #define COND32_M -(1<<30) | |
166 | #define COND32_LENGTH 14 | |
167 | ||
168 | #define UNCOND12_F 4098 | |
169 | #define UNCOND12_M -4092 | |
170 | #define UNCOND12_LENGTH 2 | |
171 | ||
172 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
173 | since this relocation type is not supported yet. */ | |
174 | #define UNCOND32_F (1<<30) | |
175 | #define UNCOND32_M -(1<<30) | |
176 | #define UNCOND32_LENGTH 14 | |
177 | ||
43841e91 NC |
178 | #define EMPTY { 0, 0, 0, 0 } |
179 | ||
252b5132 | 180 | const relax_typeS md_relax_table[C (END, 0)] = { |
43841e91 NC |
181 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
182 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
252b5132 | 183 | |
43841e91 | 184 | EMPTY, |
252b5132 RH |
185 | /* C (COND_JUMP, COND8) */ |
186 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, | |
187 | /* C (COND_JUMP, COND12) */ | |
188 | { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, | |
189 | /* C (COND_JUMP, COND32) */ | |
190 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
e66457fb AM |
191 | /* C (COND_JUMP, UNDEF_WORD_DISP) */ |
192 | { 0, 0, COND32_LENGTH, 0, }, | |
193 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 194 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 | 195 | |
43841e91 | 196 | EMPTY, |
252b5132 RH |
197 | /* C (COND_JUMP_DELAY, COND8) */ |
198 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, | |
199 | /* C (COND_JUMP_DELAY, COND12) */ | |
200 | { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, | |
201 | /* C (COND_JUMP_DELAY, COND32) */ | |
202 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
e66457fb AM |
203 | /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */ |
204 | { 0, 0, COND32_LENGTH, 0, }, | |
205 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 206 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 | 207 | |
43841e91 | 208 | EMPTY, |
252b5132 RH |
209 | /* C (UNCOND_JUMP, UNCOND12) */ |
210 | { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, | |
211 | /* C (UNCOND_JUMP, UNCOND32) */ | |
212 | { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, | |
e66457fb AM |
213 | EMPTY, |
214 | /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */ | |
215 | { 0, 0, UNCOND32_LENGTH, 0, }, | |
216 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 217 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 RH |
218 | }; |
219 | ||
43841e91 NC |
220 | #undef EMPTY |
221 | ||
252b5132 RH |
222 | static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ |
223 | ||
a1cc9221 AO |
224 | \f |
225 | #ifdef OBJ_ELF | |
81d4177b | 226 | /* Parse @got, etc. and return the desired relocation. |
a1cc9221 AO |
227 | If we have additional arithmetic expression, then we fill in new_exp_p. */ |
228 | static bfd_reloc_code_real_type | |
229 | sh_elf_suffix (str_p, exp_p, new_exp_p) | |
230 | char **str_p; | |
231 | expressionS *exp_p, *new_exp_p; | |
232 | { | |
233 | struct map_bfd { | |
234 | char *string; | |
235 | int length; | |
236 | bfd_reloc_code_real_type reloc; | |
237 | }; | |
238 | ||
239 | char ident[20]; | |
240 | char *str = *str_p; | |
241 | char *str2; | |
242 | int ch; | |
243 | int len; | |
244 | struct map_bfd *ptr; | |
245 | ||
bc805888 | 246 | #define MAP(str,reloc) { str, sizeof (str)-1, reloc } |
a1cc9221 AO |
247 | |
248 | static struct map_bfd mapping[] = { | |
249 | MAP ("got", BFD_RELOC_32_GOT_PCREL), | |
250 | MAP ("plt", BFD_RELOC_32_PLT_PCREL), | |
251 | MAP ("gotoff", BFD_RELOC_32_GOTOFF), | |
252 | { (char *)0, 0, BFD_RELOC_UNUSED } | |
253 | }; | |
254 | ||
255 | if (*str++ != '@') | |
256 | return BFD_RELOC_UNUSED; | |
257 | ||
258 | for (ch = *str, str2 = ident; | |
259 | (str2 < ident + sizeof (ident) - 1 | |
260 | && (isalnum (ch) || ch == '@')); | |
261 | ch = *++str) | |
262 | { | |
263 | *str2++ = (islower (ch)) ? ch : tolower (ch); | |
264 | } | |
265 | ||
266 | *str2 = '\0'; | |
267 | len = str2 - ident; | |
268 | ||
269 | ch = ident[0]; | |
270 | for (ptr = &mapping[0]; ptr->length > 0; ptr++) | |
271 | if (ch == ptr->string[0] | |
272 | && len == ptr->length | |
273 | && memcmp (ident, ptr->string, ptr->length) == 0) | |
274 | { | |
275 | /* Now check for identifier@suffix+constant */ | |
276 | if (*str == '-' || *str == '+') | |
277 | { | |
278 | char *orig_line = input_line_pointer; | |
279 | ||
280 | input_line_pointer = str; | |
281 | expression (new_exp_p); | |
282 | if (new_exp_p->X_op == O_constant) | |
283 | { | |
284 | exp_p->X_add_number += new_exp_p->X_add_number; | |
285 | str = input_line_pointer; | |
286 | } | |
287 | if (new_exp_p->X_op == O_subtract) | |
288 | str = input_line_pointer; | |
289 | ||
290 | if (&input_line_pointer != str_p) | |
291 | input_line_pointer = orig_line; | |
292 | } | |
293 | ||
294 | *str_p = str; | |
295 | return ptr->reloc; | |
296 | } | |
297 | ||
298 | return BFD_RELOC_UNUSED; | |
299 | } | |
300 | ||
301 | /* The regular cons() function, that reads constants, doesn't support | |
302 | suffixes such as @GOT, @GOTOFF and @PLT, that generate | |
303 | machine-specific relocation types. So we must define it here. */ | |
304 | /* Clobbers input_line_pointer, checks end-of-line. */ | |
305 | static void | |
306 | sh_elf_cons (nbytes) | |
307 | register int nbytes; /* 1=.byte, 2=.word, 4=.long */ | |
308 | { | |
309 | expressionS exp, new_exp; | |
310 | bfd_reloc_code_real_type reloc; | |
311 | const char *name; | |
312 | ||
313 | if (is_it_end_of_statement ()) | |
314 | { | |
315 | demand_empty_rest_of_line (); | |
316 | return; | |
317 | } | |
318 | ||
319 | do | |
320 | { | |
321 | expression (&exp); | |
322 | new_exp.X_op = O_absent; | |
323 | new_exp.X_add_symbol = new_exp.X_op_symbol = NULL; | |
324 | /* If the _GLOBAL_OFFSET_TABLE_ symbol hasn't been found yet, | |
325 | use the name of the symbol to tell whether it's the | |
326 | _GLOBAL_OFFSET_TABLE_. If it has, comparing the symbols is | |
327 | sufficient. */ | |
328 | if (! GOT_symbol && exp.X_add_symbol) | |
329 | name = S_GET_NAME (exp.X_add_symbol); | |
330 | else | |
331 | name = NULL; | |
332 | /* Check whether this expression involves the | |
333 | _GLOBAL_OFFSET_TABLE_ symbol, by itself or added to a | |
334 | difference of two other symbols. */ | |
335 | if (((GOT_symbol && GOT_symbol == exp.X_add_symbol) | |
336 | || (! GOT_symbol && name | |
337 | && strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)) | |
338 | && (exp.X_op == O_symbol | |
339 | || (exp.X_op == O_add | |
340 | && ((symbol_get_value_expression (exp.X_op_symbol)->X_op) | |
341 | == O_subtract)))) | |
342 | { | |
343 | reloc_howto_type *reloc_howto = bfd_reloc_type_lookup (stdoutput, | |
344 | BFD_RELOC_32); | |
345 | int size = bfd_get_reloc_size (reloc_howto); | |
346 | ||
347 | if (GOT_symbol == NULL) | |
348 | GOT_symbol = symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME); | |
349 | ||
350 | if (size > nbytes) | |
351 | as_bad (_("%s relocations do not fit in %d bytes\n"), | |
352 | reloc_howto->name, nbytes); | |
353 | else | |
354 | { | |
355 | register char *p = frag_more ((int) nbytes); | |
356 | int offset = nbytes - size; | |
357 | ||
358 | fix_new_exp (frag_now, p - frag_now->fr_literal + offset, | |
359 | size, &exp, 0, TC_RELOC_GLOBAL_OFFSET_TABLE); | |
360 | } | |
361 | } | |
362 | /* Check if this symbol involves one of the magic suffixes, such | |
363 | as @GOT, @GOTOFF or @PLT, and determine which relocation type | |
364 | to use. */ | |
365 | else if ((exp.X_op == O_symbol || (exp.X_op == O_add && exp.X_op_symbol)) | |
366 | && *input_line_pointer == '@' | |
367 | && ((reloc = sh_elf_suffix (&input_line_pointer, &exp, &new_exp)) | |
368 | != BFD_RELOC_UNUSED)) | |
369 | { | |
370 | reloc_howto_type *reloc_howto = bfd_reloc_type_lookup (stdoutput, | |
371 | reloc); | |
372 | int size = bfd_get_reloc_size (reloc_howto); | |
373 | ||
374 | /* Force a GOT to be generated. */ | |
375 | if (GOT_symbol == NULL) | |
376 | GOT_symbol = symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME); | |
377 | ||
378 | if (size > nbytes) | |
379 | as_bad (_("%s relocations do not fit in %d bytes\n"), | |
380 | reloc_howto->name, nbytes); | |
381 | else | |
382 | { | |
383 | register char *p = frag_more ((int) nbytes); | |
384 | int offset = nbytes - size; | |
385 | ||
386 | fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size, | |
387 | &exp, 0, reloc); | |
81d4177b | 388 | if (new_exp.X_op != O_absent) |
a1cc9221 AO |
389 | fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size, |
390 | &new_exp, 0, BFD_RELOC_32); | |
391 | } | |
392 | } | |
393 | else | |
394 | emit_expr (&exp, (unsigned int) nbytes); | |
395 | } | |
396 | while (*input_line_pointer++ == ','); | |
397 | ||
81d4177b | 398 | input_line_pointer--; /* Put terminator back into stream. */ |
a1cc9221 AO |
399 | if (*input_line_pointer == '#' || *input_line_pointer == '!') |
400 | { | |
dda5ecfc | 401 | while (! is_end_of_line[(unsigned char) *input_line_pointer++]); |
a1cc9221 AO |
402 | } |
403 | else | |
404 | demand_empty_rest_of_line (); | |
405 | } | |
406 | #endif /* OBJ_ELF */ | |
407 | ||
408 | \f | |
6b31947e NC |
409 | /* This function is called once, at assembler startup time. This should |
410 | set up all the tables, etc that the MD part of the assembler needs. */ | |
252b5132 RH |
411 | |
412 | void | |
413 | md_begin () | |
414 | { | |
415 | sh_opcode_info *opcode; | |
416 | char *prev_name = ""; | |
d4845d57 | 417 | int target_arch; |
252b5132 | 418 | |
056350c6 NC |
419 | #ifdef TE_PE |
420 | /* The WinCE OS only supports little endian executables. */ | |
421 | target_big_endian = 0; | |
422 | #else | |
252b5132 RH |
423 | if (! shl) |
424 | target_big_endian = 1; | |
056350c6 | 425 | #endif |
252b5132 | 426 | |
d4845d57 JR |
427 | target_arch = arch_sh1_up & ~(sh_dsp ? arch_sh3e_up : arch_sh_dsp_up); |
428 | valid_arch = target_arch; | |
429 | ||
252b5132 RH |
430 | opcode_hash_control = hash_new (); |
431 | ||
6b31947e | 432 | /* Insert unique names into hash table. */ |
252b5132 RH |
433 | for (opcode = sh_table; opcode->name; opcode++) |
434 | { | |
a37c8f88 | 435 | if (strcmp (prev_name, opcode->name)) |
252b5132 | 436 | { |
a37c8f88 JR |
437 | if (! (opcode->arch & target_arch)) |
438 | continue; | |
252b5132 RH |
439 | prev_name = opcode->name; |
440 | hash_insert (opcode_hash_control, opcode->name, (char *) opcode); | |
441 | } | |
442 | else | |
443 | { | |
444 | /* Make all the opcodes with the same name point to the same | |
6b31947e | 445 | string. */ |
252b5132 RH |
446 | opcode->name = prev_name; |
447 | } | |
448 | } | |
449 | } | |
450 | ||
451 | static int reg_m; | |
452 | static int reg_n; | |
d4845d57 JR |
453 | static int reg_x, reg_y; |
454 | static int reg_efg; | |
252b5132 RH |
455 | static int reg_b; |
456 | ||
252b5132 RH |
457 | typedef struct |
458 | { | |
459 | sh_arg_type type; | |
460 | int reg; | |
015551fc | 461 | expressionS immediate; |
252b5132 | 462 | } |
252b5132 RH |
463 | sh_operand_info; |
464 | ||
dead1419 JR |
465 | #define IDENT_CHAR(c) (isalnum (c) || (c) == '_') |
466 | ||
6b31947e NC |
467 | /* Try to parse a reg name. Return the number of chars consumed. */ |
468 | ||
252b5132 RH |
469 | static int |
470 | parse_reg (src, mode, reg) | |
471 | char *src; | |
472 | int *mode; | |
473 | int *reg; | |
474 | { | |
e46fee70 HPN |
475 | char l0 = tolower (src[0]); |
476 | char l1 = l0 ? tolower (src[1]) : 0; | |
477 | ||
dead1419 | 478 | /* We use ! IDENT_CHAR for the next character after the register name, to |
252b5132 | 479 | make sure that we won't accidentally recognize a symbol name such as |
dead1419 | 480 | 'sram' or sr_ram as being a reference to the register 'sr'. */ |
252b5132 | 481 | |
e46fee70 | 482 | if (l0 == 'r') |
252b5132 | 483 | { |
e46fee70 | 484 | if (l1 == '1') |
d4845d57 JR |
485 | { |
486 | if (src[2] >= '0' && src[2] <= '5' | |
dead1419 | 487 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
488 | { |
489 | *mode = A_REG_N; | |
490 | *reg = 10 + src[2] - '0'; | |
491 | return 3; | |
492 | } | |
493 | } | |
e46fee70 | 494 | if (l1 >= '0' && l1 <= '9' |
dead1419 | 495 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
496 | { |
497 | *mode = A_REG_N; | |
e46fee70 | 498 | *reg = (l1 - '0'); |
d4845d57 JR |
499 | return 2; |
500 | } | |
e46fee70 | 501 | if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0 |
dead1419 JR |
502 | && ! IDENT_CHAR ((unsigned char) src[7])) |
503 | { | |
504 | *mode = A_REG_B; | |
e46fee70 | 505 | *reg = (l1 - '0'); |
dead1419 JR |
506 | return 7; |
507 | } | |
d4845d57 | 508 | |
e46fee70 | 509 | if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
510 | { |
511 | *mode = A_RE; | |
512 | return 2; | |
513 | } | |
e46fee70 | 514 | if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
515 | { |
516 | *mode = A_RS; | |
517 | return 2; | |
518 | } | |
252b5132 RH |
519 | } |
520 | ||
e46fee70 | 521 | if (l0 == 'a') |
252b5132 | 522 | { |
e46fee70 | 523 | if (l1 == '0') |
d4845d57 | 524 | { |
dead1419 | 525 | if (! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
526 | { |
527 | *mode = DSP_REG_N; | |
528 | *reg = A_A0_NUM; | |
529 | return 2; | |
530 | } | |
e46fee70 | 531 | if (tolower (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
532 | { |
533 | *mode = DSP_REG_N; | |
534 | *reg = A_A0G_NUM; | |
535 | return 3; | |
536 | } | |
537 | } | |
e46fee70 | 538 | if (l1 == '1') |
252b5132 | 539 | { |
dead1419 | 540 | if (! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 541 | { |
d4845d57 JR |
542 | *mode = DSP_REG_N; |
543 | *reg = A_A1_NUM; | |
544 | return 2; | |
545 | } | |
e46fee70 | 546 | if (tolower (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
547 | { |
548 | *mode = DSP_REG_N; | |
549 | *reg = A_A1G_NUM; | |
252b5132 RH |
550 | return 3; |
551 | } | |
552 | } | |
d4845d57 | 553 | |
e46fee70 | 554 | if (l1 == 'x' && src[2] >= '0' && src[2] <= '1' |
dead1419 | 555 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
556 | { |
557 | *mode = A_REG_N; | |
e46fee70 | 558 | *reg = 4 + (l1 - '0'); |
d4845d57 JR |
559 | return 3; |
560 | } | |
e46fee70 | 561 | if (l1 == 'y' && src[2] >= '0' && src[2] <= '1' |
dead1419 | 562 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
563 | { |
564 | *mode = A_REG_N; | |
e46fee70 | 565 | *reg = 6 + (l1 - '0'); |
d4845d57 JR |
566 | return 3; |
567 | } | |
e46fee70 | 568 | if (l1 == 's' && src[2] >= '0' && src[2] <= '3' |
dead1419 | 569 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 | 570 | { |
e46fee70 | 571 | int n = l1 - '0'; |
d4845d57 JR |
572 | |
573 | *mode = A_REG_N; | |
574 | *reg = n | ((~n & 2) << 1); | |
575 | return 3; | |
576 | } | |
577 | } | |
578 | ||
e46fee70 | 579 | if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 | 580 | { |
e46fee70 | 581 | if (l1 == 's') |
d4845d57 JR |
582 | { |
583 | *mode = A_REG_N; | |
584 | *reg = 8; | |
252b5132 RH |
585 | return 2; |
586 | } | |
e46fee70 | 587 | if (l1 == 'x') |
d4845d57 JR |
588 | { |
589 | *mode = A_REG_N; | |
590 | *reg = 8; | |
591 | return 2; | |
592 | } | |
e46fee70 | 593 | if (l1 == 'y') |
d4845d57 JR |
594 | { |
595 | *mode = A_REG_N; | |
596 | *reg = 9; | |
597 | return 2; | |
598 | } | |
599 | } | |
600 | ||
e46fee70 | 601 | if (l0 == 'x' && l1 >= '0' && l1 <= '1' |
dead1419 | 602 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
603 | { |
604 | *mode = DSP_REG_N; | |
e46fee70 | 605 | *reg = A_X0_NUM + l1 - '0'; |
d4845d57 JR |
606 | return 2; |
607 | } | |
608 | ||
e46fee70 | 609 | if (l0 == 'y' && l1 >= '0' && l1 <= '1' |
dead1419 | 610 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
611 | { |
612 | *mode = DSP_REG_N; | |
e46fee70 | 613 | *reg = A_Y0_NUM + l1 - '0'; |
d4845d57 JR |
614 | return 2; |
615 | } | |
616 | ||
e46fee70 | 617 | if (l0 == 'm' && l1 >= '0' && l1 <= '1' |
dead1419 | 618 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
619 | { |
620 | *mode = DSP_REG_N; | |
e46fee70 | 621 | *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM; |
d4845d57 | 622 | return 2; |
252b5132 RH |
623 | } |
624 | ||
e46fee70 HPN |
625 | if (l0 == 's' |
626 | && l1 == 's' | |
627 | && tolower (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3])) | |
252b5132 RH |
628 | { |
629 | *mode = A_SSR; | |
630 | return 3; | |
631 | } | |
632 | ||
e46fee70 | 633 | if (l0 == 's' && l1 == 'p' && tolower (src[2]) == 'c' |
dead1419 | 634 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
635 | { |
636 | *mode = A_SPC; | |
637 | return 3; | |
638 | } | |
639 | ||
e46fee70 | 640 | if (l0 == 's' && l1 == 'g' && tolower (src[2]) == 'r' |
dead1419 | 641 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
642 | { |
643 | *mode = A_SGR; | |
644 | return 3; | |
645 | } | |
646 | ||
e46fee70 | 647 | if (l0 == 'd' && l1 == 's' && tolower (src[2]) == 'r' |
dead1419 | 648 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
649 | { |
650 | *mode = A_DSR; | |
651 | return 3; | |
652 | } | |
653 | ||
e46fee70 | 654 | if (l0 == 'd' && l1 == 'b' && tolower (src[2]) == 'r' |
dead1419 | 655 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
656 | { |
657 | *mode = A_DBR; | |
658 | return 3; | |
659 | } | |
660 | ||
e46fee70 | 661 | if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
662 | { |
663 | *mode = A_SR; | |
664 | return 2; | |
665 | } | |
666 | ||
e46fee70 | 667 | if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
668 | { |
669 | *mode = A_REG_N; | |
670 | *reg = 15; | |
671 | return 2; | |
672 | } | |
673 | ||
e46fee70 | 674 | if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
675 | { |
676 | *mode = A_PR; | |
677 | return 2; | |
678 | } | |
e46fee70 | 679 | if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 680 | { |
015551fc JR |
681 | /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0' |
682 | and use an uninitialized immediate. */ | |
683 | *mode = A_PC; | |
252b5132 RH |
684 | return 2; |
685 | } | |
e46fee70 | 686 | if (l0 == 'g' && l1 == 'b' && tolower (src[2]) == 'r' |
dead1419 | 687 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
688 | { |
689 | *mode = A_GBR; | |
690 | return 3; | |
691 | } | |
e46fee70 | 692 | if (l0 == 'v' && l1 == 'b' && tolower (src[2]) == 'r' |
dead1419 | 693 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
694 | { |
695 | *mode = A_VBR; | |
696 | return 3; | |
697 | } | |
698 | ||
e46fee70 | 699 | if (l0 == 'm' && l1 == 'a' && tolower (src[2]) == 'c' |
dead1419 | 700 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 | 701 | { |
19c0258a | 702 | if (tolower (src[3]) == 'l') |
252b5132 RH |
703 | { |
704 | *mode = A_MACL; | |
705 | return 4; | |
706 | } | |
19c0258a | 707 | if (tolower (src[3]) == 'h') |
252b5132 RH |
708 | { |
709 | *mode = A_MACH; | |
710 | return 4; | |
711 | } | |
712 | } | |
e46fee70 | 713 | if (l0 == 'm' && l1 == 'o' && tolower (src[2]) == 'd' |
dead1419 | 714 | && ! IDENT_CHAR ((unsigned char) src[4])) |
d4845d57 JR |
715 | { |
716 | *mode = A_MOD; | |
717 | return 3; | |
718 | } | |
e46fee70 | 719 | if (l0 == 'f' && l1 == 'r') |
252b5132 RH |
720 | { |
721 | if (src[2] == '1') | |
722 | { | |
723 | if (src[3] >= '0' && src[3] <= '5' | |
dead1419 | 724 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
725 | { |
726 | *mode = F_REG_N; | |
727 | *reg = 10 + src[3] - '0'; | |
728 | return 4; | |
729 | } | |
730 | } | |
731 | if (src[2] >= '0' && src[2] <= '9' | |
dead1419 | 732 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
733 | { |
734 | *mode = F_REG_N; | |
735 | *reg = (src[2] - '0'); | |
736 | return 3; | |
737 | } | |
738 | } | |
e46fee70 | 739 | if (l0 == 'd' && l1 == 'r') |
252b5132 RH |
740 | { |
741 | if (src[2] == '1') | |
742 | { | |
743 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 744 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
745 | { |
746 | *mode = D_REG_N; | |
747 | *reg = 10 + src[3] - '0'; | |
748 | return 4; | |
749 | } | |
750 | } | |
751 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 752 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
753 | { |
754 | *mode = D_REG_N; | |
755 | *reg = (src[2] - '0'); | |
756 | return 3; | |
757 | } | |
758 | } | |
e46fee70 | 759 | if (l0 == 'x' && l1 == 'd') |
252b5132 RH |
760 | { |
761 | if (src[2] == '1') | |
762 | { | |
763 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 764 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
765 | { |
766 | *mode = X_REG_N; | |
767 | *reg = 11 + src[3] - '0'; | |
768 | return 4; | |
769 | } | |
770 | } | |
771 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 772 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
773 | { |
774 | *mode = X_REG_N; | |
775 | *reg = (src[2] - '0') + 1; | |
776 | return 3; | |
777 | } | |
778 | } | |
e46fee70 | 779 | if (l0 == 'f' && l1 == 'v') |
252b5132 | 780 | { |
dead1419 | 781 | if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
782 | { |
783 | *mode = V_REG_N; | |
784 | *reg = 12; | |
785 | return 4; | |
786 | } | |
787 | if ((src[2] == '0' || src[2] == '4' || src[2] == '8') | |
dead1419 | 788 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
789 | { |
790 | *mode = V_REG_N; | |
791 | *reg = (src[2] - '0'); | |
792 | return 3; | |
793 | } | |
794 | } | |
e46fee70 HPN |
795 | if (l0 == 'f' && l1 == 'p' && tolower (src[2]) == 'u' |
796 | && tolower (src[3]) == 'l' | |
dead1419 | 797 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
798 | { |
799 | *mode = FPUL_N; | |
800 | return 4; | |
801 | } | |
802 | ||
e46fee70 HPN |
803 | if (l0 == 'f' && l1 == 'p' && tolower (src[2]) == 's' |
804 | && tolower (src[3]) == 'c' | |
805 | && tolower (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5])) | |
252b5132 RH |
806 | { |
807 | *mode = FPSCR_N; | |
808 | return 5; | |
809 | } | |
810 | ||
e46fee70 HPN |
811 | if (l0 == 'x' && l1 == 'm' && tolower (src[2]) == 't' |
812 | && tolower (src[3]) == 'r' | |
813 | && tolower (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5])) | |
252b5132 RH |
814 | { |
815 | *mode = XMTRX_M4; | |
816 | return 5; | |
817 | } | |
818 | ||
819 | return 0; | |
820 | } | |
821 | ||
c4aa876b NC |
822 | static symbolS * |
823 | dot () | |
252b5132 RH |
824 | { |
825 | const char *fake; | |
826 | ||
827 | /* JF: '.' is pseudo symbol with value of current location | |
828 | in current segment. */ | |
829 | fake = FAKE_LABEL_NAME; | |
830 | return symbol_new (fake, | |
831 | now_seg, | |
832 | (valueT) frag_now_fix (), | |
833 | frag_now); | |
252b5132 RH |
834 | } |
835 | ||
c4aa876b | 836 | static char * |
015551fc | 837 | parse_exp (s, op) |
252b5132 | 838 | char *s; |
015551fc | 839 | sh_operand_info *op; |
252b5132 RH |
840 | { |
841 | char *save; | |
842 | char *new; | |
843 | ||
844 | save = input_line_pointer; | |
845 | input_line_pointer = s; | |
015551fc JR |
846 | expression (&op->immediate); |
847 | if (op->immediate.X_op == O_absent) | |
252b5132 RH |
848 | as_bad (_("missing operand")); |
849 | new = input_line_pointer; | |
850 | input_line_pointer = save; | |
851 | return new; | |
852 | } | |
853 | ||
252b5132 RH |
854 | /* The many forms of operand: |
855 | ||
856 | Rn Register direct | |
857 | @Rn Register indirect | |
858 | @Rn+ Autoincrement | |
859 | @-Rn Autodecrement | |
860 | @(disp:4,Rn) | |
861 | @(disp:8,GBR) | |
862 | @(disp:8,PC) | |
863 | ||
864 | @(R0,Rn) | |
865 | @(R0,GBR) | |
866 | ||
867 | disp:8 | |
868 | disp:12 | |
869 | #imm8 | |
870 | pr, gbr, vbr, macl, mach | |
252b5132 RH |
871 | */ |
872 | ||
c4aa876b | 873 | static char * |
252b5132 RH |
874 | parse_at (src, op) |
875 | char *src; | |
876 | sh_operand_info *op; | |
877 | { | |
878 | int len; | |
879 | int mode; | |
880 | src++; | |
881 | if (src[0] == '-') | |
882 | { | |
6b31947e | 883 | /* Must be predecrement. */ |
252b5132 RH |
884 | src++; |
885 | ||
886 | len = parse_reg (src, &mode, &(op->reg)); | |
887 | if (mode != A_REG_N) | |
888 | as_bad (_("illegal register after @-")); | |
889 | ||
890 | op->type = A_DEC_N; | |
891 | src += len; | |
892 | } | |
893 | else if (src[0] == '(') | |
894 | { | |
895 | /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or | |
896 | @(r0, rn) */ | |
897 | src++; | |
898 | len = parse_reg (src, &mode, &(op->reg)); | |
899 | if (len && mode == A_REG_N) | |
900 | { | |
901 | src += len; | |
902 | if (op->reg != 0) | |
903 | { | |
904 | as_bad (_("must be @(r0,...)")); | |
905 | } | |
906 | if (src[0] == ',') | |
907 | src++; | |
908 | /* Now can be rn or gbr */ | |
909 | len = parse_reg (src, &mode, &(op->reg)); | |
910 | if (mode == A_GBR) | |
911 | { | |
912 | op->type = A_R0_GBR; | |
913 | } | |
914 | else if (mode == A_REG_N) | |
915 | { | |
916 | op->type = A_IND_R0_REG_N; | |
917 | } | |
918 | else | |
919 | { | |
920 | as_bad (_("syntax error in @(r0,...)")); | |
921 | } | |
922 | } | |
923 | else | |
924 | { | |
925 | /* Must be an @(disp,.. thing) */ | |
015551fc | 926 | src = parse_exp (src, op); |
252b5132 RH |
927 | if (src[0] == ',') |
928 | src++; | |
929 | /* Now can be rn, gbr or pc */ | |
930 | len = parse_reg (src, &mode, &op->reg); | |
931 | if (len) | |
932 | { | |
933 | if (mode == A_REG_N) | |
934 | { | |
935 | op->type = A_DISP_REG_N; | |
936 | } | |
937 | else if (mode == A_GBR) | |
938 | { | |
939 | op->type = A_DISP_GBR; | |
940 | } | |
015551fc | 941 | else if (mode == A_PC) |
252b5132 | 942 | { |
c4aa876b NC |
943 | /* Turn a plain @(4,pc) into @(.+4,pc). */ |
944 | if (op->immediate.X_op == O_constant) | |
945 | { | |
946 | op->immediate.X_add_symbol = dot(); | |
947 | op->immediate.X_op = O_symbol; | |
948 | } | |
252b5132 RH |
949 | op->type = A_DISP_PC; |
950 | } | |
951 | else | |
952 | { | |
953 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
954 | } | |
955 | } | |
956 | else | |
957 | { | |
958 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
959 | } | |
960 | } | |
961 | src += len; | |
962 | if (src[0] != ')') | |
963 | as_bad (_("expecting )")); | |
964 | else | |
965 | src++; | |
966 | } | |
967 | else | |
968 | { | |
969 | src += parse_reg (src, &mode, &(op->reg)); | |
970 | if (mode != A_REG_N) | |
971 | { | |
972 | as_bad (_("illegal register after @")); | |
973 | } | |
974 | if (src[0] == '+') | |
975 | { | |
252b5132 | 976 | src++; |
d4845d57 JR |
977 | if ((src[0] == 'r' && src[1] == '8') |
978 | || (src[0] == 'i' && (src[1] == 'x' || src[1] == 's'))) | |
979 | { | |
980 | src += 2; | |
981 | op->type = A_PMOD_N; | |
982 | } | |
983 | if ((src[0] == 'r' && src[1] == '9') | |
984 | || (src[0] == 'i' && src[1] == 'y')) | |
985 | { | |
986 | src += 2; | |
987 | op->type = A_PMODY_N; | |
988 | } | |
989 | else | |
990 | op->type = A_INC_N; | |
252b5132 RH |
991 | } |
992 | else | |
993 | { | |
994 | op->type = A_IND_N; | |
995 | } | |
996 | } | |
997 | return src; | |
998 | } | |
999 | ||
1000 | static void | |
1001 | get_operand (ptr, op) | |
1002 | char **ptr; | |
1003 | sh_operand_info *op; | |
1004 | { | |
1005 | char *src = *ptr; | |
1006 | int mode = -1; | |
1007 | unsigned int len; | |
1008 | ||
1009 | if (src[0] == '#') | |
1010 | { | |
1011 | src++; | |
015551fc | 1012 | *ptr = parse_exp (src, op); |
252b5132 RH |
1013 | op->type = A_IMM; |
1014 | return; | |
1015 | } | |
1016 | ||
1017 | else if (src[0] == '@') | |
1018 | { | |
1019 | *ptr = parse_at (src, op); | |
1020 | return; | |
1021 | } | |
1022 | len = parse_reg (src, &mode, &(op->reg)); | |
1023 | if (len) | |
1024 | { | |
1025 | *ptr = src + len; | |
1026 | op->type = mode; | |
1027 | return; | |
1028 | } | |
1029 | else | |
1030 | { | |
6b31947e | 1031 | /* Not a reg, the only thing left is a displacement. */ |
015551fc | 1032 | *ptr = parse_exp (src, op); |
252b5132 RH |
1033 | op->type = A_DISP_PC; |
1034 | return; | |
1035 | } | |
1036 | } | |
1037 | ||
c4aa876b | 1038 | static char * |
252b5132 RH |
1039 | get_operands (info, args, operand) |
1040 | sh_opcode_info *info; | |
1041 | char *args; | |
1042 | sh_operand_info *operand; | |
252b5132 RH |
1043 | { |
1044 | char *ptr = args; | |
1045 | if (info->arg[0]) | |
1046 | { | |
d4845d57 JR |
1047 | /* The pre-processor will eliminate whitespace in front of '@' |
1048 | after the first argument; we may be called multiple times | |
1049 | from assemble_ppi, so don't insist on finding whitespace here. */ | |
1050 | if (*ptr == ' ') | |
1051 | ptr++; | |
252b5132 RH |
1052 | |
1053 | get_operand (&ptr, operand + 0); | |
1054 | if (info->arg[1]) | |
1055 | { | |
1056 | if (*ptr == ',') | |
1057 | { | |
1058 | ptr++; | |
1059 | } | |
1060 | get_operand (&ptr, operand + 1); | |
52ccafd0 JR |
1061 | /* ??? Hack: psha/pshl have a varying operand number depending on |
1062 | the type of the first operand. We handle this by having the | |
1063 | three-operand version first and reducing the number of operands | |
1064 | parsed to two if we see that the first operand is an immediate. | |
1065 | This works because no insn with three operands has an immediate | |
1066 | as first operand. */ | |
1067 | if (info->arg[2] && operand[0].type != A_IMM) | |
252b5132 RH |
1068 | { |
1069 | if (*ptr == ',') | |
1070 | { | |
1071 | ptr++; | |
1072 | } | |
1073 | get_operand (&ptr, operand + 2); | |
1074 | } | |
1075 | else | |
1076 | { | |
1077 | operand[2].type = 0; | |
1078 | } | |
1079 | } | |
1080 | else | |
1081 | { | |
1082 | operand[1].type = 0; | |
1083 | operand[2].type = 0; | |
1084 | } | |
1085 | } | |
1086 | else | |
1087 | { | |
1088 | operand[0].type = 0; | |
1089 | operand[1].type = 0; | |
1090 | operand[2].type = 0; | |
1091 | } | |
1092 | return ptr; | |
1093 | } | |
1094 | ||
1095 | /* Passed a pointer to a list of opcodes which use different | |
1096 | addressing modes, return the opcode which matches the opcodes | |
6b31947e | 1097 | provided. */ |
252b5132 | 1098 | |
c4aa876b | 1099 | static sh_opcode_info * |
252b5132 RH |
1100 | get_specific (opcode, operands) |
1101 | sh_opcode_info *opcode; | |
1102 | sh_operand_info *operands; | |
1103 | { | |
1104 | sh_opcode_info *this_try = opcode; | |
1105 | char *name = opcode->name; | |
1106 | int n = 0; | |
c4aa876b | 1107 | |
252b5132 RH |
1108 | while (opcode->name) |
1109 | { | |
1110 | this_try = opcode++; | |
1111 | if (this_try->name != name) | |
1112 | { | |
1113 | /* We've looked so far down the table that we've run out of | |
6b31947e | 1114 | opcodes with the same name. */ |
252b5132 RH |
1115 | return 0; |
1116 | } | |
c4aa876b | 1117 | |
6b31947e | 1118 | /* Look at both operands needed by the opcodes and provided by |
252b5132 RH |
1119 | the user - since an arg test will often fail on the same arg |
1120 | again and again, we'll try and test the last failing arg the | |
6b31947e | 1121 | first on each opcode try. */ |
252b5132 RH |
1122 | for (n = 0; this_try->arg[n]; n++) |
1123 | { | |
1124 | sh_operand_info *user = operands + n; | |
1125 | sh_arg_type arg = this_try->arg[n]; | |
c4aa876b | 1126 | |
252b5132 RH |
1127 | switch (arg) |
1128 | { | |
1129 | case A_IMM: | |
1130 | case A_BDISP12: | |
1131 | case A_BDISP8: | |
1132 | case A_DISP_GBR: | |
1133 | case A_DISP_PC: | |
1134 | case A_MACH: | |
1135 | case A_PR: | |
1136 | case A_MACL: | |
1137 | if (user->type != arg) | |
1138 | goto fail; | |
1139 | break; | |
1140 | case A_R0: | |
1141 | /* opcode needs r0 */ | |
1142 | if (user->type != A_REG_N || user->reg != 0) | |
1143 | goto fail; | |
1144 | break; | |
1145 | case A_R0_GBR: | |
1146 | if (user->type != A_R0_GBR || user->reg != 0) | |
1147 | goto fail; | |
1148 | break; | |
1149 | case F_FR0: | |
1150 | if (user->type != F_REG_N || user->reg != 0) | |
1151 | goto fail; | |
1152 | break; | |
1153 | ||
1154 | case A_REG_N: | |
1155 | case A_INC_N: | |
1156 | case A_DEC_N: | |
1157 | case A_IND_N: | |
1158 | case A_IND_R0_REG_N: | |
1159 | case A_DISP_REG_N: | |
1160 | case F_REG_N: | |
1161 | case D_REG_N: | |
1162 | case X_REG_N: | |
1163 | case V_REG_N: | |
1164 | case FPUL_N: | |
1165 | case FPSCR_N: | |
d4845d57 JR |
1166 | case A_PMOD_N: |
1167 | case A_PMODY_N: | |
1168 | case DSP_REG_N: | |
252b5132 RH |
1169 | /* Opcode needs rn */ |
1170 | if (user->type != arg) | |
1171 | goto fail; | |
1172 | reg_n = user->reg; | |
1173 | break; | |
252b5132 RH |
1174 | case DX_REG_N: |
1175 | if (user->type != D_REG_N && user->type != X_REG_N) | |
1176 | goto fail; | |
1177 | reg_n = user->reg; | |
1178 | break; | |
1179 | case A_GBR: | |
1180 | case A_SR: | |
1181 | case A_VBR: | |
d4845d57 JR |
1182 | case A_DSR: |
1183 | case A_MOD: | |
1184 | case A_RE: | |
1185 | case A_RS: | |
252b5132 RH |
1186 | case A_SSR: |
1187 | case A_SPC: | |
1188 | case A_SGR: | |
1189 | case A_DBR: | |
1190 | if (user->type != arg) | |
1191 | goto fail; | |
1192 | break; | |
1193 | ||
c4aa876b | 1194 | case A_REG_B: |
252b5132 RH |
1195 | if (user->type != arg) |
1196 | goto fail; | |
1197 | reg_b = user->reg; | |
1198 | break; | |
1199 | ||
1200 | case A_REG_M: | |
1201 | case A_INC_M: | |
1202 | case A_DEC_M: | |
1203 | case A_IND_M: | |
1204 | case A_IND_R0_REG_M: | |
1205 | case A_DISP_REG_M: | |
d4845d57 | 1206 | case DSP_REG_M: |
252b5132 RH |
1207 | /* Opcode needs rn */ |
1208 | if (user->type != arg - A_REG_M + A_REG_N) | |
1209 | goto fail; | |
1210 | reg_m = user->reg; | |
1211 | break; | |
1212 | ||
d4845d57 JR |
1213 | case DSP_REG_X: |
1214 | if (user->type != DSP_REG_N) | |
1215 | goto fail; | |
1216 | switch (user->reg) | |
1217 | { | |
1218 | case A_X0_NUM: | |
1219 | reg_x = 0; | |
1220 | break; | |
1221 | case A_X1_NUM: | |
1222 | reg_x = 1; | |
1223 | break; | |
1224 | case A_A0_NUM: | |
1225 | reg_x = 2; | |
1226 | break; | |
1227 | case A_A1_NUM: | |
1228 | reg_x = 3; | |
1229 | break; | |
1230 | default: | |
1231 | goto fail; | |
1232 | } | |
1233 | break; | |
1234 | ||
1235 | case DSP_REG_Y: | |
1236 | if (user->type != DSP_REG_N) | |
1237 | goto fail; | |
1238 | switch (user->reg) | |
1239 | { | |
1240 | case A_Y0_NUM: | |
1241 | reg_y = 0; | |
1242 | break; | |
1243 | case A_Y1_NUM: | |
1244 | reg_y = 1; | |
1245 | break; | |
1246 | case A_M0_NUM: | |
1247 | reg_y = 2; | |
1248 | break; | |
1249 | case A_M1_NUM: | |
1250 | reg_y = 3; | |
1251 | break; | |
1252 | default: | |
1253 | goto fail; | |
1254 | } | |
1255 | break; | |
1256 | ||
1257 | case DSP_REG_E: | |
1258 | if (user->type != DSP_REG_N) | |
1259 | goto fail; | |
1260 | switch (user->reg) | |
1261 | { | |
1262 | case A_X0_NUM: | |
1263 | reg_efg = 0 << 10; | |
1264 | break; | |
1265 | case A_X1_NUM: | |
1266 | reg_efg = 1 << 10; | |
1267 | break; | |
1268 | case A_Y0_NUM: | |
1269 | reg_efg = 2 << 10; | |
1270 | break; | |
1271 | case A_A1_NUM: | |
1272 | reg_efg = 3 << 10; | |
1273 | break; | |
1274 | default: | |
1275 | goto fail; | |
1276 | } | |
1277 | break; | |
1278 | ||
1279 | case DSP_REG_F: | |
1280 | if (user->type != DSP_REG_N) | |
1281 | goto fail; | |
1282 | switch (user->reg) | |
1283 | { | |
1284 | case A_Y0_NUM: | |
1285 | reg_efg |= 0 << 8; | |
1286 | break; | |
1287 | case A_Y1_NUM: | |
1288 | reg_efg |= 1 << 8; | |
1289 | break; | |
1290 | case A_X0_NUM: | |
1291 | reg_efg |= 2 << 8; | |
1292 | break; | |
1293 | case A_A1_NUM: | |
1294 | reg_efg |= 3 << 8; | |
1295 | break; | |
1296 | default: | |
1297 | goto fail; | |
1298 | } | |
1299 | break; | |
1300 | ||
1301 | case DSP_REG_G: | |
1302 | if (user->type != DSP_REG_N) | |
1303 | goto fail; | |
1304 | switch (user->reg) | |
1305 | { | |
1306 | case A_M0_NUM: | |
1307 | reg_efg |= 0 << 2; | |
1308 | break; | |
1309 | case A_M1_NUM: | |
1310 | reg_efg |= 1 << 2; | |
1311 | break; | |
1312 | case A_A0_NUM: | |
1313 | reg_efg |= 2 << 2; | |
1314 | break; | |
1315 | case A_A1_NUM: | |
1316 | reg_efg |= 3 << 2; | |
1317 | break; | |
1318 | default: | |
1319 | goto fail; | |
1320 | } | |
1321 | break; | |
1322 | ||
1323 | case A_A0: | |
1324 | if (user->type != DSP_REG_N || user->reg != A_A0_NUM) | |
1325 | goto fail; | |
1326 | break; | |
1327 | case A_X0: | |
1328 | if (user->type != DSP_REG_N || user->reg != A_X0_NUM) | |
1329 | goto fail; | |
1330 | break; | |
1331 | case A_X1: | |
1332 | if (user->type != DSP_REG_N || user->reg != A_X1_NUM) | |
1333 | goto fail; | |
1334 | break; | |
1335 | case A_Y0: | |
1336 | if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) | |
1337 | goto fail; | |
1338 | break; | |
1339 | case A_Y1: | |
1340 | if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) | |
1341 | goto fail; | |
1342 | break; | |
1343 | ||
252b5132 RH |
1344 | case F_REG_M: |
1345 | case D_REG_M: | |
1346 | case X_REG_M: | |
1347 | case V_REG_M: | |
1348 | case FPUL_M: | |
1349 | case FPSCR_M: | |
1350 | /* Opcode needs rn */ | |
1351 | if (user->type != arg - F_REG_M + F_REG_N) | |
1352 | goto fail; | |
1353 | reg_m = user->reg; | |
1354 | break; | |
1355 | case DX_REG_M: | |
1356 | if (user->type != D_REG_N && user->type != X_REG_N) | |
1357 | goto fail; | |
1358 | reg_m = user->reg; | |
1359 | break; | |
1360 | case XMTRX_M4: | |
1361 | if (user->type != XMTRX_M4) | |
1362 | goto fail; | |
1363 | reg_m = 4; | |
1364 | break; | |
c4aa876b | 1365 | |
252b5132 RH |
1366 | default: |
1367 | printf (_("unhandled %d\n"), arg); | |
1368 | goto fail; | |
1369 | } | |
1370 | } | |
a37c8f88 JR |
1371 | if ( !(valid_arch & this_try->arch)) |
1372 | goto fail; | |
d4845d57 | 1373 | valid_arch &= this_try->arch; |
252b5132 | 1374 | return this_try; |
c4aa876b NC |
1375 | fail: |
1376 | ; | |
252b5132 RH |
1377 | } |
1378 | ||
1379 | return 0; | |
1380 | } | |
1381 | ||
1382 | int | |
1383 | check (operand, low, high) | |
1384 | expressionS *operand; | |
1385 | int low; | |
1386 | int high; | |
1387 | { | |
1388 | if (operand->X_op != O_constant | |
1389 | || operand->X_add_number < low | |
1390 | || operand->X_add_number > high) | |
1391 | { | |
1392 | as_bad (_("operand must be absolute in range %d..%d"), low, high); | |
1393 | } | |
1394 | return operand->X_add_number; | |
1395 | } | |
1396 | ||
252b5132 | 1397 | static void |
015551fc | 1398 | insert (where, how, pcrel, op) |
252b5132 RH |
1399 | char *where; |
1400 | int how; | |
1401 | int pcrel; | |
015551fc | 1402 | sh_operand_info *op; |
252b5132 RH |
1403 | { |
1404 | fix_new_exp (frag_now, | |
1405 | where - frag_now->fr_literal, | |
1406 | 2, | |
015551fc | 1407 | &op->immediate, |
252b5132 RH |
1408 | pcrel, |
1409 | how); | |
1410 | } | |
1411 | ||
1412 | static void | |
015551fc | 1413 | build_relax (opcode, op) |
252b5132 | 1414 | sh_opcode_info *opcode; |
015551fc | 1415 | sh_operand_info *op; |
252b5132 RH |
1416 | { |
1417 | int high_byte = target_big_endian ? 0 : 1; | |
1418 | char *p; | |
1419 | ||
1420 | if (opcode->arg[0] == A_BDISP8) | |
1421 | { | |
1422 | int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; | |
1423 | p = frag_var (rs_machine_dependent, | |
1424 | md_relax_table[C (what, COND32)].rlx_length, | |
1425 | md_relax_table[C (what, COND8)].rlx_length, | |
1426 | C (what, 0), | |
015551fc JR |
1427 | op->immediate.X_add_symbol, |
1428 | op->immediate.X_add_number, | |
252b5132 RH |
1429 | 0); |
1430 | p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); | |
1431 | } | |
1432 | else if (opcode->arg[0] == A_BDISP12) | |
1433 | { | |
1434 | p = frag_var (rs_machine_dependent, | |
1435 | md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, | |
1436 | md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, | |
1437 | C (UNCOND_JUMP, 0), | |
015551fc JR |
1438 | op->immediate.X_add_symbol, |
1439 | op->immediate.X_add_number, | |
252b5132 RH |
1440 | 0); |
1441 | p[high_byte] = (opcode->nibbles[0] << 4); | |
1442 | } | |
1443 | ||
1444 | } | |
1445 | ||
6b31947e | 1446 | /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */ |
d67b5d6d | 1447 | |
015551fc JR |
1448 | static char * |
1449 | insert_loop_bounds (output, operand) | |
1450 | char *output; | |
1451 | sh_operand_info *operand; | |
1452 | { | |
1453 | char *name; | |
1454 | symbolS *end_sym; | |
1455 | ||
1456 | /* Since the low byte of the opcode will be overwritten by the reloc, we | |
1457 | can just stash the high byte into both bytes and ignore endianness. */ | |
1458 | output[0] = 0x8c; | |
1459 | output[1] = 0x8c; | |
1460 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
1461 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
1462 | ||
1463 | if (sh_relax) | |
1464 | { | |
1465 | static int count = 0; | |
1466 | ||
1467 | /* If the last loop insn is a two-byte-insn, it is in danger of being | |
1468 | swapped with the insn after it. To prevent this, create a new | |
1469 | symbol - complete with SH_LABEL reloc - after the last loop insn. | |
1470 | If the last loop insn is four bytes long, the symbol will be | |
1471 | right in the middle, but four byte insns are not swapped anyways. */ | |
1472 | /* A REPEAT takes 6 bytes. The SH has a 32 bit address space. | |
1473 | Hence a 9 digit number should be enough to count all REPEATs. */ | |
1474 | name = alloca (11); | |
1475 | sprintf (name, "_R%x", count++ & 0x3fffffff); | |
c4aa876b | 1476 | end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag); |
015551fc JR |
1477 | /* Make this a local symbol. */ |
1478 | #ifdef OBJ_COFF | |
1479 | SF_SET_LOCAL (end_sym); | |
1480 | #endif /* OBJ_COFF */ | |
1481 | symbol_table_insert (end_sym); | |
1482 | end_sym->sy_value = operand[1].immediate; | |
1483 | end_sym->sy_value.X_add_number += 2; | |
1484 | fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL); | |
1485 | } | |
1486 | ||
1487 | output = frag_more (2); | |
1488 | output[0] = 0x8e; | |
1489 | output[1] = 0x8e; | |
1490 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
1491 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
1492 | ||
1493 | return frag_more (2); | |
1494 | } | |
1495 | ||
d67b5d6d | 1496 | /* Now we know what sort of opcodes it is, let's build the bytes. */ |
6b31947e | 1497 | |
0d10e182 | 1498 | static unsigned int |
252b5132 RH |
1499 | build_Mytes (opcode, operand) |
1500 | sh_opcode_info *opcode; | |
1501 | sh_operand_info *operand; | |
1502 | ||
1503 | { | |
1504 | int index; | |
1505 | char nbuf[4]; | |
1506 | char *output = frag_more (2); | |
0d10e182 | 1507 | unsigned int size = 2; |
252b5132 RH |
1508 | int low_byte = target_big_endian ? 1 : 0; |
1509 | nbuf[0] = 0; | |
1510 | nbuf[1] = 0; | |
1511 | nbuf[2] = 0; | |
1512 | nbuf[3] = 0; | |
1513 | ||
1514 | for (index = 0; index < 4; index++) | |
1515 | { | |
1516 | sh_nibble_type i = opcode->nibbles[index]; | |
1517 | if (i < 16) | |
1518 | { | |
1519 | nbuf[index] = i; | |
1520 | } | |
1521 | else | |
1522 | { | |
1523 | switch (i) | |
1524 | { | |
1525 | case REG_N: | |
1526 | nbuf[index] = reg_n; | |
1527 | break; | |
1528 | case REG_M: | |
1529 | nbuf[index] = reg_m; | |
1530 | break; | |
d4845d57 JR |
1531 | case SDT_REG_N: |
1532 | if (reg_n < 2 || reg_n > 5) | |
1533 | as_bad (_("Invalid register: 'r%d'"), reg_n); | |
1534 | nbuf[index] = (reg_n & 3) | 4; | |
1535 | break; | |
252b5132 RH |
1536 | case REG_NM: |
1537 | nbuf[index] = reg_n | (reg_m >> 2); | |
1538 | break; | |
c4aa876b | 1539 | case REG_B: |
252b5132 RH |
1540 | nbuf[index] = reg_b | 0x08; |
1541 | break; | |
015551fc JR |
1542 | case IMM0_4BY4: |
1543 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); | |
1544 | break; | |
1545 | case IMM0_4BY2: | |
1546 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand); | |
1547 | break; | |
1548 | case IMM0_4: | |
1549 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand); | |
1550 | break; | |
1551 | case IMM1_4BY4: | |
1552 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1); | |
1553 | break; | |
1554 | case IMM1_4BY2: | |
1555 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1); | |
252b5132 | 1556 | break; |
015551fc JR |
1557 | case IMM1_4: |
1558 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1); | |
252b5132 | 1559 | break; |
015551fc JR |
1560 | case IMM0_8BY4: |
1561 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand); | |
252b5132 | 1562 | break; |
015551fc JR |
1563 | case IMM0_8BY2: |
1564 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand); | |
252b5132 | 1565 | break; |
015551fc JR |
1566 | case IMM0_8: |
1567 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand); | |
252b5132 | 1568 | break; |
015551fc JR |
1569 | case IMM1_8BY4: |
1570 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1); | |
252b5132 | 1571 | break; |
015551fc JR |
1572 | case IMM1_8BY2: |
1573 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1); | |
1574 | break; | |
1575 | case IMM1_8: | |
1576 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1); | |
252b5132 RH |
1577 | break; |
1578 | case PCRELIMM_8BY4: | |
015551fc | 1579 | insert (output, BFD_RELOC_SH_PCRELIMM8BY4, 1, operand); |
252b5132 RH |
1580 | break; |
1581 | case PCRELIMM_8BY2: | |
015551fc JR |
1582 | insert (output, BFD_RELOC_SH_PCRELIMM8BY2, 1, operand); |
1583 | break; | |
1584 | case REPEAT: | |
1585 | output = insert_loop_bounds (output, operand); | |
1586 | nbuf[index] = opcode->nibbles[3]; | |
1587 | operand += 2; | |
252b5132 RH |
1588 | break; |
1589 | default: | |
1590 | printf (_("failed for %d\n"), i); | |
1591 | } | |
1592 | } | |
1593 | } | |
c4aa876b NC |
1594 | if (!target_big_endian) |
1595 | { | |
1596 | output[1] = (nbuf[0] << 4) | (nbuf[1]); | |
1597 | output[0] = (nbuf[2] << 4) | (nbuf[3]); | |
1598 | } | |
1599 | else | |
1600 | { | |
1601 | output[0] = (nbuf[0] << 4) | (nbuf[1]); | |
1602 | output[1] = (nbuf[2] << 4) | (nbuf[3]); | |
1603 | } | |
0d10e182 | 1604 | return size; |
252b5132 RH |
1605 | } |
1606 | ||
d4845d57 JR |
1607 | /* Find an opcode at the start of *STR_P in the hash table, and set |
1608 | *STR_P to the first character after the last one read. */ | |
252b5132 | 1609 | |
d4845d57 JR |
1610 | static sh_opcode_info * |
1611 | find_cooked_opcode (str_p) | |
1612 | char **str_p; | |
252b5132 | 1613 | { |
d4845d57 | 1614 | char *str = *str_p; |
252b5132 RH |
1615 | unsigned char *op_start; |
1616 | unsigned char *op_end; | |
252b5132 RH |
1617 | char name[20]; |
1618 | int nlen = 0; | |
c4aa876b | 1619 | |
6b31947e | 1620 | /* Drop leading whitespace. */ |
252b5132 RH |
1621 | while (*str == ' ') |
1622 | str++; | |
1623 | ||
d4845d57 JR |
1624 | /* Find the op code end. |
1625 | The pre-processor will eliminate whitespace in front of | |
1626 | any '@' after the first argument; we may be called from | |
1627 | assemble_ppi, so the opcode might be terminated by an '@'. */ | |
252b5132 RH |
1628 | for (op_start = op_end = (unsigned char *) (str); |
1629 | *op_end | |
1630 | && nlen < 20 | |
d4845d57 | 1631 | && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; |
252b5132 RH |
1632 | op_end++) |
1633 | { | |
1634 | unsigned char c = op_start[nlen]; | |
1635 | ||
1636 | /* The machine independent code will convert CMP/EQ into cmp/EQ | |
d4845d57 JR |
1637 | because it thinks the '/' is the end of the symbol. Moreover, |
1638 | all but the first sub-insn is a parallel processing insn won't | |
1639 | be capitailzed. Instead of hacking up the machine independent | |
1640 | code, we just deal with it here. */ | |
252b5132 RH |
1641 | c = isupper (c) ? tolower (c) : c; |
1642 | name[nlen] = c; | |
1643 | nlen++; | |
1644 | } | |
c4aa876b | 1645 | |
252b5132 | 1646 | name[nlen] = 0; |
d4845d57 | 1647 | *str_p = op_end; |
252b5132 RH |
1648 | |
1649 | if (nlen == 0) | |
6b31947e | 1650 | as_bad (_("can't find opcode ")); |
252b5132 | 1651 | |
d4845d57 JR |
1652 | return (sh_opcode_info *) hash_find (opcode_hash_control, name); |
1653 | } | |
1654 | ||
1655 | /* Assemble a parallel processing insn. */ | |
1656 | #define DDT_BASE 0xf000 /* Base value for double data transfer insns */ | |
6b31947e | 1657 | |
0d10e182 | 1658 | static unsigned int |
d4845d57 JR |
1659 | assemble_ppi (op_end, opcode) |
1660 | char *op_end; | |
1661 | sh_opcode_info *opcode; | |
1662 | { | |
1663 | int movx = 0; | |
1664 | int movy = 0; | |
1665 | int cond = 0; | |
1666 | int field_b = 0; | |
1667 | char *output; | |
1668 | int move_code; | |
0d10e182 | 1669 | unsigned int size; |
d4845d57 JR |
1670 | |
1671 | /* Some insn ignore one or more register fields, e.g. psts machl,a0. | |
1672 | Make sure we encode a defined insn pattern. */ | |
1673 | reg_x = 0; | |
1674 | reg_y = 0; | |
1675 | ||
1676 | for (;;) | |
1677 | { | |
1678 | sh_operand_info operand[3]; | |
1679 | ||
1680 | if (opcode->arg[0] != A_END) | |
1681 | op_end = get_operands (opcode, op_end, operand); | |
1682 | opcode = get_specific (opcode, operand); | |
1683 | if (opcode == 0) | |
1684 | { | |
6b31947e | 1685 | /* Couldn't find an opcode which matched the operands. */ |
d4845d57 | 1686 | char *where = frag_more (2); |
0d10e182 | 1687 | size = 2; |
d4845d57 JR |
1688 | |
1689 | where[0] = 0x0; | |
1690 | where[1] = 0x0; | |
1691 | as_bad (_("invalid operands for opcode")); | |
0d10e182 | 1692 | return size; |
d4845d57 | 1693 | } |
c4aa876b | 1694 | |
d4845d57 JR |
1695 | if (opcode->nibbles[0] != PPI) |
1696 | as_bad (_("insn can't be combined with parallel processing insn")); | |
1697 | ||
1698 | switch (opcode->nibbles[1]) | |
1699 | { | |
1700 | ||
1701 | case NOPX: | |
1702 | if (movx) | |
1703 | as_bad (_("multiple movx specifications")); | |
1704 | movx = DDT_BASE; | |
1705 | break; | |
1706 | case NOPY: | |
1707 | if (movy) | |
1708 | as_bad (_("multiple movy specifications")); | |
1709 | movy = DDT_BASE; | |
1710 | break; | |
1711 | ||
1712 | case MOVX: | |
1713 | if (movx) | |
1714 | as_bad (_("multiple movx specifications")); | |
1715 | if (reg_n < 4 || reg_n > 5) | |
1716 | as_bad (_("invalid movx address register")); | |
1717 | if (opcode->nibbles[2] & 8) | |
1718 | { | |
1719 | if (reg_m == A_A1_NUM) | |
1720 | movx = 1 << 7; | |
1721 | else if (reg_m != A_A0_NUM) | |
1722 | as_bad (_("invalid movx dsp register")); | |
1723 | } | |
1724 | else | |
1725 | { | |
1726 | if (reg_x > 1) | |
1727 | as_bad (_("invalid movx dsp register")); | |
1728 | movx = reg_x << 7; | |
1729 | } | |
1730 | movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; | |
1731 | break; | |
1732 | ||
1733 | case MOVY: | |
1734 | if (movy) | |
1735 | as_bad (_("multiple movy specifications")); | |
1736 | if (opcode->nibbles[2] & 8) | |
1737 | { | |
1738 | /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, | |
1739 | so add 8 more. */ | |
1740 | movy = 8; | |
1741 | if (reg_m == A_A1_NUM) | |
1742 | movy += 1 << 6; | |
1743 | else if (reg_m != A_A0_NUM) | |
1744 | as_bad (_("invalid movy dsp register")); | |
1745 | } | |
1746 | else | |
1747 | { | |
1748 | if (reg_y > 1) | |
1749 | as_bad (_("invalid movy dsp register")); | |
1750 | movy = reg_y << 6; | |
1751 | } | |
1752 | if (reg_n < 6 || reg_n > 7) | |
1753 | as_bad (_("invalid movy address register")); | |
1754 | movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; | |
1755 | break; | |
1756 | ||
1757 | case PSH: | |
015551fc | 1758 | if (operand[0].immediate.X_op != O_constant) |
d4845d57 JR |
1759 | as_bad (_("dsp immediate shift value not constant")); |
1760 | field_b = ((opcode->nibbles[2] << 12) | |
015551fc | 1761 | | (operand[0].immediate.X_add_number & 127) << 4 |
d4845d57 JR |
1762 | | reg_n); |
1763 | break; | |
1764 | case PPI3: | |
1765 | if (field_b) | |
1766 | as_bad (_("multiple parallel processing specifications")); | |
1767 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
1768 | + (reg_x << 6) + (reg_y << 4) + reg_n); | |
1769 | break; | |
1770 | case PDC: | |
1771 | if (cond) | |
1772 | as_bad (_("multiple condition specifications")); | |
1773 | cond = opcode->nibbles[2] << 8; | |
1774 | if (*op_end) | |
1775 | goto skip_cond_check; | |
1776 | break; | |
1777 | case PPIC: | |
1778 | if (field_b) | |
1779 | as_bad (_("multiple parallel processing specifications")); | |
1780 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
1781 | + cond + (reg_x << 6) + (reg_y << 4) + reg_n); | |
1782 | cond = 0; | |
1783 | break; | |
1784 | case PMUL: | |
1785 | if (field_b) | |
1786 | { | |
1787 | if ((field_b & 0xef00) != 0xa100) | |
1788 | as_bad (_("insn cannot be combined with pmuls")); | |
1789 | field_b -= 0x8100; | |
1790 | switch (field_b & 0xf) | |
1791 | { | |
1792 | case A_X0_NUM: | |
1793 | field_b += 0 - A_X0_NUM; | |
1794 | break; | |
1795 | case A_Y0_NUM: | |
1796 | field_b += 1 - A_Y0_NUM; | |
1797 | break; | |
1798 | case A_A0_NUM: | |
1799 | field_b += 2 - A_A0_NUM; | |
1800 | break; | |
1801 | case A_A1_NUM: | |
1802 | field_b += 3 - A_A1_NUM; | |
1803 | break; | |
1804 | default: | |
1805 | as_bad (_("bad padd / psub pmuls output operand")); | |
1806 | } | |
1807 | } | |
1808 | field_b += 0x4000 + reg_efg; | |
1809 | break; | |
1810 | default: | |
1811 | abort (); | |
1812 | } | |
1813 | if (cond) | |
1814 | { | |
1815 | as_bad (_("condition not followed by conditionalizable insn")); | |
1816 | cond = 0; | |
1817 | } | |
1818 | if (! *op_end) | |
1819 | break; | |
1820 | skip_cond_check: | |
1821 | opcode = find_cooked_opcode (&op_end); | |
1822 | if (opcode == NULL) | |
1823 | { | |
1824 | (as_bad | |
1825 | (_("unrecognized characters at end of parallel processing insn"))); | |
1826 | break; | |
1827 | } | |
1828 | } | |
1829 | ||
1830 | move_code = movx | movy; | |
1831 | if (field_b) | |
1832 | { | |
1833 | /* Parallel processing insn. */ | |
1834 | unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b; | |
1835 | ||
1836 | output = frag_more (4); | |
0d10e182 | 1837 | size = 4; |
d4845d57 JR |
1838 | if (! target_big_endian) |
1839 | { | |
1840 | output[3] = ppi_code >> 8; | |
1841 | output[2] = ppi_code; | |
1842 | } | |
1843 | else | |
1844 | { | |
1845 | output[2] = ppi_code >> 8; | |
1846 | output[3] = ppi_code; | |
1847 | } | |
1848 | move_code |= 0xf800; | |
1849 | } | |
1850 | else | |
0d10e182 JL |
1851 | { |
1852 | /* Just a double data transfer. */ | |
1853 | output = frag_more (2); | |
1854 | size = 2; | |
1855 | } | |
d4845d57 JR |
1856 | if (! target_big_endian) |
1857 | { | |
1858 | output[1] = move_code >> 8; | |
1859 | output[0] = move_code; | |
1860 | } | |
1861 | else | |
1862 | { | |
1863 | output[0] = move_code >> 8; | |
1864 | output[1] = move_code; | |
1865 | } | |
0d10e182 | 1866 | return size; |
d4845d57 JR |
1867 | } |
1868 | ||
1869 | /* This is the guts of the machine-dependent assembler. STR points to a | |
1870 | machine dependent instruction. This function is supposed to emit | |
6b31947e | 1871 | the frags/bytes it assembles to. */ |
d4845d57 JR |
1872 | |
1873 | void | |
1874 | md_assemble (str) | |
1875 | char *str; | |
1876 | { | |
1877 | unsigned char *op_end; | |
1878 | sh_operand_info operand[3]; | |
1879 | sh_opcode_info *opcode; | |
dda5ecfc | 1880 | unsigned int size = 0; |
d4845d57 JR |
1881 | |
1882 | opcode = find_cooked_opcode (&str); | |
1883 | op_end = str; | |
252b5132 RH |
1884 | |
1885 | if (opcode == NULL) | |
1886 | { | |
1887 | as_bad (_("unknown opcode")); | |
1888 | return; | |
1889 | } | |
1890 | ||
1891 | if (sh_relax | |
1892 | && ! seg_info (now_seg)->tc_segment_info_data.in_code) | |
1893 | { | |
1894 | /* Output a CODE reloc to tell the linker that the following | |
1895 | bytes are instructions, not data. */ | |
1896 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
1897 | BFD_RELOC_SH_CODE); | |
1898 | seg_info (now_seg)->tc_segment_info_data.in_code = 1; | |
1899 | } | |
1900 | ||
d4845d57 JR |
1901 | if (opcode->nibbles[0] == PPI) |
1902 | { | |
0d10e182 | 1903 | size = assemble_ppi (op_end, opcode); |
252b5132 RH |
1904 | } |
1905 | else | |
1906 | { | |
0d10e182 JL |
1907 | if (opcode->arg[0] == A_BDISP12 |
1908 | || opcode->arg[0] == A_BDISP8) | |
252b5132 | 1909 | { |
0d10e182 JL |
1910 | parse_exp (op_end + 1, &operand[0]); |
1911 | build_relax (opcode, &operand[0]); | |
5fc44b2d JR |
1912 | } |
1913 | else | |
1914 | { | |
0d10e182 JL |
1915 | if (opcode->arg[0] == A_END) |
1916 | { | |
1917 | /* Ignore trailing whitespace. If there is any, it has already | |
1918 | been compressed to a single space. */ | |
1919 | if (*op_end == ' ') | |
1920 | op_end++; | |
1921 | } | |
1922 | else | |
1923 | { | |
1924 | op_end = get_operands (opcode, op_end, operand); | |
1925 | } | |
1926 | opcode = get_specific (opcode, operand); | |
252b5132 | 1927 | |
0d10e182 JL |
1928 | if (opcode == 0) |
1929 | { | |
1930 | /* Couldn't find an opcode which matched the operands. */ | |
1931 | char *where = frag_more (2); | |
1932 | size = 2; | |
252b5132 | 1933 | |
0d10e182 JL |
1934 | where[0] = 0x0; |
1935 | where[1] = 0x0; | |
1936 | as_bad (_("invalid operands for opcode")); | |
1937 | } | |
1938 | else | |
1939 | { | |
1940 | if (*op_end) | |
1941 | as_bad (_("excess operands: '%s'"), op_end); | |
1942 | ||
1943 | size = build_Mytes (opcode, operand); | |
1944 | } | |
252b5132 | 1945 | } |
0d10e182 | 1946 | } |
252b5132 | 1947 | |
4dc7ead9 | 1948 | dwarf2_emit_insn (size); |
252b5132 RH |
1949 | } |
1950 | ||
1951 | /* This routine is called each time a label definition is seen. It | |
1952 | emits a BFD_RELOC_SH_LABEL reloc if necessary. */ | |
1953 | ||
1954 | void | |
1955 | sh_frob_label () | |
1956 | { | |
1957 | static fragS *last_label_frag; | |
1958 | static int last_label_offset; | |
1959 | ||
1960 | if (sh_relax | |
1961 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
1962 | { | |
1963 | int offset; | |
1964 | ||
1965 | offset = frag_now_fix (); | |
1966 | if (frag_now != last_label_frag | |
1967 | || offset != last_label_offset) | |
c4aa876b | 1968 | { |
252b5132 RH |
1969 | fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); |
1970 | last_label_frag = frag_now; | |
1971 | last_label_offset = offset; | |
1972 | } | |
1973 | } | |
1974 | } | |
1975 | ||
1976 | /* This routine is called when the assembler is about to output some | |
1977 | data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ | |
1978 | ||
1979 | void | |
1980 | sh_flush_pending_output () | |
1981 | { | |
1982 | if (sh_relax | |
1983 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
1984 | { | |
1985 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
1986 | BFD_RELOC_SH_DATA); | |
1987 | seg_info (now_seg)->tc_segment_info_data.in_code = 0; | |
1988 | } | |
1989 | } | |
1990 | ||
1991 | symbolS * | |
c0fecd35 AM |
1992 | md_undefined_symbol (name) |
1993 | char *name; | |
252b5132 | 1994 | { |
a1cc9221 AO |
1995 | #ifdef OBJ_ELF |
1996 | /* Under ELF we need to default _GLOBAL_OFFSET_TABLE. Otherwise we | |
1997 | have no need to default values of symbols. */ | |
1998 | if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) | |
1999 | { | |
2000 | if (!GOT_symbol) | |
2001 | { | |
2002 | if (symbol_find (name)) | |
2003 | as_bad ("GOT already in the symbol table"); | |
81d4177b | 2004 | |
a1cc9221 AO |
2005 | GOT_symbol = symbol_new (name, undefined_section, |
2006 | (valueT)0, & zero_address_frag); | |
2007 | } | |
81d4177b | 2008 | |
a1cc9221 AO |
2009 | return GOT_symbol; |
2010 | } | |
2011 | #endif /* OBJ_ELF */ | |
81d4177b | 2012 | |
252b5132 RH |
2013 | return 0; |
2014 | } | |
2015 | ||
2016 | #ifdef OBJ_COFF | |
056350c6 | 2017 | #ifndef BFD_ASSEMBLER |
252b5132 RH |
2018 | |
2019 | void | |
c0fecd35 AM |
2020 | tc_crawl_symbol_chain (headers) |
2021 | object_headers *headers; | |
252b5132 RH |
2022 | { |
2023 | printf (_("call to tc_crawl_symbol_chain \n")); | |
2024 | } | |
2025 | ||
2026 | void | |
c0fecd35 AM |
2027 | tc_headers_hook (headers) |
2028 | object_headers *headers; | |
252b5132 RH |
2029 | { |
2030 | printf (_("call to tc_headers_hook \n")); | |
2031 | } | |
2032 | ||
056350c6 | 2033 | #endif |
252b5132 RH |
2034 | #endif |
2035 | ||
6b31947e NC |
2036 | /* Various routines to kill one day. */ |
2037 | /* Equal to MAX_PRECISION in atof-ieee.c. */ | |
252b5132 RH |
2038 | #define MAX_LITTLENUMS 6 |
2039 | ||
6b31947e NC |
2040 | /* Turn a string in input_line_pointer into a floating point constant |
2041 | of type TYPE, and store the appropriate bytes in *LITP. The number | |
2042 | of LITTLENUMS emitted is stored in *SIZEP . An error message is | |
2043 | returned, or NULL on OK. */ | |
2044 | ||
252b5132 RH |
2045 | char * |
2046 | md_atof (type, litP, sizeP) | |
2047 | int type; | |
2048 | char *litP; | |
2049 | int *sizeP; | |
2050 | { | |
2051 | int prec; | |
2052 | LITTLENUM_TYPE words[4]; | |
2053 | char *t; | |
2054 | int i; | |
2055 | ||
2056 | switch (type) | |
2057 | { | |
2058 | case 'f': | |
2059 | prec = 2; | |
2060 | break; | |
2061 | ||
2062 | case 'd': | |
2063 | prec = 4; | |
2064 | break; | |
2065 | ||
2066 | default: | |
2067 | *sizeP = 0; | |
2068 | return _("bad call to md_atof"); | |
2069 | } | |
2070 | ||
2071 | t = atof_ieee (input_line_pointer, type, words); | |
2072 | if (t) | |
2073 | input_line_pointer = t; | |
2074 | ||
2075 | *sizeP = prec * 2; | |
2076 | ||
2077 | if (! target_big_endian) | |
2078 | { | |
2079 | for (i = prec - 1; i >= 0; i--) | |
2080 | { | |
2081 | md_number_to_chars (litP, (valueT) words[i], 2); | |
2082 | litP += 2; | |
2083 | } | |
2084 | } | |
2085 | else | |
2086 | { | |
2087 | for (i = 0; i < prec; i++) | |
2088 | { | |
2089 | md_number_to_chars (litP, (valueT) words[i], 2); | |
2090 | litP += 2; | |
2091 | } | |
2092 | } | |
c4aa876b | 2093 | |
252b5132 RH |
2094 | return NULL; |
2095 | } | |
2096 | ||
2097 | /* Handle the .uses pseudo-op. This pseudo-op is used just before a | |
2098 | call instruction. It refers to a label of the instruction which | |
2099 | loads the register which the call uses. We use it to generate a | |
2100 | special reloc for the linker. */ | |
2101 | ||
2102 | static void | |
2103 | s_uses (ignore) | |
43841e91 | 2104 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
2105 | { |
2106 | expressionS ex; | |
2107 | ||
2108 | if (! sh_relax) | |
2109 | as_warn (_(".uses pseudo-op seen when not relaxing")); | |
2110 | ||
2111 | expression (&ex); | |
2112 | ||
2113 | if (ex.X_op != O_symbol || ex.X_add_number != 0) | |
2114 | { | |
2115 | as_bad (_("bad .uses format")); | |
2116 | ignore_rest_of_line (); | |
2117 | return; | |
2118 | } | |
2119 | ||
2120 | fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); | |
2121 | ||
2122 | demand_empty_rest_of_line (); | |
2123 | } | |
2124 | \f | |
2125 | CONST char *md_shortopts = ""; | |
6b31947e NC |
2126 | struct option md_longopts[] = |
2127 | { | |
252b5132 RH |
2128 | #define OPTION_RELAX (OPTION_MD_BASE) |
2129 | #define OPTION_LITTLE (OPTION_MD_BASE + 1) | |
2130 | #define OPTION_SMALL (OPTION_LITTLE + 1) | |
d4845d57 | 2131 | #define OPTION_DSP (OPTION_SMALL + 1) |
252b5132 RH |
2132 | |
2133 | {"relax", no_argument, NULL, OPTION_RELAX}, | |
2134 | {"little", no_argument, NULL, OPTION_LITTLE}, | |
2135 | {"small", no_argument, NULL, OPTION_SMALL}, | |
d4845d57 | 2136 | {"dsp", no_argument, NULL, OPTION_DSP}, |
252b5132 RH |
2137 | {NULL, no_argument, NULL, 0} |
2138 | }; | |
c4aa876b | 2139 | size_t md_longopts_size = sizeof (md_longopts); |
252b5132 RH |
2140 | |
2141 | int | |
2142 | md_parse_option (c, arg) | |
2143 | int c; | |
43841e91 | 2144 | char *arg ATTRIBUTE_UNUSED; |
252b5132 RH |
2145 | { |
2146 | switch (c) | |
2147 | { | |
2148 | case OPTION_RELAX: | |
2149 | sh_relax = 1; | |
2150 | break; | |
2151 | ||
2152 | case OPTION_LITTLE: | |
2153 | shl = 1; | |
2154 | target_big_endian = 0; | |
2155 | break; | |
2156 | ||
2157 | case OPTION_SMALL: | |
2158 | sh_small = 1; | |
2159 | break; | |
2160 | ||
d4845d57 JR |
2161 | case OPTION_DSP: |
2162 | sh_dsp = 1; | |
2163 | break; | |
2164 | ||
252b5132 RH |
2165 | default: |
2166 | return 0; | |
2167 | } | |
2168 | ||
2169 | return 1; | |
2170 | } | |
2171 | ||
2172 | void | |
2173 | md_show_usage (stream) | |
2174 | FILE *stream; | |
2175 | { | |
c4aa876b | 2176 | fprintf (stream, _("\ |
252b5132 RH |
2177 | SH options:\n\ |
2178 | -little generate little endian code\n\ | |
2179 | -relax alter jump instructions for long displacements\n\ | |
5b8274e3 | 2180 | -small align sections to 4 byte boundaries, not 16\n\ |
182e89d3 | 2181 | -dsp enable sh-dsp insns, and disable sh3e / sh4 insns.\n")); |
252b5132 RH |
2182 | } |
2183 | \f | |
2184 | void | |
2185 | tc_Nout_fix_to_chars () | |
2186 | { | |
2187 | printf (_("call to tc_Nout_fix_to_chars \n")); | |
2188 | abort (); | |
2189 | } | |
2190 | ||
2191 | /* This struct is used to pass arguments to sh_count_relocs through | |
2192 | bfd_map_over_sections. */ | |
2193 | ||
2194 | struct sh_count_relocs | |
2195 | { | |
2196 | /* Symbol we are looking for. */ | |
2197 | symbolS *sym; | |
2198 | /* Count of relocs found. */ | |
2199 | int count; | |
2200 | }; | |
2201 | ||
2202 | /* Count the number of fixups in a section which refer to a particular | |
2203 | symbol. When using BFD_ASSEMBLER, this is called via | |
2204 | bfd_map_over_sections. */ | |
2205 | ||
252b5132 RH |
2206 | static void |
2207 | sh_count_relocs (abfd, sec, data) | |
43841e91 | 2208 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 RH |
2209 | segT sec; |
2210 | PTR data; | |
2211 | { | |
2212 | struct sh_count_relocs *info = (struct sh_count_relocs *) data; | |
2213 | segment_info_type *seginfo; | |
2214 | symbolS *sym; | |
2215 | fixS *fix; | |
2216 | ||
2217 | seginfo = seg_info (sec); | |
2218 | if (seginfo == NULL) | |
2219 | return; | |
2220 | ||
2221 | sym = info->sym; | |
2222 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
2223 | { | |
2224 | if (fix->fx_addsy == sym) | |
2225 | { | |
2226 | ++info->count; | |
2227 | fix->fx_tcbit = 1; | |
2228 | } | |
2229 | } | |
2230 | } | |
2231 | ||
2232 | /* Handle the count relocs for a particular section. When using | |
2233 | BFD_ASSEMBLER, this is called via bfd_map_over_sections. */ | |
2234 | ||
252b5132 RH |
2235 | static void |
2236 | sh_frob_section (abfd, sec, ignore) | |
43841e91 | 2237 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 | 2238 | segT sec; |
43841e91 | 2239 | PTR ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
2240 | { |
2241 | segment_info_type *seginfo; | |
2242 | fixS *fix; | |
2243 | ||
2244 | seginfo = seg_info (sec); | |
2245 | if (seginfo == NULL) | |
2246 | return; | |
2247 | ||
2248 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
2249 | { | |
2250 | symbolS *sym; | |
2251 | bfd_vma val; | |
2252 | fixS *fscan; | |
2253 | struct sh_count_relocs info; | |
2254 | ||
2255 | if (fix->fx_r_type != BFD_RELOC_SH_USES) | |
2256 | continue; | |
2257 | ||
2258 | /* The BFD_RELOC_SH_USES reloc should refer to a defined local | |
2259 | symbol in the same section. */ | |
2260 | sym = fix->fx_addsy; | |
2261 | if (sym == NULL | |
2262 | || fix->fx_subsy != NULL | |
2263 | || fix->fx_addnumber != 0 | |
2264 | || S_GET_SEGMENT (sym) != sec | |
2265 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) | |
2266 | || S_GET_STORAGE_CLASS (sym) == C_EXT | |
2267 | #endif | |
2268 | || S_IS_EXTERNAL (sym)) | |
2269 | { | |
2270 | as_warn_where (fix->fx_file, fix->fx_line, | |
2271 | _(".uses does not refer to a local symbol in the same section")); | |
2272 | continue; | |
2273 | } | |
2274 | ||
2275 | /* Look through the fixups again, this time looking for one | |
2276 | at the same location as sym. */ | |
2277 | val = S_GET_VALUE (sym); | |
2278 | for (fscan = seginfo->fix_root; | |
2279 | fscan != NULL; | |
2280 | fscan = fscan->fx_next) | |
2281 | if (val == fscan->fx_frag->fr_address + fscan->fx_where | |
2282 | && fscan->fx_r_type != BFD_RELOC_SH_ALIGN | |
2283 | && fscan->fx_r_type != BFD_RELOC_SH_CODE | |
2284 | && fscan->fx_r_type != BFD_RELOC_SH_DATA | |
2285 | && fscan->fx_r_type != BFD_RELOC_SH_LABEL) | |
2286 | break; | |
2287 | if (fscan == NULL) | |
2288 | { | |
2289 | as_warn_where (fix->fx_file, fix->fx_line, | |
2290 | _("can't find fixup pointed to by .uses")); | |
2291 | continue; | |
2292 | } | |
2293 | ||
2294 | if (fscan->fx_tcbit) | |
2295 | { | |
2296 | /* We've already done this one. */ | |
2297 | continue; | |
2298 | } | |
2299 | ||
6b31947e NC |
2300 | /* The variable fscan should also be a fixup to a local symbol |
2301 | in the same section. */ | |
252b5132 RH |
2302 | sym = fscan->fx_addsy; |
2303 | if (sym == NULL | |
2304 | || fscan->fx_subsy != NULL | |
2305 | || fscan->fx_addnumber != 0 | |
2306 | || S_GET_SEGMENT (sym) != sec | |
2307 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) | |
2308 | || S_GET_STORAGE_CLASS (sym) == C_EXT | |
2309 | #endif | |
2310 | || S_IS_EXTERNAL (sym)) | |
2311 | { | |
2312 | as_warn_where (fix->fx_file, fix->fx_line, | |
2313 | _(".uses target does not refer to a local symbol in the same section")); | |
2314 | continue; | |
2315 | } | |
2316 | ||
2317 | /* Now we look through all the fixups of all the sections, | |
2318 | counting the number of times we find a reference to sym. */ | |
2319 | info.sym = sym; | |
2320 | info.count = 0; | |
2321 | #ifdef BFD_ASSEMBLER | |
2322 | bfd_map_over_sections (stdoutput, sh_count_relocs, (PTR) &info); | |
2323 | #else | |
2324 | { | |
2325 | int iscan; | |
2326 | ||
2327 | for (iscan = SEG_E0; iscan < SEG_UNKNOWN; iscan++) | |
2328 | sh_count_relocs ((bfd *) NULL, iscan, (PTR) &info); | |
2329 | } | |
2330 | #endif | |
2331 | ||
2332 | if (info.count < 1) | |
2333 | abort (); | |
2334 | ||
2335 | /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. | |
2336 | We have already adjusted the value of sym to include the | |
2337 | fragment address, so we undo that adjustment here. */ | |
2338 | subseg_change (sec, 0); | |
49309057 ILT |
2339 | fix_new (symbol_get_frag (sym), |
2340 | S_GET_VALUE (sym) - symbol_get_frag (sym)->fr_address, | |
252b5132 RH |
2341 | 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); |
2342 | } | |
2343 | } | |
2344 | ||
2345 | /* This function is called after the symbol table has been completed, | |
2346 | but before the relocs or section contents have been written out. | |
2347 | If we have seen any .uses pseudo-ops, they point to an instruction | |
2348 | which loads a register with the address of a function. We look | |
2349 | through the fixups to find where the function address is being | |
2350 | loaded from. We then generate a COUNT reloc giving the number of | |
2351 | times that function address is referred to. The linker uses this | |
2352 | information when doing relaxing, to decide when it can eliminate | |
2353 | the stored function address entirely. */ | |
2354 | ||
2355 | void | |
2356 | sh_frob_file () | |
2357 | { | |
2358 | if (! sh_relax) | |
2359 | return; | |
2360 | ||
2361 | #ifdef BFD_ASSEMBLER | |
2362 | bfd_map_over_sections (stdoutput, sh_frob_section, (PTR) NULL); | |
2363 | #else | |
2364 | { | |
2365 | int iseg; | |
2366 | ||
2367 | for (iseg = SEG_E0; iseg < SEG_UNKNOWN; iseg++) | |
2368 | sh_frob_section ((bfd *) NULL, iseg, (PTR) NULL); | |
2369 | } | |
2370 | #endif | |
2371 | } | |
2372 | ||
2373 | /* Called after relaxing. Set the correct sizes of the fragments, and | |
2374 | create relocs so that md_apply_fix will fill in the correct values. */ | |
2375 | ||
2376 | void | |
2377 | md_convert_frag (headers, seg, fragP) | |
2378 | #ifdef BFD_ASSEMBLER | |
43841e91 | 2379 | bfd *headers ATTRIBUTE_UNUSED; |
252b5132 RH |
2380 | #else |
2381 | object_headers *headers; | |
2382 | #endif | |
2383 | segT seg; | |
2384 | fragS *fragP; | |
2385 | { | |
2386 | int donerelax = 0; | |
2387 | ||
2388 | switch (fragP->fr_subtype) | |
2389 | { | |
2390 | case C (COND_JUMP, COND8): | |
2391 | case C (COND_JUMP_DELAY, COND8): | |
2392 | subseg_change (seg, 0); | |
2393 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
2394 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
2395 | fragP->fr_fix += 2; | |
2396 | fragP->fr_var = 0; | |
2397 | break; | |
2398 | ||
2399 | case C (UNCOND_JUMP, UNCOND12): | |
2400 | subseg_change (seg, 0); | |
2401 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
2402 | 1, BFD_RELOC_SH_PCDISP12BY2); | |
2403 | fragP->fr_fix += 2; | |
2404 | fragP->fr_var = 0; | |
2405 | break; | |
2406 | ||
2407 | case C (UNCOND_JUMP, UNCOND32): | |
2408 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): | |
2409 | if (fragP->fr_symbol == NULL) | |
99b222b4 HPN |
2410 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2411 | _("displacement overflows 12-bit field")); | |
252b5132 | 2412 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
99b222b4 HPN |
2413 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2414 | _("displacement to defined symbol %s overflows 12-bit field"), | |
2415 | S_GET_NAME (fragP->fr_symbol)); | |
252b5132 | 2416 | else |
99b222b4 HPN |
2417 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2418 | _("displacement to undefined symbol %s overflows 12-bit field"), | |
2419 | S_GET_NAME (fragP->fr_symbol)); | |
2420 | /* Stabilize this frag, so we don't trip an assert. */ | |
2421 | fragP->fr_fix += fragP->fr_var; | |
2422 | fragP->fr_var = 0; | |
252b5132 RH |
2423 | break; |
2424 | ||
2425 | case C (COND_JUMP, COND12): | |
2426 | case C (COND_JUMP_DELAY, COND12): | |
6b31947e | 2427 | /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */ |
252b5132 RH |
2428 | /* I found that a relax failure for gcc.c-torture/execute/930628-1.c |
2429 | was due to gas incorrectly relaxing an out-of-range conditional | |
2430 | branch with delay slot. It turned: | |
2431 | bf.s L6 (slot mov.l r12,@(44,r0)) | |
2432 | into: | |
c4aa876b | 2433 | |
252b5132 RH |
2434 | 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) |
2435 | 30: 00 09 nop | |
2436 | 32: 10 cb mov.l r12,@(44,r0) | |
2437 | Therefore, branches with delay slots have to be handled | |
2438 | differently from ones without delay slots. */ | |
2439 | { | |
2440 | unsigned char *buffer = | |
2441 | (unsigned char *) (fragP->fr_fix + fragP->fr_literal); | |
2442 | int highbyte = target_big_endian ? 0 : 1; | |
2443 | int lowbyte = target_big_endian ? 1 : 0; | |
2444 | int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); | |
2445 | ||
2446 | /* Toggle the true/false bit of the bcond. */ | |
2447 | buffer[highbyte] ^= 0x2; | |
2448 | ||
2449 | /* If this is a dalayed branch, we may not put the the bra in the | |
2450 | slot. So we change it to a non-delayed branch, like that: | |
2451 | b! cond slot_label; bra disp; slot_label: slot_insn | |
2452 | ??? We should try if swapping the conditional branch and | |
2453 | its delay-slot insn already makes the branch reach. */ | |
2454 | ||
2455 | /* Build a relocation to six / four bytes farther on. */ | |
2456 | subseg_change (seg, 0); | |
2457 | fix_new (fragP, fragP->fr_fix, 2, | |
2458 | #ifdef BFD_ASSEMBLER | |
2459 | section_symbol (seg), | |
2460 | #else | |
2461 | seg_info (seg)->dot, | |
2462 | #endif | |
2463 | fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), | |
2464 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
2465 | ||
2466 | /* Set up a jump instruction. */ | |
2467 | buffer[highbyte + 2] = 0xa0; | |
2468 | buffer[lowbyte + 2] = 0; | |
2469 | fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, | |
2470 | fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); | |
2471 | ||
2472 | if (delay) | |
2473 | { | |
2474 | buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ | |
2475 | fragP->fr_fix += 4; | |
2476 | } | |
2477 | else | |
2478 | { | |
2479 | /* Fill in a NOP instruction. */ | |
2480 | buffer[highbyte + 4] = 0x0; | |
2481 | buffer[lowbyte + 4] = 0x9; | |
2482 | ||
2483 | fragP->fr_fix += 6; | |
2484 | } | |
2485 | fragP->fr_var = 0; | |
2486 | donerelax = 1; | |
2487 | } | |
2488 | break; | |
2489 | ||
2490 | case C (COND_JUMP, COND32): | |
2491 | case C (COND_JUMP_DELAY, COND32): | |
2492 | case C (COND_JUMP, UNDEF_WORD_DISP): | |
2493 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): | |
2494 | if (fragP->fr_symbol == NULL) | |
99b222b4 HPN |
2495 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2496 | _("displacement overflows 8-bit field")); | |
252b5132 | 2497 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
99b222b4 HPN |
2498 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2499 | _("displacement to defined symbol %s overflows 8-bit field"), | |
2500 | S_GET_NAME (fragP->fr_symbol)); | |
252b5132 | 2501 | else |
99b222b4 HPN |
2502 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2503 | _("displacement to undefined symbol %s overflows 8-bit field "), | |
2504 | S_GET_NAME (fragP->fr_symbol)); | |
2505 | /* Stabilize this frag, so we don't trip an assert. */ | |
2506 | fragP->fr_fix += fragP->fr_var; | |
2507 | fragP->fr_var = 0; | |
252b5132 RH |
2508 | break; |
2509 | ||
2510 | default: | |
2511 | abort (); | |
2512 | } | |
2513 | ||
2514 | if (donerelax && !sh_relax) | |
2515 | as_warn_where (fragP->fr_file, fragP->fr_line, | |
2516 | _("overflow in branch to %s; converted into longer instruction sequence"), | |
2517 | (fragP->fr_symbol != NULL | |
2518 | ? S_GET_NAME (fragP->fr_symbol) | |
2519 | : "")); | |
2520 | } | |
2521 | ||
2522 | valueT | |
c0fecd35 | 2523 | md_section_align (seg, size) |
dda5ecfc | 2524 | segT seg ATTRIBUTE_UNUSED; |
c0fecd35 | 2525 | valueT size; |
252b5132 RH |
2526 | { |
2527 | #ifdef BFD_ASSEMBLER | |
2528 | #ifdef OBJ_ELF | |
2529 | return size; | |
2530 | #else /* ! OBJ_ELF */ | |
2531 | return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1) | |
2532 | & (-1 << bfd_get_section_alignment (stdoutput, seg))); | |
2533 | #endif /* ! OBJ_ELF */ | |
2534 | #else /* ! BFD_ASSEMBLER */ | |
2535 | return ((size + (1 << section_alignment[(int) seg]) - 1) | |
2536 | & (-1 << section_alignment[(int) seg])); | |
2537 | #endif /* ! BFD_ASSEMBLER */ | |
2538 | } | |
2539 | ||
2540 | /* This static variable is set by s_uacons to tell sh_cons_align that | |
2541 | the expession does not need to be aligned. */ | |
2542 | ||
2543 | static int sh_no_align_cons = 0; | |
2544 | ||
2545 | /* This handles the unaligned space allocation pseudo-ops, such as | |
2546 | .uaword. .uaword is just like .word, but the value does not need | |
2547 | to be aligned. */ | |
2548 | ||
2549 | static void | |
2550 | s_uacons (bytes) | |
2551 | int bytes; | |
2552 | { | |
2553 | /* Tell sh_cons_align not to align this value. */ | |
2554 | sh_no_align_cons = 1; | |
2555 | cons (bytes); | |
2556 | } | |
2557 | ||
2558 | /* If a .word, et. al., pseud-op is seen, warn if the value is not | |
2559 | aligned correctly. Note that this can cause warnings to be issued | |
2560 | when assembling initialized structured which were declared with the | |
2561 | packed attribute. FIXME: Perhaps we should require an option to | |
2562 | enable this warning? */ | |
2563 | ||
2564 | void | |
2565 | sh_cons_align (nbytes) | |
2566 | int nbytes; | |
2567 | { | |
2568 | int nalign; | |
2569 | char *p; | |
2570 | ||
2571 | if (sh_no_align_cons) | |
2572 | { | |
2573 | /* This is an unaligned pseudo-op. */ | |
2574 | sh_no_align_cons = 0; | |
2575 | return; | |
2576 | } | |
2577 | ||
2578 | nalign = 0; | |
2579 | while ((nbytes & 1) == 0) | |
2580 | { | |
2581 | ++nalign; | |
2582 | nbytes >>= 1; | |
2583 | } | |
2584 | ||
2585 | if (nalign == 0) | |
2586 | return; | |
2587 | ||
2588 | if (now_seg == absolute_section) | |
2589 | { | |
2590 | if ((abs_section_offset & ((1 << nalign) - 1)) != 0) | |
2591 | as_warn (_("misaligned data")); | |
2592 | return; | |
2593 | } | |
2594 | ||
0a9ef439 | 2595 | p = frag_var (rs_align_test, 1, 1, (relax_substateT) 0, |
252b5132 RH |
2596 | (symbolS *) NULL, (offsetT) nalign, (char *) NULL); |
2597 | ||
2598 | record_alignment (now_seg, nalign); | |
2599 | } | |
2600 | ||
2601 | /* When relaxing, we need to output a reloc for any .align directive | |
2602 | that requests alignment to a four byte boundary or larger. This is | |
2603 | also where we check for misaligned data. */ | |
2604 | ||
2605 | void | |
2606 | sh_handle_align (frag) | |
2607 | fragS *frag; | |
2608 | { | |
0a9ef439 RH |
2609 | int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix; |
2610 | ||
2611 | if (frag->fr_type == rs_align_code) | |
2612 | { | |
2613 | static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; | |
2614 | static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; | |
2615 | ||
2616 | char *p = frag->fr_literal + frag->fr_fix; | |
2617 | ||
2618 | if (bytes & 1) | |
2619 | { | |
2620 | *p++ = 0; | |
2621 | bytes--; | |
2622 | frag->fr_fix += 1; | |
2623 | } | |
2624 | ||
2625 | if (target_big_endian) | |
2626 | { | |
2627 | memcpy (p, big_nop_pattern, sizeof big_nop_pattern); | |
2628 | frag->fr_var = sizeof big_nop_pattern; | |
2629 | } | |
2630 | else | |
2631 | { | |
2632 | memcpy (p, little_nop_pattern, sizeof little_nop_pattern); | |
2633 | frag->fr_var = sizeof little_nop_pattern; | |
2634 | } | |
2635 | } | |
2636 | else if (frag->fr_type == rs_align_test) | |
2637 | { | |
2638 | if (bytes != 0) | |
2639 | as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data")); | |
2640 | } | |
2641 | ||
252b5132 | 2642 | if (sh_relax |
0a9ef439 RH |
2643 | && (frag->fr_type == rs_align |
2644 | || frag->fr_type == rs_align_code) | |
252b5132 RH |
2645 | && frag->fr_address + frag->fr_fix > 0 |
2646 | && frag->fr_offset > 1 | |
2647 | && now_seg != bss_section) | |
2648 | fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, | |
2649 | BFD_RELOC_SH_ALIGN); | |
252b5132 RH |
2650 | } |
2651 | ||
2652 | /* This macro decides whether a particular reloc is an entry in a | |
2653 | switch table. It is used when relaxing, because the linker needs | |
2654 | to know about all such entries so that it can adjust them if | |
2655 | necessary. */ | |
2656 | ||
2657 | #ifdef BFD_ASSEMBLER | |
2658 | #define SWITCH_TABLE_CONS(fix) (0) | |
2659 | #else | |
2660 | #define SWITCH_TABLE_CONS(fix) \ | |
2661 | ((fix)->fx_r_type == 0 \ | |
2662 | && ((fix)->fx_size == 2 \ | |
2663 | || (fix)->fx_size == 1 \ | |
2664 | || (fix)->fx_size == 4)) | |
2665 | #endif | |
2666 | ||
2667 | #define SWITCH_TABLE(fix) \ | |
2668 | ((fix)->fx_addsy != NULL \ | |
2669 | && (fix)->fx_subsy != NULL \ | |
2670 | && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \ | |
2671 | && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \ | |
2672 | && ((fix)->fx_r_type == BFD_RELOC_32 \ | |
2673 | || (fix)->fx_r_type == BFD_RELOC_16 \ | |
2674 | || (fix)->fx_r_type == BFD_RELOC_8 \ | |
2675 | || SWITCH_TABLE_CONS (fix))) | |
2676 | ||
2677 | /* See whether we need to force a relocation into the output file. | |
2678 | This is used to force out switch and PC relative relocations when | |
2679 | relaxing. */ | |
2680 | ||
2681 | int | |
2682 | sh_force_relocation (fix) | |
2683 | fixS *fix; | |
2684 | { | |
2685 | ||
2686 | if (fix->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
015551fc JR |
2687 | || fix->fx_r_type == BFD_RELOC_VTABLE_ENTRY |
2688 | || fix->fx_r_type == BFD_RELOC_SH_LOOP_START | |
2689 | || fix->fx_r_type == BFD_RELOC_SH_LOOP_END) | |
252b5132 RH |
2690 | return 1; |
2691 | ||
2692 | if (! sh_relax) | |
2693 | return 0; | |
2694 | ||
2695 | return (fix->fx_pcrel | |
2696 | || SWITCH_TABLE (fix) | |
2697 | || fix->fx_r_type == BFD_RELOC_SH_COUNT | |
2698 | || fix->fx_r_type == BFD_RELOC_SH_ALIGN | |
2699 | || fix->fx_r_type == BFD_RELOC_SH_CODE | |
2700 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
2701 | || fix->fx_r_type == BFD_RELOC_SH_LABEL); | |
2702 | } | |
2703 | ||
2704 | #ifdef OBJ_ELF | |
2705 | boolean | |
2706 | sh_fix_adjustable (fixP) | |
2707 | fixS *fixP; | |
2708 | { | |
2709 | ||
2710 | if (fixP->fx_addsy == NULL) | |
2711 | return 1; | |
c4aa876b | 2712 | |
a1cc9221 AO |
2713 | if (fixP->fx_r_type == BFD_RELOC_SH_PCDISP8BY2 |
2714 | || fixP->fx_r_type == BFD_RELOC_SH_PCDISP12BY2 | |
2715 | || fixP->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2 | |
2716 | || fixP->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4 | |
2717 | || fixP->fx_r_type == BFD_RELOC_8_PCREL | |
2718 | || fixP->fx_r_type == BFD_RELOC_SH_SWITCH16 | |
2719 | || fixP->fx_r_type == BFD_RELOC_SH_SWITCH32) | |
2720 | return 1; | |
2721 | ||
2722 | if (! TC_RELOC_RTSYM_LOC_FIXUP (fixP) | |
2723 | || fixP->fx_r_type == BFD_RELOC_32_GOTOFF | |
2724 | || fixP->fx_r_type == BFD_RELOC_RVA) | |
2725 | return 0; | |
2726 | ||
252b5132 RH |
2727 | /* We need the symbol name for the VTABLE entries */ |
2728 | if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
2729 | || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
2730 | return 0; | |
2731 | ||
2732 | return 1; | |
2733 | } | |
d4845d57 | 2734 | |
6b31947e NC |
2735 | void |
2736 | sh_elf_final_processing () | |
d4845d57 JR |
2737 | { |
2738 | int val; | |
2739 | ||
2740 | /* Set file-specific flags to indicate if this code needs | |
2741 | a processor with the sh-dsp / sh3e ISA to execute. */ | |
2742 | if (valid_arch & arch_sh1) | |
2743 | val = EF_SH1; | |
2744 | else if (valid_arch & arch_sh2) | |
2745 | val = EF_SH2; | |
2746 | else if (valid_arch & arch_sh_dsp) | |
2747 | val = EF_SH_DSP; | |
2748 | else if (valid_arch & arch_sh3) | |
2749 | val = EF_SH3; | |
2750 | else if (valid_arch & arch_sh3_dsp) | |
2751 | val = EF_SH_DSP; | |
2752 | else if (valid_arch & arch_sh3e) | |
2753 | val = EF_SH3E; | |
2754 | else if (valid_arch & arch_sh4) | |
2755 | val = EF_SH4; | |
2756 | else | |
2757 | abort (); | |
2758 | ||
2759 | elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; | |
2760 | elf_elfheader (stdoutput)->e_flags |= val; | |
2761 | } | |
252b5132 RH |
2762 | #endif |
2763 | ||
2764 | /* Apply a fixup to the object file. */ | |
2765 | ||
2766 | #ifdef BFD_ASSEMBLER | |
2767 | int | |
2768 | md_apply_fix (fixP, valp) | |
2769 | fixS *fixP; | |
2770 | valueT *valp; | |
2771 | #else | |
2772 | void | |
2773 | md_apply_fix (fixP, val) | |
2774 | fixS *fixP; | |
2775 | long val; | |
2776 | #endif | |
2777 | { | |
2778 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; | |
2779 | int lowbyte = target_big_endian ? 1 : 0; | |
2780 | int highbyte = target_big_endian ? 0 : 1; | |
2781 | #ifdef BFD_ASSEMBLER | |
2782 | long val = *valp; | |
2783 | #endif | |
2784 | long max, min; | |
2785 | int shift; | |
2786 | ||
2787 | #ifdef BFD_ASSEMBLER | |
a1cc9221 AO |
2788 | /* A difference between two symbols, the second of which is in the |
2789 | current section, is transformed in a PC-relative relocation to | |
2790 | the other symbol. We have to adjust the relocation type here. */ | |
2791 | if (fixP->fx_pcrel) | |
2792 | { | |
2793 | switch (fixP->fx_r_type) | |
2794 | { | |
2795 | default: | |
2796 | break; | |
2797 | ||
2798 | case BFD_RELOC_32: | |
2799 | fixP->fx_r_type = BFD_RELOC_32_PCREL; | |
2800 | break; | |
2801 | ||
2802 | /* Currently, we only support 32-bit PCREL relocations. | |
2803 | We'd need a new reloc type to handle 16_PCREL, and | |
2804 | 8_PCREL is already taken for R_SH_SWITCH8, which | |
2805 | apparently does something completely different than what | |
2806 | we need. FIXME. */ | |
2807 | case BFD_RELOC_16: | |
2808 | bfd_set_error (bfd_error_bad_value); | |
2809 | return false; | |
81d4177b | 2810 | |
a1cc9221 AO |
2811 | case BFD_RELOC_8: |
2812 | bfd_set_error (bfd_error_bad_value); | |
2813 | return false; | |
2814 | } | |
2815 | } | |
2816 | ||
6b31947e NC |
2817 | /* The function adjust_reloc_syms won't convert a reloc against a weak |
2818 | symbol into a reloc against a section, but bfd_install_relocation | |
2819 | will screw up if the symbol is defined, so we have to adjust val here | |
1308f14c HPN |
2820 | to avoid the screw up later. |
2821 | ||
2822 | For ordinary relocs, this does not happen for ELF, since for ELF, | |
2823 | bfd_install_relocation uses the "special function" field of the | |
2824 | howto, and does not execute the code that needs to be undone, as long | |
2825 | as the special function does not return bfd_reloc_continue. | |
2826 | It can happen for GOT- and PLT-type relocs the way they are | |
2827 | described in elf32-sh.c as they use bfd_elf_generic_reloc, but it | |
2828 | doesn't matter here since those relocs don't use VAL; see below. */ | |
2829 | if (OUTPUT_FLAVOR != bfd_target_elf_flavour | |
2830 | && fixP->fx_addsy != NULL | |
252b5132 RH |
2831 | && S_IS_WEAK (fixP->fx_addsy)) |
2832 | val -= S_GET_VALUE (fixP->fx_addsy); | |
2833 | #endif | |
2834 | ||
2835 | #ifndef BFD_ASSEMBLER | |
2836 | if (fixP->fx_r_type == 0) | |
2837 | { | |
2838 | if (fixP->fx_size == 2) | |
2839 | fixP->fx_r_type = BFD_RELOC_16; | |
2840 | else if (fixP->fx_size == 4) | |
2841 | fixP->fx_r_type = BFD_RELOC_32; | |
2842 | else if (fixP->fx_size == 1) | |
2843 | fixP->fx_r_type = BFD_RELOC_8; | |
2844 | else | |
2845 | abort (); | |
2846 | } | |
2847 | #endif | |
2848 | ||
2849 | max = min = 0; | |
2850 | shift = 0; | |
2851 | switch (fixP->fx_r_type) | |
2852 | { | |
2853 | case BFD_RELOC_SH_IMM4: | |
2854 | max = 0xf; | |
2855 | *buf = (*buf & 0xf0) | (val & 0xf); | |
2856 | break; | |
2857 | ||
2858 | case BFD_RELOC_SH_IMM4BY2: | |
2859 | max = 0xf; | |
2860 | shift = 1; | |
2861 | *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); | |
2862 | break; | |
2863 | ||
2864 | case BFD_RELOC_SH_IMM4BY4: | |
2865 | max = 0xf; | |
2866 | shift = 2; | |
2867 | *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); | |
2868 | break; | |
2869 | ||
2870 | case BFD_RELOC_SH_IMM8BY2: | |
2871 | max = 0xff; | |
2872 | shift = 1; | |
2873 | *buf = val >> 1; | |
2874 | break; | |
2875 | ||
2876 | case BFD_RELOC_SH_IMM8BY4: | |
2877 | max = 0xff; | |
2878 | shift = 2; | |
2879 | *buf = val >> 2; | |
2880 | break; | |
2881 | ||
2882 | case BFD_RELOC_8: | |
2883 | case BFD_RELOC_SH_IMM8: | |
2884 | /* Sometimes the 8 bit value is sign extended (e.g., add) and | |
2885 | sometimes it is not (e.g., and). We permit any 8 bit value. | |
2886 | Note that adding further restrictions may invalidate | |
2887 | reasonable looking assembly code, such as ``and -0x1,r0''. */ | |
2888 | max = 0xff; | |
c4aa876b | 2889 | min = -0xff; |
252b5132 RH |
2890 | *buf++ = val; |
2891 | break; | |
2892 | ||
2893 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
2894 | /* The lower two bits of the PC are cleared before the | |
2895 | displacement is added in. We can assume that the destination | |
2896 | is on a 4 byte bounday. If this instruction is also on a 4 | |
2897 | byte boundary, then we want | |
2898 | (target - here) / 4 | |
2899 | and target - here is a multiple of 4. | |
2900 | Otherwise, we are on a 2 byte boundary, and we want | |
2901 | (target - (here - 2)) / 4 | |
2902 | and target - here is not a multiple of 4. Computing | |
2903 | (target - (here - 2)) / 4 == (target - here + 2) / 4 | |
2904 | works for both cases, since in the first case the addition of | |
2905 | 2 will be removed by the division. target - here is in the | |
2906 | variable val. */ | |
2907 | val = (val + 2) / 4; | |
2908 | if (val & ~0xff) | |
2909 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2910 | buf[lowbyte] = val; | |
2911 | break; | |
2912 | ||
2913 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
2914 | val /= 2; | |
2915 | if (val & ~0xff) | |
2916 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2917 | buf[lowbyte] = val; | |
2918 | break; | |
2919 | ||
2920 | case BFD_RELOC_SH_PCDISP8BY2: | |
2921 | val /= 2; | |
2922 | if (val < -0x80 || val > 0x7f) | |
2923 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2924 | buf[lowbyte] = val; | |
2925 | break; | |
2926 | ||
2927 | case BFD_RELOC_SH_PCDISP12BY2: | |
2928 | val /= 2; | |
8637c045 | 2929 | if (val < -0x800 || val > 0x7ff) |
252b5132 RH |
2930 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); |
2931 | buf[lowbyte] = val & 0xff; | |
2932 | buf[highbyte] |= (val >> 8) & 0xf; | |
2933 | break; | |
2934 | ||
2935 | case BFD_RELOC_32: | |
a1cc9221 | 2936 | case BFD_RELOC_32_PCREL: |
1db77c8e | 2937 | md_number_to_chars (buf, val, 4); |
252b5132 RH |
2938 | break; |
2939 | ||
2940 | case BFD_RELOC_16: | |
1db77c8e | 2941 | md_number_to_chars (buf, val, 2); |
252b5132 RH |
2942 | break; |
2943 | ||
2944 | case BFD_RELOC_SH_USES: | |
2945 | /* Pass the value into sh_coff_reloc_mangle. */ | |
2946 | fixP->fx_addnumber = val; | |
2947 | break; | |
2948 | ||
2949 | case BFD_RELOC_SH_COUNT: | |
2950 | case BFD_RELOC_SH_ALIGN: | |
2951 | case BFD_RELOC_SH_CODE: | |
2952 | case BFD_RELOC_SH_DATA: | |
2953 | case BFD_RELOC_SH_LABEL: | |
2954 | /* Nothing to do here. */ | |
2955 | break; | |
2956 | ||
015551fc JR |
2957 | case BFD_RELOC_SH_LOOP_START: |
2958 | case BFD_RELOC_SH_LOOP_END: | |
2959 | ||
252b5132 RH |
2960 | case BFD_RELOC_VTABLE_INHERIT: |
2961 | case BFD_RELOC_VTABLE_ENTRY: | |
2962 | fixP->fx_done = 0; | |
49309057 ILT |
2963 | #ifdef BFD_ASSEMBLER |
2964 | return 0; | |
2965 | #else | |
252b5132 | 2966 | return; |
49309057 | 2967 | #endif |
252b5132 | 2968 | |
a1cc9221 AO |
2969 | #ifdef OBJ_ELF |
2970 | case BFD_RELOC_32_PLT_PCREL: | |
2971 | /* Make the jump instruction point to the address of the operand. At | |
81d4177b | 2972 | runtime we merely add the offset to the actual PLT entry. */ |
a1cc9221 AO |
2973 | *valp = 0xfffffffc; |
2974 | break; | |
2975 | ||
2976 | case BFD_RELOC_SH_GOTPC: | |
2977 | /* This is tough to explain. We end up with this one if we have | |
2978 | operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". | |
2979 | The goal here is to obtain the absolute address of the GOT, | |
2980 | and it is strongly preferable from a performance point of | |
2981 | view to avoid using a runtime relocation for this. There are | |
2982 | cases where you have something like: | |
81d4177b | 2983 | |
a1cc9221 | 2984 | .long _GLOBAL_OFFSET_TABLE_+[.-.L66] |
81d4177b | 2985 | |
a1cc9221 AO |
2986 | and here no correction would be required. Internally in the |
2987 | assembler we treat operands of this form as not being pcrel | |
2988 | since the '.' is explicitly mentioned, and I wonder whether | |
2989 | it would simplify matters to do it this way. Who knows. In | |
2990 | earlier versions of the PIC patches, the pcrel_adjust field | |
2991 | was used to store the correction, but since the expression is | |
2992 | not pcrel, I felt it would be confusing to do it this way. */ | |
2993 | *valp -= 1; | |
2994 | md_number_to_chars (buf, val, 4); | |
2995 | break; | |
2996 | ||
2997 | case BFD_RELOC_32_GOT_PCREL: | |
2998 | *valp = 0; /* Fully resolved at runtime. No addend. */ | |
2999 | md_number_to_chars (buf, 0, 4); | |
3000 | break; | |
3001 | ||
3002 | case BFD_RELOC_32_GOTOFF: | |
3003 | break; | |
3004 | #endif | |
3005 | ||
252b5132 RH |
3006 | default: |
3007 | abort (); | |
3008 | } | |
3009 | ||
3010 | if (shift != 0) | |
3011 | { | |
3012 | if ((val & ((1 << shift) - 1)) != 0) | |
3013 | as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); | |
3014 | if (val >= 0) | |
3015 | val >>= shift; | |
3016 | else | |
3017 | val = ((val >> shift) | |
3018 | | ((long) -1 & ~ ((long) -1 >> shift))); | |
3019 | } | |
3020 | if (max != 0 && (val < min || val > max)) | |
3021 | as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); | |
3022 | ||
3023 | #ifdef BFD_ASSEMBLER | |
3024 | return 0; | |
3025 | #endif | |
3026 | } | |
3027 | ||
3028 | /* Called just before address relaxation. Return the length | |
3029 | by which a fragment must grow to reach it's destination. */ | |
3030 | ||
3031 | int | |
3032 | md_estimate_size_before_relax (fragP, segment_type) | |
3033 | register fragS *fragP; | |
3034 | register segT segment_type; | |
3035 | { | |
e66457fb AM |
3036 | int what; |
3037 | ||
252b5132 RH |
3038 | switch (fragP->fr_subtype) |
3039 | { | |
93c2a809 AM |
3040 | default: |
3041 | abort (); | |
3042 | ||
252b5132 | 3043 | case C (UNCOND_JUMP, UNDEF_DISP): |
6b31947e | 3044 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
3045 | if (!fragP->fr_symbol) |
3046 | { | |
3047 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
252b5132 RH |
3048 | } |
3049 | else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
3050 | { | |
3051 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
252b5132 RH |
3052 | } |
3053 | else | |
3054 | { | |
3055 | fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); | |
252b5132 RH |
3056 | } |
3057 | break; | |
3058 | ||
252b5132 RH |
3059 | case C (COND_JUMP, UNDEF_DISP): |
3060 | case C (COND_JUMP_DELAY, UNDEF_DISP): | |
e66457fb | 3061 | what = GET_WHAT (fragP->fr_subtype); |
6b31947e | 3062 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
3063 | if (fragP->fr_symbol |
3064 | && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
3065 | { | |
252b5132 | 3066 | /* Got a symbol and it's defined in this segment, become byte |
6b31947e | 3067 | sized - maybe it will fix up. */ |
252b5132 | 3068 | fragP->fr_subtype = C (what, COND8); |
252b5132 RH |
3069 | } |
3070 | else if (fragP->fr_symbol) | |
3071 | { | |
6b31947e | 3072 | /* Its got a segment, but its not ours, so it will always be long. */ |
252b5132 | 3073 | fragP->fr_subtype = C (what, UNDEF_WORD_DISP); |
252b5132 RH |
3074 | } |
3075 | else | |
3076 | { | |
6b31947e | 3077 | /* We know the abs value. */ |
252b5132 | 3078 | fragP->fr_subtype = C (what, COND8); |
252b5132 | 3079 | } |
93c2a809 | 3080 | break; |
252b5132 | 3081 | |
93c2a809 | 3082 | case C (UNCOND_JUMP, UNCOND12): |
e66457fb | 3083 | case C (UNCOND_JUMP, UNCOND32): |
93c2a809 AM |
3084 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): |
3085 | case C (COND_JUMP, COND8): | |
e66457fb AM |
3086 | case C (COND_JUMP, COND12): |
3087 | case C (COND_JUMP, COND32): | |
93c2a809 AM |
3088 | case C (COND_JUMP, UNDEF_WORD_DISP): |
3089 | case C (COND_JUMP_DELAY, COND8): | |
e66457fb AM |
3090 | case C (COND_JUMP_DELAY, COND12): |
3091 | case C (COND_JUMP_DELAY, COND32): | |
93c2a809 AM |
3092 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): |
3093 | /* When relaxing a section for the second time, we don't need to | |
e66457fb | 3094 | do anything besides return the current size. */ |
252b5132 RH |
3095 | break; |
3096 | } | |
e66457fb AM |
3097 | |
3098 | fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length; | |
252b5132 RH |
3099 | return fragP->fr_var; |
3100 | } | |
3101 | ||
6b31947e | 3102 | /* Put number into target byte order. */ |
252b5132 RH |
3103 | |
3104 | void | |
3105 | md_number_to_chars (ptr, use, nbytes) | |
3106 | char *ptr; | |
3107 | valueT use; | |
3108 | int nbytes; | |
3109 | { | |
3110 | if (! target_big_endian) | |
3111 | number_to_chars_littleendian (ptr, use, nbytes); | |
3112 | else | |
3113 | number_to_chars_bigendian (ptr, use, nbytes); | |
3114 | } | |
3115 | ||
3116 | long | |
3117 | md_pcrel_from (fixP) | |
3118 | fixS *fixP; | |
3119 | { | |
3120 | return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; | |
3121 | } | |
3122 | ||
3123 | #ifdef OBJ_COFF | |
3124 | ||
3125 | int | |
3126 | tc_coff_sizemachdep (frag) | |
3127 | fragS *frag; | |
3128 | { | |
3129 | return md_relax_table[frag->fr_subtype].rlx_length; | |
3130 | } | |
3131 | ||
3132 | #endif /* OBJ_COFF */ | |
3133 | ||
252b5132 RH |
3134 | #ifndef BFD_ASSEMBLER |
3135 | #ifdef OBJ_COFF | |
3136 | ||
3137 | /* Map BFD relocs to SH COFF relocs. */ | |
3138 | ||
3139 | struct reloc_map | |
3140 | { | |
3141 | bfd_reloc_code_real_type bfd_reloc; | |
3142 | int sh_reloc; | |
3143 | }; | |
3144 | ||
3145 | static const struct reloc_map coff_reloc_map[] = | |
3146 | { | |
3147 | { BFD_RELOC_32, R_SH_IMM32 }, | |
3148 | { BFD_RELOC_16, R_SH_IMM16 }, | |
3149 | { BFD_RELOC_8, R_SH_IMM8 }, | |
3150 | { BFD_RELOC_SH_PCDISP8BY2, R_SH_PCDISP8BY2 }, | |
3151 | { BFD_RELOC_SH_PCDISP12BY2, R_SH_PCDISP }, | |
3152 | { BFD_RELOC_SH_IMM4, R_SH_IMM4 }, | |
3153 | { BFD_RELOC_SH_IMM4BY2, R_SH_IMM4BY2 }, | |
3154 | { BFD_RELOC_SH_IMM4BY4, R_SH_IMM4BY4 }, | |
3155 | { BFD_RELOC_SH_IMM8, R_SH_IMM8 }, | |
3156 | { BFD_RELOC_SH_IMM8BY2, R_SH_IMM8BY2 }, | |
3157 | { BFD_RELOC_SH_IMM8BY4, R_SH_IMM8BY4 }, | |
3158 | { BFD_RELOC_SH_PCRELIMM8BY2, R_SH_PCRELIMM8BY2 }, | |
3159 | { BFD_RELOC_SH_PCRELIMM8BY4, R_SH_PCRELIMM8BY4 }, | |
3160 | { BFD_RELOC_8_PCREL, R_SH_SWITCH8 }, | |
3161 | { BFD_RELOC_SH_SWITCH16, R_SH_SWITCH16 }, | |
3162 | { BFD_RELOC_SH_SWITCH32, R_SH_SWITCH32 }, | |
3163 | { BFD_RELOC_SH_USES, R_SH_USES }, | |
3164 | { BFD_RELOC_SH_COUNT, R_SH_COUNT }, | |
3165 | { BFD_RELOC_SH_ALIGN, R_SH_ALIGN }, | |
3166 | { BFD_RELOC_SH_CODE, R_SH_CODE }, | |
3167 | { BFD_RELOC_SH_DATA, R_SH_DATA }, | |
3168 | { BFD_RELOC_SH_LABEL, R_SH_LABEL }, | |
3169 | { BFD_RELOC_UNUSED, 0 } | |
3170 | }; | |
3171 | ||
3172 | /* Adjust a reloc for the SH. This is similar to the generic code, | |
3173 | but does some minor tweaking. */ | |
3174 | ||
3175 | void | |
3176 | sh_coff_reloc_mangle (seg, fix, intr, paddr) | |
3177 | segment_info_type *seg; | |
3178 | fixS *fix; | |
3179 | struct internal_reloc *intr; | |
3180 | unsigned int paddr; | |
3181 | { | |
3182 | symbolS *symbol_ptr = fix->fx_addsy; | |
3183 | symbolS *dot; | |
3184 | ||
3185 | intr->r_vaddr = paddr + fix->fx_frag->fr_address + fix->fx_where; | |
3186 | ||
3187 | if (! SWITCH_TABLE (fix)) | |
3188 | { | |
3189 | const struct reloc_map *rm; | |
3190 | ||
3191 | for (rm = coff_reloc_map; rm->bfd_reloc != BFD_RELOC_UNUSED; rm++) | |
3192 | if (rm->bfd_reloc == (bfd_reloc_code_real_type) fix->fx_r_type) | |
3193 | break; | |
3194 | if (rm->bfd_reloc == BFD_RELOC_UNUSED) | |
3195 | as_bad_where (fix->fx_file, fix->fx_line, | |
3196 | _("Can not represent %s relocation in this object file format"), | |
3197 | bfd_get_reloc_code_name (fix->fx_r_type)); | |
3198 | intr->r_type = rm->sh_reloc; | |
3199 | intr->r_offset = 0; | |
3200 | } | |
3201 | else | |
3202 | { | |
3203 | know (sh_relax); | |
3204 | ||
3205 | if (fix->fx_r_type == BFD_RELOC_16) | |
3206 | intr->r_type = R_SH_SWITCH16; | |
3207 | else if (fix->fx_r_type == BFD_RELOC_8) | |
3208 | intr->r_type = R_SH_SWITCH8; | |
3209 | else if (fix->fx_r_type == BFD_RELOC_32) | |
3210 | intr->r_type = R_SH_SWITCH32; | |
3211 | else | |
3212 | abort (); | |
3213 | ||
3214 | /* For a switch reloc, we set r_offset to the difference between | |
3215 | the reloc address and the subtrahend. When the linker is | |
3216 | doing relaxing, it can use the determine the starting and | |
3217 | ending points of the switch difference expression. */ | |
3218 | intr->r_offset = intr->r_vaddr - S_GET_VALUE (fix->fx_subsy); | |
3219 | } | |
3220 | ||
3221 | /* PC relative relocs are always against the current section. */ | |
3222 | if (symbol_ptr == NULL) | |
3223 | { | |
3224 | switch (fix->fx_r_type) | |
3225 | { | |
3226 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
3227 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
3228 | case BFD_RELOC_SH_PCDISP8BY2: | |
3229 | case BFD_RELOC_SH_PCDISP12BY2: | |
3230 | case BFD_RELOC_SH_USES: | |
3231 | symbol_ptr = seg->dot; | |
3232 | break; | |
3233 | default: | |
3234 | break; | |
3235 | } | |
3236 | } | |
3237 | ||
3238 | if (fix->fx_r_type == BFD_RELOC_SH_USES) | |
3239 | { | |
3240 | /* We can't store the offset in the object file, since this | |
3241 | reloc does not take up any space, so we store it in r_offset. | |
3242 | The fx_addnumber field was set in md_apply_fix. */ | |
3243 | intr->r_offset = fix->fx_addnumber; | |
3244 | } | |
3245 | else if (fix->fx_r_type == BFD_RELOC_SH_COUNT) | |
3246 | { | |
3247 | /* We can't store the count in the object file, since this reloc | |
3248 | does not take up any space, so we store it in r_offset. The | |
3249 | fx_offset field was set when the fixup was created in | |
3250 | sh_coff_frob_file. */ | |
3251 | intr->r_offset = fix->fx_offset; | |
3252 | /* This reloc is always absolute. */ | |
3253 | symbol_ptr = NULL; | |
3254 | } | |
3255 | else if (fix->fx_r_type == BFD_RELOC_SH_ALIGN) | |
3256 | { | |
3257 | /* Store the alignment in the r_offset field. */ | |
3258 | intr->r_offset = fix->fx_offset; | |
3259 | /* This reloc is always absolute. */ | |
3260 | symbol_ptr = NULL; | |
3261 | } | |
3262 | else if (fix->fx_r_type == BFD_RELOC_SH_CODE | |
3263 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
3264 | || fix->fx_r_type == BFD_RELOC_SH_LABEL) | |
3265 | { | |
3266 | /* These relocs are always absolute. */ | |
3267 | symbol_ptr = NULL; | |
3268 | } | |
3269 | ||
3270 | /* Turn the segment of the symbol into an offset. */ | |
3271 | if (symbol_ptr != NULL) | |
3272 | { | |
3273 | dot = segment_info[S_GET_SEGMENT (symbol_ptr)].dot; | |
3274 | if (dot != NULL) | |
3275 | intr->r_symndx = dot->sy_number; | |
3276 | else | |
3277 | intr->r_symndx = symbol_ptr->sy_number; | |
3278 | } | |
3279 | else | |
3280 | intr->r_symndx = -1; | |
3281 | } | |
3282 | ||
3283 | #endif /* OBJ_COFF */ | |
3284 | #endif /* ! BFD_ASSEMBLER */ | |
3285 | ||
3286 | #ifdef BFD_ASSEMBLER | |
3287 | ||
3288 | /* Create a reloc. */ | |
3289 | ||
3290 | arelent * | |
3291 | tc_gen_reloc (section, fixp) | |
43841e91 | 3292 | asection *section ATTRIBUTE_UNUSED; |
252b5132 RH |
3293 | fixS *fixp; |
3294 | { | |
3295 | arelent *rel; | |
3296 | bfd_reloc_code_real_type r_type; | |
3297 | ||
3298 | rel = (arelent *) xmalloc (sizeof (arelent)); | |
49309057 ILT |
3299 | rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
3300 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
252b5132 RH |
3301 | rel->address = fixp->fx_frag->fr_address + fixp->fx_where; |
3302 | ||
3303 | r_type = fixp->fx_r_type; | |
3304 | ||
3305 | if (SWITCH_TABLE (fixp)) | |
3306 | { | |
3307 | rel->addend = rel->address - S_GET_VALUE (fixp->fx_subsy); | |
3308 | if (r_type == BFD_RELOC_16) | |
3309 | r_type = BFD_RELOC_SH_SWITCH16; | |
3310 | else if (r_type == BFD_RELOC_8) | |
3311 | r_type = BFD_RELOC_8_PCREL; | |
3312 | else if (r_type == BFD_RELOC_32) | |
3313 | r_type = BFD_RELOC_SH_SWITCH32; | |
3314 | else | |
3315 | abort (); | |
3316 | } | |
3317 | else if (r_type == BFD_RELOC_SH_USES) | |
3318 | rel->addend = fixp->fx_addnumber; | |
3319 | else if (r_type == BFD_RELOC_SH_COUNT) | |
3320 | rel->addend = fixp->fx_offset; | |
3321 | else if (r_type == BFD_RELOC_SH_ALIGN) | |
3322 | rel->addend = fixp->fx_offset; | |
3323 | else if (r_type == BFD_RELOC_VTABLE_INHERIT | |
3324 | || r_type == BFD_RELOC_VTABLE_ENTRY) | |
3325 | rel->addend = fixp->fx_offset; | |
015551fc JR |
3326 | else if (r_type == BFD_RELOC_SH_LOOP_START |
3327 | || r_type == BFD_RELOC_SH_LOOP_END) | |
3328 | rel->addend = fixp->fx_offset; | |
3329 | else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel) | |
3330 | { | |
3331 | rel->addend = 0; | |
3332 | rel->address = rel->addend = fixp->fx_offset; | |
3333 | } | |
252b5132 RH |
3334 | else if (fixp->fx_pcrel) |
3335 | rel->addend = fixp->fx_addnumber; | |
a1cc9221 AO |
3336 | else if (r_type == BFD_RELOC_32 || r_type == BFD_RELOC_32_GOTOFF) |
3337 | rel->addend = fixp->fx_addnumber; | |
252b5132 RH |
3338 | else |
3339 | rel->addend = 0; | |
3340 | ||
3341 | rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); | |
3342 | if (rel->howto == NULL) | |
3343 | { | |
3344 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
3345 | _("Cannot represent relocation type %s"), | |
3346 | bfd_get_reloc_code_name (r_type)); | |
3347 | /* Set howto to a garbage value so that we can keep going. */ | |
3348 | rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); | |
3349 | assert (rel->howto != NULL); | |
3350 | } | |
3351 | ||
3352 | return rel; | |
3353 | } | |
3354 | ||
3355 | #endif /* BFD_ASSEMBLER */ |