Commit | Line | Data |
---|---|---|
025b0302 | 1 | /* tc-sh.c -- Assemble code for the Hitachi Super-H |
d1a7caf9 | 2 | Copyright (C) 1993, 94, 95, 96, 97, 1998 Free Software Foundation. |
025b0302 ME |
3 | |
4 | This file is part of GAS, the GNU Assembler. | |
5 | ||
6 | GAS is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GAS is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GAS; see the file COPYING. If not, write to | |
68d04794 JL |
18 | the Free Software Foundation, 59 Temple Place - Suite 330, |
19 | Boston, MA 02111-1307, USA. */ | |
025b0302 ME |
20 | |
21 | /* | |
351efc81 SC |
22 | Written By Steve Chamberlain |
23 | sac@cygnus.com | |
24 | */ | |
025b0302 ME |
25 | |
26 | #include <stdio.h> | |
27 | #include "as.h" | |
28 | #include "bfd.h" | |
29 | #include "subsegs.h" | |
30 | #define DEFINE_TABLE | |
9cc7c60b | 31 | #include "opcodes/sh-opc.h" |
025b0302 | 32 | #include <ctype.h> |
025b0302 ME |
33 | const char comment_chars[] = "!"; |
34 | const char line_separator_chars[] = ";"; | |
d6905776 | 35 | const char line_comment_chars[] = "!#"; |
025b0302 | 36 | |
68d04794 JL |
37 | static void s_uses PARAMS ((int)); |
38 | ||
72574181 ILT |
39 | static void sh_count_relocs PARAMS ((bfd *, segT, PTR)); |
40 | static void sh_frob_section PARAMS ((bfd *, segT, PTR)); | |
41 | ||
025b0302 ME |
42 | /* This table describes all the machine specific pseudo-ops the assembler |
43 | has to support. The fields are: | |
44 | pseudo-op name without dot | |
45 | function to call to execute this pseudo-op | |
46 | Integer arg to pass to the function | |
351efc81 | 47 | */ |
025b0302 ME |
48 | |
49 | void cons (); | |
50 | void s_align_bytes (); | |
72574181 | 51 | static void s_uacons PARAMS ((int)); |
025b0302 | 52 | |
d6905776 KR |
53 | int shl = 0; |
54 | ||
68d04794 JL |
55 | static void |
56 | little (ignore) | |
57 | int ignore; | |
d6905776 KR |
58 | { |
59 | shl = 1; | |
10c8c95e | 60 | target_big_endian = 0; |
d6905776 KR |
61 | } |
62 | ||
025b0302 ME |
63 | const pseudo_typeS md_pseudo_table[] = |
64 | { | |
65 | {"int", cons, 4}, | |
66 | {"word", cons, 2}, | |
67 | {"form", listing_psize, 0}, | |
68d04794 | 68 | {"little", little, 0}, |
025b0302 ME |
69 | {"heading", listing_title, 0}, |
70 | {"import", s_ignore, 0}, | |
71 | {"page", listing_eject, 0}, | |
72 | {"program", s_ignore, 0}, | |
68d04794 | 73 | {"uses", s_uses, 0}, |
72574181 ILT |
74 | {"uaword", s_uacons, 2}, |
75 | {"ualong", s_uacons, 4}, | |
025b0302 ME |
76 | {0, 0, 0} |
77 | }; | |
78 | ||
351efc81 | 79 | /*int md_reloc_size; */ |
025b0302 | 80 | |
68d04794 | 81 | int sh_relax; /* set if -relax seen */ |
025b0302 | 82 | |
48401fcf TT |
83 | /* Whether -small was seen. */ |
84 | ||
85 | int sh_small; | |
86 | ||
025b0302 ME |
87 | const char EXP_CHARS[] = "eE"; |
88 | ||
89 | /* Chars that mean this number is a floating point constant */ | |
90 | /* As in 0f12.456 */ | |
91 | /* or 0d1.2345e12 */ | |
92 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
93 | ||
94 | #define C(a,b) ENCODE_RELAX(a,b) | |
95 | ||
96 | #define JREG 14 /* Register used as a temp when relaxing */ | |
97 | #define ENCODE_RELAX(what,length) (((what) << 4) + (length)) | |
98 | #define GET_WHAT(x) ((x>>4)) | |
99 | ||
d1a7caf9 | 100 | /* These are the three types of relaxable instrction */ |
025b0302 | 101 | #define COND_JUMP 1 |
d1a7caf9 JR |
102 | #define COND_JUMP_DELAY 2 |
103 | #define UNCOND_JUMP 3 | |
104 | #define END 4 | |
025b0302 ME |
105 | |
106 | #define UNDEF_DISP 0 | |
107 | #define COND8 1 | |
108 | #define COND12 2 | |
109 | #define COND32 3 | |
110 | #define UNCOND12 1 | |
111 | #define UNCOND32 2 | |
112 | #define UNDEF_WORD_DISP 4 | |
025b0302 ME |
113 | |
114 | #define UNCOND12 1 | |
115 | #define UNCOND32 2 | |
116 | ||
68d04794 JL |
117 | /* Branch displacements are from the address of the branch plus |
118 | four, thus all minimum and maximum values have 4 added to them. */ | |
119 | #define COND8_F 258 | |
120 | #define COND8_M -252 | |
025b0302 | 121 | #define COND8_LENGTH 2 |
68d04794 JL |
122 | |
123 | /* There is one extra instruction before the branch, so we must add | |
124 | two more bytes to account for it. */ | |
125 | #define COND12_F 4100 | |
126 | #define COND12_M -4090 | |
025b0302 | 127 | #define COND12_LENGTH 6 |
68d04794 | 128 | |
d1a7caf9 JR |
129 | #define COND12_DELAY_LENGTH 4 |
130 | ||
68d04794 JL |
131 | /* ??? The minimum and maximum values are wrong, but this does not matter |
132 | since this relocation type is not supported yet. */ | |
025b0302 ME |
133 | #define COND32_F (1<<30) |
134 | #define COND32_M -(1<<30) | |
135 | #define COND32_LENGTH 14 | |
136 | ||
68d04794 JL |
137 | #define UNCOND12_F 4098 |
138 | #define UNCOND12_M -4092 | |
025b0302 ME |
139 | #define UNCOND12_LENGTH 2 |
140 | ||
68d04794 JL |
141 | /* ??? The minimum and maximum values are wrong, but this does not matter |
142 | since this relocation type is not supported yet. */ | |
025b0302 ME |
143 | #define UNCOND32_F (1<<30) |
144 | #define UNCOND32_M -(1<<30) | |
145 | #define UNCOND32_LENGTH 14 | |
146 | ||
d6905776 KR |
147 | const relax_typeS md_relax_table[C (END, 0)] = { |
148 | { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, | |
149 | { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, | |
150 | ||
151 | { 0 }, | |
152 | /* C (COND_JUMP, COND8) */ | |
153 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, | |
154 | /* C (COND_JUMP, COND12) */ | |
155 | { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, | |
156 | /* C (COND_JUMP, COND32) */ | |
157 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
158 | { 0 }, { 0 }, { 0 }, { 0 }, | |
159 | { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, | |
160 | ||
d1a7caf9 JR |
161 | { 0 }, |
162 | /* C (COND_JUMP_DELAY, COND8) */ | |
163 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, | |
164 | /* C (COND_JUMP_DELAY, COND12) */ | |
165 | { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, | |
166 | /* C (COND_JUMP_DELAY, COND32) */ | |
167 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
168 | { 0 }, { 0 }, { 0 }, { 0 }, | |
169 | { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, | |
170 | ||
d6905776 KR |
171 | { 0 }, |
172 | /* C (UNCOND_JUMP, UNCOND12) */ | |
173 | { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, | |
174 | /* C (UNCOND_JUMP, UNCOND32) */ | |
175 | { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, | |
176 | { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, | |
177 | { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, { 0 }, | |
178 | }; | |
025b0302 ME |
179 | |
180 | static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ | |
181 | ||
182 | /* | |
351efc81 SC |
183 | This function is called once, at assembler startup time. This should |
184 | set up all the tables, etc that the MD part of the assembler needs | |
185 | */ | |
025b0302 ME |
186 | |
187 | void | |
188 | md_begin () | |
189 | { | |
190 | sh_opcode_info *opcode; | |
191 | char *prev_name = ""; | |
192 | ||
10c8c95e JW |
193 | if (! shl) |
194 | target_big_endian = 1; | |
195 | ||
025b0302 ME |
196 | opcode_hash_control = hash_new (); |
197 | ||
198 | /* Insert unique names into hash table */ | |
199 | for (opcode = sh_table; opcode->name; opcode++) | |
200 | { | |
201 | if (strcmp (prev_name, opcode->name)) | |
202 | { | |
203 | prev_name = opcode->name; | |
204 | hash_insert (opcode_hash_control, opcode->name, (char *) opcode); | |
205 | } | |
206 | else | |
207 | { | |
208 | /* Make all the opcodes with the same name point to the same | |
351efc81 | 209 | string */ |
025b0302 ME |
210 | opcode->name = prev_name; |
211 | } | |
212 | } | |
025b0302 ME |
213 | } |
214 | ||
215 | static int reg_m; | |
216 | static int reg_n; | |
10c8c95e JW |
217 | static int reg_b; |
218 | ||
025b0302 ME |
219 | static expressionS immediate; /* absolute expression */ |
220 | ||
221 | typedef struct | |
351efc81 SC |
222 | { |
223 | sh_arg_type type; | |
224 | int reg; | |
225 | } | |
025b0302 ME |
226 | |
227 | sh_operand_info; | |
228 | ||
229 | /* try and parse a reg name, returns number of chars consumed */ | |
230 | static int | |
231 | parse_reg (src, mode, reg) | |
232 | char *src; | |
233 | int *mode; | |
234 | int *reg; | |
235 | { | |
9addcbb1 ILT |
236 | /* We use !isalnum for the next character after the register name, to |
237 | make sure that we won't accidentally recognize a symbol name such as | |
238 | 'sram' as being a reference to the register 'sr'. */ | |
239 | ||
240 | if (src[0] == 'r') | |
10c8c95e | 241 | { |
9addcbb1 | 242 | if (src[1] >= '0' && src[1] <= '7' && strncmp(&src[2], "_bank", 5) == 0 |
d1a7caf9 | 243 | && ! isalnum ((unsigned char) src[7])) |
10c8c95e JW |
244 | { |
245 | *mode = A_REG_B; | |
246 | *reg = (src[1] - '0'); | |
247 | return 7; | |
248 | } | |
249 | } | |
250 | ||
025b0302 ME |
251 | if (src[0] == 'r') |
252 | { | |
253 | if (src[1] == '1') | |
254 | { | |
d1a7caf9 JR |
255 | if (src[2] >= '0' && src[2] <= '5' |
256 | && ! isalnum ((unsigned char) src[3])) | |
025b0302 ME |
257 | { |
258 | *mode = A_REG_N; | |
259 | *reg = 10 + src[2] - '0'; | |
260 | return 3; | |
261 | } | |
262 | } | |
d1a7caf9 JR |
263 | if (src[1] >= '0' && src[1] <= '9' |
264 | && ! isalnum ((unsigned char) src[2])) | |
025b0302 ME |
265 | { |
266 | *mode = A_REG_N; | |
267 | *reg = (src[1] - '0'); | |
268 | return 2; | |
269 | } | |
270 | } | |
271 | ||
d1a7caf9 JR |
272 | if (src[0] == 's' |
273 | && src[1] == 's' | |
274 | && src[2] == 'r' && ! isalnum ((unsigned char) src[3])) | |
10c8c95e JW |
275 | { |
276 | *mode = A_SSR; | |
277 | return 3; | |
278 | } | |
279 | ||
d1a7caf9 JR |
280 | if (src[0] == 's' && src[1] == 'p' && src[2] == 'c' |
281 | && ! isalnum ((unsigned char) src[3])) | |
10c8c95e JW |
282 | { |
283 | *mode = A_SPC; | |
284 | return 3; | |
285 | } | |
286 | ||
d1a7caf9 JR |
287 | if (src[0] == 's' && src[1] == 'g' && src[2] == 'r' |
288 | && ! isalnum ((unsigned char) src[3])) | |
48401fcf TT |
289 | { |
290 | *mode = A_SGR; | |
291 | return 3; | |
292 | } | |
293 | ||
d1a7caf9 JR |
294 | if (src[0] == 'd' && src[1] == 'b' && src[2] == 'r' |
295 | && ! isalnum ((unsigned char) src[3])) | |
48401fcf TT |
296 | { |
297 | *mode = A_DBR; | |
298 | return 3; | |
299 | } | |
300 | ||
d1a7caf9 | 301 | if (src[0] == 's' && src[1] == 'r' && ! isalnum ((unsigned char) src[2])) |
025b0302 ME |
302 | { |
303 | *mode = A_SR; | |
304 | return 2; | |
305 | } | |
306 | ||
d1a7caf9 | 307 | if (src[0] == 's' && src[1] == 'p' && ! isalnum ((unsigned char) src[2])) |
025b0302 ME |
308 | { |
309 | *mode = A_REG_N; | |
310 | *reg = 15; | |
311 | return 2; | |
312 | } | |
313 | ||
d1a7caf9 | 314 | if (src[0] == 'p' && src[1] == 'r' && ! isalnum ((unsigned char) src[2])) |
025b0302 ME |
315 | { |
316 | *mode = A_PR; | |
317 | return 2; | |
318 | } | |
d1a7caf9 | 319 | if (src[0] == 'p' && src[1] == 'c' && ! isalnum ((unsigned char) src[2])) |
025b0302 ME |
320 | { |
321 | *mode = A_DISP_PC; | |
322 | return 2; | |
323 | } | |
d1a7caf9 JR |
324 | if (src[0] == 'g' && src[1] == 'b' && src[2] == 'r' |
325 | && ! isalnum ((unsigned char) src[3])) | |
025b0302 ME |
326 | { |
327 | *mode = A_GBR; | |
328 | return 3; | |
329 | } | |
d1a7caf9 JR |
330 | if (src[0] == 'v' && src[1] == 'b' && src[2] == 'r' |
331 | && ! isalnum ((unsigned char) src[3])) | |
025b0302 ME |
332 | { |
333 | *mode = A_VBR; | |
334 | return 3; | |
335 | } | |
336 | ||
d1a7caf9 JR |
337 | if (src[0] == 'm' && src[1] == 'a' && src[2] == 'c' |
338 | && ! isalnum ((unsigned char) src[4])) | |
025b0302 ME |
339 | { |
340 | if (src[3] == 'l') | |
341 | { | |
342 | *mode = A_MACL; | |
343 | return 4; | |
344 | } | |
345 | if (src[3] == 'h') | |
346 | { | |
347 | *mode = A_MACH; | |
348 | return 4; | |
349 | } | |
350 | } | |
68d04794 JL |
351 | if (src[0] == 'f' && src[1] == 'r') |
352 | { | |
353 | if (src[2] == '1') | |
354 | { | |
d1a7caf9 JR |
355 | if (src[3] >= '0' && src[3] <= '5' |
356 | && ! isalnum ((unsigned char) src[4])) | |
68d04794 JL |
357 | { |
358 | *mode = F_REG_N; | |
359 | *reg = 10 + src[3] - '0'; | |
360 | return 4; | |
361 | } | |
362 | } | |
d1a7caf9 JR |
363 | if (src[2] >= '0' && src[2] <= '9' |
364 | && ! isalnum ((unsigned char) src[3])) | |
68d04794 JL |
365 | { |
366 | *mode = F_REG_N; | |
367 | *reg = (src[2] - '0'); | |
368 | return 3; | |
369 | } | |
370 | } | |
48401fcf TT |
371 | if (src[0] == 'd' && src[1] == 'r') |
372 | { | |
373 | if (src[2] == '1') | |
374 | { | |
375 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
d1a7caf9 | 376 | && ! isalnum ((unsigned char) src[4])) |
48401fcf TT |
377 | { |
378 | *mode = D_REG_N; | |
379 | *reg = 10 + src[3] - '0'; | |
380 | return 4; | |
381 | } | |
382 | } | |
383 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
d1a7caf9 | 384 | && ! isalnum ((unsigned char) src[3])) |
48401fcf TT |
385 | { |
386 | *mode = D_REG_N; | |
387 | *reg = (src[2] - '0'); | |
388 | return 3; | |
389 | } | |
390 | } | |
391 | if (src[0] == 'x' && src[1] == 'd') | |
392 | { | |
393 | if (src[2] == '1') | |
394 | { | |
395 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
d1a7caf9 | 396 | && ! isalnum ((unsigned char) src[4])) |
48401fcf TT |
397 | { |
398 | *mode = X_REG_N; | |
399 | *reg = 11 + src[3] - '0'; | |
400 | return 4; | |
401 | } | |
402 | } | |
403 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
d1a7caf9 | 404 | && ! isalnum ((unsigned char) src[3])) |
48401fcf TT |
405 | { |
406 | *mode = X_REG_N; | |
407 | *reg = (src[2] - '0') + 1; | |
408 | return 3; | |
409 | } | |
410 | } | |
411 | if (src[0] == 'f' && src[1] == 'v') | |
412 | { | |
d1a7caf9 | 413 | if (src[2] == '1'&& src[3] == '2' && ! isalnum ((unsigned char) src[4])) |
48401fcf TT |
414 | { |
415 | *mode = V_REG_N; | |
416 | *reg = 12; | |
417 | return 4; | |
418 | } | |
d1a7caf9 JR |
419 | if ((src[2] == '0' || src[2] == '4' || src[2] == '8') |
420 | && ! isalnum ((unsigned char) src[3])) | |
48401fcf TT |
421 | { |
422 | *mode = V_REG_N; | |
423 | *reg = (src[2] - '0'); | |
424 | return 3; | |
425 | } | |
426 | } | |
9addcbb1 | 427 | if (src[0] == 'f' && src[1] == 'p' && src[2] == 'u' && src[3] == 'l' |
d1a7caf9 | 428 | && ! isalnum ((unsigned char) src[4])) |
68d04794 JL |
429 | { |
430 | *mode = FPUL_N; | |
431 | return 4; | |
432 | } | |
433 | ||
9addcbb1 | 434 | if (src[0] == 'f' && src[1] == 'p' && src[2] == 's' && src[3] == 'c' |
d1a7caf9 | 435 | && src[4] == 'r' && ! isalnum ((unsigned char) src[5])) |
68d04794 JL |
436 | { |
437 | *mode = FPSCR_N; | |
438 | return 5; | |
439 | } | |
025b0302 | 440 | |
48401fcf | 441 | if (src[0] == 'x' && src[1] == 'm' && src[2] == 't' && src[3] == 'r' |
d1a7caf9 | 442 | && src[4] == 'x' && ! isalnum ((unsigned char) src[5])) |
48401fcf TT |
443 | { |
444 | *mode = XMTRX_M4; | |
445 | return 5; | |
446 | } | |
447 | ||
025b0302 ME |
448 | return 0; |
449 | } | |
450 | ||
351efc81 SC |
451 | static symbolS *dot() |
452 | { | |
453 | const char *fake; | |
454 | ||
455 | /* JF: '.' is pseudo symbol with value of current location | |
456 | in current segment. */ | |
457 | fake = FAKE_LABEL_NAME; | |
458 | return symbol_new (fake, | |
459 | now_seg, | |
460 | (valueT) frag_now_fix (), | |
461 | frag_now); | |
462 | ||
463 | } | |
464 | ||
465 | ||
025b0302 ME |
466 | static |
467 | char * | |
468 | parse_exp (s) | |
469 | char *s; | |
470 | { | |
471 | char *save; | |
472 | char *new; | |
025b0302 ME |
473 | |
474 | save = input_line_pointer; | |
025b0302 | 475 | input_line_pointer = s; |
351efc81 SC |
476 | expression (&immediate); |
477 | if (immediate.X_op == O_absent) | |
48401fcf | 478 | as_bad (_("missing operand")); |
025b0302 ME |
479 | new = input_line_pointer; |
480 | input_line_pointer = save; | |
351efc81 | 481 | return new; |
025b0302 ME |
482 | } |
483 | ||
484 | ||
485 | /* The many forms of operand: | |
486 | ||
351efc81 SC |
487 | Rn Register direct |
488 | @Rn Register indirect | |
489 | @Rn+ Autoincrement | |
490 | @-Rn Autodecrement | |
025b0302 ME |
491 | @(disp:4,Rn) |
492 | @(disp:8,GBR) | |
493 | @(disp:8,PC) | |
494 | ||
495 | @(R0,Rn) | |
496 | @(R0,GBR) | |
497 | ||
498 | disp:8 | |
499 | disp:12 | |
500 | #imm8 | |
501 | pr, gbr, vbr, macl, mach | |
502 | ||
503 | */ | |
504 | ||
505 | static | |
506 | char * | |
507 | parse_at (src, op) | |
508 | char *src; | |
509 | sh_operand_info *op; | |
510 | { | |
511 | int len; | |
512 | int mode; | |
513 | src++; | |
514 | if (src[0] == '-') | |
515 | { | |
516 | /* Must be predecrement */ | |
517 | src++; | |
518 | ||
519 | len = parse_reg (src, &mode, &(op->reg)); | |
520 | if (mode != A_REG_N) | |
48401fcf | 521 | as_bad (_("illegal register after @-")); |
025b0302 ME |
522 | |
523 | op->type = A_DEC_N; | |
524 | src += len; | |
525 | } | |
526 | else if (src[0] == '(') | |
527 | { | |
528 | /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or | |
351efc81 | 529 | @(r0, rn) */ |
025b0302 ME |
530 | src++; |
531 | len = parse_reg (src, &mode, &(op->reg)); | |
532 | if (len && mode == A_REG_N) | |
533 | { | |
534 | src += len; | |
535 | if (op->reg != 0) | |
536 | { | |
48401fcf | 537 | as_bad (_("must be @(r0,...)")); |
025b0302 ME |
538 | } |
539 | if (src[0] == ',') | |
540 | src++; | |
541 | /* Now can be rn or gbr */ | |
542 | len = parse_reg (src, &mode, &(op->reg)); | |
543 | if (mode == A_GBR) | |
544 | { | |
545 | op->type = A_R0_GBR; | |
546 | } | |
547 | else if (mode == A_REG_N) | |
548 | { | |
549 | op->type = A_IND_R0_REG_N; | |
550 | } | |
551 | else | |
552 | { | |
48401fcf | 553 | as_bad (_("syntax error in @(r0,...)")); |
025b0302 ME |
554 | } |
555 | } | |
556 | else | |
557 | { | |
558 | /* Must be an @(disp,.. thing) */ | |
559 | src = parse_exp (src); | |
560 | if (src[0] == ',') | |
561 | src++; | |
562 | /* Now can be rn, gbr or pc */ | |
563 | len = parse_reg (src, &mode, &op->reg); | |
564 | if (len) | |
565 | { | |
566 | if (mode == A_REG_N) | |
567 | { | |
568 | op->type = A_DISP_REG_N; | |
569 | } | |
570 | else if (mode == A_GBR) | |
571 | { | |
572 | op->type = A_DISP_GBR; | |
573 | } | |
574 | else if (mode == A_DISP_PC) | |
575 | { | |
351efc81 SC |
576 | /* Turn a plain @(4,pc) into @(.+4,pc) */ |
577 | if (immediate.X_op == O_constant) { | |
578 | immediate.X_add_symbol = dot(); | |
579 | immediate.X_op = O_symbol; | |
580 | } | |
025b0302 ME |
581 | op->type = A_DISP_PC; |
582 | } | |
583 | else | |
584 | { | |
48401fcf | 585 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); |
025b0302 ME |
586 | } |
587 | } | |
588 | else | |
589 | { | |
48401fcf | 590 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); |
025b0302 ME |
591 | } |
592 | } | |
593 | src += len; | |
594 | if (src[0] != ')') | |
48401fcf | 595 | as_bad (_("expecting )")); |
025b0302 ME |
596 | else |
597 | src++; | |
598 | } | |
599 | else | |
600 | { | |
601 | src += parse_reg (src, &mode, &(op->reg)); | |
602 | if (mode != A_REG_N) | |
603 | { | |
48401fcf | 604 | as_bad (_("illegal register after @")); |
025b0302 ME |
605 | } |
606 | if (src[0] == '+') | |
607 | { | |
608 | op->type = A_INC_N; | |
609 | src++; | |
610 | } | |
611 | else | |
612 | { | |
613 | op->type = A_IND_N; | |
614 | } | |
615 | } | |
616 | return src; | |
617 | } | |
618 | ||
619 | static void | |
620 | get_operand (ptr, op) | |
621 | char **ptr; | |
622 | sh_operand_info *op; | |
623 | { | |
624 | char *src = *ptr; | |
625 | int mode = -1; | |
626 | unsigned int len; | |
627 | ||
628 | if (src[0] == '#') | |
629 | { | |
630 | src++; | |
631 | *ptr = parse_exp (src); | |
632 | op->type = A_IMM; | |
633 | return; | |
634 | } | |
635 | ||
636 | else if (src[0] == '@') | |
637 | { | |
638 | *ptr = parse_at (src, op); | |
639 | return; | |
640 | } | |
641 | len = parse_reg (src, &mode, &(op->reg)); | |
642 | if (len) | |
643 | { | |
644 | *ptr = src + len; | |
645 | op->type = mode; | |
646 | return; | |
647 | } | |
648 | else | |
649 | { | |
650 | /* Not a reg, the only thing left is a displacement */ | |
651 | *ptr = parse_exp (src); | |
652 | op->type = A_DISP_PC; | |
653 | return; | |
654 | } | |
655 | } | |
656 | ||
657 | static | |
658 | char * | |
659 | get_operands (info, args, operand) | |
660 | sh_opcode_info *info; | |
661 | char *args; | |
662 | sh_operand_info *operand; | |
663 | ||
664 | { | |
665 | char *ptr = args; | |
666 | if (info->arg[0]) | |
667 | { | |
668 | ptr++; | |
669 | ||
670 | get_operand (&ptr, operand + 0); | |
671 | if (info->arg[1]) | |
672 | { | |
673 | if (*ptr == ',') | |
674 | { | |
675 | ptr++; | |
676 | } | |
677 | get_operand (&ptr, operand + 1); | |
10c8c95e JW |
678 | if (info->arg[2]) |
679 | { | |
680 | if (*ptr == ',') | |
681 | { | |
682 | ptr++; | |
683 | } | |
684 | get_operand (&ptr, operand + 2); | |
685 | } | |
686 | else | |
687 | { | |
688 | operand[2].type = 0; | |
689 | } | |
025b0302 ME |
690 | } |
691 | else | |
692 | { | |
693 | operand[1].type = 0; | |
10c8c95e | 694 | operand[2].type = 0; |
025b0302 ME |
695 | } |
696 | } | |
697 | else | |
698 | { | |
699 | operand[0].type = 0; | |
700 | operand[1].type = 0; | |
10c8c95e | 701 | operand[2].type = 0; |
025b0302 ME |
702 | } |
703 | return ptr; | |
704 | } | |
705 | ||
706 | /* Passed a pointer to a list of opcodes which use different | |
707 | addressing modes, return the opcode which matches the opcodes | |
708 | provided | |
351efc81 | 709 | */ |
025b0302 ME |
710 | |
711 | static | |
712 | sh_opcode_info * | |
713 | get_specific (opcode, operands) | |
714 | sh_opcode_info *opcode; | |
715 | sh_operand_info *operands; | |
716 | { | |
717 | sh_opcode_info *this_try = opcode; | |
718 | char *name = opcode->name; | |
025b0302 ME |
719 | int n = 0; |
720 | while (opcode->name) | |
721 | { | |
722 | this_try = opcode++; | |
723 | if (this_try->name != name) | |
724 | { | |
725 | /* We've looked so far down the table that we've run out of | |
726 | opcodes with the same name */ | |
727 | return 0; | |
728 | } | |
729 | /* look at both operands needed by the opcodes and provided by | |
351efc81 SC |
730 | the user - since an arg test will often fail on the same arg |
731 | again and again, we'll try and test the last failing arg the | |
732 | first on each opcode try */ | |
025b0302 ME |
733 | |
734 | for (n = 0; this_try->arg[n]; n++) | |
735 | { | |
10c8c95e JW |
736 | sh_operand_info *user = operands + n; |
737 | sh_arg_type arg = this_try->arg[n]; | |
025b0302 ME |
738 | switch (arg) |
739 | { | |
740 | case A_IMM: | |
741 | case A_BDISP12: | |
742 | case A_BDISP8: | |
743 | case A_DISP_GBR: | |
744 | case A_DISP_PC: | |
745 | case A_MACH: | |
746 | case A_PR: | |
747 | case A_MACL: | |
748 | if (user->type != arg) | |
749 | goto fail; | |
750 | break; | |
751 | case A_R0: | |
752 | /* opcode needs r0 */ | |
753 | if (user->type != A_REG_N || user->reg != 0) | |
754 | goto fail; | |
755 | break; | |
756 | case A_R0_GBR: | |
757 | if (user->type != A_R0_GBR || user->reg != 0) | |
758 | goto fail; | |
759 | break; | |
10c8c95e JW |
760 | case F_FR0: |
761 | if (user->type != F_REG_N || user->reg != 0) | |
762 | goto fail; | |
763 | break; | |
025b0302 ME |
764 | |
765 | case A_REG_N: | |
766 | case A_INC_N: | |
767 | case A_DEC_N: | |
768 | case A_IND_N: | |
769 | case A_IND_R0_REG_N: | |
770 | case A_DISP_REG_N: | |
68d04794 | 771 | case F_REG_N: |
48401fcf TT |
772 | case D_REG_N: |
773 | case X_REG_N: | |
774 | case V_REG_N: | |
68d04794 JL |
775 | case FPUL_N: |
776 | case FPSCR_N: | |
025b0302 ME |
777 | /* Opcode needs rn */ |
778 | if (user->type != arg) | |
779 | goto fail; | |
780 | reg_n = user->reg; | |
781 | break; | |
48401fcf TT |
782 | case FD_REG_N: |
783 | if (user->type != F_REG_N && user->type != D_REG_N) | |
784 | goto fail; | |
785 | reg_n = user->reg; | |
786 | break; | |
787 | case DX_REG_N: | |
788 | if (user->type != D_REG_N && user->type != X_REG_N) | |
789 | goto fail; | |
790 | reg_n = user->reg; | |
791 | break; | |
025b0302 ME |
792 | case A_GBR: |
793 | case A_SR: | |
794 | case A_VBR: | |
10c8c95e JW |
795 | case A_SSR: |
796 | case A_SPC: | |
48401fcf TT |
797 | case A_SGR: |
798 | case A_DBR: | |
025b0302 ME |
799 | if (user->type != arg) |
800 | goto fail; | |
801 | break; | |
802 | ||
10c8c95e JW |
803 | case A_REG_B: |
804 | if (user->type != arg) | |
805 | goto fail; | |
806 | reg_b = user->reg; | |
807 | break; | |
808 | ||
025b0302 ME |
809 | case A_REG_M: |
810 | case A_INC_M: | |
811 | case A_DEC_M: | |
812 | case A_IND_M: | |
813 | case A_IND_R0_REG_M: | |
814 | case A_DISP_REG_M: | |
815 | /* Opcode needs rn */ | |
816 | if (user->type != arg - A_REG_M + A_REG_N) | |
817 | goto fail; | |
818 | reg_m = user->reg; | |
819 | break; | |
68d04794 | 820 | |
68d04794 | 821 | case F_REG_M: |
48401fcf TT |
822 | case D_REG_M: |
823 | case X_REG_M: | |
824 | case V_REG_M: | |
68d04794 JL |
825 | case FPUL_M: |
826 | case FPSCR_M: | |
827 | /* Opcode needs rn */ | |
828 | if (user->type != arg - F_REG_M + F_REG_N) | |
829 | goto fail; | |
830 | reg_m = user->reg; | |
831 | break; | |
48401fcf TT |
832 | case DX_REG_M: |
833 | if (user->type != D_REG_N && user->type != X_REG_N) | |
834 | goto fail; | |
835 | reg_m = user->reg; | |
836 | break; | |
837 | case XMTRX_M4: | |
838 | if (user->type != XMTRX_M4) | |
839 | goto fail; | |
840 | reg_m = 4; | |
841 | break; | |
68d04794 | 842 | |
025b0302 | 843 | default: |
48401fcf | 844 | printf (_("unhandled %d\n"), arg); |
025b0302 ME |
845 | goto fail; |
846 | } | |
025b0302 ME |
847 | } |
848 | return this_try; | |
849 | fail:; | |
850 | } | |
851 | ||
852 | return 0; | |
853 | } | |
854 | ||
855 | int | |
856 | check (operand, low, high) | |
857 | expressionS *operand; | |
858 | int low; | |
859 | int high; | |
860 | { | |
351efc81 | 861 | if (operand->X_op != O_constant |
025b0302 ME |
862 | || operand->X_add_number < low |
863 | || operand->X_add_number > high) | |
864 | { | |
48401fcf | 865 | as_bad (_("operand must be absolute in range %d..%d"), low, high); |
025b0302 ME |
866 | } |
867 | return operand->X_add_number; | |
868 | } | |
869 | ||
870 | ||
871 | static void | |
872 | insert (where, how, pcrel) | |
873 | char *where; | |
874 | int how; | |
875 | int pcrel; | |
876 | { | |
351efc81 SC |
877 | fix_new_exp (frag_now, |
878 | where - frag_now->fr_literal, | |
68d04794 | 879 | 2, |
351efc81 SC |
880 | &immediate, |
881 | pcrel, | |
882 | how); | |
025b0302 ME |
883 | } |
884 | ||
885 | static void | |
886 | build_relax (opcode) | |
887 | sh_opcode_info *opcode; | |
888 | { | |
10c8c95e | 889 | int high_byte = target_big_endian ? 0 : 1; |
025b0302 | 890 | char *p; |
d6905776 | 891 | |
025b0302 ME |
892 | if (opcode->arg[0] == A_BDISP8) |
893 | { | |
d1a7caf9 | 894 | int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; |
025b0302 | 895 | p = frag_var (rs_machine_dependent, |
d1a7caf9 JR |
896 | md_relax_table[C (what, COND32)].rlx_length, |
897 | md_relax_table[C (what, COND8)].rlx_length, | |
898 | C (what, 0), | |
025b0302 ME |
899 | immediate.X_add_symbol, |
900 | immediate.X_add_number, | |
901 | 0); | |
d6905776 | 902 | p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); |
025b0302 ME |
903 | } |
904 | else if (opcode->arg[0] == A_BDISP12) | |
905 | { | |
906 | p = frag_var (rs_machine_dependent, | |
907 | md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, | |
68d04794 | 908 | md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, |
025b0302 ME |
909 | C (UNCOND_JUMP, 0), |
910 | immediate.X_add_symbol, | |
911 | immediate.X_add_number, | |
912 | 0); | |
d6905776 | 913 | p[high_byte] = (opcode->nibbles[0] << 4); |
025b0302 ME |
914 | } |
915 | ||
916 | } | |
917 | ||
918 | /* Now we know what sort of opcodes it is, lets build the bytes - | |
919 | */ | |
920 | static void | |
921 | build_Mytes (opcode, operand) | |
922 | sh_opcode_info *opcode; | |
923 | sh_operand_info *operand; | |
924 | ||
925 | { | |
926 | int index; | |
927 | char nbuf[4]; | |
928 | char *output = frag_more (2); | |
10c8c95e | 929 | int low_byte = target_big_endian ? 1 : 0; |
025b0302 ME |
930 | nbuf[0] = 0; |
931 | nbuf[1] = 0; | |
932 | nbuf[2] = 0; | |
933 | nbuf[3] = 0; | |
934 | ||
935 | for (index = 0; index < 4; index++) | |
936 | { | |
937 | sh_nibble_type i = opcode->nibbles[index]; | |
938 | if (i < 16) | |
939 | { | |
940 | nbuf[index] = i; | |
941 | } | |
942 | else | |
943 | { | |
944 | switch (i) | |
945 | { | |
946 | case REG_N: | |
947 | nbuf[index] = reg_n; | |
948 | break; | |
949 | case REG_M: | |
950 | nbuf[index] = reg_m; | |
951 | break; | |
48401fcf TT |
952 | case REG_NM: |
953 | nbuf[index] = reg_n | (reg_m >> 2); | |
954 | break; | |
10c8c95e JW |
955 | case REG_B: |
956 | nbuf[index] = reg_b | 0x08; | |
957 | break; | |
025b0302 | 958 | case DISP_4: |
72574181 | 959 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0); |
025b0302 ME |
960 | break; |
961 | case IMM_4BY4: | |
72574181 | 962 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0); |
025b0302 ME |
963 | break; |
964 | case IMM_4BY2: | |
72574181 | 965 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0); |
025b0302 ME |
966 | break; |
967 | case IMM_4: | |
72574181 | 968 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0); |
025b0302 ME |
969 | break; |
970 | case IMM_8BY4: | |
72574181 | 971 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0); |
025b0302 ME |
972 | break; |
973 | case IMM_8BY2: | |
72574181 | 974 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0); |
025b0302 ME |
975 | break; |
976 | case IMM_8: | |
72574181 | 977 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0); |
025b0302 ME |
978 | break; |
979 | case PCRELIMM_8BY4: | |
72574181 | 980 | insert (output, BFD_RELOC_SH_PCRELIMM8BY4, 1); |
025b0302 ME |
981 | break; |
982 | case PCRELIMM_8BY2: | |
72574181 | 983 | insert (output, BFD_RELOC_SH_PCRELIMM8BY2, 1); |
025b0302 ME |
984 | break; |
985 | default: | |
48401fcf | 986 | printf (_("failed for %d\n"), i); |
025b0302 ME |
987 | } |
988 | } | |
989 | } | |
10c8c95e | 990 | if (! target_big_endian) { |
d6905776 KR |
991 | output[1] = (nbuf[0] << 4) | (nbuf[1]); |
992 | output[0] = (nbuf[2] << 4) | (nbuf[3]); | |
993 | } | |
994 | else { | |
995 | output[0] = (nbuf[0] << 4) | (nbuf[1]); | |
996 | output[1] = (nbuf[2] << 4) | (nbuf[3]); | |
997 | } | |
025b0302 ME |
998 | } |
999 | ||
1000 | /* This is the guts of the machine-dependent assembler. STR points to a | |
1001 | machine dependent instruction. This function is supposed to emit | |
1002 | the frags/bytes it assembles to. | |
351efc81 | 1003 | */ |
025b0302 ME |
1004 | |
1005 | void | |
1006 | md_assemble (str) | |
1007 | char *str; | |
1008 | { | |
1009 | unsigned char *op_start; | |
1010 | unsigned char *op_end; | |
10c8c95e | 1011 | sh_operand_info operand[3]; |
025b0302 | 1012 | sh_opcode_info *opcode; |
351efc81 | 1013 | char name[20]; |
025b0302 | 1014 | int nlen = 0; |
025b0302 ME |
1015 | /* Drop leading whitespace */ |
1016 | while (*str == ' ') | |
1017 | str++; | |
1018 | ||
1019 | /* find the op code end */ | |
351efc81 SC |
1020 | for (op_start = op_end = (unsigned char *) (str); |
1021 | *op_end | |
1022 | && nlen < 20 | |
1023 | && !is_end_of_line[*op_end] && *op_end != ' '; | |
025b0302 ME |
1024 | op_end++) |
1025 | { | |
351efc81 | 1026 | name[nlen] = op_start[nlen]; |
025b0302 ME |
1027 | nlen++; |
1028 | } | |
1029 | name[nlen] = 0; | |
1030 | ||
351efc81 | 1031 | if (nlen == 0) |
025b0302 | 1032 | { |
48401fcf | 1033 | as_bad (_("can't find opcode ")); |
025b0302 ME |
1034 | } |
1035 | ||
1036 | opcode = (sh_opcode_info *) hash_find (opcode_hash_control, name); | |
1037 | ||
1038 | if (opcode == NULL) | |
1039 | { | |
48401fcf | 1040 | as_bad (_("unknown opcode")); |
025b0302 ME |
1041 | return; |
1042 | } | |
1043 | ||
bccbc0aa ILT |
1044 | if (sh_relax |
1045 | && ! seg_info (now_seg)->tc_segment_info_data.in_code) | |
1046 | { | |
1047 | /* Output a CODE reloc to tell the linker that the following | |
1048 | bytes are instructions, not data. */ | |
72574181 ILT |
1049 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, |
1050 | BFD_RELOC_SH_CODE); | |
bccbc0aa ILT |
1051 | seg_info (now_seg)->tc_segment_info_data.in_code = 1; |
1052 | } | |
1053 | ||
025b0302 ME |
1054 | if (opcode->arg[0] == A_BDISP12 |
1055 | || opcode->arg[0] == A_BDISP8) | |
1056 | { | |
351efc81 | 1057 | parse_exp (op_end + 1); |
025b0302 ME |
1058 | build_relax (opcode); |
1059 | } | |
1060 | else | |
1061 | { | |
351efc81 SC |
1062 | if (opcode->arg[0] != A_END) |
1063 | { | |
1064 | get_operands (opcode, op_end, operand); | |
1065 | } | |
025b0302 ME |
1066 | opcode = get_specific (opcode, operand); |
1067 | ||
1068 | if (opcode == 0) | |
1069 | { | |
1070 | /* Couldn't find an opcode which matched the operands */ | |
1071 | char *where = frag_more (2); | |
1072 | ||
1073 | where[0] = 0x0; | |
1074 | where[1] = 0x0; | |
48401fcf | 1075 | as_bad (_("invalid operands for opcode")); |
025b0302 ME |
1076 | return; |
1077 | } | |
1078 | ||
1079 | build_Mytes (opcode, operand); | |
1080 | } | |
1081 | ||
1082 | } | |
1083 | ||
bccbc0aa | 1084 | /* This routine is called each time a label definition is seen. It |
72574181 | 1085 | emits a BFD_RELOC_SH_LABEL reloc if necessary. */ |
bccbc0aa ILT |
1086 | |
1087 | void | |
1088 | sh_frob_label () | |
1089 | { | |
72574181 ILT |
1090 | static fragS *last_label_frag; |
1091 | static int last_label_offset; | |
1092 | ||
bccbc0aa ILT |
1093 | if (sh_relax |
1094 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
72574181 ILT |
1095 | { |
1096 | int offset; | |
1097 | ||
1098 | offset = frag_now_fix (); | |
1099 | if (frag_now != last_label_frag | |
1100 | || offset != last_label_offset) | |
1101 | { | |
1102 | fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); | |
1103 | last_label_frag = frag_now; | |
1104 | last_label_offset = offset; | |
1105 | } | |
1106 | } | |
bccbc0aa ILT |
1107 | } |
1108 | ||
1109 | /* This routine is called when the assembler is about to output some | |
72574181 | 1110 | data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ |
bccbc0aa ILT |
1111 | |
1112 | void | |
1113 | sh_flush_pending_output () | |
1114 | { | |
1115 | if (sh_relax | |
1116 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
1117 | { | |
72574181 ILT |
1118 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, |
1119 | BFD_RELOC_SH_DATA); | |
bccbc0aa ILT |
1120 | seg_info (now_seg)->tc_segment_info_data.in_code = 0; |
1121 | } | |
1122 | } | |
1123 | ||
025b0302 ME |
1124 | symbolS * |
1125 | DEFUN (md_undefined_symbol, (name), | |
1126 | char *name) | |
1127 | { | |
1128 | return 0; | |
1129 | } | |
1130 | ||
72574181 ILT |
1131 | #ifdef OBJ_COFF |
1132 | ||
1133 | void | |
1134 | DEFUN (tc_crawl_symbol_chain, (headers), | |
1135 | object_headers * headers) | |
1136 | { | |
48401fcf | 1137 | printf (_("call to tc_crawl_symbol_chain \n")); |
72574181 ILT |
1138 | } |
1139 | ||
025b0302 ME |
1140 | void |
1141 | DEFUN (tc_headers_hook, (headers), | |
1142 | object_headers * headers) | |
1143 | { | |
48401fcf | 1144 | printf (_("call to tc_headers_hook \n")); |
025b0302 ME |
1145 | } |
1146 | ||
72574181 ILT |
1147 | #endif |
1148 | ||
025b0302 ME |
1149 | /* Various routines to kill one day */ |
1150 | /* Equal to MAX_PRECISION in atof-ieee.c */ | |
1151 | #define MAX_LITTLENUMS 6 | |
1152 | ||
1153 | /* Turn a string in input_line_pointer into a floating point constant of type | |
1154 | type, and store the appropriate bytes in *litP. The number of LITTLENUMS | |
1155 | emitted is stored in *sizeP . An error message is returned, or NULL on OK. | |
351efc81 | 1156 | */ |
025b0302 ME |
1157 | char * |
1158 | md_atof (type, litP, sizeP) | |
d6905776 | 1159 | int type; |
025b0302 ME |
1160 | char *litP; |
1161 | int *sizeP; | |
1162 | { | |
1163 | int prec; | |
d6905776 | 1164 | LITTLENUM_TYPE words[4]; |
025b0302 | 1165 | char *t; |
d6905776 | 1166 | int i; |
025b0302 ME |
1167 | |
1168 | switch (type) | |
1169 | { | |
1170 | case 'f': | |
025b0302 ME |
1171 | prec = 2; |
1172 | break; | |
1173 | ||
1174 | case 'd': | |
025b0302 ME |
1175 | prec = 4; |
1176 | break; | |
1177 | ||
025b0302 ME |
1178 | default: |
1179 | *sizeP = 0; | |
48401fcf | 1180 | return _("bad call to md_atof"); |
025b0302 | 1181 | } |
d6905776 | 1182 | |
025b0302 ME |
1183 | t = atof_ieee (input_line_pointer, type, words); |
1184 | if (t) | |
1185 | input_line_pointer = t; | |
1186 | ||
d6905776 KR |
1187 | *sizeP = prec * 2; |
1188 | ||
10c8c95e | 1189 | if (! target_big_endian) |
025b0302 | 1190 | { |
d6905776 KR |
1191 | for (i = prec - 1; i >= 0; i--) |
1192 | { | |
1193 | md_number_to_chars (litP, (valueT) words[i], 2); | |
1194 | litP += 2; | |
1195 | } | |
025b0302 | 1196 | } |
d6905776 KR |
1197 | else |
1198 | { | |
1199 | for (i = 0; i < prec; i++) | |
1200 | { | |
1201 | md_number_to_chars (litP, (valueT) words[i], 2); | |
1202 | litP += 2; | |
1203 | } | |
1204 | } | |
1205 | ||
1206 | return NULL; | |
025b0302 | 1207 | } |
d6905776 | 1208 | |
68d04794 JL |
1209 | /* Handle the .uses pseudo-op. This pseudo-op is used just before a |
1210 | call instruction. It refers to a label of the instruction which | |
1211 | loads the register which the call uses. We use it to generate a | |
1212 | special reloc for the linker. */ | |
1213 | ||
1214 | static void | |
1215 | s_uses (ignore) | |
1216 | int ignore; | |
1217 | { | |
1218 | expressionS ex; | |
1219 | ||
1220 | if (! sh_relax) | |
48401fcf | 1221 | as_warn (_(".uses pseudo-op seen when not relaxing")); |
68d04794 JL |
1222 | |
1223 | expression (&ex); | |
1224 | ||
1225 | if (ex.X_op != O_symbol || ex.X_add_number != 0) | |
1226 | { | |
48401fcf | 1227 | as_bad (_("bad .uses format")); |
68d04794 JL |
1228 | ignore_rest_of_line (); |
1229 | return; | |
1230 | } | |
1231 | ||
72574181 | 1232 | fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); |
d6905776 | 1233 | |
68d04794 JL |
1234 | demand_empty_rest_of_line (); |
1235 | } | |
351efc81 SC |
1236 | \f |
1237 | CONST char *md_shortopts = ""; | |
1238 | struct option md_longopts[] = { | |
d6905776 KR |
1239 | |
1240 | #define OPTION_RELAX (OPTION_MD_BASE) | |
48401fcf TT |
1241 | #define OPTION_LITTLE (OPTION_MD_BASE + 1) |
1242 | #define OPTION_SMALL (OPTION_LITTLE + 1) | |
d6905776 | 1243 | |
351efc81 | 1244 | {"relax", no_argument, NULL, OPTION_RELAX}, |
d6905776 | 1245 | {"little", no_argument, NULL, OPTION_LITTLE}, |
48401fcf | 1246 | {"small", no_argument, NULL, OPTION_SMALL}, |
351efc81 SC |
1247 | {NULL, no_argument, NULL, 0} |
1248 | }; | |
1249 | size_t md_longopts_size = sizeof(md_longopts); | |
025b0302 ME |
1250 | |
1251 | int | |
351efc81 SC |
1252 | md_parse_option (c, arg) |
1253 | int c; | |
1254 | char *arg; | |
025b0302 | 1255 | { |
351efc81 | 1256 | switch (c) |
025b0302 | 1257 | { |
351efc81 | 1258 | case OPTION_RELAX: |
68d04794 | 1259 | sh_relax = 1; |
351efc81 | 1260 | break; |
48401fcf | 1261 | |
d6905776 KR |
1262 | case OPTION_LITTLE: |
1263 | shl = 1; | |
10c8c95e | 1264 | target_big_endian = 0; |
d6905776 | 1265 | break; |
351efc81 | 1266 | |
48401fcf TT |
1267 | case OPTION_SMALL: |
1268 | sh_small = 1; | |
1269 | break; | |
1270 | ||
351efc81 SC |
1271 | default: |
1272 | return 0; | |
025b0302 | 1273 | } |
351efc81 | 1274 | |
025b0302 ME |
1275 | return 1; |
1276 | } | |
1277 | ||
351efc81 SC |
1278 | void |
1279 | md_show_usage (stream) | |
1280 | FILE *stream; | |
1281 | { | |
48401fcf | 1282 | fprintf(stream, _("\ |
351efc81 | 1283 | SH options:\n\ |
68d04794 | 1284 | -little generate little endian code\n\ |
48401fcf TT |
1285 | -relax alter jump instructions for long displacements\n\ |
1286 | -small align sections to 4 byte boundaries, not 16\n")); | |
351efc81 SC |
1287 | } |
1288 | \f | |
025b0302 ME |
1289 | void |
1290 | tc_Nout_fix_to_chars () | |
1291 | { | |
48401fcf | 1292 | printf (_("call to tc_Nout_fix_to_chars \n")); |
025b0302 ME |
1293 | abort (); |
1294 | } | |
1295 | ||
72574181 ILT |
1296 | /* This struct is used to pass arguments to sh_count_relocs through |
1297 | bfd_map_over_sections. */ | |
68d04794 | 1298 | |
72574181 | 1299 | struct sh_count_relocs |
68d04794 | 1300 | { |
72574181 ILT |
1301 | /* Symbol we are looking for. */ |
1302 | symbolS *sym; | |
1303 | /* Count of relocs found. */ | |
1304 | int count; | |
1305 | }; | |
68d04794 | 1306 | |
72574181 ILT |
1307 | /* Count the number of fixups in a section which refer to a particular |
1308 | symbol. When using BFD_ASSEMBLER, this is called via | |
1309 | bfd_map_over_sections. */ | |
1310 | ||
1311 | /*ARGSUSED*/ | |
1312 | static void | |
1313 | sh_count_relocs (abfd, sec, data) | |
1314 | bfd *abfd; | |
1315 | segT sec; | |
1316 | PTR data; | |
1317 | { | |
1318 | struct sh_count_relocs *info = (struct sh_count_relocs *) data; | |
1319 | segment_info_type *seginfo; | |
1320 | symbolS *sym; | |
1321 | fixS *fix; | |
1322 | ||
1323 | seginfo = seg_info (sec); | |
1324 | if (seginfo == NULL) | |
68d04794 JL |
1325 | return; |
1326 | ||
72574181 ILT |
1327 | sym = info->sym; |
1328 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
68d04794 | 1329 | { |
72574181 | 1330 | if (fix->fx_addsy == sym) |
68d04794 | 1331 | { |
72574181 ILT |
1332 | ++info->count; |
1333 | fix->fx_tcbit = 1; | |
1334 | } | |
1335 | } | |
1336 | } | |
68d04794 | 1337 | |
72574181 ILT |
1338 | /* Handle the count relocs for a particular section. When using |
1339 | BFD_ASSEMBLER, this is called via bfd_map_over_sections. */ | |
68d04794 | 1340 | |
72574181 ILT |
1341 | /*ARGSUSED*/ |
1342 | static void | |
1343 | sh_frob_section (abfd, sec, ignore) | |
1344 | bfd *abfd; | |
1345 | segT sec; | |
1346 | PTR ignore; | |
1347 | { | |
1348 | segment_info_type *seginfo; | |
1349 | fixS *fix; | |
68d04794 | 1350 | |
72574181 ILT |
1351 | seginfo = seg_info (sec); |
1352 | if (seginfo == NULL) | |
1353 | return; | |
68d04794 | 1354 | |
72574181 ILT |
1355 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) |
1356 | { | |
1357 | symbolS *sym; | |
1358 | bfd_vma val; | |
1359 | fixS *fscan; | |
1360 | struct sh_count_relocs info; | |
1361 | ||
1362 | if (fix->fx_r_type != BFD_RELOC_SH_USES) | |
1363 | continue; | |
1364 | ||
1365 | /* The BFD_RELOC_SH_USES reloc should refer to a defined local | |
1366 | symbol in the same section. */ | |
1367 | sym = fix->fx_addsy; | |
1368 | if (sym == NULL | |
1369 | || fix->fx_subsy != NULL | |
1370 | || fix->fx_addnumber != 0 | |
1371 | || S_GET_SEGMENT (sym) != sec | |
1372 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) | |
1373 | || S_GET_STORAGE_CLASS (sym) == C_EXT | |
1374 | #endif | |
1375 | || S_IS_EXTERNAL (sym)) | |
1376 | { | |
1377 | as_warn_where (fix->fx_file, fix->fx_line, | |
48401fcf | 1378 | _(".uses does not refer to a local symbol in the same section")); |
72574181 ILT |
1379 | continue; |
1380 | } | |
1381 | ||
1382 | /* Look through the fixups again, this time looking for one | |
1383 | at the same location as sym. */ | |
1384 | val = S_GET_VALUE (sym); | |
1385 | for (fscan = seginfo->fix_root; | |
1386 | fscan != NULL; | |
1387 | fscan = fscan->fx_next) | |
1388 | if (val == fscan->fx_frag->fr_address + fscan->fx_where | |
1389 | && fscan->fx_r_type != BFD_RELOC_SH_ALIGN | |
1390 | && fscan->fx_r_type != BFD_RELOC_SH_CODE | |
1391 | && fscan->fx_r_type != BFD_RELOC_SH_DATA | |
1392 | && fscan->fx_r_type != BFD_RELOC_SH_LABEL) | |
1393 | break; | |
1394 | if (fscan == NULL) | |
1395 | { | |
1396 | as_warn_where (fix->fx_file, fix->fx_line, | |
48401fcf | 1397 | _("can't find fixup pointed to by .uses")); |
72574181 ILT |
1398 | continue; |
1399 | } | |
68d04794 | 1400 | |
72574181 ILT |
1401 | if (fscan->fx_tcbit) |
1402 | { | |
1403 | /* We've already done this one. */ | |
1404 | continue; | |
1405 | } | |
68d04794 | 1406 | |
72574181 ILT |
1407 | /* fscan should also be a fixup to a local symbol in the same |
1408 | section. */ | |
1409 | sym = fscan->fx_addsy; | |
1410 | if (sym == NULL | |
1411 | || fscan->fx_subsy != NULL | |
1412 | || fscan->fx_addnumber != 0 | |
1413 | || S_GET_SEGMENT (sym) != sec | |
1414 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) | |
1415 | || S_GET_STORAGE_CLASS (sym) == C_EXT | |
1416 | #endif | |
1417 | || S_IS_EXTERNAL (sym)) | |
1418 | { | |
1419 | as_warn_where (fix->fx_file, fix->fx_line, | |
48401fcf | 1420 | _(".uses target does not refer to a local symbol in the same section")); |
72574181 | 1421 | continue; |
68d04794 | 1422 | } |
72574181 ILT |
1423 | |
1424 | /* Now we look through all the fixups of all the sections, | |
1425 | counting the number of times we find a reference to sym. */ | |
1426 | info.sym = sym; | |
1427 | info.count = 0; | |
1428 | #ifdef BFD_ASSEMBLER | |
1429 | bfd_map_over_sections (stdoutput, sh_count_relocs, (PTR) &info); | |
1430 | #else | |
1431 | { | |
1432 | int iscan; | |
1433 | ||
1434 | for (iscan = SEG_E0; iscan < SEG_UNKNOWN; iscan++) | |
1435 | sh_count_relocs ((bfd *) NULL, iscan, (PTR) &info); | |
1436 | } | |
1437 | #endif | |
1438 | ||
1439 | if (info.count < 1) | |
1440 | abort (); | |
1441 | ||
1442 | /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. | |
1443 | We have already adjusted the value of sym to include the | |
1444 | fragment address, so we undo that adjustment here. */ | |
1445 | subseg_change (sec, 0); | |
1446 | fix_new (sym->sy_frag, S_GET_VALUE (sym) - sym->sy_frag->fr_address, | |
1447 | 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); | |
68d04794 JL |
1448 | } |
1449 | } | |
1450 | ||
72574181 ILT |
1451 | /* This function is called after the symbol table has been completed, |
1452 | but before the relocs or section contents have been written out. | |
1453 | If we have seen any .uses pseudo-ops, they point to an instruction | |
1454 | which loads a register with the address of a function. We look | |
1455 | through the fixups to find where the function address is being | |
1456 | loaded from. We then generate a COUNT reloc giving the number of | |
1457 | times that function address is referred to. The linker uses this | |
1458 | information when doing relaxing, to decide when it can eliminate | |
1459 | the stored function address entirely. */ | |
1460 | ||
1461 | void | |
1462 | sh_frob_file () | |
1463 | { | |
1464 | if (! sh_relax) | |
1465 | return; | |
1466 | ||
1467 | #ifdef BFD_ASSEMBLER | |
1468 | bfd_map_over_sections (stdoutput, sh_frob_section, (PTR) NULL); | |
1469 | #else | |
1470 | { | |
1471 | int iseg; | |
1472 | ||
1473 | for (iseg = SEG_E0; iseg < SEG_UNKNOWN; iseg++) | |
1474 | sh_frob_section ((bfd *) NULL, iseg, (PTR) NULL); | |
1475 | } | |
1476 | #endif | |
1477 | } | |
1478 | ||
68d04794 JL |
1479 | /* Called after relaxing. Set the correct sizes of the fragments, and |
1480 | create relocs so that md_apply_fix will fill in the correct values. */ | |
1481 | ||
025b0302 | 1482 | void |
68d04794 | 1483 | md_convert_frag (headers, seg, fragP) |
72574181 ILT |
1484 | #ifdef BFD_ASSEMBLER |
1485 | bfd *headers; | |
1486 | #else | |
025b0302 | 1487 | object_headers *headers; |
72574181 | 1488 | #endif |
68d04794 | 1489 | segT seg; |
025b0302 | 1490 | fragS *fragP; |
025b0302 | 1491 | { |
025b0302 | 1492 | int donerelax = 0; |
68d04794 | 1493 | |
025b0302 ME |
1494 | switch (fragP->fr_subtype) |
1495 | { | |
1496 | case C (COND_JUMP, COND8): | |
d1a7caf9 | 1497 | case C (COND_JUMP_DELAY, COND8): |
68d04794 JL |
1498 | subseg_change (seg, 0); |
1499 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
72574181 | 1500 | 1, BFD_RELOC_SH_PCDISP8BY2); |
68d04794 JL |
1501 | fragP->fr_fix += 2; |
1502 | fragP->fr_var = 0; | |
025b0302 ME |
1503 | break; |
1504 | ||
1505 | case C (UNCOND_JUMP, UNCOND12): | |
68d04794 JL |
1506 | subseg_change (seg, 0); |
1507 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
72574181 | 1508 | 1, BFD_RELOC_SH_PCDISP12BY2); |
68d04794 JL |
1509 | fragP->fr_fix += 2; |
1510 | fragP->fr_var = 0; | |
025b0302 ME |
1511 | break; |
1512 | ||
1513 | case C (UNCOND_JUMP, UNCOND32): | |
1514 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): | |
68d04794 | 1515 | if (fragP->fr_symbol == NULL) |
48401fcf | 1516 | as_bad (_("at 0x%lx, displacement overflows 12-bit field"), |
68d04794 | 1517 | (unsigned long) fragP->fr_address); |
d1a7caf9 | 1518 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
48401fcf TT |
1519 | as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 12-bit field"), |
1520 | (unsigned long) fragP->fr_address, | |
1521 | S_GET_NAME (fragP->fr_symbol)); | |
68d04794 | 1522 | else |
48401fcf | 1523 | as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 12-bit field"), |
68d04794 | 1524 | (unsigned long) fragP->fr_address, |
68d04794 JL |
1525 | S_GET_NAME (fragP->fr_symbol)); |
1526 | ||
1527 | #if 0 /* This code works, but generates poor code and the compiler | |
1528 | should never produce a sequence that requires it to be used. */ | |
1529 | ||
1530 | /* A jump wont fit in 12 bits, make code which looks like | |
1531 | bra foo | |
1532 | mov.w @(0, PC), r14 | |
1533 | .long disp | |
1534 | foo: bra @r14 | |
351efc81 | 1535 | */ |
68d04794 | 1536 | int t = buffer[0] & 0x10; |
025b0302 | 1537 | |
68d04794 JL |
1538 | buffer[highbyte] = 0xa0; /* branch over move and disp */ |
1539 | buffer[lowbyte] = 3; | |
1540 | buffer[highbyte+2] = 0xd0 | JREG; /* Build mov insn */ | |
1541 | buffer[lowbyte+2] = 0x00; | |
1542 | ||
1543 | buffer[highbyte+4] = 0; /* space for 32 bit jump disp */ | |
1544 | buffer[lowbyte+4] = 0; | |
1545 | buffer[highbyte+6] = 0; | |
1546 | buffer[lowbyte+6] = 0; | |
1547 | ||
1548 | buffer[highbyte+8] = 0x40 | JREG; /* Build jmp @JREG */ | |
1549 | buffer[lowbyte+8] = t ? 0xb : 0x2b; | |
1550 | ||
1551 | buffer[highbyte+10] = 0x20; /* build nop */ | |
1552 | buffer[lowbyte+10] = 0x0b; | |
1553 | ||
1554 | /* Make reloc for the long disp */ | |
1555 | fix_new (fragP, | |
1556 | fragP->fr_fix + 4, | |
1557 | 4, | |
1558 | fragP->fr_symbol, | |
1559 | fragP->fr_offset, | |
1560 | 0, | |
72574181 | 1561 | BFD_RELOC_32); |
68d04794 JL |
1562 | fragP->fr_fix += UNCOND32_LENGTH; |
1563 | fragP->fr_var = 0; | |
1564 | donerelax = 1; | |
1565 | #endif | |
025b0302 | 1566 | |
025b0302 ME |
1567 | break; |
1568 | ||
1569 | case C (COND_JUMP, COND12): | |
d1a7caf9 | 1570 | case C (COND_JUMP_DELAY, COND12): |
68d04794 | 1571 | /* A bcond won't fit, so turn it into a b!cond; bra disp; nop */ |
025b0302 | 1572 | { |
68d04794 JL |
1573 | unsigned char *buffer = |
1574 | (unsigned char *) (fragP->fr_fix + fragP->fr_literal); | |
10c8c95e JW |
1575 | int highbyte = target_big_endian ? 0 : 1; |
1576 | int lowbyte = target_big_endian ? 1 : 0; | |
d1a7caf9 | 1577 | int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); |
68d04794 JL |
1578 | |
1579 | /* Toggle the true/false bit of the bcond. */ | |
1580 | buffer[highbyte] ^= 0x2; | |
1581 | ||
d1a7caf9 JR |
1582 | /* If this is a dalayed branch, we may not put the the bra in the |
1583 | slot. So we change it to a non-delayed branch, like that: | |
1584 | b! cond slot_label; bra disp; slot_label: slot_insn | |
1585 | ??? We should try if swapping the conditional branch and | |
1586 | its delay-slot insn already makes the branch reach. */ | |
1587 | ||
1588 | /* Build a relocation to six / four bytes farther on. */ | |
68d04794 JL |
1589 | subseg_change (seg, 0); |
1590 | fix_new (fragP, fragP->fr_fix, 2, | |
72574181 ILT |
1591 | #ifdef BFD_ASSEMBLER |
1592 | section_symbol (seg), | |
1593 | #else | |
1594 | seg_info (seg)->dot, | |
1595 | #endif | |
d1a7caf9 | 1596 | fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), |
72574181 | 1597 | 1, BFD_RELOC_SH_PCDISP8BY2); |
68d04794 JL |
1598 | |
1599 | /* Set up a jump instruction. */ | |
1600 | buffer[highbyte + 2] = 0xa0; | |
1601 | buffer[lowbyte + 2] = 0; | |
1602 | fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, | |
72574181 | 1603 | fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); |
68d04794 | 1604 | |
d1a7caf9 JR |
1605 | if (delay) |
1606 | { | |
1607 | buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ | |
1608 | fragP->fr_fix += 4; | |
1609 | } | |
1610 | else | |
1611 | { | |
1612 | /* Fill in a NOP instruction. */ | |
1613 | buffer[highbyte + 4] = 0x0; | |
1614 | buffer[lowbyte + 4] = 0x9; | |
1615 | ||
1616 | fragP->fr_fix += 6; | |
1617 | } | |
025b0302 ME |
1618 | fragP->fr_var = 0; |
1619 | donerelax = 1; | |
1620 | } | |
1621 | break; | |
1622 | ||
1623 | case C (COND_JUMP, COND32): | |
d1a7caf9 | 1624 | case C (COND_JUMP_DELAY, COND32): |
025b0302 | 1625 | case C (COND_JUMP, UNDEF_WORD_DISP): |
d1a7caf9 | 1626 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): |
68d04794 | 1627 | if (fragP->fr_symbol == NULL) |
48401fcf | 1628 | as_bad (_("at 0x%lx, displacement overflows 8-bit field"), |
68d04794 | 1629 | (unsigned long) fragP->fr_address); |
48401fcf TT |
1630 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
1631 | as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 8-bit field "), | |
1632 | (unsigned long) fragP->fr_address, | |
1633 | S_GET_NAME (fragP->fr_symbol)); | |
1634 | else | |
1635 | as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 8-bit field "), | |
68d04794 | 1636 | (unsigned long) fragP->fr_address, |
68d04794 JL |
1637 | S_GET_NAME (fragP->fr_symbol)); |
1638 | ||
1639 | #if 0 /* This code works, but generates poor code, and the compiler | |
1640 | should never produce a sequence that requires it to be used. */ | |
1641 | ||
1642 | /* A bcond won't fit and it won't go into a 12 bit | |
1643 | displacement either, the code sequence looks like: | |
1644 | b!cond foop | |
1645 | mov.w @(n, PC), r14 | |
1646 | jmp @r14 | |
1647 | nop | |
1648 | .long where | |
1649 | foop: | |
351efc81 | 1650 | */ |
025b0302 | 1651 | |
68d04794 | 1652 | buffer[0] ^= 0x2; /* Toggle T/F bit */ |
025b0302 | 1653 | #define JREG 14 |
68d04794 JL |
1654 | buffer[1] = 5; /* branch over mov, jump, nop and ptr */ |
1655 | buffer[2] = 0xd0 | JREG; /* Build mov insn */ | |
1656 | buffer[3] = 0x2; | |
1657 | buffer[4] = 0x40 | JREG; /* Build jmp @JREG */ | |
1658 | buffer[5] = 0x0b; | |
1659 | buffer[6] = 0x20; /* build nop */ | |
1660 | buffer[7] = 0x0b; | |
1661 | buffer[8] = 0; /* space for 32 bit jump disp */ | |
1662 | buffer[9] = 0; | |
1663 | buffer[10] = 0; | |
1664 | buffer[11] = 0; | |
1665 | buffer[12] = 0; | |
1666 | buffer[13] = 0; | |
1667 | /* Make reloc for the long disp */ | |
1668 | fix_new (fragP, | |
1669 | fragP->fr_fix + 8, | |
1670 | 4, | |
1671 | fragP->fr_symbol, | |
1672 | fragP->fr_offset, | |
1673 | 0, | |
72574181 | 1674 | BFD_RELOC_32); |
68d04794 JL |
1675 | fragP->fr_fix += COND32_LENGTH; |
1676 | fragP->fr_var = 0; | |
1677 | donerelax = 1; | |
1678 | #endif | |
1679 | ||
025b0302 ME |
1680 | break; |
1681 | ||
1682 | default: | |
1683 | abort (); | |
1684 | } | |
1685 | ||
68d04794 | 1686 | if (donerelax && !sh_relax) |
72574181 | 1687 | as_warn_where (fragP->fr_file, fragP->fr_line, |
48401fcf | 1688 | _("overflow in branch to %s; converted into longer instruction sequence"), |
72574181 ILT |
1689 | (fragP->fr_symbol != NULL |
1690 | ? S_GET_NAME (fragP->fr_symbol) | |
1691 | : "")); | |
025b0302 ME |
1692 | } |
1693 | ||
1694 | valueT | |
1695 | DEFUN (md_section_align, (seg, size), | |
1696 | segT seg AND | |
1697 | valueT size) | |
1698 | { | |
72574181 ILT |
1699 | #ifdef BFD_ASSEMBLER |
1700 | #ifdef OBJ_ELF | |
1701 | return size; | |
1702 | #else /* ! OBJ_ELF */ | |
1703 | return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1) | |
1704 | & (-1 << bfd_get_section_alignment (stdoutput, seg))); | |
1705 | #endif /* ! OBJ_ELF */ | |
1706 | #else /* ! BFD_ASSEMBLER */ | |
025b0302 ME |
1707 | return ((size + (1 << section_alignment[(int) seg]) - 1) |
1708 | & (-1 << section_alignment[(int) seg])); | |
72574181 ILT |
1709 | #endif /* ! BFD_ASSEMBLER */ |
1710 | } | |
1711 | ||
1712 | /* This static variable is set by s_uacons to tell sh_cons_align that | |
1713 | the expession does not need to be aligned. */ | |
1714 | ||
1715 | static int sh_no_align_cons = 0; | |
1716 | ||
1717 | /* This handles the unaligned space allocation pseudo-ops, such as | |
1718 | .uaword. .uaword is just like .word, but the value does not need | |
1719 | to be aligned. */ | |
025b0302 | 1720 | |
72574181 ILT |
1721 | static void |
1722 | s_uacons (bytes) | |
1723 | int bytes; | |
1724 | { | |
1725 | /* Tell sh_cons_align not to align this value. */ | |
1726 | sh_no_align_cons = 1; | |
1727 | cons (bytes); | |
1728 | } | |
1729 | ||
1730 | /* If a .word, et. al., pseud-op is seen, warn if the value is not | |
1731 | aligned correctly. Note that this can cause warnings to be issued | |
1732 | when assembling initialized structured which were declared with the | |
1733 | packed attribute. FIXME: Perhaps we should require an option to | |
1734 | enable this warning? */ | |
1735 | ||
1736 | void | |
1737 | sh_cons_align (nbytes) | |
1738 | int nbytes; | |
1739 | { | |
1740 | int nalign; | |
1741 | char *p; | |
1742 | ||
1743 | if (sh_no_align_cons) | |
1744 | { | |
1745 | /* This is an unaligned pseudo-op. */ | |
1746 | sh_no_align_cons = 0; | |
1747 | return; | |
1748 | } | |
1749 | ||
1750 | nalign = 0; | |
1751 | while ((nbytes & 1) == 0) | |
1752 | { | |
1753 | ++nalign; | |
1754 | nbytes >>= 1; | |
1755 | } | |
1756 | ||
1757 | if (nalign == 0) | |
1758 | return; | |
1759 | ||
1760 | if (now_seg == absolute_section) | |
1761 | { | |
1762 | if ((abs_section_offset & ((1 << nalign) - 1)) != 0) | |
48401fcf | 1763 | as_warn (_("misaligned data")); |
72574181 ILT |
1764 | return; |
1765 | } | |
1766 | ||
1767 | p = frag_var (rs_align_code, 1, 1, (relax_substateT) 0, | |
1768 | (symbolS *) NULL, (offsetT) nalign, (char *) NULL); | |
1769 | ||
1770 | record_alignment (now_seg, nalign); | |
025b0302 ME |
1771 | } |
1772 | ||
68d04794 | 1773 | /* When relaxing, we need to output a reloc for any .align directive |
72574181 ILT |
1774 | that requests alignment to a four byte boundary or larger. This is |
1775 | also where we check for misaligned data. */ | |
68d04794 JL |
1776 | |
1777 | void | |
1778 | sh_handle_align (frag) | |
1779 | fragS *frag; | |
1780 | { | |
1781 | if (sh_relax | |
1782 | && frag->fr_type == rs_align | |
1783 | && frag->fr_address + frag->fr_fix > 0 | |
8a2e1fdd ILT |
1784 | && frag->fr_offset > 1 |
1785 | && now_seg != bss_section) | |
68d04794 | 1786 | fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, |
72574181 ILT |
1787 | BFD_RELOC_SH_ALIGN); |
1788 | ||
1789 | if (frag->fr_type == rs_align_code | |
1790 | && frag->fr_next->fr_address - frag->fr_address - frag->fr_fix != 0) | |
48401fcf | 1791 | as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data")); |
68d04794 JL |
1792 | } |
1793 | ||
1794 | /* This macro decides whether a particular reloc is an entry in a | |
1795 | switch table. It is used when relaxing, because the linker needs | |
1796 | to know about all such entries so that it can adjust them if | |
1797 | necessary. */ | |
1798 | ||
72574181 ILT |
1799 | #ifdef BFD_ASSEMBLER |
1800 | #define SWITCH_TABLE_CONS(fix) (0) | |
1801 | #else | |
1802 | #define SWITCH_TABLE_CONS(fix) \ | |
1803 | ((fix)->fx_r_type == 0 \ | |
1804 | && ((fix)->fx_size == 2 \ | |
48401fcf | 1805 | || (fix)->fx_size == 1 \ |
72574181 ILT |
1806 | || (fix)->fx_size == 4)) |
1807 | #endif | |
1808 | ||
68d04794 JL |
1809 | #define SWITCH_TABLE(fix) \ |
1810 | ((fix)->fx_addsy != NULL \ | |
1811 | && (fix)->fx_subsy != NULL \ | |
1812 | && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \ | |
1813 | && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \ | |
72574181 ILT |
1814 | && ((fix)->fx_r_type == BFD_RELOC_32 \ |
1815 | || (fix)->fx_r_type == BFD_RELOC_16 \ | |
48401fcf | 1816 | || (fix)->fx_r_type == BFD_RELOC_8 \ |
72574181 | 1817 | || SWITCH_TABLE_CONS (fix))) |
68d04794 JL |
1818 | |
1819 | /* See whether we need to force a relocation into the output file. | |
1820 | This is used to force out switch and PC relative relocations when | |
1821 | relaxing. */ | |
1822 | ||
1823 | int | |
1824 | sh_force_relocation (fix) | |
1825 | fixS *fix; | |
1826 | { | |
1827 | if (! sh_relax) | |
1828 | return 0; | |
1829 | ||
1830 | return (fix->fx_pcrel | |
1831 | || SWITCH_TABLE (fix) | |
72574181 ILT |
1832 | || fix->fx_r_type == BFD_RELOC_SH_COUNT |
1833 | || fix->fx_r_type == BFD_RELOC_SH_ALIGN | |
1834 | || fix->fx_r_type == BFD_RELOC_SH_CODE | |
1835 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
1836 | || fix->fx_r_type == BFD_RELOC_SH_LABEL); | |
68d04794 JL |
1837 | } |
1838 | ||
1839 | /* Apply a fixup to the object file. */ | |
1840 | ||
72574181 ILT |
1841 | #ifdef BFD_ASSEMBLER |
1842 | int | |
1843 | md_apply_fix (fixP, valp) | |
1844 | fixS *fixP; | |
1845 | valueT *valp; | |
1846 | #else | |
025b0302 ME |
1847 | void |
1848 | md_apply_fix (fixP, val) | |
1849 | fixS *fixP; | |
1850 | long val; | |
72574181 | 1851 | #endif |
025b0302 ME |
1852 | { |
1853 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; | |
10c8c95e JW |
1854 | int lowbyte = target_big_endian ? 1 : 0; |
1855 | int highbyte = target_big_endian ? 0 : 1; | |
72574181 ILT |
1856 | #ifdef BFD_ASSEMBLER |
1857 | long val = *valp; | |
1858 | #endif | |
48401fcf TT |
1859 | long max, min; |
1860 | int shift; | |
68d04794 | 1861 | |
d1a7caf9 JR |
1862 | #ifdef BFD_ASSEMBLER |
1863 | /* adjust_reloc_syms won't convert a reloc against a weak symbol | |
1864 | into a reloc against a section, but bfd_install_relocation will | |
1865 | screw up if the symbol is defined, so we have to adjust val here | |
1866 | to avoid the screw up later. */ | |
1867 | if (fixP->fx_addsy != NULL | |
1868 | && S_IS_WEAK (fixP->fx_addsy)) | |
1869 | val -= S_GET_VALUE (fixP->fx_addsy); | |
1870 | #endif | |
1871 | ||
72574181 | 1872 | #ifndef BFD_ASSEMBLER |
025b0302 ME |
1873 | if (fixP->fx_r_type == 0) |
1874 | { | |
351efc81 | 1875 | if (fixP->fx_size == 2) |
72574181 | 1876 | fixP->fx_r_type = BFD_RELOC_16; |
68d04794 | 1877 | else if (fixP->fx_size == 4) |
72574181 | 1878 | fixP->fx_r_type = BFD_RELOC_32; |
68d04794 | 1879 | else if (fixP->fx_size == 1) |
48401fcf | 1880 | fixP->fx_r_type = BFD_RELOC_8; |
68d04794 JL |
1881 | else |
1882 | abort (); | |
025b0302 | 1883 | } |
72574181 | 1884 | #endif |
025b0302 | 1885 | |
48401fcf TT |
1886 | max = min = 0; |
1887 | shift = 0; | |
025b0302 ME |
1888 | switch (fixP->fx_r_type) |
1889 | { | |
72574181 | 1890 | case BFD_RELOC_SH_IMM4: |
48401fcf | 1891 | max = 0xf; |
025b0302 ME |
1892 | *buf = (*buf & 0xf0) | (val & 0xf); |
1893 | break; | |
1894 | ||
72574181 | 1895 | case BFD_RELOC_SH_IMM4BY2: |
48401fcf TT |
1896 | max = 0xf; |
1897 | shift = 1; | |
025b0302 ME |
1898 | *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); |
1899 | break; | |
1900 | ||
72574181 | 1901 | case BFD_RELOC_SH_IMM4BY4: |
48401fcf TT |
1902 | max = 0xf; |
1903 | shift = 2; | |
025b0302 ME |
1904 | *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); |
1905 | break; | |
1906 | ||
72574181 | 1907 | case BFD_RELOC_SH_IMM8BY2: |
48401fcf TT |
1908 | max = 0xff; |
1909 | shift = 1; | |
025b0302 ME |
1910 | *buf = val >> 1; |
1911 | break; | |
1912 | ||
72574181 | 1913 | case BFD_RELOC_SH_IMM8BY4: |
48401fcf TT |
1914 | max = 0xff; |
1915 | shift = 2; | |
025b0302 ME |
1916 | *buf = val >> 2; |
1917 | break; | |
1918 | ||
72574181 ILT |
1919 | case BFD_RELOC_8: |
1920 | case BFD_RELOC_SH_IMM8: | |
48401fcf TT |
1921 | /* Sometimes the 8 bit value is sign extended (e.g., add) and |
1922 | sometimes it is not (e.g., and). We permit any 8 bit value. | |
1923 | Note that adding further restrictions may invalidate | |
1924 | reasonable looking assembly code, such as ``and -0x1,r0''. */ | |
1925 | max = 0xff; | |
1926 | min = - 0xff; | |
025b0302 ME |
1927 | *buf++ = val; |
1928 | break; | |
1929 | ||
72574181 | 1930 | case BFD_RELOC_SH_PCRELIMM8BY4: |
68d04794 JL |
1931 | /* The lower two bits of the PC are cleared before the |
1932 | displacement is added in. We can assume that the destination | |
1933 | is on a 4 byte bounday. If this instruction is also on a 4 | |
1934 | byte boundary, then we want | |
1935 | (target - here) / 4 | |
1936 | and target - here is a multiple of 4. | |
1937 | Otherwise, we are on a 2 byte boundary, and we want | |
1938 | (target - (here - 2)) / 4 | |
1939 | and target - here is not a multiple of 4. Computing | |
1940 | (target - (here - 2)) / 4 == (target - here + 2) / 4 | |
1941 | works for both cases, since in the first case the addition of | |
1942 | 2 will be removed by the division. target - here is in the | |
1943 | variable val. */ | |
1944 | val = (val + 2) / 4; | |
025b0302 | 1945 | if (val & ~0xff) |
48401fcf | 1946 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); |
d6905776 | 1947 | buf[lowbyte] = val; |
025b0302 ME |
1948 | break; |
1949 | ||
72574181 | 1950 | case BFD_RELOC_SH_PCRELIMM8BY2: |
025b0302 ME |
1951 | val /= 2; |
1952 | if (val & ~0xff) | |
48401fcf | 1953 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); |
d6905776 | 1954 | buf[lowbyte] = val; |
025b0302 ME |
1955 | break; |
1956 | ||
72574181 | 1957 | case BFD_RELOC_SH_PCDISP8BY2: |
68d04794 JL |
1958 | val /= 2; |
1959 | if (val < -0x80 || val > 0x7f) | |
48401fcf | 1960 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); |
68d04794 JL |
1961 | buf[lowbyte] = val; |
1962 | break; | |
1963 | ||
72574181 | 1964 | case BFD_RELOC_SH_PCDISP12BY2: |
68d04794 JL |
1965 | val /= 2; |
1966 | if (val < -0x800 || val >= 0x7ff) | |
48401fcf | 1967 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); |
68d04794 JL |
1968 | buf[lowbyte] = val & 0xff; |
1969 | buf[highbyte] |= (val >> 8) & 0xf; | |
1970 | break; | |
1971 | ||
72574181 | 1972 | case BFD_RELOC_32: |
10c8c95e | 1973 | if (! target_big_endian) |
d6905776 KR |
1974 | { |
1975 | *buf++ = val >> 0; | |
1976 | *buf++ = val >> 8; | |
1977 | *buf++ = val >> 16; | |
1978 | *buf++ = val >> 24; | |
1979 | } | |
1980 | else | |
1981 | { | |
1982 | *buf++ = val >> 24; | |
1983 | *buf++ = val >> 16; | |
1984 | *buf++ = val >> 8; | |
1985 | *buf++ = val >> 0; | |
1986 | } | |
025b0302 ME |
1987 | break; |
1988 | ||
72574181 | 1989 | case BFD_RELOC_16: |
10c8c95e | 1990 | if (! target_big_endian) |
d6905776 KR |
1991 | { |
1992 | *buf++ = val >> 0; | |
1993 | *buf++ = val >> 8; | |
1994 | } | |
1995 | else | |
1996 | { | |
1997 | *buf++ = val >> 8; | |
1998 | *buf++ = val >> 0; | |
1999 | } | |
351efc81 SC |
2000 | break; |
2001 | ||
72574181 | 2002 | case BFD_RELOC_SH_USES: |
68d04794 JL |
2003 | /* Pass the value into sh_coff_reloc_mangle. */ |
2004 | fixP->fx_addnumber = val; | |
2005 | break; | |
2006 | ||
72574181 ILT |
2007 | case BFD_RELOC_SH_COUNT: |
2008 | case BFD_RELOC_SH_ALIGN: | |
2009 | case BFD_RELOC_SH_CODE: | |
2010 | case BFD_RELOC_SH_DATA: | |
2011 | case BFD_RELOC_SH_LABEL: | |
68d04794 JL |
2012 | /* Nothing to do here. */ |
2013 | break; | |
2014 | ||
025b0302 ME |
2015 | default: |
2016 | abort (); | |
2017 | } | |
72574181 | 2018 | |
48401fcf TT |
2019 | if (shift != 0) |
2020 | { | |
2021 | if ((val & ((1 << shift) - 1)) != 0) | |
2022 | as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); | |
2023 | if (val >= 0) | |
2024 | val >>= shift; | |
2025 | else | |
2026 | val = ((val >> shift) | |
2027 | | ((long) -1 & ~ ((long) -1 >> shift))); | |
2028 | } | |
2029 | if (max != 0 && (val < min || val > max)) | |
2030 | as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); | |
2031 | ||
72574181 ILT |
2032 | #ifdef BFD_ASSEMBLER |
2033 | return 0; | |
2034 | #endif | |
025b0302 ME |
2035 | } |
2036 | ||
68d04794 JL |
2037 | /* Called just before address relaxation. Return the length |
2038 | by which a fragment must grow to reach it's destination. */ | |
2039 | ||
025b0302 ME |
2040 | int |
2041 | md_estimate_size_before_relax (fragP, segment_type) | |
2042 | register fragS *fragP; | |
2043 | register segT segment_type; | |
2044 | { | |
2045 | switch (fragP->fr_subtype) | |
2046 | { | |
2047 | case C (UNCOND_JUMP, UNDEF_DISP): | |
2048 | /* used to be a branch to somewhere which was unknown */ | |
2049 | if (!fragP->fr_symbol) | |
2050 | { | |
2051 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
2052 | fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length; | |
2053 | } | |
2054 | else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
2055 | { | |
2056 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
2057 | fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length; | |
2058 | } | |
2059 | else | |
2060 | { | |
2061 | fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); | |
2062 | fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length; | |
2063 | return md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length; | |
2064 | } | |
2065 | break; | |
2066 | ||
2067 | default: | |
2068 | abort (); | |
2069 | case C (COND_JUMP, UNDEF_DISP): | |
d1a7caf9 | 2070 | case C (COND_JUMP_DELAY, UNDEF_DISP): |
025b0302 ME |
2071 | /* used to be a branch to somewhere which was unknown */ |
2072 | if (fragP->fr_symbol | |
2073 | && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
2074 | { | |
d1a7caf9 | 2075 | int what = GET_WHAT (fragP->fr_subtype); |
025b0302 | 2076 | /* Got a symbol and it's defined in this segment, become byte |
351efc81 | 2077 | sized - maybe it will fix up */ |
d1a7caf9 JR |
2078 | fragP->fr_subtype = C (what, COND8); |
2079 | fragP->fr_var = md_relax_table[C (what, COND8)].rlx_length; | |
025b0302 ME |
2080 | } |
2081 | else if (fragP->fr_symbol) | |
2082 | { | |
d1a7caf9 | 2083 | int what = GET_WHAT (fragP->fr_subtype); |
025b0302 | 2084 | /* Its got a segment, but its not ours, so it will always be long */ |
d1a7caf9 JR |
2085 | fragP->fr_subtype = C (what, UNDEF_WORD_DISP); |
2086 | fragP->fr_var = md_relax_table[C (what, COND32)].rlx_length; | |
2087 | return md_relax_table[C (what, COND32)].rlx_length; | |
025b0302 ME |
2088 | } |
2089 | else | |
2090 | { | |
d1a7caf9 | 2091 | int what = GET_WHAT (fragP->fr_subtype); |
025b0302 | 2092 | /* We know the abs value */ |
d1a7caf9 JR |
2093 | fragP->fr_subtype = C (what, COND8); |
2094 | fragP->fr_var = md_relax_table[C (what, COND8)].rlx_length; | |
025b0302 ME |
2095 | } |
2096 | ||
2097 | break; | |
2098 | } | |
2099 | return fragP->fr_var; | |
2100 | } | |
2101 | ||
2102 | /* Put number into target byte order */ | |
2103 | ||
2104 | void | |
2105 | md_number_to_chars (ptr, use, nbytes) | |
2106 | char *ptr; | |
2107 | valueT use; | |
2108 | int nbytes; | |
2109 | { | |
10c8c95e | 2110 | if (! target_big_endian) |
d6905776 KR |
2111 | number_to_chars_littleendian (ptr, use, nbytes); |
2112 | else | |
2113 | number_to_chars_bigendian (ptr, use, nbytes); | |
025b0302 | 2114 | } |
351efc81 | 2115 | |
025b0302 ME |
2116 | long |
2117 | md_pcrel_from (fixP) | |
2118 | fixS *fixP; | |
025b0302 | 2119 | { |
68d04794 JL |
2120 | return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; |
2121 | } | |
2122 | ||
72574181 ILT |
2123 | #ifdef OBJ_COFF |
2124 | ||
68d04794 JL |
2125 | int |
2126 | tc_coff_sizemachdep (frag) | |
2127 | fragS *frag; | |
2128 | { | |
2129 | return md_relax_table[frag->fr_subtype].rlx_length; | |
025b0302 ME |
2130 | } |
2131 | ||
72574181 ILT |
2132 | #endif /* OBJ_COFF */ |
2133 | ||
9addcbb1 ILT |
2134 | /* When we align the .text section, insert the correct NOP pattern. */ |
2135 | ||
2136 | int | |
72574181 | 2137 | sh_do_align (n, fill, len, max) |
9addcbb1 ILT |
2138 | int n; |
2139 | const char *fill; | |
71dd3c40 | 2140 | int len; |
72574181 | 2141 | int max; |
9addcbb1 | 2142 | { |
72574181 | 2143 | if (fill == NULL |
9addcbb1 | 2144 | #ifdef BFD_ASSEMBLER |
72574181 ILT |
2145 | && (now_seg->flags & SEC_CODE) != 0 |
2146 | #else | |
2147 | && now_seg != data_section | |
2148 | && now_seg != bss_section | |
9addcbb1 | 2149 | #endif |
bccbc0aa | 2150 | && n > 1) |
9addcbb1 ILT |
2151 | { |
2152 | static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; | |
2153 | static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; | |
2154 | ||
fcee3e24 ILT |
2155 | /* First align to a 2 byte boundary, in case there is an odd |
2156 | .byte. */ | |
72574181 | 2157 | frag_align (1, 0, 0); |
9addcbb1 | 2158 | if (target_big_endian) |
72574181 | 2159 | frag_align_pattern (n, big_nop_pattern, sizeof big_nop_pattern, max); |
9addcbb1 | 2160 | else |
72574181 ILT |
2161 | frag_align_pattern (n, little_nop_pattern, sizeof little_nop_pattern, |
2162 | max); | |
9addcbb1 ILT |
2163 | return 1; |
2164 | } | |
2165 | ||
2166 | return 0; | |
2167 | } | |
2168 | ||
72574181 | 2169 | #ifndef BFD_ASSEMBLER |
68d04794 JL |
2170 | #ifdef OBJ_COFF |
2171 | ||
72574181 ILT |
2172 | /* Map BFD relocs to SH COFF relocs. */ |
2173 | ||
2174 | struct reloc_map | |
2175 | { | |
2176 | bfd_reloc_code_real_type bfd_reloc; | |
2177 | int sh_reloc; | |
2178 | }; | |
2179 | ||
2180 | static const struct reloc_map coff_reloc_map[] = | |
2181 | { | |
2182 | { BFD_RELOC_32, R_SH_IMM32 }, | |
2183 | { BFD_RELOC_16, R_SH_IMM16 }, | |
2184 | { BFD_RELOC_8, R_SH_IMM8 }, | |
2185 | { BFD_RELOC_SH_PCDISP8BY2, R_SH_PCDISP8BY2 }, | |
2186 | { BFD_RELOC_SH_PCDISP12BY2, R_SH_PCDISP }, | |
2187 | { BFD_RELOC_SH_IMM4, R_SH_IMM4 }, | |
2188 | { BFD_RELOC_SH_IMM4BY2, R_SH_IMM4BY2 }, | |
2189 | { BFD_RELOC_SH_IMM4BY4, R_SH_IMM4BY4 }, | |
2190 | { BFD_RELOC_SH_IMM8, R_SH_IMM8 }, | |
2191 | { BFD_RELOC_SH_IMM8BY2, R_SH_IMM8BY2 }, | |
2192 | { BFD_RELOC_SH_IMM8BY4, R_SH_IMM8BY4 }, | |
2193 | { BFD_RELOC_SH_PCRELIMM8BY2, R_SH_PCRELIMM8BY2 }, | |
2194 | { BFD_RELOC_SH_PCRELIMM8BY4, R_SH_PCRELIMM8BY4 }, | |
48401fcf | 2195 | { BFD_RELOC_8_PCREL, R_SH_SWITCH8 }, |
72574181 ILT |
2196 | { BFD_RELOC_SH_SWITCH16, R_SH_SWITCH16 }, |
2197 | { BFD_RELOC_SH_SWITCH32, R_SH_SWITCH32 }, | |
2198 | { BFD_RELOC_SH_USES, R_SH_USES }, | |
2199 | { BFD_RELOC_SH_COUNT, R_SH_COUNT }, | |
2200 | { BFD_RELOC_SH_ALIGN, R_SH_ALIGN }, | |
2201 | { BFD_RELOC_SH_CODE, R_SH_CODE }, | |
2202 | { BFD_RELOC_SH_DATA, R_SH_DATA }, | |
2203 | { BFD_RELOC_SH_LABEL, R_SH_LABEL }, | |
2204 | { BFD_RELOC_UNUSED, 0 } | |
2205 | }; | |
2206 | ||
68d04794 JL |
2207 | /* Adjust a reloc for the SH. This is similar to the generic code, |
2208 | but does some minor tweaking. */ | |
2209 | ||
2210 | void | |
2211 | sh_coff_reloc_mangle (seg, fix, intr, paddr) | |
2212 | segment_info_type *seg; | |
2213 | fixS *fix; | |
2214 | struct internal_reloc *intr; | |
2215 | unsigned int paddr; | |
025b0302 | 2216 | { |
68d04794 JL |
2217 | symbolS *symbol_ptr = fix->fx_addsy; |
2218 | symbolS *dot; | |
2219 | ||
2220 | intr->r_vaddr = paddr + fix->fx_frag->fr_address + fix->fx_where; | |
2221 | ||
2222 | if (! SWITCH_TABLE (fix)) | |
2223 | { | |
72574181 ILT |
2224 | const struct reloc_map *rm; |
2225 | ||
2226 | for (rm = coff_reloc_map; rm->bfd_reloc != BFD_RELOC_UNUSED; rm++) | |
2227 | if (rm->bfd_reloc == (bfd_reloc_code_real_type) fix->fx_r_type) | |
2228 | break; | |
2229 | if (rm->bfd_reloc == BFD_RELOC_UNUSED) | |
2230 | as_bad_where (fix->fx_file, fix->fx_line, | |
48401fcf | 2231 | _("Can not represent %s relocation in this object file format"), |
72574181 ILT |
2232 | bfd_get_reloc_code_name (fix->fx_r_type)); |
2233 | intr->r_type = rm->sh_reloc; | |
68d04794 JL |
2234 | intr->r_offset = 0; |
2235 | } | |
2236 | else | |
2237 | { | |
2238 | know (sh_relax); | |
2239 | ||
72574181 | 2240 | if (fix->fx_r_type == BFD_RELOC_16) |
68d04794 | 2241 | intr->r_type = R_SH_SWITCH16; |
48401fcf TT |
2242 | else if (fix->fx_r_type == BFD_RELOC_8) |
2243 | intr->r_type = R_SH_SWITCH8; | |
72574181 | 2244 | else if (fix->fx_r_type == BFD_RELOC_32) |
68d04794 JL |
2245 | intr->r_type = R_SH_SWITCH32; |
2246 | else | |
2247 | abort (); | |
2248 | ||
2249 | /* For a switch reloc, we set r_offset to the difference between | |
2250 | the reloc address and the subtrahend. When the linker is | |
2251 | doing relaxing, it can use the determine the starting and | |
2252 | ending points of the switch difference expression. */ | |
2253 | intr->r_offset = intr->r_vaddr - S_GET_VALUE (fix->fx_subsy); | |
2254 | } | |
2255 | ||
2256 | /* PC relative relocs are always against the current section. */ | |
2257 | if (symbol_ptr == NULL) | |
025b0302 | 2258 | { |
68d04794 | 2259 | switch (fix->fx_r_type) |
025b0302 | 2260 | { |
72574181 ILT |
2261 | case BFD_RELOC_SH_PCRELIMM8BY2: |
2262 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
2263 | case BFD_RELOC_SH_PCDISP8BY2: | |
2264 | case BFD_RELOC_SH_PCDISP12BY2: | |
2265 | case BFD_RELOC_SH_USES: | |
68d04794 | 2266 | symbol_ptr = seg->dot; |
025b0302 ME |
2267 | break; |
2268 | default: | |
68d04794 | 2269 | break; |
025b0302 ME |
2270 | } |
2271 | } | |
025b0302 | 2272 | |
72574181 | 2273 | if (fix->fx_r_type == BFD_RELOC_SH_USES) |
68d04794 JL |
2274 | { |
2275 | /* We can't store the offset in the object file, since this | |
2276 | reloc does not take up any space, so we store it in r_offset. | |
2277 | The fx_addnumber field was set in md_apply_fix. */ | |
2278 | intr->r_offset = fix->fx_addnumber; | |
2279 | } | |
72574181 | 2280 | else if (fix->fx_r_type == BFD_RELOC_SH_COUNT) |
68d04794 JL |
2281 | { |
2282 | /* We can't store the count in the object file, since this reloc | |
2283 | does not take up any space, so we store it in r_offset. The | |
2284 | fx_offset field was set when the fixup was created in | |
2285 | sh_coff_frob_file. */ | |
2286 | intr->r_offset = fix->fx_offset; | |
2287 | /* This reloc is always absolute. */ | |
2288 | symbol_ptr = NULL; | |
2289 | } | |
72574181 | 2290 | else if (fix->fx_r_type == BFD_RELOC_SH_ALIGN) |
68d04794 JL |
2291 | { |
2292 | /* Store the alignment in the r_offset field. */ | |
2293 | intr->r_offset = fix->fx_offset; | |
2294 | /* This reloc is always absolute. */ | |
2295 | symbol_ptr = NULL; | |
2296 | } | |
72574181 ILT |
2297 | else if (fix->fx_r_type == BFD_RELOC_SH_CODE |
2298 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
2299 | || fix->fx_r_type == BFD_RELOC_SH_LABEL) | |
bccbc0aa ILT |
2300 | { |
2301 | /* These relocs are always absolute. */ | |
2302 | symbol_ptr = NULL; | |
2303 | } | |
68d04794 JL |
2304 | |
2305 | /* Turn the segment of the symbol into an offset. */ | |
2306 | if (symbol_ptr != NULL) | |
2307 | { | |
2308 | dot = segment_info[S_GET_SEGMENT (symbol_ptr)].dot; | |
2309 | if (dot != NULL) | |
2310 | intr->r_symndx = dot->sy_number; | |
2311 | else | |
2312 | intr->r_symndx = symbol_ptr->sy_number; | |
2313 | } | |
2314 | else | |
2315 | intr->r_symndx = -1; | |
025b0302 | 2316 | } |
68d04794 | 2317 | |
72574181 ILT |
2318 | #endif /* OBJ_COFF */ |
2319 | #endif /* ! BFD_ASSEMBLER */ | |
2320 | ||
2321 | #ifdef BFD_ASSEMBLER | |
2322 | ||
2323 | /* Create a reloc. */ | |
2324 | ||
2325 | arelent * | |
2326 | tc_gen_reloc (section, fixp) | |
2327 | asection *section; | |
2328 | fixS *fixp; | |
2329 | { | |
2330 | arelent *rel; | |
2331 | bfd_reloc_code_real_type r_type; | |
2332 | ||
2333 | rel = (arelent *) xmalloc (sizeof (arelent)); | |
2334 | rel->sym_ptr_ptr = &fixp->fx_addsy->bsym; | |
2335 | rel->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
2336 | ||
2337 | r_type = fixp->fx_r_type; | |
2338 | ||
2339 | if (SWITCH_TABLE (fixp)) | |
2340 | { | |
2341 | rel->addend = rel->address - S_GET_VALUE (fixp->fx_subsy); | |
2342 | if (r_type == BFD_RELOC_16) | |
2343 | r_type = BFD_RELOC_SH_SWITCH16; | |
48401fcf TT |
2344 | else if (r_type == BFD_RELOC_8) |
2345 | r_type = BFD_RELOC_8_PCREL; | |
72574181 ILT |
2346 | else if (r_type == BFD_RELOC_32) |
2347 | r_type = BFD_RELOC_SH_SWITCH32; | |
2348 | else | |
2349 | abort (); | |
2350 | } | |
2351 | else if (r_type == BFD_RELOC_SH_USES) | |
2352 | rel->addend = fixp->fx_addnumber; | |
2353 | else if (r_type == BFD_RELOC_SH_COUNT) | |
2354 | rel->addend = fixp->fx_offset; | |
2355 | else if (r_type == BFD_RELOC_SH_ALIGN) | |
2356 | rel->addend = fixp->fx_offset; | |
2357 | else if (fixp->fx_pcrel) | |
2358 | rel->addend = fixp->fx_addnumber; | |
2359 | else | |
2360 | rel->addend = 0; | |
2361 | ||
2362 | rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); | |
2363 | if (rel->howto == NULL) | |
2364 | { | |
2365 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
48401fcf | 2366 | _("Cannot represent relocation type %s"), |
72574181 ILT |
2367 | bfd_get_reloc_code_name (r_type)); |
2368 | /* Set howto to a garbage value so that we can keep going. */ | |
2369 | rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); | |
2370 | assert (rel->howto != NULL); | |
2371 | } | |
2372 | ||
2373 | return rel; | |
2374 | } | |
2375 | ||
2376 | #endif /* BFD_ASSEMBLER */ |