Commit | Line | Data |
---|---|---|
ef230218 | 1 | /* tc-sh.c -- Assemble code for the Renesas / SuperH SH |
4aa3e325 NC |
2 | Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, |
3 | 2003, 2004 Free Software Foundation, Inc. | |
252b5132 RH |
4 | |
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
6b31947e | 22 | /* Written By Steve Chamberlain <sac@cygnus.com> */ |
252b5132 RH |
23 | |
24 | #include <stdio.h> | |
25 | #include "as.h" | |
26 | #include "bfd.h" | |
27 | #include "subsegs.h" | |
28 | #define DEFINE_TABLE | |
29 | #include "opcodes/sh-opc.h" | |
3882b010 | 30 | #include "safe-ctype.h" |
43841e91 | 31 | #include "struc-symbol.h" |
d4845d57 JR |
32 | |
33 | #ifdef OBJ_ELF | |
34 | #include "elf/sh.h" | |
35 | #endif | |
36 | ||
0d10e182 | 37 | #include "dwarf2dbg.h" |
2ce4cc60 | 38 | #include "dw2gencfi.h" |
0d10e182 | 39 | |
e08ae979 HPN |
40 | typedef struct |
41 | { | |
42 | sh_arg_type type; | |
43 | int reg; | |
44 | expressionS immediate; | |
45 | } | |
46 | sh_operand_info; | |
47 | ||
252b5132 RH |
48 | const char comment_chars[] = "!"; |
49 | const char line_separator_chars[] = ";"; | |
50 | const char line_comment_chars[] = "!#"; | |
51 | ||
8edc77b9 KK |
52 | static void s_uses (int); |
53 | static void s_uacons (int); | |
252b5132 | 54 | |
a1cc9221 | 55 | #ifdef OBJ_ELF |
8edc77b9 | 56 | static void sh_elf_cons (int); |
538cd60f | 57 | |
a1cc9221 AO |
58 | symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ |
59 | #endif | |
60 | ||
05982cac | 61 | static void |
8edc77b9 | 62 | big (int ignore ATTRIBUTE_UNUSED) |
05982cac HPN |
63 | { |
64 | if (! target_big_endian) | |
65 | as_bad (_("directive .big encountered when option -big required")); | |
66 | ||
67 | /* Stop further messages. */ | |
68 | target_big_endian = 1; | |
69 | } | |
252b5132 RH |
70 | |
71 | static void | |
8edc77b9 | 72 | little (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 73 | { |
05982cac HPN |
74 | if (target_big_endian) |
75 | as_bad (_("directive .little encountered when option -little required")); | |
76 | ||
77 | /* Stop further messages. */ | |
252b5132 RH |
78 | target_big_endian = 0; |
79 | } | |
80 | ||
d4845d57 JR |
81 | /* This table describes all the machine specific pseudo-ops the assembler |
82 | has to support. The fields are: | |
83 | pseudo-op name without dot | |
84 | function to call to execute this pseudo-op | |
6b31947e | 85 | Integer arg to pass to the function. */ |
d4845d57 | 86 | |
252b5132 RH |
87 | const pseudo_typeS md_pseudo_table[] = |
88 | { | |
a1cc9221 AO |
89 | #ifdef OBJ_ELF |
90 | {"long", sh_elf_cons, 4}, | |
91 | {"int", sh_elf_cons, 4}, | |
92 | {"word", sh_elf_cons, 2}, | |
93 | {"short", sh_elf_cons, 2}, | |
94 | #else | |
252b5132 RH |
95 | {"int", cons, 4}, |
96 | {"word", cons, 2}, | |
a1cc9221 | 97 | #endif /* OBJ_ELF */ |
05982cac | 98 | {"big", big, 0}, |
252b5132 RH |
99 | {"form", listing_psize, 0}, |
100 | {"little", little, 0}, | |
101 | {"heading", listing_title, 0}, | |
102 | {"import", s_ignore, 0}, | |
103 | {"page", listing_eject, 0}, | |
104 | {"program", s_ignore, 0}, | |
105 | {"uses", s_uses, 0}, | |
106 | {"uaword", s_uacons, 2}, | |
107 | {"ualong", s_uacons, 4}, | |
de68de20 AO |
108 | {"uaquad", s_uacons, 8}, |
109 | {"2byte", s_uacons, 2}, | |
110 | {"4byte", s_uacons, 4}, | |
111 | {"8byte", s_uacons, 8}, | |
324bfcf3 AO |
112 | #ifdef HAVE_SH64 |
113 | {"mode", s_sh64_mode, 0 }, | |
114 | ||
115 | /* Have the old name too. */ | |
116 | {"isa", s_sh64_mode, 0 }, | |
117 | ||
118 | /* Assert that the right ABI is used. */ | |
119 | {"abi", s_sh64_abi, 0 }, | |
120 | ||
121 | { "vtable_inherit", sh64_vtable_inherit, 0 }, | |
122 | { "vtable_entry", sh64_vtable_entry, 0 }, | |
123 | #endif /* HAVE_SH64 */ | |
252b5132 RH |
124 | {0, 0, 0} |
125 | }; | |
126 | ||
127 | /*int md_reloc_size; */ | |
128 | ||
129 | int sh_relax; /* set if -relax seen */ | |
130 | ||
131 | /* Whether -small was seen. */ | |
132 | ||
133 | int sh_small; | |
134 | ||
f55629b8 KK |
135 | /* Flag to generate relocations against symbol values for local symbols. */ |
136 | ||
137 | static int dont_adjust_reloc_32; | |
138 | ||
bdfaef52 | 139 | /* preset architecture set, if given; zero otherwise. */ |
d4845d57 | 140 | |
f6f9408f | 141 | static unsigned int preset_target_arch; |
d4845d57 JR |
142 | |
143 | /* The bit mask of architectures that could | |
67c1ffbe | 144 | accommodate the insns seen so far. */ |
f6f9408f | 145 | static unsigned int valid_arch; |
d4845d57 | 146 | |
252b5132 RH |
147 | const char EXP_CHARS[] = "eE"; |
148 | ||
6b31947e | 149 | /* Chars that mean this number is a floating point constant. */ |
252b5132 RH |
150 | /* As in 0f12.456 */ |
151 | /* or 0d1.2345e12 */ | |
152 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
153 | ||
154 | #define C(a,b) ENCODE_RELAX(a,b) | |
155 | ||
252b5132 RH |
156 | #define ENCODE_RELAX(what,length) (((what) << 4) + (length)) |
157 | #define GET_WHAT(x) ((x>>4)) | |
158 | ||
67c1ffbe | 159 | /* These are the three types of relaxable instruction. */ |
324bfcf3 AO |
160 | /* These are the types of relaxable instructions; except for END which is |
161 | a marker. */ | |
252b5132 RH |
162 | #define COND_JUMP 1 |
163 | #define COND_JUMP_DELAY 2 | |
164 | #define UNCOND_JUMP 3 | |
324bfcf3 AO |
165 | |
166 | #ifdef HAVE_SH64 | |
167 | ||
168 | /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */ | |
169 | #define SH64PCREL16_32 4 | |
170 | /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */ | |
171 | #define SH64PCREL16_64 5 | |
172 | ||
173 | /* Variants of the above for adjusting the insn to PTA or PTB according to | |
174 | the label. */ | |
175 | #define SH64PCREL16PT_32 6 | |
176 | #define SH64PCREL16PT_64 7 | |
177 | ||
178 | /* A MOVI expansion, expanding to at most 32 or 64 bits. */ | |
179 | #define MOVI_IMM_32 8 | |
180 | #define MOVI_IMM_32_PCREL 9 | |
181 | #define MOVI_IMM_64 10 | |
182 | #define MOVI_IMM_64_PCREL 11 | |
183 | #define END 12 | |
184 | ||
185 | #else /* HAVE_SH64 */ | |
186 | ||
252b5132 RH |
187 | #define END 4 |
188 | ||
324bfcf3 AO |
189 | #endif /* HAVE_SH64 */ |
190 | ||
252b5132 RH |
191 | #define UNDEF_DISP 0 |
192 | #define COND8 1 | |
193 | #define COND12 2 | |
194 | #define COND32 3 | |
252b5132 RH |
195 | #define UNDEF_WORD_DISP 4 |
196 | ||
197 | #define UNCOND12 1 | |
198 | #define UNCOND32 2 | |
199 | ||
324bfcf3 AO |
200 | #ifdef HAVE_SH64 |
201 | #define UNDEF_SH64PCREL 0 | |
202 | #define SH64PCREL16 1 | |
203 | #define SH64PCREL32 2 | |
204 | #define SH64PCREL48 3 | |
205 | #define SH64PCREL64 4 | |
206 | #define SH64PCRELPLT 5 | |
207 | ||
208 | #define UNDEF_MOVI 0 | |
209 | #define MOVI_16 1 | |
210 | #define MOVI_32 2 | |
211 | #define MOVI_48 3 | |
212 | #define MOVI_64 4 | |
213 | #define MOVI_PLT 5 | |
214 | #define MOVI_GOTOFF 6 | |
215 | #define MOVI_GOTPC 7 | |
216 | #endif /* HAVE_SH64 */ | |
217 | ||
252b5132 RH |
218 | /* Branch displacements are from the address of the branch plus |
219 | four, thus all minimum and maximum values have 4 added to them. */ | |
220 | #define COND8_F 258 | |
221 | #define COND8_M -252 | |
222 | #define COND8_LENGTH 2 | |
223 | ||
224 | /* There is one extra instruction before the branch, so we must add | |
225 | two more bytes to account for it. */ | |
226 | #define COND12_F 4100 | |
227 | #define COND12_M -4090 | |
228 | #define COND12_LENGTH 6 | |
229 | ||
230 | #define COND12_DELAY_LENGTH 4 | |
231 | ||
232 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
233 | since this relocation type is not supported yet. */ | |
234 | #define COND32_F (1<<30) | |
235 | #define COND32_M -(1<<30) | |
236 | #define COND32_LENGTH 14 | |
237 | ||
238 | #define UNCOND12_F 4098 | |
239 | #define UNCOND12_M -4092 | |
240 | #define UNCOND12_LENGTH 2 | |
241 | ||
242 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
243 | since this relocation type is not supported yet. */ | |
244 | #define UNCOND32_F (1<<30) | |
245 | #define UNCOND32_M -(1<<30) | |
246 | #define UNCOND32_LENGTH 14 | |
247 | ||
324bfcf3 AO |
248 | #ifdef HAVE_SH64 |
249 | /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label, | |
250 | TRd" as is the current insn, so no extra length. Note that the "reach" | |
251 | is calculated from the address *after* that insn, but the offset in the | |
252 | insn is calculated from the beginning of the insn. We also need to | |
253 | take into account the implicit 1 coded as the "A" in PTA when counting | |
254 | forward. If PTB reaches an odd address, we trap that as an error | |
255 | elsewhere, so we don't have to have different relaxation entries. We | |
256 | don't add a one to the negative range, since PTB would then have the | |
257 | farthest backward-reaching value skipped, not generated at relaxation. */ | |
258 | #define SH64PCREL16_F (32767 * 4 - 4 + 1) | |
259 | #define SH64PCREL16_M (-32768 * 4 - 4) | |
260 | #define SH64PCREL16_LENGTH 0 | |
261 | ||
262 | /* The next step is to change that PT insn into | |
263 | MOVI ((label - datalabel Ln) >> 16) & 65535, R25 | |
264 | SHORI (label - datalabel Ln) & 65535, R25 | |
265 | Ln: | |
266 | PTREL R25,TRd | |
267 | which means two extra insns, 8 extra bytes. This is the limit for the | |
268 | 32-bit ABI. | |
269 | ||
270 | The expressions look a bit bad since we have to adjust this to avoid overflow on a | |
271 | 32-bit host. */ | |
272 | #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4) | |
273 | #define SH64PCREL32_LENGTH (2 * 4) | |
274 | ||
275 | /* Similarly, we just change the MOVI and add a SHORI for the 48-bit | |
276 | expansion. */ | |
277 | #if BFD_HOST_64BIT_LONG | |
278 | /* The "reach" type is long, so we can only do this for a 64-bit-long | |
279 | host. */ | |
280 | #define SH64PCREL32_M (((long) -1 << 30) * 2 - 4) | |
281 | #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4) | |
282 | #define SH64PCREL48_M (((long) -1 << 47) - 4) | |
283 | #define SH64PCREL48_LENGTH (3 * 4) | |
284 | #else | |
285 | /* If the host does not have 64-bit longs, just make this state identical | |
286 | in reach to the 32-bit state. Note that we have a slightly incorrect | |
287 | reach, but the correct one above will overflow a 32-bit number. */ | |
288 | #define SH64PCREL32_M (((long) -1 << 30) * 2) | |
289 | #define SH64PCREL48_F SH64PCREL32_F | |
290 | #define SH64PCREL48_M SH64PCREL32_M | |
291 | #define SH64PCREL48_LENGTH (3 * 4) | |
292 | #endif /* BFD_HOST_64BIT_LONG */ | |
293 | ||
294 | /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI | |
295 | + PTREL sequence. */ | |
296 | #define SH64PCREL64_LENGTH (4 * 4) | |
297 | ||
298 | /* For MOVI, we make the MOVI + SHORI... expansion you can see in the | |
299 | SH64PCREL expansions. The PCREL one is similar, but the other has no | |
300 | pc-relative reach; it must be fully expanded in | |
301 | shmedia_md_estimate_size_before_relax. */ | |
302 | #define MOVI_16_LENGTH 0 | |
303 | #define MOVI_16_F (32767 - 4) | |
304 | #define MOVI_16_M (-32768 - 4) | |
305 | #define MOVI_32_LENGTH 4 | |
306 | #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4) | |
307 | #define MOVI_48_LENGTH 8 | |
308 | ||
309 | #if BFD_HOST_64BIT_LONG | |
310 | /* The "reach" type is long, so we can only do this for a 64-bit-long | |
311 | host. */ | |
312 | #define MOVI_32_M (((long) -1 << 30) * 2 - 4) | |
313 | #define MOVI_48_F ((((long) 1 << 47) - 1) - 4) | |
314 | #define MOVI_48_M (((long) -1 << 47) - 4) | |
315 | #else | |
316 | /* If the host does not have 64-bit longs, just make this state identical | |
317 | in reach to the 32-bit state. Note that we have a slightly incorrect | |
318 | reach, but the correct one above will overflow a 32-bit number. */ | |
319 | #define MOVI_32_M (((long) -1 << 30) * 2) | |
320 | #define MOVI_48_F MOVI_32_F | |
321 | #define MOVI_48_M MOVI_32_M | |
322 | #endif /* BFD_HOST_64BIT_LONG */ | |
323 | ||
324 | #define MOVI_64_LENGTH 12 | |
325 | #endif /* HAVE_SH64 */ | |
326 | ||
43841e91 NC |
327 | #define EMPTY { 0, 0, 0, 0 } |
328 | ||
252b5132 | 329 | const relax_typeS md_relax_table[C (END, 0)] = { |
43841e91 NC |
330 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
331 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
252b5132 | 332 | |
43841e91 | 333 | EMPTY, |
252b5132 RH |
334 | /* C (COND_JUMP, COND8) */ |
335 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, | |
336 | /* C (COND_JUMP, COND12) */ | |
337 | { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, | |
338 | /* C (COND_JUMP, COND32) */ | |
339 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
e66457fb AM |
340 | /* C (COND_JUMP, UNDEF_WORD_DISP) */ |
341 | { 0, 0, COND32_LENGTH, 0, }, | |
342 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 343 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 | 344 | |
43841e91 | 345 | EMPTY, |
252b5132 RH |
346 | /* C (COND_JUMP_DELAY, COND8) */ |
347 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, | |
348 | /* C (COND_JUMP_DELAY, COND12) */ | |
349 | { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, | |
350 | /* C (COND_JUMP_DELAY, COND32) */ | |
351 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
e66457fb AM |
352 | /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */ |
353 | { 0, 0, COND32_LENGTH, 0, }, | |
354 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 355 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 | 356 | |
43841e91 | 357 | EMPTY, |
252b5132 RH |
358 | /* C (UNCOND_JUMP, UNCOND12) */ |
359 | { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, | |
360 | /* C (UNCOND_JUMP, UNCOND32) */ | |
361 | { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, | |
e66457fb AM |
362 | EMPTY, |
363 | /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */ | |
364 | { 0, 0, UNCOND32_LENGTH, 0, }, | |
365 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 366 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
324bfcf3 AO |
367 | |
368 | #ifdef HAVE_SH64 | |
369 | /* C (SH64PCREL16_32, SH64PCREL16) */ | |
370 | EMPTY, | |
371 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_32, SH64PCREL32) }, | |
372 | /* C (SH64PCREL16_32, SH64PCREL32) */ | |
373 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
374 | EMPTY, EMPTY, | |
375 | /* C (SH64PCREL16_32, SH64PCRELPLT) */ | |
376 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
377 | EMPTY, EMPTY, | |
378 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
379 | ||
380 | /* C (SH64PCREL16_64, SH64PCREL16) */ | |
381 | EMPTY, | |
382 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_64, SH64PCREL32) }, | |
383 | /* C (SH64PCREL16_64, SH64PCREL32) */ | |
384 | { SH64PCREL32_F, SH64PCREL32_M, SH64PCREL32_LENGTH, C (SH64PCREL16_64, SH64PCREL48) }, | |
385 | /* C (SH64PCREL16_64, SH64PCREL48) */ | |
386 | { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16_64, SH64PCREL64) }, | |
387 | /* C (SH64PCREL16_64, SH64PCREL64) */ | |
388 | { 0, 0, SH64PCREL64_LENGTH, 0 }, | |
389 | /* C (SH64PCREL16_64, SH64PCRELPLT) */ | |
390 | { 0, 0, SH64PCREL64_LENGTH, 0 }, | |
391 | EMPTY, EMPTY, | |
392 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
393 | ||
394 | /* C (SH64PCREL16PT_32, SH64PCREL16) */ | |
395 | EMPTY, | |
396 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_32, SH64PCREL32) }, | |
397 | /* C (SH64PCREL16PT_32, SH64PCREL32) */ | |
398 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
399 | EMPTY, EMPTY, | |
400 | /* C (SH64PCREL16PT_32, SH64PCRELPLT) */ | |
401 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
402 | EMPTY, EMPTY, | |
403 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
404 | ||
405 | /* C (SH64PCREL16PT_64, SH64PCREL16) */ | |
406 | EMPTY, | |
407 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_64, SH64PCREL32) }, | |
408 | /* C (SH64PCREL16PT_64, SH64PCREL32) */ | |
409 | { SH64PCREL32_F, | |
5d6255fe | 410 | SH64PCREL32_M, |
324bfcf3 AO |
411 | SH64PCREL32_LENGTH, |
412 | C (SH64PCREL16PT_64, SH64PCREL48) }, | |
413 | /* C (SH64PCREL16PT_64, SH64PCREL48) */ | |
414 | { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16PT_64, SH64PCREL64) }, | |
415 | /* C (SH64PCREL16PT_64, SH64PCREL64) */ | |
416 | { 0, 0, SH64PCREL64_LENGTH, 0 }, | |
417 | /* C (SH64PCREL16PT_64, SH64PCRELPLT) */ | |
418 | { 0, 0, SH64PCREL64_LENGTH, 0}, | |
419 | EMPTY, EMPTY, | |
420 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
421 | ||
422 | /* C (MOVI_IMM_32, UNDEF_MOVI) */ | |
423 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
424 | /* C (MOVI_IMM_32, MOVI_16) */ | |
425 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32, MOVI_32) }, | |
426 | /* C (MOVI_IMM_32, MOVI_32) */ | |
427 | { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, 0 }, | |
428 | EMPTY, EMPTY, EMPTY, | |
429 | /* C (MOVI_IMM_32, MOVI_GOTOFF) */ | |
430 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
431 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
432 | ||
433 | /* C (MOVI_IMM_32_PCREL, MOVI_16) */ | |
434 | EMPTY, | |
435 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32_PCREL, MOVI_32) }, | |
436 | /* C (MOVI_IMM_32_PCREL, MOVI_32) */ | |
437 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
438 | EMPTY, EMPTY, | |
439 | /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */ | |
440 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
441 | EMPTY, | |
442 | /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */ | |
443 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
444 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
445 | ||
446 | /* C (MOVI_IMM_64, UNDEF_MOVI) */ | |
447 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
448 | /* C (MOVI_IMM_64, MOVI_16) */ | |
449 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64, MOVI_32) }, | |
450 | /* C (MOVI_IMM_64, MOVI_32) */ | |
451 | { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64, MOVI_48) }, | |
452 | /* C (MOVI_IMM_64, MOVI_48) */ | |
453 | { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64, MOVI_64) }, | |
454 | /* C (MOVI_IMM_64, MOVI_64) */ | |
455 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
456 | EMPTY, | |
457 | /* C (MOVI_IMM_64, MOVI_GOTOFF) */ | |
458 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
459 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
460 | ||
461 | /* C (MOVI_IMM_64_PCREL, MOVI_16) */ | |
462 | EMPTY, | |
463 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_32) }, | |
464 | /* C (MOVI_IMM_64_PCREL, MOVI_32) */ | |
465 | { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_48) }, | |
466 | /* C (MOVI_IMM_64_PCREL, MOVI_48) */ | |
467 | { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_64) }, | |
468 | /* C (MOVI_IMM_64_PCREL, MOVI_64) */ | |
469 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
470 | /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */ | |
471 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
472 | EMPTY, | |
473 | /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */ | |
474 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
475 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
476 | ||
477 | #endif /* HAVE_SH64 */ | |
478 | ||
252b5132 RH |
479 | }; |
480 | ||
43841e91 NC |
481 | #undef EMPTY |
482 | ||
252b5132 RH |
483 | static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ |
484 | ||
a1cc9221 AO |
485 | \f |
486 | #ifdef OBJ_ELF | |
538cd60f AO |
487 | /* Determinet whether the symbol needs any kind of PIC relocation. */ |
488 | ||
489 | inline static int | |
8edc77b9 | 490 | sh_PIC_related_p (symbolS *sym) |
a1cc9221 | 491 | { |
538cd60f | 492 | expressionS *exp; |
a1cc9221 | 493 | |
538cd60f AO |
494 | if (! sym) |
495 | return 0; | |
496 | ||
497 | if (sym == GOT_symbol) | |
498 | return 1; | |
499 | ||
324bfcf3 AO |
500 | #ifdef HAVE_SH64 |
501 | if (sh_PIC_related_p (*symbol_get_tc (sym))) | |
502 | return 1; | |
503 | #endif | |
504 | ||
538cd60f AO |
505 | exp = symbol_get_value_expression (sym); |
506 | ||
507 | return (exp->X_op == O_PIC_reloc | |
508 | || sh_PIC_related_p (exp->X_add_symbol) | |
509 | || sh_PIC_related_p (exp->X_op_symbol)); | |
510 | } | |
511 | ||
512 | /* Determine the relocation type to be used to represent the | |
513 | expression, that may be rearranged. */ | |
514 | ||
515 | static int | |
8edc77b9 | 516 | sh_check_fixup (expressionS *main_exp, bfd_reloc_code_real_type *r_type_p) |
538cd60f AO |
517 | { |
518 | expressionS *exp = main_exp; | |
519 | ||
520 | /* This is here for backward-compatibility only. GCC used to generated: | |
521 | ||
522 | f@PLT + . - (.LPCS# + 2) | |
523 | ||
524 | but we'd rather be able to handle this as a PIC-related reference | |
525 | plus/minus a symbol. However, gas' parser gives us: | |
526 | ||
527 | O_subtract (O_add (f@PLT, .), .LPCS#+2) | |
5d6255fe | 528 | |
538cd60f AO |
529 | so we attempt to transform this into: |
530 | ||
531 | O_subtract (f@PLT, O_subtract (.LPCS#+2, .)) | |
532 | ||
5d6255fe | 533 | which we can handle simply below. */ |
538cd60f AO |
534 | if (exp->X_op == O_subtract) |
535 | { | |
536 | if (sh_PIC_related_p (exp->X_op_symbol)) | |
537 | return 1; | |
538 | ||
539 | exp = symbol_get_value_expression (exp->X_add_symbol); | |
540 | ||
541 | if (exp && sh_PIC_related_p (exp->X_op_symbol)) | |
542 | return 1; | |
543 | ||
544 | if (exp && exp->X_op == O_add | |
545 | && sh_PIC_related_p (exp->X_add_symbol)) | |
546 | { | |
547 | symbolS *sym = exp->X_add_symbol; | |
548 | ||
549 | exp->X_op = O_subtract; | |
550 | exp->X_add_symbol = main_exp->X_op_symbol; | |
551 | ||
552 | main_exp->X_op_symbol = main_exp->X_add_symbol; | |
553 | main_exp->X_add_symbol = sym; | |
554 | ||
555 | main_exp->X_add_number += exp->X_add_number; | |
556 | exp->X_add_number = 0; | |
557 | } | |
558 | ||
559 | exp = main_exp; | |
560 | } | |
561 | else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol)) | |
562 | return 1; | |
563 | ||
564 | if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract) | |
565 | { | |
324bfcf3 AO |
566 | #ifdef HAVE_SH64 |
567 | if (exp->X_add_symbol | |
568 | && (exp->X_add_symbol == GOT_symbol | |
569 | || (GOT_symbol | |
570 | && *symbol_get_tc (exp->X_add_symbol) == GOT_symbol))) | |
571 | { | |
572 | switch (*r_type_p) | |
573 | { | |
574 | case BFD_RELOC_SH_IMM_LOW16: | |
575 | *r_type_p = BFD_RELOC_SH_GOTPC_LOW16; | |
576 | break; | |
577 | ||
578 | case BFD_RELOC_SH_IMM_MEDLOW16: | |
579 | *r_type_p = BFD_RELOC_SH_GOTPC_MEDLOW16; | |
580 | break; | |
581 | ||
582 | case BFD_RELOC_SH_IMM_MEDHI16: | |
583 | *r_type_p = BFD_RELOC_SH_GOTPC_MEDHI16; | |
584 | break; | |
585 | ||
586 | case BFD_RELOC_SH_IMM_HI16: | |
587 | *r_type_p = BFD_RELOC_SH_GOTPC_HI16; | |
588 | break; | |
589 | ||
590 | case BFD_RELOC_NONE: | |
591 | case BFD_RELOC_UNUSED: | |
592 | *r_type_p = BFD_RELOC_SH_GOTPC; | |
593 | break; | |
5d6255fe | 594 | |
324bfcf3 AO |
595 | default: |
596 | abort (); | |
597 | } | |
598 | return 0; | |
599 | } | |
600 | #else | |
538cd60f AO |
601 | if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) |
602 | { | |
603 | *r_type_p = BFD_RELOC_SH_GOTPC; | |
604 | return 0; | |
605 | } | |
324bfcf3 | 606 | #endif |
538cd60f AO |
607 | exp = symbol_get_value_expression (exp->X_add_symbol); |
608 | if (! exp) | |
609 | return 0; | |
610 | } | |
611 | ||
612 | if (exp->X_op == O_PIC_reloc) | |
613 | { | |
324bfcf3 AO |
614 | #ifdef HAVE_SH64 |
615 | switch (*r_type_p) | |
616 | { | |
617 | case BFD_RELOC_NONE: | |
618 | case BFD_RELOC_UNUSED: | |
619 | *r_type_p = exp->X_md; | |
620 | break; | |
621 | ||
622 | case BFD_RELOC_SH_IMM_LOW16: | |
623 | switch (exp->X_md) | |
624 | { | |
625 | case BFD_RELOC_32_GOTOFF: | |
626 | *r_type_p = BFD_RELOC_SH_GOTOFF_LOW16; | |
627 | break; | |
5d6255fe | 628 | |
324bfcf3 AO |
629 | case BFD_RELOC_SH_GOTPLT32: |
630 | *r_type_p = BFD_RELOC_SH_GOTPLT_LOW16; | |
631 | break; | |
5d6255fe | 632 | |
324bfcf3 AO |
633 | case BFD_RELOC_32_GOT_PCREL: |
634 | *r_type_p = BFD_RELOC_SH_GOT_LOW16; | |
635 | break; | |
5d6255fe | 636 | |
324bfcf3 AO |
637 | case BFD_RELOC_32_PLT_PCREL: |
638 | *r_type_p = BFD_RELOC_SH_PLT_LOW16; | |
639 | break; | |
640 | ||
641 | default: | |
642 | abort (); | |
643 | } | |
644 | break; | |
645 | ||
646 | case BFD_RELOC_SH_IMM_MEDLOW16: | |
647 | switch (exp->X_md) | |
648 | { | |
649 | case BFD_RELOC_32_GOTOFF: | |
650 | *r_type_p = BFD_RELOC_SH_GOTOFF_MEDLOW16; | |
651 | break; | |
5d6255fe | 652 | |
324bfcf3 AO |
653 | case BFD_RELOC_SH_GOTPLT32: |
654 | *r_type_p = BFD_RELOC_SH_GOTPLT_MEDLOW16; | |
655 | break; | |
5d6255fe | 656 | |
324bfcf3 AO |
657 | case BFD_RELOC_32_GOT_PCREL: |
658 | *r_type_p = BFD_RELOC_SH_GOT_MEDLOW16; | |
659 | break; | |
5d6255fe | 660 | |
324bfcf3 AO |
661 | case BFD_RELOC_32_PLT_PCREL: |
662 | *r_type_p = BFD_RELOC_SH_PLT_MEDLOW16; | |
663 | break; | |
664 | ||
665 | default: | |
666 | abort (); | |
667 | } | |
668 | break; | |
669 | ||
670 | case BFD_RELOC_SH_IMM_MEDHI16: | |
671 | switch (exp->X_md) | |
672 | { | |
673 | case BFD_RELOC_32_GOTOFF: | |
674 | *r_type_p = BFD_RELOC_SH_GOTOFF_MEDHI16; | |
675 | break; | |
5d6255fe | 676 | |
324bfcf3 AO |
677 | case BFD_RELOC_SH_GOTPLT32: |
678 | *r_type_p = BFD_RELOC_SH_GOTPLT_MEDHI16; | |
679 | break; | |
5d6255fe | 680 | |
324bfcf3 AO |
681 | case BFD_RELOC_32_GOT_PCREL: |
682 | *r_type_p = BFD_RELOC_SH_GOT_MEDHI16; | |
683 | break; | |
5d6255fe | 684 | |
324bfcf3 AO |
685 | case BFD_RELOC_32_PLT_PCREL: |
686 | *r_type_p = BFD_RELOC_SH_PLT_MEDHI16; | |
687 | break; | |
688 | ||
689 | default: | |
690 | abort (); | |
691 | } | |
692 | break; | |
693 | ||
694 | case BFD_RELOC_SH_IMM_HI16: | |
695 | switch (exp->X_md) | |
696 | { | |
697 | case BFD_RELOC_32_GOTOFF: | |
698 | *r_type_p = BFD_RELOC_SH_GOTOFF_HI16; | |
699 | break; | |
5d6255fe | 700 | |
324bfcf3 AO |
701 | case BFD_RELOC_SH_GOTPLT32: |
702 | *r_type_p = BFD_RELOC_SH_GOTPLT_HI16; | |
703 | break; | |
5d6255fe | 704 | |
324bfcf3 AO |
705 | case BFD_RELOC_32_GOT_PCREL: |
706 | *r_type_p = BFD_RELOC_SH_GOT_HI16; | |
707 | break; | |
5d6255fe | 708 | |
324bfcf3 AO |
709 | case BFD_RELOC_32_PLT_PCREL: |
710 | *r_type_p = BFD_RELOC_SH_PLT_HI16; | |
711 | break; | |
712 | ||
713 | default: | |
714 | abort (); | |
715 | } | |
716 | break; | |
717 | ||
718 | default: | |
719 | abort (); | |
720 | } | |
721 | #else | |
538cd60f | 722 | *r_type_p = exp->X_md; |
324bfcf3 | 723 | #endif |
538cd60f AO |
724 | if (exp == main_exp) |
725 | exp->X_op = O_symbol; | |
726 | else | |
727 | { | |
728 | main_exp->X_add_symbol = exp->X_add_symbol; | |
729 | main_exp->X_add_number += exp->X_add_number; | |
730 | } | |
731 | } | |
732 | else | |
733 | return (sh_PIC_related_p (exp->X_add_symbol) | |
734 | || sh_PIC_related_p (exp->X_op_symbol)); | |
735 | ||
736 | return 0; | |
737 | } | |
738 | ||
739 | /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */ | |
740 | ||
741 | void | |
8edc77b9 | 742 | sh_cons_fix_new (fragS *frag, int off, int size, expressionS *exp) |
538cd60f AO |
743 | { |
744 | bfd_reloc_code_real_type r_type = BFD_RELOC_UNUSED; | |
745 | ||
746 | if (sh_check_fixup (exp, &r_type)) | |
747 | as_bad (_("Invalid PIC expression.")); | |
748 | ||
749 | if (r_type == BFD_RELOC_UNUSED) | |
750 | switch (size) | |
a1cc9221 | 751 | { |
538cd60f AO |
752 | case 1: |
753 | r_type = BFD_RELOC_8; | |
754 | break; | |
a1cc9221 | 755 | |
538cd60f AO |
756 | case 2: |
757 | r_type = BFD_RELOC_16; | |
758 | break; | |
759 | ||
760 | case 4: | |
761 | r_type = BFD_RELOC_32; | |
762 | break; | |
a1cc9221 | 763 | |
324bfcf3 AO |
764 | #ifdef HAVE_SH64 |
765 | case 8: | |
766 | r_type = BFD_RELOC_64; | |
767 | break; | |
768 | #endif | |
769 | ||
538cd60f AO |
770 | default: |
771 | goto error; | |
772 | } | |
773 | else if (size != 4) | |
774 | { | |
775 | error: | |
776 | as_bad (_("unsupported BFD relocation size %u"), size); | |
777 | r_type = BFD_RELOC_UNUSED; | |
778 | } | |
5d6255fe | 779 | |
538cd60f | 780 | fix_new_exp (frag, off, size, exp, 0, r_type); |
a1cc9221 AO |
781 | } |
782 | ||
783 | /* The regular cons() function, that reads constants, doesn't support | |
784 | suffixes such as @GOT, @GOTOFF and @PLT, that generate | |
785 | machine-specific relocation types. So we must define it here. */ | |
786 | /* Clobbers input_line_pointer, checks end-of-line. */ | |
8edc77b9 | 787 | /* NBYTES 1=.byte, 2=.word, 4=.long */ |
a1cc9221 | 788 | static void |
8edc77b9 | 789 | sh_elf_cons (register int nbytes) |
a1cc9221 | 790 | { |
538cd60f | 791 | expressionS exp; |
a1cc9221 | 792 | |
324bfcf3 AO |
793 | #ifdef HAVE_SH64 |
794 | ||
795 | /* Update existing range to include a previous insn, if there was one. */ | |
b34976b6 | 796 | sh64_update_contents_mark (TRUE); |
324bfcf3 AO |
797 | |
798 | /* We need to make sure the contents type is set to data. */ | |
799 | sh64_flag_output (); | |
800 | ||
801 | #endif /* HAVE_SH64 */ | |
802 | ||
a1cc9221 AO |
803 | if (is_it_end_of_statement ()) |
804 | { | |
805 | demand_empty_rest_of_line (); | |
806 | return; | |
807 | } | |
808 | ||
028f09bd NC |
809 | #ifdef md_cons_align |
810 | md_cons_align (nbytes); | |
811 | #endif | |
812 | ||
a1cc9221 AO |
813 | do |
814 | { | |
815 | expression (&exp); | |
538cd60f | 816 | emit_expr (&exp, (unsigned int) nbytes); |
a1cc9221 AO |
817 | } |
818 | while (*input_line_pointer++ == ','); | |
819 | ||
81d4177b | 820 | input_line_pointer--; /* Put terminator back into stream. */ |
a1cc9221 AO |
821 | if (*input_line_pointer == '#' || *input_line_pointer == '!') |
822 | { | |
dda5ecfc | 823 | while (! is_end_of_line[(unsigned char) *input_line_pointer++]); |
a1cc9221 AO |
824 | } |
825 | else | |
826 | demand_empty_rest_of_line (); | |
827 | } | |
828 | #endif /* OBJ_ELF */ | |
829 | ||
830 | \f | |
6b31947e NC |
831 | /* This function is called once, at assembler startup time. This should |
832 | set up all the tables, etc that the MD part of the assembler needs. */ | |
252b5132 RH |
833 | |
834 | void | |
8edc77b9 | 835 | md_begin (void) |
252b5132 | 836 | { |
5ff37431 | 837 | const sh_opcode_info *opcode; |
252b5132 | 838 | char *prev_name = ""; |
f6f9408f | 839 | unsigned int target_arch; |
252b5132 | 840 | |
bdfaef52 | 841 | target_arch |
f6f9408f | 842 | = preset_target_arch ? preset_target_arch : arch_sh1_up & ~arch_sh_has_dsp; |
d4845d57 JR |
843 | valid_arch = target_arch; |
844 | ||
324bfcf3 AO |
845 | #ifdef HAVE_SH64 |
846 | shmedia_md_begin (); | |
847 | #endif | |
848 | ||
252b5132 RH |
849 | opcode_hash_control = hash_new (); |
850 | ||
6b31947e | 851 | /* Insert unique names into hash table. */ |
252b5132 RH |
852 | for (opcode = sh_table; opcode->name; opcode++) |
853 | { | |
5ff37431 | 854 | if (strcmp (prev_name, opcode->name) != 0) |
252b5132 | 855 | { |
f6f9408f | 856 | if (!SH_MERGE_ARCH_SET_VALID (opcode->arch, target_arch)) |
a37c8f88 | 857 | continue; |
252b5132 RH |
858 | prev_name = opcode->name; |
859 | hash_insert (opcode_hash_control, opcode->name, (char *) opcode); | |
860 | } | |
252b5132 RH |
861 | } |
862 | } | |
863 | ||
864 | static int reg_m; | |
865 | static int reg_n; | |
d4845d57 JR |
866 | static int reg_x, reg_y; |
867 | static int reg_efg; | |
252b5132 RH |
868 | static int reg_b; |
869 | ||
3882b010 | 870 | #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_') |
dead1419 | 871 | |
6b31947e NC |
872 | /* Try to parse a reg name. Return the number of chars consumed. */ |
873 | ||
252b5132 | 874 | static int |
8edc77b9 | 875 | parse_reg (char *src, int *mode, int *reg) |
252b5132 | 876 | { |
3882b010 L |
877 | char l0 = TOLOWER (src[0]); |
878 | char l1 = l0 ? TOLOWER (src[1]) : 0; | |
e46fee70 | 879 | |
dead1419 | 880 | /* We use ! IDENT_CHAR for the next character after the register name, to |
252b5132 | 881 | make sure that we won't accidentally recognize a symbol name such as |
dead1419 | 882 | 'sram' or sr_ram as being a reference to the register 'sr'. */ |
252b5132 | 883 | |
e46fee70 | 884 | if (l0 == 'r') |
252b5132 | 885 | { |
e46fee70 | 886 | if (l1 == '1') |
d4845d57 JR |
887 | { |
888 | if (src[2] >= '0' && src[2] <= '5' | |
dead1419 | 889 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
890 | { |
891 | *mode = A_REG_N; | |
892 | *reg = 10 + src[2] - '0'; | |
893 | return 3; | |
894 | } | |
895 | } | |
e46fee70 | 896 | if (l1 >= '0' && l1 <= '9' |
dead1419 | 897 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
898 | { |
899 | *mode = A_REG_N; | |
e46fee70 | 900 | *reg = (l1 - '0'); |
d4845d57 JR |
901 | return 2; |
902 | } | |
e46fee70 | 903 | if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0 |
dead1419 JR |
904 | && ! IDENT_CHAR ((unsigned char) src[7])) |
905 | { | |
906 | *mode = A_REG_B; | |
e46fee70 | 907 | *reg = (l1 - '0'); |
dead1419 JR |
908 | return 7; |
909 | } | |
d4845d57 | 910 | |
e46fee70 | 911 | if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
912 | { |
913 | *mode = A_RE; | |
914 | return 2; | |
915 | } | |
e46fee70 | 916 | if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
917 | { |
918 | *mode = A_RS; | |
919 | return 2; | |
920 | } | |
252b5132 RH |
921 | } |
922 | ||
e46fee70 | 923 | if (l0 == 'a') |
252b5132 | 924 | { |
e46fee70 | 925 | if (l1 == '0') |
d4845d57 | 926 | { |
dead1419 | 927 | if (! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
928 | { |
929 | *mode = DSP_REG_N; | |
930 | *reg = A_A0_NUM; | |
931 | return 2; | |
932 | } | |
3882b010 | 933 | if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
934 | { |
935 | *mode = DSP_REG_N; | |
936 | *reg = A_A0G_NUM; | |
937 | return 3; | |
938 | } | |
939 | } | |
e46fee70 | 940 | if (l1 == '1') |
252b5132 | 941 | { |
dead1419 | 942 | if (! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 943 | { |
d4845d57 JR |
944 | *mode = DSP_REG_N; |
945 | *reg = A_A1_NUM; | |
946 | return 2; | |
947 | } | |
3882b010 | 948 | if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
949 | { |
950 | *mode = DSP_REG_N; | |
951 | *reg = A_A1G_NUM; | |
252b5132 RH |
952 | return 3; |
953 | } | |
954 | } | |
d4845d57 | 955 | |
e46fee70 | 956 | if (l1 == 'x' && src[2] >= '0' && src[2] <= '1' |
dead1419 | 957 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
958 | { |
959 | *mode = A_REG_N; | |
e46fee70 | 960 | *reg = 4 + (l1 - '0'); |
d4845d57 JR |
961 | return 3; |
962 | } | |
e46fee70 | 963 | if (l1 == 'y' && src[2] >= '0' && src[2] <= '1' |
dead1419 | 964 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
965 | { |
966 | *mode = A_REG_N; | |
e46fee70 | 967 | *reg = 6 + (l1 - '0'); |
d4845d57 JR |
968 | return 3; |
969 | } | |
e46fee70 | 970 | if (l1 == 's' && src[2] >= '0' && src[2] <= '3' |
dead1419 | 971 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 | 972 | { |
e46fee70 | 973 | int n = l1 - '0'; |
d4845d57 JR |
974 | |
975 | *mode = A_REG_N; | |
976 | *reg = n | ((~n & 2) << 1); | |
977 | return 3; | |
978 | } | |
979 | } | |
980 | ||
912a07db | 981 | if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 | 982 | { |
e46fee70 | 983 | if (l1 == 's') |
d4845d57 JR |
984 | { |
985 | *mode = A_REG_N; | |
986 | *reg = 8; | |
252b5132 RH |
987 | return 2; |
988 | } | |
e46fee70 | 989 | if (l1 == 'x') |
d4845d57 JR |
990 | { |
991 | *mode = A_REG_N; | |
992 | *reg = 8; | |
993 | return 2; | |
994 | } | |
e46fee70 | 995 | if (l1 == 'y') |
d4845d57 JR |
996 | { |
997 | *mode = A_REG_N; | |
998 | *reg = 9; | |
999 | return 2; | |
1000 | } | |
1001 | } | |
1002 | ||
e46fee70 | 1003 | if (l0 == 'x' && l1 >= '0' && l1 <= '1' |
dead1419 | 1004 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1005 | { |
1006 | *mode = DSP_REG_N; | |
e46fee70 | 1007 | *reg = A_X0_NUM + l1 - '0'; |
d4845d57 JR |
1008 | return 2; |
1009 | } | |
1010 | ||
e46fee70 | 1011 | if (l0 == 'y' && l1 >= '0' && l1 <= '1' |
dead1419 | 1012 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1013 | { |
1014 | *mode = DSP_REG_N; | |
e46fee70 | 1015 | *reg = A_Y0_NUM + l1 - '0'; |
d4845d57 JR |
1016 | return 2; |
1017 | } | |
1018 | ||
e46fee70 | 1019 | if (l0 == 'm' && l1 >= '0' && l1 <= '1' |
dead1419 | 1020 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1021 | { |
1022 | *mode = DSP_REG_N; | |
e46fee70 | 1023 | *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM; |
d4845d57 | 1024 | return 2; |
252b5132 RH |
1025 | } |
1026 | ||
e46fee70 HPN |
1027 | if (l0 == 's' |
1028 | && l1 == 's' | |
3882b010 | 1029 | && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1030 | { |
1031 | *mode = A_SSR; | |
1032 | return 3; | |
1033 | } | |
1034 | ||
3882b010 | 1035 | if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c' |
dead1419 | 1036 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1037 | { |
1038 | *mode = A_SPC; | |
1039 | return 3; | |
1040 | } | |
1041 | ||
3882b010 | 1042 | if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r' |
dead1419 | 1043 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1044 | { |
1045 | *mode = A_SGR; | |
1046 | return 3; | |
1047 | } | |
1048 | ||
3882b010 | 1049 | if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r' |
dead1419 | 1050 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
1051 | { |
1052 | *mode = A_DSR; | |
1053 | return 3; | |
1054 | } | |
1055 | ||
3882b010 | 1056 | if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 1057 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1058 | { |
1059 | *mode = A_DBR; | |
1060 | return 3; | |
1061 | } | |
1062 | ||
e46fee70 | 1063 | if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
1064 | { |
1065 | *mode = A_SR; | |
1066 | return 2; | |
1067 | } | |
1068 | ||
e46fee70 | 1069 | if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
1070 | { |
1071 | *mode = A_REG_N; | |
1072 | *reg = 15; | |
1073 | return 2; | |
1074 | } | |
1075 | ||
e46fee70 | 1076 | if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
1077 | { |
1078 | *mode = A_PR; | |
1079 | return 2; | |
1080 | } | |
e46fee70 | 1081 | if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 1082 | { |
015551fc JR |
1083 | /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0' |
1084 | and use an uninitialized immediate. */ | |
1085 | *mode = A_PC; | |
252b5132 RH |
1086 | return 2; |
1087 | } | |
3882b010 | 1088 | if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 1089 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1090 | { |
1091 | *mode = A_GBR; | |
1092 | return 3; | |
1093 | } | |
3882b010 | 1094 | if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 1095 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1096 | { |
1097 | *mode = A_VBR; | |
1098 | return 3; | |
1099 | } | |
1100 | ||
3882b010 | 1101 | if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c' |
dead1419 | 1102 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 | 1103 | { |
3882b010 | 1104 | if (TOLOWER (src[3]) == 'l') |
252b5132 RH |
1105 | { |
1106 | *mode = A_MACL; | |
1107 | return 4; | |
1108 | } | |
3882b010 | 1109 | if (TOLOWER (src[3]) == 'h') |
252b5132 RH |
1110 | { |
1111 | *mode = A_MACH; | |
1112 | return 4; | |
1113 | } | |
1114 | } | |
3882b010 | 1115 | if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd' |
912a07db | 1116 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
1117 | { |
1118 | *mode = A_MOD; | |
1119 | return 3; | |
1120 | } | |
e46fee70 | 1121 | if (l0 == 'f' && l1 == 'r') |
252b5132 RH |
1122 | { |
1123 | if (src[2] == '1') | |
1124 | { | |
1125 | if (src[3] >= '0' && src[3] <= '5' | |
dead1419 | 1126 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1127 | { |
1128 | *mode = F_REG_N; | |
1129 | *reg = 10 + src[3] - '0'; | |
1130 | return 4; | |
1131 | } | |
1132 | } | |
1133 | if (src[2] >= '0' && src[2] <= '9' | |
dead1419 | 1134 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1135 | { |
1136 | *mode = F_REG_N; | |
1137 | *reg = (src[2] - '0'); | |
1138 | return 3; | |
1139 | } | |
1140 | } | |
e46fee70 | 1141 | if (l0 == 'd' && l1 == 'r') |
252b5132 RH |
1142 | { |
1143 | if (src[2] == '1') | |
1144 | { | |
1145 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 1146 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1147 | { |
1148 | *mode = D_REG_N; | |
1149 | *reg = 10 + src[3] - '0'; | |
1150 | return 4; | |
1151 | } | |
1152 | } | |
1153 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 1154 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1155 | { |
1156 | *mode = D_REG_N; | |
1157 | *reg = (src[2] - '0'); | |
1158 | return 3; | |
1159 | } | |
1160 | } | |
e46fee70 | 1161 | if (l0 == 'x' && l1 == 'd') |
252b5132 RH |
1162 | { |
1163 | if (src[2] == '1') | |
1164 | { | |
1165 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 1166 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1167 | { |
1168 | *mode = X_REG_N; | |
1169 | *reg = 11 + src[3] - '0'; | |
1170 | return 4; | |
1171 | } | |
1172 | } | |
1173 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 1174 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1175 | { |
1176 | *mode = X_REG_N; | |
1177 | *reg = (src[2] - '0') + 1; | |
1178 | return 3; | |
1179 | } | |
1180 | } | |
e46fee70 | 1181 | if (l0 == 'f' && l1 == 'v') |
252b5132 | 1182 | { |
dead1419 | 1183 | if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1184 | { |
1185 | *mode = V_REG_N; | |
1186 | *reg = 12; | |
1187 | return 4; | |
1188 | } | |
1189 | if ((src[2] == '0' || src[2] == '4' || src[2] == '8') | |
dead1419 | 1190 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1191 | { |
1192 | *mode = V_REG_N; | |
1193 | *reg = (src[2] - '0'); | |
1194 | return 3; | |
1195 | } | |
1196 | } | |
3882b010 L |
1197 | if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u' |
1198 | && TOLOWER (src[3]) == 'l' | |
dead1419 | 1199 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1200 | { |
1201 | *mode = FPUL_N; | |
1202 | return 4; | |
1203 | } | |
1204 | ||
3882b010 L |
1205 | if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's' |
1206 | && TOLOWER (src[3]) == 'c' | |
1207 | && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5])) | |
252b5132 RH |
1208 | { |
1209 | *mode = FPSCR_N; | |
1210 | return 5; | |
1211 | } | |
1212 | ||
3882b010 L |
1213 | if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't' |
1214 | && TOLOWER (src[3]) == 'r' | |
1215 | && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5])) | |
252b5132 RH |
1216 | { |
1217 | *mode = XMTRX_M4; | |
1218 | return 5; | |
1219 | } | |
1220 | ||
1221 | return 0; | |
1222 | } | |
1223 | ||
c4aa876b | 1224 | static char * |
8edc77b9 | 1225 | parse_exp (char *s, sh_operand_info *op) |
252b5132 RH |
1226 | { |
1227 | char *save; | |
1228 | char *new; | |
1229 | ||
1230 | save = input_line_pointer; | |
1231 | input_line_pointer = s; | |
015551fc JR |
1232 | expression (&op->immediate); |
1233 | if (op->immediate.X_op == O_absent) | |
252b5132 | 1234 | as_bad (_("missing operand")); |
538cd60f AO |
1235 | #ifdef OBJ_ELF |
1236 | else if (op->immediate.X_op == O_PIC_reloc | |
1237 | || sh_PIC_related_p (op->immediate.X_add_symbol) | |
1238 | || sh_PIC_related_p (op->immediate.X_op_symbol)) | |
1239 | as_bad (_("misplaced PIC operand")); | |
1240 | #endif | |
252b5132 RH |
1241 | new = input_line_pointer; |
1242 | input_line_pointer = save; | |
1243 | return new; | |
1244 | } | |
1245 | ||
252b5132 RH |
1246 | /* The many forms of operand: |
1247 | ||
1248 | Rn Register direct | |
1249 | @Rn Register indirect | |
1250 | @Rn+ Autoincrement | |
1251 | @-Rn Autodecrement | |
1252 | @(disp:4,Rn) | |
1253 | @(disp:8,GBR) | |
1254 | @(disp:8,PC) | |
1255 | ||
1256 | @(R0,Rn) | |
1257 | @(R0,GBR) | |
1258 | ||
1259 | disp:8 | |
1260 | disp:12 | |
1261 | #imm8 | |
1262 | pr, gbr, vbr, macl, mach | |
252b5132 RH |
1263 | */ |
1264 | ||
c4aa876b | 1265 | static char * |
8edc77b9 | 1266 | parse_at (char *src, sh_operand_info *op) |
252b5132 RH |
1267 | { |
1268 | int len; | |
1269 | int mode; | |
1270 | src++; | |
1271 | if (src[0] == '-') | |
1272 | { | |
6b31947e | 1273 | /* Must be predecrement. */ |
252b5132 RH |
1274 | src++; |
1275 | ||
1276 | len = parse_reg (src, &mode, &(op->reg)); | |
1277 | if (mode != A_REG_N) | |
1278 | as_bad (_("illegal register after @-")); | |
1279 | ||
1280 | op->type = A_DEC_N; | |
1281 | src += len; | |
1282 | } | |
1283 | else if (src[0] == '(') | |
1284 | { | |
1285 | /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or | |
8d4d84c2 | 1286 | @(r0, rn). */ |
252b5132 RH |
1287 | src++; |
1288 | len = parse_reg (src, &mode, &(op->reg)); | |
1289 | if (len && mode == A_REG_N) | |
1290 | { | |
1291 | src += len; | |
1292 | if (op->reg != 0) | |
1293 | { | |
1294 | as_bad (_("must be @(r0,...)")); | |
1295 | } | |
1296 | if (src[0] == ',') | |
252b5132 | 1297 | { |
8d4d84c2 AO |
1298 | src++; |
1299 | /* Now can be rn or gbr. */ | |
1300 | len = parse_reg (src, &mode, &(op->reg)); | |
1301 | } | |
1302 | else | |
1303 | { | |
1304 | len = 0; | |
252b5132 | 1305 | } |
8d4d84c2 | 1306 | if (len) |
252b5132 | 1307 | { |
8d4d84c2 AO |
1308 | if (mode == A_GBR) |
1309 | { | |
1310 | op->type = A_R0_GBR; | |
1311 | } | |
1312 | else if (mode == A_REG_N) | |
1313 | { | |
1314 | op->type = A_IND_R0_REG_N; | |
1315 | } | |
1316 | else | |
1317 | { | |
1318 | as_bad (_("syntax error in @(r0,...)")); | |
1319 | } | |
252b5132 RH |
1320 | } |
1321 | else | |
1322 | { | |
8d4d84c2 | 1323 | as_bad (_("syntax error in @(r0...)")); |
252b5132 RH |
1324 | } |
1325 | } | |
1326 | else | |
1327 | { | |
8d4d84c2 | 1328 | /* Must be an @(disp,.. thing). */ |
015551fc | 1329 | src = parse_exp (src, op); |
252b5132 RH |
1330 | if (src[0] == ',') |
1331 | src++; | |
8d4d84c2 | 1332 | /* Now can be rn, gbr or pc. */ |
252b5132 RH |
1333 | len = parse_reg (src, &mode, &op->reg); |
1334 | if (len) | |
1335 | { | |
1336 | if (mode == A_REG_N) | |
1337 | { | |
1338 | op->type = A_DISP_REG_N; | |
1339 | } | |
1340 | else if (mode == A_GBR) | |
1341 | { | |
1342 | op->type = A_DISP_GBR; | |
1343 | } | |
015551fc | 1344 | else if (mode == A_PC) |
252b5132 | 1345 | { |
dbb4348d JR |
1346 | /* We want @(expr, pc) to uniformly address . + expr, |
1347 | no matter if expr is a constant, or a more complex | |
1348 | expression, e.g. sym-. or sym1-sym2. | |
1349 | However, we also used to accept @(sym,pc) | |
67c1ffbe | 1350 | as addressing sym, i.e. meaning the same as plain sym. |
dbb4348d JR |
1351 | Some existing code does use the @(sym,pc) syntax, so |
1352 | we give it the old semantics for now, but warn about | |
1353 | its use, so that users have some time to fix their code. | |
1354 | ||
1355 | Note that due to this backward compatibility hack, | |
1356 | we'll get unexpected results when @(offset, pc) is used, | |
1357 | and offset is a symbol that is set later to an an address | |
1358 | difference, or an external symbol that is set to an | |
1359 | address difference in another source file, so we want to | |
1360 | eventually remove it. */ | |
9691d64f JR |
1361 | if (op->immediate.X_op == O_symbol) |
1362 | { | |
1363 | op->type = A_DISP_PC; | |
1364 | as_warn (_("Deprecated syntax.")); | |
1365 | } | |
1366 | else | |
1367 | { | |
1368 | op->type = A_DISP_PC_ABS; | |
1369 | /* Such operands don't get corrected for PC==.+4, so | |
1370 | make the correction here. */ | |
1371 | op->immediate.X_add_number -= 4; | |
1372 | } | |
252b5132 RH |
1373 | } |
1374 | else | |
1375 | { | |
1376 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
1377 | } | |
1378 | } | |
1379 | else | |
1380 | { | |
1381 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
1382 | } | |
1383 | } | |
1384 | src += len; | |
1385 | if (src[0] != ')') | |
1386 | as_bad (_("expecting )")); | |
1387 | else | |
1388 | src++; | |
1389 | } | |
1390 | else | |
1391 | { | |
1392 | src += parse_reg (src, &mode, &(op->reg)); | |
1393 | if (mode != A_REG_N) | |
006299d3 NC |
1394 | as_bad (_("illegal register after @")); |
1395 | ||
252b5132 RH |
1396 | if (src[0] == '+') |
1397 | { | |
1000a02a NC |
1398 | char l0, l1; |
1399 | ||
252b5132 | 1400 | src++; |
1000a02a NC |
1401 | l0 = TOLOWER (src[0]); |
1402 | l1 = TOLOWER (src[1]); | |
1403 | ||
1404 | if ((l0 == 'r' && l1 == '8') | |
1405 | || (l0 == 'i' && (l1 == 'x' || l1 == 's'))) | |
d4845d57 JR |
1406 | { |
1407 | src += 2; | |
88da98f3 | 1408 | op->type = AX_PMOD_N; |
d4845d57 | 1409 | } |
006299d3 NC |
1410 | else if ( (l0 == 'r' && l1 == '9') |
1411 | || (l0 == 'i' && l1 == 'y')) | |
d4845d57 JR |
1412 | { |
1413 | src += 2; | |
88da98f3 | 1414 | op->type = AY_PMOD_N; |
d4845d57 JR |
1415 | } |
1416 | else | |
1417 | op->type = A_INC_N; | |
252b5132 RH |
1418 | } |
1419 | else | |
006299d3 | 1420 | op->type = A_IND_N; |
252b5132 RH |
1421 | } |
1422 | return src; | |
1423 | } | |
1424 | ||
1425 | static void | |
8edc77b9 | 1426 | get_operand (char **ptr, sh_operand_info *op) |
252b5132 RH |
1427 | { |
1428 | char *src = *ptr; | |
1429 | int mode = -1; | |
1430 | unsigned int len; | |
1431 | ||
1432 | if (src[0] == '#') | |
1433 | { | |
1434 | src++; | |
015551fc | 1435 | *ptr = parse_exp (src, op); |
252b5132 RH |
1436 | op->type = A_IMM; |
1437 | return; | |
1438 | } | |
1439 | ||
1440 | else if (src[0] == '@') | |
1441 | { | |
1442 | *ptr = parse_at (src, op); | |
1443 | return; | |
1444 | } | |
1445 | len = parse_reg (src, &mode, &(op->reg)); | |
1446 | if (len) | |
1447 | { | |
1448 | *ptr = src + len; | |
1449 | op->type = mode; | |
1450 | return; | |
1451 | } | |
1452 | else | |
1453 | { | |
6b31947e | 1454 | /* Not a reg, the only thing left is a displacement. */ |
015551fc | 1455 | *ptr = parse_exp (src, op); |
252b5132 RH |
1456 | op->type = A_DISP_PC; |
1457 | return; | |
1458 | } | |
1459 | } | |
1460 | ||
c4aa876b | 1461 | static char * |
8edc77b9 | 1462 | get_operands (sh_opcode_info *info, char *args, sh_operand_info *operand) |
252b5132 RH |
1463 | { |
1464 | char *ptr = args; | |
1465 | if (info->arg[0]) | |
1466 | { | |
d4845d57 JR |
1467 | /* The pre-processor will eliminate whitespace in front of '@' |
1468 | after the first argument; we may be called multiple times | |
1469 | from assemble_ppi, so don't insist on finding whitespace here. */ | |
1470 | if (*ptr == ' ') | |
1471 | ptr++; | |
252b5132 RH |
1472 | |
1473 | get_operand (&ptr, operand + 0); | |
1474 | if (info->arg[1]) | |
1475 | { | |
1476 | if (*ptr == ',') | |
1477 | { | |
1478 | ptr++; | |
1479 | } | |
1480 | get_operand (&ptr, operand + 1); | |
52ccafd0 JR |
1481 | /* ??? Hack: psha/pshl have a varying operand number depending on |
1482 | the type of the first operand. We handle this by having the | |
1483 | three-operand version first and reducing the number of operands | |
1484 | parsed to two if we see that the first operand is an immediate. | |
1485 | This works because no insn with three operands has an immediate | |
1486 | as first operand. */ | |
1487 | if (info->arg[2] && operand[0].type != A_IMM) | |
252b5132 RH |
1488 | { |
1489 | if (*ptr == ',') | |
1490 | { | |
1491 | ptr++; | |
1492 | } | |
1493 | get_operand (&ptr, operand + 2); | |
1494 | } | |
1495 | else | |
1496 | { | |
1497 | operand[2].type = 0; | |
1498 | } | |
1499 | } | |
1500 | else | |
1501 | { | |
1502 | operand[1].type = 0; | |
1503 | operand[2].type = 0; | |
1504 | } | |
1505 | } | |
1506 | else | |
1507 | { | |
1508 | operand[0].type = 0; | |
1509 | operand[1].type = 0; | |
1510 | operand[2].type = 0; | |
1511 | } | |
1512 | return ptr; | |
1513 | } | |
1514 | ||
1515 | /* Passed a pointer to a list of opcodes which use different | |
1516 | addressing modes, return the opcode which matches the opcodes | |
6b31947e | 1517 | provided. */ |
252b5132 | 1518 | |
c4aa876b | 1519 | static sh_opcode_info * |
8edc77b9 | 1520 | get_specific (sh_opcode_info *opcode, sh_operand_info *operands) |
252b5132 RH |
1521 | { |
1522 | sh_opcode_info *this_try = opcode; | |
1523 | char *name = opcode->name; | |
1524 | int n = 0; | |
c4aa876b | 1525 | |
252b5132 RH |
1526 | while (opcode->name) |
1527 | { | |
1528 | this_try = opcode++; | |
5ff37431 | 1529 | if ((this_try->name != name) && (strcmp (this_try->name, name) != 0)) |
252b5132 RH |
1530 | { |
1531 | /* We've looked so far down the table that we've run out of | |
6b31947e | 1532 | opcodes with the same name. */ |
252b5132 RH |
1533 | return 0; |
1534 | } | |
c4aa876b | 1535 | |
6b31947e | 1536 | /* Look at both operands needed by the opcodes and provided by |
252b5132 RH |
1537 | the user - since an arg test will often fail on the same arg |
1538 | again and again, we'll try and test the last failing arg the | |
6b31947e | 1539 | first on each opcode try. */ |
252b5132 RH |
1540 | for (n = 0; this_try->arg[n]; n++) |
1541 | { | |
1542 | sh_operand_info *user = operands + n; | |
1543 | sh_arg_type arg = this_try->arg[n]; | |
c4aa876b | 1544 | |
252b5132 RH |
1545 | switch (arg) |
1546 | { | |
7679ead9 AO |
1547 | case A_DISP_PC: |
1548 | if (user->type == A_DISP_PC_ABS) | |
1549 | break; | |
1550 | /* Fall through. */ | |
252b5132 RH |
1551 | case A_IMM: |
1552 | case A_BDISP12: | |
1553 | case A_BDISP8: | |
1554 | case A_DISP_GBR: | |
252b5132 RH |
1555 | case A_MACH: |
1556 | case A_PR: | |
1557 | case A_MACL: | |
1558 | if (user->type != arg) | |
1559 | goto fail; | |
1560 | break; | |
1561 | case A_R0: | |
1562 | /* opcode needs r0 */ | |
1563 | if (user->type != A_REG_N || user->reg != 0) | |
1564 | goto fail; | |
1565 | break; | |
1566 | case A_R0_GBR: | |
1567 | if (user->type != A_R0_GBR || user->reg != 0) | |
1568 | goto fail; | |
1569 | break; | |
1570 | case F_FR0: | |
1571 | if (user->type != F_REG_N || user->reg != 0) | |
1572 | goto fail; | |
1573 | break; | |
1574 | ||
1575 | case A_REG_N: | |
1576 | case A_INC_N: | |
1577 | case A_DEC_N: | |
1578 | case A_IND_N: | |
1579 | case A_IND_R0_REG_N: | |
1580 | case A_DISP_REG_N: | |
1581 | case F_REG_N: | |
1582 | case D_REG_N: | |
1583 | case X_REG_N: | |
1584 | case V_REG_N: | |
1585 | case FPUL_N: | |
1586 | case FPSCR_N: | |
d4845d57 | 1587 | case DSP_REG_N: |
252b5132 RH |
1588 | /* Opcode needs rn */ |
1589 | if (user->type != arg) | |
1590 | goto fail; | |
1591 | reg_n = user->reg; | |
1592 | break; | |
252b5132 RH |
1593 | case DX_REG_N: |
1594 | if (user->type != D_REG_N && user->type != X_REG_N) | |
1595 | goto fail; | |
1596 | reg_n = user->reg; | |
1597 | break; | |
1598 | case A_GBR: | |
1599 | case A_SR: | |
1600 | case A_VBR: | |
d4845d57 JR |
1601 | case A_DSR: |
1602 | case A_MOD: | |
1603 | case A_RE: | |
1604 | case A_RS: | |
252b5132 RH |
1605 | case A_SSR: |
1606 | case A_SPC: | |
1607 | case A_SGR: | |
1608 | case A_DBR: | |
1609 | if (user->type != arg) | |
1610 | goto fail; | |
1611 | break; | |
1612 | ||
c4aa876b | 1613 | case A_REG_B: |
252b5132 RH |
1614 | if (user->type != arg) |
1615 | goto fail; | |
1616 | reg_b = user->reg; | |
1617 | break; | |
1618 | ||
1619 | case A_REG_M: | |
1620 | case A_INC_M: | |
1621 | case A_DEC_M: | |
1622 | case A_IND_M: | |
1623 | case A_IND_R0_REG_M: | |
1624 | case A_DISP_REG_M: | |
d4845d57 | 1625 | case DSP_REG_M: |
252b5132 RH |
1626 | /* Opcode needs rn */ |
1627 | if (user->type != arg - A_REG_M + A_REG_N) | |
1628 | goto fail; | |
1629 | reg_m = user->reg; | |
1630 | break; | |
1631 | ||
88da98f3 MS |
1632 | case AS_DEC_N: |
1633 | if (user->type != A_DEC_N) | |
1634 | goto fail; | |
1635 | if (user->reg < 2 || user->reg > 5) | |
1636 | goto fail; | |
1637 | reg_n = user->reg; | |
1638 | break; | |
13ef8878 | 1639 | |
88da98f3 MS |
1640 | case AS_INC_N: |
1641 | if (user->type != A_INC_N) | |
1642 | goto fail; | |
1643 | if (user->reg < 2 || user->reg > 5) | |
1644 | goto fail; | |
1645 | reg_n = user->reg; | |
1646 | break; | |
13ef8878 | 1647 | |
88da98f3 MS |
1648 | case AS_IND_N: |
1649 | if (user->type != A_IND_N) | |
1650 | goto fail; | |
1651 | if (user->reg < 2 || user->reg > 5) | |
1652 | goto fail; | |
1653 | reg_n = user->reg; | |
1654 | break; | |
13ef8878 | 1655 | |
88da98f3 MS |
1656 | case AS_PMOD_N: |
1657 | if (user->type != AX_PMOD_N) | |
1658 | goto fail; | |
1659 | if (user->reg < 2 || user->reg > 5) | |
1660 | goto fail; | |
1661 | reg_n = user->reg; | |
1662 | break; | |
13ef8878 | 1663 | |
88da98f3 MS |
1664 | case AX_INC_N: |
1665 | if (user->type != A_INC_N) | |
1666 | goto fail; | |
1667 | if (user->reg < 4 || user->reg > 5) | |
1668 | goto fail; | |
1669 | reg_n = user->reg; | |
1670 | break; | |
13ef8878 | 1671 | |
88da98f3 MS |
1672 | case AX_IND_N: |
1673 | if (user->type != A_IND_N) | |
1674 | goto fail; | |
1675 | if (user->reg < 4 || user->reg > 5) | |
1676 | goto fail; | |
1677 | reg_n = user->reg; | |
1678 | break; | |
13ef8878 | 1679 | |
88da98f3 MS |
1680 | case AX_PMOD_N: |
1681 | if (user->type != AX_PMOD_N) | |
1682 | goto fail; | |
1683 | if (user->reg < 4 || user->reg > 5) | |
1684 | goto fail; | |
1685 | reg_n = user->reg; | |
1686 | break; | |
13ef8878 | 1687 | |
88da98f3 MS |
1688 | case AXY_INC_N: |
1689 | if (user->type != A_INC_N) | |
1690 | goto fail; | |
1691 | if ((user->reg < 4 || user->reg > 5) | |
1692 | && (user->reg < 0 || user->reg > 1)) | |
1693 | goto fail; | |
1694 | reg_n = user->reg; | |
1695 | break; | |
13ef8878 | 1696 | |
88da98f3 MS |
1697 | case AXY_IND_N: |
1698 | if (user->type != A_IND_N) | |
1699 | goto fail; | |
1700 | if ((user->reg < 4 || user->reg > 5) | |
1701 | && (user->reg < 0 || user->reg > 1)) | |
1702 | goto fail; | |
1703 | reg_n = user->reg; | |
1704 | break; | |
13ef8878 | 1705 | |
88da98f3 MS |
1706 | case AXY_PMOD_N: |
1707 | if (user->type != AX_PMOD_N) | |
1708 | goto fail; | |
1709 | if ((user->reg < 4 || user->reg > 5) | |
1710 | && (user->reg < 0 || user->reg > 1)) | |
1711 | goto fail; | |
1712 | reg_n = user->reg; | |
1713 | break; | |
13ef8878 | 1714 | |
88da98f3 MS |
1715 | case AY_INC_N: |
1716 | if (user->type != A_INC_N) | |
1717 | goto fail; | |
1718 | if (user->reg < 6 || user->reg > 7) | |
1719 | goto fail; | |
1720 | reg_n = user->reg; | |
1721 | break; | |
13ef8878 | 1722 | |
88da98f3 MS |
1723 | case AY_IND_N: |
1724 | if (user->type != A_IND_N) | |
1725 | goto fail; | |
1726 | if (user->reg < 6 || user->reg > 7) | |
1727 | goto fail; | |
1728 | reg_n = user->reg; | |
1729 | break; | |
13ef8878 | 1730 | |
88da98f3 MS |
1731 | case AY_PMOD_N: |
1732 | if (user->type != AY_PMOD_N) | |
1733 | goto fail; | |
1734 | if (user->reg < 6 || user->reg > 7) | |
1735 | goto fail; | |
1736 | reg_n = user->reg; | |
1737 | break; | |
1738 | ||
1739 | case AYX_INC_N: | |
1740 | if (user->type != A_INC_N) | |
1741 | goto fail; | |
1742 | if ((user->reg < 6 || user->reg > 7) | |
1743 | && (user->reg < 2 || user->reg > 3)) | |
1744 | goto fail; | |
1745 | reg_n = user->reg; | |
1746 | break; | |
13ef8878 | 1747 | |
88da98f3 MS |
1748 | case AYX_IND_N: |
1749 | if (user->type != A_IND_N) | |
1750 | goto fail; | |
1751 | if ((user->reg < 6 || user->reg > 7) | |
1752 | && (user->reg < 2 || user->reg > 3)) | |
1753 | goto fail; | |
1754 | reg_n = user->reg; | |
1755 | break; | |
13ef8878 | 1756 | |
88da98f3 MS |
1757 | case AYX_PMOD_N: |
1758 | if (user->type != AY_PMOD_N) | |
1759 | goto fail; | |
1760 | if ((user->reg < 6 || user->reg > 7) | |
1761 | && (user->reg < 2 || user->reg > 3)) | |
1762 | goto fail; | |
1763 | reg_n = user->reg; | |
1764 | break; | |
1765 | ||
1766 | case DSP_REG_A_M: | |
1767 | if (user->type != DSP_REG_N) | |
1768 | goto fail; | |
1769 | if (user->reg != A_A0_NUM | |
1770 | && user->reg != A_A1_NUM) | |
1771 | goto fail; | |
1772 | reg_m = user->reg; | |
1773 | break; | |
1774 | ||
1775 | case DSP_REG_AX: | |
1776 | if (user->type != DSP_REG_N) | |
1777 | goto fail; | |
1778 | switch (user->reg) | |
1779 | { | |
1780 | case A_A0_NUM: | |
1781 | reg_x = 0; | |
1782 | break; | |
1783 | case A_A1_NUM: | |
1784 | reg_x = 2; | |
1785 | break; | |
1786 | case A_X0_NUM: | |
1787 | reg_x = 1; | |
1788 | break; | |
1789 | case A_X1_NUM: | |
1790 | reg_x = 3; | |
1791 | break; | |
1792 | default: | |
1793 | goto fail; | |
1794 | } | |
1795 | break; | |
1796 | ||
1797 | case DSP_REG_XY: | |
1798 | if (user->type != DSP_REG_N) | |
1799 | goto fail; | |
1800 | switch (user->reg) | |
1801 | { | |
1802 | case A_X0_NUM: | |
1803 | reg_x = 0; | |
1804 | break; | |
1805 | case A_X1_NUM: | |
1806 | reg_x = 2; | |
1807 | break; | |
1808 | case A_Y0_NUM: | |
1809 | reg_x = 1; | |
1810 | break; | |
1811 | case A_Y1_NUM: | |
1812 | reg_x = 3; | |
1813 | break; | |
1814 | default: | |
1815 | goto fail; | |
1816 | } | |
1817 | break; | |
1818 | ||
1819 | case DSP_REG_AY: | |
1820 | if (user->type != DSP_REG_N) | |
1821 | goto fail; | |
1822 | switch (user->reg) | |
1823 | { | |
1824 | case A_A0_NUM: | |
1825 | reg_y = 0; | |
1826 | break; | |
1827 | case A_A1_NUM: | |
1828 | reg_y = 1; | |
1829 | break; | |
1830 | case A_Y0_NUM: | |
1831 | reg_y = 2; | |
1832 | break; | |
1833 | case A_Y1_NUM: | |
1834 | reg_y = 3; | |
1835 | break; | |
1836 | default: | |
1837 | goto fail; | |
1838 | } | |
1839 | break; | |
1840 | ||
1841 | case DSP_REG_YX: | |
1842 | if (user->type != DSP_REG_N) | |
1843 | goto fail; | |
1844 | switch (user->reg) | |
1845 | { | |
1846 | case A_Y0_NUM: | |
1847 | reg_y = 0; | |
1848 | break; | |
1849 | case A_Y1_NUM: | |
1850 | reg_y = 1; | |
1851 | break; | |
1852 | case A_X0_NUM: | |
1853 | reg_y = 2; | |
1854 | break; | |
1855 | case A_X1_NUM: | |
1856 | reg_y = 3; | |
1857 | break; | |
1858 | default: | |
1859 | goto fail; | |
1860 | } | |
1861 | break; | |
1862 | ||
d4845d57 JR |
1863 | case DSP_REG_X: |
1864 | if (user->type != DSP_REG_N) | |
1865 | goto fail; | |
1866 | switch (user->reg) | |
1867 | { | |
1868 | case A_X0_NUM: | |
1869 | reg_x = 0; | |
1870 | break; | |
1871 | case A_X1_NUM: | |
1872 | reg_x = 1; | |
1873 | break; | |
1874 | case A_A0_NUM: | |
1875 | reg_x = 2; | |
1876 | break; | |
1877 | case A_A1_NUM: | |
1878 | reg_x = 3; | |
1879 | break; | |
1880 | default: | |
1881 | goto fail; | |
1882 | } | |
1883 | break; | |
1884 | ||
1885 | case DSP_REG_Y: | |
1886 | if (user->type != DSP_REG_N) | |
1887 | goto fail; | |
1888 | switch (user->reg) | |
1889 | { | |
1890 | case A_Y0_NUM: | |
1891 | reg_y = 0; | |
1892 | break; | |
1893 | case A_Y1_NUM: | |
1894 | reg_y = 1; | |
1895 | break; | |
1896 | case A_M0_NUM: | |
1897 | reg_y = 2; | |
1898 | break; | |
1899 | case A_M1_NUM: | |
1900 | reg_y = 3; | |
1901 | break; | |
1902 | default: | |
1903 | goto fail; | |
1904 | } | |
1905 | break; | |
1906 | ||
1907 | case DSP_REG_E: | |
1908 | if (user->type != DSP_REG_N) | |
1909 | goto fail; | |
1910 | switch (user->reg) | |
1911 | { | |
1912 | case A_X0_NUM: | |
1913 | reg_efg = 0 << 10; | |
1914 | break; | |
1915 | case A_X1_NUM: | |
1916 | reg_efg = 1 << 10; | |
1917 | break; | |
1918 | case A_Y0_NUM: | |
1919 | reg_efg = 2 << 10; | |
1920 | break; | |
1921 | case A_A1_NUM: | |
1922 | reg_efg = 3 << 10; | |
1923 | break; | |
1924 | default: | |
1925 | goto fail; | |
1926 | } | |
1927 | break; | |
1928 | ||
1929 | case DSP_REG_F: | |
1930 | if (user->type != DSP_REG_N) | |
1931 | goto fail; | |
1932 | switch (user->reg) | |
1933 | { | |
1934 | case A_Y0_NUM: | |
1935 | reg_efg |= 0 << 8; | |
1936 | break; | |
1937 | case A_Y1_NUM: | |
1938 | reg_efg |= 1 << 8; | |
1939 | break; | |
1940 | case A_X0_NUM: | |
1941 | reg_efg |= 2 << 8; | |
1942 | break; | |
1943 | case A_A1_NUM: | |
1944 | reg_efg |= 3 << 8; | |
1945 | break; | |
1946 | default: | |
1947 | goto fail; | |
1948 | } | |
1949 | break; | |
1950 | ||
1951 | case DSP_REG_G: | |
1952 | if (user->type != DSP_REG_N) | |
1953 | goto fail; | |
1954 | switch (user->reg) | |
1955 | { | |
1956 | case A_M0_NUM: | |
1957 | reg_efg |= 0 << 2; | |
1958 | break; | |
1959 | case A_M1_NUM: | |
1960 | reg_efg |= 1 << 2; | |
1961 | break; | |
1962 | case A_A0_NUM: | |
1963 | reg_efg |= 2 << 2; | |
1964 | break; | |
1965 | case A_A1_NUM: | |
1966 | reg_efg |= 3 << 2; | |
1967 | break; | |
1968 | default: | |
1969 | goto fail; | |
1970 | } | |
1971 | break; | |
1972 | ||
1973 | case A_A0: | |
1974 | if (user->type != DSP_REG_N || user->reg != A_A0_NUM) | |
1975 | goto fail; | |
1976 | break; | |
1977 | case A_X0: | |
1978 | if (user->type != DSP_REG_N || user->reg != A_X0_NUM) | |
1979 | goto fail; | |
1980 | break; | |
1981 | case A_X1: | |
1982 | if (user->type != DSP_REG_N || user->reg != A_X1_NUM) | |
1983 | goto fail; | |
1984 | break; | |
1985 | case A_Y0: | |
1986 | if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) | |
1987 | goto fail; | |
1988 | break; | |
1989 | case A_Y1: | |
1990 | if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) | |
1991 | goto fail; | |
1992 | break; | |
1993 | ||
252b5132 RH |
1994 | case F_REG_M: |
1995 | case D_REG_M: | |
1996 | case X_REG_M: | |
1997 | case V_REG_M: | |
1998 | case FPUL_M: | |
1999 | case FPSCR_M: | |
2000 | /* Opcode needs rn */ | |
2001 | if (user->type != arg - F_REG_M + F_REG_N) | |
2002 | goto fail; | |
2003 | reg_m = user->reg; | |
2004 | break; | |
2005 | case DX_REG_M: | |
2006 | if (user->type != D_REG_N && user->type != X_REG_N) | |
2007 | goto fail; | |
2008 | reg_m = user->reg; | |
2009 | break; | |
2010 | case XMTRX_M4: | |
2011 | if (user->type != XMTRX_M4) | |
2012 | goto fail; | |
2013 | reg_m = 4; | |
2014 | break; | |
c4aa876b | 2015 | |
252b5132 RH |
2016 | default: |
2017 | printf (_("unhandled %d\n"), arg); | |
2018 | goto fail; | |
2019 | } | |
2020 | } | |
f6f9408f | 2021 | if ( !SH_MERGE_ARCH_SET_VALID (valid_arch, this_try->arch)) |
a37c8f88 | 2022 | goto fail; |
f6f9408f | 2023 | valid_arch = SH_MERGE_ARCH_SET (valid_arch, this_try->arch); |
252b5132 | 2024 | return this_try; |
c4aa876b NC |
2025 | fail: |
2026 | ; | |
252b5132 RH |
2027 | } |
2028 | ||
2029 | return 0; | |
2030 | } | |
2031 | ||
252b5132 | 2032 | static void |
8edc77b9 | 2033 | insert (char *where, int how, int pcrel, sh_operand_info *op) |
252b5132 RH |
2034 | { |
2035 | fix_new_exp (frag_now, | |
2036 | where - frag_now->fr_literal, | |
2037 | 2, | |
015551fc | 2038 | &op->immediate, |
252b5132 RH |
2039 | pcrel, |
2040 | how); | |
2041 | } | |
2042 | ||
2043 | static void | |
8edc77b9 | 2044 | build_relax (sh_opcode_info *opcode, sh_operand_info *op) |
252b5132 RH |
2045 | { |
2046 | int high_byte = target_big_endian ? 0 : 1; | |
2047 | char *p; | |
2048 | ||
2049 | if (opcode->arg[0] == A_BDISP8) | |
2050 | { | |
2051 | int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; | |
2052 | p = frag_var (rs_machine_dependent, | |
2053 | md_relax_table[C (what, COND32)].rlx_length, | |
2054 | md_relax_table[C (what, COND8)].rlx_length, | |
2055 | C (what, 0), | |
015551fc JR |
2056 | op->immediate.X_add_symbol, |
2057 | op->immediate.X_add_number, | |
252b5132 RH |
2058 | 0); |
2059 | p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); | |
2060 | } | |
2061 | else if (opcode->arg[0] == A_BDISP12) | |
2062 | { | |
2063 | p = frag_var (rs_machine_dependent, | |
2064 | md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, | |
2065 | md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, | |
2066 | C (UNCOND_JUMP, 0), | |
015551fc JR |
2067 | op->immediate.X_add_symbol, |
2068 | op->immediate.X_add_number, | |
252b5132 RH |
2069 | 0); |
2070 | p[high_byte] = (opcode->nibbles[0] << 4); | |
2071 | } | |
2072 | ||
2073 | } | |
2074 | ||
6b31947e | 2075 | /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */ |
d67b5d6d | 2076 | |
015551fc | 2077 | static char * |
8edc77b9 | 2078 | insert_loop_bounds (char *output, sh_operand_info *operand) |
015551fc JR |
2079 | { |
2080 | char *name; | |
2081 | symbolS *end_sym; | |
2082 | ||
2083 | /* Since the low byte of the opcode will be overwritten by the reloc, we | |
2084 | can just stash the high byte into both bytes and ignore endianness. */ | |
2085 | output[0] = 0x8c; | |
2086 | output[1] = 0x8c; | |
2087 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
2088 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
2089 | ||
2090 | if (sh_relax) | |
2091 | { | |
2092 | static int count = 0; | |
2093 | ||
2094 | /* If the last loop insn is a two-byte-insn, it is in danger of being | |
2095 | swapped with the insn after it. To prevent this, create a new | |
2096 | symbol - complete with SH_LABEL reloc - after the last loop insn. | |
2097 | If the last loop insn is four bytes long, the symbol will be | |
2098 | right in the middle, but four byte insns are not swapped anyways. */ | |
2099 | /* A REPEAT takes 6 bytes. The SH has a 32 bit address space. | |
2100 | Hence a 9 digit number should be enough to count all REPEATs. */ | |
2101 | name = alloca (11); | |
2102 | sprintf (name, "_R%x", count++ & 0x3fffffff); | |
c4aa876b | 2103 | end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag); |
015551fc JR |
2104 | /* Make this a local symbol. */ |
2105 | #ifdef OBJ_COFF | |
2106 | SF_SET_LOCAL (end_sym); | |
2107 | #endif /* OBJ_COFF */ | |
2108 | symbol_table_insert (end_sym); | |
2109 | end_sym->sy_value = operand[1].immediate; | |
2110 | end_sym->sy_value.X_add_number += 2; | |
2111 | fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL); | |
2112 | } | |
2113 | ||
2114 | output = frag_more (2); | |
2115 | output[0] = 0x8e; | |
2116 | output[1] = 0x8e; | |
2117 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
2118 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
2119 | ||
2120 | return frag_more (2); | |
2121 | } | |
2122 | ||
d67b5d6d | 2123 | /* Now we know what sort of opcodes it is, let's build the bytes. */ |
6b31947e | 2124 | |
0d10e182 | 2125 | static unsigned int |
8edc77b9 | 2126 | build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand) |
252b5132 RH |
2127 | { |
2128 | int index; | |
2129 | char nbuf[4]; | |
2130 | char *output = frag_more (2); | |
0d10e182 | 2131 | unsigned int size = 2; |
252b5132 RH |
2132 | int low_byte = target_big_endian ? 1 : 0; |
2133 | nbuf[0] = 0; | |
2134 | nbuf[1] = 0; | |
2135 | nbuf[2] = 0; | |
2136 | nbuf[3] = 0; | |
2137 | ||
2138 | for (index = 0; index < 4; index++) | |
2139 | { | |
2140 | sh_nibble_type i = opcode->nibbles[index]; | |
2141 | if (i < 16) | |
2142 | { | |
2143 | nbuf[index] = i; | |
2144 | } | |
2145 | else | |
2146 | { | |
2147 | switch (i) | |
2148 | { | |
2149 | case REG_N: | |
6a5709a5 | 2150 | case REG_N_D: |
252b5132 RH |
2151 | nbuf[index] = reg_n; |
2152 | break; | |
2153 | case REG_M: | |
2154 | nbuf[index] = reg_m; | |
2155 | break; | |
d4845d57 JR |
2156 | case SDT_REG_N: |
2157 | if (reg_n < 2 || reg_n > 5) | |
2158 | as_bad (_("Invalid register: 'r%d'"), reg_n); | |
2159 | nbuf[index] = (reg_n & 3) | 4; | |
2160 | break; | |
252b5132 RH |
2161 | case REG_NM: |
2162 | nbuf[index] = reg_n | (reg_m >> 2); | |
2163 | break; | |
c4aa876b | 2164 | case REG_B: |
252b5132 RH |
2165 | nbuf[index] = reg_b | 0x08; |
2166 | break; | |
6a5709a5 JR |
2167 | case REG_N_B01: |
2168 | nbuf[index] = reg_n | 0x01; | |
2169 | break; | |
015551fc JR |
2170 | case IMM0_4BY4: |
2171 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); | |
2172 | break; | |
2173 | case IMM0_4BY2: | |
2174 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand); | |
2175 | break; | |
2176 | case IMM0_4: | |
2177 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand); | |
2178 | break; | |
2179 | case IMM1_4BY4: | |
2180 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1); | |
2181 | break; | |
2182 | case IMM1_4BY2: | |
2183 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1); | |
252b5132 | 2184 | break; |
015551fc JR |
2185 | case IMM1_4: |
2186 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1); | |
252b5132 | 2187 | break; |
015551fc JR |
2188 | case IMM0_8BY4: |
2189 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand); | |
252b5132 | 2190 | break; |
015551fc JR |
2191 | case IMM0_8BY2: |
2192 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand); | |
252b5132 | 2193 | break; |
015551fc JR |
2194 | case IMM0_8: |
2195 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand); | |
252b5132 | 2196 | break; |
015551fc JR |
2197 | case IMM1_8BY4: |
2198 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1); | |
252b5132 | 2199 | break; |
015551fc JR |
2200 | case IMM1_8BY2: |
2201 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1); | |
2202 | break; | |
2203 | case IMM1_8: | |
2204 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1); | |
252b5132 RH |
2205 | break; |
2206 | case PCRELIMM_8BY4: | |
7679ead9 AO |
2207 | insert (output, BFD_RELOC_SH_PCRELIMM8BY4, |
2208 | operand->type != A_DISP_PC_ABS, operand); | |
252b5132 RH |
2209 | break; |
2210 | case PCRELIMM_8BY2: | |
7679ead9 AO |
2211 | insert (output, BFD_RELOC_SH_PCRELIMM8BY2, |
2212 | operand->type != A_DISP_PC_ABS, operand); | |
015551fc JR |
2213 | break; |
2214 | case REPEAT: | |
2215 | output = insert_loop_bounds (output, operand); | |
2216 | nbuf[index] = opcode->nibbles[3]; | |
2217 | operand += 2; | |
252b5132 RH |
2218 | break; |
2219 | default: | |
2220 | printf (_("failed for %d\n"), i); | |
2221 | } | |
2222 | } | |
2223 | } | |
c4aa876b NC |
2224 | if (!target_big_endian) |
2225 | { | |
2226 | output[1] = (nbuf[0] << 4) | (nbuf[1]); | |
2227 | output[0] = (nbuf[2] << 4) | (nbuf[3]); | |
2228 | } | |
2229 | else | |
2230 | { | |
2231 | output[0] = (nbuf[0] << 4) | (nbuf[1]); | |
2232 | output[1] = (nbuf[2] << 4) | (nbuf[3]); | |
2233 | } | |
0d10e182 | 2234 | return size; |
252b5132 RH |
2235 | } |
2236 | ||
d4845d57 JR |
2237 | /* Find an opcode at the start of *STR_P in the hash table, and set |
2238 | *STR_P to the first character after the last one read. */ | |
252b5132 | 2239 | |
d4845d57 | 2240 | static sh_opcode_info * |
8edc77b9 | 2241 | find_cooked_opcode (char **str_p) |
252b5132 | 2242 | { |
d4845d57 | 2243 | char *str = *str_p; |
252b5132 RH |
2244 | unsigned char *op_start; |
2245 | unsigned char *op_end; | |
252b5132 RH |
2246 | char name[20]; |
2247 | int nlen = 0; | |
c4aa876b | 2248 | |
6b31947e | 2249 | /* Drop leading whitespace. */ |
252b5132 RH |
2250 | while (*str == ' ') |
2251 | str++; | |
2252 | ||
d4845d57 JR |
2253 | /* Find the op code end. |
2254 | The pre-processor will eliminate whitespace in front of | |
2255 | any '@' after the first argument; we may be called from | |
2256 | assemble_ppi, so the opcode might be terminated by an '@'. */ | |
252b5132 RH |
2257 | for (op_start = op_end = (unsigned char *) (str); |
2258 | *op_end | |
2259 | && nlen < 20 | |
d4845d57 | 2260 | && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; |
252b5132 RH |
2261 | op_end++) |
2262 | { | |
2263 | unsigned char c = op_start[nlen]; | |
2264 | ||
2265 | /* The machine independent code will convert CMP/EQ into cmp/EQ | |
d4845d57 JR |
2266 | because it thinks the '/' is the end of the symbol. Moreover, |
2267 | all but the first sub-insn is a parallel processing insn won't | |
3882b010 | 2268 | be capitalized. Instead of hacking up the machine independent |
d4845d57 | 2269 | code, we just deal with it here. */ |
3882b010 | 2270 | c = TOLOWER (c); |
252b5132 RH |
2271 | name[nlen] = c; |
2272 | nlen++; | |
2273 | } | |
c4aa876b | 2274 | |
252b5132 | 2275 | name[nlen] = 0; |
d4845d57 | 2276 | *str_p = op_end; |
252b5132 RH |
2277 | |
2278 | if (nlen == 0) | |
6b31947e | 2279 | as_bad (_("can't find opcode ")); |
252b5132 | 2280 | |
d4845d57 JR |
2281 | return (sh_opcode_info *) hash_find (opcode_hash_control, name); |
2282 | } | |
2283 | ||
2284 | /* Assemble a parallel processing insn. */ | |
2285 | #define DDT_BASE 0xf000 /* Base value for double data transfer insns */ | |
6b31947e | 2286 | |
0d10e182 | 2287 | static unsigned int |
8edc77b9 | 2288 | assemble_ppi (char *op_end, sh_opcode_info *opcode) |
d4845d57 JR |
2289 | { |
2290 | int movx = 0; | |
2291 | int movy = 0; | |
2292 | int cond = 0; | |
2293 | int field_b = 0; | |
2294 | char *output; | |
2295 | int move_code; | |
0d10e182 | 2296 | unsigned int size; |
d4845d57 | 2297 | |
d4845d57 JR |
2298 | for (;;) |
2299 | { | |
2300 | sh_operand_info operand[3]; | |
2301 | ||
ac62e7a3 JR |
2302 | /* Some insn ignore one or more register fields, e.g. psts machl,a0. |
2303 | Make sure we encode a defined insn pattern. */ | |
2304 | reg_x = 0; | |
2305 | reg_y = 0; | |
2306 | reg_n = 0; | |
2307 | ||
d4845d57 JR |
2308 | if (opcode->arg[0] != A_END) |
2309 | op_end = get_operands (opcode, op_end, operand); | |
88da98f3 | 2310 | try_another_opcode: |
d4845d57 JR |
2311 | opcode = get_specific (opcode, operand); |
2312 | if (opcode == 0) | |
2313 | { | |
6b31947e | 2314 | /* Couldn't find an opcode which matched the operands. */ |
d4845d57 | 2315 | char *where = frag_more (2); |
0d10e182 | 2316 | size = 2; |
d4845d57 JR |
2317 | |
2318 | where[0] = 0x0; | |
2319 | where[1] = 0x0; | |
2320 | as_bad (_("invalid operands for opcode")); | |
0d10e182 | 2321 | return size; |
d4845d57 | 2322 | } |
c4aa876b | 2323 | |
d4845d57 JR |
2324 | if (opcode->nibbles[0] != PPI) |
2325 | as_bad (_("insn can't be combined with parallel processing insn")); | |
2326 | ||
2327 | switch (opcode->nibbles[1]) | |
2328 | { | |
2329 | ||
2330 | case NOPX: | |
2331 | if (movx) | |
2332 | as_bad (_("multiple movx specifications")); | |
2333 | movx = DDT_BASE; | |
2334 | break; | |
2335 | case NOPY: | |
2336 | if (movy) | |
2337 | as_bad (_("multiple movy specifications")); | |
2338 | movy = DDT_BASE; | |
2339 | break; | |
2340 | ||
88da98f3 MS |
2341 | case MOVX_NOPY: |
2342 | if (movx) | |
2343 | as_bad (_("multiple movx specifications")); | |
2344 | if ((reg_n < 4 || reg_n > 5) | |
2345 | && (reg_n < 0 || reg_n > 1)) | |
2346 | as_bad (_("invalid movx address register")); | |
2347 | if (movy && movy != DDT_BASE) | |
2348 | as_bad (_("insn cannot be combined with non-nopy")); | |
2349 | movx = ((((reg_n & 1) != 0) << 9) | |
2350 | + (((reg_n & 4) == 0) << 8) | |
2351 | + (reg_x << 6) | |
2352 | + (opcode->nibbles[2] << 4) | |
2353 | + opcode->nibbles[3] | |
2354 | + DDT_BASE); | |
2355 | break; | |
2356 | ||
2357 | case MOVY_NOPX: | |
2358 | if (movy) | |
2359 | as_bad (_("multiple movy specifications")); | |
2360 | if ((reg_n < 6 || reg_n > 7) | |
2361 | && (reg_n < 2 || reg_n > 3)) | |
2362 | as_bad (_("invalid movy address register")); | |
2363 | if (movx && movx != DDT_BASE) | |
2364 | as_bad (_("insn cannot be combined with non-nopx")); | |
2365 | movy = ((((reg_n & 1) != 0) << 8) | |
2366 | + (((reg_n & 4) == 0) << 9) | |
2367 | + (reg_y << 6) | |
2368 | + (opcode->nibbles[2] << 4) | |
2369 | + opcode->nibbles[3] | |
2370 | + DDT_BASE); | |
2371 | break; | |
2372 | ||
d4845d57 JR |
2373 | case MOVX: |
2374 | if (movx) | |
2375 | as_bad (_("multiple movx specifications")); | |
88da98f3 MS |
2376 | if (movy & 0x2ac) |
2377 | as_bad (_("previous movy requires nopx")); | |
d4845d57 JR |
2378 | if (reg_n < 4 || reg_n > 5) |
2379 | as_bad (_("invalid movx address register")); | |
2380 | if (opcode->nibbles[2] & 8) | |
2381 | { | |
2382 | if (reg_m == A_A1_NUM) | |
2383 | movx = 1 << 7; | |
2384 | else if (reg_m != A_A0_NUM) | |
2385 | as_bad (_("invalid movx dsp register")); | |
2386 | } | |
2387 | else | |
2388 | { | |
2389 | if (reg_x > 1) | |
2390 | as_bad (_("invalid movx dsp register")); | |
2391 | movx = reg_x << 7; | |
2392 | } | |
2393 | movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; | |
2394 | break; | |
2395 | ||
2396 | case MOVY: | |
2397 | if (movy) | |
2398 | as_bad (_("multiple movy specifications")); | |
88da98f3 MS |
2399 | if (movx & 0x153) |
2400 | as_bad (_("previous movx requires nopy")); | |
d4845d57 JR |
2401 | if (opcode->nibbles[2] & 8) |
2402 | { | |
2403 | /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, | |
2404 | so add 8 more. */ | |
2405 | movy = 8; | |
2406 | if (reg_m == A_A1_NUM) | |
2407 | movy += 1 << 6; | |
2408 | else if (reg_m != A_A0_NUM) | |
2409 | as_bad (_("invalid movy dsp register")); | |
2410 | } | |
2411 | else | |
2412 | { | |
2413 | if (reg_y > 1) | |
2414 | as_bad (_("invalid movy dsp register")); | |
2415 | movy = reg_y << 6; | |
2416 | } | |
2417 | if (reg_n < 6 || reg_n > 7) | |
2418 | as_bad (_("invalid movy address register")); | |
2419 | movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; | |
2420 | break; | |
2421 | ||
2422 | case PSH: | |
015551fc | 2423 | if (operand[0].immediate.X_op != O_constant) |
d4845d57 JR |
2424 | as_bad (_("dsp immediate shift value not constant")); |
2425 | field_b = ((opcode->nibbles[2] << 12) | |
015551fc | 2426 | | (operand[0].immediate.X_add_number & 127) << 4 |
d4845d57 JR |
2427 | | reg_n); |
2428 | break; | |
88da98f3 MS |
2429 | case PPI3NC: |
2430 | if (cond) | |
2431 | { | |
2432 | opcode++; | |
2433 | goto try_another_opcode; | |
2434 | } | |
2435 | /* Fall through. */ | |
d4845d57 JR |
2436 | case PPI3: |
2437 | if (field_b) | |
2438 | as_bad (_("multiple parallel processing specifications")); | |
2439 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
2440 | + (reg_x << 6) + (reg_y << 4) + reg_n); | |
88da98f3 MS |
2441 | switch (opcode->nibbles[4]) |
2442 | { | |
2443 | case HEX_0: | |
2444 | case HEX_XX00: | |
2445 | case HEX_00YY: | |
2446 | break; | |
2447 | case HEX_1: | |
2448 | case HEX_4: | |
2449 | field_b += opcode->nibbles[4] << 4; | |
2450 | break; | |
2451 | default: | |
2452 | abort (); | |
2453 | } | |
d4845d57 JR |
2454 | break; |
2455 | case PDC: | |
2456 | if (cond) | |
2457 | as_bad (_("multiple condition specifications")); | |
2458 | cond = opcode->nibbles[2] << 8; | |
2459 | if (*op_end) | |
2460 | goto skip_cond_check; | |
2461 | break; | |
2462 | case PPIC: | |
2463 | if (field_b) | |
2464 | as_bad (_("multiple parallel processing specifications")); | |
2465 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
2466 | + cond + (reg_x << 6) + (reg_y << 4) + reg_n); | |
2467 | cond = 0; | |
88da98f3 MS |
2468 | switch (opcode->nibbles[4]) |
2469 | { | |
2470 | case HEX_0: | |
2471 | case HEX_XX00: | |
2472 | case HEX_00YY: | |
2473 | break; | |
2474 | case HEX_1: | |
2475 | case HEX_4: | |
2476 | field_b += opcode->nibbles[4] << 4; | |
2477 | break; | |
2478 | default: | |
2479 | abort (); | |
2480 | } | |
d4845d57 JR |
2481 | break; |
2482 | case PMUL: | |
2483 | if (field_b) | |
2484 | { | |
88da98f3 MS |
2485 | if ((field_b & 0xef00) == 0xa100) |
2486 | field_b -= 0x8100; | |
2487 | /* pclr Dz pmuls Se,Sf,Dg */ | |
2488 | else if ((field_b & 0xff00) == 0x8d00 | |
f6f9408f | 2489 | && (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh4al_dsp_up))) |
88da98f3 | 2490 | { |
f6f9408f | 2491 | valid_arch = SH_MERGE_ARCH_SET (valid_arch, arch_sh4al_dsp_up); |
88da98f3 MS |
2492 | field_b -= 0x8cf0; |
2493 | } | |
2494 | else | |
d4845d57 | 2495 | as_bad (_("insn cannot be combined with pmuls")); |
d4845d57 JR |
2496 | switch (field_b & 0xf) |
2497 | { | |
2498 | case A_X0_NUM: | |
2499 | field_b += 0 - A_X0_NUM; | |
2500 | break; | |
2501 | case A_Y0_NUM: | |
2502 | field_b += 1 - A_Y0_NUM; | |
2503 | break; | |
2504 | case A_A0_NUM: | |
2505 | field_b += 2 - A_A0_NUM; | |
2506 | break; | |
2507 | case A_A1_NUM: | |
2508 | field_b += 3 - A_A1_NUM; | |
2509 | break; | |
2510 | default: | |
88da98f3 | 2511 | as_bad (_("bad combined pmuls output operand")); |
d4845d57 | 2512 | } |
7dd04abd JR |
2513 | /* Generate warning if the destination register for padd / psub |
2514 | and pmuls is the same ( only for A0 or A1 ). | |
2515 | If the last nibble is 1010 then A0 is used in both | |
2516 | padd / psub and pmuls. If it is 1111 then A1 is used | |
2517 | as destination register in both padd / psub and pmuls. */ | |
5db33d76 JR |
2518 | |
2519 | if ((((field_b | reg_efg) & 0x000F) == 0x000A) | |
2520 | || (((field_b | reg_efg) & 0x000F) == 0x000F)) | |
2521 | as_warn (_("destination register is same for parallel insns")); | |
d4845d57 JR |
2522 | } |
2523 | field_b += 0x4000 + reg_efg; | |
2524 | break; | |
2525 | default: | |
2526 | abort (); | |
2527 | } | |
2528 | if (cond) | |
2529 | { | |
2530 | as_bad (_("condition not followed by conditionalizable insn")); | |
2531 | cond = 0; | |
2532 | } | |
2533 | if (! *op_end) | |
2534 | break; | |
2535 | skip_cond_check: | |
2536 | opcode = find_cooked_opcode (&op_end); | |
2537 | if (opcode == NULL) | |
2538 | { | |
2539 | (as_bad | |
2540 | (_("unrecognized characters at end of parallel processing insn"))); | |
2541 | break; | |
2542 | } | |
2543 | } | |
2544 | ||
2545 | move_code = movx | movy; | |
2546 | if (field_b) | |
2547 | { | |
2548 | /* Parallel processing insn. */ | |
2549 | unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b; | |
2550 | ||
2551 | output = frag_more (4); | |
0d10e182 | 2552 | size = 4; |
d4845d57 JR |
2553 | if (! target_big_endian) |
2554 | { | |
2555 | output[3] = ppi_code >> 8; | |
2556 | output[2] = ppi_code; | |
2557 | } | |
2558 | else | |
2559 | { | |
2560 | output[2] = ppi_code >> 8; | |
2561 | output[3] = ppi_code; | |
2562 | } | |
2563 | move_code |= 0xf800; | |
2564 | } | |
2565 | else | |
0d10e182 JL |
2566 | { |
2567 | /* Just a double data transfer. */ | |
2568 | output = frag_more (2); | |
2569 | size = 2; | |
2570 | } | |
d4845d57 JR |
2571 | if (! target_big_endian) |
2572 | { | |
2573 | output[1] = move_code >> 8; | |
2574 | output[0] = move_code; | |
2575 | } | |
2576 | else | |
2577 | { | |
2578 | output[0] = move_code >> 8; | |
2579 | output[1] = move_code; | |
2580 | } | |
0d10e182 | 2581 | return size; |
d4845d57 JR |
2582 | } |
2583 | ||
2584 | /* This is the guts of the machine-dependent assembler. STR points to a | |
2585 | machine dependent instruction. This function is supposed to emit | |
6b31947e | 2586 | the frags/bytes it assembles to. */ |
d4845d57 JR |
2587 | |
2588 | void | |
8edc77b9 | 2589 | md_assemble (char *str) |
d4845d57 JR |
2590 | { |
2591 | unsigned char *op_end; | |
2592 | sh_operand_info operand[3]; | |
2593 | sh_opcode_info *opcode; | |
dda5ecfc | 2594 | unsigned int size = 0; |
ae51a426 | 2595 | char *initial_str = str; |
d4845d57 | 2596 | |
324bfcf3 AO |
2597 | #ifdef HAVE_SH64 |
2598 | if (sh64_isa_mode == sh64_isa_shmedia) | |
2599 | { | |
2600 | shmedia_md_assemble (str); | |
2601 | return; | |
2602 | } | |
2603 | else | |
2604 | { | |
2605 | /* If we've seen pseudo-directives, make sure any emitted data or | |
2606 | frags are marked as data. */ | |
b34976b6 | 2607 | if (!seen_insn) |
324bfcf3 | 2608 | { |
b34976b6 | 2609 | sh64_update_contents_mark (TRUE); |
324bfcf3 AO |
2610 | sh64_set_contents_type (CRT_SH5_ISA16); |
2611 | } | |
2612 | ||
b34976b6 | 2613 | seen_insn = TRUE; |
324bfcf3 AO |
2614 | } |
2615 | #endif /* HAVE_SH64 */ | |
2616 | ||
d4845d57 JR |
2617 | opcode = find_cooked_opcode (&str); |
2618 | op_end = str; | |
252b5132 RH |
2619 | |
2620 | if (opcode == NULL) | |
2621 | { | |
ae51a426 JR |
2622 | /* The opcode is not in the hash table. |
2623 | This means we definately have an assembly failure, | |
2624 | but the instruction may be valid in another CPU variant. | |
2625 | In this case emit something better than 'unknown opcode'. | |
2626 | Search the full table in sh-opc.h to check. */ | |
2627 | ||
2628 | char *name = initial_str; | |
2629 | int name_length = 0; | |
2630 | const sh_opcode_info *op; | |
2631 | int found = 0; | |
2632 | ||
2633 | /* identify opcode in string */ | |
871ec896 | 2634 | while (ISSPACE (*name)) |
ae51a426 JR |
2635 | { |
2636 | name++; | |
2637 | } | |
871ec896 | 2638 | while (!ISSPACE (name[name_length])) |
ae51a426 JR |
2639 | { |
2640 | name_length++; | |
2641 | } | |
2642 | ||
2643 | /* search for opcode in full list */ | |
2644 | for (op = sh_table; op->name; op++) | |
2645 | { | |
f6f9408f JR |
2646 | if (strncasecmp (op->name, name, name_length) == 0 |
2647 | && op->name[name_length] == '\0') | |
ae51a426 JR |
2648 | { |
2649 | found = 1; | |
2650 | break; | |
2651 | } | |
2652 | } | |
2653 | ||
2654 | if ( found ) | |
2655 | { | |
2656 | as_bad (_("opcode not valid for this cpu variant")); | |
2657 | } | |
2658 | else | |
2659 | { | |
2660 | as_bad (_("unknown opcode")); | |
2661 | } | |
252b5132 RH |
2662 | return; |
2663 | } | |
2664 | ||
2665 | if (sh_relax | |
2666 | && ! seg_info (now_seg)->tc_segment_info_data.in_code) | |
2667 | { | |
2668 | /* Output a CODE reloc to tell the linker that the following | |
2669 | bytes are instructions, not data. */ | |
2670 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
2671 | BFD_RELOC_SH_CODE); | |
2672 | seg_info (now_seg)->tc_segment_info_data.in_code = 1; | |
2673 | } | |
2674 | ||
d4845d57 JR |
2675 | if (opcode->nibbles[0] == PPI) |
2676 | { | |
0d10e182 | 2677 | size = assemble_ppi (op_end, opcode); |
252b5132 RH |
2678 | } |
2679 | else | |
2680 | { | |
0d10e182 JL |
2681 | if (opcode->arg[0] == A_BDISP12 |
2682 | || opcode->arg[0] == A_BDISP8) | |
252b5132 | 2683 | { |
26c9b704 JR |
2684 | /* Since we skip get_specific here, we have to check & update |
2685 | valid_arch now. */ | |
f6f9408f JR |
2686 | if (SH_MERGE_ARCH_SET_VALID (valid_arch, opcode->arch)) |
2687 | valid_arch = SH_MERGE_ARCH_SET (valid_arch, opcode->arch); | |
26c9b704 JR |
2688 | else |
2689 | as_bad (_("Delayed branches not available on SH1")); | |
0d10e182 JL |
2690 | parse_exp (op_end + 1, &operand[0]); |
2691 | build_relax (opcode, &operand[0]); | |
5fc44b2d JR |
2692 | } |
2693 | else | |
2694 | { | |
0d10e182 JL |
2695 | if (opcode->arg[0] == A_END) |
2696 | { | |
2697 | /* Ignore trailing whitespace. If there is any, it has already | |
2698 | been compressed to a single space. */ | |
2699 | if (*op_end == ' ') | |
2700 | op_end++; | |
2701 | } | |
2702 | else | |
2703 | { | |
2704 | op_end = get_operands (opcode, op_end, operand); | |
2705 | } | |
2706 | opcode = get_specific (opcode, operand); | |
252b5132 | 2707 | |
0d10e182 JL |
2708 | if (opcode == 0) |
2709 | { | |
2710 | /* Couldn't find an opcode which matched the operands. */ | |
2711 | char *where = frag_more (2); | |
2712 | size = 2; | |
252b5132 | 2713 | |
0d10e182 JL |
2714 | where[0] = 0x0; |
2715 | where[1] = 0x0; | |
2716 | as_bad (_("invalid operands for opcode")); | |
2717 | } | |
2718 | else | |
2719 | { | |
2720 | if (*op_end) | |
2721 | as_bad (_("excess operands: '%s'"), op_end); | |
2722 | ||
2723 | size = build_Mytes (opcode, operand); | |
2724 | } | |
252b5132 | 2725 | } |
0d10e182 | 2726 | } |
252b5132 | 2727 | |
2bc0a128 | 2728 | #ifdef BFD_ASSEMBLER |
4dc7ead9 | 2729 | dwarf2_emit_insn (size); |
2bc0a128 | 2730 | #endif |
252b5132 RH |
2731 | } |
2732 | ||
2733 | /* This routine is called each time a label definition is seen. It | |
2734 | emits a BFD_RELOC_SH_LABEL reloc if necessary. */ | |
2735 | ||
2736 | void | |
8edc77b9 | 2737 | sh_frob_label (void) |
252b5132 RH |
2738 | { |
2739 | static fragS *last_label_frag; | |
2740 | static int last_label_offset; | |
2741 | ||
2742 | if (sh_relax | |
2743 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
2744 | { | |
2745 | int offset; | |
2746 | ||
2747 | offset = frag_now_fix (); | |
2748 | if (frag_now != last_label_frag | |
2749 | || offset != last_label_offset) | |
c4aa876b | 2750 | { |
252b5132 RH |
2751 | fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); |
2752 | last_label_frag = frag_now; | |
2753 | last_label_offset = offset; | |
2754 | } | |
2755 | } | |
2756 | } | |
2757 | ||
2758 | /* This routine is called when the assembler is about to output some | |
2759 | data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ | |
2760 | ||
2761 | void | |
8edc77b9 | 2762 | sh_flush_pending_output (void) |
252b5132 RH |
2763 | { |
2764 | if (sh_relax | |
2765 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
2766 | { | |
2767 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
2768 | BFD_RELOC_SH_DATA); | |
2769 | seg_info (now_seg)->tc_segment_info_data.in_code = 0; | |
2770 | } | |
2771 | } | |
2772 | ||
2773 | symbolS * | |
8edc77b9 | 2774 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
252b5132 RH |
2775 | { |
2776 | return 0; | |
2777 | } | |
2778 | ||
2779 | #ifdef OBJ_COFF | |
056350c6 | 2780 | #ifndef BFD_ASSEMBLER |
252b5132 RH |
2781 | |
2782 | void | |
8edc77b9 | 2783 | tc_crawl_symbol_chain (object_headers *headers ATTRIBUTE_UNUSED) |
252b5132 RH |
2784 | { |
2785 | printf (_("call to tc_crawl_symbol_chain \n")); | |
2786 | } | |
2787 | ||
2788 | void | |
8edc77b9 | 2789 | tc_headers_hook (object_headers *headers ATTRIBUTE_UNUSED) |
252b5132 RH |
2790 | { |
2791 | printf (_("call to tc_headers_hook \n")); | |
2792 | } | |
2793 | ||
056350c6 | 2794 | #endif |
252b5132 RH |
2795 | #endif |
2796 | ||
6b31947e NC |
2797 | /* Various routines to kill one day. */ |
2798 | /* Equal to MAX_PRECISION in atof-ieee.c. */ | |
252b5132 RH |
2799 | #define MAX_LITTLENUMS 6 |
2800 | ||
6b31947e NC |
2801 | /* Turn a string in input_line_pointer into a floating point constant |
2802 | of type TYPE, and store the appropriate bytes in *LITP. The number | |
2803 | of LITTLENUMS emitted is stored in *SIZEP . An error message is | |
2804 | returned, or NULL on OK. */ | |
2805 | ||
252b5132 | 2806 | char * |
8edc77b9 | 2807 | md_atof (int type, char *litP, int *sizeP) |
252b5132 RH |
2808 | { |
2809 | int prec; | |
2810 | LITTLENUM_TYPE words[4]; | |
2811 | char *t; | |
2812 | int i; | |
2813 | ||
2814 | switch (type) | |
2815 | { | |
2816 | case 'f': | |
2817 | prec = 2; | |
2818 | break; | |
2819 | ||
2820 | case 'd': | |
2821 | prec = 4; | |
2822 | break; | |
2823 | ||
2824 | default: | |
2825 | *sizeP = 0; | |
2826 | return _("bad call to md_atof"); | |
2827 | } | |
2828 | ||
2829 | t = atof_ieee (input_line_pointer, type, words); | |
2830 | if (t) | |
2831 | input_line_pointer = t; | |
2832 | ||
2833 | *sizeP = prec * 2; | |
2834 | ||
2835 | if (! target_big_endian) | |
2836 | { | |
2837 | for (i = prec - 1; i >= 0; i--) | |
2838 | { | |
2839 | md_number_to_chars (litP, (valueT) words[i], 2); | |
2840 | litP += 2; | |
2841 | } | |
2842 | } | |
2843 | else | |
2844 | { | |
2845 | for (i = 0; i < prec; i++) | |
2846 | { | |
2847 | md_number_to_chars (litP, (valueT) words[i], 2); | |
2848 | litP += 2; | |
2849 | } | |
2850 | } | |
c4aa876b | 2851 | |
252b5132 RH |
2852 | return NULL; |
2853 | } | |
2854 | ||
2855 | /* Handle the .uses pseudo-op. This pseudo-op is used just before a | |
2856 | call instruction. It refers to a label of the instruction which | |
2857 | loads the register which the call uses. We use it to generate a | |
2858 | special reloc for the linker. */ | |
2859 | ||
2860 | static void | |
8edc77b9 | 2861 | s_uses (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
2862 | { |
2863 | expressionS ex; | |
2864 | ||
2865 | if (! sh_relax) | |
2866 | as_warn (_(".uses pseudo-op seen when not relaxing")); | |
2867 | ||
2868 | expression (&ex); | |
2869 | ||
2870 | if (ex.X_op != O_symbol || ex.X_add_number != 0) | |
2871 | { | |
2872 | as_bad (_("bad .uses format")); | |
2873 | ignore_rest_of_line (); | |
2874 | return; | |
2875 | } | |
2876 | ||
2877 | fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); | |
2878 | ||
2879 | demand_empty_rest_of_line (); | |
2880 | } | |
2881 | \f | |
5a38dc70 | 2882 | const char *md_shortopts = ""; |
6b31947e NC |
2883 | struct option md_longopts[] = |
2884 | { | |
252b5132 | 2885 | #define OPTION_RELAX (OPTION_MD_BASE) |
05982cac HPN |
2886 | #define OPTION_BIG (OPTION_MD_BASE + 1) |
2887 | #define OPTION_LITTLE (OPTION_BIG + 1) | |
252b5132 | 2888 | #define OPTION_SMALL (OPTION_LITTLE + 1) |
d4845d57 | 2889 | #define OPTION_DSP (OPTION_SMALL + 1) |
bdfaef52 | 2890 | #define OPTION_ISA (OPTION_DSP + 1) |
f55629b8 | 2891 | #define OPTION_RENESAS (OPTION_ISA + 1) |
252b5132 RH |
2892 | |
2893 | {"relax", no_argument, NULL, OPTION_RELAX}, | |
05982cac | 2894 | {"big", no_argument, NULL, OPTION_BIG}, |
252b5132 RH |
2895 | {"little", no_argument, NULL, OPTION_LITTLE}, |
2896 | {"small", no_argument, NULL, OPTION_SMALL}, | |
d4845d57 | 2897 | {"dsp", no_argument, NULL, OPTION_DSP}, |
bdfaef52 | 2898 | {"isa", required_argument, NULL, OPTION_ISA}, |
f55629b8 KK |
2899 | {"renesas", no_argument, NULL, OPTION_RENESAS}, |
2900 | ||
324bfcf3 | 2901 | #ifdef HAVE_SH64 |
f55629b8 | 2902 | #define OPTION_ABI (OPTION_RENESAS + 1) |
324bfcf3 AO |
2903 | #define OPTION_NO_MIX (OPTION_ABI + 1) |
2904 | #define OPTION_SHCOMPACT_CONST_CRANGE (OPTION_NO_MIX + 1) | |
2905 | #define OPTION_NO_EXPAND (OPTION_SHCOMPACT_CONST_CRANGE + 1) | |
2906 | #define OPTION_PT32 (OPTION_NO_EXPAND + 1) | |
324bfcf3 AO |
2907 | {"abi", required_argument, NULL, OPTION_ABI}, |
2908 | {"no-mix", no_argument, NULL, OPTION_NO_MIX}, | |
2909 | {"shcompact-const-crange", no_argument, NULL, OPTION_SHCOMPACT_CONST_CRANGE}, | |
2910 | {"no-expand", no_argument, NULL, OPTION_NO_EXPAND}, | |
2911 | {"expand-pt32", no_argument, NULL, OPTION_PT32}, | |
2912 | #endif /* HAVE_SH64 */ | |
2913 | ||
252b5132 RH |
2914 | {NULL, no_argument, NULL, 0} |
2915 | }; | |
c4aa876b | 2916 | size_t md_longopts_size = sizeof (md_longopts); |
252b5132 RH |
2917 | |
2918 | int | |
8edc77b9 | 2919 | md_parse_option (int c, char *arg ATTRIBUTE_UNUSED) |
252b5132 RH |
2920 | { |
2921 | switch (c) | |
2922 | { | |
2923 | case OPTION_RELAX: | |
2924 | sh_relax = 1; | |
2925 | break; | |
2926 | ||
05982cac HPN |
2927 | case OPTION_BIG: |
2928 | target_big_endian = 1; | |
2929 | break; | |
2930 | ||
252b5132 | 2931 | case OPTION_LITTLE: |
252b5132 RH |
2932 | target_big_endian = 0; |
2933 | break; | |
2934 | ||
2935 | case OPTION_SMALL: | |
2936 | sh_small = 1; | |
2937 | break; | |
2938 | ||
d4845d57 | 2939 | case OPTION_DSP: |
f6f9408f | 2940 | preset_target_arch = arch_sh1_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); |
d4845d57 JR |
2941 | break; |
2942 | ||
f55629b8 KK |
2943 | case OPTION_RENESAS: |
2944 | dont_adjust_reloc_32 = 1; | |
2945 | break; | |
2946 | ||
324bfcf3 | 2947 | case OPTION_ISA: |
871ec896 | 2948 | if (strcasecmp (arg, "dsp") == 0) |
f6f9408f | 2949 | preset_target_arch = arch_sh1_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); |
88da98f3 | 2950 | else if (strcasecmp (arg, "fp") == 0) |
f6f9408f | 2951 | preset_target_arch = arch_sh1_up & ~arch_sh_has_dsp; |
bdfaef52 JR |
2952 | else if (strcasecmp (arg, "any") == 0) |
2953 | preset_target_arch = arch_sh1_up; | |
2954 | #ifdef HAVE_SH64 | |
2955 | else if (strcasecmp (arg, "shmedia") == 0) | |
324bfcf3 AO |
2956 | { |
2957 | if (sh64_isa_mode == sh64_isa_shcompact) | |
2958 | as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia")); | |
2959 | sh64_isa_mode = sh64_isa_shmedia; | |
2960 | } | |
2961 | else if (strcasecmp (arg, "shcompact") == 0) | |
2962 | { | |
2963 | if (sh64_isa_mode == sh64_isa_shmedia) | |
2964 | as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact")); | |
2965 | if (sh64_abi == sh64_abi_64) | |
2966 | as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact")); | |
2967 | sh64_isa_mode = sh64_isa_shcompact; | |
2968 | } | |
bdfaef52 | 2969 | #endif /* HAVE_SH64 */ |
324bfcf3 | 2970 | else |
f6f9408f JR |
2971 | { |
2972 | extern const bfd_arch_info_type bfd_sh_arch; | |
871ec896 | 2973 | bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; |
f6f9408f JR |
2974 | preset_target_arch = 0; |
2975 | for (; bfd_arch; bfd_arch=bfd_arch->next) | |
2976 | { | |
2977 | int len = strlen(bfd_arch->printable_name); | |
2978 | ||
2979 | if (bfd_arch->mach == bfd_mach_sh5) | |
2980 | continue; | |
2981 | ||
2982 | if (strncasecmp (bfd_arch->printable_name, arg, len) != 0) | |
2983 | continue; | |
2984 | ||
2985 | if (arg[len] == '\0') | |
2986 | preset_target_arch = | |
2987 | sh_get_arch_from_bfd_mach (bfd_arch->mach); | |
2988 | else if (strcasecmp(&arg[len], "-up") == 0) | |
2989 | preset_target_arch = | |
2990 | sh_get_arch_up_from_bfd_mach (bfd_arch->mach); | |
2991 | else | |
2992 | continue; | |
2993 | break; | |
2994 | } | |
2995 | ||
2996 | if (!preset_target_arch) | |
2997 | as_bad ("Invalid argument to --isa option: %s", arg); | |
2998 | } | |
324bfcf3 AO |
2999 | break; |
3000 | ||
bdfaef52 | 3001 | #ifdef HAVE_SH64 |
324bfcf3 AO |
3002 | case OPTION_ABI: |
3003 | if (strcmp (arg, "32") == 0) | |
3004 | { | |
3005 | if (sh64_abi == sh64_abi_64) | |
3006 | as_bad (_("Invalid combination: --abi=32 with --abi=64")); | |
3007 | sh64_abi = sh64_abi_32; | |
3008 | } | |
3009 | else if (strcmp (arg, "64") == 0) | |
3010 | { | |
3011 | if (sh64_abi == sh64_abi_32) | |
3012 | as_bad (_("Invalid combination: --abi=64 with --abi=32")); | |
3013 | if (sh64_isa_mode == sh64_isa_shcompact) | |
3014 | as_bad (_("Invalid combination: --isa=SHcompact with --abi=64")); | |
3015 | sh64_abi = sh64_abi_64; | |
3016 | } | |
3017 | else | |
3018 | as_bad ("Invalid argument to --abi option: %s", arg); | |
3019 | break; | |
3020 | ||
3021 | case OPTION_NO_MIX: | |
b34976b6 | 3022 | sh64_mix = FALSE; |
324bfcf3 AO |
3023 | break; |
3024 | ||
3025 | case OPTION_SHCOMPACT_CONST_CRANGE: | |
b34976b6 | 3026 | sh64_shcompact_const_crange = TRUE; |
324bfcf3 AO |
3027 | break; |
3028 | ||
3029 | case OPTION_NO_EXPAND: | |
b34976b6 | 3030 | sh64_expand = FALSE; |
324bfcf3 AO |
3031 | break; |
3032 | ||
3033 | case OPTION_PT32: | |
b34976b6 | 3034 | sh64_pt32 = TRUE; |
324bfcf3 AO |
3035 | break; |
3036 | #endif /* HAVE_SH64 */ | |
3037 | ||
252b5132 RH |
3038 | default: |
3039 | return 0; | |
3040 | } | |
3041 | ||
3042 | return 1; | |
3043 | } | |
3044 | ||
3045 | void | |
8edc77b9 | 3046 | md_show_usage (FILE *stream) |
252b5132 | 3047 | { |
c4aa876b | 3048 | fprintf (stream, _("\ |
252b5132 RH |
3049 | SH options:\n\ |
3050 | -little generate little endian code\n\ | |
05982cac | 3051 | -big generate big endian code\n\ |
252b5132 | 3052 | -relax alter jump instructions for long displacements\n\ |
f55629b8 KK |
3053 | -renesas disable optimization with section symbol for\n\ |
3054 | compatibility with Renesas assembler.\n\ | |
5b8274e3 | 3055 | -small align sections to 4 byte boundaries, not 16\n\ |
ae51a426 | 3056 | -dsp enable sh-dsp insns, and disable floating-point ISAs.\n\ |
f6f9408f | 3057 | -isa=[any use most appropriate isa\n\ |
ae51a426 | 3058 | | dsp same as '-dsp'\n\ |
f6f9408f JR |
3059 | | fp")); |
3060 | { | |
3061 | extern const bfd_arch_info_type bfd_sh_arch; | |
871ec896 | 3062 | bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; |
f6f9408f JR |
3063 | for (; bfd_arch; bfd_arch=bfd_arch->next) |
3064 | if (bfd_arch->mach != bfd_mach_sh5) | |
3065 | { | |
3066 | fprintf (stream, "\n | %s", bfd_arch->printable_name); | |
3067 | fprintf (stream, "\n | %s-up", bfd_arch->printable_name); | |
3068 | } | |
3069 | } | |
3070 | fprintf (stream, "]\n"); | |
ae51a426 JR |
3071 | #ifdef HAVE_SH64 |
3072 | fprintf (stream, _("\ | |
3073 | -isa=[shmedia set as the default instruction set for SH64\n\ | |
88da98f3 MS |
3074 | | SHmedia\n\ |
3075 | | shcompact\n\ | |
ae51a426 | 3076 | | SHcompact]\n")); |
324bfcf3 | 3077 | fprintf (stream, _("\ |
324bfcf3 AO |
3078 | -abi=[32|64] set size of expanded SHmedia operands and object\n\ |
3079 | file type\n\ | |
3080 | -shcompact-const-crange emit code-range descriptors for constants in\n\ | |
3081 | SHcompact code sections\n\ | |
3082 | -no-mix disallow SHmedia code in the same section as\n\ | |
3083 | constants and SHcompact code\n\ | |
3084 | -no-expand do not expand MOVI, PT, PTA or PTB instructions\n\ | |
3085 | -expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\ | |
2acb89ed | 3086 | to 32 bits only\n")); |
324bfcf3 | 3087 | #endif /* HAVE_SH64 */ |
252b5132 RH |
3088 | } |
3089 | \f | |
252b5132 RH |
3090 | /* This struct is used to pass arguments to sh_count_relocs through |
3091 | bfd_map_over_sections. */ | |
3092 | ||
3093 | struct sh_count_relocs | |
3094 | { | |
3095 | /* Symbol we are looking for. */ | |
3096 | symbolS *sym; | |
3097 | /* Count of relocs found. */ | |
3098 | int count; | |
3099 | }; | |
3100 | ||
3101 | /* Count the number of fixups in a section which refer to a particular | |
3102 | symbol. When using BFD_ASSEMBLER, this is called via | |
3103 | bfd_map_over_sections. */ | |
3104 | ||
252b5132 | 3105 | static void |
8edc77b9 | 3106 | sh_count_relocs (bfd *abfd ATTRIBUTE_UNUSED, segT sec, void *data) |
252b5132 RH |
3107 | { |
3108 | struct sh_count_relocs *info = (struct sh_count_relocs *) data; | |
3109 | segment_info_type *seginfo; | |
3110 | symbolS *sym; | |
3111 | fixS *fix; | |
3112 | ||
3113 | seginfo = seg_info (sec); | |
3114 | if (seginfo == NULL) | |
3115 | return; | |
3116 | ||
3117 | sym = info->sym; | |
3118 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
3119 | { | |
3120 | if (fix->fx_addsy == sym) | |
3121 | { | |
3122 | ++info->count; | |
3123 | fix->fx_tcbit = 1; | |
3124 | } | |
3125 | } | |
3126 | } | |
3127 | ||
3128 | /* Handle the count relocs for a particular section. When using | |
3129 | BFD_ASSEMBLER, this is called via bfd_map_over_sections. */ | |
3130 | ||
252b5132 | 3131 | static void |
8edc77b9 KK |
3132 | sh_frob_section (bfd *abfd ATTRIBUTE_UNUSED, segT sec, |
3133 | void *ignore ATTRIBUTE_UNUSED) | |
252b5132 RH |
3134 | { |
3135 | segment_info_type *seginfo; | |
3136 | fixS *fix; | |
3137 | ||
3138 | seginfo = seg_info (sec); | |
3139 | if (seginfo == NULL) | |
3140 | return; | |
3141 | ||
3142 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
3143 | { | |
3144 | symbolS *sym; | |
3145 | bfd_vma val; | |
3146 | fixS *fscan; | |
3147 | struct sh_count_relocs info; | |
3148 | ||
3149 | if (fix->fx_r_type != BFD_RELOC_SH_USES) | |
3150 | continue; | |
3151 | ||
3152 | /* The BFD_RELOC_SH_USES reloc should refer to a defined local | |
3153 | symbol in the same section. */ | |
3154 | sym = fix->fx_addsy; | |
3155 | if (sym == NULL | |
3156 | || fix->fx_subsy != NULL | |
3157 | || fix->fx_addnumber != 0 | |
3158 | || S_GET_SEGMENT (sym) != sec | |
3159 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) | |
3160 | || S_GET_STORAGE_CLASS (sym) == C_EXT | |
3161 | #endif | |
3162 | || S_IS_EXTERNAL (sym)) | |
3163 | { | |
3164 | as_warn_where (fix->fx_file, fix->fx_line, | |
3165 | _(".uses does not refer to a local symbol in the same section")); | |
3166 | continue; | |
3167 | } | |
3168 | ||
3169 | /* Look through the fixups again, this time looking for one | |
3170 | at the same location as sym. */ | |
3171 | val = S_GET_VALUE (sym); | |
3172 | for (fscan = seginfo->fix_root; | |
3173 | fscan != NULL; | |
3174 | fscan = fscan->fx_next) | |
3175 | if (val == fscan->fx_frag->fr_address + fscan->fx_where | |
3176 | && fscan->fx_r_type != BFD_RELOC_SH_ALIGN | |
3177 | && fscan->fx_r_type != BFD_RELOC_SH_CODE | |
3178 | && fscan->fx_r_type != BFD_RELOC_SH_DATA | |
3179 | && fscan->fx_r_type != BFD_RELOC_SH_LABEL) | |
3180 | break; | |
3181 | if (fscan == NULL) | |
3182 | { | |
3183 | as_warn_where (fix->fx_file, fix->fx_line, | |
3184 | _("can't find fixup pointed to by .uses")); | |
3185 | continue; | |
3186 | } | |
3187 | ||
3188 | if (fscan->fx_tcbit) | |
3189 | { | |
3190 | /* We've already done this one. */ | |
3191 | continue; | |
3192 | } | |
3193 | ||
6b31947e NC |
3194 | /* The variable fscan should also be a fixup to a local symbol |
3195 | in the same section. */ | |
252b5132 RH |
3196 | sym = fscan->fx_addsy; |
3197 | if (sym == NULL | |
3198 | || fscan->fx_subsy != NULL | |
3199 | || fscan->fx_addnumber != 0 | |
3200 | || S_GET_SEGMENT (sym) != sec | |
3201 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) | |
3202 | || S_GET_STORAGE_CLASS (sym) == C_EXT | |
3203 | #endif | |
3204 | || S_IS_EXTERNAL (sym)) | |
3205 | { | |
3206 | as_warn_where (fix->fx_file, fix->fx_line, | |
3207 | _(".uses target does not refer to a local symbol in the same section")); | |
3208 | continue; | |
3209 | } | |
3210 | ||
3211 | /* Now we look through all the fixups of all the sections, | |
3212 | counting the number of times we find a reference to sym. */ | |
3213 | info.sym = sym; | |
3214 | info.count = 0; | |
3215 | #ifdef BFD_ASSEMBLER | |
8edc77b9 | 3216 | bfd_map_over_sections (stdoutput, sh_count_relocs, &info); |
252b5132 RH |
3217 | #else |
3218 | { | |
3219 | int iscan; | |
3220 | ||
3221 | for (iscan = SEG_E0; iscan < SEG_UNKNOWN; iscan++) | |
8edc77b9 | 3222 | sh_count_relocs ((bfd *) NULL, iscan, &info); |
252b5132 RH |
3223 | } |
3224 | #endif | |
3225 | ||
3226 | if (info.count < 1) | |
3227 | abort (); | |
3228 | ||
3229 | /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. | |
3230 | We have already adjusted the value of sym to include the | |
3231 | fragment address, so we undo that adjustment here. */ | |
3232 | subseg_change (sec, 0); | |
7bcad3e5 NC |
3233 | fix_new (fscan->fx_frag, |
3234 | S_GET_VALUE (sym) - fscan->fx_frag->fr_address, | |
252b5132 RH |
3235 | 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); |
3236 | } | |
3237 | } | |
3238 | ||
3239 | /* This function is called after the symbol table has been completed, | |
3240 | but before the relocs or section contents have been written out. | |
3241 | If we have seen any .uses pseudo-ops, they point to an instruction | |
3242 | which loads a register with the address of a function. We look | |
3243 | through the fixups to find where the function address is being | |
3244 | loaded from. We then generate a COUNT reloc giving the number of | |
3245 | times that function address is referred to. The linker uses this | |
3246 | information when doing relaxing, to decide when it can eliminate | |
3247 | the stored function address entirely. */ | |
3248 | ||
3249 | void | |
8edc77b9 | 3250 | sh_frob_file (void) |
252b5132 | 3251 | { |
324bfcf3 AO |
3252 | #ifdef HAVE_SH64 |
3253 | shmedia_frob_file_before_adjust (); | |
3254 | #endif | |
3255 | ||
252b5132 RH |
3256 | if (! sh_relax) |
3257 | return; | |
3258 | ||
3259 | #ifdef BFD_ASSEMBLER | |
8edc77b9 | 3260 | bfd_map_over_sections (stdoutput, sh_frob_section, NULL); |
252b5132 RH |
3261 | #else |
3262 | { | |
3263 | int iseg; | |
3264 | ||
3265 | for (iseg = SEG_E0; iseg < SEG_UNKNOWN; iseg++) | |
8edc77b9 | 3266 | sh_frob_section ((bfd *) NULL, iseg, NULL); |
252b5132 RH |
3267 | } |
3268 | #endif | |
3269 | } | |
3270 | ||
3271 | /* Called after relaxing. Set the correct sizes of the fragments, and | |
94f592af | 3272 | create relocs so that md_apply_fix3 will fill in the correct values. */ |
252b5132 RH |
3273 | |
3274 | void | |
252b5132 | 3275 | #ifdef BFD_ASSEMBLER |
8edc77b9 | 3276 | md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT seg, fragS *fragP) |
252b5132 | 3277 | #else |
8edc77b9 KK |
3278 | md_convert_frag (object_headers *headers ATTRIBUTE_UNUSED, segT seg, |
3279 | fragS *fragP) | |
252b5132 | 3280 | #endif |
252b5132 RH |
3281 | { |
3282 | int donerelax = 0; | |
3283 | ||
3284 | switch (fragP->fr_subtype) | |
3285 | { | |
3286 | case C (COND_JUMP, COND8): | |
3287 | case C (COND_JUMP_DELAY, COND8): | |
3288 | subseg_change (seg, 0); | |
3289 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
3290 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
3291 | fragP->fr_fix += 2; | |
3292 | fragP->fr_var = 0; | |
3293 | break; | |
3294 | ||
3295 | case C (UNCOND_JUMP, UNCOND12): | |
3296 | subseg_change (seg, 0); | |
3297 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
3298 | 1, BFD_RELOC_SH_PCDISP12BY2); | |
3299 | fragP->fr_fix += 2; | |
3300 | fragP->fr_var = 0; | |
3301 | break; | |
3302 | ||
3303 | case C (UNCOND_JUMP, UNCOND32): | |
3304 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): | |
3305 | if (fragP->fr_symbol == NULL) | |
99b222b4 HPN |
3306 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3307 | _("displacement overflows 12-bit field")); | |
252b5132 | 3308 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
99b222b4 HPN |
3309 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3310 | _("displacement to defined symbol %s overflows 12-bit field"), | |
3311 | S_GET_NAME (fragP->fr_symbol)); | |
252b5132 | 3312 | else |
99b222b4 HPN |
3313 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3314 | _("displacement to undefined symbol %s overflows 12-bit field"), | |
3315 | S_GET_NAME (fragP->fr_symbol)); | |
3316 | /* Stabilize this frag, so we don't trip an assert. */ | |
3317 | fragP->fr_fix += fragP->fr_var; | |
3318 | fragP->fr_var = 0; | |
252b5132 RH |
3319 | break; |
3320 | ||
3321 | case C (COND_JUMP, COND12): | |
3322 | case C (COND_JUMP_DELAY, COND12): | |
6b31947e | 3323 | /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */ |
252b5132 RH |
3324 | /* I found that a relax failure for gcc.c-torture/execute/930628-1.c |
3325 | was due to gas incorrectly relaxing an out-of-range conditional | |
3326 | branch with delay slot. It turned: | |
3327 | bf.s L6 (slot mov.l r12,@(44,r0)) | |
3328 | into: | |
c4aa876b | 3329 | |
252b5132 RH |
3330 | 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) |
3331 | 30: 00 09 nop | |
3332 | 32: 10 cb mov.l r12,@(44,r0) | |
3333 | Therefore, branches with delay slots have to be handled | |
3334 | differently from ones without delay slots. */ | |
3335 | { | |
3336 | unsigned char *buffer = | |
3337 | (unsigned char *) (fragP->fr_fix + fragP->fr_literal); | |
3338 | int highbyte = target_big_endian ? 0 : 1; | |
3339 | int lowbyte = target_big_endian ? 1 : 0; | |
3340 | int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); | |
3341 | ||
3342 | /* Toggle the true/false bit of the bcond. */ | |
3343 | buffer[highbyte] ^= 0x2; | |
3344 | ||
d3ecfc59 | 3345 | /* If this is a delayed branch, we may not put the bra in the |
252b5132 RH |
3346 | slot. So we change it to a non-delayed branch, like that: |
3347 | b! cond slot_label; bra disp; slot_label: slot_insn | |
3348 | ??? We should try if swapping the conditional branch and | |
3349 | its delay-slot insn already makes the branch reach. */ | |
3350 | ||
3351 | /* Build a relocation to six / four bytes farther on. */ | |
3352 | subseg_change (seg, 0); | |
3353 | fix_new (fragP, fragP->fr_fix, 2, | |
3354 | #ifdef BFD_ASSEMBLER | |
3355 | section_symbol (seg), | |
3356 | #else | |
3357 | seg_info (seg)->dot, | |
3358 | #endif | |
3359 | fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), | |
3360 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
3361 | ||
3362 | /* Set up a jump instruction. */ | |
3363 | buffer[highbyte + 2] = 0xa0; | |
3364 | buffer[lowbyte + 2] = 0; | |
3365 | fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, | |
3366 | fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); | |
3367 | ||
3368 | if (delay) | |
3369 | { | |
3370 | buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ | |
3371 | fragP->fr_fix += 4; | |
3372 | } | |
3373 | else | |
3374 | { | |
3375 | /* Fill in a NOP instruction. */ | |
3376 | buffer[highbyte + 4] = 0x0; | |
3377 | buffer[lowbyte + 4] = 0x9; | |
3378 | ||
3379 | fragP->fr_fix += 6; | |
3380 | } | |
3381 | fragP->fr_var = 0; | |
3382 | donerelax = 1; | |
3383 | } | |
3384 | break; | |
3385 | ||
3386 | case C (COND_JUMP, COND32): | |
3387 | case C (COND_JUMP_DELAY, COND32): | |
3388 | case C (COND_JUMP, UNDEF_WORD_DISP): | |
3389 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): | |
3390 | if (fragP->fr_symbol == NULL) | |
99b222b4 HPN |
3391 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3392 | _("displacement overflows 8-bit field")); | |
252b5132 | 3393 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
99b222b4 HPN |
3394 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3395 | _("displacement to defined symbol %s overflows 8-bit field"), | |
3396 | S_GET_NAME (fragP->fr_symbol)); | |
252b5132 | 3397 | else |
99b222b4 HPN |
3398 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3399 | _("displacement to undefined symbol %s overflows 8-bit field "), | |
3400 | S_GET_NAME (fragP->fr_symbol)); | |
3401 | /* Stabilize this frag, so we don't trip an assert. */ | |
3402 | fragP->fr_fix += fragP->fr_var; | |
3403 | fragP->fr_var = 0; | |
252b5132 RH |
3404 | break; |
3405 | ||
3406 | default: | |
324bfcf3 | 3407 | #ifdef HAVE_SH64 |
b34976b6 | 3408 | shmedia_md_convert_frag (headers, seg, fragP, TRUE); |
324bfcf3 | 3409 | #else |
252b5132 | 3410 | abort (); |
324bfcf3 | 3411 | #endif |
252b5132 RH |
3412 | } |
3413 | ||
3414 | if (donerelax && !sh_relax) | |
3415 | as_warn_where (fragP->fr_file, fragP->fr_line, | |
3416 | _("overflow in branch to %s; converted into longer instruction sequence"), | |
3417 | (fragP->fr_symbol != NULL | |
3418 | ? S_GET_NAME (fragP->fr_symbol) | |
3419 | : "")); | |
3420 | } | |
3421 | ||
3422 | valueT | |
8edc77b9 | 3423 | md_section_align (segT seg ATTRIBUTE_UNUSED, valueT size) |
252b5132 RH |
3424 | { |
3425 | #ifdef BFD_ASSEMBLER | |
3426 | #ifdef OBJ_ELF | |
3427 | return size; | |
3428 | #else /* ! OBJ_ELF */ | |
3429 | return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1) | |
3430 | & (-1 << bfd_get_section_alignment (stdoutput, seg))); | |
3431 | #endif /* ! OBJ_ELF */ | |
3432 | #else /* ! BFD_ASSEMBLER */ | |
3433 | return ((size + (1 << section_alignment[(int) seg]) - 1) | |
3434 | & (-1 << section_alignment[(int) seg])); | |
3435 | #endif /* ! BFD_ASSEMBLER */ | |
3436 | } | |
3437 | ||
3438 | /* This static variable is set by s_uacons to tell sh_cons_align that | |
67c1ffbe | 3439 | the expression does not need to be aligned. */ |
252b5132 RH |
3440 | |
3441 | static int sh_no_align_cons = 0; | |
3442 | ||
3443 | /* This handles the unaligned space allocation pseudo-ops, such as | |
3444 | .uaword. .uaword is just like .word, but the value does not need | |
3445 | to be aligned. */ | |
3446 | ||
3447 | static void | |
8edc77b9 | 3448 | s_uacons (int bytes) |
252b5132 RH |
3449 | { |
3450 | /* Tell sh_cons_align not to align this value. */ | |
3451 | sh_no_align_cons = 1; | |
3452 | cons (bytes); | |
3453 | } | |
3454 | ||
3455 | /* If a .word, et. al., pseud-op is seen, warn if the value is not | |
3456 | aligned correctly. Note that this can cause warnings to be issued | |
3457 | when assembling initialized structured which were declared with the | |
3458 | packed attribute. FIXME: Perhaps we should require an option to | |
3459 | enable this warning? */ | |
3460 | ||
3461 | void | |
8edc77b9 | 3462 | sh_cons_align (int nbytes) |
252b5132 RH |
3463 | { |
3464 | int nalign; | |
3465 | char *p; | |
3466 | ||
3467 | if (sh_no_align_cons) | |
3468 | { | |
3469 | /* This is an unaligned pseudo-op. */ | |
3470 | sh_no_align_cons = 0; | |
3471 | return; | |
3472 | } | |
3473 | ||
3474 | nalign = 0; | |
3475 | while ((nbytes & 1) == 0) | |
3476 | { | |
3477 | ++nalign; | |
3478 | nbytes >>= 1; | |
3479 | } | |
3480 | ||
3481 | if (nalign == 0) | |
3482 | return; | |
3483 | ||
3484 | if (now_seg == absolute_section) | |
3485 | { | |
3486 | if ((abs_section_offset & ((1 << nalign) - 1)) != 0) | |
3487 | as_warn (_("misaligned data")); | |
3488 | return; | |
3489 | } | |
3490 | ||
0a9ef439 | 3491 | p = frag_var (rs_align_test, 1, 1, (relax_substateT) 0, |
252b5132 RH |
3492 | (symbolS *) NULL, (offsetT) nalign, (char *) NULL); |
3493 | ||
3494 | record_alignment (now_seg, nalign); | |
3495 | } | |
3496 | ||
3497 | /* When relaxing, we need to output a reloc for any .align directive | |
3498 | that requests alignment to a four byte boundary or larger. This is | |
3499 | also where we check for misaligned data. */ | |
3500 | ||
3501 | void | |
8edc77b9 | 3502 | sh_handle_align (fragS *frag) |
252b5132 | 3503 | { |
0a9ef439 RH |
3504 | int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix; |
3505 | ||
3506 | if (frag->fr_type == rs_align_code) | |
3507 | { | |
3508 | static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; | |
3509 | static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; | |
3510 | ||
3511 | char *p = frag->fr_literal + frag->fr_fix; | |
3512 | ||
3513 | if (bytes & 1) | |
3514 | { | |
3515 | *p++ = 0; | |
3516 | bytes--; | |
3517 | frag->fr_fix += 1; | |
3518 | } | |
3519 | ||
3520 | if (target_big_endian) | |
3521 | { | |
3522 | memcpy (p, big_nop_pattern, sizeof big_nop_pattern); | |
3523 | frag->fr_var = sizeof big_nop_pattern; | |
3524 | } | |
3525 | else | |
3526 | { | |
3527 | memcpy (p, little_nop_pattern, sizeof little_nop_pattern); | |
3528 | frag->fr_var = sizeof little_nop_pattern; | |
3529 | } | |
3530 | } | |
3531 | else if (frag->fr_type == rs_align_test) | |
3532 | { | |
3533 | if (bytes != 0) | |
3534 | as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data")); | |
3535 | } | |
3536 | ||
252b5132 | 3537 | if (sh_relax |
0a9ef439 RH |
3538 | && (frag->fr_type == rs_align |
3539 | || frag->fr_type == rs_align_code) | |
252b5132 RH |
3540 | && frag->fr_address + frag->fr_fix > 0 |
3541 | && frag->fr_offset > 1 | |
3542 | && now_seg != bss_section) | |
3543 | fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, | |
3544 | BFD_RELOC_SH_ALIGN); | |
252b5132 RH |
3545 | } |
3546 | ||
28602ebf KK |
3547 | /* See whether the relocation should be resolved locally. */ |
3548 | ||
b34976b6 | 3549 | static bfd_boolean |
8edc77b9 | 3550 | sh_local_pcrel (fixS *fix) |
28602ebf | 3551 | { |
b34976b6 AM |
3552 | return (! sh_relax |
3553 | && (fix->fx_r_type == BFD_RELOC_SH_PCDISP8BY2 | |
3554 | || fix->fx_r_type == BFD_RELOC_SH_PCDISP12BY2 | |
3555 | || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2 | |
3556 | || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4 | |
3557 | || fix->fx_r_type == BFD_RELOC_8_PCREL | |
3558 | || fix->fx_r_type == BFD_RELOC_SH_SWITCH16 | |
3559 | || fix->fx_r_type == BFD_RELOC_SH_SWITCH32)); | |
28602ebf KK |
3560 | } |
3561 | ||
252b5132 RH |
3562 | /* See whether we need to force a relocation into the output file. |
3563 | This is used to force out switch and PC relative relocations when | |
3564 | relaxing. */ | |
3565 | ||
3566 | int | |
8edc77b9 | 3567 | sh_force_relocation (fixS *fix) |
252b5132 | 3568 | { |
8ba4dac0 DJ |
3569 | /* These relocations can't make it into a DSO, so no use forcing |
3570 | them for global symbols. */ | |
28602ebf | 3571 | if (sh_local_pcrel (fix)) |
8ba4dac0 DJ |
3572 | return 0; |
3573 | ||
9efb3b7b | 3574 | /* Make sure some relocations get emitted. */ |
ae6063d4 | 3575 | if (fix->fx_r_type == BFD_RELOC_SH_LOOP_START |
a161fe53 | 3576 | || fix->fx_r_type == BFD_RELOC_SH_LOOP_END |
9efb3b7b KK |
3577 | || fix->fx_r_type == BFD_RELOC_SH_TLS_GD_32 |
3578 | || fix->fx_r_type == BFD_RELOC_SH_TLS_LD_32 | |
3579 | || fix->fx_r_type == BFD_RELOC_SH_TLS_IE_32 | |
3580 | || fix->fx_r_type == BFD_RELOC_SH_TLS_LDO_32 | |
3581 | || fix->fx_r_type == BFD_RELOC_SH_TLS_LE_32 | |
ae6063d4 | 3582 | || generic_force_reloc (fix)) |
252b5132 RH |
3583 | return 1; |
3584 | ||
3585 | if (! sh_relax) | |
3586 | return 0; | |
3587 | ||
3588 | return (fix->fx_pcrel | |
3589 | || SWITCH_TABLE (fix) | |
3590 | || fix->fx_r_type == BFD_RELOC_SH_COUNT | |
3591 | || fix->fx_r_type == BFD_RELOC_SH_ALIGN | |
3592 | || fix->fx_r_type == BFD_RELOC_SH_CODE | |
3593 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
324bfcf3 AO |
3594 | #ifdef HAVE_SH64 |
3595 | || fix->fx_r_type == BFD_RELOC_SH_SHMEDIA_CODE | |
3596 | #endif | |
252b5132 RH |
3597 | || fix->fx_r_type == BFD_RELOC_SH_LABEL); |
3598 | } | |
3599 | ||
3600 | #ifdef OBJ_ELF | |
b34976b6 | 3601 | bfd_boolean |
8edc77b9 | 3602 | sh_fix_adjustable (fixS *fixP) |
252b5132 | 3603 | { |
a161fe53 AM |
3604 | if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL |
3605 | || fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL | |
3606 | || fixP->fx_r_type == BFD_RELOC_SH_GOTPC | |
f55629b8 | 3607 | || ((fixP->fx_r_type == BFD_RELOC_32) && dont_adjust_reloc_32) |
a1cc9221 AO |
3608 | || fixP->fx_r_type == BFD_RELOC_RVA) |
3609 | return 0; | |
3610 | ||
252b5132 RH |
3611 | /* We need the symbol name for the VTABLE entries */ |
3612 | if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
3613 | || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
3614 | return 0; | |
3615 | ||
3616 | return 1; | |
3617 | } | |
d4845d57 | 3618 | |
6b31947e | 3619 | void |
8edc77b9 | 3620 | sh_elf_final_processing (void) |
d4845d57 JR |
3621 | { |
3622 | int val; | |
3623 | ||
3624 | /* Set file-specific flags to indicate if this code needs | |
88da98f3 | 3625 | a processor with the sh-dsp / sh2e ISA to execute. */ |
324bfcf3 AO |
3626 | #ifdef HAVE_SH64 |
3627 | /* SH5 and above don't know about the valid_arch arch_sh* bits defined | |
3628 | in sh-opc.h, so check SH64 mode before checking valid_arch. */ | |
3629 | if (sh64_isa_mode != sh64_isa_unspecified) | |
3630 | val = EF_SH5; | |
3631 | else | |
1a320fbb NC |
3632 | #elif defined TARGET_SYMBIAN |
3633 | if (1) | |
3634 | val = sh_symbian_find_elf_flags (valid_arch); | |
3635 | else | |
324bfcf3 | 3636 | #endif /* HAVE_SH64 */ |
f6f9408f | 3637 | val = sh_find_elf_flags (valid_arch); |
d4845d57 JR |
3638 | |
3639 | elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; | |
3640 | elf_elfheader (stdoutput)->e_flags |= val; | |
3641 | } | |
252b5132 RH |
3642 | #endif |
3643 | ||
3644 | /* Apply a fixup to the object file. */ | |
3645 | ||
252b5132 | 3646 | void |
8edc77b9 | 3647 | md_apply_fix3 (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) |
252b5132 RH |
3648 | { |
3649 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; | |
3650 | int lowbyte = target_big_endian ? 1 : 0; | |
3651 | int highbyte = target_big_endian ? 0 : 1; | |
2ed5f585 | 3652 | long val = (long) *valP; |
252b5132 RH |
3653 | long max, min; |
3654 | int shift; | |
3655 | ||
3656 | #ifdef BFD_ASSEMBLER | |
a1cc9221 AO |
3657 | /* A difference between two symbols, the second of which is in the |
3658 | current section, is transformed in a PC-relative relocation to | |
3659 | the other symbol. We have to adjust the relocation type here. */ | |
3660 | if (fixP->fx_pcrel) | |
3661 | { | |
3662 | switch (fixP->fx_r_type) | |
3663 | { | |
3664 | default: | |
3665 | break; | |
3666 | ||
3667 | case BFD_RELOC_32: | |
3668 | fixP->fx_r_type = BFD_RELOC_32_PCREL; | |
3669 | break; | |
3670 | ||
3671 | /* Currently, we only support 32-bit PCREL relocations. | |
3672 | We'd need a new reloc type to handle 16_PCREL, and | |
3673 | 8_PCREL is already taken for R_SH_SWITCH8, which | |
3674 | apparently does something completely different than what | |
3675 | we need. FIXME. */ | |
3676 | case BFD_RELOC_16: | |
3677 | bfd_set_error (bfd_error_bad_value); | |
94f592af | 3678 | return; |
81d4177b | 3679 | |
a1cc9221 AO |
3680 | case BFD_RELOC_8: |
3681 | bfd_set_error (bfd_error_bad_value); | |
94f592af | 3682 | return; |
a1cc9221 AO |
3683 | } |
3684 | } | |
3685 | ||
6b31947e NC |
3686 | /* The function adjust_reloc_syms won't convert a reloc against a weak |
3687 | symbol into a reloc against a section, but bfd_install_relocation | |
3688 | will screw up if the symbol is defined, so we have to adjust val here | |
1308f14c HPN |
3689 | to avoid the screw up later. |
3690 | ||
3691 | For ordinary relocs, this does not happen for ELF, since for ELF, | |
3692 | bfd_install_relocation uses the "special function" field of the | |
3693 | howto, and does not execute the code that needs to be undone, as long | |
3694 | as the special function does not return bfd_reloc_continue. | |
3695 | It can happen for GOT- and PLT-type relocs the way they are | |
3696 | described in elf32-sh.c as they use bfd_elf_generic_reloc, but it | |
3697 | doesn't matter here since those relocs don't use VAL; see below. */ | |
3698 | if (OUTPUT_FLAVOR != bfd_target_elf_flavour | |
3699 | && fixP->fx_addsy != NULL | |
252b5132 RH |
3700 | && S_IS_WEAK (fixP->fx_addsy)) |
3701 | val -= S_GET_VALUE (fixP->fx_addsy); | |
3702 | #endif | |
3703 | ||
bdfaef52 JR |
3704 | #ifdef BFD_ASSEMBLER |
3705 | if (SWITCH_TABLE (fixP)) | |
3706 | val -= S_GET_VALUE (fixP->fx_subsy); | |
3707 | #else | |
252b5132 RH |
3708 | if (fixP->fx_r_type == 0) |
3709 | { | |
3710 | if (fixP->fx_size == 2) | |
3711 | fixP->fx_r_type = BFD_RELOC_16; | |
3712 | else if (fixP->fx_size == 4) | |
3713 | fixP->fx_r_type = BFD_RELOC_32; | |
3714 | else if (fixP->fx_size == 1) | |
3715 | fixP->fx_r_type = BFD_RELOC_8; | |
3716 | else | |
3717 | abort (); | |
3718 | } | |
3719 | #endif | |
3720 | ||
3721 | max = min = 0; | |
3722 | shift = 0; | |
3723 | switch (fixP->fx_r_type) | |
3724 | { | |
3725 | case BFD_RELOC_SH_IMM4: | |
3726 | max = 0xf; | |
3727 | *buf = (*buf & 0xf0) | (val & 0xf); | |
3728 | break; | |
3729 | ||
3730 | case BFD_RELOC_SH_IMM4BY2: | |
3731 | max = 0xf; | |
3732 | shift = 1; | |
3733 | *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); | |
3734 | break; | |
3735 | ||
3736 | case BFD_RELOC_SH_IMM4BY4: | |
3737 | max = 0xf; | |
3738 | shift = 2; | |
3739 | *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); | |
3740 | break; | |
3741 | ||
3742 | case BFD_RELOC_SH_IMM8BY2: | |
3743 | max = 0xff; | |
3744 | shift = 1; | |
3745 | *buf = val >> 1; | |
3746 | break; | |
3747 | ||
3748 | case BFD_RELOC_SH_IMM8BY4: | |
3749 | max = 0xff; | |
3750 | shift = 2; | |
3751 | *buf = val >> 2; | |
3752 | break; | |
3753 | ||
3754 | case BFD_RELOC_8: | |
3755 | case BFD_RELOC_SH_IMM8: | |
3756 | /* Sometimes the 8 bit value is sign extended (e.g., add) and | |
3757 | sometimes it is not (e.g., and). We permit any 8 bit value. | |
3758 | Note that adding further restrictions may invalidate | |
3759 | reasonable looking assembly code, such as ``and -0x1,r0''. */ | |
3760 | max = 0xff; | |
c4aa876b | 3761 | min = -0xff; |
252b5132 RH |
3762 | *buf++ = val; |
3763 | break; | |
3764 | ||
3765 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
3766 | /* The lower two bits of the PC are cleared before the | |
3767 | displacement is added in. We can assume that the destination | |
67c1ffbe | 3768 | is on a 4 byte boundary. If this instruction is also on a 4 |
252b5132 RH |
3769 | byte boundary, then we want |
3770 | (target - here) / 4 | |
3771 | and target - here is a multiple of 4. | |
3772 | Otherwise, we are on a 2 byte boundary, and we want | |
3773 | (target - (here - 2)) / 4 | |
3774 | and target - here is not a multiple of 4. Computing | |
3775 | (target - (here - 2)) / 4 == (target - here + 2) / 4 | |
3776 | works for both cases, since in the first case the addition of | |
3777 | 2 will be removed by the division. target - here is in the | |
3778 | variable val. */ | |
3779 | val = (val + 2) / 4; | |
3780 | if (val & ~0xff) | |
3781 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
3782 | buf[lowbyte] = val; | |
3783 | break; | |
3784 | ||
3785 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
3786 | val /= 2; | |
3787 | if (val & ~0xff) | |
3788 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
3789 | buf[lowbyte] = val; | |
3790 | break; | |
3791 | ||
3792 | case BFD_RELOC_SH_PCDISP8BY2: | |
3793 | val /= 2; | |
3794 | if (val < -0x80 || val > 0x7f) | |
3795 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
3796 | buf[lowbyte] = val; | |
3797 | break; | |
3798 | ||
3799 | case BFD_RELOC_SH_PCDISP12BY2: | |
3800 | val /= 2; | |
8637c045 | 3801 | if (val < -0x800 || val > 0x7ff) |
252b5132 RH |
3802 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); |
3803 | buf[lowbyte] = val & 0xff; | |
3804 | buf[highbyte] |= (val >> 8) & 0xf; | |
3805 | break; | |
3806 | ||
3807 | case BFD_RELOC_32: | |
a1cc9221 | 3808 | case BFD_RELOC_32_PCREL: |
1db77c8e | 3809 | md_number_to_chars (buf, val, 4); |
252b5132 RH |
3810 | break; |
3811 | ||
3812 | case BFD_RELOC_16: | |
1db77c8e | 3813 | md_number_to_chars (buf, val, 2); |
252b5132 RH |
3814 | break; |
3815 | ||
3816 | case BFD_RELOC_SH_USES: | |
3817 | /* Pass the value into sh_coff_reloc_mangle. */ | |
3818 | fixP->fx_addnumber = val; | |
3819 | break; | |
3820 | ||
3821 | case BFD_RELOC_SH_COUNT: | |
3822 | case BFD_RELOC_SH_ALIGN: | |
3823 | case BFD_RELOC_SH_CODE: | |
3824 | case BFD_RELOC_SH_DATA: | |
3825 | case BFD_RELOC_SH_LABEL: | |
3826 | /* Nothing to do here. */ | |
3827 | break; | |
3828 | ||
015551fc JR |
3829 | case BFD_RELOC_SH_LOOP_START: |
3830 | case BFD_RELOC_SH_LOOP_END: | |
3831 | ||
252b5132 RH |
3832 | case BFD_RELOC_VTABLE_INHERIT: |
3833 | case BFD_RELOC_VTABLE_ENTRY: | |
3834 | fixP->fx_done = 0; | |
3835 | return; | |
3836 | ||
a1cc9221 AO |
3837 | #ifdef OBJ_ELF |
3838 | case BFD_RELOC_32_PLT_PCREL: | |
3839 | /* Make the jump instruction point to the address of the operand. At | |
81d4177b | 3840 | runtime we merely add the offset to the actual PLT entry. */ |
94f592af | 3841 | * valP = 0xfffffffc; |
0174e383 | 3842 | val = fixP->fx_offset; |
ac3f04d7 AO |
3843 | if (fixP->fx_subsy) |
3844 | val -= S_GET_VALUE (fixP->fx_subsy); | |
a161fe53 | 3845 | fixP->fx_addnumber = val; |
538cd60f | 3846 | md_number_to_chars (buf, val, 4); |
a1cc9221 AO |
3847 | break; |
3848 | ||
3849 | case BFD_RELOC_SH_GOTPC: | |
3850 | /* This is tough to explain. We end up with this one if we have | |
3851 | operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". | |
3852 | The goal here is to obtain the absolute address of the GOT, | |
3853 | and it is strongly preferable from a performance point of | |
3854 | view to avoid using a runtime relocation for this. There are | |
3855 | cases where you have something like: | |
81d4177b | 3856 | |
a1cc9221 | 3857 | .long _GLOBAL_OFFSET_TABLE_+[.-.L66] |
81d4177b | 3858 | |
a1cc9221 AO |
3859 | and here no correction would be required. Internally in the |
3860 | assembler we treat operands of this form as not being pcrel | |
3861 | since the '.' is explicitly mentioned, and I wonder whether | |
3862 | it would simplify matters to do it this way. Who knows. In | |
3863 | earlier versions of the PIC patches, the pcrel_adjust field | |
3864 | was used to store the correction, but since the expression is | |
3865 | not pcrel, I felt it would be confusing to do it this way. */ | |
94f592af | 3866 | * valP -= 1; |
a1cc9221 AO |
3867 | md_number_to_chars (buf, val, 4); |
3868 | break; | |
3869 | ||
9efb3b7b KK |
3870 | case BFD_RELOC_SH_TLS_GD_32: |
3871 | case BFD_RELOC_SH_TLS_LD_32: | |
3872 | case BFD_RELOC_SH_TLS_IE_32: | |
2bba4140 KK |
3873 | S_SET_THREAD_LOCAL (fixP->fx_addsy); |
3874 | /* Fallthrough */ | |
3875 | case BFD_RELOC_32_GOT_PCREL: | |
3876 | case BFD_RELOC_SH_GOTPLT32: | |
94f592af | 3877 | * valP = 0; /* Fully resolved at runtime. No addend. */ |
a1cc9221 AO |
3878 | md_number_to_chars (buf, 0, 4); |
3879 | break; | |
3880 | ||
9efb3b7b KK |
3881 | case BFD_RELOC_SH_TLS_LDO_32: |
3882 | case BFD_RELOC_SH_TLS_LE_32: | |
2bba4140 KK |
3883 | S_SET_THREAD_LOCAL (fixP->fx_addsy); |
3884 | /* Fallthrough */ | |
3885 | case BFD_RELOC_32_GOTOFF: | |
538cd60f | 3886 | md_number_to_chars (buf, val, 4); |
a1cc9221 AO |
3887 | break; |
3888 | #endif | |
3889 | ||
252b5132 | 3890 | default: |
324bfcf3 AO |
3891 | #ifdef HAVE_SH64 |
3892 | shmedia_md_apply_fix3 (fixP, valP); | |
3893 | return; | |
3894 | #else | |
252b5132 | 3895 | abort (); |
324bfcf3 | 3896 | #endif |
252b5132 RH |
3897 | } |
3898 | ||
3899 | if (shift != 0) | |
3900 | { | |
3901 | if ((val & ((1 << shift) - 1)) != 0) | |
3902 | as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); | |
3903 | if (val >= 0) | |
3904 | val >>= shift; | |
3905 | else | |
3906 | val = ((val >> shift) | |
3907 | | ((long) -1 & ~ ((long) -1 >> shift))); | |
3908 | } | |
3909 | if (max != 0 && (val < min || val > max)) | |
3910 | as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); | |
3911 | ||
94f592af NC |
3912 | if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) |
3913 | fixP->fx_done = 1; | |
252b5132 RH |
3914 | } |
3915 | ||
3916 | /* Called just before address relaxation. Return the length | |
3917 | by which a fragment must grow to reach it's destination. */ | |
3918 | ||
3919 | int | |
8edc77b9 | 3920 | md_estimate_size_before_relax (fragS *fragP, segT segment_type) |
252b5132 | 3921 | { |
e66457fb AM |
3922 | int what; |
3923 | ||
252b5132 RH |
3924 | switch (fragP->fr_subtype) |
3925 | { | |
93c2a809 | 3926 | default: |
324bfcf3 AO |
3927 | #ifdef HAVE_SH64 |
3928 | return shmedia_md_estimate_size_before_relax (fragP, segment_type); | |
3929 | #else | |
93c2a809 | 3930 | abort (); |
324bfcf3 AO |
3931 | #endif |
3932 | ||
93c2a809 | 3933 | |
252b5132 | 3934 | case C (UNCOND_JUMP, UNDEF_DISP): |
6b31947e | 3935 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
3936 | if (!fragP->fr_symbol) |
3937 | { | |
3938 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
252b5132 RH |
3939 | } |
3940 | else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
3941 | { | |
3942 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
252b5132 RH |
3943 | } |
3944 | else | |
3945 | { | |
3946 | fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); | |
252b5132 RH |
3947 | } |
3948 | break; | |
3949 | ||
252b5132 RH |
3950 | case C (COND_JUMP, UNDEF_DISP): |
3951 | case C (COND_JUMP_DELAY, UNDEF_DISP): | |
e66457fb | 3952 | what = GET_WHAT (fragP->fr_subtype); |
6b31947e | 3953 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
3954 | if (fragP->fr_symbol |
3955 | && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
3956 | { | |
252b5132 | 3957 | /* Got a symbol and it's defined in this segment, become byte |
6b31947e | 3958 | sized - maybe it will fix up. */ |
252b5132 | 3959 | fragP->fr_subtype = C (what, COND8); |
252b5132 RH |
3960 | } |
3961 | else if (fragP->fr_symbol) | |
3962 | { | |
6b31947e | 3963 | /* Its got a segment, but its not ours, so it will always be long. */ |
252b5132 | 3964 | fragP->fr_subtype = C (what, UNDEF_WORD_DISP); |
252b5132 RH |
3965 | } |
3966 | else | |
3967 | { | |
6b31947e | 3968 | /* We know the abs value. */ |
252b5132 | 3969 | fragP->fr_subtype = C (what, COND8); |
252b5132 | 3970 | } |
93c2a809 | 3971 | break; |
252b5132 | 3972 | |
93c2a809 | 3973 | case C (UNCOND_JUMP, UNCOND12): |
e66457fb | 3974 | case C (UNCOND_JUMP, UNCOND32): |
93c2a809 AM |
3975 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): |
3976 | case C (COND_JUMP, COND8): | |
e66457fb AM |
3977 | case C (COND_JUMP, COND12): |
3978 | case C (COND_JUMP, COND32): | |
93c2a809 AM |
3979 | case C (COND_JUMP, UNDEF_WORD_DISP): |
3980 | case C (COND_JUMP_DELAY, COND8): | |
e66457fb AM |
3981 | case C (COND_JUMP_DELAY, COND12): |
3982 | case C (COND_JUMP_DELAY, COND32): | |
93c2a809 AM |
3983 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): |
3984 | /* When relaxing a section for the second time, we don't need to | |
e66457fb | 3985 | do anything besides return the current size. */ |
252b5132 RH |
3986 | break; |
3987 | } | |
e66457fb AM |
3988 | |
3989 | fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length; | |
252b5132 RH |
3990 | return fragP->fr_var; |
3991 | } | |
3992 | ||
6b31947e | 3993 | /* Put number into target byte order. */ |
252b5132 RH |
3994 | |
3995 | void | |
8edc77b9 | 3996 | md_number_to_chars (char *ptr, valueT use, int nbytes) |
252b5132 | 3997 | { |
324bfcf3 AO |
3998 | #ifdef HAVE_SH64 |
3999 | /* We might need to set the contents type to data. */ | |
4000 | sh64_flag_output (); | |
4001 | #endif | |
4002 | ||
252b5132 RH |
4003 | if (! target_big_endian) |
4004 | number_to_chars_littleendian (ptr, use, nbytes); | |
4005 | else | |
4006 | number_to_chars_bigendian (ptr, use, nbytes); | |
4007 | } | |
4008 | ||
cce5a618 NC |
4009 | /* This version is used in obj-coff.c when not using BFD_ASSEMBLER. |
4010 | eg for the sh-hms target. */ | |
4011 | ||
4012 | long | |
8edc77b9 | 4013 | md_pcrel_from (fixS *fixP) |
cce5a618 NC |
4014 | { |
4015 | return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; | |
4016 | } | |
4017 | ||
252b5132 | 4018 | long |
8edc77b9 | 4019 | md_pcrel_from_section (fixS *fixP, segT sec) |
252b5132 | 4020 | { |
28602ebf KK |
4021 | if (! sh_local_pcrel (fixP) |
4022 | && fixP->fx_addsy != (symbolS *) NULL | |
ae6063d4 | 4023 | && (generic_force_reloc (fixP) |
ef17112f HPN |
4024 | || S_GET_SEGMENT (fixP->fx_addsy) != sec)) |
4025 | { | |
4026 | /* The symbol is undefined (or is defined but not in this section, | |
4027 | or we're not sure about it being the final definition). Let the | |
4028 | linker figure it out. We need to adjust the subtraction of a | |
4029 | symbol to the position of the relocated data, though. */ | |
4030 | return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0; | |
4031 | } | |
4032 | ||
cce5a618 | 4033 | return md_pcrel_from (fixP); |
252b5132 RH |
4034 | } |
4035 | ||
4036 | #ifdef OBJ_COFF | |
4037 | ||
4038 | int | |
8edc77b9 | 4039 | tc_coff_sizemachdep (fragS *frag) |
252b5132 RH |
4040 | { |
4041 | return md_relax_table[frag->fr_subtype].rlx_length; | |
4042 | } | |
4043 | ||
4044 | #endif /* OBJ_COFF */ | |
4045 | ||
252b5132 RH |
4046 | #ifndef BFD_ASSEMBLER |
4047 | #ifdef OBJ_COFF | |
4048 | ||
4049 | /* Map BFD relocs to SH COFF relocs. */ | |
4050 | ||
4051 | struct reloc_map | |
4052 | { | |
4053 | bfd_reloc_code_real_type bfd_reloc; | |
4054 | int sh_reloc; | |
4055 | }; | |
4056 | ||
4057 | static const struct reloc_map coff_reloc_map[] = | |
4058 | { | |
4059 | { BFD_RELOC_32, R_SH_IMM32 }, | |
4060 | { BFD_RELOC_16, R_SH_IMM16 }, | |
4061 | { BFD_RELOC_8, R_SH_IMM8 }, | |
4062 | { BFD_RELOC_SH_PCDISP8BY2, R_SH_PCDISP8BY2 }, | |
4063 | { BFD_RELOC_SH_PCDISP12BY2, R_SH_PCDISP }, | |
4064 | { BFD_RELOC_SH_IMM4, R_SH_IMM4 }, | |
4065 | { BFD_RELOC_SH_IMM4BY2, R_SH_IMM4BY2 }, | |
4066 | { BFD_RELOC_SH_IMM4BY4, R_SH_IMM4BY4 }, | |
4067 | { BFD_RELOC_SH_IMM8, R_SH_IMM8 }, | |
4068 | { BFD_RELOC_SH_IMM8BY2, R_SH_IMM8BY2 }, | |
4069 | { BFD_RELOC_SH_IMM8BY4, R_SH_IMM8BY4 }, | |
4070 | { BFD_RELOC_SH_PCRELIMM8BY2, R_SH_PCRELIMM8BY2 }, | |
4071 | { BFD_RELOC_SH_PCRELIMM8BY4, R_SH_PCRELIMM8BY4 }, | |
4072 | { BFD_RELOC_8_PCREL, R_SH_SWITCH8 }, | |
4073 | { BFD_RELOC_SH_SWITCH16, R_SH_SWITCH16 }, | |
4074 | { BFD_RELOC_SH_SWITCH32, R_SH_SWITCH32 }, | |
4075 | { BFD_RELOC_SH_USES, R_SH_USES }, | |
4076 | { BFD_RELOC_SH_COUNT, R_SH_COUNT }, | |
4077 | { BFD_RELOC_SH_ALIGN, R_SH_ALIGN }, | |
4078 | { BFD_RELOC_SH_CODE, R_SH_CODE }, | |
4079 | { BFD_RELOC_SH_DATA, R_SH_DATA }, | |
4080 | { BFD_RELOC_SH_LABEL, R_SH_LABEL }, | |
4081 | { BFD_RELOC_UNUSED, 0 } | |
4082 | }; | |
4083 | ||
4084 | /* Adjust a reloc for the SH. This is similar to the generic code, | |
4085 | but does some minor tweaking. */ | |
4086 | ||
4087 | void | |
8edc77b9 KK |
4088 | sh_coff_reloc_mangle (segment_info_type *seg, fixS *fix, |
4089 | struct internal_reloc *intr, unsigned int paddr) | |
252b5132 RH |
4090 | { |
4091 | symbolS *symbol_ptr = fix->fx_addsy; | |
4092 | symbolS *dot; | |
4093 | ||
4094 | intr->r_vaddr = paddr + fix->fx_frag->fr_address + fix->fx_where; | |
4095 | ||
4096 | if (! SWITCH_TABLE (fix)) | |
4097 | { | |
4098 | const struct reloc_map *rm; | |
4099 | ||
4100 | for (rm = coff_reloc_map; rm->bfd_reloc != BFD_RELOC_UNUSED; rm++) | |
4101 | if (rm->bfd_reloc == (bfd_reloc_code_real_type) fix->fx_r_type) | |
4102 | break; | |
4103 | if (rm->bfd_reloc == BFD_RELOC_UNUSED) | |
4104 | as_bad_where (fix->fx_file, fix->fx_line, | |
4105 | _("Can not represent %s relocation in this object file format"), | |
4106 | bfd_get_reloc_code_name (fix->fx_r_type)); | |
4107 | intr->r_type = rm->sh_reloc; | |
4108 | intr->r_offset = 0; | |
4109 | } | |
4110 | else | |
4111 | { | |
4112 | know (sh_relax); | |
4113 | ||
4114 | if (fix->fx_r_type == BFD_RELOC_16) | |
4115 | intr->r_type = R_SH_SWITCH16; | |
4116 | else if (fix->fx_r_type == BFD_RELOC_8) | |
4117 | intr->r_type = R_SH_SWITCH8; | |
4118 | else if (fix->fx_r_type == BFD_RELOC_32) | |
4119 | intr->r_type = R_SH_SWITCH32; | |
4120 | else | |
4121 | abort (); | |
4122 | ||
4123 | /* For a switch reloc, we set r_offset to the difference between | |
4124 | the reloc address and the subtrahend. When the linker is | |
4125 | doing relaxing, it can use the determine the starting and | |
4126 | ending points of the switch difference expression. */ | |
4127 | intr->r_offset = intr->r_vaddr - S_GET_VALUE (fix->fx_subsy); | |
4128 | } | |
4129 | ||
4130 | /* PC relative relocs are always against the current section. */ | |
4131 | if (symbol_ptr == NULL) | |
4132 | { | |
4133 | switch (fix->fx_r_type) | |
4134 | { | |
4135 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
4136 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
4137 | case BFD_RELOC_SH_PCDISP8BY2: | |
4138 | case BFD_RELOC_SH_PCDISP12BY2: | |
4139 | case BFD_RELOC_SH_USES: | |
4140 | symbol_ptr = seg->dot; | |
4141 | break; | |
4142 | default: | |
4143 | break; | |
4144 | } | |
4145 | } | |
4146 | ||
4147 | if (fix->fx_r_type == BFD_RELOC_SH_USES) | |
4148 | { | |
4149 | /* We can't store the offset in the object file, since this | |
4150 | reloc does not take up any space, so we store it in r_offset. | |
94f592af | 4151 | The fx_addnumber field was set in md_apply_fix3. */ |
252b5132 RH |
4152 | intr->r_offset = fix->fx_addnumber; |
4153 | } | |
4154 | else if (fix->fx_r_type == BFD_RELOC_SH_COUNT) | |
4155 | { | |
4156 | /* We can't store the count in the object file, since this reloc | |
4157 | does not take up any space, so we store it in r_offset. The | |
4158 | fx_offset field was set when the fixup was created in | |
4159 | sh_coff_frob_file. */ | |
4160 | intr->r_offset = fix->fx_offset; | |
4161 | /* This reloc is always absolute. */ | |
4162 | symbol_ptr = NULL; | |
4163 | } | |
4164 | else if (fix->fx_r_type == BFD_RELOC_SH_ALIGN) | |
4165 | { | |
4166 | /* Store the alignment in the r_offset field. */ | |
4167 | intr->r_offset = fix->fx_offset; | |
4168 | /* This reloc is always absolute. */ | |
4169 | symbol_ptr = NULL; | |
4170 | } | |
4171 | else if (fix->fx_r_type == BFD_RELOC_SH_CODE | |
4172 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
4173 | || fix->fx_r_type == BFD_RELOC_SH_LABEL) | |
4174 | { | |
4175 | /* These relocs are always absolute. */ | |
4176 | symbol_ptr = NULL; | |
4177 | } | |
4178 | ||
4179 | /* Turn the segment of the symbol into an offset. */ | |
4180 | if (symbol_ptr != NULL) | |
4181 | { | |
4182 | dot = segment_info[S_GET_SEGMENT (symbol_ptr)].dot; | |
4183 | if (dot != NULL) | |
4184 | intr->r_symndx = dot->sy_number; | |
4185 | else | |
4186 | intr->r_symndx = symbol_ptr->sy_number; | |
4187 | } | |
4188 | else | |
4189 | intr->r_symndx = -1; | |
4190 | } | |
4191 | ||
4192 | #endif /* OBJ_COFF */ | |
4193 | #endif /* ! BFD_ASSEMBLER */ | |
4194 | ||
4195 | #ifdef BFD_ASSEMBLER | |
4196 | ||
4197 | /* Create a reloc. */ | |
4198 | ||
4199 | arelent * | |
8edc77b9 | 4200 | tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) |
252b5132 RH |
4201 | { |
4202 | arelent *rel; | |
4203 | bfd_reloc_code_real_type r_type; | |
4204 | ||
4205 | rel = (arelent *) xmalloc (sizeof (arelent)); | |
49309057 ILT |
4206 | rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
4207 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
252b5132 RH |
4208 | rel->address = fixp->fx_frag->fr_address + fixp->fx_where; |
4209 | ||
4210 | r_type = fixp->fx_r_type; | |
4211 | ||
4212 | if (SWITCH_TABLE (fixp)) | |
4213 | { | |
bdfaef52 JR |
4214 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy); |
4215 | rel->addend = 0; | |
252b5132 RH |
4216 | if (r_type == BFD_RELOC_16) |
4217 | r_type = BFD_RELOC_SH_SWITCH16; | |
4218 | else if (r_type == BFD_RELOC_8) | |
4219 | r_type = BFD_RELOC_8_PCREL; | |
4220 | else if (r_type == BFD_RELOC_32) | |
4221 | r_type = BFD_RELOC_SH_SWITCH32; | |
4222 | else | |
4223 | abort (); | |
4224 | } | |
4225 | else if (r_type == BFD_RELOC_SH_USES) | |
4226 | rel->addend = fixp->fx_addnumber; | |
4227 | else if (r_type == BFD_RELOC_SH_COUNT) | |
4228 | rel->addend = fixp->fx_offset; | |
4229 | else if (r_type == BFD_RELOC_SH_ALIGN) | |
4230 | rel->addend = fixp->fx_offset; | |
4231 | else if (r_type == BFD_RELOC_VTABLE_INHERIT | |
4232 | || r_type == BFD_RELOC_VTABLE_ENTRY) | |
4233 | rel->addend = fixp->fx_offset; | |
015551fc JR |
4234 | else if (r_type == BFD_RELOC_SH_LOOP_START |
4235 | || r_type == BFD_RELOC_SH_LOOP_END) | |
4236 | rel->addend = fixp->fx_offset; | |
4237 | else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel) | |
4238 | { | |
4239 | rel->addend = 0; | |
4240 | rel->address = rel->addend = fixp->fx_offset; | |
4241 | } | |
324bfcf3 AO |
4242 | #ifdef HAVE_SH64 |
4243 | else if (shmedia_init_reloc (rel, fixp)) | |
4244 | ; | |
4245 | #endif | |
252b5132 RH |
4246 | else if (fixp->fx_pcrel) |
4247 | rel->addend = fixp->fx_addnumber; | |
a1cc9221 AO |
4248 | else if (r_type == BFD_RELOC_32 || r_type == BFD_RELOC_32_GOTOFF) |
4249 | rel->addend = fixp->fx_addnumber; | |
252b5132 RH |
4250 | else |
4251 | rel->addend = 0; | |
4252 | ||
4253 | rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); | |
78878175 | 4254 | |
a161fe53 | 4255 | if (rel->howto == NULL) |
252b5132 RH |
4256 | { |
4257 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
4258 | _("Cannot represent relocation type %s"), | |
4259 | bfd_get_reloc_code_name (r_type)); | |
4260 | /* Set howto to a garbage value so that we can keep going. */ | |
4261 | rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); | |
4262 | assert (rel->howto != NULL); | |
4263 | } | |
78878175 NC |
4264 | #ifdef OBJ_ELF |
4265 | else if (rel->howto->type == R_SH_IND12W) | |
4266 | rel->addend += fixp->fx_offset - 4; | |
4267 | #endif | |
252b5132 RH |
4268 | |
4269 | return rel; | |
4270 | } | |
4271 | ||
538cd60f AO |
4272 | #ifdef OBJ_ELF |
4273 | inline static char * | |
8edc77b9 | 4274 | sh_end_of_match (char *cont, char *what) |
538cd60f AO |
4275 | { |
4276 | int len = strlen (what); | |
4277 | ||
4278 | if (strncasecmp (cont, what, strlen (what)) == 0 | |
4279 | && ! is_part_of_name (cont[len])) | |
4280 | return cont + len; | |
4281 | ||
4282 | return NULL; | |
5d6255fe | 4283 | } |
538cd60f AO |
4284 | |
4285 | int | |
8edc77b9 | 4286 | sh_parse_name (char const *name, expressionS *exprP, char *nextcharP) |
538cd60f AO |
4287 | { |
4288 | char *next = input_line_pointer; | |
4289 | char *next_end; | |
4290 | int reloc_type; | |
4291 | segT segment; | |
4292 | ||
4293 | exprP->X_op_symbol = NULL; | |
4294 | ||
4295 | if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) | |
4296 | { | |
4297 | if (! GOT_symbol) | |
4298 | GOT_symbol = symbol_find_or_make (name); | |
4299 | ||
4300 | exprP->X_add_symbol = GOT_symbol; | |
4301 | no_suffix: | |
4302 | /* If we have an absolute symbol or a reg, then we know its | |
4303 | value now. */ | |
4304 | segment = S_GET_SEGMENT (exprP->X_add_symbol); | |
4305 | if (segment == absolute_section) | |
4306 | { | |
4307 | exprP->X_op = O_constant; | |
4308 | exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); | |
4309 | exprP->X_add_symbol = NULL; | |
4310 | } | |
4311 | else if (segment == reg_section) | |
4312 | { | |
4313 | exprP->X_op = O_register; | |
4314 | exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); | |
4315 | exprP->X_add_symbol = NULL; | |
4316 | } | |
4317 | else | |
4318 | { | |
4319 | exprP->X_op = O_symbol; | |
4320 | exprP->X_add_number = 0; | |
4321 | } | |
4322 | ||
4323 | return 1; | |
4324 | } | |
4325 | ||
4326 | exprP->X_add_symbol = symbol_find_or_make (name); | |
5d6255fe | 4327 | |
538cd60f AO |
4328 | if (*nextcharP != '@') |
4329 | goto no_suffix; | |
4330 | else if ((next_end = sh_end_of_match (next + 1, "GOTOFF"))) | |
4331 | reloc_type = BFD_RELOC_32_GOTOFF; | |
324bfcf3 AO |
4332 | else if ((next_end = sh_end_of_match (next + 1, "GOTPLT"))) |
4333 | reloc_type = BFD_RELOC_SH_GOTPLT32; | |
538cd60f AO |
4334 | else if ((next_end = sh_end_of_match (next + 1, "GOT"))) |
4335 | reloc_type = BFD_RELOC_32_GOT_PCREL; | |
4336 | else if ((next_end = sh_end_of_match (next + 1, "PLT"))) | |
4337 | reloc_type = BFD_RELOC_32_PLT_PCREL; | |
9efb3b7b KK |
4338 | else if ((next_end = sh_end_of_match (next + 1, "TLSGD"))) |
4339 | reloc_type = BFD_RELOC_SH_TLS_GD_32; | |
4340 | else if ((next_end = sh_end_of_match (next + 1, "TLSLDM"))) | |
4341 | reloc_type = BFD_RELOC_SH_TLS_LD_32; | |
4342 | else if ((next_end = sh_end_of_match (next + 1, "GOTTPOFF"))) | |
4343 | reloc_type = BFD_RELOC_SH_TLS_IE_32; | |
4344 | else if ((next_end = sh_end_of_match (next + 1, "TPOFF"))) | |
4345 | reloc_type = BFD_RELOC_SH_TLS_LE_32; | |
4346 | else if ((next_end = sh_end_of_match (next + 1, "DTPOFF"))) | |
4347 | reloc_type = BFD_RELOC_SH_TLS_LDO_32; | |
538cd60f AO |
4348 | else |
4349 | goto no_suffix; | |
4350 | ||
4351 | *input_line_pointer = *nextcharP; | |
4352 | input_line_pointer = next_end; | |
4353 | *nextcharP = *input_line_pointer; | |
4354 | *input_line_pointer = '\0'; | |
4355 | ||
4356 | exprP->X_op = O_PIC_reloc; | |
4357 | exprP->X_add_number = 0; | |
4358 | exprP->X_md = reloc_type; | |
4359 | ||
4360 | return 1; | |
4361 | } | |
4362 | #endif | |
2ce4cc60 KK |
4363 | |
4364 | void | |
4365 | sh_cfi_frame_initial_instructions (void) | |
4366 | { | |
4367 | cfi_add_CFA_def_cfa (15, 0); | |
4368 | } | |
4369 | ||
4370 | int | |
4371 | sh_regname_to_dw2regnum (const char *regname) | |
4372 | { | |
4373 | unsigned int regnum = -1; | |
4374 | unsigned int i; | |
4375 | const char *p; | |
4376 | char *q; | |
4377 | static struct { char *name; int dw2regnum; } regnames[] = | |
4378 | { | |
4379 | { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 }, | |
4380 | { "macl", 21 }, { "fpul", 23 } | |
4381 | }; | |
4382 | ||
4383 | for (i = 0; i < ARRAY_SIZE (regnames); ++i) | |
4384 | if (strcmp (regnames[i].name, regname) == 0) | |
4385 | return regnames[i].dw2regnum; | |
4386 | ||
4387 | if (regname[0] == 'r') | |
4388 | { | |
4389 | p = regname + 1; | |
4390 | regnum = strtoul (p, &q, 10); | |
4391 | if (p == q || *q || regnum >= 16) | |
4392 | return -1; | |
4393 | } | |
4394 | else if (regname[0] == 'f' && regname[1] == 'r') | |
4395 | { | |
4396 | p = regname + 2; | |
4397 | regnum = strtoul (p, &q, 10); | |
4398 | if (p == q || *q || regnum >= 16) | |
4399 | return -1; | |
4400 | regnum += 25; | |
4401 | } | |
4402 | else if (regname[0] == 'x' && regname[1] == 'd') | |
4403 | { | |
4404 | p = regname + 2; | |
4405 | regnum = strtoul (p, &q, 10); | |
4406 | if (p == q || *q || regnum >= 8) | |
4407 | return -1; | |
4408 | regnum += 87; | |
4409 | } | |
4410 | return regnum; | |
4411 | } | |
252b5132 | 4412 | #endif /* BFD_ASSEMBLER */ |