Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* tc-sh.c -- Assemble code for the Hitachi Super-H |
f7e42eb4 NC |
2 | Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001 |
3 | Free Software Foundation, Inc. | |
252b5132 RH |
4 | |
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
6b31947e | 22 | /* Written By Steve Chamberlain <sac@cygnus.com> */ |
252b5132 RH |
23 | |
24 | #include <stdio.h> | |
25 | #include "as.h" | |
26 | #include "bfd.h" | |
27 | #include "subsegs.h" | |
28 | #define DEFINE_TABLE | |
29 | #include "opcodes/sh-opc.h" | |
3882b010 | 30 | #include "safe-ctype.h" |
43841e91 | 31 | #include "struc-symbol.h" |
d4845d57 JR |
32 | |
33 | #ifdef OBJ_ELF | |
34 | #include "elf/sh.h" | |
35 | #endif | |
36 | ||
0d10e182 | 37 | #include "dwarf2dbg.h" |
0d10e182 | 38 | |
e08ae979 HPN |
39 | typedef struct |
40 | { | |
41 | sh_arg_type type; | |
42 | int reg; | |
43 | expressionS immediate; | |
44 | } | |
45 | sh_operand_info; | |
46 | ||
252b5132 RH |
47 | const char comment_chars[] = "!"; |
48 | const char line_separator_chars[] = ";"; | |
49 | const char line_comment_chars[] = "!#"; | |
50 | ||
51 | static void s_uses PARAMS ((int)); | |
52 | ||
53 | static void sh_count_relocs PARAMS ((bfd *, segT, PTR)); | |
54 | static void sh_frob_section PARAMS ((bfd *, segT, PTR)); | |
55 | ||
252b5132 | 56 | static void s_uacons PARAMS ((int)); |
d4845d57 | 57 | static sh_opcode_info *find_cooked_opcode PARAMS ((char **)); |
0d10e182 | 58 | static unsigned int assemble_ppi PARAMS ((char *, sh_opcode_info *)); |
e08ae979 | 59 | static void little PARAMS ((int)); |
05982cac | 60 | static void big PARAMS ((int)); |
e08ae979 HPN |
61 | static bfd_reloc_code_real_type sh_elf_suffix |
62 | PARAMS ((char **str_p, expressionS *, expressionS *new_exp_p)); | |
63 | static int parse_reg PARAMS ((char *, int *, int *)); | |
64 | static symbolS *dot PARAMS ((void)); | |
65 | static char *parse_exp PARAMS ((char *, sh_operand_info *)); | |
66 | static char *parse_at PARAMS ((char *, sh_operand_info *)); | |
67 | static void get_operand PARAMS ((char **, sh_operand_info *)); | |
68 | static char *get_operands | |
69 | PARAMS ((sh_opcode_info *, char *, sh_operand_info *)); | |
70 | static sh_opcode_info *get_specific | |
71 | PARAMS ((sh_opcode_info *, sh_operand_info *)); | |
72 | static void insert PARAMS ((char *, int, int, sh_operand_info *)); | |
73 | static void build_relax PARAMS ((sh_opcode_info *, sh_operand_info *)); | |
74 | static char *insert_loop_bounds PARAMS ((char *, sh_operand_info *)); | |
75 | static unsigned int build_Mytes | |
76 | PARAMS ((sh_opcode_info *, sh_operand_info *)); | |
252b5132 | 77 | |
a1cc9221 AO |
78 | #ifdef OBJ_ELF |
79 | static void sh_elf_cons PARAMS ((int)); | |
80 | ||
81 | symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ | |
82 | #endif | |
83 | ||
05982cac HPN |
84 | static void |
85 | big (ignore) | |
86 | int ignore ATTRIBUTE_UNUSED; | |
87 | { | |
88 | if (! target_big_endian) | |
89 | as_bad (_("directive .big encountered when option -big required")); | |
90 | ||
91 | /* Stop further messages. */ | |
92 | target_big_endian = 1; | |
93 | } | |
252b5132 RH |
94 | |
95 | static void | |
96 | little (ignore) | |
43841e91 | 97 | int ignore ATTRIBUTE_UNUSED; |
252b5132 | 98 | { |
05982cac HPN |
99 | if (target_big_endian) |
100 | as_bad (_("directive .little encountered when option -little required")); | |
101 | ||
102 | /* Stop further messages. */ | |
252b5132 RH |
103 | target_big_endian = 0; |
104 | } | |
105 | ||
d4845d57 JR |
106 | /* This table describes all the machine specific pseudo-ops the assembler |
107 | has to support. The fields are: | |
108 | pseudo-op name without dot | |
109 | function to call to execute this pseudo-op | |
6b31947e | 110 | Integer arg to pass to the function. */ |
d4845d57 | 111 | |
252b5132 RH |
112 | const pseudo_typeS md_pseudo_table[] = |
113 | { | |
a1cc9221 AO |
114 | #ifdef OBJ_ELF |
115 | {"long", sh_elf_cons, 4}, | |
116 | {"int", sh_elf_cons, 4}, | |
117 | {"word", sh_elf_cons, 2}, | |
118 | {"short", sh_elf_cons, 2}, | |
119 | #else | |
252b5132 RH |
120 | {"int", cons, 4}, |
121 | {"word", cons, 2}, | |
a1cc9221 | 122 | #endif /* OBJ_ELF */ |
05982cac | 123 | {"big", big, 0}, |
252b5132 RH |
124 | {"form", listing_psize, 0}, |
125 | {"little", little, 0}, | |
126 | {"heading", listing_title, 0}, | |
127 | {"import", s_ignore, 0}, | |
128 | {"page", listing_eject, 0}, | |
129 | {"program", s_ignore, 0}, | |
130 | {"uses", s_uses, 0}, | |
131 | {"uaword", s_uacons, 2}, | |
132 | {"ualong", s_uacons, 4}, | |
de68de20 AO |
133 | {"uaquad", s_uacons, 8}, |
134 | {"2byte", s_uacons, 2}, | |
135 | {"4byte", s_uacons, 4}, | |
136 | {"8byte", s_uacons, 8}, | |
2bc0a128 | 137 | #ifdef BFD_ASSEMBLER |
de68de20 AO |
138 | {"file", dwarf2_directive_file, 0 }, |
139 | {"loc", dwarf2_directive_loc, 0 }, | |
2bc0a128 | 140 | #endif |
252b5132 RH |
141 | {0, 0, 0} |
142 | }; | |
143 | ||
144 | /*int md_reloc_size; */ | |
145 | ||
146 | int sh_relax; /* set if -relax seen */ | |
147 | ||
148 | /* Whether -small was seen. */ | |
149 | ||
150 | int sh_small; | |
151 | ||
d4845d57 JR |
152 | /* Whether -dsp was seen. */ |
153 | ||
154 | static int sh_dsp; | |
155 | ||
156 | /* The bit mask of architectures that could | |
157 | accomodate the insns seen so far. */ | |
158 | static int valid_arch; | |
159 | ||
252b5132 RH |
160 | const char EXP_CHARS[] = "eE"; |
161 | ||
6b31947e | 162 | /* Chars that mean this number is a floating point constant. */ |
252b5132 RH |
163 | /* As in 0f12.456 */ |
164 | /* or 0d1.2345e12 */ | |
165 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
166 | ||
167 | #define C(a,b) ENCODE_RELAX(a,b) | |
168 | ||
252b5132 RH |
169 | #define ENCODE_RELAX(what,length) (((what) << 4) + (length)) |
170 | #define GET_WHAT(x) ((x>>4)) | |
171 | ||
6b31947e | 172 | /* These are the three types of relaxable instrction. */ |
252b5132 RH |
173 | #define COND_JUMP 1 |
174 | #define COND_JUMP_DELAY 2 | |
175 | #define UNCOND_JUMP 3 | |
176 | #define END 4 | |
177 | ||
178 | #define UNDEF_DISP 0 | |
179 | #define COND8 1 | |
180 | #define COND12 2 | |
181 | #define COND32 3 | |
252b5132 RH |
182 | #define UNDEF_WORD_DISP 4 |
183 | ||
184 | #define UNCOND12 1 | |
185 | #define UNCOND32 2 | |
186 | ||
187 | /* Branch displacements are from the address of the branch plus | |
188 | four, thus all minimum and maximum values have 4 added to them. */ | |
189 | #define COND8_F 258 | |
190 | #define COND8_M -252 | |
191 | #define COND8_LENGTH 2 | |
192 | ||
193 | /* There is one extra instruction before the branch, so we must add | |
194 | two more bytes to account for it. */ | |
195 | #define COND12_F 4100 | |
196 | #define COND12_M -4090 | |
197 | #define COND12_LENGTH 6 | |
198 | ||
199 | #define COND12_DELAY_LENGTH 4 | |
200 | ||
201 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
202 | since this relocation type is not supported yet. */ | |
203 | #define COND32_F (1<<30) | |
204 | #define COND32_M -(1<<30) | |
205 | #define COND32_LENGTH 14 | |
206 | ||
207 | #define UNCOND12_F 4098 | |
208 | #define UNCOND12_M -4092 | |
209 | #define UNCOND12_LENGTH 2 | |
210 | ||
211 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
212 | since this relocation type is not supported yet. */ | |
213 | #define UNCOND32_F (1<<30) | |
214 | #define UNCOND32_M -(1<<30) | |
215 | #define UNCOND32_LENGTH 14 | |
216 | ||
43841e91 NC |
217 | #define EMPTY { 0, 0, 0, 0 } |
218 | ||
252b5132 | 219 | const relax_typeS md_relax_table[C (END, 0)] = { |
43841e91 NC |
220 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
221 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
252b5132 | 222 | |
43841e91 | 223 | EMPTY, |
252b5132 RH |
224 | /* C (COND_JUMP, COND8) */ |
225 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, | |
226 | /* C (COND_JUMP, COND12) */ | |
227 | { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, | |
228 | /* C (COND_JUMP, COND32) */ | |
229 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
e66457fb AM |
230 | /* C (COND_JUMP, UNDEF_WORD_DISP) */ |
231 | { 0, 0, COND32_LENGTH, 0, }, | |
232 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 233 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 | 234 | |
43841e91 | 235 | EMPTY, |
252b5132 RH |
236 | /* C (COND_JUMP_DELAY, COND8) */ |
237 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, | |
238 | /* C (COND_JUMP_DELAY, COND12) */ | |
239 | { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, | |
240 | /* C (COND_JUMP_DELAY, COND32) */ | |
241 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
e66457fb AM |
242 | /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */ |
243 | { 0, 0, COND32_LENGTH, 0, }, | |
244 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 245 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 | 246 | |
43841e91 | 247 | EMPTY, |
252b5132 RH |
248 | /* C (UNCOND_JUMP, UNCOND12) */ |
249 | { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, | |
250 | /* C (UNCOND_JUMP, UNCOND32) */ | |
251 | { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, | |
e66457fb AM |
252 | EMPTY, |
253 | /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */ | |
254 | { 0, 0, UNCOND32_LENGTH, 0, }, | |
255 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 256 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 RH |
257 | }; |
258 | ||
43841e91 NC |
259 | #undef EMPTY |
260 | ||
252b5132 RH |
261 | static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ |
262 | ||
a1cc9221 AO |
263 | \f |
264 | #ifdef OBJ_ELF | |
81d4177b | 265 | /* Parse @got, etc. and return the desired relocation. |
a1cc9221 AO |
266 | If we have additional arithmetic expression, then we fill in new_exp_p. */ |
267 | static bfd_reloc_code_real_type | |
268 | sh_elf_suffix (str_p, exp_p, new_exp_p) | |
269 | char **str_p; | |
270 | expressionS *exp_p, *new_exp_p; | |
271 | { | |
272 | struct map_bfd { | |
273 | char *string; | |
274 | int length; | |
275 | bfd_reloc_code_real_type reloc; | |
276 | }; | |
277 | ||
278 | char ident[20]; | |
279 | char *str = *str_p; | |
280 | char *str2; | |
281 | int ch; | |
282 | int len; | |
283 | struct map_bfd *ptr; | |
284 | ||
bc805888 | 285 | #define MAP(str,reloc) { str, sizeof (str)-1, reloc } |
a1cc9221 AO |
286 | |
287 | static struct map_bfd mapping[] = { | |
288 | MAP ("got", BFD_RELOC_32_GOT_PCREL), | |
289 | MAP ("plt", BFD_RELOC_32_PLT_PCREL), | |
290 | MAP ("gotoff", BFD_RELOC_32_GOTOFF), | |
291 | { (char *)0, 0, BFD_RELOC_UNUSED } | |
292 | }; | |
293 | ||
294 | if (*str++ != '@') | |
295 | return BFD_RELOC_UNUSED; | |
296 | ||
297 | for (ch = *str, str2 = ident; | |
298 | (str2 < ident + sizeof (ident) - 1 | |
3882b010 | 299 | && (ISALNUM (ch) || ch == '@')); |
a1cc9221 | 300 | ch = *++str) |
3882b010 | 301 | *str2++ = TOLOWER (ch); |
a1cc9221 AO |
302 | |
303 | *str2 = '\0'; | |
304 | len = str2 - ident; | |
305 | ||
306 | ch = ident[0]; | |
307 | for (ptr = &mapping[0]; ptr->length > 0; ptr++) | |
308 | if (ch == ptr->string[0] | |
309 | && len == ptr->length | |
310 | && memcmp (ident, ptr->string, ptr->length) == 0) | |
311 | { | |
312 | /* Now check for identifier@suffix+constant */ | |
313 | if (*str == '-' || *str == '+') | |
314 | { | |
315 | char *orig_line = input_line_pointer; | |
316 | ||
317 | input_line_pointer = str; | |
318 | expression (new_exp_p); | |
319 | if (new_exp_p->X_op == O_constant) | |
320 | { | |
321 | exp_p->X_add_number += new_exp_p->X_add_number; | |
322 | str = input_line_pointer; | |
323 | } | |
324 | if (new_exp_p->X_op == O_subtract) | |
325 | str = input_line_pointer; | |
326 | ||
327 | if (&input_line_pointer != str_p) | |
328 | input_line_pointer = orig_line; | |
329 | } | |
330 | ||
331 | *str_p = str; | |
332 | return ptr->reloc; | |
333 | } | |
334 | ||
335 | return BFD_RELOC_UNUSED; | |
336 | } | |
337 | ||
338 | /* The regular cons() function, that reads constants, doesn't support | |
339 | suffixes such as @GOT, @GOTOFF and @PLT, that generate | |
340 | machine-specific relocation types. So we must define it here. */ | |
341 | /* Clobbers input_line_pointer, checks end-of-line. */ | |
342 | static void | |
343 | sh_elf_cons (nbytes) | |
344 | register int nbytes; /* 1=.byte, 2=.word, 4=.long */ | |
345 | { | |
346 | expressionS exp, new_exp; | |
347 | bfd_reloc_code_real_type reloc; | |
348 | const char *name; | |
349 | ||
350 | if (is_it_end_of_statement ()) | |
351 | { | |
352 | demand_empty_rest_of_line (); | |
353 | return; | |
354 | } | |
355 | ||
356 | do | |
357 | { | |
358 | expression (&exp); | |
359 | new_exp.X_op = O_absent; | |
360 | new_exp.X_add_symbol = new_exp.X_op_symbol = NULL; | |
361 | /* If the _GLOBAL_OFFSET_TABLE_ symbol hasn't been found yet, | |
362 | use the name of the symbol to tell whether it's the | |
363 | _GLOBAL_OFFSET_TABLE_. If it has, comparing the symbols is | |
364 | sufficient. */ | |
365 | if (! GOT_symbol && exp.X_add_symbol) | |
366 | name = S_GET_NAME (exp.X_add_symbol); | |
367 | else | |
368 | name = NULL; | |
369 | /* Check whether this expression involves the | |
370 | _GLOBAL_OFFSET_TABLE_ symbol, by itself or added to a | |
371 | difference of two other symbols. */ | |
372 | if (((GOT_symbol && GOT_symbol == exp.X_add_symbol) | |
373 | || (! GOT_symbol && name | |
374 | && strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)) | |
375 | && (exp.X_op == O_symbol | |
376 | || (exp.X_op == O_add | |
377 | && ((symbol_get_value_expression (exp.X_op_symbol)->X_op) | |
378 | == O_subtract)))) | |
379 | { | |
380 | reloc_howto_type *reloc_howto = bfd_reloc_type_lookup (stdoutput, | |
381 | BFD_RELOC_32); | |
382 | int size = bfd_get_reloc_size (reloc_howto); | |
383 | ||
384 | if (GOT_symbol == NULL) | |
385 | GOT_symbol = symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME); | |
386 | ||
387 | if (size > nbytes) | |
388 | as_bad (_("%s relocations do not fit in %d bytes\n"), | |
389 | reloc_howto->name, nbytes); | |
390 | else | |
391 | { | |
392 | register char *p = frag_more ((int) nbytes); | |
393 | int offset = nbytes - size; | |
394 | ||
395 | fix_new_exp (frag_now, p - frag_now->fr_literal + offset, | |
396 | size, &exp, 0, TC_RELOC_GLOBAL_OFFSET_TABLE); | |
397 | } | |
398 | } | |
399 | /* Check if this symbol involves one of the magic suffixes, such | |
400 | as @GOT, @GOTOFF or @PLT, and determine which relocation type | |
401 | to use. */ | |
402 | else if ((exp.X_op == O_symbol || (exp.X_op == O_add && exp.X_op_symbol)) | |
403 | && *input_line_pointer == '@' | |
404 | && ((reloc = sh_elf_suffix (&input_line_pointer, &exp, &new_exp)) | |
405 | != BFD_RELOC_UNUSED)) | |
406 | { | |
407 | reloc_howto_type *reloc_howto = bfd_reloc_type_lookup (stdoutput, | |
408 | reloc); | |
409 | int size = bfd_get_reloc_size (reloc_howto); | |
410 | ||
411 | /* Force a GOT to be generated. */ | |
412 | if (GOT_symbol == NULL) | |
413 | GOT_symbol = symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME); | |
414 | ||
415 | if (size > nbytes) | |
416 | as_bad (_("%s relocations do not fit in %d bytes\n"), | |
417 | reloc_howto->name, nbytes); | |
418 | else | |
419 | { | |
420 | register char *p = frag_more ((int) nbytes); | |
421 | int offset = nbytes - size; | |
422 | ||
423 | fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size, | |
424 | &exp, 0, reloc); | |
81d4177b | 425 | if (new_exp.X_op != O_absent) |
a1cc9221 AO |
426 | fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size, |
427 | &new_exp, 0, BFD_RELOC_32); | |
428 | } | |
429 | } | |
430 | else | |
431 | emit_expr (&exp, (unsigned int) nbytes); | |
432 | } | |
433 | while (*input_line_pointer++ == ','); | |
434 | ||
81d4177b | 435 | input_line_pointer--; /* Put terminator back into stream. */ |
a1cc9221 AO |
436 | if (*input_line_pointer == '#' || *input_line_pointer == '!') |
437 | { | |
dda5ecfc | 438 | while (! is_end_of_line[(unsigned char) *input_line_pointer++]); |
a1cc9221 AO |
439 | } |
440 | else | |
441 | demand_empty_rest_of_line (); | |
442 | } | |
443 | #endif /* OBJ_ELF */ | |
444 | ||
445 | \f | |
6b31947e NC |
446 | /* This function is called once, at assembler startup time. This should |
447 | set up all the tables, etc that the MD part of the assembler needs. */ | |
252b5132 RH |
448 | |
449 | void | |
450 | md_begin () | |
451 | { | |
452 | sh_opcode_info *opcode; | |
453 | char *prev_name = ""; | |
d4845d57 | 454 | int target_arch; |
252b5132 | 455 | |
d4845d57 JR |
456 | target_arch = arch_sh1_up & ~(sh_dsp ? arch_sh3e_up : arch_sh_dsp_up); |
457 | valid_arch = target_arch; | |
458 | ||
252b5132 RH |
459 | opcode_hash_control = hash_new (); |
460 | ||
6b31947e | 461 | /* Insert unique names into hash table. */ |
252b5132 RH |
462 | for (opcode = sh_table; opcode->name; opcode++) |
463 | { | |
a37c8f88 | 464 | if (strcmp (prev_name, opcode->name)) |
252b5132 | 465 | { |
a37c8f88 JR |
466 | if (! (opcode->arch & target_arch)) |
467 | continue; | |
252b5132 RH |
468 | prev_name = opcode->name; |
469 | hash_insert (opcode_hash_control, opcode->name, (char *) opcode); | |
470 | } | |
471 | else | |
472 | { | |
473 | /* Make all the opcodes with the same name point to the same | |
6b31947e | 474 | string. */ |
252b5132 RH |
475 | opcode->name = prev_name; |
476 | } | |
477 | } | |
478 | } | |
479 | ||
480 | static int reg_m; | |
481 | static int reg_n; | |
d4845d57 JR |
482 | static int reg_x, reg_y; |
483 | static int reg_efg; | |
252b5132 RH |
484 | static int reg_b; |
485 | ||
3882b010 | 486 | #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_') |
dead1419 | 487 | |
6b31947e NC |
488 | /* Try to parse a reg name. Return the number of chars consumed. */ |
489 | ||
252b5132 RH |
490 | static int |
491 | parse_reg (src, mode, reg) | |
492 | char *src; | |
493 | int *mode; | |
494 | int *reg; | |
495 | { | |
3882b010 L |
496 | char l0 = TOLOWER (src[0]); |
497 | char l1 = l0 ? TOLOWER (src[1]) : 0; | |
e46fee70 | 498 | |
dead1419 | 499 | /* We use ! IDENT_CHAR for the next character after the register name, to |
252b5132 | 500 | make sure that we won't accidentally recognize a symbol name such as |
dead1419 | 501 | 'sram' or sr_ram as being a reference to the register 'sr'. */ |
252b5132 | 502 | |
e46fee70 | 503 | if (l0 == 'r') |
252b5132 | 504 | { |
e46fee70 | 505 | if (l1 == '1') |
d4845d57 JR |
506 | { |
507 | if (src[2] >= '0' && src[2] <= '5' | |
dead1419 | 508 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
509 | { |
510 | *mode = A_REG_N; | |
511 | *reg = 10 + src[2] - '0'; | |
512 | return 3; | |
513 | } | |
514 | } | |
e46fee70 | 515 | if (l1 >= '0' && l1 <= '9' |
dead1419 | 516 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
517 | { |
518 | *mode = A_REG_N; | |
e46fee70 | 519 | *reg = (l1 - '0'); |
d4845d57 JR |
520 | return 2; |
521 | } | |
e46fee70 | 522 | if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0 |
dead1419 JR |
523 | && ! IDENT_CHAR ((unsigned char) src[7])) |
524 | { | |
525 | *mode = A_REG_B; | |
e46fee70 | 526 | *reg = (l1 - '0'); |
dead1419 JR |
527 | return 7; |
528 | } | |
d4845d57 | 529 | |
e46fee70 | 530 | if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
531 | { |
532 | *mode = A_RE; | |
533 | return 2; | |
534 | } | |
e46fee70 | 535 | if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
536 | { |
537 | *mode = A_RS; | |
538 | return 2; | |
539 | } | |
252b5132 RH |
540 | } |
541 | ||
e46fee70 | 542 | if (l0 == 'a') |
252b5132 | 543 | { |
e46fee70 | 544 | if (l1 == '0') |
d4845d57 | 545 | { |
dead1419 | 546 | if (! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
547 | { |
548 | *mode = DSP_REG_N; | |
549 | *reg = A_A0_NUM; | |
550 | return 2; | |
551 | } | |
3882b010 | 552 | if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
553 | { |
554 | *mode = DSP_REG_N; | |
555 | *reg = A_A0G_NUM; | |
556 | return 3; | |
557 | } | |
558 | } | |
e46fee70 | 559 | if (l1 == '1') |
252b5132 | 560 | { |
dead1419 | 561 | if (! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 562 | { |
d4845d57 JR |
563 | *mode = DSP_REG_N; |
564 | *reg = A_A1_NUM; | |
565 | return 2; | |
566 | } | |
3882b010 | 567 | if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
568 | { |
569 | *mode = DSP_REG_N; | |
570 | *reg = A_A1G_NUM; | |
252b5132 RH |
571 | return 3; |
572 | } | |
573 | } | |
d4845d57 | 574 | |
e46fee70 | 575 | if (l1 == 'x' && src[2] >= '0' && src[2] <= '1' |
dead1419 | 576 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
577 | { |
578 | *mode = A_REG_N; | |
e46fee70 | 579 | *reg = 4 + (l1 - '0'); |
d4845d57 JR |
580 | return 3; |
581 | } | |
e46fee70 | 582 | if (l1 == 'y' && src[2] >= '0' && src[2] <= '1' |
dead1419 | 583 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
584 | { |
585 | *mode = A_REG_N; | |
e46fee70 | 586 | *reg = 6 + (l1 - '0'); |
d4845d57 JR |
587 | return 3; |
588 | } | |
e46fee70 | 589 | if (l1 == 's' && src[2] >= '0' && src[2] <= '3' |
dead1419 | 590 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 | 591 | { |
e46fee70 | 592 | int n = l1 - '0'; |
d4845d57 JR |
593 | |
594 | *mode = A_REG_N; | |
595 | *reg = n | ((~n & 2) << 1); | |
596 | return 3; | |
597 | } | |
598 | } | |
599 | ||
e46fee70 | 600 | if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 | 601 | { |
e46fee70 | 602 | if (l1 == 's') |
d4845d57 JR |
603 | { |
604 | *mode = A_REG_N; | |
605 | *reg = 8; | |
252b5132 RH |
606 | return 2; |
607 | } | |
e46fee70 | 608 | if (l1 == 'x') |
d4845d57 JR |
609 | { |
610 | *mode = A_REG_N; | |
611 | *reg = 8; | |
612 | return 2; | |
613 | } | |
e46fee70 | 614 | if (l1 == 'y') |
d4845d57 JR |
615 | { |
616 | *mode = A_REG_N; | |
617 | *reg = 9; | |
618 | return 2; | |
619 | } | |
620 | } | |
621 | ||
e46fee70 | 622 | if (l0 == 'x' && l1 >= '0' && l1 <= '1' |
dead1419 | 623 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
624 | { |
625 | *mode = DSP_REG_N; | |
e46fee70 | 626 | *reg = A_X0_NUM + l1 - '0'; |
d4845d57 JR |
627 | return 2; |
628 | } | |
629 | ||
e46fee70 | 630 | if (l0 == 'y' && l1 >= '0' && l1 <= '1' |
dead1419 | 631 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
632 | { |
633 | *mode = DSP_REG_N; | |
e46fee70 | 634 | *reg = A_Y0_NUM + l1 - '0'; |
d4845d57 JR |
635 | return 2; |
636 | } | |
637 | ||
e46fee70 | 638 | if (l0 == 'm' && l1 >= '0' && l1 <= '1' |
dead1419 | 639 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
640 | { |
641 | *mode = DSP_REG_N; | |
e46fee70 | 642 | *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM; |
d4845d57 | 643 | return 2; |
252b5132 RH |
644 | } |
645 | ||
e46fee70 HPN |
646 | if (l0 == 's' |
647 | && l1 == 's' | |
3882b010 | 648 | && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
649 | { |
650 | *mode = A_SSR; | |
651 | return 3; | |
652 | } | |
653 | ||
3882b010 | 654 | if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c' |
dead1419 | 655 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
656 | { |
657 | *mode = A_SPC; | |
658 | return 3; | |
659 | } | |
660 | ||
3882b010 | 661 | if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r' |
dead1419 | 662 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
663 | { |
664 | *mode = A_SGR; | |
665 | return 3; | |
666 | } | |
667 | ||
3882b010 | 668 | if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r' |
dead1419 | 669 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
670 | { |
671 | *mode = A_DSR; | |
672 | return 3; | |
673 | } | |
674 | ||
3882b010 | 675 | if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 676 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
677 | { |
678 | *mode = A_DBR; | |
679 | return 3; | |
680 | } | |
681 | ||
e46fee70 | 682 | if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
683 | { |
684 | *mode = A_SR; | |
685 | return 2; | |
686 | } | |
687 | ||
e46fee70 | 688 | if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
689 | { |
690 | *mode = A_REG_N; | |
691 | *reg = 15; | |
692 | return 2; | |
693 | } | |
694 | ||
e46fee70 | 695 | if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
696 | { |
697 | *mode = A_PR; | |
698 | return 2; | |
699 | } | |
e46fee70 | 700 | if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 701 | { |
015551fc JR |
702 | /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0' |
703 | and use an uninitialized immediate. */ | |
704 | *mode = A_PC; | |
252b5132 RH |
705 | return 2; |
706 | } | |
3882b010 | 707 | if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 708 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
709 | { |
710 | *mode = A_GBR; | |
711 | return 3; | |
712 | } | |
3882b010 | 713 | if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 714 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
715 | { |
716 | *mode = A_VBR; | |
717 | return 3; | |
718 | } | |
719 | ||
3882b010 | 720 | if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c' |
dead1419 | 721 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 | 722 | { |
3882b010 | 723 | if (TOLOWER (src[3]) == 'l') |
252b5132 RH |
724 | { |
725 | *mode = A_MACL; | |
726 | return 4; | |
727 | } | |
3882b010 | 728 | if (TOLOWER (src[3]) == 'h') |
252b5132 RH |
729 | { |
730 | *mode = A_MACH; | |
731 | return 4; | |
732 | } | |
733 | } | |
3882b010 | 734 | if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd' |
dead1419 | 735 | && ! IDENT_CHAR ((unsigned char) src[4])) |
d4845d57 JR |
736 | { |
737 | *mode = A_MOD; | |
738 | return 3; | |
739 | } | |
e46fee70 | 740 | if (l0 == 'f' && l1 == 'r') |
252b5132 RH |
741 | { |
742 | if (src[2] == '1') | |
743 | { | |
744 | if (src[3] >= '0' && src[3] <= '5' | |
dead1419 | 745 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
746 | { |
747 | *mode = F_REG_N; | |
748 | *reg = 10 + src[3] - '0'; | |
749 | return 4; | |
750 | } | |
751 | } | |
752 | if (src[2] >= '0' && src[2] <= '9' | |
dead1419 | 753 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
754 | { |
755 | *mode = F_REG_N; | |
756 | *reg = (src[2] - '0'); | |
757 | return 3; | |
758 | } | |
759 | } | |
e46fee70 | 760 | if (l0 == 'd' && l1 == 'r') |
252b5132 RH |
761 | { |
762 | if (src[2] == '1') | |
763 | { | |
764 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 765 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
766 | { |
767 | *mode = D_REG_N; | |
768 | *reg = 10 + src[3] - '0'; | |
769 | return 4; | |
770 | } | |
771 | } | |
772 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 773 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
774 | { |
775 | *mode = D_REG_N; | |
776 | *reg = (src[2] - '0'); | |
777 | return 3; | |
778 | } | |
779 | } | |
e46fee70 | 780 | if (l0 == 'x' && l1 == 'd') |
252b5132 RH |
781 | { |
782 | if (src[2] == '1') | |
783 | { | |
784 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 785 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
786 | { |
787 | *mode = X_REG_N; | |
788 | *reg = 11 + src[3] - '0'; | |
789 | return 4; | |
790 | } | |
791 | } | |
792 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 793 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
794 | { |
795 | *mode = X_REG_N; | |
796 | *reg = (src[2] - '0') + 1; | |
797 | return 3; | |
798 | } | |
799 | } | |
e46fee70 | 800 | if (l0 == 'f' && l1 == 'v') |
252b5132 | 801 | { |
dead1419 | 802 | if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
803 | { |
804 | *mode = V_REG_N; | |
805 | *reg = 12; | |
806 | return 4; | |
807 | } | |
808 | if ((src[2] == '0' || src[2] == '4' || src[2] == '8') | |
dead1419 | 809 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
810 | { |
811 | *mode = V_REG_N; | |
812 | *reg = (src[2] - '0'); | |
813 | return 3; | |
814 | } | |
815 | } | |
3882b010 L |
816 | if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u' |
817 | && TOLOWER (src[3]) == 'l' | |
dead1419 | 818 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
819 | { |
820 | *mode = FPUL_N; | |
821 | return 4; | |
822 | } | |
823 | ||
3882b010 L |
824 | if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's' |
825 | && TOLOWER (src[3]) == 'c' | |
826 | && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5])) | |
252b5132 RH |
827 | { |
828 | *mode = FPSCR_N; | |
829 | return 5; | |
830 | } | |
831 | ||
3882b010 L |
832 | if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't' |
833 | && TOLOWER (src[3]) == 'r' | |
834 | && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5])) | |
252b5132 RH |
835 | { |
836 | *mode = XMTRX_M4; | |
837 | return 5; | |
838 | } | |
839 | ||
840 | return 0; | |
841 | } | |
842 | ||
c4aa876b NC |
843 | static symbolS * |
844 | dot () | |
252b5132 RH |
845 | { |
846 | const char *fake; | |
847 | ||
848 | /* JF: '.' is pseudo symbol with value of current location | |
849 | in current segment. */ | |
850 | fake = FAKE_LABEL_NAME; | |
851 | return symbol_new (fake, | |
852 | now_seg, | |
853 | (valueT) frag_now_fix (), | |
854 | frag_now); | |
252b5132 RH |
855 | } |
856 | ||
c4aa876b | 857 | static char * |
015551fc | 858 | parse_exp (s, op) |
252b5132 | 859 | char *s; |
015551fc | 860 | sh_operand_info *op; |
252b5132 RH |
861 | { |
862 | char *save; | |
863 | char *new; | |
864 | ||
865 | save = input_line_pointer; | |
866 | input_line_pointer = s; | |
015551fc JR |
867 | expression (&op->immediate); |
868 | if (op->immediate.X_op == O_absent) | |
252b5132 RH |
869 | as_bad (_("missing operand")); |
870 | new = input_line_pointer; | |
871 | input_line_pointer = save; | |
872 | return new; | |
873 | } | |
874 | ||
252b5132 RH |
875 | /* The many forms of operand: |
876 | ||
877 | Rn Register direct | |
878 | @Rn Register indirect | |
879 | @Rn+ Autoincrement | |
880 | @-Rn Autodecrement | |
881 | @(disp:4,Rn) | |
882 | @(disp:8,GBR) | |
883 | @(disp:8,PC) | |
884 | ||
885 | @(R0,Rn) | |
886 | @(R0,GBR) | |
887 | ||
888 | disp:8 | |
889 | disp:12 | |
890 | #imm8 | |
891 | pr, gbr, vbr, macl, mach | |
252b5132 RH |
892 | */ |
893 | ||
c4aa876b | 894 | static char * |
252b5132 RH |
895 | parse_at (src, op) |
896 | char *src; | |
897 | sh_operand_info *op; | |
898 | { | |
899 | int len; | |
900 | int mode; | |
901 | src++; | |
902 | if (src[0] == '-') | |
903 | { | |
6b31947e | 904 | /* Must be predecrement. */ |
252b5132 RH |
905 | src++; |
906 | ||
907 | len = parse_reg (src, &mode, &(op->reg)); | |
908 | if (mode != A_REG_N) | |
909 | as_bad (_("illegal register after @-")); | |
910 | ||
911 | op->type = A_DEC_N; | |
912 | src += len; | |
913 | } | |
914 | else if (src[0] == '(') | |
915 | { | |
916 | /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or | |
8d4d84c2 | 917 | @(r0, rn). */ |
252b5132 RH |
918 | src++; |
919 | len = parse_reg (src, &mode, &(op->reg)); | |
920 | if (len && mode == A_REG_N) | |
921 | { | |
922 | src += len; | |
923 | if (op->reg != 0) | |
924 | { | |
925 | as_bad (_("must be @(r0,...)")); | |
926 | } | |
927 | if (src[0] == ',') | |
252b5132 | 928 | { |
8d4d84c2 AO |
929 | src++; |
930 | /* Now can be rn or gbr. */ | |
931 | len = parse_reg (src, &mode, &(op->reg)); | |
932 | } | |
933 | else | |
934 | { | |
935 | len = 0; | |
252b5132 | 936 | } |
8d4d84c2 | 937 | if (len) |
252b5132 | 938 | { |
8d4d84c2 AO |
939 | if (mode == A_GBR) |
940 | { | |
941 | op->type = A_R0_GBR; | |
942 | } | |
943 | else if (mode == A_REG_N) | |
944 | { | |
945 | op->type = A_IND_R0_REG_N; | |
946 | } | |
947 | else | |
948 | { | |
949 | as_bad (_("syntax error in @(r0,...)")); | |
950 | } | |
252b5132 RH |
951 | } |
952 | else | |
953 | { | |
8d4d84c2 | 954 | as_bad (_("syntax error in @(r0...)")); |
252b5132 RH |
955 | } |
956 | } | |
957 | else | |
958 | { | |
8d4d84c2 | 959 | /* Must be an @(disp,.. thing). */ |
015551fc | 960 | src = parse_exp (src, op); |
252b5132 RH |
961 | if (src[0] == ',') |
962 | src++; | |
8d4d84c2 | 963 | /* Now can be rn, gbr or pc. */ |
252b5132 RH |
964 | len = parse_reg (src, &mode, &op->reg); |
965 | if (len) | |
966 | { | |
967 | if (mode == A_REG_N) | |
968 | { | |
969 | op->type = A_DISP_REG_N; | |
970 | } | |
971 | else if (mode == A_GBR) | |
972 | { | |
973 | op->type = A_DISP_GBR; | |
974 | } | |
015551fc | 975 | else if (mode == A_PC) |
252b5132 | 976 | { |
c4aa876b NC |
977 | /* Turn a plain @(4,pc) into @(.+4,pc). */ |
978 | if (op->immediate.X_op == O_constant) | |
979 | { | |
980 | op->immediate.X_add_symbol = dot(); | |
981 | op->immediate.X_op = O_symbol; | |
982 | } | |
252b5132 RH |
983 | op->type = A_DISP_PC; |
984 | } | |
985 | else | |
986 | { | |
987 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
988 | } | |
989 | } | |
990 | else | |
991 | { | |
992 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
993 | } | |
994 | } | |
995 | src += len; | |
996 | if (src[0] != ')') | |
997 | as_bad (_("expecting )")); | |
998 | else | |
999 | src++; | |
1000 | } | |
1001 | else | |
1002 | { | |
1003 | src += parse_reg (src, &mode, &(op->reg)); | |
1004 | if (mode != A_REG_N) | |
006299d3 NC |
1005 | as_bad (_("illegal register after @")); |
1006 | ||
252b5132 RH |
1007 | if (src[0] == '+') |
1008 | { | |
1000a02a NC |
1009 | char l0, l1; |
1010 | ||
252b5132 | 1011 | src++; |
1000a02a NC |
1012 | l0 = TOLOWER (src[0]); |
1013 | l1 = TOLOWER (src[1]); | |
1014 | ||
1015 | if ((l0 == 'r' && l1 == '8') | |
1016 | || (l0 == 'i' && (l1 == 'x' || l1 == 's'))) | |
d4845d57 JR |
1017 | { |
1018 | src += 2; | |
1019 | op->type = A_PMOD_N; | |
1020 | } | |
006299d3 NC |
1021 | else if ( (l0 == 'r' && l1 == '9') |
1022 | || (l0 == 'i' && l1 == 'y')) | |
d4845d57 JR |
1023 | { |
1024 | src += 2; | |
1025 | op->type = A_PMODY_N; | |
1026 | } | |
1027 | else | |
1028 | op->type = A_INC_N; | |
252b5132 RH |
1029 | } |
1030 | else | |
006299d3 | 1031 | op->type = A_IND_N; |
252b5132 RH |
1032 | } |
1033 | return src; | |
1034 | } | |
1035 | ||
1036 | static void | |
1037 | get_operand (ptr, op) | |
1038 | char **ptr; | |
1039 | sh_operand_info *op; | |
1040 | { | |
1041 | char *src = *ptr; | |
1042 | int mode = -1; | |
1043 | unsigned int len; | |
1044 | ||
1045 | if (src[0] == '#') | |
1046 | { | |
1047 | src++; | |
015551fc | 1048 | *ptr = parse_exp (src, op); |
252b5132 RH |
1049 | op->type = A_IMM; |
1050 | return; | |
1051 | } | |
1052 | ||
1053 | else if (src[0] == '@') | |
1054 | { | |
1055 | *ptr = parse_at (src, op); | |
1056 | return; | |
1057 | } | |
1058 | len = parse_reg (src, &mode, &(op->reg)); | |
1059 | if (len) | |
1060 | { | |
1061 | *ptr = src + len; | |
1062 | op->type = mode; | |
1063 | return; | |
1064 | } | |
1065 | else | |
1066 | { | |
6b31947e | 1067 | /* Not a reg, the only thing left is a displacement. */ |
015551fc | 1068 | *ptr = parse_exp (src, op); |
252b5132 RH |
1069 | op->type = A_DISP_PC; |
1070 | return; | |
1071 | } | |
1072 | } | |
1073 | ||
c4aa876b | 1074 | static char * |
252b5132 RH |
1075 | get_operands (info, args, operand) |
1076 | sh_opcode_info *info; | |
1077 | char *args; | |
1078 | sh_operand_info *operand; | |
252b5132 RH |
1079 | { |
1080 | char *ptr = args; | |
1081 | if (info->arg[0]) | |
1082 | { | |
d4845d57 JR |
1083 | /* The pre-processor will eliminate whitespace in front of '@' |
1084 | after the first argument; we may be called multiple times | |
1085 | from assemble_ppi, so don't insist on finding whitespace here. */ | |
1086 | if (*ptr == ' ') | |
1087 | ptr++; | |
252b5132 RH |
1088 | |
1089 | get_operand (&ptr, operand + 0); | |
1090 | if (info->arg[1]) | |
1091 | { | |
1092 | if (*ptr == ',') | |
1093 | { | |
1094 | ptr++; | |
1095 | } | |
1096 | get_operand (&ptr, operand + 1); | |
52ccafd0 JR |
1097 | /* ??? Hack: psha/pshl have a varying operand number depending on |
1098 | the type of the first operand. We handle this by having the | |
1099 | three-operand version first and reducing the number of operands | |
1100 | parsed to two if we see that the first operand is an immediate. | |
1101 | This works because no insn with three operands has an immediate | |
1102 | as first operand. */ | |
1103 | if (info->arg[2] && operand[0].type != A_IMM) | |
252b5132 RH |
1104 | { |
1105 | if (*ptr == ',') | |
1106 | { | |
1107 | ptr++; | |
1108 | } | |
1109 | get_operand (&ptr, operand + 2); | |
1110 | } | |
1111 | else | |
1112 | { | |
1113 | operand[2].type = 0; | |
1114 | } | |
1115 | } | |
1116 | else | |
1117 | { | |
1118 | operand[1].type = 0; | |
1119 | operand[2].type = 0; | |
1120 | } | |
1121 | } | |
1122 | else | |
1123 | { | |
1124 | operand[0].type = 0; | |
1125 | operand[1].type = 0; | |
1126 | operand[2].type = 0; | |
1127 | } | |
1128 | return ptr; | |
1129 | } | |
1130 | ||
1131 | /* Passed a pointer to a list of opcodes which use different | |
1132 | addressing modes, return the opcode which matches the opcodes | |
6b31947e | 1133 | provided. */ |
252b5132 | 1134 | |
c4aa876b | 1135 | static sh_opcode_info * |
252b5132 RH |
1136 | get_specific (opcode, operands) |
1137 | sh_opcode_info *opcode; | |
1138 | sh_operand_info *operands; | |
1139 | { | |
1140 | sh_opcode_info *this_try = opcode; | |
1141 | char *name = opcode->name; | |
1142 | int n = 0; | |
c4aa876b | 1143 | |
252b5132 RH |
1144 | while (opcode->name) |
1145 | { | |
1146 | this_try = opcode++; | |
1147 | if (this_try->name != name) | |
1148 | { | |
1149 | /* We've looked so far down the table that we've run out of | |
6b31947e | 1150 | opcodes with the same name. */ |
252b5132 RH |
1151 | return 0; |
1152 | } | |
c4aa876b | 1153 | |
6b31947e | 1154 | /* Look at both operands needed by the opcodes and provided by |
252b5132 RH |
1155 | the user - since an arg test will often fail on the same arg |
1156 | again and again, we'll try and test the last failing arg the | |
6b31947e | 1157 | first on each opcode try. */ |
252b5132 RH |
1158 | for (n = 0; this_try->arg[n]; n++) |
1159 | { | |
1160 | sh_operand_info *user = operands + n; | |
1161 | sh_arg_type arg = this_try->arg[n]; | |
c4aa876b | 1162 | |
252b5132 RH |
1163 | switch (arg) |
1164 | { | |
1165 | case A_IMM: | |
1166 | case A_BDISP12: | |
1167 | case A_BDISP8: | |
1168 | case A_DISP_GBR: | |
1169 | case A_DISP_PC: | |
1170 | case A_MACH: | |
1171 | case A_PR: | |
1172 | case A_MACL: | |
1173 | if (user->type != arg) | |
1174 | goto fail; | |
1175 | break; | |
1176 | case A_R0: | |
1177 | /* opcode needs r0 */ | |
1178 | if (user->type != A_REG_N || user->reg != 0) | |
1179 | goto fail; | |
1180 | break; | |
1181 | case A_R0_GBR: | |
1182 | if (user->type != A_R0_GBR || user->reg != 0) | |
1183 | goto fail; | |
1184 | break; | |
1185 | case F_FR0: | |
1186 | if (user->type != F_REG_N || user->reg != 0) | |
1187 | goto fail; | |
1188 | break; | |
1189 | ||
1190 | case A_REG_N: | |
1191 | case A_INC_N: | |
1192 | case A_DEC_N: | |
1193 | case A_IND_N: | |
1194 | case A_IND_R0_REG_N: | |
1195 | case A_DISP_REG_N: | |
1196 | case F_REG_N: | |
1197 | case D_REG_N: | |
1198 | case X_REG_N: | |
1199 | case V_REG_N: | |
1200 | case FPUL_N: | |
1201 | case FPSCR_N: | |
d4845d57 JR |
1202 | case A_PMOD_N: |
1203 | case A_PMODY_N: | |
1204 | case DSP_REG_N: | |
252b5132 RH |
1205 | /* Opcode needs rn */ |
1206 | if (user->type != arg) | |
1207 | goto fail; | |
1208 | reg_n = user->reg; | |
1209 | break; | |
252b5132 RH |
1210 | case DX_REG_N: |
1211 | if (user->type != D_REG_N && user->type != X_REG_N) | |
1212 | goto fail; | |
1213 | reg_n = user->reg; | |
1214 | break; | |
1215 | case A_GBR: | |
1216 | case A_SR: | |
1217 | case A_VBR: | |
d4845d57 JR |
1218 | case A_DSR: |
1219 | case A_MOD: | |
1220 | case A_RE: | |
1221 | case A_RS: | |
252b5132 RH |
1222 | case A_SSR: |
1223 | case A_SPC: | |
1224 | case A_SGR: | |
1225 | case A_DBR: | |
1226 | if (user->type != arg) | |
1227 | goto fail; | |
1228 | break; | |
1229 | ||
c4aa876b | 1230 | case A_REG_B: |
252b5132 RH |
1231 | if (user->type != arg) |
1232 | goto fail; | |
1233 | reg_b = user->reg; | |
1234 | break; | |
1235 | ||
1236 | case A_REG_M: | |
1237 | case A_INC_M: | |
1238 | case A_DEC_M: | |
1239 | case A_IND_M: | |
1240 | case A_IND_R0_REG_M: | |
1241 | case A_DISP_REG_M: | |
d4845d57 | 1242 | case DSP_REG_M: |
252b5132 RH |
1243 | /* Opcode needs rn */ |
1244 | if (user->type != arg - A_REG_M + A_REG_N) | |
1245 | goto fail; | |
1246 | reg_m = user->reg; | |
1247 | break; | |
1248 | ||
d4845d57 JR |
1249 | case DSP_REG_X: |
1250 | if (user->type != DSP_REG_N) | |
1251 | goto fail; | |
1252 | switch (user->reg) | |
1253 | { | |
1254 | case A_X0_NUM: | |
1255 | reg_x = 0; | |
1256 | break; | |
1257 | case A_X1_NUM: | |
1258 | reg_x = 1; | |
1259 | break; | |
1260 | case A_A0_NUM: | |
1261 | reg_x = 2; | |
1262 | break; | |
1263 | case A_A1_NUM: | |
1264 | reg_x = 3; | |
1265 | break; | |
1266 | default: | |
1267 | goto fail; | |
1268 | } | |
1269 | break; | |
1270 | ||
1271 | case DSP_REG_Y: | |
1272 | if (user->type != DSP_REG_N) | |
1273 | goto fail; | |
1274 | switch (user->reg) | |
1275 | { | |
1276 | case A_Y0_NUM: | |
1277 | reg_y = 0; | |
1278 | break; | |
1279 | case A_Y1_NUM: | |
1280 | reg_y = 1; | |
1281 | break; | |
1282 | case A_M0_NUM: | |
1283 | reg_y = 2; | |
1284 | break; | |
1285 | case A_M1_NUM: | |
1286 | reg_y = 3; | |
1287 | break; | |
1288 | default: | |
1289 | goto fail; | |
1290 | } | |
1291 | break; | |
1292 | ||
1293 | case DSP_REG_E: | |
1294 | if (user->type != DSP_REG_N) | |
1295 | goto fail; | |
1296 | switch (user->reg) | |
1297 | { | |
1298 | case A_X0_NUM: | |
1299 | reg_efg = 0 << 10; | |
1300 | break; | |
1301 | case A_X1_NUM: | |
1302 | reg_efg = 1 << 10; | |
1303 | break; | |
1304 | case A_Y0_NUM: | |
1305 | reg_efg = 2 << 10; | |
1306 | break; | |
1307 | case A_A1_NUM: | |
1308 | reg_efg = 3 << 10; | |
1309 | break; | |
1310 | default: | |
1311 | goto fail; | |
1312 | } | |
1313 | break; | |
1314 | ||
1315 | case DSP_REG_F: | |
1316 | if (user->type != DSP_REG_N) | |
1317 | goto fail; | |
1318 | switch (user->reg) | |
1319 | { | |
1320 | case A_Y0_NUM: | |
1321 | reg_efg |= 0 << 8; | |
1322 | break; | |
1323 | case A_Y1_NUM: | |
1324 | reg_efg |= 1 << 8; | |
1325 | break; | |
1326 | case A_X0_NUM: | |
1327 | reg_efg |= 2 << 8; | |
1328 | break; | |
1329 | case A_A1_NUM: | |
1330 | reg_efg |= 3 << 8; | |
1331 | break; | |
1332 | default: | |
1333 | goto fail; | |
1334 | } | |
1335 | break; | |
1336 | ||
1337 | case DSP_REG_G: | |
1338 | if (user->type != DSP_REG_N) | |
1339 | goto fail; | |
1340 | switch (user->reg) | |
1341 | { | |
1342 | case A_M0_NUM: | |
1343 | reg_efg |= 0 << 2; | |
1344 | break; | |
1345 | case A_M1_NUM: | |
1346 | reg_efg |= 1 << 2; | |
1347 | break; | |
1348 | case A_A0_NUM: | |
1349 | reg_efg |= 2 << 2; | |
1350 | break; | |
1351 | case A_A1_NUM: | |
1352 | reg_efg |= 3 << 2; | |
1353 | break; | |
1354 | default: | |
1355 | goto fail; | |
1356 | } | |
1357 | break; | |
1358 | ||
1359 | case A_A0: | |
1360 | if (user->type != DSP_REG_N || user->reg != A_A0_NUM) | |
1361 | goto fail; | |
1362 | break; | |
1363 | case A_X0: | |
1364 | if (user->type != DSP_REG_N || user->reg != A_X0_NUM) | |
1365 | goto fail; | |
1366 | break; | |
1367 | case A_X1: | |
1368 | if (user->type != DSP_REG_N || user->reg != A_X1_NUM) | |
1369 | goto fail; | |
1370 | break; | |
1371 | case A_Y0: | |
1372 | if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) | |
1373 | goto fail; | |
1374 | break; | |
1375 | case A_Y1: | |
1376 | if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) | |
1377 | goto fail; | |
1378 | break; | |
1379 | ||
252b5132 RH |
1380 | case F_REG_M: |
1381 | case D_REG_M: | |
1382 | case X_REG_M: | |
1383 | case V_REG_M: | |
1384 | case FPUL_M: | |
1385 | case FPSCR_M: | |
1386 | /* Opcode needs rn */ | |
1387 | if (user->type != arg - F_REG_M + F_REG_N) | |
1388 | goto fail; | |
1389 | reg_m = user->reg; | |
1390 | break; | |
1391 | case DX_REG_M: | |
1392 | if (user->type != D_REG_N && user->type != X_REG_N) | |
1393 | goto fail; | |
1394 | reg_m = user->reg; | |
1395 | break; | |
1396 | case XMTRX_M4: | |
1397 | if (user->type != XMTRX_M4) | |
1398 | goto fail; | |
1399 | reg_m = 4; | |
1400 | break; | |
c4aa876b | 1401 | |
252b5132 RH |
1402 | default: |
1403 | printf (_("unhandled %d\n"), arg); | |
1404 | goto fail; | |
1405 | } | |
1406 | } | |
a37c8f88 JR |
1407 | if ( !(valid_arch & this_try->arch)) |
1408 | goto fail; | |
d4845d57 | 1409 | valid_arch &= this_try->arch; |
252b5132 | 1410 | return this_try; |
c4aa876b NC |
1411 | fail: |
1412 | ; | |
252b5132 RH |
1413 | } |
1414 | ||
1415 | return 0; | |
1416 | } | |
1417 | ||
252b5132 | 1418 | static void |
015551fc | 1419 | insert (where, how, pcrel, op) |
252b5132 RH |
1420 | char *where; |
1421 | int how; | |
1422 | int pcrel; | |
015551fc | 1423 | sh_operand_info *op; |
252b5132 RH |
1424 | { |
1425 | fix_new_exp (frag_now, | |
1426 | where - frag_now->fr_literal, | |
1427 | 2, | |
015551fc | 1428 | &op->immediate, |
252b5132 RH |
1429 | pcrel, |
1430 | how); | |
1431 | } | |
1432 | ||
1433 | static void | |
015551fc | 1434 | build_relax (opcode, op) |
252b5132 | 1435 | sh_opcode_info *opcode; |
015551fc | 1436 | sh_operand_info *op; |
252b5132 RH |
1437 | { |
1438 | int high_byte = target_big_endian ? 0 : 1; | |
1439 | char *p; | |
1440 | ||
1441 | if (opcode->arg[0] == A_BDISP8) | |
1442 | { | |
1443 | int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; | |
1444 | p = frag_var (rs_machine_dependent, | |
1445 | md_relax_table[C (what, COND32)].rlx_length, | |
1446 | md_relax_table[C (what, COND8)].rlx_length, | |
1447 | C (what, 0), | |
015551fc JR |
1448 | op->immediate.X_add_symbol, |
1449 | op->immediate.X_add_number, | |
252b5132 RH |
1450 | 0); |
1451 | p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); | |
1452 | } | |
1453 | else if (opcode->arg[0] == A_BDISP12) | |
1454 | { | |
1455 | p = frag_var (rs_machine_dependent, | |
1456 | md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, | |
1457 | md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, | |
1458 | C (UNCOND_JUMP, 0), | |
015551fc JR |
1459 | op->immediate.X_add_symbol, |
1460 | op->immediate.X_add_number, | |
252b5132 RH |
1461 | 0); |
1462 | p[high_byte] = (opcode->nibbles[0] << 4); | |
1463 | } | |
1464 | ||
1465 | } | |
1466 | ||
6b31947e | 1467 | /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */ |
d67b5d6d | 1468 | |
015551fc JR |
1469 | static char * |
1470 | insert_loop_bounds (output, operand) | |
1471 | char *output; | |
1472 | sh_operand_info *operand; | |
1473 | { | |
1474 | char *name; | |
1475 | symbolS *end_sym; | |
1476 | ||
1477 | /* Since the low byte of the opcode will be overwritten by the reloc, we | |
1478 | can just stash the high byte into both bytes and ignore endianness. */ | |
1479 | output[0] = 0x8c; | |
1480 | output[1] = 0x8c; | |
1481 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
1482 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
1483 | ||
1484 | if (sh_relax) | |
1485 | { | |
1486 | static int count = 0; | |
1487 | ||
1488 | /* If the last loop insn is a two-byte-insn, it is in danger of being | |
1489 | swapped with the insn after it. To prevent this, create a new | |
1490 | symbol - complete with SH_LABEL reloc - after the last loop insn. | |
1491 | If the last loop insn is four bytes long, the symbol will be | |
1492 | right in the middle, but four byte insns are not swapped anyways. */ | |
1493 | /* A REPEAT takes 6 bytes. The SH has a 32 bit address space. | |
1494 | Hence a 9 digit number should be enough to count all REPEATs. */ | |
1495 | name = alloca (11); | |
1496 | sprintf (name, "_R%x", count++ & 0x3fffffff); | |
c4aa876b | 1497 | end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag); |
015551fc JR |
1498 | /* Make this a local symbol. */ |
1499 | #ifdef OBJ_COFF | |
1500 | SF_SET_LOCAL (end_sym); | |
1501 | #endif /* OBJ_COFF */ | |
1502 | symbol_table_insert (end_sym); | |
1503 | end_sym->sy_value = operand[1].immediate; | |
1504 | end_sym->sy_value.X_add_number += 2; | |
1505 | fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL); | |
1506 | } | |
1507 | ||
1508 | output = frag_more (2); | |
1509 | output[0] = 0x8e; | |
1510 | output[1] = 0x8e; | |
1511 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
1512 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
1513 | ||
1514 | return frag_more (2); | |
1515 | } | |
1516 | ||
d67b5d6d | 1517 | /* Now we know what sort of opcodes it is, let's build the bytes. */ |
6b31947e | 1518 | |
0d10e182 | 1519 | static unsigned int |
252b5132 RH |
1520 | build_Mytes (opcode, operand) |
1521 | sh_opcode_info *opcode; | |
1522 | sh_operand_info *operand; | |
252b5132 RH |
1523 | { |
1524 | int index; | |
1525 | char nbuf[4]; | |
1526 | char *output = frag_more (2); | |
0d10e182 | 1527 | unsigned int size = 2; |
252b5132 RH |
1528 | int low_byte = target_big_endian ? 1 : 0; |
1529 | nbuf[0] = 0; | |
1530 | nbuf[1] = 0; | |
1531 | nbuf[2] = 0; | |
1532 | nbuf[3] = 0; | |
1533 | ||
1534 | for (index = 0; index < 4; index++) | |
1535 | { | |
1536 | sh_nibble_type i = opcode->nibbles[index]; | |
1537 | if (i < 16) | |
1538 | { | |
1539 | nbuf[index] = i; | |
1540 | } | |
1541 | else | |
1542 | { | |
1543 | switch (i) | |
1544 | { | |
1545 | case REG_N: | |
1546 | nbuf[index] = reg_n; | |
1547 | break; | |
1548 | case REG_M: | |
1549 | nbuf[index] = reg_m; | |
1550 | break; | |
d4845d57 JR |
1551 | case SDT_REG_N: |
1552 | if (reg_n < 2 || reg_n > 5) | |
1553 | as_bad (_("Invalid register: 'r%d'"), reg_n); | |
1554 | nbuf[index] = (reg_n & 3) | 4; | |
1555 | break; | |
252b5132 RH |
1556 | case REG_NM: |
1557 | nbuf[index] = reg_n | (reg_m >> 2); | |
1558 | break; | |
c4aa876b | 1559 | case REG_B: |
252b5132 RH |
1560 | nbuf[index] = reg_b | 0x08; |
1561 | break; | |
015551fc JR |
1562 | case IMM0_4BY4: |
1563 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); | |
1564 | break; | |
1565 | case IMM0_4BY2: | |
1566 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand); | |
1567 | break; | |
1568 | case IMM0_4: | |
1569 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand); | |
1570 | break; | |
1571 | case IMM1_4BY4: | |
1572 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1); | |
1573 | break; | |
1574 | case IMM1_4BY2: | |
1575 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1); | |
252b5132 | 1576 | break; |
015551fc JR |
1577 | case IMM1_4: |
1578 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1); | |
252b5132 | 1579 | break; |
015551fc JR |
1580 | case IMM0_8BY4: |
1581 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand); | |
252b5132 | 1582 | break; |
015551fc JR |
1583 | case IMM0_8BY2: |
1584 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand); | |
252b5132 | 1585 | break; |
015551fc JR |
1586 | case IMM0_8: |
1587 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand); | |
252b5132 | 1588 | break; |
015551fc JR |
1589 | case IMM1_8BY4: |
1590 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1); | |
252b5132 | 1591 | break; |
015551fc JR |
1592 | case IMM1_8BY2: |
1593 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1); | |
1594 | break; | |
1595 | case IMM1_8: | |
1596 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1); | |
252b5132 RH |
1597 | break; |
1598 | case PCRELIMM_8BY4: | |
015551fc | 1599 | insert (output, BFD_RELOC_SH_PCRELIMM8BY4, 1, operand); |
252b5132 RH |
1600 | break; |
1601 | case PCRELIMM_8BY2: | |
015551fc JR |
1602 | insert (output, BFD_RELOC_SH_PCRELIMM8BY2, 1, operand); |
1603 | break; | |
1604 | case REPEAT: | |
1605 | output = insert_loop_bounds (output, operand); | |
1606 | nbuf[index] = opcode->nibbles[3]; | |
1607 | operand += 2; | |
252b5132 RH |
1608 | break; |
1609 | default: | |
1610 | printf (_("failed for %d\n"), i); | |
1611 | } | |
1612 | } | |
1613 | } | |
c4aa876b NC |
1614 | if (!target_big_endian) |
1615 | { | |
1616 | output[1] = (nbuf[0] << 4) | (nbuf[1]); | |
1617 | output[0] = (nbuf[2] << 4) | (nbuf[3]); | |
1618 | } | |
1619 | else | |
1620 | { | |
1621 | output[0] = (nbuf[0] << 4) | (nbuf[1]); | |
1622 | output[1] = (nbuf[2] << 4) | (nbuf[3]); | |
1623 | } | |
0d10e182 | 1624 | return size; |
252b5132 RH |
1625 | } |
1626 | ||
d4845d57 JR |
1627 | /* Find an opcode at the start of *STR_P in the hash table, and set |
1628 | *STR_P to the first character after the last one read. */ | |
252b5132 | 1629 | |
d4845d57 JR |
1630 | static sh_opcode_info * |
1631 | find_cooked_opcode (str_p) | |
1632 | char **str_p; | |
252b5132 | 1633 | { |
d4845d57 | 1634 | char *str = *str_p; |
252b5132 RH |
1635 | unsigned char *op_start; |
1636 | unsigned char *op_end; | |
252b5132 RH |
1637 | char name[20]; |
1638 | int nlen = 0; | |
c4aa876b | 1639 | |
6b31947e | 1640 | /* Drop leading whitespace. */ |
252b5132 RH |
1641 | while (*str == ' ') |
1642 | str++; | |
1643 | ||
d4845d57 JR |
1644 | /* Find the op code end. |
1645 | The pre-processor will eliminate whitespace in front of | |
1646 | any '@' after the first argument; we may be called from | |
1647 | assemble_ppi, so the opcode might be terminated by an '@'. */ | |
252b5132 RH |
1648 | for (op_start = op_end = (unsigned char *) (str); |
1649 | *op_end | |
1650 | && nlen < 20 | |
d4845d57 | 1651 | && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; |
252b5132 RH |
1652 | op_end++) |
1653 | { | |
1654 | unsigned char c = op_start[nlen]; | |
1655 | ||
1656 | /* The machine independent code will convert CMP/EQ into cmp/EQ | |
d4845d57 JR |
1657 | because it thinks the '/' is the end of the symbol. Moreover, |
1658 | all but the first sub-insn is a parallel processing insn won't | |
3882b010 | 1659 | be capitalized. Instead of hacking up the machine independent |
d4845d57 | 1660 | code, we just deal with it here. */ |
3882b010 | 1661 | c = TOLOWER (c); |
252b5132 RH |
1662 | name[nlen] = c; |
1663 | nlen++; | |
1664 | } | |
c4aa876b | 1665 | |
252b5132 | 1666 | name[nlen] = 0; |
d4845d57 | 1667 | *str_p = op_end; |
252b5132 RH |
1668 | |
1669 | if (nlen == 0) | |
6b31947e | 1670 | as_bad (_("can't find opcode ")); |
252b5132 | 1671 | |
d4845d57 JR |
1672 | return (sh_opcode_info *) hash_find (opcode_hash_control, name); |
1673 | } | |
1674 | ||
1675 | /* Assemble a parallel processing insn. */ | |
1676 | #define DDT_BASE 0xf000 /* Base value for double data transfer insns */ | |
6b31947e | 1677 | |
0d10e182 | 1678 | static unsigned int |
d4845d57 JR |
1679 | assemble_ppi (op_end, opcode) |
1680 | char *op_end; | |
1681 | sh_opcode_info *opcode; | |
1682 | { | |
1683 | int movx = 0; | |
1684 | int movy = 0; | |
1685 | int cond = 0; | |
1686 | int field_b = 0; | |
1687 | char *output; | |
1688 | int move_code; | |
0d10e182 | 1689 | unsigned int size; |
d4845d57 JR |
1690 | |
1691 | /* Some insn ignore one or more register fields, e.g. psts machl,a0. | |
1692 | Make sure we encode a defined insn pattern. */ | |
1693 | reg_x = 0; | |
1694 | reg_y = 0; | |
1695 | ||
1696 | for (;;) | |
1697 | { | |
1698 | sh_operand_info operand[3]; | |
1699 | ||
1700 | if (opcode->arg[0] != A_END) | |
1701 | op_end = get_operands (opcode, op_end, operand); | |
1702 | opcode = get_specific (opcode, operand); | |
1703 | if (opcode == 0) | |
1704 | { | |
6b31947e | 1705 | /* Couldn't find an opcode which matched the operands. */ |
d4845d57 | 1706 | char *where = frag_more (2); |
0d10e182 | 1707 | size = 2; |
d4845d57 JR |
1708 | |
1709 | where[0] = 0x0; | |
1710 | where[1] = 0x0; | |
1711 | as_bad (_("invalid operands for opcode")); | |
0d10e182 | 1712 | return size; |
d4845d57 | 1713 | } |
c4aa876b | 1714 | |
d4845d57 JR |
1715 | if (opcode->nibbles[0] != PPI) |
1716 | as_bad (_("insn can't be combined with parallel processing insn")); | |
1717 | ||
1718 | switch (opcode->nibbles[1]) | |
1719 | { | |
1720 | ||
1721 | case NOPX: | |
1722 | if (movx) | |
1723 | as_bad (_("multiple movx specifications")); | |
1724 | movx = DDT_BASE; | |
1725 | break; | |
1726 | case NOPY: | |
1727 | if (movy) | |
1728 | as_bad (_("multiple movy specifications")); | |
1729 | movy = DDT_BASE; | |
1730 | break; | |
1731 | ||
1732 | case MOVX: | |
1733 | if (movx) | |
1734 | as_bad (_("multiple movx specifications")); | |
1735 | if (reg_n < 4 || reg_n > 5) | |
1736 | as_bad (_("invalid movx address register")); | |
1737 | if (opcode->nibbles[2] & 8) | |
1738 | { | |
1739 | if (reg_m == A_A1_NUM) | |
1740 | movx = 1 << 7; | |
1741 | else if (reg_m != A_A0_NUM) | |
1742 | as_bad (_("invalid movx dsp register")); | |
1743 | } | |
1744 | else | |
1745 | { | |
1746 | if (reg_x > 1) | |
1747 | as_bad (_("invalid movx dsp register")); | |
1748 | movx = reg_x << 7; | |
1749 | } | |
1750 | movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; | |
1751 | break; | |
1752 | ||
1753 | case MOVY: | |
1754 | if (movy) | |
1755 | as_bad (_("multiple movy specifications")); | |
1756 | if (opcode->nibbles[2] & 8) | |
1757 | { | |
1758 | /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, | |
1759 | so add 8 more. */ | |
1760 | movy = 8; | |
1761 | if (reg_m == A_A1_NUM) | |
1762 | movy += 1 << 6; | |
1763 | else if (reg_m != A_A0_NUM) | |
1764 | as_bad (_("invalid movy dsp register")); | |
1765 | } | |
1766 | else | |
1767 | { | |
1768 | if (reg_y > 1) | |
1769 | as_bad (_("invalid movy dsp register")); | |
1770 | movy = reg_y << 6; | |
1771 | } | |
1772 | if (reg_n < 6 || reg_n > 7) | |
1773 | as_bad (_("invalid movy address register")); | |
1774 | movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; | |
1775 | break; | |
1776 | ||
1777 | case PSH: | |
015551fc | 1778 | if (operand[0].immediate.X_op != O_constant) |
d4845d57 JR |
1779 | as_bad (_("dsp immediate shift value not constant")); |
1780 | field_b = ((opcode->nibbles[2] << 12) | |
015551fc | 1781 | | (operand[0].immediate.X_add_number & 127) << 4 |
d4845d57 JR |
1782 | | reg_n); |
1783 | break; | |
1784 | case PPI3: | |
1785 | if (field_b) | |
1786 | as_bad (_("multiple parallel processing specifications")); | |
1787 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
1788 | + (reg_x << 6) + (reg_y << 4) + reg_n); | |
1789 | break; | |
1790 | case PDC: | |
1791 | if (cond) | |
1792 | as_bad (_("multiple condition specifications")); | |
1793 | cond = opcode->nibbles[2] << 8; | |
1794 | if (*op_end) | |
1795 | goto skip_cond_check; | |
1796 | break; | |
1797 | case PPIC: | |
1798 | if (field_b) | |
1799 | as_bad (_("multiple parallel processing specifications")); | |
1800 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
1801 | + cond + (reg_x << 6) + (reg_y << 4) + reg_n); | |
1802 | cond = 0; | |
1803 | break; | |
1804 | case PMUL: | |
1805 | if (field_b) | |
1806 | { | |
1807 | if ((field_b & 0xef00) != 0xa100) | |
1808 | as_bad (_("insn cannot be combined with pmuls")); | |
1809 | field_b -= 0x8100; | |
1810 | switch (field_b & 0xf) | |
1811 | { | |
1812 | case A_X0_NUM: | |
1813 | field_b += 0 - A_X0_NUM; | |
1814 | break; | |
1815 | case A_Y0_NUM: | |
1816 | field_b += 1 - A_Y0_NUM; | |
1817 | break; | |
1818 | case A_A0_NUM: | |
1819 | field_b += 2 - A_A0_NUM; | |
1820 | break; | |
1821 | case A_A1_NUM: | |
1822 | field_b += 3 - A_A1_NUM; | |
1823 | break; | |
1824 | default: | |
1825 | as_bad (_("bad padd / psub pmuls output operand")); | |
1826 | } | |
1827 | } | |
1828 | field_b += 0x4000 + reg_efg; | |
1829 | break; | |
1830 | default: | |
1831 | abort (); | |
1832 | } | |
1833 | if (cond) | |
1834 | { | |
1835 | as_bad (_("condition not followed by conditionalizable insn")); | |
1836 | cond = 0; | |
1837 | } | |
1838 | if (! *op_end) | |
1839 | break; | |
1840 | skip_cond_check: | |
1841 | opcode = find_cooked_opcode (&op_end); | |
1842 | if (opcode == NULL) | |
1843 | { | |
1844 | (as_bad | |
1845 | (_("unrecognized characters at end of parallel processing insn"))); | |
1846 | break; | |
1847 | } | |
1848 | } | |
1849 | ||
1850 | move_code = movx | movy; | |
1851 | if (field_b) | |
1852 | { | |
1853 | /* Parallel processing insn. */ | |
1854 | unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b; | |
1855 | ||
1856 | output = frag_more (4); | |
0d10e182 | 1857 | size = 4; |
d4845d57 JR |
1858 | if (! target_big_endian) |
1859 | { | |
1860 | output[3] = ppi_code >> 8; | |
1861 | output[2] = ppi_code; | |
1862 | } | |
1863 | else | |
1864 | { | |
1865 | output[2] = ppi_code >> 8; | |
1866 | output[3] = ppi_code; | |
1867 | } | |
1868 | move_code |= 0xf800; | |
1869 | } | |
1870 | else | |
0d10e182 JL |
1871 | { |
1872 | /* Just a double data transfer. */ | |
1873 | output = frag_more (2); | |
1874 | size = 2; | |
1875 | } | |
d4845d57 JR |
1876 | if (! target_big_endian) |
1877 | { | |
1878 | output[1] = move_code >> 8; | |
1879 | output[0] = move_code; | |
1880 | } | |
1881 | else | |
1882 | { | |
1883 | output[0] = move_code >> 8; | |
1884 | output[1] = move_code; | |
1885 | } | |
0d10e182 | 1886 | return size; |
d4845d57 JR |
1887 | } |
1888 | ||
1889 | /* This is the guts of the machine-dependent assembler. STR points to a | |
1890 | machine dependent instruction. This function is supposed to emit | |
6b31947e | 1891 | the frags/bytes it assembles to. */ |
d4845d57 JR |
1892 | |
1893 | void | |
1894 | md_assemble (str) | |
1895 | char *str; | |
1896 | { | |
1897 | unsigned char *op_end; | |
1898 | sh_operand_info operand[3]; | |
1899 | sh_opcode_info *opcode; | |
dda5ecfc | 1900 | unsigned int size = 0; |
d4845d57 JR |
1901 | |
1902 | opcode = find_cooked_opcode (&str); | |
1903 | op_end = str; | |
252b5132 RH |
1904 | |
1905 | if (opcode == NULL) | |
1906 | { | |
1907 | as_bad (_("unknown opcode")); | |
1908 | return; | |
1909 | } | |
1910 | ||
1911 | if (sh_relax | |
1912 | && ! seg_info (now_seg)->tc_segment_info_data.in_code) | |
1913 | { | |
1914 | /* Output a CODE reloc to tell the linker that the following | |
1915 | bytes are instructions, not data. */ | |
1916 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
1917 | BFD_RELOC_SH_CODE); | |
1918 | seg_info (now_seg)->tc_segment_info_data.in_code = 1; | |
1919 | } | |
1920 | ||
d4845d57 JR |
1921 | if (opcode->nibbles[0] == PPI) |
1922 | { | |
0d10e182 | 1923 | size = assemble_ppi (op_end, opcode); |
252b5132 RH |
1924 | } |
1925 | else | |
1926 | { | |
0d10e182 JL |
1927 | if (opcode->arg[0] == A_BDISP12 |
1928 | || opcode->arg[0] == A_BDISP8) | |
252b5132 | 1929 | { |
0d10e182 JL |
1930 | parse_exp (op_end + 1, &operand[0]); |
1931 | build_relax (opcode, &operand[0]); | |
5fc44b2d JR |
1932 | } |
1933 | else | |
1934 | { | |
0d10e182 JL |
1935 | if (opcode->arg[0] == A_END) |
1936 | { | |
1937 | /* Ignore trailing whitespace. If there is any, it has already | |
1938 | been compressed to a single space. */ | |
1939 | if (*op_end == ' ') | |
1940 | op_end++; | |
1941 | } | |
1942 | else | |
1943 | { | |
1944 | op_end = get_operands (opcode, op_end, operand); | |
1945 | } | |
1946 | opcode = get_specific (opcode, operand); | |
252b5132 | 1947 | |
0d10e182 JL |
1948 | if (opcode == 0) |
1949 | { | |
1950 | /* Couldn't find an opcode which matched the operands. */ | |
1951 | char *where = frag_more (2); | |
1952 | size = 2; | |
252b5132 | 1953 | |
0d10e182 JL |
1954 | where[0] = 0x0; |
1955 | where[1] = 0x0; | |
1956 | as_bad (_("invalid operands for opcode")); | |
1957 | } | |
1958 | else | |
1959 | { | |
1960 | if (*op_end) | |
1961 | as_bad (_("excess operands: '%s'"), op_end); | |
1962 | ||
1963 | size = build_Mytes (opcode, operand); | |
1964 | } | |
252b5132 | 1965 | } |
0d10e182 | 1966 | } |
252b5132 | 1967 | |
2bc0a128 | 1968 | #ifdef BFD_ASSEMBLER |
4dc7ead9 | 1969 | dwarf2_emit_insn (size); |
2bc0a128 | 1970 | #endif |
252b5132 RH |
1971 | } |
1972 | ||
1973 | /* This routine is called each time a label definition is seen. It | |
1974 | emits a BFD_RELOC_SH_LABEL reloc if necessary. */ | |
1975 | ||
1976 | void | |
1977 | sh_frob_label () | |
1978 | { | |
1979 | static fragS *last_label_frag; | |
1980 | static int last_label_offset; | |
1981 | ||
1982 | if (sh_relax | |
1983 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
1984 | { | |
1985 | int offset; | |
1986 | ||
1987 | offset = frag_now_fix (); | |
1988 | if (frag_now != last_label_frag | |
1989 | || offset != last_label_offset) | |
c4aa876b | 1990 | { |
252b5132 RH |
1991 | fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); |
1992 | last_label_frag = frag_now; | |
1993 | last_label_offset = offset; | |
1994 | } | |
1995 | } | |
1996 | } | |
1997 | ||
1998 | /* This routine is called when the assembler is about to output some | |
1999 | data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ | |
2000 | ||
2001 | void | |
2002 | sh_flush_pending_output () | |
2003 | { | |
2004 | if (sh_relax | |
2005 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
2006 | { | |
2007 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
2008 | BFD_RELOC_SH_DATA); | |
2009 | seg_info (now_seg)->tc_segment_info_data.in_code = 0; | |
2010 | } | |
2011 | } | |
2012 | ||
2013 | symbolS * | |
c0fecd35 AM |
2014 | md_undefined_symbol (name) |
2015 | char *name; | |
252b5132 | 2016 | { |
a1cc9221 AO |
2017 | #ifdef OBJ_ELF |
2018 | /* Under ELF we need to default _GLOBAL_OFFSET_TABLE. Otherwise we | |
2019 | have no need to default values of symbols. */ | |
2020 | if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) | |
2021 | { | |
2022 | if (!GOT_symbol) | |
2023 | { | |
2024 | if (symbol_find (name)) | |
2025 | as_bad ("GOT already in the symbol table"); | |
81d4177b | 2026 | |
a1cc9221 AO |
2027 | GOT_symbol = symbol_new (name, undefined_section, |
2028 | (valueT)0, & zero_address_frag); | |
2029 | } | |
81d4177b | 2030 | |
a1cc9221 AO |
2031 | return GOT_symbol; |
2032 | } | |
2033 | #endif /* OBJ_ELF */ | |
81d4177b | 2034 | |
252b5132 RH |
2035 | return 0; |
2036 | } | |
2037 | ||
2038 | #ifdef OBJ_COFF | |
056350c6 | 2039 | #ifndef BFD_ASSEMBLER |
252b5132 RH |
2040 | |
2041 | void | |
c0fecd35 AM |
2042 | tc_crawl_symbol_chain (headers) |
2043 | object_headers *headers; | |
252b5132 RH |
2044 | { |
2045 | printf (_("call to tc_crawl_symbol_chain \n")); | |
2046 | } | |
2047 | ||
2048 | void | |
c0fecd35 AM |
2049 | tc_headers_hook (headers) |
2050 | object_headers *headers; | |
252b5132 RH |
2051 | { |
2052 | printf (_("call to tc_headers_hook \n")); | |
2053 | } | |
2054 | ||
056350c6 | 2055 | #endif |
252b5132 RH |
2056 | #endif |
2057 | ||
6b31947e NC |
2058 | /* Various routines to kill one day. */ |
2059 | /* Equal to MAX_PRECISION in atof-ieee.c. */ | |
252b5132 RH |
2060 | #define MAX_LITTLENUMS 6 |
2061 | ||
6b31947e NC |
2062 | /* Turn a string in input_line_pointer into a floating point constant |
2063 | of type TYPE, and store the appropriate bytes in *LITP. The number | |
2064 | of LITTLENUMS emitted is stored in *SIZEP . An error message is | |
2065 | returned, or NULL on OK. */ | |
2066 | ||
252b5132 RH |
2067 | char * |
2068 | md_atof (type, litP, sizeP) | |
2069 | int type; | |
2070 | char *litP; | |
2071 | int *sizeP; | |
2072 | { | |
2073 | int prec; | |
2074 | LITTLENUM_TYPE words[4]; | |
2075 | char *t; | |
2076 | int i; | |
2077 | ||
2078 | switch (type) | |
2079 | { | |
2080 | case 'f': | |
2081 | prec = 2; | |
2082 | break; | |
2083 | ||
2084 | case 'd': | |
2085 | prec = 4; | |
2086 | break; | |
2087 | ||
2088 | default: | |
2089 | *sizeP = 0; | |
2090 | return _("bad call to md_atof"); | |
2091 | } | |
2092 | ||
2093 | t = atof_ieee (input_line_pointer, type, words); | |
2094 | if (t) | |
2095 | input_line_pointer = t; | |
2096 | ||
2097 | *sizeP = prec * 2; | |
2098 | ||
2099 | if (! target_big_endian) | |
2100 | { | |
2101 | for (i = prec - 1; i >= 0; i--) | |
2102 | { | |
2103 | md_number_to_chars (litP, (valueT) words[i], 2); | |
2104 | litP += 2; | |
2105 | } | |
2106 | } | |
2107 | else | |
2108 | { | |
2109 | for (i = 0; i < prec; i++) | |
2110 | { | |
2111 | md_number_to_chars (litP, (valueT) words[i], 2); | |
2112 | litP += 2; | |
2113 | } | |
2114 | } | |
c4aa876b | 2115 | |
252b5132 RH |
2116 | return NULL; |
2117 | } | |
2118 | ||
2119 | /* Handle the .uses pseudo-op. This pseudo-op is used just before a | |
2120 | call instruction. It refers to a label of the instruction which | |
2121 | loads the register which the call uses. We use it to generate a | |
2122 | special reloc for the linker. */ | |
2123 | ||
2124 | static void | |
2125 | s_uses (ignore) | |
43841e91 | 2126 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
2127 | { |
2128 | expressionS ex; | |
2129 | ||
2130 | if (! sh_relax) | |
2131 | as_warn (_(".uses pseudo-op seen when not relaxing")); | |
2132 | ||
2133 | expression (&ex); | |
2134 | ||
2135 | if (ex.X_op != O_symbol || ex.X_add_number != 0) | |
2136 | { | |
2137 | as_bad (_("bad .uses format")); | |
2138 | ignore_rest_of_line (); | |
2139 | return; | |
2140 | } | |
2141 | ||
2142 | fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); | |
2143 | ||
2144 | demand_empty_rest_of_line (); | |
2145 | } | |
2146 | \f | |
2147 | CONST char *md_shortopts = ""; | |
6b31947e NC |
2148 | struct option md_longopts[] = |
2149 | { | |
252b5132 | 2150 | #define OPTION_RELAX (OPTION_MD_BASE) |
05982cac HPN |
2151 | #define OPTION_BIG (OPTION_MD_BASE + 1) |
2152 | #define OPTION_LITTLE (OPTION_BIG + 1) | |
252b5132 | 2153 | #define OPTION_SMALL (OPTION_LITTLE + 1) |
d4845d57 | 2154 | #define OPTION_DSP (OPTION_SMALL + 1) |
252b5132 RH |
2155 | |
2156 | {"relax", no_argument, NULL, OPTION_RELAX}, | |
05982cac | 2157 | {"big", no_argument, NULL, OPTION_BIG}, |
252b5132 RH |
2158 | {"little", no_argument, NULL, OPTION_LITTLE}, |
2159 | {"small", no_argument, NULL, OPTION_SMALL}, | |
d4845d57 | 2160 | {"dsp", no_argument, NULL, OPTION_DSP}, |
252b5132 RH |
2161 | {NULL, no_argument, NULL, 0} |
2162 | }; | |
c4aa876b | 2163 | size_t md_longopts_size = sizeof (md_longopts); |
252b5132 RH |
2164 | |
2165 | int | |
2166 | md_parse_option (c, arg) | |
2167 | int c; | |
43841e91 | 2168 | char *arg ATTRIBUTE_UNUSED; |
252b5132 RH |
2169 | { |
2170 | switch (c) | |
2171 | { | |
2172 | case OPTION_RELAX: | |
2173 | sh_relax = 1; | |
2174 | break; | |
2175 | ||
05982cac HPN |
2176 | case OPTION_BIG: |
2177 | target_big_endian = 1; | |
2178 | break; | |
2179 | ||
252b5132 | 2180 | case OPTION_LITTLE: |
252b5132 RH |
2181 | target_big_endian = 0; |
2182 | break; | |
2183 | ||
2184 | case OPTION_SMALL: | |
2185 | sh_small = 1; | |
2186 | break; | |
2187 | ||
d4845d57 JR |
2188 | case OPTION_DSP: |
2189 | sh_dsp = 1; | |
2190 | break; | |
2191 | ||
252b5132 RH |
2192 | default: |
2193 | return 0; | |
2194 | } | |
2195 | ||
2196 | return 1; | |
2197 | } | |
2198 | ||
2199 | void | |
2200 | md_show_usage (stream) | |
2201 | FILE *stream; | |
2202 | { | |
c4aa876b | 2203 | fprintf (stream, _("\ |
252b5132 RH |
2204 | SH options:\n\ |
2205 | -little generate little endian code\n\ | |
05982cac | 2206 | -big generate big endian code\n\ |
252b5132 | 2207 | -relax alter jump instructions for long displacements\n\ |
5b8274e3 | 2208 | -small align sections to 4 byte boundaries, not 16\n\ |
182e89d3 | 2209 | -dsp enable sh-dsp insns, and disable sh3e / sh4 insns.\n")); |
252b5132 RH |
2210 | } |
2211 | \f | |
252b5132 RH |
2212 | /* This struct is used to pass arguments to sh_count_relocs through |
2213 | bfd_map_over_sections. */ | |
2214 | ||
2215 | struct sh_count_relocs | |
2216 | { | |
2217 | /* Symbol we are looking for. */ | |
2218 | symbolS *sym; | |
2219 | /* Count of relocs found. */ | |
2220 | int count; | |
2221 | }; | |
2222 | ||
2223 | /* Count the number of fixups in a section which refer to a particular | |
2224 | symbol. When using BFD_ASSEMBLER, this is called via | |
2225 | bfd_map_over_sections. */ | |
2226 | ||
252b5132 RH |
2227 | static void |
2228 | sh_count_relocs (abfd, sec, data) | |
43841e91 | 2229 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 RH |
2230 | segT sec; |
2231 | PTR data; | |
2232 | { | |
2233 | struct sh_count_relocs *info = (struct sh_count_relocs *) data; | |
2234 | segment_info_type *seginfo; | |
2235 | symbolS *sym; | |
2236 | fixS *fix; | |
2237 | ||
2238 | seginfo = seg_info (sec); | |
2239 | if (seginfo == NULL) | |
2240 | return; | |
2241 | ||
2242 | sym = info->sym; | |
2243 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
2244 | { | |
2245 | if (fix->fx_addsy == sym) | |
2246 | { | |
2247 | ++info->count; | |
2248 | fix->fx_tcbit = 1; | |
2249 | } | |
2250 | } | |
2251 | } | |
2252 | ||
2253 | /* Handle the count relocs for a particular section. When using | |
2254 | BFD_ASSEMBLER, this is called via bfd_map_over_sections. */ | |
2255 | ||
252b5132 RH |
2256 | static void |
2257 | sh_frob_section (abfd, sec, ignore) | |
43841e91 | 2258 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 | 2259 | segT sec; |
43841e91 | 2260 | PTR ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
2261 | { |
2262 | segment_info_type *seginfo; | |
2263 | fixS *fix; | |
2264 | ||
2265 | seginfo = seg_info (sec); | |
2266 | if (seginfo == NULL) | |
2267 | return; | |
2268 | ||
2269 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
2270 | { | |
2271 | symbolS *sym; | |
2272 | bfd_vma val; | |
2273 | fixS *fscan; | |
2274 | struct sh_count_relocs info; | |
2275 | ||
2276 | if (fix->fx_r_type != BFD_RELOC_SH_USES) | |
2277 | continue; | |
2278 | ||
2279 | /* The BFD_RELOC_SH_USES reloc should refer to a defined local | |
2280 | symbol in the same section. */ | |
2281 | sym = fix->fx_addsy; | |
2282 | if (sym == NULL | |
2283 | || fix->fx_subsy != NULL | |
2284 | || fix->fx_addnumber != 0 | |
2285 | || S_GET_SEGMENT (sym) != sec | |
2286 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) | |
2287 | || S_GET_STORAGE_CLASS (sym) == C_EXT | |
2288 | #endif | |
2289 | || S_IS_EXTERNAL (sym)) | |
2290 | { | |
2291 | as_warn_where (fix->fx_file, fix->fx_line, | |
2292 | _(".uses does not refer to a local symbol in the same section")); | |
2293 | continue; | |
2294 | } | |
2295 | ||
2296 | /* Look through the fixups again, this time looking for one | |
2297 | at the same location as sym. */ | |
2298 | val = S_GET_VALUE (sym); | |
2299 | for (fscan = seginfo->fix_root; | |
2300 | fscan != NULL; | |
2301 | fscan = fscan->fx_next) | |
2302 | if (val == fscan->fx_frag->fr_address + fscan->fx_where | |
2303 | && fscan->fx_r_type != BFD_RELOC_SH_ALIGN | |
2304 | && fscan->fx_r_type != BFD_RELOC_SH_CODE | |
2305 | && fscan->fx_r_type != BFD_RELOC_SH_DATA | |
2306 | && fscan->fx_r_type != BFD_RELOC_SH_LABEL) | |
2307 | break; | |
2308 | if (fscan == NULL) | |
2309 | { | |
2310 | as_warn_where (fix->fx_file, fix->fx_line, | |
2311 | _("can't find fixup pointed to by .uses")); | |
2312 | continue; | |
2313 | } | |
2314 | ||
2315 | if (fscan->fx_tcbit) | |
2316 | { | |
2317 | /* We've already done this one. */ | |
2318 | continue; | |
2319 | } | |
2320 | ||
6b31947e NC |
2321 | /* The variable fscan should also be a fixup to a local symbol |
2322 | in the same section. */ | |
252b5132 RH |
2323 | sym = fscan->fx_addsy; |
2324 | if (sym == NULL | |
2325 | || fscan->fx_subsy != NULL | |
2326 | || fscan->fx_addnumber != 0 | |
2327 | || S_GET_SEGMENT (sym) != sec | |
2328 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) | |
2329 | || S_GET_STORAGE_CLASS (sym) == C_EXT | |
2330 | #endif | |
2331 | || S_IS_EXTERNAL (sym)) | |
2332 | { | |
2333 | as_warn_where (fix->fx_file, fix->fx_line, | |
2334 | _(".uses target does not refer to a local symbol in the same section")); | |
2335 | continue; | |
2336 | } | |
2337 | ||
2338 | /* Now we look through all the fixups of all the sections, | |
2339 | counting the number of times we find a reference to sym. */ | |
2340 | info.sym = sym; | |
2341 | info.count = 0; | |
2342 | #ifdef BFD_ASSEMBLER | |
2343 | bfd_map_over_sections (stdoutput, sh_count_relocs, (PTR) &info); | |
2344 | #else | |
2345 | { | |
2346 | int iscan; | |
2347 | ||
2348 | for (iscan = SEG_E0; iscan < SEG_UNKNOWN; iscan++) | |
2349 | sh_count_relocs ((bfd *) NULL, iscan, (PTR) &info); | |
2350 | } | |
2351 | #endif | |
2352 | ||
2353 | if (info.count < 1) | |
2354 | abort (); | |
2355 | ||
2356 | /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. | |
2357 | We have already adjusted the value of sym to include the | |
2358 | fragment address, so we undo that adjustment here. */ | |
2359 | subseg_change (sec, 0); | |
7bcad3e5 NC |
2360 | fix_new (fscan->fx_frag, |
2361 | S_GET_VALUE (sym) - fscan->fx_frag->fr_address, | |
252b5132 RH |
2362 | 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); |
2363 | } | |
2364 | } | |
2365 | ||
2366 | /* This function is called after the symbol table has been completed, | |
2367 | but before the relocs or section contents have been written out. | |
2368 | If we have seen any .uses pseudo-ops, they point to an instruction | |
2369 | which loads a register with the address of a function. We look | |
2370 | through the fixups to find where the function address is being | |
2371 | loaded from. We then generate a COUNT reloc giving the number of | |
2372 | times that function address is referred to. The linker uses this | |
2373 | information when doing relaxing, to decide when it can eliminate | |
2374 | the stored function address entirely. */ | |
2375 | ||
2376 | void | |
2377 | sh_frob_file () | |
2378 | { | |
2379 | if (! sh_relax) | |
2380 | return; | |
2381 | ||
2382 | #ifdef BFD_ASSEMBLER | |
2383 | bfd_map_over_sections (stdoutput, sh_frob_section, (PTR) NULL); | |
2384 | #else | |
2385 | { | |
2386 | int iseg; | |
2387 | ||
2388 | for (iseg = SEG_E0; iseg < SEG_UNKNOWN; iseg++) | |
2389 | sh_frob_section ((bfd *) NULL, iseg, (PTR) NULL); | |
2390 | } | |
2391 | #endif | |
2392 | } | |
2393 | ||
2394 | /* Called after relaxing. Set the correct sizes of the fragments, and | |
94f592af | 2395 | create relocs so that md_apply_fix3 will fill in the correct values. */ |
252b5132 RH |
2396 | |
2397 | void | |
2398 | md_convert_frag (headers, seg, fragP) | |
2399 | #ifdef BFD_ASSEMBLER | |
43841e91 | 2400 | bfd *headers ATTRIBUTE_UNUSED; |
252b5132 RH |
2401 | #else |
2402 | object_headers *headers; | |
2403 | #endif | |
2404 | segT seg; | |
2405 | fragS *fragP; | |
2406 | { | |
2407 | int donerelax = 0; | |
2408 | ||
2409 | switch (fragP->fr_subtype) | |
2410 | { | |
2411 | case C (COND_JUMP, COND8): | |
2412 | case C (COND_JUMP_DELAY, COND8): | |
2413 | subseg_change (seg, 0); | |
2414 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
2415 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
2416 | fragP->fr_fix += 2; | |
2417 | fragP->fr_var = 0; | |
2418 | break; | |
2419 | ||
2420 | case C (UNCOND_JUMP, UNCOND12): | |
2421 | subseg_change (seg, 0); | |
2422 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
2423 | 1, BFD_RELOC_SH_PCDISP12BY2); | |
2424 | fragP->fr_fix += 2; | |
2425 | fragP->fr_var = 0; | |
2426 | break; | |
2427 | ||
2428 | case C (UNCOND_JUMP, UNCOND32): | |
2429 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): | |
2430 | if (fragP->fr_symbol == NULL) | |
99b222b4 HPN |
2431 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2432 | _("displacement overflows 12-bit field")); | |
252b5132 | 2433 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
99b222b4 HPN |
2434 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2435 | _("displacement to defined symbol %s overflows 12-bit field"), | |
2436 | S_GET_NAME (fragP->fr_symbol)); | |
252b5132 | 2437 | else |
99b222b4 HPN |
2438 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2439 | _("displacement to undefined symbol %s overflows 12-bit field"), | |
2440 | S_GET_NAME (fragP->fr_symbol)); | |
2441 | /* Stabilize this frag, so we don't trip an assert. */ | |
2442 | fragP->fr_fix += fragP->fr_var; | |
2443 | fragP->fr_var = 0; | |
252b5132 RH |
2444 | break; |
2445 | ||
2446 | case C (COND_JUMP, COND12): | |
2447 | case C (COND_JUMP_DELAY, COND12): | |
6b31947e | 2448 | /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */ |
252b5132 RH |
2449 | /* I found that a relax failure for gcc.c-torture/execute/930628-1.c |
2450 | was due to gas incorrectly relaxing an out-of-range conditional | |
2451 | branch with delay slot. It turned: | |
2452 | bf.s L6 (slot mov.l r12,@(44,r0)) | |
2453 | into: | |
c4aa876b | 2454 | |
252b5132 RH |
2455 | 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) |
2456 | 30: 00 09 nop | |
2457 | 32: 10 cb mov.l r12,@(44,r0) | |
2458 | Therefore, branches with delay slots have to be handled | |
2459 | differently from ones without delay slots. */ | |
2460 | { | |
2461 | unsigned char *buffer = | |
2462 | (unsigned char *) (fragP->fr_fix + fragP->fr_literal); | |
2463 | int highbyte = target_big_endian ? 0 : 1; | |
2464 | int lowbyte = target_big_endian ? 1 : 0; | |
2465 | int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); | |
2466 | ||
2467 | /* Toggle the true/false bit of the bcond. */ | |
2468 | buffer[highbyte] ^= 0x2; | |
2469 | ||
d3ecfc59 | 2470 | /* If this is a delayed branch, we may not put the bra in the |
252b5132 RH |
2471 | slot. So we change it to a non-delayed branch, like that: |
2472 | b! cond slot_label; bra disp; slot_label: slot_insn | |
2473 | ??? We should try if swapping the conditional branch and | |
2474 | its delay-slot insn already makes the branch reach. */ | |
2475 | ||
2476 | /* Build a relocation to six / four bytes farther on. */ | |
2477 | subseg_change (seg, 0); | |
2478 | fix_new (fragP, fragP->fr_fix, 2, | |
2479 | #ifdef BFD_ASSEMBLER | |
2480 | section_symbol (seg), | |
2481 | #else | |
2482 | seg_info (seg)->dot, | |
2483 | #endif | |
2484 | fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), | |
2485 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
2486 | ||
2487 | /* Set up a jump instruction. */ | |
2488 | buffer[highbyte + 2] = 0xa0; | |
2489 | buffer[lowbyte + 2] = 0; | |
2490 | fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, | |
2491 | fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); | |
2492 | ||
2493 | if (delay) | |
2494 | { | |
2495 | buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ | |
2496 | fragP->fr_fix += 4; | |
2497 | } | |
2498 | else | |
2499 | { | |
2500 | /* Fill in a NOP instruction. */ | |
2501 | buffer[highbyte + 4] = 0x0; | |
2502 | buffer[lowbyte + 4] = 0x9; | |
2503 | ||
2504 | fragP->fr_fix += 6; | |
2505 | } | |
2506 | fragP->fr_var = 0; | |
2507 | donerelax = 1; | |
2508 | } | |
2509 | break; | |
2510 | ||
2511 | case C (COND_JUMP, COND32): | |
2512 | case C (COND_JUMP_DELAY, COND32): | |
2513 | case C (COND_JUMP, UNDEF_WORD_DISP): | |
2514 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): | |
2515 | if (fragP->fr_symbol == NULL) | |
99b222b4 HPN |
2516 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2517 | _("displacement overflows 8-bit field")); | |
252b5132 | 2518 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
99b222b4 HPN |
2519 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2520 | _("displacement to defined symbol %s overflows 8-bit field"), | |
2521 | S_GET_NAME (fragP->fr_symbol)); | |
252b5132 | 2522 | else |
99b222b4 HPN |
2523 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2524 | _("displacement to undefined symbol %s overflows 8-bit field "), | |
2525 | S_GET_NAME (fragP->fr_symbol)); | |
2526 | /* Stabilize this frag, so we don't trip an assert. */ | |
2527 | fragP->fr_fix += fragP->fr_var; | |
2528 | fragP->fr_var = 0; | |
252b5132 RH |
2529 | break; |
2530 | ||
2531 | default: | |
2532 | abort (); | |
2533 | } | |
2534 | ||
2535 | if (donerelax && !sh_relax) | |
2536 | as_warn_where (fragP->fr_file, fragP->fr_line, | |
2537 | _("overflow in branch to %s; converted into longer instruction sequence"), | |
2538 | (fragP->fr_symbol != NULL | |
2539 | ? S_GET_NAME (fragP->fr_symbol) | |
2540 | : "")); | |
2541 | } | |
2542 | ||
2543 | valueT | |
c0fecd35 | 2544 | md_section_align (seg, size) |
dda5ecfc | 2545 | segT seg ATTRIBUTE_UNUSED; |
c0fecd35 | 2546 | valueT size; |
252b5132 RH |
2547 | { |
2548 | #ifdef BFD_ASSEMBLER | |
2549 | #ifdef OBJ_ELF | |
2550 | return size; | |
2551 | #else /* ! OBJ_ELF */ | |
2552 | return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1) | |
2553 | & (-1 << bfd_get_section_alignment (stdoutput, seg))); | |
2554 | #endif /* ! OBJ_ELF */ | |
2555 | #else /* ! BFD_ASSEMBLER */ | |
2556 | return ((size + (1 << section_alignment[(int) seg]) - 1) | |
2557 | & (-1 << section_alignment[(int) seg])); | |
2558 | #endif /* ! BFD_ASSEMBLER */ | |
2559 | } | |
2560 | ||
2561 | /* This static variable is set by s_uacons to tell sh_cons_align that | |
2562 | the expession does not need to be aligned. */ | |
2563 | ||
2564 | static int sh_no_align_cons = 0; | |
2565 | ||
2566 | /* This handles the unaligned space allocation pseudo-ops, such as | |
2567 | .uaword. .uaword is just like .word, but the value does not need | |
2568 | to be aligned. */ | |
2569 | ||
2570 | static void | |
2571 | s_uacons (bytes) | |
2572 | int bytes; | |
2573 | { | |
2574 | /* Tell sh_cons_align not to align this value. */ | |
2575 | sh_no_align_cons = 1; | |
2576 | cons (bytes); | |
2577 | } | |
2578 | ||
2579 | /* If a .word, et. al., pseud-op is seen, warn if the value is not | |
2580 | aligned correctly. Note that this can cause warnings to be issued | |
2581 | when assembling initialized structured which were declared with the | |
2582 | packed attribute. FIXME: Perhaps we should require an option to | |
2583 | enable this warning? */ | |
2584 | ||
2585 | void | |
2586 | sh_cons_align (nbytes) | |
2587 | int nbytes; | |
2588 | { | |
2589 | int nalign; | |
2590 | char *p; | |
2591 | ||
2592 | if (sh_no_align_cons) | |
2593 | { | |
2594 | /* This is an unaligned pseudo-op. */ | |
2595 | sh_no_align_cons = 0; | |
2596 | return; | |
2597 | } | |
2598 | ||
2599 | nalign = 0; | |
2600 | while ((nbytes & 1) == 0) | |
2601 | { | |
2602 | ++nalign; | |
2603 | nbytes >>= 1; | |
2604 | } | |
2605 | ||
2606 | if (nalign == 0) | |
2607 | return; | |
2608 | ||
2609 | if (now_seg == absolute_section) | |
2610 | { | |
2611 | if ((abs_section_offset & ((1 << nalign) - 1)) != 0) | |
2612 | as_warn (_("misaligned data")); | |
2613 | return; | |
2614 | } | |
2615 | ||
0a9ef439 | 2616 | p = frag_var (rs_align_test, 1, 1, (relax_substateT) 0, |
252b5132 RH |
2617 | (symbolS *) NULL, (offsetT) nalign, (char *) NULL); |
2618 | ||
2619 | record_alignment (now_seg, nalign); | |
2620 | } | |
2621 | ||
2622 | /* When relaxing, we need to output a reloc for any .align directive | |
2623 | that requests alignment to a four byte boundary or larger. This is | |
2624 | also where we check for misaligned data. */ | |
2625 | ||
2626 | void | |
2627 | sh_handle_align (frag) | |
2628 | fragS *frag; | |
2629 | { | |
0a9ef439 RH |
2630 | int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix; |
2631 | ||
2632 | if (frag->fr_type == rs_align_code) | |
2633 | { | |
2634 | static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; | |
2635 | static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; | |
2636 | ||
2637 | char *p = frag->fr_literal + frag->fr_fix; | |
2638 | ||
2639 | if (bytes & 1) | |
2640 | { | |
2641 | *p++ = 0; | |
2642 | bytes--; | |
2643 | frag->fr_fix += 1; | |
2644 | } | |
2645 | ||
2646 | if (target_big_endian) | |
2647 | { | |
2648 | memcpy (p, big_nop_pattern, sizeof big_nop_pattern); | |
2649 | frag->fr_var = sizeof big_nop_pattern; | |
2650 | } | |
2651 | else | |
2652 | { | |
2653 | memcpy (p, little_nop_pattern, sizeof little_nop_pattern); | |
2654 | frag->fr_var = sizeof little_nop_pattern; | |
2655 | } | |
2656 | } | |
2657 | else if (frag->fr_type == rs_align_test) | |
2658 | { | |
2659 | if (bytes != 0) | |
2660 | as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data")); | |
2661 | } | |
2662 | ||
252b5132 | 2663 | if (sh_relax |
0a9ef439 RH |
2664 | && (frag->fr_type == rs_align |
2665 | || frag->fr_type == rs_align_code) | |
252b5132 RH |
2666 | && frag->fr_address + frag->fr_fix > 0 |
2667 | && frag->fr_offset > 1 | |
2668 | && now_seg != bss_section) | |
2669 | fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, | |
2670 | BFD_RELOC_SH_ALIGN); | |
252b5132 RH |
2671 | } |
2672 | ||
2673 | /* This macro decides whether a particular reloc is an entry in a | |
2674 | switch table. It is used when relaxing, because the linker needs | |
2675 | to know about all such entries so that it can adjust them if | |
2676 | necessary. */ | |
2677 | ||
2678 | #ifdef BFD_ASSEMBLER | |
2679 | #define SWITCH_TABLE_CONS(fix) (0) | |
2680 | #else | |
2681 | #define SWITCH_TABLE_CONS(fix) \ | |
2682 | ((fix)->fx_r_type == 0 \ | |
2683 | && ((fix)->fx_size == 2 \ | |
2684 | || (fix)->fx_size == 1 \ | |
2685 | || (fix)->fx_size == 4)) | |
2686 | #endif | |
2687 | ||
2688 | #define SWITCH_TABLE(fix) \ | |
2689 | ((fix)->fx_addsy != NULL \ | |
2690 | && (fix)->fx_subsy != NULL \ | |
2691 | && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \ | |
2692 | && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \ | |
2693 | && ((fix)->fx_r_type == BFD_RELOC_32 \ | |
2694 | || (fix)->fx_r_type == BFD_RELOC_16 \ | |
2695 | || (fix)->fx_r_type == BFD_RELOC_8 \ | |
2696 | || SWITCH_TABLE_CONS (fix))) | |
2697 | ||
2698 | /* See whether we need to force a relocation into the output file. | |
2699 | This is used to force out switch and PC relative relocations when | |
2700 | relaxing. */ | |
2701 | ||
2702 | int | |
2703 | sh_force_relocation (fix) | |
2704 | fixS *fix; | |
2705 | { | |
2706 | ||
2707 | if (fix->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
015551fc JR |
2708 | || fix->fx_r_type == BFD_RELOC_VTABLE_ENTRY |
2709 | || fix->fx_r_type == BFD_RELOC_SH_LOOP_START | |
2710 | || fix->fx_r_type == BFD_RELOC_SH_LOOP_END) | |
252b5132 RH |
2711 | return 1; |
2712 | ||
2713 | if (! sh_relax) | |
2714 | return 0; | |
2715 | ||
2716 | return (fix->fx_pcrel | |
2717 | || SWITCH_TABLE (fix) | |
2718 | || fix->fx_r_type == BFD_RELOC_SH_COUNT | |
2719 | || fix->fx_r_type == BFD_RELOC_SH_ALIGN | |
2720 | || fix->fx_r_type == BFD_RELOC_SH_CODE | |
2721 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
2722 | || fix->fx_r_type == BFD_RELOC_SH_LABEL); | |
2723 | } | |
2724 | ||
2725 | #ifdef OBJ_ELF | |
2726 | boolean | |
2727 | sh_fix_adjustable (fixP) | |
2728 | fixS *fixP; | |
2729 | { | |
2730 | ||
2731 | if (fixP->fx_addsy == NULL) | |
2732 | return 1; | |
c4aa876b | 2733 | |
a1cc9221 AO |
2734 | if (fixP->fx_r_type == BFD_RELOC_SH_PCDISP8BY2 |
2735 | || fixP->fx_r_type == BFD_RELOC_SH_PCDISP12BY2 | |
2736 | || fixP->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2 | |
2737 | || fixP->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4 | |
2738 | || fixP->fx_r_type == BFD_RELOC_8_PCREL | |
2739 | || fixP->fx_r_type == BFD_RELOC_SH_SWITCH16 | |
2740 | || fixP->fx_r_type == BFD_RELOC_SH_SWITCH32) | |
2741 | return 1; | |
2742 | ||
2743 | if (! TC_RELOC_RTSYM_LOC_FIXUP (fixP) | |
2744 | || fixP->fx_r_type == BFD_RELOC_32_GOTOFF | |
2745 | || fixP->fx_r_type == BFD_RELOC_RVA) | |
2746 | return 0; | |
2747 | ||
252b5132 RH |
2748 | /* We need the symbol name for the VTABLE entries */ |
2749 | if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
2750 | || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
2751 | return 0; | |
2752 | ||
2753 | return 1; | |
2754 | } | |
d4845d57 | 2755 | |
6b31947e NC |
2756 | void |
2757 | sh_elf_final_processing () | |
d4845d57 JR |
2758 | { |
2759 | int val; | |
2760 | ||
2761 | /* Set file-specific flags to indicate if this code needs | |
2762 | a processor with the sh-dsp / sh3e ISA to execute. */ | |
2763 | if (valid_arch & arch_sh1) | |
2764 | val = EF_SH1; | |
2765 | else if (valid_arch & arch_sh2) | |
2766 | val = EF_SH2; | |
2767 | else if (valid_arch & arch_sh_dsp) | |
2768 | val = EF_SH_DSP; | |
2769 | else if (valid_arch & arch_sh3) | |
2770 | val = EF_SH3; | |
2771 | else if (valid_arch & arch_sh3_dsp) | |
2772 | val = EF_SH_DSP; | |
2773 | else if (valid_arch & arch_sh3e) | |
2774 | val = EF_SH3E; | |
2775 | else if (valid_arch & arch_sh4) | |
2776 | val = EF_SH4; | |
2777 | else | |
2778 | abort (); | |
2779 | ||
2780 | elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; | |
2781 | elf_elfheader (stdoutput)->e_flags |= val; | |
2782 | } | |
252b5132 RH |
2783 | #endif |
2784 | ||
2785 | /* Apply a fixup to the object file. */ | |
2786 | ||
252b5132 | 2787 | void |
94f592af NC |
2788 | md_apply_fix3 (fixP, valP, seg) |
2789 | fixS * fixP; | |
2790 | valueT * valP; | |
2791 | segT seg ATTRIBUTE_UNUSED; | |
252b5132 RH |
2792 | { |
2793 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; | |
2794 | int lowbyte = target_big_endian ? 1 : 0; | |
2795 | int highbyte = target_big_endian ? 0 : 1; | |
94f592af | 2796 | long val = * (long *) valP; |
252b5132 RH |
2797 | long max, min; |
2798 | int shift; | |
2799 | ||
2800 | #ifdef BFD_ASSEMBLER | |
a1cc9221 AO |
2801 | /* A difference between two symbols, the second of which is in the |
2802 | current section, is transformed in a PC-relative relocation to | |
2803 | the other symbol. We have to adjust the relocation type here. */ | |
2804 | if (fixP->fx_pcrel) | |
2805 | { | |
2806 | switch (fixP->fx_r_type) | |
2807 | { | |
2808 | default: | |
2809 | break; | |
2810 | ||
2811 | case BFD_RELOC_32: | |
2812 | fixP->fx_r_type = BFD_RELOC_32_PCREL; | |
2813 | break; | |
2814 | ||
2815 | /* Currently, we only support 32-bit PCREL relocations. | |
2816 | We'd need a new reloc type to handle 16_PCREL, and | |
2817 | 8_PCREL is already taken for R_SH_SWITCH8, which | |
2818 | apparently does something completely different than what | |
2819 | we need. FIXME. */ | |
2820 | case BFD_RELOC_16: | |
2821 | bfd_set_error (bfd_error_bad_value); | |
94f592af | 2822 | return; |
81d4177b | 2823 | |
a1cc9221 AO |
2824 | case BFD_RELOC_8: |
2825 | bfd_set_error (bfd_error_bad_value); | |
94f592af | 2826 | return; |
a1cc9221 AO |
2827 | } |
2828 | } | |
2829 | ||
6b31947e NC |
2830 | /* The function adjust_reloc_syms won't convert a reloc against a weak |
2831 | symbol into a reloc against a section, but bfd_install_relocation | |
2832 | will screw up if the symbol is defined, so we have to adjust val here | |
1308f14c HPN |
2833 | to avoid the screw up later. |
2834 | ||
2835 | For ordinary relocs, this does not happen for ELF, since for ELF, | |
2836 | bfd_install_relocation uses the "special function" field of the | |
2837 | howto, and does not execute the code that needs to be undone, as long | |
2838 | as the special function does not return bfd_reloc_continue. | |
2839 | It can happen for GOT- and PLT-type relocs the way they are | |
2840 | described in elf32-sh.c as they use bfd_elf_generic_reloc, but it | |
2841 | doesn't matter here since those relocs don't use VAL; see below. */ | |
2842 | if (OUTPUT_FLAVOR != bfd_target_elf_flavour | |
2843 | && fixP->fx_addsy != NULL | |
252b5132 RH |
2844 | && S_IS_WEAK (fixP->fx_addsy)) |
2845 | val -= S_GET_VALUE (fixP->fx_addsy); | |
2846 | #endif | |
2847 | ||
2848 | #ifndef BFD_ASSEMBLER | |
2849 | if (fixP->fx_r_type == 0) | |
2850 | { | |
2851 | if (fixP->fx_size == 2) | |
2852 | fixP->fx_r_type = BFD_RELOC_16; | |
2853 | else if (fixP->fx_size == 4) | |
2854 | fixP->fx_r_type = BFD_RELOC_32; | |
2855 | else if (fixP->fx_size == 1) | |
2856 | fixP->fx_r_type = BFD_RELOC_8; | |
2857 | else | |
2858 | abort (); | |
2859 | } | |
2860 | #endif | |
2861 | ||
2862 | max = min = 0; | |
2863 | shift = 0; | |
2864 | switch (fixP->fx_r_type) | |
2865 | { | |
2866 | case BFD_RELOC_SH_IMM4: | |
2867 | max = 0xf; | |
2868 | *buf = (*buf & 0xf0) | (val & 0xf); | |
2869 | break; | |
2870 | ||
2871 | case BFD_RELOC_SH_IMM4BY2: | |
2872 | max = 0xf; | |
2873 | shift = 1; | |
2874 | *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); | |
2875 | break; | |
2876 | ||
2877 | case BFD_RELOC_SH_IMM4BY4: | |
2878 | max = 0xf; | |
2879 | shift = 2; | |
2880 | *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); | |
2881 | break; | |
2882 | ||
2883 | case BFD_RELOC_SH_IMM8BY2: | |
2884 | max = 0xff; | |
2885 | shift = 1; | |
2886 | *buf = val >> 1; | |
2887 | break; | |
2888 | ||
2889 | case BFD_RELOC_SH_IMM8BY4: | |
2890 | max = 0xff; | |
2891 | shift = 2; | |
2892 | *buf = val >> 2; | |
2893 | break; | |
2894 | ||
2895 | case BFD_RELOC_8: | |
2896 | case BFD_RELOC_SH_IMM8: | |
2897 | /* Sometimes the 8 bit value is sign extended (e.g., add) and | |
2898 | sometimes it is not (e.g., and). We permit any 8 bit value. | |
2899 | Note that adding further restrictions may invalidate | |
2900 | reasonable looking assembly code, such as ``and -0x1,r0''. */ | |
2901 | max = 0xff; | |
c4aa876b | 2902 | min = -0xff; |
252b5132 RH |
2903 | *buf++ = val; |
2904 | break; | |
2905 | ||
2906 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
2907 | /* The lower two bits of the PC are cleared before the | |
2908 | displacement is added in. We can assume that the destination | |
2909 | is on a 4 byte bounday. If this instruction is also on a 4 | |
2910 | byte boundary, then we want | |
2911 | (target - here) / 4 | |
2912 | and target - here is a multiple of 4. | |
2913 | Otherwise, we are on a 2 byte boundary, and we want | |
2914 | (target - (here - 2)) / 4 | |
2915 | and target - here is not a multiple of 4. Computing | |
2916 | (target - (here - 2)) / 4 == (target - here + 2) / 4 | |
2917 | works for both cases, since in the first case the addition of | |
2918 | 2 will be removed by the division. target - here is in the | |
2919 | variable val. */ | |
2920 | val = (val + 2) / 4; | |
2921 | if (val & ~0xff) | |
2922 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2923 | buf[lowbyte] = val; | |
2924 | break; | |
2925 | ||
2926 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
2927 | val /= 2; | |
2928 | if (val & ~0xff) | |
2929 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2930 | buf[lowbyte] = val; | |
2931 | break; | |
2932 | ||
2933 | case BFD_RELOC_SH_PCDISP8BY2: | |
2934 | val /= 2; | |
2935 | if (val < -0x80 || val > 0x7f) | |
2936 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2937 | buf[lowbyte] = val; | |
2938 | break; | |
2939 | ||
2940 | case BFD_RELOC_SH_PCDISP12BY2: | |
2941 | val /= 2; | |
8637c045 | 2942 | if (val < -0x800 || val > 0x7ff) |
252b5132 RH |
2943 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); |
2944 | buf[lowbyte] = val & 0xff; | |
2945 | buf[highbyte] |= (val >> 8) & 0xf; | |
2946 | break; | |
2947 | ||
2948 | case BFD_RELOC_32: | |
a1cc9221 | 2949 | case BFD_RELOC_32_PCREL: |
1db77c8e | 2950 | md_number_to_chars (buf, val, 4); |
252b5132 RH |
2951 | break; |
2952 | ||
2953 | case BFD_RELOC_16: | |
1db77c8e | 2954 | md_number_to_chars (buf, val, 2); |
252b5132 RH |
2955 | break; |
2956 | ||
2957 | case BFD_RELOC_SH_USES: | |
2958 | /* Pass the value into sh_coff_reloc_mangle. */ | |
2959 | fixP->fx_addnumber = val; | |
2960 | break; | |
2961 | ||
2962 | case BFD_RELOC_SH_COUNT: | |
2963 | case BFD_RELOC_SH_ALIGN: | |
2964 | case BFD_RELOC_SH_CODE: | |
2965 | case BFD_RELOC_SH_DATA: | |
2966 | case BFD_RELOC_SH_LABEL: | |
2967 | /* Nothing to do here. */ | |
2968 | break; | |
2969 | ||
015551fc JR |
2970 | case BFD_RELOC_SH_LOOP_START: |
2971 | case BFD_RELOC_SH_LOOP_END: | |
2972 | ||
252b5132 RH |
2973 | case BFD_RELOC_VTABLE_INHERIT: |
2974 | case BFD_RELOC_VTABLE_ENTRY: | |
2975 | fixP->fx_done = 0; | |
2976 | return; | |
2977 | ||
a1cc9221 AO |
2978 | #ifdef OBJ_ELF |
2979 | case BFD_RELOC_32_PLT_PCREL: | |
2980 | /* Make the jump instruction point to the address of the operand. At | |
81d4177b | 2981 | runtime we merely add the offset to the actual PLT entry. */ |
94f592af | 2982 | * valP = 0xfffffffc; |
a1cc9221 AO |
2983 | break; |
2984 | ||
2985 | case BFD_RELOC_SH_GOTPC: | |
2986 | /* This is tough to explain. We end up with this one if we have | |
2987 | operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". | |
2988 | The goal here is to obtain the absolute address of the GOT, | |
2989 | and it is strongly preferable from a performance point of | |
2990 | view to avoid using a runtime relocation for this. There are | |
2991 | cases where you have something like: | |
81d4177b | 2992 | |
a1cc9221 | 2993 | .long _GLOBAL_OFFSET_TABLE_+[.-.L66] |
81d4177b | 2994 | |
a1cc9221 AO |
2995 | and here no correction would be required. Internally in the |
2996 | assembler we treat operands of this form as not being pcrel | |
2997 | since the '.' is explicitly mentioned, and I wonder whether | |
2998 | it would simplify matters to do it this way. Who knows. In | |
2999 | earlier versions of the PIC patches, the pcrel_adjust field | |
3000 | was used to store the correction, but since the expression is | |
3001 | not pcrel, I felt it would be confusing to do it this way. */ | |
94f592af | 3002 | * valP -= 1; |
a1cc9221 AO |
3003 | md_number_to_chars (buf, val, 4); |
3004 | break; | |
3005 | ||
3006 | case BFD_RELOC_32_GOT_PCREL: | |
94f592af | 3007 | * valP = 0; /* Fully resolved at runtime. No addend. */ |
a1cc9221 AO |
3008 | md_number_to_chars (buf, 0, 4); |
3009 | break; | |
3010 | ||
3011 | case BFD_RELOC_32_GOTOFF: | |
3012 | break; | |
3013 | #endif | |
3014 | ||
252b5132 RH |
3015 | default: |
3016 | abort (); | |
3017 | } | |
3018 | ||
3019 | if (shift != 0) | |
3020 | { | |
3021 | if ((val & ((1 << shift) - 1)) != 0) | |
3022 | as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); | |
3023 | if (val >= 0) | |
3024 | val >>= shift; | |
3025 | else | |
3026 | val = ((val >> shift) | |
3027 | | ((long) -1 & ~ ((long) -1 >> shift))); | |
3028 | } | |
3029 | if (max != 0 && (val < min || val > max)) | |
3030 | as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); | |
3031 | ||
94f592af NC |
3032 | if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) |
3033 | fixP->fx_done = 1; | |
252b5132 RH |
3034 | } |
3035 | ||
3036 | /* Called just before address relaxation. Return the length | |
3037 | by which a fragment must grow to reach it's destination. */ | |
3038 | ||
3039 | int | |
3040 | md_estimate_size_before_relax (fragP, segment_type) | |
3041 | register fragS *fragP; | |
3042 | register segT segment_type; | |
3043 | { | |
e66457fb AM |
3044 | int what; |
3045 | ||
252b5132 RH |
3046 | switch (fragP->fr_subtype) |
3047 | { | |
93c2a809 AM |
3048 | default: |
3049 | abort (); | |
3050 | ||
252b5132 | 3051 | case C (UNCOND_JUMP, UNDEF_DISP): |
6b31947e | 3052 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
3053 | if (!fragP->fr_symbol) |
3054 | { | |
3055 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
252b5132 RH |
3056 | } |
3057 | else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
3058 | { | |
3059 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
252b5132 RH |
3060 | } |
3061 | else | |
3062 | { | |
3063 | fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); | |
252b5132 RH |
3064 | } |
3065 | break; | |
3066 | ||
252b5132 RH |
3067 | case C (COND_JUMP, UNDEF_DISP): |
3068 | case C (COND_JUMP_DELAY, UNDEF_DISP): | |
e66457fb | 3069 | what = GET_WHAT (fragP->fr_subtype); |
6b31947e | 3070 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
3071 | if (fragP->fr_symbol |
3072 | && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
3073 | { | |
252b5132 | 3074 | /* Got a symbol and it's defined in this segment, become byte |
6b31947e | 3075 | sized - maybe it will fix up. */ |
252b5132 | 3076 | fragP->fr_subtype = C (what, COND8); |
252b5132 RH |
3077 | } |
3078 | else if (fragP->fr_symbol) | |
3079 | { | |
6b31947e | 3080 | /* Its got a segment, but its not ours, so it will always be long. */ |
252b5132 | 3081 | fragP->fr_subtype = C (what, UNDEF_WORD_DISP); |
252b5132 RH |
3082 | } |
3083 | else | |
3084 | { | |
6b31947e | 3085 | /* We know the abs value. */ |
252b5132 | 3086 | fragP->fr_subtype = C (what, COND8); |
252b5132 | 3087 | } |
93c2a809 | 3088 | break; |
252b5132 | 3089 | |
93c2a809 | 3090 | case C (UNCOND_JUMP, UNCOND12): |
e66457fb | 3091 | case C (UNCOND_JUMP, UNCOND32): |
93c2a809 AM |
3092 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): |
3093 | case C (COND_JUMP, COND8): | |
e66457fb AM |
3094 | case C (COND_JUMP, COND12): |
3095 | case C (COND_JUMP, COND32): | |
93c2a809 AM |
3096 | case C (COND_JUMP, UNDEF_WORD_DISP): |
3097 | case C (COND_JUMP_DELAY, COND8): | |
e66457fb AM |
3098 | case C (COND_JUMP_DELAY, COND12): |
3099 | case C (COND_JUMP_DELAY, COND32): | |
93c2a809 AM |
3100 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): |
3101 | /* When relaxing a section for the second time, we don't need to | |
e66457fb | 3102 | do anything besides return the current size. */ |
252b5132 RH |
3103 | break; |
3104 | } | |
e66457fb AM |
3105 | |
3106 | fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length; | |
252b5132 RH |
3107 | return fragP->fr_var; |
3108 | } | |
3109 | ||
6b31947e | 3110 | /* Put number into target byte order. */ |
252b5132 RH |
3111 | |
3112 | void | |
3113 | md_number_to_chars (ptr, use, nbytes) | |
3114 | char *ptr; | |
3115 | valueT use; | |
3116 | int nbytes; | |
3117 | { | |
3118 | if (! target_big_endian) | |
3119 | number_to_chars_littleendian (ptr, use, nbytes); | |
3120 | else | |
3121 | number_to_chars_bigendian (ptr, use, nbytes); | |
3122 | } | |
3123 | ||
3124 | long | |
ef17112f | 3125 | md_pcrel_from_section (fixP, sec) |
252b5132 | 3126 | fixS *fixP; |
ef17112f | 3127 | segT sec; |
252b5132 | 3128 | { |
ef17112f HPN |
3129 | if (fixP->fx_addsy != (symbolS *) NULL |
3130 | && (! S_IS_DEFINED (fixP->fx_addsy) | |
3131 | || S_IS_EXTERN (fixP->fx_addsy) | |
3132 | || S_IS_WEAK (fixP->fx_addsy) | |
3133 | || S_GET_SEGMENT (fixP->fx_addsy) != sec)) | |
3134 | { | |
3135 | /* The symbol is undefined (or is defined but not in this section, | |
3136 | or we're not sure about it being the final definition). Let the | |
3137 | linker figure it out. We need to adjust the subtraction of a | |
3138 | symbol to the position of the relocated data, though. */ | |
3139 | return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0; | |
3140 | } | |
3141 | ||
252b5132 RH |
3142 | return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; |
3143 | } | |
3144 | ||
3145 | #ifdef OBJ_COFF | |
3146 | ||
3147 | int | |
3148 | tc_coff_sizemachdep (frag) | |
3149 | fragS *frag; | |
3150 | { | |
3151 | return md_relax_table[frag->fr_subtype].rlx_length; | |
3152 | } | |
3153 | ||
3154 | #endif /* OBJ_COFF */ | |
3155 | ||
252b5132 RH |
3156 | #ifndef BFD_ASSEMBLER |
3157 | #ifdef OBJ_COFF | |
3158 | ||
3159 | /* Map BFD relocs to SH COFF relocs. */ | |
3160 | ||
3161 | struct reloc_map | |
3162 | { | |
3163 | bfd_reloc_code_real_type bfd_reloc; | |
3164 | int sh_reloc; | |
3165 | }; | |
3166 | ||
3167 | static const struct reloc_map coff_reloc_map[] = | |
3168 | { | |
3169 | { BFD_RELOC_32, R_SH_IMM32 }, | |
3170 | { BFD_RELOC_16, R_SH_IMM16 }, | |
3171 | { BFD_RELOC_8, R_SH_IMM8 }, | |
3172 | { BFD_RELOC_SH_PCDISP8BY2, R_SH_PCDISP8BY2 }, | |
3173 | { BFD_RELOC_SH_PCDISP12BY2, R_SH_PCDISP }, | |
3174 | { BFD_RELOC_SH_IMM4, R_SH_IMM4 }, | |
3175 | { BFD_RELOC_SH_IMM4BY2, R_SH_IMM4BY2 }, | |
3176 | { BFD_RELOC_SH_IMM4BY4, R_SH_IMM4BY4 }, | |
3177 | { BFD_RELOC_SH_IMM8, R_SH_IMM8 }, | |
3178 | { BFD_RELOC_SH_IMM8BY2, R_SH_IMM8BY2 }, | |
3179 | { BFD_RELOC_SH_IMM8BY4, R_SH_IMM8BY4 }, | |
3180 | { BFD_RELOC_SH_PCRELIMM8BY2, R_SH_PCRELIMM8BY2 }, | |
3181 | { BFD_RELOC_SH_PCRELIMM8BY4, R_SH_PCRELIMM8BY4 }, | |
3182 | { BFD_RELOC_8_PCREL, R_SH_SWITCH8 }, | |
3183 | { BFD_RELOC_SH_SWITCH16, R_SH_SWITCH16 }, | |
3184 | { BFD_RELOC_SH_SWITCH32, R_SH_SWITCH32 }, | |
3185 | { BFD_RELOC_SH_USES, R_SH_USES }, | |
3186 | { BFD_RELOC_SH_COUNT, R_SH_COUNT }, | |
3187 | { BFD_RELOC_SH_ALIGN, R_SH_ALIGN }, | |
3188 | { BFD_RELOC_SH_CODE, R_SH_CODE }, | |
3189 | { BFD_RELOC_SH_DATA, R_SH_DATA }, | |
3190 | { BFD_RELOC_SH_LABEL, R_SH_LABEL }, | |
3191 | { BFD_RELOC_UNUSED, 0 } | |
3192 | }; | |
3193 | ||
3194 | /* Adjust a reloc for the SH. This is similar to the generic code, | |
3195 | but does some minor tweaking. */ | |
3196 | ||
3197 | void | |
3198 | sh_coff_reloc_mangle (seg, fix, intr, paddr) | |
3199 | segment_info_type *seg; | |
3200 | fixS *fix; | |
3201 | struct internal_reloc *intr; | |
3202 | unsigned int paddr; | |
3203 | { | |
3204 | symbolS *symbol_ptr = fix->fx_addsy; | |
3205 | symbolS *dot; | |
3206 | ||
3207 | intr->r_vaddr = paddr + fix->fx_frag->fr_address + fix->fx_where; | |
3208 | ||
3209 | if (! SWITCH_TABLE (fix)) | |
3210 | { | |
3211 | const struct reloc_map *rm; | |
3212 | ||
3213 | for (rm = coff_reloc_map; rm->bfd_reloc != BFD_RELOC_UNUSED; rm++) | |
3214 | if (rm->bfd_reloc == (bfd_reloc_code_real_type) fix->fx_r_type) | |
3215 | break; | |
3216 | if (rm->bfd_reloc == BFD_RELOC_UNUSED) | |
3217 | as_bad_where (fix->fx_file, fix->fx_line, | |
3218 | _("Can not represent %s relocation in this object file format"), | |
3219 | bfd_get_reloc_code_name (fix->fx_r_type)); | |
3220 | intr->r_type = rm->sh_reloc; | |
3221 | intr->r_offset = 0; | |
3222 | } | |
3223 | else | |
3224 | { | |
3225 | know (sh_relax); | |
3226 | ||
3227 | if (fix->fx_r_type == BFD_RELOC_16) | |
3228 | intr->r_type = R_SH_SWITCH16; | |
3229 | else if (fix->fx_r_type == BFD_RELOC_8) | |
3230 | intr->r_type = R_SH_SWITCH8; | |
3231 | else if (fix->fx_r_type == BFD_RELOC_32) | |
3232 | intr->r_type = R_SH_SWITCH32; | |
3233 | else | |
3234 | abort (); | |
3235 | ||
3236 | /* For a switch reloc, we set r_offset to the difference between | |
3237 | the reloc address and the subtrahend. When the linker is | |
3238 | doing relaxing, it can use the determine the starting and | |
3239 | ending points of the switch difference expression. */ | |
3240 | intr->r_offset = intr->r_vaddr - S_GET_VALUE (fix->fx_subsy); | |
3241 | } | |
3242 | ||
3243 | /* PC relative relocs are always against the current section. */ | |
3244 | if (symbol_ptr == NULL) | |
3245 | { | |
3246 | switch (fix->fx_r_type) | |
3247 | { | |
3248 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
3249 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
3250 | case BFD_RELOC_SH_PCDISP8BY2: | |
3251 | case BFD_RELOC_SH_PCDISP12BY2: | |
3252 | case BFD_RELOC_SH_USES: | |
3253 | symbol_ptr = seg->dot; | |
3254 | break; | |
3255 | default: | |
3256 | break; | |
3257 | } | |
3258 | } | |
3259 | ||
3260 | if (fix->fx_r_type == BFD_RELOC_SH_USES) | |
3261 | { | |
3262 | /* We can't store the offset in the object file, since this | |
3263 | reloc does not take up any space, so we store it in r_offset. | |
94f592af | 3264 | The fx_addnumber field was set in md_apply_fix3. */ |
252b5132 RH |
3265 | intr->r_offset = fix->fx_addnumber; |
3266 | } | |
3267 | else if (fix->fx_r_type == BFD_RELOC_SH_COUNT) | |
3268 | { | |
3269 | /* We can't store the count in the object file, since this reloc | |
3270 | does not take up any space, so we store it in r_offset. The | |
3271 | fx_offset field was set when the fixup was created in | |
3272 | sh_coff_frob_file. */ | |
3273 | intr->r_offset = fix->fx_offset; | |
3274 | /* This reloc is always absolute. */ | |
3275 | symbol_ptr = NULL; | |
3276 | } | |
3277 | else if (fix->fx_r_type == BFD_RELOC_SH_ALIGN) | |
3278 | { | |
3279 | /* Store the alignment in the r_offset field. */ | |
3280 | intr->r_offset = fix->fx_offset; | |
3281 | /* This reloc is always absolute. */ | |
3282 | symbol_ptr = NULL; | |
3283 | } | |
3284 | else if (fix->fx_r_type == BFD_RELOC_SH_CODE | |
3285 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
3286 | || fix->fx_r_type == BFD_RELOC_SH_LABEL) | |
3287 | { | |
3288 | /* These relocs are always absolute. */ | |
3289 | symbol_ptr = NULL; | |
3290 | } | |
3291 | ||
3292 | /* Turn the segment of the symbol into an offset. */ | |
3293 | if (symbol_ptr != NULL) | |
3294 | { | |
3295 | dot = segment_info[S_GET_SEGMENT (symbol_ptr)].dot; | |
3296 | if (dot != NULL) | |
3297 | intr->r_symndx = dot->sy_number; | |
3298 | else | |
3299 | intr->r_symndx = symbol_ptr->sy_number; | |
3300 | } | |
3301 | else | |
3302 | intr->r_symndx = -1; | |
3303 | } | |
3304 | ||
3305 | #endif /* OBJ_COFF */ | |
3306 | #endif /* ! BFD_ASSEMBLER */ | |
3307 | ||
3308 | #ifdef BFD_ASSEMBLER | |
3309 | ||
3310 | /* Create a reloc. */ | |
3311 | ||
3312 | arelent * | |
3313 | tc_gen_reloc (section, fixp) | |
43841e91 | 3314 | asection *section ATTRIBUTE_UNUSED; |
252b5132 RH |
3315 | fixS *fixp; |
3316 | { | |
3317 | arelent *rel; | |
3318 | bfd_reloc_code_real_type r_type; | |
3319 | ||
3320 | rel = (arelent *) xmalloc (sizeof (arelent)); | |
49309057 ILT |
3321 | rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
3322 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
252b5132 RH |
3323 | rel->address = fixp->fx_frag->fr_address + fixp->fx_where; |
3324 | ||
3325 | r_type = fixp->fx_r_type; | |
3326 | ||
3327 | if (SWITCH_TABLE (fixp)) | |
3328 | { | |
3329 | rel->addend = rel->address - S_GET_VALUE (fixp->fx_subsy); | |
3330 | if (r_type == BFD_RELOC_16) | |
3331 | r_type = BFD_RELOC_SH_SWITCH16; | |
3332 | else if (r_type == BFD_RELOC_8) | |
3333 | r_type = BFD_RELOC_8_PCREL; | |
3334 | else if (r_type == BFD_RELOC_32) | |
3335 | r_type = BFD_RELOC_SH_SWITCH32; | |
3336 | else | |
3337 | abort (); | |
3338 | } | |
3339 | else if (r_type == BFD_RELOC_SH_USES) | |
3340 | rel->addend = fixp->fx_addnumber; | |
3341 | else if (r_type == BFD_RELOC_SH_COUNT) | |
3342 | rel->addend = fixp->fx_offset; | |
3343 | else if (r_type == BFD_RELOC_SH_ALIGN) | |
3344 | rel->addend = fixp->fx_offset; | |
3345 | else if (r_type == BFD_RELOC_VTABLE_INHERIT | |
3346 | || r_type == BFD_RELOC_VTABLE_ENTRY) | |
3347 | rel->addend = fixp->fx_offset; | |
015551fc JR |
3348 | else if (r_type == BFD_RELOC_SH_LOOP_START |
3349 | || r_type == BFD_RELOC_SH_LOOP_END) | |
3350 | rel->addend = fixp->fx_offset; | |
3351 | else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel) | |
3352 | { | |
3353 | rel->addend = 0; | |
3354 | rel->address = rel->addend = fixp->fx_offset; | |
3355 | } | |
252b5132 RH |
3356 | else if (fixp->fx_pcrel) |
3357 | rel->addend = fixp->fx_addnumber; | |
a1cc9221 AO |
3358 | else if (r_type == BFD_RELOC_32 || r_type == BFD_RELOC_32_GOTOFF) |
3359 | rel->addend = fixp->fx_addnumber; | |
252b5132 RH |
3360 | else |
3361 | rel->addend = 0; | |
3362 | ||
3363 | rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); | |
3364 | if (rel->howto == NULL) | |
3365 | { | |
3366 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
3367 | _("Cannot represent relocation type %s"), | |
3368 | bfd_get_reloc_code_name (r_type)); | |
3369 | /* Set howto to a garbage value so that we can keep going. */ | |
3370 | rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); | |
3371 | assert (rel->howto != NULL); | |
3372 | } | |
3373 | ||
3374 | return rel; | |
3375 | } | |
3376 | ||
3377 | #endif /* BFD_ASSEMBLER */ |