Commit | Line | Data |
---|---|---|
ef230218 | 1 | /* tc-sh.c -- Assemble code for the Renesas / SuperH SH |
4aa3e325 | 2 | Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, |
ebd1c875 | 3 | 2003, 2004, 2005, 2006 Free Software Foundation, Inc. |
252b5132 RH |
4 | |
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to | |
4b4da160 NC |
19 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
20 | Boston, MA 02110-1301, USA. */ | |
252b5132 | 21 | |
6b31947e | 22 | /* Written By Steve Chamberlain <sac@cygnus.com> */ |
252b5132 | 23 | |
252b5132 | 24 | #include "as.h" |
252b5132 RH |
25 | #include "subsegs.h" |
26 | #define DEFINE_TABLE | |
27 | #include "opcodes/sh-opc.h" | |
3882b010 | 28 | #include "safe-ctype.h" |
43841e91 | 29 | #include "struc-symbol.h" |
d4845d57 JR |
30 | |
31 | #ifdef OBJ_ELF | |
32 | #include "elf/sh.h" | |
33 | #endif | |
34 | ||
0d10e182 | 35 | #include "dwarf2dbg.h" |
2ce4cc60 | 36 | #include "dw2gencfi.h" |
0d10e182 | 37 | |
e08ae979 HPN |
38 | typedef struct |
39 | { | |
40 | sh_arg_type type; | |
41 | int reg; | |
42 | expressionS immediate; | |
43 | } | |
44 | sh_operand_info; | |
45 | ||
252b5132 RH |
46 | const char comment_chars[] = "!"; |
47 | const char line_separator_chars[] = ";"; | |
48 | const char line_comment_chars[] = "!#"; | |
49 | ||
8edc77b9 KK |
50 | static void s_uses (int); |
51 | static void s_uacons (int); | |
252b5132 | 52 | |
a1cc9221 | 53 | #ifdef OBJ_ELF |
8edc77b9 | 54 | static void sh_elf_cons (int); |
538cd60f | 55 | |
a1cc9221 AO |
56 | symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ |
57 | #endif | |
58 | ||
05982cac | 59 | static void |
8edc77b9 | 60 | big (int ignore ATTRIBUTE_UNUSED) |
05982cac HPN |
61 | { |
62 | if (! target_big_endian) | |
63 | as_bad (_("directive .big encountered when option -big required")); | |
64 | ||
65 | /* Stop further messages. */ | |
66 | target_big_endian = 1; | |
67 | } | |
252b5132 RH |
68 | |
69 | static void | |
8edc77b9 | 70 | little (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 71 | { |
05982cac HPN |
72 | if (target_big_endian) |
73 | as_bad (_("directive .little encountered when option -little required")); | |
74 | ||
75 | /* Stop further messages. */ | |
252b5132 RH |
76 | target_big_endian = 0; |
77 | } | |
78 | ||
d4845d57 JR |
79 | /* This table describes all the machine specific pseudo-ops the assembler |
80 | has to support. The fields are: | |
81 | pseudo-op name without dot | |
82 | function to call to execute this pseudo-op | |
6b31947e | 83 | Integer arg to pass to the function. */ |
d4845d57 | 84 | |
252b5132 RH |
85 | const pseudo_typeS md_pseudo_table[] = |
86 | { | |
a1cc9221 AO |
87 | #ifdef OBJ_ELF |
88 | {"long", sh_elf_cons, 4}, | |
89 | {"int", sh_elf_cons, 4}, | |
90 | {"word", sh_elf_cons, 2}, | |
91 | {"short", sh_elf_cons, 2}, | |
92 | #else | |
252b5132 RH |
93 | {"int", cons, 4}, |
94 | {"word", cons, 2}, | |
a1cc9221 | 95 | #endif /* OBJ_ELF */ |
05982cac | 96 | {"big", big, 0}, |
252b5132 RH |
97 | {"form", listing_psize, 0}, |
98 | {"little", little, 0}, | |
99 | {"heading", listing_title, 0}, | |
100 | {"import", s_ignore, 0}, | |
101 | {"page", listing_eject, 0}, | |
102 | {"program", s_ignore, 0}, | |
103 | {"uses", s_uses, 0}, | |
104 | {"uaword", s_uacons, 2}, | |
105 | {"ualong", s_uacons, 4}, | |
de68de20 AO |
106 | {"uaquad", s_uacons, 8}, |
107 | {"2byte", s_uacons, 2}, | |
108 | {"4byte", s_uacons, 4}, | |
109 | {"8byte", s_uacons, 8}, | |
324bfcf3 AO |
110 | #ifdef HAVE_SH64 |
111 | {"mode", s_sh64_mode, 0 }, | |
112 | ||
113 | /* Have the old name too. */ | |
114 | {"isa", s_sh64_mode, 0 }, | |
115 | ||
116 | /* Assert that the right ABI is used. */ | |
117 | {"abi", s_sh64_abi, 0 }, | |
118 | ||
119 | { "vtable_inherit", sh64_vtable_inherit, 0 }, | |
120 | { "vtable_entry", sh64_vtable_entry, 0 }, | |
121 | #endif /* HAVE_SH64 */ | |
252b5132 RH |
122 | {0, 0, 0} |
123 | }; | |
124 | ||
252b5132 RH |
125 | int sh_relax; /* set if -relax seen */ |
126 | ||
127 | /* Whether -small was seen. */ | |
128 | ||
129 | int sh_small; | |
130 | ||
f55629b8 KK |
131 | /* Flag to generate relocations against symbol values for local symbols. */ |
132 | ||
133 | static int dont_adjust_reloc_32; | |
134 | ||
37dedf66 NC |
135 | /* Flag to indicate that '$' is allowed as a register prefix. */ |
136 | ||
137 | static int allow_dollar_register_prefix; | |
138 | ||
139 | /* Preset architecture set, if given; zero otherwise. */ | |
d4845d57 | 140 | |
f6f9408f | 141 | static unsigned int preset_target_arch; |
d4845d57 JR |
142 | |
143 | /* The bit mask of architectures that could | |
67c1ffbe | 144 | accommodate the insns seen so far. */ |
f6f9408f | 145 | static unsigned int valid_arch; |
d4845d57 | 146 | |
252b5132 RH |
147 | const char EXP_CHARS[] = "eE"; |
148 | ||
6b31947e | 149 | /* Chars that mean this number is a floating point constant. */ |
252b5132 RH |
150 | /* As in 0f12.456 */ |
151 | /* or 0d1.2345e12 */ | |
152 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
153 | ||
154 | #define C(a,b) ENCODE_RELAX(a,b) | |
155 | ||
252b5132 RH |
156 | #define ENCODE_RELAX(what,length) (((what) << 4) + (length)) |
157 | #define GET_WHAT(x) ((x>>4)) | |
158 | ||
67c1ffbe | 159 | /* These are the three types of relaxable instruction. */ |
324bfcf3 AO |
160 | /* These are the types of relaxable instructions; except for END which is |
161 | a marker. */ | |
252b5132 RH |
162 | #define COND_JUMP 1 |
163 | #define COND_JUMP_DELAY 2 | |
164 | #define UNCOND_JUMP 3 | |
324bfcf3 AO |
165 | |
166 | #ifdef HAVE_SH64 | |
167 | ||
168 | /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */ | |
169 | #define SH64PCREL16_32 4 | |
170 | /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */ | |
171 | #define SH64PCREL16_64 5 | |
172 | ||
173 | /* Variants of the above for adjusting the insn to PTA or PTB according to | |
174 | the label. */ | |
175 | #define SH64PCREL16PT_32 6 | |
176 | #define SH64PCREL16PT_64 7 | |
177 | ||
178 | /* A MOVI expansion, expanding to at most 32 or 64 bits. */ | |
179 | #define MOVI_IMM_32 8 | |
180 | #define MOVI_IMM_32_PCREL 9 | |
181 | #define MOVI_IMM_64 10 | |
182 | #define MOVI_IMM_64_PCREL 11 | |
183 | #define END 12 | |
184 | ||
185 | #else /* HAVE_SH64 */ | |
186 | ||
252b5132 RH |
187 | #define END 4 |
188 | ||
324bfcf3 AO |
189 | #endif /* HAVE_SH64 */ |
190 | ||
252b5132 RH |
191 | #define UNDEF_DISP 0 |
192 | #define COND8 1 | |
193 | #define COND12 2 | |
194 | #define COND32 3 | |
252b5132 RH |
195 | #define UNDEF_WORD_DISP 4 |
196 | ||
197 | #define UNCOND12 1 | |
198 | #define UNCOND32 2 | |
199 | ||
324bfcf3 AO |
200 | #ifdef HAVE_SH64 |
201 | #define UNDEF_SH64PCREL 0 | |
202 | #define SH64PCREL16 1 | |
203 | #define SH64PCREL32 2 | |
204 | #define SH64PCREL48 3 | |
205 | #define SH64PCREL64 4 | |
206 | #define SH64PCRELPLT 5 | |
207 | ||
208 | #define UNDEF_MOVI 0 | |
209 | #define MOVI_16 1 | |
210 | #define MOVI_32 2 | |
211 | #define MOVI_48 3 | |
212 | #define MOVI_64 4 | |
213 | #define MOVI_PLT 5 | |
214 | #define MOVI_GOTOFF 6 | |
215 | #define MOVI_GOTPC 7 | |
216 | #endif /* HAVE_SH64 */ | |
217 | ||
252b5132 RH |
218 | /* Branch displacements are from the address of the branch plus |
219 | four, thus all minimum and maximum values have 4 added to them. */ | |
220 | #define COND8_F 258 | |
221 | #define COND8_M -252 | |
222 | #define COND8_LENGTH 2 | |
223 | ||
224 | /* There is one extra instruction before the branch, so we must add | |
225 | two more bytes to account for it. */ | |
226 | #define COND12_F 4100 | |
227 | #define COND12_M -4090 | |
228 | #define COND12_LENGTH 6 | |
229 | ||
230 | #define COND12_DELAY_LENGTH 4 | |
231 | ||
232 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
233 | since this relocation type is not supported yet. */ | |
234 | #define COND32_F (1<<30) | |
235 | #define COND32_M -(1<<30) | |
236 | #define COND32_LENGTH 14 | |
237 | ||
238 | #define UNCOND12_F 4098 | |
239 | #define UNCOND12_M -4092 | |
240 | #define UNCOND12_LENGTH 2 | |
241 | ||
242 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
243 | since this relocation type is not supported yet. */ | |
244 | #define UNCOND32_F (1<<30) | |
245 | #define UNCOND32_M -(1<<30) | |
246 | #define UNCOND32_LENGTH 14 | |
247 | ||
324bfcf3 AO |
248 | #ifdef HAVE_SH64 |
249 | /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label, | |
250 | TRd" as is the current insn, so no extra length. Note that the "reach" | |
251 | is calculated from the address *after* that insn, but the offset in the | |
252 | insn is calculated from the beginning of the insn. We also need to | |
253 | take into account the implicit 1 coded as the "A" in PTA when counting | |
254 | forward. If PTB reaches an odd address, we trap that as an error | |
255 | elsewhere, so we don't have to have different relaxation entries. We | |
256 | don't add a one to the negative range, since PTB would then have the | |
257 | farthest backward-reaching value skipped, not generated at relaxation. */ | |
258 | #define SH64PCREL16_F (32767 * 4 - 4 + 1) | |
259 | #define SH64PCREL16_M (-32768 * 4 - 4) | |
260 | #define SH64PCREL16_LENGTH 0 | |
261 | ||
262 | /* The next step is to change that PT insn into | |
263 | MOVI ((label - datalabel Ln) >> 16) & 65535, R25 | |
264 | SHORI (label - datalabel Ln) & 65535, R25 | |
265 | Ln: | |
266 | PTREL R25,TRd | |
267 | which means two extra insns, 8 extra bytes. This is the limit for the | |
268 | 32-bit ABI. | |
269 | ||
270 | The expressions look a bit bad since we have to adjust this to avoid overflow on a | |
271 | 32-bit host. */ | |
272 | #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4) | |
273 | #define SH64PCREL32_LENGTH (2 * 4) | |
274 | ||
275 | /* Similarly, we just change the MOVI and add a SHORI for the 48-bit | |
276 | expansion. */ | |
277 | #if BFD_HOST_64BIT_LONG | |
278 | /* The "reach" type is long, so we can only do this for a 64-bit-long | |
279 | host. */ | |
280 | #define SH64PCREL32_M (((long) -1 << 30) * 2 - 4) | |
281 | #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4) | |
282 | #define SH64PCREL48_M (((long) -1 << 47) - 4) | |
283 | #define SH64PCREL48_LENGTH (3 * 4) | |
284 | #else | |
285 | /* If the host does not have 64-bit longs, just make this state identical | |
286 | in reach to the 32-bit state. Note that we have a slightly incorrect | |
287 | reach, but the correct one above will overflow a 32-bit number. */ | |
288 | #define SH64PCREL32_M (((long) -1 << 30) * 2) | |
289 | #define SH64PCREL48_F SH64PCREL32_F | |
290 | #define SH64PCREL48_M SH64PCREL32_M | |
291 | #define SH64PCREL48_LENGTH (3 * 4) | |
292 | #endif /* BFD_HOST_64BIT_LONG */ | |
293 | ||
294 | /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI | |
295 | + PTREL sequence. */ | |
296 | #define SH64PCREL64_LENGTH (4 * 4) | |
297 | ||
298 | /* For MOVI, we make the MOVI + SHORI... expansion you can see in the | |
299 | SH64PCREL expansions. The PCREL one is similar, but the other has no | |
300 | pc-relative reach; it must be fully expanded in | |
301 | shmedia_md_estimate_size_before_relax. */ | |
302 | #define MOVI_16_LENGTH 0 | |
303 | #define MOVI_16_F (32767 - 4) | |
304 | #define MOVI_16_M (-32768 - 4) | |
305 | #define MOVI_32_LENGTH 4 | |
306 | #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4) | |
307 | #define MOVI_48_LENGTH 8 | |
308 | ||
309 | #if BFD_HOST_64BIT_LONG | |
310 | /* The "reach" type is long, so we can only do this for a 64-bit-long | |
311 | host. */ | |
312 | #define MOVI_32_M (((long) -1 << 30) * 2 - 4) | |
313 | #define MOVI_48_F ((((long) 1 << 47) - 1) - 4) | |
314 | #define MOVI_48_M (((long) -1 << 47) - 4) | |
315 | #else | |
316 | /* If the host does not have 64-bit longs, just make this state identical | |
317 | in reach to the 32-bit state. Note that we have a slightly incorrect | |
318 | reach, but the correct one above will overflow a 32-bit number. */ | |
319 | #define MOVI_32_M (((long) -1 << 30) * 2) | |
320 | #define MOVI_48_F MOVI_32_F | |
321 | #define MOVI_48_M MOVI_32_M | |
322 | #endif /* BFD_HOST_64BIT_LONG */ | |
323 | ||
324 | #define MOVI_64_LENGTH 12 | |
325 | #endif /* HAVE_SH64 */ | |
326 | ||
43841e91 NC |
327 | #define EMPTY { 0, 0, 0, 0 } |
328 | ||
252b5132 | 329 | const relax_typeS md_relax_table[C (END, 0)] = { |
43841e91 NC |
330 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
331 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
252b5132 | 332 | |
43841e91 | 333 | EMPTY, |
252b5132 RH |
334 | /* C (COND_JUMP, COND8) */ |
335 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, | |
336 | /* C (COND_JUMP, COND12) */ | |
337 | { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, | |
338 | /* C (COND_JUMP, COND32) */ | |
339 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
e66457fb AM |
340 | /* C (COND_JUMP, UNDEF_WORD_DISP) */ |
341 | { 0, 0, COND32_LENGTH, 0, }, | |
342 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 343 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 | 344 | |
43841e91 | 345 | EMPTY, |
252b5132 RH |
346 | /* C (COND_JUMP_DELAY, COND8) */ |
347 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, | |
348 | /* C (COND_JUMP_DELAY, COND12) */ | |
349 | { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, | |
350 | /* C (COND_JUMP_DELAY, COND32) */ | |
351 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
e66457fb AM |
352 | /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */ |
353 | { 0, 0, COND32_LENGTH, 0, }, | |
354 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 355 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 | 356 | |
43841e91 | 357 | EMPTY, |
252b5132 RH |
358 | /* C (UNCOND_JUMP, UNCOND12) */ |
359 | { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, | |
360 | /* C (UNCOND_JUMP, UNCOND32) */ | |
361 | { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, | |
e66457fb AM |
362 | EMPTY, |
363 | /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */ | |
364 | { 0, 0, UNCOND32_LENGTH, 0, }, | |
365 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 366 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
324bfcf3 AO |
367 | |
368 | #ifdef HAVE_SH64 | |
369 | /* C (SH64PCREL16_32, SH64PCREL16) */ | |
370 | EMPTY, | |
371 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_32, SH64PCREL32) }, | |
372 | /* C (SH64PCREL16_32, SH64PCREL32) */ | |
373 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
374 | EMPTY, EMPTY, | |
375 | /* C (SH64PCREL16_32, SH64PCRELPLT) */ | |
376 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
377 | EMPTY, EMPTY, | |
378 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
379 | ||
380 | /* C (SH64PCREL16_64, SH64PCREL16) */ | |
381 | EMPTY, | |
382 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_64, SH64PCREL32) }, | |
383 | /* C (SH64PCREL16_64, SH64PCREL32) */ | |
384 | { SH64PCREL32_F, SH64PCREL32_M, SH64PCREL32_LENGTH, C (SH64PCREL16_64, SH64PCREL48) }, | |
385 | /* C (SH64PCREL16_64, SH64PCREL48) */ | |
386 | { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16_64, SH64PCREL64) }, | |
387 | /* C (SH64PCREL16_64, SH64PCREL64) */ | |
388 | { 0, 0, SH64PCREL64_LENGTH, 0 }, | |
389 | /* C (SH64PCREL16_64, SH64PCRELPLT) */ | |
390 | { 0, 0, SH64PCREL64_LENGTH, 0 }, | |
391 | EMPTY, EMPTY, | |
392 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
393 | ||
394 | /* C (SH64PCREL16PT_32, SH64PCREL16) */ | |
395 | EMPTY, | |
396 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_32, SH64PCREL32) }, | |
397 | /* C (SH64PCREL16PT_32, SH64PCREL32) */ | |
398 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
399 | EMPTY, EMPTY, | |
400 | /* C (SH64PCREL16PT_32, SH64PCRELPLT) */ | |
401 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
402 | EMPTY, EMPTY, | |
403 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
404 | ||
405 | /* C (SH64PCREL16PT_64, SH64PCREL16) */ | |
406 | EMPTY, | |
407 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_64, SH64PCREL32) }, | |
408 | /* C (SH64PCREL16PT_64, SH64PCREL32) */ | |
409 | { SH64PCREL32_F, | |
5d6255fe | 410 | SH64PCREL32_M, |
324bfcf3 AO |
411 | SH64PCREL32_LENGTH, |
412 | C (SH64PCREL16PT_64, SH64PCREL48) }, | |
413 | /* C (SH64PCREL16PT_64, SH64PCREL48) */ | |
414 | { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16PT_64, SH64PCREL64) }, | |
415 | /* C (SH64PCREL16PT_64, SH64PCREL64) */ | |
416 | { 0, 0, SH64PCREL64_LENGTH, 0 }, | |
417 | /* C (SH64PCREL16PT_64, SH64PCRELPLT) */ | |
418 | { 0, 0, SH64PCREL64_LENGTH, 0}, | |
419 | EMPTY, EMPTY, | |
420 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
421 | ||
422 | /* C (MOVI_IMM_32, UNDEF_MOVI) */ | |
423 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
424 | /* C (MOVI_IMM_32, MOVI_16) */ | |
425 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32, MOVI_32) }, | |
426 | /* C (MOVI_IMM_32, MOVI_32) */ | |
427 | { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, 0 }, | |
428 | EMPTY, EMPTY, EMPTY, | |
429 | /* C (MOVI_IMM_32, MOVI_GOTOFF) */ | |
430 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
431 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
432 | ||
433 | /* C (MOVI_IMM_32_PCREL, MOVI_16) */ | |
434 | EMPTY, | |
435 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32_PCREL, MOVI_32) }, | |
436 | /* C (MOVI_IMM_32_PCREL, MOVI_32) */ | |
437 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
438 | EMPTY, EMPTY, | |
439 | /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */ | |
440 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
441 | EMPTY, | |
442 | /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */ | |
443 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
444 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
445 | ||
446 | /* C (MOVI_IMM_64, UNDEF_MOVI) */ | |
447 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
448 | /* C (MOVI_IMM_64, MOVI_16) */ | |
449 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64, MOVI_32) }, | |
450 | /* C (MOVI_IMM_64, MOVI_32) */ | |
451 | { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64, MOVI_48) }, | |
452 | /* C (MOVI_IMM_64, MOVI_48) */ | |
453 | { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64, MOVI_64) }, | |
454 | /* C (MOVI_IMM_64, MOVI_64) */ | |
455 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
456 | EMPTY, | |
457 | /* C (MOVI_IMM_64, MOVI_GOTOFF) */ | |
458 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
459 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
460 | ||
461 | /* C (MOVI_IMM_64_PCREL, MOVI_16) */ | |
462 | EMPTY, | |
463 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_32) }, | |
464 | /* C (MOVI_IMM_64_PCREL, MOVI_32) */ | |
465 | { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_48) }, | |
466 | /* C (MOVI_IMM_64_PCREL, MOVI_48) */ | |
467 | { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_64) }, | |
468 | /* C (MOVI_IMM_64_PCREL, MOVI_64) */ | |
469 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
470 | /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */ | |
471 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
472 | EMPTY, | |
473 | /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */ | |
474 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
475 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
476 | ||
477 | #endif /* HAVE_SH64 */ | |
478 | ||
252b5132 RH |
479 | }; |
480 | ||
43841e91 NC |
481 | #undef EMPTY |
482 | ||
252b5132 RH |
483 | static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ |
484 | ||
a1cc9221 AO |
485 | \f |
486 | #ifdef OBJ_ELF | |
538cd60f AO |
487 | /* Determinet whether the symbol needs any kind of PIC relocation. */ |
488 | ||
489 | inline static int | |
8edc77b9 | 490 | sh_PIC_related_p (symbolS *sym) |
a1cc9221 | 491 | { |
538cd60f | 492 | expressionS *exp; |
a1cc9221 | 493 | |
538cd60f AO |
494 | if (! sym) |
495 | return 0; | |
496 | ||
497 | if (sym == GOT_symbol) | |
498 | return 1; | |
499 | ||
324bfcf3 AO |
500 | #ifdef HAVE_SH64 |
501 | if (sh_PIC_related_p (*symbol_get_tc (sym))) | |
502 | return 1; | |
503 | #endif | |
504 | ||
538cd60f AO |
505 | exp = symbol_get_value_expression (sym); |
506 | ||
507 | return (exp->X_op == O_PIC_reloc | |
508 | || sh_PIC_related_p (exp->X_add_symbol) | |
509 | || sh_PIC_related_p (exp->X_op_symbol)); | |
510 | } | |
511 | ||
512 | /* Determine the relocation type to be used to represent the | |
513 | expression, that may be rearranged. */ | |
514 | ||
515 | static int | |
8edc77b9 | 516 | sh_check_fixup (expressionS *main_exp, bfd_reloc_code_real_type *r_type_p) |
538cd60f AO |
517 | { |
518 | expressionS *exp = main_exp; | |
519 | ||
520 | /* This is here for backward-compatibility only. GCC used to generated: | |
521 | ||
522 | f@PLT + . - (.LPCS# + 2) | |
523 | ||
524 | but we'd rather be able to handle this as a PIC-related reference | |
525 | plus/minus a symbol. However, gas' parser gives us: | |
526 | ||
527 | O_subtract (O_add (f@PLT, .), .LPCS#+2) | |
5d6255fe | 528 | |
538cd60f AO |
529 | so we attempt to transform this into: |
530 | ||
531 | O_subtract (f@PLT, O_subtract (.LPCS#+2, .)) | |
532 | ||
5d6255fe | 533 | which we can handle simply below. */ |
538cd60f AO |
534 | if (exp->X_op == O_subtract) |
535 | { | |
536 | if (sh_PIC_related_p (exp->X_op_symbol)) | |
537 | return 1; | |
538 | ||
539 | exp = symbol_get_value_expression (exp->X_add_symbol); | |
540 | ||
541 | if (exp && sh_PIC_related_p (exp->X_op_symbol)) | |
542 | return 1; | |
543 | ||
544 | if (exp && exp->X_op == O_add | |
545 | && sh_PIC_related_p (exp->X_add_symbol)) | |
546 | { | |
547 | symbolS *sym = exp->X_add_symbol; | |
548 | ||
549 | exp->X_op = O_subtract; | |
550 | exp->X_add_symbol = main_exp->X_op_symbol; | |
551 | ||
552 | main_exp->X_op_symbol = main_exp->X_add_symbol; | |
553 | main_exp->X_add_symbol = sym; | |
554 | ||
555 | main_exp->X_add_number += exp->X_add_number; | |
556 | exp->X_add_number = 0; | |
557 | } | |
558 | ||
559 | exp = main_exp; | |
560 | } | |
561 | else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol)) | |
562 | return 1; | |
563 | ||
564 | if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract) | |
565 | { | |
324bfcf3 AO |
566 | #ifdef HAVE_SH64 |
567 | if (exp->X_add_symbol | |
568 | && (exp->X_add_symbol == GOT_symbol | |
569 | || (GOT_symbol | |
570 | && *symbol_get_tc (exp->X_add_symbol) == GOT_symbol))) | |
571 | { | |
572 | switch (*r_type_p) | |
573 | { | |
574 | case BFD_RELOC_SH_IMM_LOW16: | |
575 | *r_type_p = BFD_RELOC_SH_GOTPC_LOW16; | |
576 | break; | |
577 | ||
578 | case BFD_RELOC_SH_IMM_MEDLOW16: | |
579 | *r_type_p = BFD_RELOC_SH_GOTPC_MEDLOW16; | |
580 | break; | |
581 | ||
582 | case BFD_RELOC_SH_IMM_MEDHI16: | |
583 | *r_type_p = BFD_RELOC_SH_GOTPC_MEDHI16; | |
584 | break; | |
585 | ||
586 | case BFD_RELOC_SH_IMM_HI16: | |
587 | *r_type_p = BFD_RELOC_SH_GOTPC_HI16; | |
588 | break; | |
589 | ||
590 | case BFD_RELOC_NONE: | |
591 | case BFD_RELOC_UNUSED: | |
592 | *r_type_p = BFD_RELOC_SH_GOTPC; | |
593 | break; | |
5d6255fe | 594 | |
324bfcf3 AO |
595 | default: |
596 | abort (); | |
597 | } | |
598 | return 0; | |
599 | } | |
600 | #else | |
538cd60f AO |
601 | if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) |
602 | { | |
603 | *r_type_p = BFD_RELOC_SH_GOTPC; | |
604 | return 0; | |
605 | } | |
324bfcf3 | 606 | #endif |
538cd60f AO |
607 | exp = symbol_get_value_expression (exp->X_add_symbol); |
608 | if (! exp) | |
609 | return 0; | |
610 | } | |
611 | ||
612 | if (exp->X_op == O_PIC_reloc) | |
613 | { | |
324bfcf3 AO |
614 | #ifdef HAVE_SH64 |
615 | switch (*r_type_p) | |
616 | { | |
617 | case BFD_RELOC_NONE: | |
618 | case BFD_RELOC_UNUSED: | |
619 | *r_type_p = exp->X_md; | |
620 | break; | |
621 | ||
622 | case BFD_RELOC_SH_IMM_LOW16: | |
623 | switch (exp->X_md) | |
624 | { | |
625 | case BFD_RELOC_32_GOTOFF: | |
626 | *r_type_p = BFD_RELOC_SH_GOTOFF_LOW16; | |
627 | break; | |
5d6255fe | 628 | |
324bfcf3 AO |
629 | case BFD_RELOC_SH_GOTPLT32: |
630 | *r_type_p = BFD_RELOC_SH_GOTPLT_LOW16; | |
631 | break; | |
5d6255fe | 632 | |
324bfcf3 AO |
633 | case BFD_RELOC_32_GOT_PCREL: |
634 | *r_type_p = BFD_RELOC_SH_GOT_LOW16; | |
635 | break; | |
5d6255fe | 636 | |
324bfcf3 AO |
637 | case BFD_RELOC_32_PLT_PCREL: |
638 | *r_type_p = BFD_RELOC_SH_PLT_LOW16; | |
639 | break; | |
640 | ||
641 | default: | |
642 | abort (); | |
643 | } | |
644 | break; | |
645 | ||
646 | case BFD_RELOC_SH_IMM_MEDLOW16: | |
647 | switch (exp->X_md) | |
648 | { | |
649 | case BFD_RELOC_32_GOTOFF: | |
650 | *r_type_p = BFD_RELOC_SH_GOTOFF_MEDLOW16; | |
651 | break; | |
5d6255fe | 652 | |
324bfcf3 AO |
653 | case BFD_RELOC_SH_GOTPLT32: |
654 | *r_type_p = BFD_RELOC_SH_GOTPLT_MEDLOW16; | |
655 | break; | |
5d6255fe | 656 | |
324bfcf3 AO |
657 | case BFD_RELOC_32_GOT_PCREL: |
658 | *r_type_p = BFD_RELOC_SH_GOT_MEDLOW16; | |
659 | break; | |
5d6255fe | 660 | |
324bfcf3 AO |
661 | case BFD_RELOC_32_PLT_PCREL: |
662 | *r_type_p = BFD_RELOC_SH_PLT_MEDLOW16; | |
663 | break; | |
664 | ||
665 | default: | |
666 | abort (); | |
667 | } | |
668 | break; | |
669 | ||
670 | case BFD_RELOC_SH_IMM_MEDHI16: | |
671 | switch (exp->X_md) | |
672 | { | |
673 | case BFD_RELOC_32_GOTOFF: | |
674 | *r_type_p = BFD_RELOC_SH_GOTOFF_MEDHI16; | |
675 | break; | |
5d6255fe | 676 | |
324bfcf3 AO |
677 | case BFD_RELOC_SH_GOTPLT32: |
678 | *r_type_p = BFD_RELOC_SH_GOTPLT_MEDHI16; | |
679 | break; | |
5d6255fe | 680 | |
324bfcf3 AO |
681 | case BFD_RELOC_32_GOT_PCREL: |
682 | *r_type_p = BFD_RELOC_SH_GOT_MEDHI16; | |
683 | break; | |
5d6255fe | 684 | |
324bfcf3 AO |
685 | case BFD_RELOC_32_PLT_PCREL: |
686 | *r_type_p = BFD_RELOC_SH_PLT_MEDHI16; | |
687 | break; | |
688 | ||
689 | default: | |
690 | abort (); | |
691 | } | |
692 | break; | |
693 | ||
694 | case BFD_RELOC_SH_IMM_HI16: | |
695 | switch (exp->X_md) | |
696 | { | |
697 | case BFD_RELOC_32_GOTOFF: | |
698 | *r_type_p = BFD_RELOC_SH_GOTOFF_HI16; | |
699 | break; | |
5d6255fe | 700 | |
324bfcf3 AO |
701 | case BFD_RELOC_SH_GOTPLT32: |
702 | *r_type_p = BFD_RELOC_SH_GOTPLT_HI16; | |
703 | break; | |
5d6255fe | 704 | |
324bfcf3 AO |
705 | case BFD_RELOC_32_GOT_PCREL: |
706 | *r_type_p = BFD_RELOC_SH_GOT_HI16; | |
707 | break; | |
5d6255fe | 708 | |
324bfcf3 AO |
709 | case BFD_RELOC_32_PLT_PCREL: |
710 | *r_type_p = BFD_RELOC_SH_PLT_HI16; | |
711 | break; | |
712 | ||
713 | default: | |
714 | abort (); | |
715 | } | |
716 | break; | |
717 | ||
718 | default: | |
719 | abort (); | |
720 | } | |
721 | #else | |
538cd60f | 722 | *r_type_p = exp->X_md; |
324bfcf3 | 723 | #endif |
538cd60f AO |
724 | if (exp == main_exp) |
725 | exp->X_op = O_symbol; | |
726 | else | |
727 | { | |
728 | main_exp->X_add_symbol = exp->X_add_symbol; | |
729 | main_exp->X_add_number += exp->X_add_number; | |
730 | } | |
731 | } | |
732 | else | |
733 | return (sh_PIC_related_p (exp->X_add_symbol) | |
734 | || sh_PIC_related_p (exp->X_op_symbol)); | |
735 | ||
736 | return 0; | |
737 | } | |
738 | ||
739 | /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */ | |
740 | ||
741 | void | |
8edc77b9 | 742 | sh_cons_fix_new (fragS *frag, int off, int size, expressionS *exp) |
538cd60f AO |
743 | { |
744 | bfd_reloc_code_real_type r_type = BFD_RELOC_UNUSED; | |
745 | ||
746 | if (sh_check_fixup (exp, &r_type)) | |
747 | as_bad (_("Invalid PIC expression.")); | |
748 | ||
749 | if (r_type == BFD_RELOC_UNUSED) | |
750 | switch (size) | |
a1cc9221 | 751 | { |
538cd60f AO |
752 | case 1: |
753 | r_type = BFD_RELOC_8; | |
754 | break; | |
a1cc9221 | 755 | |
538cd60f AO |
756 | case 2: |
757 | r_type = BFD_RELOC_16; | |
758 | break; | |
759 | ||
760 | case 4: | |
761 | r_type = BFD_RELOC_32; | |
762 | break; | |
a1cc9221 | 763 | |
324bfcf3 AO |
764 | #ifdef HAVE_SH64 |
765 | case 8: | |
766 | r_type = BFD_RELOC_64; | |
767 | break; | |
768 | #endif | |
769 | ||
538cd60f AO |
770 | default: |
771 | goto error; | |
772 | } | |
773 | else if (size != 4) | |
774 | { | |
775 | error: | |
776 | as_bad (_("unsupported BFD relocation size %u"), size); | |
777 | r_type = BFD_RELOC_UNUSED; | |
778 | } | |
5d6255fe | 779 | |
538cd60f | 780 | fix_new_exp (frag, off, size, exp, 0, r_type); |
a1cc9221 AO |
781 | } |
782 | ||
783 | /* The regular cons() function, that reads constants, doesn't support | |
784 | suffixes such as @GOT, @GOTOFF and @PLT, that generate | |
785 | machine-specific relocation types. So we must define it here. */ | |
786 | /* Clobbers input_line_pointer, checks end-of-line. */ | |
8edc77b9 | 787 | /* NBYTES 1=.byte, 2=.word, 4=.long */ |
a1cc9221 | 788 | static void |
8edc77b9 | 789 | sh_elf_cons (register int nbytes) |
a1cc9221 | 790 | { |
538cd60f | 791 | expressionS exp; |
a1cc9221 | 792 | |
324bfcf3 AO |
793 | #ifdef HAVE_SH64 |
794 | ||
795 | /* Update existing range to include a previous insn, if there was one. */ | |
b34976b6 | 796 | sh64_update_contents_mark (TRUE); |
324bfcf3 AO |
797 | |
798 | /* We need to make sure the contents type is set to data. */ | |
799 | sh64_flag_output (); | |
800 | ||
801 | #endif /* HAVE_SH64 */ | |
802 | ||
a1cc9221 AO |
803 | if (is_it_end_of_statement ()) |
804 | { | |
805 | demand_empty_rest_of_line (); | |
806 | return; | |
807 | } | |
808 | ||
028f09bd NC |
809 | #ifdef md_cons_align |
810 | md_cons_align (nbytes); | |
811 | #endif | |
812 | ||
a1cc9221 AO |
813 | do |
814 | { | |
815 | expression (&exp); | |
538cd60f | 816 | emit_expr (&exp, (unsigned int) nbytes); |
a1cc9221 AO |
817 | } |
818 | while (*input_line_pointer++ == ','); | |
819 | ||
81d4177b | 820 | input_line_pointer--; /* Put terminator back into stream. */ |
a1cc9221 AO |
821 | if (*input_line_pointer == '#' || *input_line_pointer == '!') |
822 | { | |
dda5ecfc | 823 | while (! is_end_of_line[(unsigned char) *input_line_pointer++]); |
a1cc9221 AO |
824 | } |
825 | else | |
826 | demand_empty_rest_of_line (); | |
827 | } | |
828 | #endif /* OBJ_ELF */ | |
829 | ||
830 | \f | |
6b31947e NC |
831 | /* This function is called once, at assembler startup time. This should |
832 | set up all the tables, etc that the MD part of the assembler needs. */ | |
252b5132 RH |
833 | |
834 | void | |
8edc77b9 | 835 | md_begin (void) |
252b5132 | 836 | { |
5ff37431 | 837 | const sh_opcode_info *opcode; |
252b5132 | 838 | char *prev_name = ""; |
f6f9408f | 839 | unsigned int target_arch; |
252b5132 | 840 | |
bdfaef52 | 841 | target_arch |
e38bc3b5 | 842 | = preset_target_arch ? preset_target_arch : arch_sh_up & ~arch_sh_has_dsp; |
d4845d57 JR |
843 | valid_arch = target_arch; |
844 | ||
324bfcf3 AO |
845 | #ifdef HAVE_SH64 |
846 | shmedia_md_begin (); | |
847 | #endif | |
848 | ||
252b5132 RH |
849 | opcode_hash_control = hash_new (); |
850 | ||
6b31947e | 851 | /* Insert unique names into hash table. */ |
252b5132 RH |
852 | for (opcode = sh_table; opcode->name; opcode++) |
853 | { | |
5ff37431 | 854 | if (strcmp (prev_name, opcode->name) != 0) |
252b5132 | 855 | { |
f6f9408f | 856 | if (!SH_MERGE_ARCH_SET_VALID (opcode->arch, target_arch)) |
a37c8f88 | 857 | continue; |
252b5132 RH |
858 | prev_name = opcode->name; |
859 | hash_insert (opcode_hash_control, opcode->name, (char *) opcode); | |
860 | } | |
252b5132 RH |
861 | } |
862 | } | |
863 | ||
864 | static int reg_m; | |
865 | static int reg_n; | |
d4845d57 JR |
866 | static int reg_x, reg_y; |
867 | static int reg_efg; | |
252b5132 RH |
868 | static int reg_b; |
869 | ||
3882b010 | 870 | #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_') |
dead1419 | 871 | |
6b31947e NC |
872 | /* Try to parse a reg name. Return the number of chars consumed. */ |
873 | ||
37dedf66 NC |
874 | static unsigned int |
875 | parse_reg_without_prefix (char *src, int *mode, int *reg) | |
252b5132 | 876 | { |
3882b010 L |
877 | char l0 = TOLOWER (src[0]); |
878 | char l1 = l0 ? TOLOWER (src[1]) : 0; | |
e46fee70 | 879 | |
dead1419 | 880 | /* We use ! IDENT_CHAR for the next character after the register name, to |
252b5132 | 881 | make sure that we won't accidentally recognize a symbol name such as |
dead1419 | 882 | 'sram' or sr_ram as being a reference to the register 'sr'. */ |
252b5132 | 883 | |
e46fee70 | 884 | if (l0 == 'r') |
252b5132 | 885 | { |
e46fee70 | 886 | if (l1 == '1') |
d4845d57 JR |
887 | { |
888 | if (src[2] >= '0' && src[2] <= '5' | |
dead1419 | 889 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
890 | { |
891 | *mode = A_REG_N; | |
892 | *reg = 10 + src[2] - '0'; | |
893 | return 3; | |
894 | } | |
895 | } | |
e46fee70 | 896 | if (l1 >= '0' && l1 <= '9' |
dead1419 | 897 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
898 | { |
899 | *mode = A_REG_N; | |
e46fee70 | 900 | *reg = (l1 - '0'); |
d4845d57 JR |
901 | return 2; |
902 | } | |
e46fee70 | 903 | if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0 |
dead1419 JR |
904 | && ! IDENT_CHAR ((unsigned char) src[7])) |
905 | { | |
906 | *mode = A_REG_B; | |
e46fee70 | 907 | *reg = (l1 - '0'); |
dead1419 JR |
908 | return 7; |
909 | } | |
d4845d57 | 910 | |
e46fee70 | 911 | if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
912 | { |
913 | *mode = A_RE; | |
914 | return 2; | |
915 | } | |
e46fee70 | 916 | if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
917 | { |
918 | *mode = A_RS; | |
919 | return 2; | |
920 | } | |
252b5132 RH |
921 | } |
922 | ||
e46fee70 | 923 | if (l0 == 'a') |
252b5132 | 924 | { |
e46fee70 | 925 | if (l1 == '0') |
d4845d57 | 926 | { |
dead1419 | 927 | if (! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
928 | { |
929 | *mode = DSP_REG_N; | |
930 | *reg = A_A0_NUM; | |
931 | return 2; | |
932 | } | |
3882b010 | 933 | if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
934 | { |
935 | *mode = DSP_REG_N; | |
936 | *reg = A_A0G_NUM; | |
937 | return 3; | |
938 | } | |
939 | } | |
e46fee70 | 940 | if (l1 == '1') |
252b5132 | 941 | { |
dead1419 | 942 | if (! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 943 | { |
d4845d57 JR |
944 | *mode = DSP_REG_N; |
945 | *reg = A_A1_NUM; | |
946 | return 2; | |
947 | } | |
3882b010 | 948 | if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
949 | { |
950 | *mode = DSP_REG_N; | |
951 | *reg = A_A1G_NUM; | |
252b5132 RH |
952 | return 3; |
953 | } | |
954 | } | |
d4845d57 | 955 | |
e46fee70 | 956 | if (l1 == 'x' && src[2] >= '0' && src[2] <= '1' |
dead1419 | 957 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
958 | { |
959 | *mode = A_REG_N; | |
e46fee70 | 960 | *reg = 4 + (l1 - '0'); |
d4845d57 JR |
961 | return 3; |
962 | } | |
e46fee70 | 963 | if (l1 == 'y' && src[2] >= '0' && src[2] <= '1' |
dead1419 | 964 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
965 | { |
966 | *mode = A_REG_N; | |
e46fee70 | 967 | *reg = 6 + (l1 - '0'); |
d4845d57 JR |
968 | return 3; |
969 | } | |
e46fee70 | 970 | if (l1 == 's' && src[2] >= '0' && src[2] <= '3' |
dead1419 | 971 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 | 972 | { |
e46fee70 | 973 | int n = l1 - '0'; |
d4845d57 JR |
974 | |
975 | *mode = A_REG_N; | |
976 | *reg = n | ((~n & 2) << 1); | |
977 | return 3; | |
978 | } | |
979 | } | |
980 | ||
912a07db | 981 | if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 | 982 | { |
e46fee70 | 983 | if (l1 == 's') |
d4845d57 JR |
984 | { |
985 | *mode = A_REG_N; | |
986 | *reg = 8; | |
252b5132 RH |
987 | return 2; |
988 | } | |
e46fee70 | 989 | if (l1 == 'x') |
d4845d57 JR |
990 | { |
991 | *mode = A_REG_N; | |
992 | *reg = 8; | |
993 | return 2; | |
994 | } | |
e46fee70 | 995 | if (l1 == 'y') |
d4845d57 JR |
996 | { |
997 | *mode = A_REG_N; | |
998 | *reg = 9; | |
999 | return 2; | |
1000 | } | |
1001 | } | |
1002 | ||
e46fee70 | 1003 | if (l0 == 'x' && l1 >= '0' && l1 <= '1' |
dead1419 | 1004 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1005 | { |
1006 | *mode = DSP_REG_N; | |
e46fee70 | 1007 | *reg = A_X0_NUM + l1 - '0'; |
d4845d57 JR |
1008 | return 2; |
1009 | } | |
1010 | ||
e46fee70 | 1011 | if (l0 == 'y' && l1 >= '0' && l1 <= '1' |
dead1419 | 1012 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1013 | { |
1014 | *mode = DSP_REG_N; | |
e46fee70 | 1015 | *reg = A_Y0_NUM + l1 - '0'; |
d4845d57 JR |
1016 | return 2; |
1017 | } | |
1018 | ||
e46fee70 | 1019 | if (l0 == 'm' && l1 >= '0' && l1 <= '1' |
dead1419 | 1020 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1021 | { |
1022 | *mode = DSP_REG_N; | |
e46fee70 | 1023 | *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM; |
d4845d57 | 1024 | return 2; |
252b5132 RH |
1025 | } |
1026 | ||
e46fee70 HPN |
1027 | if (l0 == 's' |
1028 | && l1 == 's' | |
3882b010 | 1029 | && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1030 | { |
1031 | *mode = A_SSR; | |
1032 | return 3; | |
1033 | } | |
1034 | ||
3882b010 | 1035 | if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c' |
dead1419 | 1036 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1037 | { |
1038 | *mode = A_SPC; | |
1039 | return 3; | |
1040 | } | |
1041 | ||
3882b010 | 1042 | if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r' |
dead1419 | 1043 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1044 | { |
1045 | *mode = A_SGR; | |
1046 | return 3; | |
1047 | } | |
1048 | ||
3882b010 | 1049 | if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r' |
dead1419 | 1050 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
1051 | { |
1052 | *mode = A_DSR; | |
1053 | return 3; | |
1054 | } | |
1055 | ||
3882b010 | 1056 | if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 1057 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1058 | { |
1059 | *mode = A_DBR; | |
1060 | return 3; | |
1061 | } | |
1062 | ||
e46fee70 | 1063 | if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
1064 | { |
1065 | *mode = A_SR; | |
1066 | return 2; | |
1067 | } | |
1068 | ||
e46fee70 | 1069 | if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
1070 | { |
1071 | *mode = A_REG_N; | |
1072 | *reg = 15; | |
1073 | return 2; | |
1074 | } | |
1075 | ||
e46fee70 | 1076 | if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
1077 | { |
1078 | *mode = A_PR; | |
1079 | return 2; | |
1080 | } | |
e46fee70 | 1081 | if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 1082 | { |
015551fc JR |
1083 | /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0' |
1084 | and use an uninitialized immediate. */ | |
1085 | *mode = A_PC; | |
252b5132 RH |
1086 | return 2; |
1087 | } | |
3882b010 | 1088 | if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 1089 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1090 | { |
1091 | *mode = A_GBR; | |
1092 | return 3; | |
1093 | } | |
3882b010 | 1094 | if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 1095 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1096 | { |
1097 | *mode = A_VBR; | |
1098 | return 3; | |
1099 | } | |
1100 | ||
1d70c7fb AO |
1101 | if (l0 == 't' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
1102 | && ! IDENT_CHAR ((unsigned char) src[3])) | |
1103 | { | |
1104 | *mode = A_TBR; | |
1105 | return 3; | |
1106 | } | |
3882b010 | 1107 | if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c' |
dead1419 | 1108 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 | 1109 | { |
3882b010 | 1110 | if (TOLOWER (src[3]) == 'l') |
252b5132 RH |
1111 | { |
1112 | *mode = A_MACL; | |
1113 | return 4; | |
1114 | } | |
3882b010 | 1115 | if (TOLOWER (src[3]) == 'h') |
252b5132 RH |
1116 | { |
1117 | *mode = A_MACH; | |
1118 | return 4; | |
1119 | } | |
1120 | } | |
3882b010 | 1121 | if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd' |
912a07db | 1122 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
1123 | { |
1124 | *mode = A_MOD; | |
1125 | return 3; | |
1126 | } | |
e46fee70 | 1127 | if (l0 == 'f' && l1 == 'r') |
252b5132 RH |
1128 | { |
1129 | if (src[2] == '1') | |
1130 | { | |
1131 | if (src[3] >= '0' && src[3] <= '5' | |
dead1419 | 1132 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1133 | { |
1134 | *mode = F_REG_N; | |
1135 | *reg = 10 + src[3] - '0'; | |
1136 | return 4; | |
1137 | } | |
1138 | } | |
1139 | if (src[2] >= '0' && src[2] <= '9' | |
dead1419 | 1140 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1141 | { |
1142 | *mode = F_REG_N; | |
1143 | *reg = (src[2] - '0'); | |
1144 | return 3; | |
1145 | } | |
1146 | } | |
e46fee70 | 1147 | if (l0 == 'd' && l1 == 'r') |
252b5132 RH |
1148 | { |
1149 | if (src[2] == '1') | |
1150 | { | |
1151 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 1152 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1153 | { |
1154 | *mode = D_REG_N; | |
1155 | *reg = 10 + src[3] - '0'; | |
1156 | return 4; | |
1157 | } | |
1158 | } | |
1159 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 1160 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1161 | { |
1162 | *mode = D_REG_N; | |
1163 | *reg = (src[2] - '0'); | |
1164 | return 3; | |
1165 | } | |
1166 | } | |
e46fee70 | 1167 | if (l0 == 'x' && l1 == 'd') |
252b5132 RH |
1168 | { |
1169 | if (src[2] == '1') | |
1170 | { | |
1171 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 1172 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1173 | { |
1174 | *mode = X_REG_N; | |
1175 | *reg = 11 + src[3] - '0'; | |
1176 | return 4; | |
1177 | } | |
1178 | } | |
1179 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 1180 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1181 | { |
1182 | *mode = X_REG_N; | |
1183 | *reg = (src[2] - '0') + 1; | |
1184 | return 3; | |
1185 | } | |
1186 | } | |
e46fee70 | 1187 | if (l0 == 'f' && l1 == 'v') |
252b5132 | 1188 | { |
dead1419 | 1189 | if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1190 | { |
1191 | *mode = V_REG_N; | |
1192 | *reg = 12; | |
1193 | return 4; | |
1194 | } | |
1195 | if ((src[2] == '0' || src[2] == '4' || src[2] == '8') | |
dead1419 | 1196 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1197 | { |
1198 | *mode = V_REG_N; | |
1199 | *reg = (src[2] - '0'); | |
1200 | return 3; | |
1201 | } | |
1202 | } | |
3882b010 L |
1203 | if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u' |
1204 | && TOLOWER (src[3]) == 'l' | |
dead1419 | 1205 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1206 | { |
1207 | *mode = FPUL_N; | |
1208 | return 4; | |
1209 | } | |
1210 | ||
3882b010 L |
1211 | if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's' |
1212 | && TOLOWER (src[3]) == 'c' | |
1213 | && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5])) | |
252b5132 RH |
1214 | { |
1215 | *mode = FPSCR_N; | |
1216 | return 5; | |
1217 | } | |
1218 | ||
3882b010 L |
1219 | if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't' |
1220 | && TOLOWER (src[3]) == 'r' | |
1221 | && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5])) | |
252b5132 RH |
1222 | { |
1223 | *mode = XMTRX_M4; | |
1224 | return 5; | |
1225 | } | |
1226 | ||
1227 | return 0; | |
1228 | } | |
1229 | ||
37dedf66 NC |
1230 | /* Like parse_reg_without_prefix, but this version supports |
1231 | $-prefixed register names if enabled by the user. */ | |
1232 | ||
1233 | static unsigned int | |
1234 | parse_reg (char *src, int *mode, int *reg) | |
1235 | { | |
1236 | unsigned int prefix; | |
1237 | unsigned int consumed; | |
1238 | ||
1239 | if (src[0] == '$') | |
1240 | { | |
1241 | if (allow_dollar_register_prefix) | |
1242 | { | |
1243 | src ++; | |
1244 | prefix = 1; | |
1245 | } | |
1246 | else | |
1247 | return 0; | |
1248 | } | |
1249 | else | |
1250 | prefix = 0; | |
1251 | ||
1252 | consumed = parse_reg_without_prefix (src, mode, reg); | |
1253 | ||
1254 | if (consumed == 0) | |
1255 | return 0; | |
1256 | ||
1257 | return consumed + prefix; | |
1258 | } | |
1259 | ||
c4aa876b | 1260 | static char * |
8edc77b9 | 1261 | parse_exp (char *s, sh_operand_info *op) |
252b5132 RH |
1262 | { |
1263 | char *save; | |
1264 | char *new; | |
1265 | ||
1266 | save = input_line_pointer; | |
1267 | input_line_pointer = s; | |
015551fc JR |
1268 | expression (&op->immediate); |
1269 | if (op->immediate.X_op == O_absent) | |
252b5132 | 1270 | as_bad (_("missing operand")); |
538cd60f AO |
1271 | #ifdef OBJ_ELF |
1272 | else if (op->immediate.X_op == O_PIC_reloc | |
1273 | || sh_PIC_related_p (op->immediate.X_add_symbol) | |
1274 | || sh_PIC_related_p (op->immediate.X_op_symbol)) | |
1275 | as_bad (_("misplaced PIC operand")); | |
1276 | #endif | |
252b5132 RH |
1277 | new = input_line_pointer; |
1278 | input_line_pointer = save; | |
1279 | return new; | |
1280 | } | |
1281 | ||
252b5132 RH |
1282 | /* The many forms of operand: |
1283 | ||
1284 | Rn Register direct | |
1285 | @Rn Register indirect | |
1286 | @Rn+ Autoincrement | |
1287 | @-Rn Autodecrement | |
1288 | @(disp:4,Rn) | |
1289 | @(disp:8,GBR) | |
1290 | @(disp:8,PC) | |
1291 | ||
1292 | @(R0,Rn) | |
1293 | @(R0,GBR) | |
1294 | ||
1295 | disp:8 | |
1296 | disp:12 | |
1297 | #imm8 | |
1298 | pr, gbr, vbr, macl, mach | |
252b5132 RH |
1299 | */ |
1300 | ||
c4aa876b | 1301 | static char * |
8edc77b9 | 1302 | parse_at (char *src, sh_operand_info *op) |
252b5132 RH |
1303 | { |
1304 | int len; | |
1305 | int mode; | |
1306 | src++; | |
1d70c7fb AO |
1307 | if (src[0] == '@') |
1308 | { | |
1309 | src = parse_at (src, op); | |
1310 | if (op->type == A_DISP_TBR) | |
1311 | op->type = A_DISP2_TBR; | |
1312 | else | |
1313 | as_bad (_("illegal double indirection")); | |
1314 | } | |
1315 | else if (src[0] == '-') | |
252b5132 | 1316 | { |
6b31947e | 1317 | /* Must be predecrement. */ |
252b5132 RH |
1318 | src++; |
1319 | ||
1320 | len = parse_reg (src, &mode, &(op->reg)); | |
1321 | if (mode != A_REG_N) | |
1322 | as_bad (_("illegal register after @-")); | |
1323 | ||
1324 | op->type = A_DEC_N; | |
1325 | src += len; | |
1326 | } | |
1327 | else if (src[0] == '(') | |
1328 | { | |
1329 | /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or | |
8d4d84c2 | 1330 | @(r0, rn). */ |
252b5132 RH |
1331 | src++; |
1332 | len = parse_reg (src, &mode, &(op->reg)); | |
1333 | if (len && mode == A_REG_N) | |
1334 | { | |
1335 | src += len; | |
1336 | if (op->reg != 0) | |
1337 | { | |
1338 | as_bad (_("must be @(r0,...)")); | |
1339 | } | |
1340 | if (src[0] == ',') | |
252b5132 | 1341 | { |
8d4d84c2 AO |
1342 | src++; |
1343 | /* Now can be rn or gbr. */ | |
1344 | len = parse_reg (src, &mode, &(op->reg)); | |
1345 | } | |
1346 | else | |
1347 | { | |
1348 | len = 0; | |
252b5132 | 1349 | } |
8d4d84c2 | 1350 | if (len) |
252b5132 | 1351 | { |
8d4d84c2 AO |
1352 | if (mode == A_GBR) |
1353 | { | |
1354 | op->type = A_R0_GBR; | |
1355 | } | |
1356 | else if (mode == A_REG_N) | |
1357 | { | |
1358 | op->type = A_IND_R0_REG_N; | |
1359 | } | |
1360 | else | |
1361 | { | |
1362 | as_bad (_("syntax error in @(r0,...)")); | |
1363 | } | |
252b5132 RH |
1364 | } |
1365 | else | |
1366 | { | |
8d4d84c2 | 1367 | as_bad (_("syntax error in @(r0...)")); |
252b5132 RH |
1368 | } |
1369 | } | |
1370 | else | |
1371 | { | |
8d4d84c2 | 1372 | /* Must be an @(disp,.. thing). */ |
015551fc | 1373 | src = parse_exp (src, op); |
252b5132 RH |
1374 | if (src[0] == ',') |
1375 | src++; | |
8d4d84c2 | 1376 | /* Now can be rn, gbr or pc. */ |
252b5132 RH |
1377 | len = parse_reg (src, &mode, &op->reg); |
1378 | if (len) | |
1379 | { | |
1380 | if (mode == A_REG_N) | |
1381 | { | |
1382 | op->type = A_DISP_REG_N; | |
1383 | } | |
1384 | else if (mode == A_GBR) | |
1385 | { | |
1386 | op->type = A_DISP_GBR; | |
1387 | } | |
1d70c7fb AO |
1388 | else if (mode == A_TBR) |
1389 | { | |
1390 | op->type = A_DISP_TBR; | |
1391 | } | |
015551fc | 1392 | else if (mode == A_PC) |
252b5132 | 1393 | { |
dbb4348d JR |
1394 | /* We want @(expr, pc) to uniformly address . + expr, |
1395 | no matter if expr is a constant, or a more complex | |
1396 | expression, e.g. sym-. or sym1-sym2. | |
1397 | However, we also used to accept @(sym,pc) | |
67c1ffbe | 1398 | as addressing sym, i.e. meaning the same as plain sym. |
dbb4348d JR |
1399 | Some existing code does use the @(sym,pc) syntax, so |
1400 | we give it the old semantics for now, but warn about | |
1401 | its use, so that users have some time to fix their code. | |
1402 | ||
1403 | Note that due to this backward compatibility hack, | |
1404 | we'll get unexpected results when @(offset, pc) is used, | |
1405 | and offset is a symbol that is set later to an an address | |
1406 | difference, or an external symbol that is set to an | |
1407 | address difference in another source file, so we want to | |
1408 | eventually remove it. */ | |
9691d64f JR |
1409 | if (op->immediate.X_op == O_symbol) |
1410 | { | |
1411 | op->type = A_DISP_PC; | |
1412 | as_warn (_("Deprecated syntax.")); | |
1413 | } | |
1414 | else | |
1415 | { | |
1416 | op->type = A_DISP_PC_ABS; | |
1417 | /* Such operands don't get corrected for PC==.+4, so | |
1418 | make the correction here. */ | |
1419 | op->immediate.X_add_number -= 4; | |
1420 | } | |
252b5132 RH |
1421 | } |
1422 | else | |
1423 | { | |
1424 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
1425 | } | |
1426 | } | |
1427 | else | |
1428 | { | |
1429 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
1430 | } | |
1431 | } | |
1432 | src += len; | |
1433 | if (src[0] != ')') | |
1434 | as_bad (_("expecting )")); | |
1435 | else | |
1436 | src++; | |
1437 | } | |
1438 | else | |
1439 | { | |
1440 | src += parse_reg (src, &mode, &(op->reg)); | |
1441 | if (mode != A_REG_N) | |
006299d3 NC |
1442 | as_bad (_("illegal register after @")); |
1443 | ||
252b5132 RH |
1444 | if (src[0] == '+') |
1445 | { | |
1000a02a NC |
1446 | char l0, l1; |
1447 | ||
252b5132 | 1448 | src++; |
1000a02a NC |
1449 | l0 = TOLOWER (src[0]); |
1450 | l1 = TOLOWER (src[1]); | |
1451 | ||
1452 | if ((l0 == 'r' && l1 == '8') | |
1453 | || (l0 == 'i' && (l1 == 'x' || l1 == 's'))) | |
d4845d57 JR |
1454 | { |
1455 | src += 2; | |
88da98f3 | 1456 | op->type = AX_PMOD_N; |
d4845d57 | 1457 | } |
006299d3 NC |
1458 | else if ( (l0 == 'r' && l1 == '9') |
1459 | || (l0 == 'i' && l1 == 'y')) | |
d4845d57 JR |
1460 | { |
1461 | src += 2; | |
88da98f3 | 1462 | op->type = AY_PMOD_N; |
d4845d57 JR |
1463 | } |
1464 | else | |
1465 | op->type = A_INC_N; | |
252b5132 RH |
1466 | } |
1467 | else | |
006299d3 | 1468 | op->type = A_IND_N; |
252b5132 RH |
1469 | } |
1470 | return src; | |
1471 | } | |
1472 | ||
1473 | static void | |
8edc77b9 | 1474 | get_operand (char **ptr, sh_operand_info *op) |
252b5132 RH |
1475 | { |
1476 | char *src = *ptr; | |
1477 | int mode = -1; | |
1478 | unsigned int len; | |
1479 | ||
1480 | if (src[0] == '#') | |
1481 | { | |
1482 | src++; | |
015551fc | 1483 | *ptr = parse_exp (src, op); |
252b5132 RH |
1484 | op->type = A_IMM; |
1485 | return; | |
1486 | } | |
1487 | ||
1488 | else if (src[0] == '@') | |
1489 | { | |
1490 | *ptr = parse_at (src, op); | |
1491 | return; | |
1492 | } | |
1493 | len = parse_reg (src, &mode, &(op->reg)); | |
1494 | if (len) | |
1495 | { | |
1496 | *ptr = src + len; | |
1497 | op->type = mode; | |
1498 | return; | |
1499 | } | |
1500 | else | |
1501 | { | |
6b31947e | 1502 | /* Not a reg, the only thing left is a displacement. */ |
015551fc | 1503 | *ptr = parse_exp (src, op); |
252b5132 RH |
1504 | op->type = A_DISP_PC; |
1505 | return; | |
1506 | } | |
1507 | } | |
1508 | ||
c4aa876b | 1509 | static char * |
8edc77b9 | 1510 | get_operands (sh_opcode_info *info, char *args, sh_operand_info *operand) |
252b5132 RH |
1511 | { |
1512 | char *ptr = args; | |
1513 | if (info->arg[0]) | |
1514 | { | |
d4845d57 JR |
1515 | /* The pre-processor will eliminate whitespace in front of '@' |
1516 | after the first argument; we may be called multiple times | |
1517 | from assemble_ppi, so don't insist on finding whitespace here. */ | |
1518 | if (*ptr == ' ') | |
1519 | ptr++; | |
252b5132 RH |
1520 | |
1521 | get_operand (&ptr, operand + 0); | |
1522 | if (info->arg[1]) | |
1523 | { | |
1524 | if (*ptr == ',') | |
1525 | { | |
1526 | ptr++; | |
1527 | } | |
1528 | get_operand (&ptr, operand + 1); | |
52ccafd0 JR |
1529 | /* ??? Hack: psha/pshl have a varying operand number depending on |
1530 | the type of the first operand. We handle this by having the | |
1531 | three-operand version first and reducing the number of operands | |
1532 | parsed to two if we see that the first operand is an immediate. | |
1533 | This works because no insn with three operands has an immediate | |
1534 | as first operand. */ | |
1535 | if (info->arg[2] && operand[0].type != A_IMM) | |
252b5132 RH |
1536 | { |
1537 | if (*ptr == ',') | |
1538 | { | |
1539 | ptr++; | |
1540 | } | |
1541 | get_operand (&ptr, operand + 2); | |
1542 | } | |
1543 | else | |
1544 | { | |
1545 | operand[2].type = 0; | |
1546 | } | |
1547 | } | |
1548 | else | |
1549 | { | |
1550 | operand[1].type = 0; | |
1551 | operand[2].type = 0; | |
1552 | } | |
1553 | } | |
1554 | else | |
1555 | { | |
1556 | operand[0].type = 0; | |
1557 | operand[1].type = 0; | |
1558 | operand[2].type = 0; | |
1559 | } | |
1560 | return ptr; | |
1561 | } | |
1562 | ||
1563 | /* Passed a pointer to a list of opcodes which use different | |
1564 | addressing modes, return the opcode which matches the opcodes | |
6b31947e | 1565 | provided. */ |
252b5132 | 1566 | |
c4aa876b | 1567 | static sh_opcode_info * |
8edc77b9 | 1568 | get_specific (sh_opcode_info *opcode, sh_operand_info *operands) |
252b5132 RH |
1569 | { |
1570 | sh_opcode_info *this_try = opcode; | |
1571 | char *name = opcode->name; | |
1572 | int n = 0; | |
c4aa876b | 1573 | |
252b5132 RH |
1574 | while (opcode->name) |
1575 | { | |
1576 | this_try = opcode++; | |
5ff37431 | 1577 | if ((this_try->name != name) && (strcmp (this_try->name, name) != 0)) |
252b5132 RH |
1578 | { |
1579 | /* We've looked so far down the table that we've run out of | |
6b31947e | 1580 | opcodes with the same name. */ |
252b5132 RH |
1581 | return 0; |
1582 | } | |
c4aa876b | 1583 | |
6b31947e | 1584 | /* Look at both operands needed by the opcodes and provided by |
252b5132 RH |
1585 | the user - since an arg test will often fail on the same arg |
1586 | again and again, we'll try and test the last failing arg the | |
6b31947e | 1587 | first on each opcode try. */ |
252b5132 RH |
1588 | for (n = 0; this_try->arg[n]; n++) |
1589 | { | |
1590 | sh_operand_info *user = operands + n; | |
1591 | sh_arg_type arg = this_try->arg[n]; | |
c4aa876b | 1592 | |
1d70c7fb AO |
1593 | if (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh2a_nofpu_up) |
1594 | && ( arg == A_DISP_REG_M | |
1595 | || arg == A_DISP_REG_N)) | |
1596 | { | |
1597 | /* Check a few key IMM* fields for overflow. */ | |
1598 | int opf; | |
1599 | long val = user->immediate.X_add_number; | |
1600 | ||
1601 | for (opf = 0; opf < 4; opf ++) | |
1602 | switch (this_try->nibbles[opf]) | |
1603 | { | |
1604 | case IMM0_4: | |
1605 | case IMM1_4: | |
1606 | if (val < 0 || val > 15) | |
1607 | goto fail; | |
1608 | break; | |
1609 | case IMM0_4BY2: | |
1610 | case IMM1_4BY2: | |
1611 | if (val < 0 || val > 15 * 2) | |
1612 | goto fail; | |
1613 | break; | |
1614 | case IMM0_4BY4: | |
1615 | case IMM1_4BY4: | |
1616 | if (val < 0 || val > 15 * 4) | |
1617 | goto fail; | |
1618 | break; | |
1619 | default: | |
1620 | break; | |
1621 | } | |
1622 | } | |
252b5132 RH |
1623 | switch (arg) |
1624 | { | |
7679ead9 AO |
1625 | case A_DISP_PC: |
1626 | if (user->type == A_DISP_PC_ABS) | |
1627 | break; | |
1628 | /* Fall through. */ | |
252b5132 RH |
1629 | case A_IMM: |
1630 | case A_BDISP12: | |
1631 | case A_BDISP8: | |
1632 | case A_DISP_GBR: | |
1d70c7fb | 1633 | case A_DISP2_TBR: |
252b5132 RH |
1634 | case A_MACH: |
1635 | case A_PR: | |
1636 | case A_MACL: | |
1637 | if (user->type != arg) | |
1638 | goto fail; | |
1639 | break; | |
1640 | case A_R0: | |
1641 | /* opcode needs r0 */ | |
1642 | if (user->type != A_REG_N || user->reg != 0) | |
1643 | goto fail; | |
1644 | break; | |
1645 | case A_R0_GBR: | |
1646 | if (user->type != A_R0_GBR || user->reg != 0) | |
1647 | goto fail; | |
1648 | break; | |
1649 | case F_FR0: | |
1650 | if (user->type != F_REG_N || user->reg != 0) | |
1651 | goto fail; | |
1652 | break; | |
1653 | ||
1654 | case A_REG_N: | |
1655 | case A_INC_N: | |
1656 | case A_DEC_N: | |
1657 | case A_IND_N: | |
1658 | case A_IND_R0_REG_N: | |
1659 | case A_DISP_REG_N: | |
1660 | case F_REG_N: | |
1661 | case D_REG_N: | |
1662 | case X_REG_N: | |
1663 | case V_REG_N: | |
1664 | case FPUL_N: | |
1665 | case FPSCR_N: | |
d4845d57 | 1666 | case DSP_REG_N: |
252b5132 RH |
1667 | /* Opcode needs rn */ |
1668 | if (user->type != arg) | |
1669 | goto fail; | |
1670 | reg_n = user->reg; | |
1671 | break; | |
252b5132 RH |
1672 | case DX_REG_N: |
1673 | if (user->type != D_REG_N && user->type != X_REG_N) | |
1674 | goto fail; | |
1675 | reg_n = user->reg; | |
1676 | break; | |
1677 | case A_GBR: | |
1d70c7fb | 1678 | case A_TBR: |
252b5132 RH |
1679 | case A_SR: |
1680 | case A_VBR: | |
d4845d57 JR |
1681 | case A_DSR: |
1682 | case A_MOD: | |
1683 | case A_RE: | |
1684 | case A_RS: | |
252b5132 RH |
1685 | case A_SSR: |
1686 | case A_SPC: | |
1687 | case A_SGR: | |
1688 | case A_DBR: | |
1689 | if (user->type != arg) | |
1690 | goto fail; | |
1691 | break; | |
1692 | ||
c4aa876b | 1693 | case A_REG_B: |
252b5132 RH |
1694 | if (user->type != arg) |
1695 | goto fail; | |
1696 | reg_b = user->reg; | |
1697 | break; | |
1698 | ||
1d70c7fb AO |
1699 | case A_INC_R15: |
1700 | if (user->type != A_INC_N) | |
1701 | goto fail; | |
1702 | if (user->reg != 15) | |
1703 | goto fail; | |
1704 | reg_n = user->reg; | |
1705 | break; | |
1706 | ||
1707 | case A_DEC_R15: | |
1708 | if (user->type != A_DEC_N) | |
1709 | goto fail; | |
1710 | if (user->reg != 15) | |
1711 | goto fail; | |
1712 | reg_n = user->reg; | |
1713 | break; | |
1714 | ||
252b5132 RH |
1715 | case A_REG_M: |
1716 | case A_INC_M: | |
1717 | case A_DEC_M: | |
1718 | case A_IND_M: | |
1719 | case A_IND_R0_REG_M: | |
1720 | case A_DISP_REG_M: | |
d4845d57 | 1721 | case DSP_REG_M: |
252b5132 RH |
1722 | /* Opcode needs rn */ |
1723 | if (user->type != arg - A_REG_M + A_REG_N) | |
1724 | goto fail; | |
1725 | reg_m = user->reg; | |
1726 | break; | |
1727 | ||
88da98f3 MS |
1728 | case AS_DEC_N: |
1729 | if (user->type != A_DEC_N) | |
1730 | goto fail; | |
1731 | if (user->reg < 2 || user->reg > 5) | |
1732 | goto fail; | |
1733 | reg_n = user->reg; | |
1734 | break; | |
13ef8878 | 1735 | |
88da98f3 MS |
1736 | case AS_INC_N: |
1737 | if (user->type != A_INC_N) | |
1738 | goto fail; | |
1739 | if (user->reg < 2 || user->reg > 5) | |
1740 | goto fail; | |
1741 | reg_n = user->reg; | |
1742 | break; | |
13ef8878 | 1743 | |
88da98f3 MS |
1744 | case AS_IND_N: |
1745 | if (user->type != A_IND_N) | |
1746 | goto fail; | |
1747 | if (user->reg < 2 || user->reg > 5) | |
1748 | goto fail; | |
1749 | reg_n = user->reg; | |
1750 | break; | |
13ef8878 | 1751 | |
88da98f3 MS |
1752 | case AS_PMOD_N: |
1753 | if (user->type != AX_PMOD_N) | |
1754 | goto fail; | |
1755 | if (user->reg < 2 || user->reg > 5) | |
1756 | goto fail; | |
1757 | reg_n = user->reg; | |
1758 | break; | |
13ef8878 | 1759 | |
88da98f3 MS |
1760 | case AX_INC_N: |
1761 | if (user->type != A_INC_N) | |
1762 | goto fail; | |
1763 | if (user->reg < 4 || user->reg > 5) | |
1764 | goto fail; | |
1765 | reg_n = user->reg; | |
1766 | break; | |
13ef8878 | 1767 | |
88da98f3 MS |
1768 | case AX_IND_N: |
1769 | if (user->type != A_IND_N) | |
1770 | goto fail; | |
1771 | if (user->reg < 4 || user->reg > 5) | |
1772 | goto fail; | |
1773 | reg_n = user->reg; | |
1774 | break; | |
13ef8878 | 1775 | |
88da98f3 MS |
1776 | case AX_PMOD_N: |
1777 | if (user->type != AX_PMOD_N) | |
1778 | goto fail; | |
1779 | if (user->reg < 4 || user->reg > 5) | |
1780 | goto fail; | |
1781 | reg_n = user->reg; | |
1782 | break; | |
13ef8878 | 1783 | |
88da98f3 MS |
1784 | case AXY_INC_N: |
1785 | if (user->type != A_INC_N) | |
1786 | goto fail; | |
1787 | if ((user->reg < 4 || user->reg > 5) | |
1788 | && (user->reg < 0 || user->reg > 1)) | |
1789 | goto fail; | |
1790 | reg_n = user->reg; | |
1791 | break; | |
13ef8878 | 1792 | |
88da98f3 MS |
1793 | case AXY_IND_N: |
1794 | if (user->type != A_IND_N) | |
1795 | goto fail; | |
1796 | if ((user->reg < 4 || user->reg > 5) | |
1797 | && (user->reg < 0 || user->reg > 1)) | |
1798 | goto fail; | |
1799 | reg_n = user->reg; | |
1800 | break; | |
13ef8878 | 1801 | |
88da98f3 MS |
1802 | case AXY_PMOD_N: |
1803 | if (user->type != AX_PMOD_N) | |
1804 | goto fail; | |
1805 | if ((user->reg < 4 || user->reg > 5) | |
1806 | && (user->reg < 0 || user->reg > 1)) | |
1807 | goto fail; | |
1808 | reg_n = user->reg; | |
1809 | break; | |
13ef8878 | 1810 | |
88da98f3 MS |
1811 | case AY_INC_N: |
1812 | if (user->type != A_INC_N) | |
1813 | goto fail; | |
1814 | if (user->reg < 6 || user->reg > 7) | |
1815 | goto fail; | |
1816 | reg_n = user->reg; | |
1817 | break; | |
13ef8878 | 1818 | |
88da98f3 MS |
1819 | case AY_IND_N: |
1820 | if (user->type != A_IND_N) | |
1821 | goto fail; | |
1822 | if (user->reg < 6 || user->reg > 7) | |
1823 | goto fail; | |
1824 | reg_n = user->reg; | |
1825 | break; | |
13ef8878 | 1826 | |
88da98f3 MS |
1827 | case AY_PMOD_N: |
1828 | if (user->type != AY_PMOD_N) | |
1829 | goto fail; | |
1830 | if (user->reg < 6 || user->reg > 7) | |
1831 | goto fail; | |
1832 | reg_n = user->reg; | |
1833 | break; | |
1834 | ||
1835 | case AYX_INC_N: | |
1836 | if (user->type != A_INC_N) | |
1837 | goto fail; | |
1838 | if ((user->reg < 6 || user->reg > 7) | |
1839 | && (user->reg < 2 || user->reg > 3)) | |
1840 | goto fail; | |
1841 | reg_n = user->reg; | |
1842 | break; | |
13ef8878 | 1843 | |
88da98f3 MS |
1844 | case AYX_IND_N: |
1845 | if (user->type != A_IND_N) | |
1846 | goto fail; | |
1847 | if ((user->reg < 6 || user->reg > 7) | |
1848 | && (user->reg < 2 || user->reg > 3)) | |
1849 | goto fail; | |
1850 | reg_n = user->reg; | |
1851 | break; | |
13ef8878 | 1852 | |
88da98f3 MS |
1853 | case AYX_PMOD_N: |
1854 | if (user->type != AY_PMOD_N) | |
1855 | goto fail; | |
1856 | if ((user->reg < 6 || user->reg > 7) | |
1857 | && (user->reg < 2 || user->reg > 3)) | |
1858 | goto fail; | |
1859 | reg_n = user->reg; | |
1860 | break; | |
1861 | ||
1862 | case DSP_REG_A_M: | |
1863 | if (user->type != DSP_REG_N) | |
1864 | goto fail; | |
1865 | if (user->reg != A_A0_NUM | |
1866 | && user->reg != A_A1_NUM) | |
1867 | goto fail; | |
1868 | reg_m = user->reg; | |
1869 | break; | |
1870 | ||
1871 | case DSP_REG_AX: | |
1872 | if (user->type != DSP_REG_N) | |
1873 | goto fail; | |
1874 | switch (user->reg) | |
1875 | { | |
1876 | case A_A0_NUM: | |
1877 | reg_x = 0; | |
1878 | break; | |
1879 | case A_A1_NUM: | |
1880 | reg_x = 2; | |
1881 | break; | |
1882 | case A_X0_NUM: | |
1883 | reg_x = 1; | |
1884 | break; | |
1885 | case A_X1_NUM: | |
1886 | reg_x = 3; | |
1887 | break; | |
1888 | default: | |
1889 | goto fail; | |
1890 | } | |
1891 | break; | |
1892 | ||
1893 | case DSP_REG_XY: | |
1894 | if (user->type != DSP_REG_N) | |
1895 | goto fail; | |
1896 | switch (user->reg) | |
1897 | { | |
1898 | case A_X0_NUM: | |
1899 | reg_x = 0; | |
1900 | break; | |
1901 | case A_X1_NUM: | |
1902 | reg_x = 2; | |
1903 | break; | |
1904 | case A_Y0_NUM: | |
1905 | reg_x = 1; | |
1906 | break; | |
1907 | case A_Y1_NUM: | |
1908 | reg_x = 3; | |
1909 | break; | |
1910 | default: | |
1911 | goto fail; | |
1912 | } | |
1913 | break; | |
1914 | ||
1915 | case DSP_REG_AY: | |
1916 | if (user->type != DSP_REG_N) | |
1917 | goto fail; | |
1918 | switch (user->reg) | |
1919 | { | |
1920 | case A_A0_NUM: | |
1921 | reg_y = 0; | |
1922 | break; | |
1923 | case A_A1_NUM: | |
1924 | reg_y = 1; | |
1925 | break; | |
1926 | case A_Y0_NUM: | |
1927 | reg_y = 2; | |
1928 | break; | |
1929 | case A_Y1_NUM: | |
1930 | reg_y = 3; | |
1931 | break; | |
1932 | default: | |
1933 | goto fail; | |
1934 | } | |
1935 | break; | |
1936 | ||
1937 | case DSP_REG_YX: | |
1938 | if (user->type != DSP_REG_N) | |
1939 | goto fail; | |
1940 | switch (user->reg) | |
1941 | { | |
1942 | case A_Y0_NUM: | |
1943 | reg_y = 0; | |
1944 | break; | |
1945 | case A_Y1_NUM: | |
1946 | reg_y = 1; | |
1947 | break; | |
1948 | case A_X0_NUM: | |
1949 | reg_y = 2; | |
1950 | break; | |
1951 | case A_X1_NUM: | |
1952 | reg_y = 3; | |
1953 | break; | |
1954 | default: | |
1955 | goto fail; | |
1956 | } | |
1957 | break; | |
1958 | ||
d4845d57 JR |
1959 | case DSP_REG_X: |
1960 | if (user->type != DSP_REG_N) | |
1961 | goto fail; | |
1962 | switch (user->reg) | |
1963 | { | |
1964 | case A_X0_NUM: | |
1965 | reg_x = 0; | |
1966 | break; | |
1967 | case A_X1_NUM: | |
1968 | reg_x = 1; | |
1969 | break; | |
1970 | case A_A0_NUM: | |
1971 | reg_x = 2; | |
1972 | break; | |
1973 | case A_A1_NUM: | |
1974 | reg_x = 3; | |
1975 | break; | |
1976 | default: | |
1977 | goto fail; | |
1978 | } | |
1979 | break; | |
1980 | ||
1981 | case DSP_REG_Y: | |
1982 | if (user->type != DSP_REG_N) | |
1983 | goto fail; | |
1984 | switch (user->reg) | |
1985 | { | |
1986 | case A_Y0_NUM: | |
1987 | reg_y = 0; | |
1988 | break; | |
1989 | case A_Y1_NUM: | |
1990 | reg_y = 1; | |
1991 | break; | |
1992 | case A_M0_NUM: | |
1993 | reg_y = 2; | |
1994 | break; | |
1995 | case A_M1_NUM: | |
1996 | reg_y = 3; | |
1997 | break; | |
1998 | default: | |
1999 | goto fail; | |
2000 | } | |
2001 | break; | |
2002 | ||
2003 | case DSP_REG_E: | |
2004 | if (user->type != DSP_REG_N) | |
2005 | goto fail; | |
2006 | switch (user->reg) | |
2007 | { | |
2008 | case A_X0_NUM: | |
2009 | reg_efg = 0 << 10; | |
2010 | break; | |
2011 | case A_X1_NUM: | |
2012 | reg_efg = 1 << 10; | |
2013 | break; | |
2014 | case A_Y0_NUM: | |
2015 | reg_efg = 2 << 10; | |
2016 | break; | |
2017 | case A_A1_NUM: | |
2018 | reg_efg = 3 << 10; | |
2019 | break; | |
2020 | default: | |
2021 | goto fail; | |
2022 | } | |
2023 | break; | |
2024 | ||
2025 | case DSP_REG_F: | |
2026 | if (user->type != DSP_REG_N) | |
2027 | goto fail; | |
2028 | switch (user->reg) | |
2029 | { | |
2030 | case A_Y0_NUM: | |
2031 | reg_efg |= 0 << 8; | |
2032 | break; | |
2033 | case A_Y1_NUM: | |
2034 | reg_efg |= 1 << 8; | |
2035 | break; | |
2036 | case A_X0_NUM: | |
2037 | reg_efg |= 2 << 8; | |
2038 | break; | |
2039 | case A_A1_NUM: | |
2040 | reg_efg |= 3 << 8; | |
2041 | break; | |
2042 | default: | |
2043 | goto fail; | |
2044 | } | |
2045 | break; | |
2046 | ||
2047 | case DSP_REG_G: | |
2048 | if (user->type != DSP_REG_N) | |
2049 | goto fail; | |
2050 | switch (user->reg) | |
2051 | { | |
2052 | case A_M0_NUM: | |
2053 | reg_efg |= 0 << 2; | |
2054 | break; | |
2055 | case A_M1_NUM: | |
2056 | reg_efg |= 1 << 2; | |
2057 | break; | |
2058 | case A_A0_NUM: | |
2059 | reg_efg |= 2 << 2; | |
2060 | break; | |
2061 | case A_A1_NUM: | |
2062 | reg_efg |= 3 << 2; | |
2063 | break; | |
2064 | default: | |
2065 | goto fail; | |
2066 | } | |
2067 | break; | |
2068 | ||
2069 | case A_A0: | |
2070 | if (user->type != DSP_REG_N || user->reg != A_A0_NUM) | |
2071 | goto fail; | |
2072 | break; | |
2073 | case A_X0: | |
2074 | if (user->type != DSP_REG_N || user->reg != A_X0_NUM) | |
2075 | goto fail; | |
2076 | break; | |
2077 | case A_X1: | |
2078 | if (user->type != DSP_REG_N || user->reg != A_X1_NUM) | |
2079 | goto fail; | |
2080 | break; | |
2081 | case A_Y0: | |
2082 | if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) | |
2083 | goto fail; | |
2084 | break; | |
2085 | case A_Y1: | |
2086 | if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) | |
2087 | goto fail; | |
2088 | break; | |
2089 | ||
252b5132 RH |
2090 | case F_REG_M: |
2091 | case D_REG_M: | |
2092 | case X_REG_M: | |
2093 | case V_REG_M: | |
2094 | case FPUL_M: | |
2095 | case FPSCR_M: | |
2096 | /* Opcode needs rn */ | |
2097 | if (user->type != arg - F_REG_M + F_REG_N) | |
2098 | goto fail; | |
2099 | reg_m = user->reg; | |
2100 | break; | |
2101 | case DX_REG_M: | |
2102 | if (user->type != D_REG_N && user->type != X_REG_N) | |
2103 | goto fail; | |
2104 | reg_m = user->reg; | |
2105 | break; | |
2106 | case XMTRX_M4: | |
2107 | if (user->type != XMTRX_M4) | |
2108 | goto fail; | |
2109 | reg_m = 4; | |
2110 | break; | |
c4aa876b | 2111 | |
252b5132 RH |
2112 | default: |
2113 | printf (_("unhandled %d\n"), arg); | |
2114 | goto fail; | |
2115 | } | |
2116 | } | |
f6f9408f | 2117 | if ( !SH_MERGE_ARCH_SET_VALID (valid_arch, this_try->arch)) |
a37c8f88 | 2118 | goto fail; |
f6f9408f | 2119 | valid_arch = SH_MERGE_ARCH_SET (valid_arch, this_try->arch); |
252b5132 | 2120 | return this_try; |
c4aa876b NC |
2121 | fail: |
2122 | ; | |
252b5132 RH |
2123 | } |
2124 | ||
2125 | return 0; | |
2126 | } | |
2127 | ||
252b5132 | 2128 | static void |
8edc77b9 | 2129 | insert (char *where, int how, int pcrel, sh_operand_info *op) |
252b5132 RH |
2130 | { |
2131 | fix_new_exp (frag_now, | |
2132 | where - frag_now->fr_literal, | |
2133 | 2, | |
015551fc | 2134 | &op->immediate, |
252b5132 RH |
2135 | pcrel, |
2136 | how); | |
2137 | } | |
2138 | ||
1d70c7fb AO |
2139 | static void |
2140 | insert4 (char * where, int how, int pcrel, sh_operand_info * op) | |
2141 | { | |
2142 | fix_new_exp (frag_now, | |
2143 | where - frag_now->fr_literal, | |
2144 | 4, | |
2145 | & op->immediate, | |
2146 | pcrel, | |
2147 | how); | |
2148 | } | |
252b5132 | 2149 | static void |
8edc77b9 | 2150 | build_relax (sh_opcode_info *opcode, sh_operand_info *op) |
252b5132 RH |
2151 | { |
2152 | int high_byte = target_big_endian ? 0 : 1; | |
2153 | char *p; | |
2154 | ||
2155 | if (opcode->arg[0] == A_BDISP8) | |
2156 | { | |
2157 | int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; | |
2158 | p = frag_var (rs_machine_dependent, | |
2159 | md_relax_table[C (what, COND32)].rlx_length, | |
2160 | md_relax_table[C (what, COND8)].rlx_length, | |
2161 | C (what, 0), | |
015551fc JR |
2162 | op->immediate.X_add_symbol, |
2163 | op->immediate.X_add_number, | |
252b5132 RH |
2164 | 0); |
2165 | p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); | |
2166 | } | |
2167 | else if (opcode->arg[0] == A_BDISP12) | |
2168 | { | |
2169 | p = frag_var (rs_machine_dependent, | |
2170 | md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, | |
2171 | md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, | |
2172 | C (UNCOND_JUMP, 0), | |
015551fc JR |
2173 | op->immediate.X_add_symbol, |
2174 | op->immediate.X_add_number, | |
252b5132 RH |
2175 | 0); |
2176 | p[high_byte] = (opcode->nibbles[0] << 4); | |
2177 | } | |
2178 | ||
2179 | } | |
2180 | ||
6b31947e | 2181 | /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */ |
d67b5d6d | 2182 | |
015551fc | 2183 | static char * |
8edc77b9 | 2184 | insert_loop_bounds (char *output, sh_operand_info *operand) |
015551fc JR |
2185 | { |
2186 | char *name; | |
2187 | symbolS *end_sym; | |
2188 | ||
2189 | /* Since the low byte of the opcode will be overwritten by the reloc, we | |
2190 | can just stash the high byte into both bytes and ignore endianness. */ | |
2191 | output[0] = 0x8c; | |
2192 | output[1] = 0x8c; | |
2193 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
2194 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
2195 | ||
2196 | if (sh_relax) | |
2197 | { | |
2198 | static int count = 0; | |
2199 | ||
2200 | /* If the last loop insn is a two-byte-insn, it is in danger of being | |
2201 | swapped with the insn after it. To prevent this, create a new | |
2202 | symbol - complete with SH_LABEL reloc - after the last loop insn. | |
2203 | If the last loop insn is four bytes long, the symbol will be | |
2204 | right in the middle, but four byte insns are not swapped anyways. */ | |
2205 | /* A REPEAT takes 6 bytes. The SH has a 32 bit address space. | |
2206 | Hence a 9 digit number should be enough to count all REPEATs. */ | |
2207 | name = alloca (11); | |
2208 | sprintf (name, "_R%x", count++ & 0x3fffffff); | |
c4aa876b | 2209 | end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag); |
015551fc JR |
2210 | /* Make this a local symbol. */ |
2211 | #ifdef OBJ_COFF | |
2212 | SF_SET_LOCAL (end_sym); | |
2213 | #endif /* OBJ_COFF */ | |
2214 | symbol_table_insert (end_sym); | |
2215 | end_sym->sy_value = operand[1].immediate; | |
2216 | end_sym->sy_value.X_add_number += 2; | |
2217 | fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL); | |
2218 | } | |
2219 | ||
2220 | output = frag_more (2); | |
2221 | output[0] = 0x8e; | |
2222 | output[1] = 0x8e; | |
2223 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
2224 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
2225 | ||
2226 | return frag_more (2); | |
2227 | } | |
2228 | ||
d67b5d6d | 2229 | /* Now we know what sort of opcodes it is, let's build the bytes. */ |
6b31947e | 2230 | |
0d10e182 | 2231 | static unsigned int |
8edc77b9 | 2232 | build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand) |
252b5132 RH |
2233 | { |
2234 | int index; | |
1d70c7fb AO |
2235 | char nbuf[8]; |
2236 | char *output; | |
0d10e182 | 2237 | unsigned int size = 2; |
252b5132 | 2238 | int low_byte = target_big_endian ? 1 : 0; |
1d70c7fb AO |
2239 | int max_index = 4; |
2240 | ||
252b5132 RH |
2241 | nbuf[0] = 0; |
2242 | nbuf[1] = 0; | |
2243 | nbuf[2] = 0; | |
2244 | nbuf[3] = 0; | |
1d70c7fb AO |
2245 | nbuf[4] = 0; |
2246 | nbuf[5] = 0; | |
2247 | nbuf[6] = 0; | |
2248 | nbuf[7] = 0; | |
2249 | ||
2250 | if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32)) | |
2251 | { | |
2252 | output = frag_more (4); | |
2253 | size = 4; | |
2254 | max_index = 8; | |
2255 | } | |
2256 | else | |
2257 | output = frag_more (2); | |
252b5132 | 2258 | |
1d70c7fb | 2259 | for (index = 0; index < max_index; index++) |
252b5132 RH |
2260 | { |
2261 | sh_nibble_type i = opcode->nibbles[index]; | |
2262 | if (i < 16) | |
2263 | { | |
2264 | nbuf[index] = i; | |
2265 | } | |
2266 | else | |
2267 | { | |
2268 | switch (i) | |
2269 | { | |
2270 | case REG_N: | |
6a5709a5 | 2271 | case REG_N_D: |
252b5132 RH |
2272 | nbuf[index] = reg_n; |
2273 | break; | |
2274 | case REG_M: | |
2275 | nbuf[index] = reg_m; | |
2276 | break; | |
d4845d57 JR |
2277 | case SDT_REG_N: |
2278 | if (reg_n < 2 || reg_n > 5) | |
2279 | as_bad (_("Invalid register: 'r%d'"), reg_n); | |
2280 | nbuf[index] = (reg_n & 3) | 4; | |
2281 | break; | |
252b5132 RH |
2282 | case REG_NM: |
2283 | nbuf[index] = reg_n | (reg_m >> 2); | |
2284 | break; | |
c4aa876b | 2285 | case REG_B: |
252b5132 RH |
2286 | nbuf[index] = reg_b | 0x08; |
2287 | break; | |
6a5709a5 JR |
2288 | case REG_N_B01: |
2289 | nbuf[index] = reg_n | 0x01; | |
2290 | break; | |
1d70c7fb AO |
2291 | case IMM0_3s: |
2292 | nbuf[index] |= 0x08; | |
2293 | case IMM0_3c: | |
2294 | insert (output + low_byte, BFD_RELOC_SH_IMM3, 0, operand); | |
2295 | break; | |
2296 | case IMM0_3Us: | |
2297 | nbuf[index] |= 0x80; | |
2298 | case IMM0_3Uc: | |
2299 | insert (output + low_byte, BFD_RELOC_SH_IMM3U, 0, operand); | |
2300 | break; | |
2301 | case DISP0_12: | |
2302 | insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand); | |
2303 | break; | |
2304 | case DISP0_12BY2: | |
2305 | insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand); | |
2306 | break; | |
2307 | case DISP0_12BY4: | |
2308 | insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand); | |
2309 | break; | |
2310 | case DISP0_12BY8: | |
2311 | insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand); | |
2312 | break; | |
2313 | case DISP1_12: | |
2314 | insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand+1); | |
2315 | break; | |
2316 | case DISP1_12BY2: | |
2317 | insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand+1); | |
2318 | break; | |
2319 | case DISP1_12BY4: | |
2320 | insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand+1); | |
2321 | break; | |
2322 | case DISP1_12BY8: | |
2323 | insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand+1); | |
2324 | break; | |
2325 | case IMM0_20_4: | |
2326 | break; | |
2327 | case IMM0_20: | |
2328 | insert4 (output, BFD_RELOC_SH_DISP20, 0, operand); | |
2329 | break; | |
2330 | case IMM0_20BY8: | |
2331 | insert4 (output, BFD_RELOC_SH_DISP20BY8, 0, operand); | |
2332 | break; | |
015551fc JR |
2333 | case IMM0_4BY4: |
2334 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); | |
2335 | break; | |
2336 | case IMM0_4BY2: | |
2337 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand); | |
2338 | break; | |
2339 | case IMM0_4: | |
2340 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand); | |
2341 | break; | |
2342 | case IMM1_4BY4: | |
2343 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1); | |
2344 | break; | |
2345 | case IMM1_4BY2: | |
2346 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1); | |
252b5132 | 2347 | break; |
015551fc JR |
2348 | case IMM1_4: |
2349 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1); | |
252b5132 | 2350 | break; |
015551fc JR |
2351 | case IMM0_8BY4: |
2352 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand); | |
252b5132 | 2353 | break; |
015551fc JR |
2354 | case IMM0_8BY2: |
2355 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand); | |
252b5132 | 2356 | break; |
015551fc JR |
2357 | case IMM0_8: |
2358 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand); | |
252b5132 | 2359 | break; |
015551fc JR |
2360 | case IMM1_8BY4: |
2361 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1); | |
252b5132 | 2362 | break; |
015551fc JR |
2363 | case IMM1_8BY2: |
2364 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1); | |
2365 | break; | |
2366 | case IMM1_8: | |
2367 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1); | |
252b5132 RH |
2368 | break; |
2369 | case PCRELIMM_8BY4: | |
7679ead9 AO |
2370 | insert (output, BFD_RELOC_SH_PCRELIMM8BY4, |
2371 | operand->type != A_DISP_PC_ABS, operand); | |
252b5132 RH |
2372 | break; |
2373 | case PCRELIMM_8BY2: | |
7679ead9 AO |
2374 | insert (output, BFD_RELOC_SH_PCRELIMM8BY2, |
2375 | operand->type != A_DISP_PC_ABS, operand); | |
015551fc JR |
2376 | break; |
2377 | case REPEAT: | |
2378 | output = insert_loop_bounds (output, operand); | |
2379 | nbuf[index] = opcode->nibbles[3]; | |
2380 | operand += 2; | |
252b5132 RH |
2381 | break; |
2382 | default: | |
2383 | printf (_("failed for %d\n"), i); | |
2384 | } | |
2385 | } | |
2386 | } | |
c4aa876b NC |
2387 | if (!target_big_endian) |
2388 | { | |
2389 | output[1] = (nbuf[0] << 4) | (nbuf[1]); | |
2390 | output[0] = (nbuf[2] << 4) | (nbuf[3]); | |
2391 | } | |
2392 | else | |
2393 | { | |
2394 | output[0] = (nbuf[0] << 4) | (nbuf[1]); | |
2395 | output[1] = (nbuf[2] << 4) | (nbuf[3]); | |
2396 | } | |
1d70c7fb AO |
2397 | if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32)) |
2398 | { | |
2399 | if (!target_big_endian) | |
2400 | { | |
2401 | output[3] = (nbuf[4] << 4) | (nbuf[5]); | |
2402 | output[2] = (nbuf[6] << 4) | (nbuf[7]); | |
2403 | } | |
2404 | else | |
2405 | { | |
2406 | output[2] = (nbuf[4] << 4) | (nbuf[5]); | |
2407 | output[3] = (nbuf[6] << 4) | (nbuf[7]); | |
2408 | } | |
2409 | } | |
0d10e182 | 2410 | return size; |
252b5132 RH |
2411 | } |
2412 | ||
d4845d57 JR |
2413 | /* Find an opcode at the start of *STR_P in the hash table, and set |
2414 | *STR_P to the first character after the last one read. */ | |
252b5132 | 2415 | |
d4845d57 | 2416 | static sh_opcode_info * |
8edc77b9 | 2417 | find_cooked_opcode (char **str_p) |
252b5132 | 2418 | { |
d4845d57 | 2419 | char *str = *str_p; |
252b5132 RH |
2420 | unsigned char *op_start; |
2421 | unsigned char *op_end; | |
252b5132 RH |
2422 | char name[20]; |
2423 | int nlen = 0; | |
c4aa876b | 2424 | |
6b31947e | 2425 | /* Drop leading whitespace. */ |
252b5132 RH |
2426 | while (*str == ' ') |
2427 | str++; | |
2428 | ||
d4845d57 JR |
2429 | /* Find the op code end. |
2430 | The pre-processor will eliminate whitespace in front of | |
2431 | any '@' after the first argument; we may be called from | |
2432 | assemble_ppi, so the opcode might be terminated by an '@'. */ | |
2132e3a3 | 2433 | for (op_start = op_end = (unsigned char *) str; |
252b5132 RH |
2434 | *op_end |
2435 | && nlen < 20 | |
d4845d57 | 2436 | && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; |
252b5132 RH |
2437 | op_end++) |
2438 | { | |
2439 | unsigned char c = op_start[nlen]; | |
2440 | ||
2441 | /* The machine independent code will convert CMP/EQ into cmp/EQ | |
d4845d57 JR |
2442 | because it thinks the '/' is the end of the symbol. Moreover, |
2443 | all but the first sub-insn is a parallel processing insn won't | |
3882b010 | 2444 | be capitalized. Instead of hacking up the machine independent |
d4845d57 | 2445 | code, we just deal with it here. */ |
3882b010 | 2446 | c = TOLOWER (c); |
252b5132 RH |
2447 | name[nlen] = c; |
2448 | nlen++; | |
2449 | } | |
c4aa876b | 2450 | |
252b5132 | 2451 | name[nlen] = 0; |
2132e3a3 | 2452 | *str_p = (char *) op_end; |
252b5132 RH |
2453 | |
2454 | if (nlen == 0) | |
6b31947e | 2455 | as_bad (_("can't find opcode ")); |
252b5132 | 2456 | |
d4845d57 JR |
2457 | return (sh_opcode_info *) hash_find (opcode_hash_control, name); |
2458 | } | |
2459 | ||
2460 | /* Assemble a parallel processing insn. */ | |
2461 | #define DDT_BASE 0xf000 /* Base value for double data transfer insns */ | |
6b31947e | 2462 | |
0d10e182 | 2463 | static unsigned int |
8edc77b9 | 2464 | assemble_ppi (char *op_end, sh_opcode_info *opcode) |
d4845d57 JR |
2465 | { |
2466 | int movx = 0; | |
2467 | int movy = 0; | |
2468 | int cond = 0; | |
2469 | int field_b = 0; | |
2470 | char *output; | |
2471 | int move_code; | |
0d10e182 | 2472 | unsigned int size; |
d4845d57 | 2473 | |
d4845d57 JR |
2474 | for (;;) |
2475 | { | |
2476 | sh_operand_info operand[3]; | |
2477 | ||
ac62e7a3 JR |
2478 | /* Some insn ignore one or more register fields, e.g. psts machl,a0. |
2479 | Make sure we encode a defined insn pattern. */ | |
2480 | reg_x = 0; | |
2481 | reg_y = 0; | |
2482 | reg_n = 0; | |
2483 | ||
d4845d57 JR |
2484 | if (opcode->arg[0] != A_END) |
2485 | op_end = get_operands (opcode, op_end, operand); | |
88da98f3 | 2486 | try_another_opcode: |
d4845d57 JR |
2487 | opcode = get_specific (opcode, operand); |
2488 | if (opcode == 0) | |
2489 | { | |
6b31947e | 2490 | /* Couldn't find an opcode which matched the operands. */ |
d4845d57 | 2491 | char *where = frag_more (2); |
0d10e182 | 2492 | size = 2; |
d4845d57 JR |
2493 | |
2494 | where[0] = 0x0; | |
2495 | where[1] = 0x0; | |
2496 | as_bad (_("invalid operands for opcode")); | |
0d10e182 | 2497 | return size; |
d4845d57 | 2498 | } |
c4aa876b | 2499 | |
d4845d57 JR |
2500 | if (opcode->nibbles[0] != PPI) |
2501 | as_bad (_("insn can't be combined with parallel processing insn")); | |
2502 | ||
2503 | switch (opcode->nibbles[1]) | |
2504 | { | |
2505 | ||
2506 | case NOPX: | |
2507 | if (movx) | |
2508 | as_bad (_("multiple movx specifications")); | |
2509 | movx = DDT_BASE; | |
2510 | break; | |
2511 | case NOPY: | |
2512 | if (movy) | |
2513 | as_bad (_("multiple movy specifications")); | |
2514 | movy = DDT_BASE; | |
2515 | break; | |
2516 | ||
88da98f3 MS |
2517 | case MOVX_NOPY: |
2518 | if (movx) | |
2519 | as_bad (_("multiple movx specifications")); | |
2520 | if ((reg_n < 4 || reg_n > 5) | |
2521 | && (reg_n < 0 || reg_n > 1)) | |
2522 | as_bad (_("invalid movx address register")); | |
2523 | if (movy && movy != DDT_BASE) | |
2524 | as_bad (_("insn cannot be combined with non-nopy")); | |
2525 | movx = ((((reg_n & 1) != 0) << 9) | |
2526 | + (((reg_n & 4) == 0) << 8) | |
2527 | + (reg_x << 6) | |
2528 | + (opcode->nibbles[2] << 4) | |
2529 | + opcode->nibbles[3] | |
2530 | + DDT_BASE); | |
2531 | break; | |
2532 | ||
2533 | case MOVY_NOPX: | |
2534 | if (movy) | |
2535 | as_bad (_("multiple movy specifications")); | |
2536 | if ((reg_n < 6 || reg_n > 7) | |
2537 | && (reg_n < 2 || reg_n > 3)) | |
2538 | as_bad (_("invalid movy address register")); | |
2539 | if (movx && movx != DDT_BASE) | |
2540 | as_bad (_("insn cannot be combined with non-nopx")); | |
2541 | movy = ((((reg_n & 1) != 0) << 8) | |
2542 | + (((reg_n & 4) == 0) << 9) | |
2543 | + (reg_y << 6) | |
2544 | + (opcode->nibbles[2] << 4) | |
2545 | + opcode->nibbles[3] | |
2546 | + DDT_BASE); | |
2547 | break; | |
2548 | ||
d4845d57 JR |
2549 | case MOVX: |
2550 | if (movx) | |
2551 | as_bad (_("multiple movx specifications")); | |
88da98f3 MS |
2552 | if (movy & 0x2ac) |
2553 | as_bad (_("previous movy requires nopx")); | |
d4845d57 JR |
2554 | if (reg_n < 4 || reg_n > 5) |
2555 | as_bad (_("invalid movx address register")); | |
2556 | if (opcode->nibbles[2] & 8) | |
2557 | { | |
2558 | if (reg_m == A_A1_NUM) | |
2559 | movx = 1 << 7; | |
2560 | else if (reg_m != A_A0_NUM) | |
2561 | as_bad (_("invalid movx dsp register")); | |
2562 | } | |
2563 | else | |
2564 | { | |
2565 | if (reg_x > 1) | |
2566 | as_bad (_("invalid movx dsp register")); | |
2567 | movx = reg_x << 7; | |
2568 | } | |
2569 | movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; | |
2570 | break; | |
2571 | ||
2572 | case MOVY: | |
2573 | if (movy) | |
2574 | as_bad (_("multiple movy specifications")); | |
88da98f3 MS |
2575 | if (movx & 0x153) |
2576 | as_bad (_("previous movx requires nopy")); | |
d4845d57 JR |
2577 | if (opcode->nibbles[2] & 8) |
2578 | { | |
2579 | /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, | |
2580 | so add 8 more. */ | |
2581 | movy = 8; | |
2582 | if (reg_m == A_A1_NUM) | |
2583 | movy += 1 << 6; | |
2584 | else if (reg_m != A_A0_NUM) | |
2585 | as_bad (_("invalid movy dsp register")); | |
2586 | } | |
2587 | else | |
2588 | { | |
2589 | if (reg_y > 1) | |
2590 | as_bad (_("invalid movy dsp register")); | |
2591 | movy = reg_y << 6; | |
2592 | } | |
2593 | if (reg_n < 6 || reg_n > 7) | |
2594 | as_bad (_("invalid movy address register")); | |
2595 | movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; | |
2596 | break; | |
2597 | ||
2598 | case PSH: | |
015551fc | 2599 | if (operand[0].immediate.X_op != O_constant) |
d4845d57 JR |
2600 | as_bad (_("dsp immediate shift value not constant")); |
2601 | field_b = ((opcode->nibbles[2] << 12) | |
015551fc | 2602 | | (operand[0].immediate.X_add_number & 127) << 4 |
d4845d57 JR |
2603 | | reg_n); |
2604 | break; | |
88da98f3 MS |
2605 | case PPI3NC: |
2606 | if (cond) | |
2607 | { | |
2608 | opcode++; | |
2609 | goto try_another_opcode; | |
2610 | } | |
2611 | /* Fall through. */ | |
d4845d57 JR |
2612 | case PPI3: |
2613 | if (field_b) | |
2614 | as_bad (_("multiple parallel processing specifications")); | |
2615 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
2616 | + (reg_x << 6) + (reg_y << 4) + reg_n); | |
88da98f3 MS |
2617 | switch (opcode->nibbles[4]) |
2618 | { | |
2619 | case HEX_0: | |
2620 | case HEX_XX00: | |
2621 | case HEX_00YY: | |
2622 | break; | |
2623 | case HEX_1: | |
2624 | case HEX_4: | |
2625 | field_b += opcode->nibbles[4] << 4; | |
2626 | break; | |
2627 | default: | |
2628 | abort (); | |
2629 | } | |
d4845d57 JR |
2630 | break; |
2631 | case PDC: | |
2632 | if (cond) | |
2633 | as_bad (_("multiple condition specifications")); | |
2634 | cond = opcode->nibbles[2] << 8; | |
2635 | if (*op_end) | |
2636 | goto skip_cond_check; | |
2637 | break; | |
2638 | case PPIC: | |
2639 | if (field_b) | |
2640 | as_bad (_("multiple parallel processing specifications")); | |
2641 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
2642 | + cond + (reg_x << 6) + (reg_y << 4) + reg_n); | |
2643 | cond = 0; | |
88da98f3 MS |
2644 | switch (opcode->nibbles[4]) |
2645 | { | |
2646 | case HEX_0: | |
2647 | case HEX_XX00: | |
2648 | case HEX_00YY: | |
2649 | break; | |
2650 | case HEX_1: | |
2651 | case HEX_4: | |
2652 | field_b += opcode->nibbles[4] << 4; | |
2653 | break; | |
2654 | default: | |
2655 | abort (); | |
2656 | } | |
d4845d57 JR |
2657 | break; |
2658 | case PMUL: | |
2659 | if (field_b) | |
2660 | { | |
88da98f3 MS |
2661 | if ((field_b & 0xef00) == 0xa100) |
2662 | field_b -= 0x8100; | |
2663 | /* pclr Dz pmuls Se,Sf,Dg */ | |
2664 | else if ((field_b & 0xff00) == 0x8d00 | |
f6f9408f | 2665 | && (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh4al_dsp_up))) |
88da98f3 | 2666 | { |
f6f9408f | 2667 | valid_arch = SH_MERGE_ARCH_SET (valid_arch, arch_sh4al_dsp_up); |
88da98f3 MS |
2668 | field_b -= 0x8cf0; |
2669 | } | |
2670 | else | |
d4845d57 | 2671 | as_bad (_("insn cannot be combined with pmuls")); |
d4845d57 JR |
2672 | switch (field_b & 0xf) |
2673 | { | |
2674 | case A_X0_NUM: | |
2675 | field_b += 0 - A_X0_NUM; | |
2676 | break; | |
2677 | case A_Y0_NUM: | |
2678 | field_b += 1 - A_Y0_NUM; | |
2679 | break; | |
2680 | case A_A0_NUM: | |
2681 | field_b += 2 - A_A0_NUM; | |
2682 | break; | |
2683 | case A_A1_NUM: | |
2684 | field_b += 3 - A_A1_NUM; | |
2685 | break; | |
2686 | default: | |
88da98f3 | 2687 | as_bad (_("bad combined pmuls output operand")); |
d4845d57 | 2688 | } |
7dd04abd JR |
2689 | /* Generate warning if the destination register for padd / psub |
2690 | and pmuls is the same ( only for A0 or A1 ). | |
2691 | If the last nibble is 1010 then A0 is used in both | |
2692 | padd / psub and pmuls. If it is 1111 then A1 is used | |
2693 | as destination register in both padd / psub and pmuls. */ | |
5db33d76 JR |
2694 | |
2695 | if ((((field_b | reg_efg) & 0x000F) == 0x000A) | |
2696 | || (((field_b | reg_efg) & 0x000F) == 0x000F)) | |
2697 | as_warn (_("destination register is same for parallel insns")); | |
d4845d57 JR |
2698 | } |
2699 | field_b += 0x4000 + reg_efg; | |
2700 | break; | |
2701 | default: | |
2702 | abort (); | |
2703 | } | |
2704 | if (cond) | |
2705 | { | |
2706 | as_bad (_("condition not followed by conditionalizable insn")); | |
2707 | cond = 0; | |
2708 | } | |
2709 | if (! *op_end) | |
2710 | break; | |
2711 | skip_cond_check: | |
2712 | opcode = find_cooked_opcode (&op_end); | |
2713 | if (opcode == NULL) | |
2714 | { | |
2715 | (as_bad | |
2716 | (_("unrecognized characters at end of parallel processing insn"))); | |
2717 | break; | |
2718 | } | |
2719 | } | |
2720 | ||
2721 | move_code = movx | movy; | |
2722 | if (field_b) | |
2723 | { | |
2724 | /* Parallel processing insn. */ | |
2725 | unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b; | |
2726 | ||
2727 | output = frag_more (4); | |
0d10e182 | 2728 | size = 4; |
d4845d57 JR |
2729 | if (! target_big_endian) |
2730 | { | |
2731 | output[3] = ppi_code >> 8; | |
2732 | output[2] = ppi_code; | |
2733 | } | |
2734 | else | |
2735 | { | |
2736 | output[2] = ppi_code >> 8; | |
2737 | output[3] = ppi_code; | |
2738 | } | |
2739 | move_code |= 0xf800; | |
2740 | } | |
2741 | else | |
0d10e182 JL |
2742 | { |
2743 | /* Just a double data transfer. */ | |
2744 | output = frag_more (2); | |
2745 | size = 2; | |
2746 | } | |
d4845d57 JR |
2747 | if (! target_big_endian) |
2748 | { | |
2749 | output[1] = move_code >> 8; | |
2750 | output[0] = move_code; | |
2751 | } | |
2752 | else | |
2753 | { | |
2754 | output[0] = move_code >> 8; | |
2755 | output[1] = move_code; | |
2756 | } | |
0d10e182 | 2757 | return size; |
d4845d57 JR |
2758 | } |
2759 | ||
2760 | /* This is the guts of the machine-dependent assembler. STR points to a | |
2761 | machine dependent instruction. This function is supposed to emit | |
6b31947e | 2762 | the frags/bytes it assembles to. */ |
d4845d57 JR |
2763 | |
2764 | void | |
8edc77b9 | 2765 | md_assemble (char *str) |
d4845d57 | 2766 | { |
2132e3a3 | 2767 | char *op_end; |
d4845d57 JR |
2768 | sh_operand_info operand[3]; |
2769 | sh_opcode_info *opcode; | |
dda5ecfc | 2770 | unsigned int size = 0; |
ae51a426 | 2771 | char *initial_str = str; |
d4845d57 | 2772 | |
324bfcf3 AO |
2773 | #ifdef HAVE_SH64 |
2774 | if (sh64_isa_mode == sh64_isa_shmedia) | |
2775 | { | |
2776 | shmedia_md_assemble (str); | |
2777 | return; | |
2778 | } | |
2779 | else | |
2780 | { | |
2781 | /* If we've seen pseudo-directives, make sure any emitted data or | |
2782 | frags are marked as data. */ | |
b34976b6 | 2783 | if (!seen_insn) |
324bfcf3 | 2784 | { |
b34976b6 | 2785 | sh64_update_contents_mark (TRUE); |
324bfcf3 AO |
2786 | sh64_set_contents_type (CRT_SH5_ISA16); |
2787 | } | |
2788 | ||
b34976b6 | 2789 | seen_insn = TRUE; |
324bfcf3 AO |
2790 | } |
2791 | #endif /* HAVE_SH64 */ | |
2792 | ||
d4845d57 JR |
2793 | opcode = find_cooked_opcode (&str); |
2794 | op_end = str; | |
252b5132 RH |
2795 | |
2796 | if (opcode == NULL) | |
2797 | { | |
ae51a426 | 2798 | /* The opcode is not in the hash table. |
708587a4 | 2799 | This means we definitely have an assembly failure, |
ae51a426 JR |
2800 | but the instruction may be valid in another CPU variant. |
2801 | In this case emit something better than 'unknown opcode'. | |
2802 | Search the full table in sh-opc.h to check. */ | |
2803 | ||
2804 | char *name = initial_str; | |
2805 | int name_length = 0; | |
2806 | const sh_opcode_info *op; | |
2807 | int found = 0; | |
2808 | ||
2809 | /* identify opcode in string */ | |
871ec896 | 2810 | while (ISSPACE (*name)) |
ae51a426 JR |
2811 | { |
2812 | name++; | |
2813 | } | |
871ec896 | 2814 | while (!ISSPACE (name[name_length])) |
ae51a426 JR |
2815 | { |
2816 | name_length++; | |
2817 | } | |
2818 | ||
2819 | /* search for opcode in full list */ | |
2820 | for (op = sh_table; op->name; op++) | |
2821 | { | |
f6f9408f JR |
2822 | if (strncasecmp (op->name, name, name_length) == 0 |
2823 | && op->name[name_length] == '\0') | |
ae51a426 JR |
2824 | { |
2825 | found = 1; | |
2826 | break; | |
2827 | } | |
2828 | } | |
2829 | ||
2830 | if ( found ) | |
2831 | { | |
2832 | as_bad (_("opcode not valid for this cpu variant")); | |
2833 | } | |
2834 | else | |
2835 | { | |
2836 | as_bad (_("unknown opcode")); | |
2837 | } | |
252b5132 RH |
2838 | return; |
2839 | } | |
2840 | ||
2841 | if (sh_relax | |
2842 | && ! seg_info (now_seg)->tc_segment_info_data.in_code) | |
2843 | { | |
2844 | /* Output a CODE reloc to tell the linker that the following | |
2845 | bytes are instructions, not data. */ | |
2846 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
2847 | BFD_RELOC_SH_CODE); | |
2848 | seg_info (now_seg)->tc_segment_info_data.in_code = 1; | |
2849 | } | |
2850 | ||
d4845d57 JR |
2851 | if (opcode->nibbles[0] == PPI) |
2852 | { | |
0d10e182 | 2853 | size = assemble_ppi (op_end, opcode); |
252b5132 RH |
2854 | } |
2855 | else | |
2856 | { | |
0d10e182 JL |
2857 | if (opcode->arg[0] == A_BDISP12 |
2858 | || opcode->arg[0] == A_BDISP8) | |
252b5132 | 2859 | { |
26c9b704 JR |
2860 | /* Since we skip get_specific here, we have to check & update |
2861 | valid_arch now. */ | |
f6f9408f JR |
2862 | if (SH_MERGE_ARCH_SET_VALID (valid_arch, opcode->arch)) |
2863 | valid_arch = SH_MERGE_ARCH_SET (valid_arch, opcode->arch); | |
26c9b704 JR |
2864 | else |
2865 | as_bad (_("Delayed branches not available on SH1")); | |
0d10e182 JL |
2866 | parse_exp (op_end + 1, &operand[0]); |
2867 | build_relax (opcode, &operand[0]); | |
86157c20 AS |
2868 | |
2869 | /* All branches are currently 16 bit. */ | |
2870 | size = 2; | |
5fc44b2d JR |
2871 | } |
2872 | else | |
2873 | { | |
0d10e182 JL |
2874 | if (opcode->arg[0] == A_END) |
2875 | { | |
2876 | /* Ignore trailing whitespace. If there is any, it has already | |
2877 | been compressed to a single space. */ | |
2878 | if (*op_end == ' ') | |
2879 | op_end++; | |
2880 | } | |
2881 | else | |
2882 | { | |
2883 | op_end = get_operands (opcode, op_end, operand); | |
2884 | } | |
2885 | opcode = get_specific (opcode, operand); | |
252b5132 | 2886 | |
0d10e182 JL |
2887 | if (opcode == 0) |
2888 | { | |
2889 | /* Couldn't find an opcode which matched the operands. */ | |
2890 | char *where = frag_more (2); | |
2891 | size = 2; | |
252b5132 | 2892 | |
0d10e182 JL |
2893 | where[0] = 0x0; |
2894 | where[1] = 0x0; | |
2895 | as_bad (_("invalid operands for opcode")); | |
2896 | } | |
2897 | else | |
2898 | { | |
2899 | if (*op_end) | |
2900 | as_bad (_("excess operands: '%s'"), op_end); | |
2901 | ||
2902 | size = build_Mytes (opcode, operand); | |
2903 | } | |
252b5132 | 2904 | } |
0d10e182 | 2905 | } |
252b5132 | 2906 | |
4dc7ead9 | 2907 | dwarf2_emit_insn (size); |
252b5132 RH |
2908 | } |
2909 | ||
2910 | /* This routine is called each time a label definition is seen. It | |
2911 | emits a BFD_RELOC_SH_LABEL reloc if necessary. */ | |
2912 | ||
2913 | void | |
07a53e5c | 2914 | sh_frob_label (symbolS *sym) |
252b5132 RH |
2915 | { |
2916 | static fragS *last_label_frag; | |
2917 | static int last_label_offset; | |
2918 | ||
2919 | if (sh_relax | |
2920 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
2921 | { | |
2922 | int offset; | |
2923 | ||
2924 | offset = frag_now_fix (); | |
2925 | if (frag_now != last_label_frag | |
2926 | || offset != last_label_offset) | |
c4aa876b | 2927 | { |
252b5132 RH |
2928 | fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); |
2929 | last_label_frag = frag_now; | |
2930 | last_label_offset = offset; | |
2931 | } | |
2932 | } | |
07a53e5c RH |
2933 | |
2934 | dwarf2_emit_label (sym); | |
252b5132 RH |
2935 | } |
2936 | ||
2937 | /* This routine is called when the assembler is about to output some | |
2938 | data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ | |
2939 | ||
2940 | void | |
8edc77b9 | 2941 | sh_flush_pending_output (void) |
252b5132 RH |
2942 | { |
2943 | if (sh_relax | |
2944 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
2945 | { | |
2946 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
2947 | BFD_RELOC_SH_DATA); | |
2948 | seg_info (now_seg)->tc_segment_info_data.in_code = 0; | |
2949 | } | |
2950 | } | |
2951 | ||
2952 | symbolS * | |
8edc77b9 | 2953 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
252b5132 RH |
2954 | { |
2955 | return 0; | |
2956 | } | |
2957 | ||
6b31947e NC |
2958 | /* Various routines to kill one day. */ |
2959 | /* Equal to MAX_PRECISION in atof-ieee.c. */ | |
252b5132 RH |
2960 | #define MAX_LITTLENUMS 6 |
2961 | ||
6b31947e NC |
2962 | /* Turn a string in input_line_pointer into a floating point constant |
2963 | of type TYPE, and store the appropriate bytes in *LITP. The number | |
2964 | of LITTLENUMS emitted is stored in *SIZEP . An error message is | |
2965 | returned, or NULL on OK. */ | |
2966 | ||
252b5132 | 2967 | char * |
8edc77b9 | 2968 | md_atof (int type, char *litP, int *sizeP) |
252b5132 RH |
2969 | { |
2970 | int prec; | |
2971 | LITTLENUM_TYPE words[4]; | |
2972 | char *t; | |
2973 | int i; | |
2974 | ||
2975 | switch (type) | |
2976 | { | |
2977 | case 'f': | |
2978 | prec = 2; | |
2979 | break; | |
2980 | ||
2981 | case 'd': | |
2982 | prec = 4; | |
2983 | break; | |
2984 | ||
2985 | default: | |
2986 | *sizeP = 0; | |
2987 | return _("bad call to md_atof"); | |
2988 | } | |
2989 | ||
2990 | t = atof_ieee (input_line_pointer, type, words); | |
2991 | if (t) | |
2992 | input_line_pointer = t; | |
2993 | ||
2994 | *sizeP = prec * 2; | |
2995 | ||
2996 | if (! target_big_endian) | |
2997 | { | |
2998 | for (i = prec - 1; i >= 0; i--) | |
2999 | { | |
3000 | md_number_to_chars (litP, (valueT) words[i], 2); | |
3001 | litP += 2; | |
3002 | } | |
3003 | } | |
3004 | else | |
3005 | { | |
3006 | for (i = 0; i < prec; i++) | |
3007 | { | |
3008 | md_number_to_chars (litP, (valueT) words[i], 2); | |
3009 | litP += 2; | |
3010 | } | |
3011 | } | |
c4aa876b | 3012 | |
252b5132 RH |
3013 | return NULL; |
3014 | } | |
3015 | ||
3016 | /* Handle the .uses pseudo-op. This pseudo-op is used just before a | |
3017 | call instruction. It refers to a label of the instruction which | |
3018 | loads the register which the call uses. We use it to generate a | |
3019 | special reloc for the linker. */ | |
3020 | ||
3021 | static void | |
8edc77b9 | 3022 | s_uses (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3023 | { |
3024 | expressionS ex; | |
3025 | ||
3026 | if (! sh_relax) | |
3027 | as_warn (_(".uses pseudo-op seen when not relaxing")); | |
3028 | ||
3029 | expression (&ex); | |
3030 | ||
3031 | if (ex.X_op != O_symbol || ex.X_add_number != 0) | |
3032 | { | |
3033 | as_bad (_("bad .uses format")); | |
3034 | ignore_rest_of_line (); | |
3035 | return; | |
3036 | } | |
3037 | ||
3038 | fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); | |
3039 | ||
3040 | demand_empty_rest_of_line (); | |
3041 | } | |
3042 | \f | |
37dedf66 NC |
3043 | enum options |
3044 | { | |
3045 | OPTION_RELAX = OPTION_MD_BASE, | |
3046 | OPTION_BIG, | |
3047 | OPTION_LITTLE, | |
3048 | OPTION_SMALL, | |
3049 | OPTION_DSP, | |
3050 | OPTION_ISA, | |
3051 | OPTION_RENESAS, | |
3052 | OPTION_ALLOW_REG_PREFIX, | |
3053 | #ifdef HAVE_SH64 | |
3054 | OPTION_ABI, | |
3055 | OPTION_NO_MIX, | |
3056 | OPTION_SHCOMPACT_CONST_CRANGE, | |
3057 | OPTION_NO_EXPAND, | |
3058 | OPTION_PT32, | |
3059 | #endif | |
3060 | OPTION_DUMMY /* Not used. This is just here to make it easy to add and subtract options from this enum. */ | |
3061 | }; | |
3062 | ||
5a38dc70 | 3063 | const char *md_shortopts = ""; |
6b31947e NC |
3064 | struct option md_longopts[] = |
3065 | { | |
252b5132 | 3066 | {"relax", no_argument, NULL, OPTION_RELAX}, |
05982cac | 3067 | {"big", no_argument, NULL, OPTION_BIG}, |
252b5132 | 3068 | {"little", no_argument, NULL, OPTION_LITTLE}, |
784906c5 NC |
3069 | /* The next two switches are here because the |
3070 | generic parts of the linker testsuite uses them. */ | |
3071 | {"EB", no_argument, NULL, OPTION_BIG}, | |
3072 | {"EL", no_argument, NULL, OPTION_LITTLE}, | |
252b5132 | 3073 | {"small", no_argument, NULL, OPTION_SMALL}, |
d4845d57 | 3074 | {"dsp", no_argument, NULL, OPTION_DSP}, |
37dedf66 | 3075 | {"isa", required_argument, NULL, OPTION_ISA}, |
f55629b8 | 3076 | {"renesas", no_argument, NULL, OPTION_RENESAS}, |
37dedf66 | 3077 | {"allow-reg-prefix", no_argument, NULL, OPTION_ALLOW_REG_PREFIX}, |
f55629b8 | 3078 | |
324bfcf3 | 3079 | #ifdef HAVE_SH64 |
324bfcf3 AO |
3080 | {"abi", required_argument, NULL, OPTION_ABI}, |
3081 | {"no-mix", no_argument, NULL, OPTION_NO_MIX}, | |
3082 | {"shcompact-const-crange", no_argument, NULL, OPTION_SHCOMPACT_CONST_CRANGE}, | |
3083 | {"no-expand", no_argument, NULL, OPTION_NO_EXPAND}, | |
3084 | {"expand-pt32", no_argument, NULL, OPTION_PT32}, | |
3085 | #endif /* HAVE_SH64 */ | |
3086 | ||
252b5132 RH |
3087 | {NULL, no_argument, NULL, 0} |
3088 | }; | |
c4aa876b | 3089 | size_t md_longopts_size = sizeof (md_longopts); |
252b5132 RH |
3090 | |
3091 | int | |
8edc77b9 | 3092 | md_parse_option (int c, char *arg ATTRIBUTE_UNUSED) |
252b5132 RH |
3093 | { |
3094 | switch (c) | |
3095 | { | |
3096 | case OPTION_RELAX: | |
3097 | sh_relax = 1; | |
3098 | break; | |
3099 | ||
05982cac HPN |
3100 | case OPTION_BIG: |
3101 | target_big_endian = 1; | |
3102 | break; | |
3103 | ||
252b5132 | 3104 | case OPTION_LITTLE: |
252b5132 RH |
3105 | target_big_endian = 0; |
3106 | break; | |
3107 | ||
3108 | case OPTION_SMALL: | |
3109 | sh_small = 1; | |
3110 | break; | |
3111 | ||
d4845d57 | 3112 | case OPTION_DSP: |
e38bc3b5 | 3113 | preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); |
d4845d57 JR |
3114 | break; |
3115 | ||
f55629b8 KK |
3116 | case OPTION_RENESAS: |
3117 | dont_adjust_reloc_32 = 1; | |
3118 | break; | |
3119 | ||
37dedf66 NC |
3120 | case OPTION_ALLOW_REG_PREFIX: |
3121 | allow_dollar_register_prefix = 1; | |
3122 | break; | |
3123 | ||
324bfcf3 | 3124 | case OPTION_ISA: |
871ec896 | 3125 | if (strcasecmp (arg, "dsp") == 0) |
e38bc3b5 | 3126 | preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); |
88da98f3 | 3127 | else if (strcasecmp (arg, "fp") == 0) |
e38bc3b5 | 3128 | preset_target_arch = arch_sh_up & ~arch_sh_has_dsp; |
bdfaef52 | 3129 | else if (strcasecmp (arg, "any") == 0) |
e38bc3b5 | 3130 | preset_target_arch = arch_sh_up; |
bdfaef52 JR |
3131 | #ifdef HAVE_SH64 |
3132 | else if (strcasecmp (arg, "shmedia") == 0) | |
324bfcf3 AO |
3133 | { |
3134 | if (sh64_isa_mode == sh64_isa_shcompact) | |
3135 | as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia")); | |
3136 | sh64_isa_mode = sh64_isa_shmedia; | |
3137 | } | |
3138 | else if (strcasecmp (arg, "shcompact") == 0) | |
3139 | { | |
3140 | if (sh64_isa_mode == sh64_isa_shmedia) | |
3141 | as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact")); | |
3142 | if (sh64_abi == sh64_abi_64) | |
3143 | as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact")); | |
3144 | sh64_isa_mode = sh64_isa_shcompact; | |
3145 | } | |
bdfaef52 | 3146 | #endif /* HAVE_SH64 */ |
324bfcf3 | 3147 | else |
f6f9408f JR |
3148 | { |
3149 | extern const bfd_arch_info_type bfd_sh_arch; | |
871ec896 | 3150 | bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; |
37dedf66 | 3151 | |
f6f9408f JR |
3152 | preset_target_arch = 0; |
3153 | for (; bfd_arch; bfd_arch=bfd_arch->next) | |
3154 | { | |
3155 | int len = strlen(bfd_arch->printable_name); | |
3156 | ||
3157 | if (bfd_arch->mach == bfd_mach_sh5) | |
3158 | continue; | |
3159 | ||
3160 | if (strncasecmp (bfd_arch->printable_name, arg, len) != 0) | |
3161 | continue; | |
3162 | ||
3163 | if (arg[len] == '\0') | |
3164 | preset_target_arch = | |
3165 | sh_get_arch_from_bfd_mach (bfd_arch->mach); | |
3166 | else if (strcasecmp(&arg[len], "-up") == 0) | |
3167 | preset_target_arch = | |
3168 | sh_get_arch_up_from_bfd_mach (bfd_arch->mach); | |
3169 | else | |
3170 | continue; | |
3171 | break; | |
3172 | } | |
3173 | ||
3174 | if (!preset_target_arch) | |
3175 | as_bad ("Invalid argument to --isa option: %s", arg); | |
3176 | } | |
324bfcf3 AO |
3177 | break; |
3178 | ||
bdfaef52 | 3179 | #ifdef HAVE_SH64 |
324bfcf3 AO |
3180 | case OPTION_ABI: |
3181 | if (strcmp (arg, "32") == 0) | |
3182 | { | |
3183 | if (sh64_abi == sh64_abi_64) | |
3184 | as_bad (_("Invalid combination: --abi=32 with --abi=64")); | |
3185 | sh64_abi = sh64_abi_32; | |
3186 | } | |
3187 | else if (strcmp (arg, "64") == 0) | |
3188 | { | |
3189 | if (sh64_abi == sh64_abi_32) | |
3190 | as_bad (_("Invalid combination: --abi=64 with --abi=32")); | |
3191 | if (sh64_isa_mode == sh64_isa_shcompact) | |
3192 | as_bad (_("Invalid combination: --isa=SHcompact with --abi=64")); | |
3193 | sh64_abi = sh64_abi_64; | |
3194 | } | |
3195 | else | |
3196 | as_bad ("Invalid argument to --abi option: %s", arg); | |
3197 | break; | |
3198 | ||
3199 | case OPTION_NO_MIX: | |
b34976b6 | 3200 | sh64_mix = FALSE; |
324bfcf3 AO |
3201 | break; |
3202 | ||
3203 | case OPTION_SHCOMPACT_CONST_CRANGE: | |
b34976b6 | 3204 | sh64_shcompact_const_crange = TRUE; |
324bfcf3 AO |
3205 | break; |
3206 | ||
3207 | case OPTION_NO_EXPAND: | |
b34976b6 | 3208 | sh64_expand = FALSE; |
324bfcf3 AO |
3209 | break; |
3210 | ||
3211 | case OPTION_PT32: | |
b34976b6 | 3212 | sh64_pt32 = TRUE; |
324bfcf3 AO |
3213 | break; |
3214 | #endif /* HAVE_SH64 */ | |
3215 | ||
252b5132 RH |
3216 | default: |
3217 | return 0; | |
3218 | } | |
3219 | ||
3220 | return 1; | |
3221 | } | |
3222 | ||
3223 | void | |
8edc77b9 | 3224 | md_show_usage (FILE *stream) |
252b5132 | 3225 | { |
c4aa876b | 3226 | fprintf (stream, _("\ |
252b5132 | 3227 | SH options:\n\ |
37dedf66 NC |
3228 | --little generate little endian code\n\ |
3229 | --big generate big endian code\n\ | |
3230 | --relax alter jump instructions for long displacements\n\ | |
3231 | --renesas disable optimization with section symbol for\n\ | |
f55629b8 | 3232 | compatibility with Renesas assembler.\n\ |
37dedf66 NC |
3233 | --small align sections to 4 byte boundaries, not 16\n\ |
3234 | --dsp enable sh-dsp insns, and disable floating-point ISAs.\n\ | |
3235 | --allow-reg-prefix allow '$' as a register name prefix.\n\ | |
3236 | --isa=[any use most appropriate isa\n\ | |
ae51a426 | 3237 | | dsp same as '-dsp'\n\ |
f6f9408f JR |
3238 | | fp")); |
3239 | { | |
3240 | extern const bfd_arch_info_type bfd_sh_arch; | |
871ec896 | 3241 | bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; |
37dedf66 | 3242 | |
f6f9408f JR |
3243 | for (; bfd_arch; bfd_arch=bfd_arch->next) |
3244 | if (bfd_arch->mach != bfd_mach_sh5) | |
3245 | { | |
3246 | fprintf (stream, "\n | %s", bfd_arch->printable_name); | |
3247 | fprintf (stream, "\n | %s-up", bfd_arch->printable_name); | |
3248 | } | |
3249 | } | |
3250 | fprintf (stream, "]\n"); | |
ae51a426 JR |
3251 | #ifdef HAVE_SH64 |
3252 | fprintf (stream, _("\ | |
37dedf66 | 3253 | --isa=[shmedia set as the default instruction set for SH64\n\ |
88da98f3 MS |
3254 | | SHmedia\n\ |
3255 | | shcompact\n\ | |
ae51a426 | 3256 | | SHcompact]\n")); |
324bfcf3 | 3257 | fprintf (stream, _("\ |
37dedf66 | 3258 | --abi=[32|64] set size of expanded SHmedia operands and object\n\ |
324bfcf3 | 3259 | file type\n\ |
37dedf66 | 3260 | --shcompact-const-crange emit code-range descriptors for constants in\n\ |
324bfcf3 | 3261 | SHcompact code sections\n\ |
37dedf66 | 3262 | --no-mix disallow SHmedia code in the same section as\n\ |
324bfcf3 | 3263 | constants and SHcompact code\n\ |
37dedf66 NC |
3264 | --no-expand do not expand MOVI, PT, PTA or PTB instructions\n\ |
3265 | --expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\ | |
2acb89ed | 3266 | to 32 bits only\n")); |
324bfcf3 | 3267 | #endif /* HAVE_SH64 */ |
252b5132 RH |
3268 | } |
3269 | \f | |
252b5132 RH |
3270 | /* This struct is used to pass arguments to sh_count_relocs through |
3271 | bfd_map_over_sections. */ | |
3272 | ||
3273 | struct sh_count_relocs | |
3274 | { | |
3275 | /* Symbol we are looking for. */ | |
3276 | symbolS *sym; | |
3277 | /* Count of relocs found. */ | |
3278 | int count; | |
3279 | }; | |
3280 | ||
3281 | /* Count the number of fixups in a section which refer to a particular | |
7be1c489 | 3282 | symbol. This is called via bfd_map_over_sections. */ |
252b5132 | 3283 | |
252b5132 | 3284 | static void |
8edc77b9 | 3285 | sh_count_relocs (bfd *abfd ATTRIBUTE_UNUSED, segT sec, void *data) |
252b5132 RH |
3286 | { |
3287 | struct sh_count_relocs *info = (struct sh_count_relocs *) data; | |
3288 | segment_info_type *seginfo; | |
3289 | symbolS *sym; | |
3290 | fixS *fix; | |
3291 | ||
3292 | seginfo = seg_info (sec); | |
3293 | if (seginfo == NULL) | |
3294 | return; | |
3295 | ||
3296 | sym = info->sym; | |
3297 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
3298 | { | |
3299 | if (fix->fx_addsy == sym) | |
3300 | { | |
3301 | ++info->count; | |
3302 | fix->fx_tcbit = 1; | |
3303 | } | |
3304 | } | |
3305 | } | |
3306 | ||
7be1c489 AM |
3307 | /* Handle the count relocs for a particular section. |
3308 | This is called via bfd_map_over_sections. */ | |
252b5132 | 3309 | |
252b5132 | 3310 | static void |
8edc77b9 KK |
3311 | sh_frob_section (bfd *abfd ATTRIBUTE_UNUSED, segT sec, |
3312 | void *ignore ATTRIBUTE_UNUSED) | |
252b5132 RH |
3313 | { |
3314 | segment_info_type *seginfo; | |
3315 | fixS *fix; | |
3316 | ||
3317 | seginfo = seg_info (sec); | |
3318 | if (seginfo == NULL) | |
3319 | return; | |
3320 | ||
e14e52f8 DD |
3321 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) |
3322 | { | |
3323 | symbolS *sym; | |
3324 | ||
3325 | sym = fix->fx_addsy; | |
3326 | /* Check for a local_symbol. */ | |
3327 | if (sym && sym->bsym == NULL) | |
3328 | { | |
3329 | struct local_symbol *ls = (struct local_symbol *)sym; | |
3330 | /* See if it's been converted. If so, canonicalize. */ | |
3331 | if (local_symbol_converted_p (ls)) | |
3332 | fix->fx_addsy = local_symbol_get_real_symbol (ls); | |
3333 | } | |
3334 | } | |
3335 | ||
252b5132 RH |
3336 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) |
3337 | { | |
3338 | symbolS *sym; | |
3339 | bfd_vma val; | |
3340 | fixS *fscan; | |
3341 | struct sh_count_relocs info; | |
3342 | ||
3343 | if (fix->fx_r_type != BFD_RELOC_SH_USES) | |
3344 | continue; | |
3345 | ||
3346 | /* The BFD_RELOC_SH_USES reloc should refer to a defined local | |
3347 | symbol in the same section. */ | |
3348 | sym = fix->fx_addsy; | |
3349 | if (sym == NULL | |
3350 | || fix->fx_subsy != NULL | |
3351 | || fix->fx_addnumber != 0 | |
3352 | || S_GET_SEGMENT (sym) != sec | |
252b5132 RH |
3353 | || S_IS_EXTERNAL (sym)) |
3354 | { | |
3355 | as_warn_where (fix->fx_file, fix->fx_line, | |
3356 | _(".uses does not refer to a local symbol in the same section")); | |
3357 | continue; | |
3358 | } | |
3359 | ||
3360 | /* Look through the fixups again, this time looking for one | |
3361 | at the same location as sym. */ | |
3362 | val = S_GET_VALUE (sym); | |
3363 | for (fscan = seginfo->fix_root; | |
3364 | fscan != NULL; | |
3365 | fscan = fscan->fx_next) | |
3366 | if (val == fscan->fx_frag->fr_address + fscan->fx_where | |
3367 | && fscan->fx_r_type != BFD_RELOC_SH_ALIGN | |
3368 | && fscan->fx_r_type != BFD_RELOC_SH_CODE | |
3369 | && fscan->fx_r_type != BFD_RELOC_SH_DATA | |
3370 | && fscan->fx_r_type != BFD_RELOC_SH_LABEL) | |
3371 | break; | |
3372 | if (fscan == NULL) | |
3373 | { | |
3374 | as_warn_where (fix->fx_file, fix->fx_line, | |
3375 | _("can't find fixup pointed to by .uses")); | |
3376 | continue; | |
3377 | } | |
3378 | ||
3379 | if (fscan->fx_tcbit) | |
3380 | { | |
3381 | /* We've already done this one. */ | |
3382 | continue; | |
3383 | } | |
3384 | ||
6b31947e NC |
3385 | /* The variable fscan should also be a fixup to a local symbol |
3386 | in the same section. */ | |
252b5132 RH |
3387 | sym = fscan->fx_addsy; |
3388 | if (sym == NULL | |
3389 | || fscan->fx_subsy != NULL | |
3390 | || fscan->fx_addnumber != 0 | |
3391 | || S_GET_SEGMENT (sym) != sec | |
252b5132 RH |
3392 | || S_IS_EXTERNAL (sym)) |
3393 | { | |
3394 | as_warn_where (fix->fx_file, fix->fx_line, | |
3395 | _(".uses target does not refer to a local symbol in the same section")); | |
3396 | continue; | |
3397 | } | |
3398 | ||
3399 | /* Now we look through all the fixups of all the sections, | |
3400 | counting the number of times we find a reference to sym. */ | |
3401 | info.sym = sym; | |
3402 | info.count = 0; | |
8edc77b9 | 3403 | bfd_map_over_sections (stdoutput, sh_count_relocs, &info); |
252b5132 RH |
3404 | |
3405 | if (info.count < 1) | |
3406 | abort (); | |
3407 | ||
3408 | /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. | |
3409 | We have already adjusted the value of sym to include the | |
3410 | fragment address, so we undo that adjustment here. */ | |
3411 | subseg_change (sec, 0); | |
7bcad3e5 NC |
3412 | fix_new (fscan->fx_frag, |
3413 | S_GET_VALUE (sym) - fscan->fx_frag->fr_address, | |
252b5132 RH |
3414 | 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); |
3415 | } | |
3416 | } | |
3417 | ||
3418 | /* This function is called after the symbol table has been completed, | |
3419 | but before the relocs or section contents have been written out. | |
3420 | If we have seen any .uses pseudo-ops, they point to an instruction | |
3421 | which loads a register with the address of a function. We look | |
3422 | through the fixups to find where the function address is being | |
3423 | loaded from. We then generate a COUNT reloc giving the number of | |
3424 | times that function address is referred to. The linker uses this | |
3425 | information when doing relaxing, to decide when it can eliminate | |
3426 | the stored function address entirely. */ | |
3427 | ||
3428 | void | |
8edc77b9 | 3429 | sh_frob_file (void) |
252b5132 | 3430 | { |
324bfcf3 AO |
3431 | #ifdef HAVE_SH64 |
3432 | shmedia_frob_file_before_adjust (); | |
3433 | #endif | |
3434 | ||
252b5132 RH |
3435 | if (! sh_relax) |
3436 | return; | |
3437 | ||
8edc77b9 | 3438 | bfd_map_over_sections (stdoutput, sh_frob_section, NULL); |
252b5132 RH |
3439 | } |
3440 | ||
3441 | /* Called after relaxing. Set the correct sizes of the fragments, and | |
55cf6793 | 3442 | create relocs so that md_apply_fix will fill in the correct values. */ |
252b5132 RH |
3443 | |
3444 | void | |
8edc77b9 | 3445 | md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT seg, fragS *fragP) |
252b5132 RH |
3446 | { |
3447 | int donerelax = 0; | |
3448 | ||
3449 | switch (fragP->fr_subtype) | |
3450 | { | |
3451 | case C (COND_JUMP, COND8): | |
3452 | case C (COND_JUMP_DELAY, COND8): | |
3453 | subseg_change (seg, 0); | |
3454 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
3455 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
3456 | fragP->fr_fix += 2; | |
3457 | fragP->fr_var = 0; | |
3458 | break; | |
3459 | ||
3460 | case C (UNCOND_JUMP, UNCOND12): | |
3461 | subseg_change (seg, 0); | |
3462 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
3463 | 1, BFD_RELOC_SH_PCDISP12BY2); | |
3464 | fragP->fr_fix += 2; | |
3465 | fragP->fr_var = 0; | |
3466 | break; | |
3467 | ||
3468 | case C (UNCOND_JUMP, UNCOND32): | |
3469 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): | |
3470 | if (fragP->fr_symbol == NULL) | |
99b222b4 HPN |
3471 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3472 | _("displacement overflows 12-bit field")); | |
252b5132 | 3473 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
99b222b4 HPN |
3474 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3475 | _("displacement to defined symbol %s overflows 12-bit field"), | |
3476 | S_GET_NAME (fragP->fr_symbol)); | |
252b5132 | 3477 | else |
99b222b4 HPN |
3478 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3479 | _("displacement to undefined symbol %s overflows 12-bit field"), | |
3480 | S_GET_NAME (fragP->fr_symbol)); | |
3481 | /* Stabilize this frag, so we don't trip an assert. */ | |
3482 | fragP->fr_fix += fragP->fr_var; | |
3483 | fragP->fr_var = 0; | |
252b5132 RH |
3484 | break; |
3485 | ||
3486 | case C (COND_JUMP, COND12): | |
3487 | case C (COND_JUMP_DELAY, COND12): | |
6b31947e | 3488 | /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */ |
252b5132 RH |
3489 | /* I found that a relax failure for gcc.c-torture/execute/930628-1.c |
3490 | was due to gas incorrectly relaxing an out-of-range conditional | |
3491 | branch with delay slot. It turned: | |
3492 | bf.s L6 (slot mov.l r12,@(44,r0)) | |
3493 | into: | |
c4aa876b | 3494 | |
252b5132 RH |
3495 | 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) |
3496 | 30: 00 09 nop | |
3497 | 32: 10 cb mov.l r12,@(44,r0) | |
3498 | Therefore, branches with delay slots have to be handled | |
3499 | differently from ones without delay slots. */ | |
3500 | { | |
3501 | unsigned char *buffer = | |
3502 | (unsigned char *) (fragP->fr_fix + fragP->fr_literal); | |
3503 | int highbyte = target_big_endian ? 0 : 1; | |
3504 | int lowbyte = target_big_endian ? 1 : 0; | |
3505 | int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); | |
3506 | ||
3507 | /* Toggle the true/false bit of the bcond. */ | |
3508 | buffer[highbyte] ^= 0x2; | |
3509 | ||
d3ecfc59 | 3510 | /* If this is a delayed branch, we may not put the bra in the |
252b5132 RH |
3511 | slot. So we change it to a non-delayed branch, like that: |
3512 | b! cond slot_label; bra disp; slot_label: slot_insn | |
3513 | ??? We should try if swapping the conditional branch and | |
3514 | its delay-slot insn already makes the branch reach. */ | |
3515 | ||
3516 | /* Build a relocation to six / four bytes farther on. */ | |
3517 | subseg_change (seg, 0); | |
7be1c489 | 3518 | fix_new (fragP, fragP->fr_fix, 2, section_symbol (seg), |
252b5132 RH |
3519 | fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), |
3520 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
3521 | ||
3522 | /* Set up a jump instruction. */ | |
3523 | buffer[highbyte + 2] = 0xa0; | |
3524 | buffer[lowbyte + 2] = 0; | |
3525 | fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, | |
3526 | fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); | |
3527 | ||
3528 | if (delay) | |
3529 | { | |
3530 | buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ | |
3531 | fragP->fr_fix += 4; | |
3532 | } | |
3533 | else | |
3534 | { | |
3535 | /* Fill in a NOP instruction. */ | |
3536 | buffer[highbyte + 4] = 0x0; | |
3537 | buffer[lowbyte + 4] = 0x9; | |
3538 | ||
3539 | fragP->fr_fix += 6; | |
3540 | } | |
3541 | fragP->fr_var = 0; | |
3542 | donerelax = 1; | |
3543 | } | |
3544 | break; | |
3545 | ||
3546 | case C (COND_JUMP, COND32): | |
3547 | case C (COND_JUMP_DELAY, COND32): | |
3548 | case C (COND_JUMP, UNDEF_WORD_DISP): | |
3549 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): | |
3550 | if (fragP->fr_symbol == NULL) | |
99b222b4 HPN |
3551 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3552 | _("displacement overflows 8-bit field")); | |
252b5132 | 3553 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
99b222b4 HPN |
3554 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3555 | _("displacement to defined symbol %s overflows 8-bit field"), | |
3556 | S_GET_NAME (fragP->fr_symbol)); | |
252b5132 | 3557 | else |
99b222b4 HPN |
3558 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3559 | _("displacement to undefined symbol %s overflows 8-bit field "), | |
3560 | S_GET_NAME (fragP->fr_symbol)); | |
3561 | /* Stabilize this frag, so we don't trip an assert. */ | |
3562 | fragP->fr_fix += fragP->fr_var; | |
3563 | fragP->fr_var = 0; | |
252b5132 RH |
3564 | break; |
3565 | ||
3566 | default: | |
324bfcf3 | 3567 | #ifdef HAVE_SH64 |
b34976b6 | 3568 | shmedia_md_convert_frag (headers, seg, fragP, TRUE); |
324bfcf3 | 3569 | #else |
252b5132 | 3570 | abort (); |
324bfcf3 | 3571 | #endif |
252b5132 RH |
3572 | } |
3573 | ||
3574 | if (donerelax && !sh_relax) | |
3575 | as_warn_where (fragP->fr_file, fragP->fr_line, | |
3576 | _("overflow in branch to %s; converted into longer instruction sequence"), | |
3577 | (fragP->fr_symbol != NULL | |
3578 | ? S_GET_NAME (fragP->fr_symbol) | |
3579 | : "")); | |
3580 | } | |
3581 | ||
3582 | valueT | |
8edc77b9 | 3583 | md_section_align (segT seg ATTRIBUTE_UNUSED, valueT size) |
252b5132 | 3584 | { |
252b5132 RH |
3585 | #ifdef OBJ_ELF |
3586 | return size; | |
3587 | #else /* ! OBJ_ELF */ | |
3588 | return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1) | |
3589 | & (-1 << bfd_get_section_alignment (stdoutput, seg))); | |
3590 | #endif /* ! OBJ_ELF */ | |
252b5132 RH |
3591 | } |
3592 | ||
3593 | /* This static variable is set by s_uacons to tell sh_cons_align that | |
67c1ffbe | 3594 | the expression does not need to be aligned. */ |
252b5132 RH |
3595 | |
3596 | static int sh_no_align_cons = 0; | |
3597 | ||
3598 | /* This handles the unaligned space allocation pseudo-ops, such as | |
3599 | .uaword. .uaword is just like .word, but the value does not need | |
3600 | to be aligned. */ | |
3601 | ||
3602 | static void | |
8edc77b9 | 3603 | s_uacons (int bytes) |
252b5132 RH |
3604 | { |
3605 | /* Tell sh_cons_align not to align this value. */ | |
3606 | sh_no_align_cons = 1; | |
3607 | cons (bytes); | |
3608 | } | |
3609 | ||
3610 | /* If a .word, et. al., pseud-op is seen, warn if the value is not | |
3611 | aligned correctly. Note that this can cause warnings to be issued | |
3612 | when assembling initialized structured which were declared with the | |
3613 | packed attribute. FIXME: Perhaps we should require an option to | |
3614 | enable this warning? */ | |
3615 | ||
3616 | void | |
8edc77b9 | 3617 | sh_cons_align (int nbytes) |
252b5132 RH |
3618 | { |
3619 | int nalign; | |
3620 | char *p; | |
3621 | ||
3622 | if (sh_no_align_cons) | |
3623 | { | |
3624 | /* This is an unaligned pseudo-op. */ | |
3625 | sh_no_align_cons = 0; | |
3626 | return; | |
3627 | } | |
3628 | ||
3629 | nalign = 0; | |
3630 | while ((nbytes & 1) == 0) | |
3631 | { | |
3632 | ++nalign; | |
3633 | nbytes >>= 1; | |
3634 | } | |
3635 | ||
3636 | if (nalign == 0) | |
3637 | return; | |
3638 | ||
3639 | if (now_seg == absolute_section) | |
3640 | { | |
3641 | if ((abs_section_offset & ((1 << nalign) - 1)) != 0) | |
3642 | as_warn (_("misaligned data")); | |
3643 | return; | |
3644 | } | |
3645 | ||
0a9ef439 | 3646 | p = frag_var (rs_align_test, 1, 1, (relax_substateT) 0, |
252b5132 RH |
3647 | (symbolS *) NULL, (offsetT) nalign, (char *) NULL); |
3648 | ||
3649 | record_alignment (now_seg, nalign); | |
3650 | } | |
3651 | ||
3652 | /* When relaxing, we need to output a reloc for any .align directive | |
3653 | that requests alignment to a four byte boundary or larger. This is | |
3654 | also where we check for misaligned data. */ | |
3655 | ||
3656 | void | |
8edc77b9 | 3657 | sh_handle_align (fragS *frag) |
252b5132 | 3658 | { |
0a9ef439 RH |
3659 | int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix; |
3660 | ||
3661 | if (frag->fr_type == rs_align_code) | |
3662 | { | |
3663 | static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; | |
3664 | static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; | |
3665 | ||
3666 | char *p = frag->fr_literal + frag->fr_fix; | |
3667 | ||
3668 | if (bytes & 1) | |
3669 | { | |
3670 | *p++ = 0; | |
3671 | bytes--; | |
3672 | frag->fr_fix += 1; | |
3673 | } | |
3674 | ||
3675 | if (target_big_endian) | |
3676 | { | |
3677 | memcpy (p, big_nop_pattern, sizeof big_nop_pattern); | |
3678 | frag->fr_var = sizeof big_nop_pattern; | |
3679 | } | |
3680 | else | |
3681 | { | |
3682 | memcpy (p, little_nop_pattern, sizeof little_nop_pattern); | |
3683 | frag->fr_var = sizeof little_nop_pattern; | |
3684 | } | |
3685 | } | |
3686 | else if (frag->fr_type == rs_align_test) | |
3687 | { | |
3688 | if (bytes != 0) | |
3689 | as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data")); | |
3690 | } | |
3691 | ||
252b5132 | 3692 | if (sh_relax |
0a9ef439 RH |
3693 | && (frag->fr_type == rs_align |
3694 | || frag->fr_type == rs_align_code) | |
252b5132 RH |
3695 | && frag->fr_address + frag->fr_fix > 0 |
3696 | && frag->fr_offset > 1 | |
3697 | && now_seg != bss_section) | |
3698 | fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, | |
3699 | BFD_RELOC_SH_ALIGN); | |
252b5132 RH |
3700 | } |
3701 | ||
28602ebf KK |
3702 | /* See whether the relocation should be resolved locally. */ |
3703 | ||
b34976b6 | 3704 | static bfd_boolean |
8edc77b9 | 3705 | sh_local_pcrel (fixS *fix) |
28602ebf | 3706 | { |
b34976b6 AM |
3707 | return (! sh_relax |
3708 | && (fix->fx_r_type == BFD_RELOC_SH_PCDISP8BY2 | |
3709 | || fix->fx_r_type == BFD_RELOC_SH_PCDISP12BY2 | |
3710 | || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2 | |
3711 | || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4 | |
3712 | || fix->fx_r_type == BFD_RELOC_8_PCREL | |
3713 | || fix->fx_r_type == BFD_RELOC_SH_SWITCH16 | |
3714 | || fix->fx_r_type == BFD_RELOC_SH_SWITCH32)); | |
28602ebf KK |
3715 | } |
3716 | ||
252b5132 RH |
3717 | /* See whether we need to force a relocation into the output file. |
3718 | This is used to force out switch and PC relative relocations when | |
3719 | relaxing. */ | |
3720 | ||
3721 | int | |
8edc77b9 | 3722 | sh_force_relocation (fixS *fix) |
252b5132 | 3723 | { |
8ba4dac0 DJ |
3724 | /* These relocations can't make it into a DSO, so no use forcing |
3725 | them for global symbols. */ | |
28602ebf | 3726 | if (sh_local_pcrel (fix)) |
8ba4dac0 DJ |
3727 | return 0; |
3728 | ||
9efb3b7b | 3729 | /* Make sure some relocations get emitted. */ |
ae6063d4 | 3730 | if (fix->fx_r_type == BFD_RELOC_SH_LOOP_START |
a161fe53 | 3731 | || fix->fx_r_type == BFD_RELOC_SH_LOOP_END |
9efb3b7b KK |
3732 | || fix->fx_r_type == BFD_RELOC_SH_TLS_GD_32 |
3733 | || fix->fx_r_type == BFD_RELOC_SH_TLS_LD_32 | |
3734 | || fix->fx_r_type == BFD_RELOC_SH_TLS_IE_32 | |
3735 | || fix->fx_r_type == BFD_RELOC_SH_TLS_LDO_32 | |
3736 | || fix->fx_r_type == BFD_RELOC_SH_TLS_LE_32 | |
ae6063d4 | 3737 | || generic_force_reloc (fix)) |
252b5132 RH |
3738 | return 1; |
3739 | ||
3740 | if (! sh_relax) | |
3741 | return 0; | |
3742 | ||
3743 | return (fix->fx_pcrel | |
3744 | || SWITCH_TABLE (fix) | |
3745 | || fix->fx_r_type == BFD_RELOC_SH_COUNT | |
3746 | || fix->fx_r_type == BFD_RELOC_SH_ALIGN | |
3747 | || fix->fx_r_type == BFD_RELOC_SH_CODE | |
3748 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
324bfcf3 AO |
3749 | #ifdef HAVE_SH64 |
3750 | || fix->fx_r_type == BFD_RELOC_SH_SHMEDIA_CODE | |
3751 | #endif | |
252b5132 RH |
3752 | || fix->fx_r_type == BFD_RELOC_SH_LABEL); |
3753 | } | |
3754 | ||
3755 | #ifdef OBJ_ELF | |
b34976b6 | 3756 | bfd_boolean |
8edc77b9 | 3757 | sh_fix_adjustable (fixS *fixP) |
252b5132 | 3758 | { |
a161fe53 AM |
3759 | if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL |
3760 | || fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL | |
3761 | || fixP->fx_r_type == BFD_RELOC_SH_GOTPC | |
f55629b8 | 3762 | || ((fixP->fx_r_type == BFD_RELOC_32) && dont_adjust_reloc_32) |
a1cc9221 AO |
3763 | || fixP->fx_r_type == BFD_RELOC_RVA) |
3764 | return 0; | |
3765 | ||
252b5132 RH |
3766 | /* We need the symbol name for the VTABLE entries */ |
3767 | if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
3768 | || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
3769 | return 0; | |
3770 | ||
3771 | return 1; | |
3772 | } | |
d4845d57 | 3773 | |
6b31947e | 3774 | void |
8edc77b9 | 3775 | sh_elf_final_processing (void) |
d4845d57 JR |
3776 | { |
3777 | int val; | |
3778 | ||
3779 | /* Set file-specific flags to indicate if this code needs | |
88da98f3 | 3780 | a processor with the sh-dsp / sh2e ISA to execute. */ |
324bfcf3 AO |
3781 | #ifdef HAVE_SH64 |
3782 | /* SH5 and above don't know about the valid_arch arch_sh* bits defined | |
3783 | in sh-opc.h, so check SH64 mode before checking valid_arch. */ | |
3784 | if (sh64_isa_mode != sh64_isa_unspecified) | |
3785 | val = EF_SH5; | |
3786 | else | |
1a320fbb NC |
3787 | #elif defined TARGET_SYMBIAN |
3788 | if (1) | |
1a66a017 NC |
3789 | { |
3790 | extern int sh_symbian_find_elf_flags (unsigned int); | |
3791 | ||
3792 | val = sh_symbian_find_elf_flags (valid_arch); | |
3793 | } | |
1a320fbb | 3794 | else |
324bfcf3 | 3795 | #endif /* HAVE_SH64 */ |
f6f9408f | 3796 | val = sh_find_elf_flags (valid_arch); |
d4845d57 JR |
3797 | |
3798 | elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; | |
3799 | elf_elfheader (stdoutput)->e_flags |= val; | |
3800 | } | |
252b5132 RH |
3801 | #endif |
3802 | ||
55e6e397 RS |
3803 | /* Apply fixup FIXP to SIZE-byte field BUF given that VAL is its |
3804 | assembly-time value. If we're generating a reloc for FIXP, | |
3805 | see whether the addend should be stored in-place or whether | |
3806 | it should be in an ELF r_addend field. */ | |
3807 | ||
3808 | static void | |
3809 | apply_full_field_fix (fixS *fixP, char *buf, bfd_vma val, int size) | |
3810 | { | |
3811 | reloc_howto_type *howto; | |
3812 | ||
3813 | if (fixP->fx_addsy != NULL || fixP->fx_pcrel) | |
3814 | { | |
3815 | howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); | |
3816 | if (howto && !howto->partial_inplace) | |
3817 | { | |
3818 | fixP->fx_addnumber = val; | |
3819 | return; | |
3820 | } | |
3821 | } | |
3822 | md_number_to_chars (buf, val, size); | |
3823 | } | |
3824 | ||
252b5132 RH |
3825 | /* Apply a fixup to the object file. */ |
3826 | ||
252b5132 | 3827 | void |
55cf6793 | 3828 | md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) |
252b5132 RH |
3829 | { |
3830 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; | |
3831 | int lowbyte = target_big_endian ? 1 : 0; | |
3832 | int highbyte = target_big_endian ? 0 : 1; | |
2ed5f585 | 3833 | long val = (long) *valP; |
252b5132 RH |
3834 | long max, min; |
3835 | int shift; | |
3836 | ||
a1cc9221 AO |
3837 | /* A difference between two symbols, the second of which is in the |
3838 | current section, is transformed in a PC-relative relocation to | |
3839 | the other symbol. We have to adjust the relocation type here. */ | |
3840 | if (fixP->fx_pcrel) | |
3841 | { | |
3842 | switch (fixP->fx_r_type) | |
3843 | { | |
3844 | default: | |
3845 | break; | |
3846 | ||
3847 | case BFD_RELOC_32: | |
3848 | fixP->fx_r_type = BFD_RELOC_32_PCREL; | |
3849 | break; | |
3850 | ||
3851 | /* Currently, we only support 32-bit PCREL relocations. | |
3852 | We'd need a new reloc type to handle 16_PCREL, and | |
3853 | 8_PCREL is already taken for R_SH_SWITCH8, which | |
3854 | apparently does something completely different than what | |
3855 | we need. FIXME. */ | |
3856 | case BFD_RELOC_16: | |
3857 | bfd_set_error (bfd_error_bad_value); | |
94f592af | 3858 | return; |
81d4177b | 3859 | |
a1cc9221 AO |
3860 | case BFD_RELOC_8: |
3861 | bfd_set_error (bfd_error_bad_value); | |
94f592af | 3862 | return; |
a1cc9221 AO |
3863 | } |
3864 | } | |
3865 | ||
6b31947e NC |
3866 | /* The function adjust_reloc_syms won't convert a reloc against a weak |
3867 | symbol into a reloc against a section, but bfd_install_relocation | |
3868 | will screw up if the symbol is defined, so we have to adjust val here | |
1308f14c HPN |
3869 | to avoid the screw up later. |
3870 | ||
3871 | For ordinary relocs, this does not happen for ELF, since for ELF, | |
3872 | bfd_install_relocation uses the "special function" field of the | |
3873 | howto, and does not execute the code that needs to be undone, as long | |
3874 | as the special function does not return bfd_reloc_continue. | |
3875 | It can happen for GOT- and PLT-type relocs the way they are | |
3876 | described in elf32-sh.c as they use bfd_elf_generic_reloc, but it | |
3877 | doesn't matter here since those relocs don't use VAL; see below. */ | |
3878 | if (OUTPUT_FLAVOR != bfd_target_elf_flavour | |
3879 | && fixP->fx_addsy != NULL | |
252b5132 RH |
3880 | && S_IS_WEAK (fixP->fx_addsy)) |
3881 | val -= S_GET_VALUE (fixP->fx_addsy); | |
252b5132 | 3882 | |
bdfaef52 JR |
3883 | if (SWITCH_TABLE (fixP)) |
3884 | val -= S_GET_VALUE (fixP->fx_subsy); | |
252b5132 RH |
3885 | |
3886 | max = min = 0; | |
3887 | shift = 0; | |
3888 | switch (fixP->fx_r_type) | |
3889 | { | |
1d70c7fb AO |
3890 | case BFD_RELOC_SH_IMM3: |
3891 | max = 0x7; | |
3892 | * buf = (* buf & 0xf8) | (val & 0x7); | |
3893 | break; | |
3894 | case BFD_RELOC_SH_IMM3U: | |
3895 | max = 0x7; | |
3896 | * buf = (* buf & 0x8f) | ((val & 0x7) << 4); | |
3897 | break; | |
3898 | case BFD_RELOC_SH_DISP12: | |
3899 | max = 0xfff; | |
3900 | buf[lowbyte] = val & 0xff; | |
3901 | buf[highbyte] |= (val >> 8) & 0x0f; | |
3902 | break; | |
3903 | case BFD_RELOC_SH_DISP12BY2: | |
3904 | max = 0xfff; | |
3905 | shift = 1; | |
3906 | buf[lowbyte] = (val >> 1) & 0xff; | |
3907 | buf[highbyte] |= (val >> 9) & 0x0f; | |
3908 | break; | |
3909 | case BFD_RELOC_SH_DISP12BY4: | |
3910 | max = 0xfff; | |
3911 | shift = 2; | |
3912 | buf[lowbyte] = (val >> 2) & 0xff; | |
3913 | buf[highbyte] |= (val >> 10) & 0x0f; | |
3914 | break; | |
3915 | case BFD_RELOC_SH_DISP12BY8: | |
3916 | max = 0xfff; | |
3917 | shift = 3; | |
3918 | buf[lowbyte] = (val >> 3) & 0xff; | |
3919 | buf[highbyte] |= (val >> 11) & 0x0f; | |
3920 | break; | |
3921 | case BFD_RELOC_SH_DISP20: | |
3922 | if (! target_big_endian) | |
3923 | abort(); | |
3924 | max = 0x7ffff; | |
3925 | min = -0x80000; | |
28013b5c | 3926 | buf[1] = (buf[1] & 0x0f) | ((val >> 12) & 0xf0); |
1d70c7fb AO |
3927 | buf[2] = (val >> 8) & 0xff; |
3928 | buf[3] = val & 0xff; | |
3929 | break; | |
3930 | case BFD_RELOC_SH_DISP20BY8: | |
3931 | if (!target_big_endian) | |
3932 | abort(); | |
3933 | max = 0x7ffff; | |
3934 | min = -0x80000; | |
3935 | shift = 8; | |
28013b5c | 3936 | buf[1] = (buf[1] & 0x0f) | ((val >> 20) & 0xf0); |
1d70c7fb AO |
3937 | buf[2] = (val >> 16) & 0xff; |
3938 | buf[3] = (val >> 8) & 0xff; | |
3939 | break; | |
3940 | ||
252b5132 RH |
3941 | case BFD_RELOC_SH_IMM4: |
3942 | max = 0xf; | |
3943 | *buf = (*buf & 0xf0) | (val & 0xf); | |
3944 | break; | |
3945 | ||
3946 | case BFD_RELOC_SH_IMM4BY2: | |
3947 | max = 0xf; | |
3948 | shift = 1; | |
3949 | *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); | |
3950 | break; | |
3951 | ||
3952 | case BFD_RELOC_SH_IMM4BY4: | |
3953 | max = 0xf; | |
3954 | shift = 2; | |
3955 | *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); | |
3956 | break; | |
3957 | ||
3958 | case BFD_RELOC_SH_IMM8BY2: | |
3959 | max = 0xff; | |
3960 | shift = 1; | |
3961 | *buf = val >> 1; | |
3962 | break; | |
3963 | ||
3964 | case BFD_RELOC_SH_IMM8BY4: | |
3965 | max = 0xff; | |
3966 | shift = 2; | |
3967 | *buf = val >> 2; | |
3968 | break; | |
3969 | ||
3970 | case BFD_RELOC_8: | |
3971 | case BFD_RELOC_SH_IMM8: | |
3972 | /* Sometimes the 8 bit value is sign extended (e.g., add) and | |
3973 | sometimes it is not (e.g., and). We permit any 8 bit value. | |
3974 | Note that adding further restrictions may invalidate | |
3975 | reasonable looking assembly code, such as ``and -0x1,r0''. */ | |
3976 | max = 0xff; | |
c4aa876b | 3977 | min = -0xff; |
252b5132 RH |
3978 | *buf++ = val; |
3979 | break; | |
3980 | ||
3981 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
3982 | /* The lower two bits of the PC are cleared before the | |
3983 | displacement is added in. We can assume that the destination | |
67c1ffbe | 3984 | is on a 4 byte boundary. If this instruction is also on a 4 |
252b5132 RH |
3985 | byte boundary, then we want |
3986 | (target - here) / 4 | |
3987 | and target - here is a multiple of 4. | |
3988 | Otherwise, we are on a 2 byte boundary, and we want | |
3989 | (target - (here - 2)) / 4 | |
3990 | and target - here is not a multiple of 4. Computing | |
3991 | (target - (here - 2)) / 4 == (target - here + 2) / 4 | |
3992 | works for both cases, since in the first case the addition of | |
3993 | 2 will be removed by the division. target - here is in the | |
3994 | variable val. */ | |
3995 | val = (val + 2) / 4; | |
3996 | if (val & ~0xff) | |
3997 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
3998 | buf[lowbyte] = val; | |
3999 | break; | |
4000 | ||
4001 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
4002 | val /= 2; | |
4003 | if (val & ~0xff) | |
4004 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
4005 | buf[lowbyte] = val; | |
4006 | break; | |
4007 | ||
4008 | case BFD_RELOC_SH_PCDISP8BY2: | |
4009 | val /= 2; | |
4010 | if (val < -0x80 || val > 0x7f) | |
4011 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
4012 | buf[lowbyte] = val; | |
4013 | break; | |
4014 | ||
4015 | case BFD_RELOC_SH_PCDISP12BY2: | |
4016 | val /= 2; | |
8637c045 | 4017 | if (val < -0x800 || val > 0x7ff) |
252b5132 RH |
4018 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); |
4019 | buf[lowbyte] = val & 0xff; | |
4020 | buf[highbyte] |= (val >> 8) & 0xf; | |
4021 | break; | |
4022 | ||
4023 | case BFD_RELOC_32: | |
a1cc9221 | 4024 | case BFD_RELOC_32_PCREL: |
55e6e397 | 4025 | apply_full_field_fix (fixP, buf, val, 4); |
252b5132 RH |
4026 | break; |
4027 | ||
4028 | case BFD_RELOC_16: | |
55e6e397 | 4029 | apply_full_field_fix (fixP, buf, val, 2); |
252b5132 RH |
4030 | break; |
4031 | ||
4032 | case BFD_RELOC_SH_USES: | |
fefaa1aa | 4033 | /* Pass the value into sh_reloc(). */ |
252b5132 RH |
4034 | fixP->fx_addnumber = val; |
4035 | break; | |
4036 | ||
4037 | case BFD_RELOC_SH_COUNT: | |
4038 | case BFD_RELOC_SH_ALIGN: | |
4039 | case BFD_RELOC_SH_CODE: | |
4040 | case BFD_RELOC_SH_DATA: | |
4041 | case BFD_RELOC_SH_LABEL: | |
4042 | /* Nothing to do here. */ | |
4043 | break; | |
4044 | ||
015551fc JR |
4045 | case BFD_RELOC_SH_LOOP_START: |
4046 | case BFD_RELOC_SH_LOOP_END: | |
4047 | ||
252b5132 RH |
4048 | case BFD_RELOC_VTABLE_INHERIT: |
4049 | case BFD_RELOC_VTABLE_ENTRY: | |
4050 | fixP->fx_done = 0; | |
4051 | return; | |
4052 | ||
a1cc9221 AO |
4053 | #ifdef OBJ_ELF |
4054 | case BFD_RELOC_32_PLT_PCREL: | |
4055 | /* Make the jump instruction point to the address of the operand. At | |
81d4177b | 4056 | runtime we merely add the offset to the actual PLT entry. */ |
94f592af | 4057 | * valP = 0xfffffffc; |
0174e383 | 4058 | val = fixP->fx_offset; |
ac3f04d7 AO |
4059 | if (fixP->fx_subsy) |
4060 | val -= S_GET_VALUE (fixP->fx_subsy); | |
55e6e397 | 4061 | apply_full_field_fix (fixP, buf, val, 4); |
a1cc9221 AO |
4062 | break; |
4063 | ||
4064 | case BFD_RELOC_SH_GOTPC: | |
4065 | /* This is tough to explain. We end up with this one if we have | |
4066 | operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". | |
4067 | The goal here is to obtain the absolute address of the GOT, | |
4068 | and it is strongly preferable from a performance point of | |
4069 | view to avoid using a runtime relocation for this. There are | |
4070 | cases where you have something like: | |
81d4177b | 4071 | |
a1cc9221 | 4072 | .long _GLOBAL_OFFSET_TABLE_+[.-.L66] |
81d4177b | 4073 | |
a1cc9221 AO |
4074 | and here no correction would be required. Internally in the |
4075 | assembler we treat operands of this form as not being pcrel | |
4076 | since the '.' is explicitly mentioned, and I wonder whether | |
4077 | it would simplify matters to do it this way. Who knows. In | |
4078 | earlier versions of the PIC patches, the pcrel_adjust field | |
4079 | was used to store the correction, but since the expression is | |
4080 | not pcrel, I felt it would be confusing to do it this way. */ | |
94f592af | 4081 | * valP -= 1; |
55e6e397 | 4082 | apply_full_field_fix (fixP, buf, val, 4); |
a1cc9221 AO |
4083 | break; |
4084 | ||
9efb3b7b KK |
4085 | case BFD_RELOC_SH_TLS_GD_32: |
4086 | case BFD_RELOC_SH_TLS_LD_32: | |
4087 | case BFD_RELOC_SH_TLS_IE_32: | |
2bba4140 KK |
4088 | S_SET_THREAD_LOCAL (fixP->fx_addsy); |
4089 | /* Fallthrough */ | |
4090 | case BFD_RELOC_32_GOT_PCREL: | |
4091 | case BFD_RELOC_SH_GOTPLT32: | |
94f592af | 4092 | * valP = 0; /* Fully resolved at runtime. No addend. */ |
55e6e397 | 4093 | apply_full_field_fix (fixP, buf, 0, 4); |
a1cc9221 AO |
4094 | break; |
4095 | ||
9efb3b7b KK |
4096 | case BFD_RELOC_SH_TLS_LDO_32: |
4097 | case BFD_RELOC_SH_TLS_LE_32: | |
2bba4140 KK |
4098 | S_SET_THREAD_LOCAL (fixP->fx_addsy); |
4099 | /* Fallthrough */ | |
4100 | case BFD_RELOC_32_GOTOFF: | |
55e6e397 | 4101 | apply_full_field_fix (fixP, buf, val, 4); |
a1cc9221 AO |
4102 | break; |
4103 | #endif | |
4104 | ||
252b5132 | 4105 | default: |
324bfcf3 | 4106 | #ifdef HAVE_SH64 |
55cf6793 | 4107 | shmedia_md_apply_fix (fixP, valP); |
324bfcf3 AO |
4108 | return; |
4109 | #else | |
252b5132 | 4110 | abort (); |
324bfcf3 | 4111 | #endif |
252b5132 RH |
4112 | } |
4113 | ||
4114 | if (shift != 0) | |
4115 | { | |
4116 | if ((val & ((1 << shift) - 1)) != 0) | |
4117 | as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); | |
4118 | if (val >= 0) | |
4119 | val >>= shift; | |
4120 | else | |
4121 | val = ((val >> shift) | |
4122 | | ((long) -1 & ~ ((long) -1 >> shift))); | |
4123 | } | |
4124 | if (max != 0 && (val < min || val > max)) | |
4125 | as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); | |
01eaea5a NC |
4126 | else if (max != 0) |
4127 | /* Stop the generic code from trying to overlow check the value as well. | |
4128 | It may not have the correct value anyway, as we do not store val back | |
4129 | into *valP. */ | |
4130 | fixP->fx_no_overflow = 1; | |
252b5132 | 4131 | |
94f592af NC |
4132 | if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) |
4133 | fixP->fx_done = 1; | |
252b5132 RH |
4134 | } |
4135 | ||
4136 | /* Called just before address relaxation. Return the length | |
4137 | by which a fragment must grow to reach it's destination. */ | |
4138 | ||
4139 | int | |
8edc77b9 | 4140 | md_estimate_size_before_relax (fragS *fragP, segT segment_type) |
252b5132 | 4141 | { |
e66457fb AM |
4142 | int what; |
4143 | ||
252b5132 RH |
4144 | switch (fragP->fr_subtype) |
4145 | { | |
93c2a809 | 4146 | default: |
324bfcf3 AO |
4147 | #ifdef HAVE_SH64 |
4148 | return shmedia_md_estimate_size_before_relax (fragP, segment_type); | |
4149 | #else | |
93c2a809 | 4150 | abort (); |
324bfcf3 AO |
4151 | #endif |
4152 | ||
93c2a809 | 4153 | |
252b5132 | 4154 | case C (UNCOND_JUMP, UNDEF_DISP): |
6b31947e | 4155 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
4156 | if (!fragP->fr_symbol) |
4157 | { | |
4158 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
252b5132 RH |
4159 | } |
4160 | else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
4161 | { | |
4162 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
252b5132 RH |
4163 | } |
4164 | else | |
4165 | { | |
4166 | fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); | |
252b5132 RH |
4167 | } |
4168 | break; | |
4169 | ||
252b5132 RH |
4170 | case C (COND_JUMP, UNDEF_DISP): |
4171 | case C (COND_JUMP_DELAY, UNDEF_DISP): | |
e66457fb | 4172 | what = GET_WHAT (fragP->fr_subtype); |
6b31947e | 4173 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
4174 | if (fragP->fr_symbol |
4175 | && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
4176 | { | |
252b5132 | 4177 | /* Got a symbol and it's defined in this segment, become byte |
6b31947e | 4178 | sized - maybe it will fix up. */ |
252b5132 | 4179 | fragP->fr_subtype = C (what, COND8); |
252b5132 RH |
4180 | } |
4181 | else if (fragP->fr_symbol) | |
4182 | { | |
6b31947e | 4183 | /* Its got a segment, but its not ours, so it will always be long. */ |
252b5132 | 4184 | fragP->fr_subtype = C (what, UNDEF_WORD_DISP); |
252b5132 RH |
4185 | } |
4186 | else | |
4187 | { | |
6b31947e | 4188 | /* We know the abs value. */ |
252b5132 | 4189 | fragP->fr_subtype = C (what, COND8); |
252b5132 | 4190 | } |
93c2a809 | 4191 | break; |
252b5132 | 4192 | |
93c2a809 | 4193 | case C (UNCOND_JUMP, UNCOND12): |
e66457fb | 4194 | case C (UNCOND_JUMP, UNCOND32): |
93c2a809 AM |
4195 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): |
4196 | case C (COND_JUMP, COND8): | |
e66457fb AM |
4197 | case C (COND_JUMP, COND12): |
4198 | case C (COND_JUMP, COND32): | |
93c2a809 AM |
4199 | case C (COND_JUMP, UNDEF_WORD_DISP): |
4200 | case C (COND_JUMP_DELAY, COND8): | |
e66457fb AM |
4201 | case C (COND_JUMP_DELAY, COND12): |
4202 | case C (COND_JUMP_DELAY, COND32): | |
93c2a809 AM |
4203 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): |
4204 | /* When relaxing a section for the second time, we don't need to | |
e66457fb | 4205 | do anything besides return the current size. */ |
252b5132 RH |
4206 | break; |
4207 | } | |
e66457fb AM |
4208 | |
4209 | fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length; | |
252b5132 RH |
4210 | return fragP->fr_var; |
4211 | } | |
4212 | ||
6b31947e | 4213 | /* Put number into target byte order. */ |
252b5132 RH |
4214 | |
4215 | void | |
8edc77b9 | 4216 | md_number_to_chars (char *ptr, valueT use, int nbytes) |
252b5132 | 4217 | { |
324bfcf3 AO |
4218 | #ifdef HAVE_SH64 |
4219 | /* We might need to set the contents type to data. */ | |
4220 | sh64_flag_output (); | |
4221 | #endif | |
4222 | ||
252b5132 RH |
4223 | if (! target_big_endian) |
4224 | number_to_chars_littleendian (ptr, use, nbytes); | |
4225 | else | |
4226 | number_to_chars_bigendian (ptr, use, nbytes); | |
4227 | } | |
4228 | ||
7be1c489 | 4229 | /* This version is used in obj-coff.c eg. for the sh-hms target. */ |
cce5a618 NC |
4230 | |
4231 | long | |
8edc77b9 | 4232 | md_pcrel_from (fixS *fixP) |
cce5a618 NC |
4233 | { |
4234 | return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; | |
4235 | } | |
4236 | ||
252b5132 | 4237 | long |
8edc77b9 | 4238 | md_pcrel_from_section (fixS *fixP, segT sec) |
252b5132 | 4239 | { |
28602ebf KK |
4240 | if (! sh_local_pcrel (fixP) |
4241 | && fixP->fx_addsy != (symbolS *) NULL | |
ae6063d4 | 4242 | && (generic_force_reloc (fixP) |
ef17112f HPN |
4243 | || S_GET_SEGMENT (fixP->fx_addsy) != sec)) |
4244 | { | |
4245 | /* The symbol is undefined (or is defined but not in this section, | |
4246 | or we're not sure about it being the final definition). Let the | |
4247 | linker figure it out. We need to adjust the subtraction of a | |
4248 | symbol to the position of the relocated data, though. */ | |
4249 | return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0; | |
4250 | } | |
4251 | ||
cce5a618 | 4252 | return md_pcrel_from (fixP); |
252b5132 RH |
4253 | } |
4254 | ||
252b5132 RH |
4255 | /* Create a reloc. */ |
4256 | ||
4257 | arelent * | |
8edc77b9 | 4258 | tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) |
252b5132 RH |
4259 | { |
4260 | arelent *rel; | |
4261 | bfd_reloc_code_real_type r_type; | |
4262 | ||
4263 | rel = (arelent *) xmalloc (sizeof (arelent)); | |
49309057 ILT |
4264 | rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
4265 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
252b5132 RH |
4266 | rel->address = fixp->fx_frag->fr_address + fixp->fx_where; |
4267 | ||
4268 | r_type = fixp->fx_r_type; | |
4269 | ||
4270 | if (SWITCH_TABLE (fixp)) | |
4271 | { | |
bdfaef52 JR |
4272 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy); |
4273 | rel->addend = 0; | |
252b5132 RH |
4274 | if (r_type == BFD_RELOC_16) |
4275 | r_type = BFD_RELOC_SH_SWITCH16; | |
4276 | else if (r_type == BFD_RELOC_8) | |
4277 | r_type = BFD_RELOC_8_PCREL; | |
4278 | else if (r_type == BFD_RELOC_32) | |
4279 | r_type = BFD_RELOC_SH_SWITCH32; | |
4280 | else | |
4281 | abort (); | |
4282 | } | |
4283 | else if (r_type == BFD_RELOC_SH_USES) | |
4284 | rel->addend = fixp->fx_addnumber; | |
4285 | else if (r_type == BFD_RELOC_SH_COUNT) | |
4286 | rel->addend = fixp->fx_offset; | |
4287 | else if (r_type == BFD_RELOC_SH_ALIGN) | |
4288 | rel->addend = fixp->fx_offset; | |
4289 | else if (r_type == BFD_RELOC_VTABLE_INHERIT | |
4290 | || r_type == BFD_RELOC_VTABLE_ENTRY) | |
4291 | rel->addend = fixp->fx_offset; | |
015551fc JR |
4292 | else if (r_type == BFD_RELOC_SH_LOOP_START |
4293 | || r_type == BFD_RELOC_SH_LOOP_END) | |
4294 | rel->addend = fixp->fx_offset; | |
4295 | else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel) | |
4296 | { | |
4297 | rel->addend = 0; | |
4298 | rel->address = rel->addend = fixp->fx_offset; | |
4299 | } | |
324bfcf3 AO |
4300 | #ifdef HAVE_SH64 |
4301 | else if (shmedia_init_reloc (rel, fixp)) | |
4302 | ; | |
4303 | #endif | |
252b5132 | 4304 | else |
55e6e397 | 4305 | rel->addend = fixp->fx_addnumber; |
252b5132 RH |
4306 | |
4307 | rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); | |
78878175 | 4308 | |
a161fe53 | 4309 | if (rel->howto == NULL) |
252b5132 RH |
4310 | { |
4311 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
4312 | _("Cannot represent relocation type %s"), | |
4313 | bfd_get_reloc_code_name (r_type)); | |
4314 | /* Set howto to a garbage value so that we can keep going. */ | |
4315 | rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); | |
4316 | assert (rel->howto != NULL); | |
4317 | } | |
78878175 NC |
4318 | #ifdef OBJ_ELF |
4319 | else if (rel->howto->type == R_SH_IND12W) | |
4320 | rel->addend += fixp->fx_offset - 4; | |
4321 | #endif | |
252b5132 RH |
4322 | |
4323 | return rel; | |
4324 | } | |
4325 | ||
538cd60f AO |
4326 | #ifdef OBJ_ELF |
4327 | inline static char * | |
8edc77b9 | 4328 | sh_end_of_match (char *cont, char *what) |
538cd60f AO |
4329 | { |
4330 | int len = strlen (what); | |
4331 | ||
4332 | if (strncasecmp (cont, what, strlen (what)) == 0 | |
4333 | && ! is_part_of_name (cont[len])) | |
4334 | return cont + len; | |
4335 | ||
4336 | return NULL; | |
5d6255fe | 4337 | } |
538cd60f AO |
4338 | |
4339 | int | |
9497f5ac NC |
4340 | sh_parse_name (char const *name, |
4341 | expressionS *exprP, | |
4342 | enum expr_mode mode, | |
4343 | char *nextcharP) | |
538cd60f AO |
4344 | { |
4345 | char *next = input_line_pointer; | |
4346 | char *next_end; | |
4347 | int reloc_type; | |
4348 | segT segment; | |
4349 | ||
4350 | exprP->X_op_symbol = NULL; | |
4351 | ||
4352 | if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) | |
4353 | { | |
4354 | if (! GOT_symbol) | |
4355 | GOT_symbol = symbol_find_or_make (name); | |
4356 | ||
4357 | exprP->X_add_symbol = GOT_symbol; | |
4358 | no_suffix: | |
4359 | /* If we have an absolute symbol or a reg, then we know its | |
37dedf66 | 4360 | value now. */ |
538cd60f | 4361 | segment = S_GET_SEGMENT (exprP->X_add_symbol); |
9497f5ac | 4362 | if (mode != expr_defer && segment == absolute_section) |
538cd60f AO |
4363 | { |
4364 | exprP->X_op = O_constant; | |
4365 | exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); | |
4366 | exprP->X_add_symbol = NULL; | |
4367 | } | |
9497f5ac | 4368 | else if (mode != expr_defer && segment == reg_section) |
538cd60f AO |
4369 | { |
4370 | exprP->X_op = O_register; | |
4371 | exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); | |
4372 | exprP->X_add_symbol = NULL; | |
4373 | } | |
4374 | else | |
4375 | { | |
4376 | exprP->X_op = O_symbol; | |
4377 | exprP->X_add_number = 0; | |
4378 | } | |
4379 | ||
4380 | return 1; | |
4381 | } | |
4382 | ||
4383 | exprP->X_add_symbol = symbol_find_or_make (name); | |
5d6255fe | 4384 | |
538cd60f AO |
4385 | if (*nextcharP != '@') |
4386 | goto no_suffix; | |
4387 | else if ((next_end = sh_end_of_match (next + 1, "GOTOFF"))) | |
4388 | reloc_type = BFD_RELOC_32_GOTOFF; | |
324bfcf3 AO |
4389 | else if ((next_end = sh_end_of_match (next + 1, "GOTPLT"))) |
4390 | reloc_type = BFD_RELOC_SH_GOTPLT32; | |
538cd60f AO |
4391 | else if ((next_end = sh_end_of_match (next + 1, "GOT"))) |
4392 | reloc_type = BFD_RELOC_32_GOT_PCREL; | |
4393 | else if ((next_end = sh_end_of_match (next + 1, "PLT"))) | |
4394 | reloc_type = BFD_RELOC_32_PLT_PCREL; | |
9efb3b7b KK |
4395 | else if ((next_end = sh_end_of_match (next + 1, "TLSGD"))) |
4396 | reloc_type = BFD_RELOC_SH_TLS_GD_32; | |
4397 | else if ((next_end = sh_end_of_match (next + 1, "TLSLDM"))) | |
4398 | reloc_type = BFD_RELOC_SH_TLS_LD_32; | |
4399 | else if ((next_end = sh_end_of_match (next + 1, "GOTTPOFF"))) | |
4400 | reloc_type = BFD_RELOC_SH_TLS_IE_32; | |
4401 | else if ((next_end = sh_end_of_match (next + 1, "TPOFF"))) | |
4402 | reloc_type = BFD_RELOC_SH_TLS_LE_32; | |
4403 | else if ((next_end = sh_end_of_match (next + 1, "DTPOFF"))) | |
4404 | reloc_type = BFD_RELOC_SH_TLS_LDO_32; | |
538cd60f AO |
4405 | else |
4406 | goto no_suffix; | |
4407 | ||
4408 | *input_line_pointer = *nextcharP; | |
4409 | input_line_pointer = next_end; | |
4410 | *nextcharP = *input_line_pointer; | |
4411 | *input_line_pointer = '\0'; | |
4412 | ||
4413 | exprP->X_op = O_PIC_reloc; | |
4414 | exprP->X_add_number = 0; | |
4415 | exprP->X_md = reloc_type; | |
4416 | ||
4417 | return 1; | |
4418 | } | |
2ce4cc60 KK |
4419 | |
4420 | void | |
4421 | sh_cfi_frame_initial_instructions (void) | |
4422 | { | |
4423 | cfi_add_CFA_def_cfa (15, 0); | |
4424 | } | |
4425 | ||
4426 | int | |
1df69f4f | 4427 | sh_regname_to_dw2regnum (char *regname) |
2ce4cc60 KK |
4428 | { |
4429 | unsigned int regnum = -1; | |
4430 | unsigned int i; | |
4431 | const char *p; | |
4432 | char *q; | |
4433 | static struct { char *name; int dw2regnum; } regnames[] = | |
4434 | { | |
4435 | { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 }, | |
4436 | { "macl", 21 }, { "fpul", 23 } | |
4437 | }; | |
4438 | ||
4439 | for (i = 0; i < ARRAY_SIZE (regnames); ++i) | |
4440 | if (strcmp (regnames[i].name, regname) == 0) | |
4441 | return regnames[i].dw2regnum; | |
4442 | ||
4443 | if (regname[0] == 'r') | |
4444 | { | |
4445 | p = regname + 1; | |
4446 | regnum = strtoul (p, &q, 10); | |
4447 | if (p == q || *q || regnum >= 16) | |
4448 | return -1; | |
4449 | } | |
4450 | else if (regname[0] == 'f' && regname[1] == 'r') | |
4451 | { | |
4452 | p = regname + 2; | |
4453 | regnum = strtoul (p, &q, 10); | |
4454 | if (p == q || *q || regnum >= 16) | |
4455 | return -1; | |
4456 | regnum += 25; | |
4457 | } | |
4458 | else if (regname[0] == 'x' && regname[1] == 'd') | |
4459 | { | |
4460 | p = regname + 2; | |
4461 | regnum = strtoul (p, &q, 10); | |
4462 | if (p == q || *q || regnum >= 8) | |
4463 | return -1; | |
4464 | regnum += 87; | |
4465 | } | |
4466 | return regnum; | |
4467 | } | |
f17c130b | 4468 | #endif /* OBJ_ELF */ |