Commit | Line | Data |
---|---|---|
ef230218 | 1 | /* tc-sh.c -- Assemble code for the Renesas / SuperH SH |
4aa3e325 | 2 | Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, |
ebd1c875 | 3 | 2003, 2004, 2005, 2006 Free Software Foundation, Inc. |
252b5132 RH |
4 | |
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to | |
4b4da160 NC |
19 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
20 | Boston, MA 02110-1301, USA. */ | |
252b5132 | 21 | |
6b31947e | 22 | /* Written By Steve Chamberlain <sac@cygnus.com> */ |
252b5132 | 23 | |
252b5132 | 24 | #include "as.h" |
252b5132 RH |
25 | #include "subsegs.h" |
26 | #define DEFINE_TABLE | |
27 | #include "opcodes/sh-opc.h" | |
3882b010 | 28 | #include "safe-ctype.h" |
43841e91 | 29 | #include "struc-symbol.h" |
d4845d57 JR |
30 | |
31 | #ifdef OBJ_ELF | |
32 | #include "elf/sh.h" | |
33 | #endif | |
34 | ||
0d10e182 | 35 | #include "dwarf2dbg.h" |
2ce4cc60 | 36 | #include "dw2gencfi.h" |
0d10e182 | 37 | |
e08ae979 HPN |
38 | typedef struct |
39 | { | |
40 | sh_arg_type type; | |
41 | int reg; | |
42 | expressionS immediate; | |
43 | } | |
44 | sh_operand_info; | |
45 | ||
252b5132 RH |
46 | const char comment_chars[] = "!"; |
47 | const char line_separator_chars[] = ";"; | |
48 | const char line_comment_chars[] = "!#"; | |
49 | ||
8edc77b9 KK |
50 | static void s_uses (int); |
51 | static void s_uacons (int); | |
252b5132 | 52 | |
a1cc9221 | 53 | #ifdef OBJ_ELF |
8edc77b9 | 54 | static void sh_elf_cons (int); |
538cd60f | 55 | |
a1cc9221 AO |
56 | symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ |
57 | #endif | |
58 | ||
05982cac | 59 | static void |
8edc77b9 | 60 | big (int ignore ATTRIBUTE_UNUSED) |
05982cac HPN |
61 | { |
62 | if (! target_big_endian) | |
63 | as_bad (_("directive .big encountered when option -big required")); | |
64 | ||
65 | /* Stop further messages. */ | |
66 | target_big_endian = 1; | |
67 | } | |
252b5132 RH |
68 | |
69 | static void | |
8edc77b9 | 70 | little (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 71 | { |
05982cac HPN |
72 | if (target_big_endian) |
73 | as_bad (_("directive .little encountered when option -little required")); | |
74 | ||
75 | /* Stop further messages. */ | |
252b5132 RH |
76 | target_big_endian = 0; |
77 | } | |
78 | ||
d4845d57 JR |
79 | /* This table describes all the machine specific pseudo-ops the assembler |
80 | has to support. The fields are: | |
81 | pseudo-op name without dot | |
82 | function to call to execute this pseudo-op | |
6b31947e | 83 | Integer arg to pass to the function. */ |
d4845d57 | 84 | |
252b5132 RH |
85 | const pseudo_typeS md_pseudo_table[] = |
86 | { | |
a1cc9221 AO |
87 | #ifdef OBJ_ELF |
88 | {"long", sh_elf_cons, 4}, | |
89 | {"int", sh_elf_cons, 4}, | |
90 | {"word", sh_elf_cons, 2}, | |
91 | {"short", sh_elf_cons, 2}, | |
92 | #else | |
252b5132 RH |
93 | {"int", cons, 4}, |
94 | {"word", cons, 2}, | |
a1cc9221 | 95 | #endif /* OBJ_ELF */ |
05982cac | 96 | {"big", big, 0}, |
252b5132 RH |
97 | {"form", listing_psize, 0}, |
98 | {"little", little, 0}, | |
99 | {"heading", listing_title, 0}, | |
100 | {"import", s_ignore, 0}, | |
101 | {"page", listing_eject, 0}, | |
102 | {"program", s_ignore, 0}, | |
103 | {"uses", s_uses, 0}, | |
104 | {"uaword", s_uacons, 2}, | |
105 | {"ualong", s_uacons, 4}, | |
de68de20 AO |
106 | {"uaquad", s_uacons, 8}, |
107 | {"2byte", s_uacons, 2}, | |
108 | {"4byte", s_uacons, 4}, | |
109 | {"8byte", s_uacons, 8}, | |
324bfcf3 AO |
110 | #ifdef HAVE_SH64 |
111 | {"mode", s_sh64_mode, 0 }, | |
112 | ||
113 | /* Have the old name too. */ | |
114 | {"isa", s_sh64_mode, 0 }, | |
115 | ||
116 | /* Assert that the right ABI is used. */ | |
117 | {"abi", s_sh64_abi, 0 }, | |
118 | ||
119 | { "vtable_inherit", sh64_vtable_inherit, 0 }, | |
120 | { "vtable_entry", sh64_vtable_entry, 0 }, | |
121 | #endif /* HAVE_SH64 */ | |
252b5132 RH |
122 | {0, 0, 0} |
123 | }; | |
124 | ||
252b5132 RH |
125 | int sh_relax; /* set if -relax seen */ |
126 | ||
127 | /* Whether -small was seen. */ | |
128 | ||
129 | int sh_small; | |
130 | ||
f55629b8 KK |
131 | /* Flag to generate relocations against symbol values for local symbols. */ |
132 | ||
133 | static int dont_adjust_reloc_32; | |
134 | ||
37dedf66 NC |
135 | /* Flag to indicate that '$' is allowed as a register prefix. */ |
136 | ||
137 | static int allow_dollar_register_prefix; | |
138 | ||
139 | /* Preset architecture set, if given; zero otherwise. */ | |
d4845d57 | 140 | |
f6f9408f | 141 | static unsigned int preset_target_arch; |
d4845d57 JR |
142 | |
143 | /* The bit mask of architectures that could | |
67c1ffbe | 144 | accommodate the insns seen so far. */ |
f6f9408f | 145 | static unsigned int valid_arch; |
d4845d57 | 146 | |
252b5132 RH |
147 | const char EXP_CHARS[] = "eE"; |
148 | ||
6b31947e | 149 | /* Chars that mean this number is a floating point constant. */ |
252b5132 RH |
150 | /* As in 0f12.456 */ |
151 | /* or 0d1.2345e12 */ | |
152 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
153 | ||
154 | #define C(a,b) ENCODE_RELAX(a,b) | |
155 | ||
252b5132 RH |
156 | #define ENCODE_RELAX(what,length) (((what) << 4) + (length)) |
157 | #define GET_WHAT(x) ((x>>4)) | |
158 | ||
67c1ffbe | 159 | /* These are the three types of relaxable instruction. */ |
324bfcf3 AO |
160 | /* These are the types of relaxable instructions; except for END which is |
161 | a marker. */ | |
252b5132 RH |
162 | #define COND_JUMP 1 |
163 | #define COND_JUMP_DELAY 2 | |
164 | #define UNCOND_JUMP 3 | |
324bfcf3 AO |
165 | |
166 | #ifdef HAVE_SH64 | |
167 | ||
168 | /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */ | |
169 | #define SH64PCREL16_32 4 | |
170 | /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */ | |
171 | #define SH64PCREL16_64 5 | |
172 | ||
173 | /* Variants of the above for adjusting the insn to PTA or PTB according to | |
174 | the label. */ | |
175 | #define SH64PCREL16PT_32 6 | |
176 | #define SH64PCREL16PT_64 7 | |
177 | ||
178 | /* A MOVI expansion, expanding to at most 32 or 64 bits. */ | |
179 | #define MOVI_IMM_32 8 | |
180 | #define MOVI_IMM_32_PCREL 9 | |
181 | #define MOVI_IMM_64 10 | |
182 | #define MOVI_IMM_64_PCREL 11 | |
183 | #define END 12 | |
184 | ||
185 | #else /* HAVE_SH64 */ | |
186 | ||
252b5132 RH |
187 | #define END 4 |
188 | ||
324bfcf3 AO |
189 | #endif /* HAVE_SH64 */ |
190 | ||
252b5132 RH |
191 | #define UNDEF_DISP 0 |
192 | #define COND8 1 | |
193 | #define COND12 2 | |
194 | #define COND32 3 | |
252b5132 RH |
195 | #define UNDEF_WORD_DISP 4 |
196 | ||
197 | #define UNCOND12 1 | |
198 | #define UNCOND32 2 | |
199 | ||
324bfcf3 AO |
200 | #ifdef HAVE_SH64 |
201 | #define UNDEF_SH64PCREL 0 | |
202 | #define SH64PCREL16 1 | |
203 | #define SH64PCREL32 2 | |
204 | #define SH64PCREL48 3 | |
205 | #define SH64PCREL64 4 | |
206 | #define SH64PCRELPLT 5 | |
207 | ||
208 | #define UNDEF_MOVI 0 | |
209 | #define MOVI_16 1 | |
210 | #define MOVI_32 2 | |
211 | #define MOVI_48 3 | |
212 | #define MOVI_64 4 | |
213 | #define MOVI_PLT 5 | |
214 | #define MOVI_GOTOFF 6 | |
215 | #define MOVI_GOTPC 7 | |
216 | #endif /* HAVE_SH64 */ | |
217 | ||
252b5132 RH |
218 | /* Branch displacements are from the address of the branch plus |
219 | four, thus all minimum and maximum values have 4 added to them. */ | |
220 | #define COND8_F 258 | |
221 | #define COND8_M -252 | |
222 | #define COND8_LENGTH 2 | |
223 | ||
224 | /* There is one extra instruction before the branch, so we must add | |
225 | two more bytes to account for it. */ | |
226 | #define COND12_F 4100 | |
227 | #define COND12_M -4090 | |
228 | #define COND12_LENGTH 6 | |
229 | ||
230 | #define COND12_DELAY_LENGTH 4 | |
231 | ||
232 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
233 | since this relocation type is not supported yet. */ | |
234 | #define COND32_F (1<<30) | |
235 | #define COND32_M -(1<<30) | |
236 | #define COND32_LENGTH 14 | |
237 | ||
238 | #define UNCOND12_F 4098 | |
239 | #define UNCOND12_M -4092 | |
240 | #define UNCOND12_LENGTH 2 | |
241 | ||
242 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
243 | since this relocation type is not supported yet. */ | |
244 | #define UNCOND32_F (1<<30) | |
245 | #define UNCOND32_M -(1<<30) | |
246 | #define UNCOND32_LENGTH 14 | |
247 | ||
324bfcf3 AO |
248 | #ifdef HAVE_SH64 |
249 | /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label, | |
250 | TRd" as is the current insn, so no extra length. Note that the "reach" | |
251 | is calculated from the address *after* that insn, but the offset in the | |
252 | insn is calculated from the beginning of the insn. We also need to | |
253 | take into account the implicit 1 coded as the "A" in PTA when counting | |
254 | forward. If PTB reaches an odd address, we trap that as an error | |
255 | elsewhere, so we don't have to have different relaxation entries. We | |
256 | don't add a one to the negative range, since PTB would then have the | |
257 | farthest backward-reaching value skipped, not generated at relaxation. */ | |
258 | #define SH64PCREL16_F (32767 * 4 - 4 + 1) | |
259 | #define SH64PCREL16_M (-32768 * 4 - 4) | |
260 | #define SH64PCREL16_LENGTH 0 | |
261 | ||
262 | /* The next step is to change that PT insn into | |
263 | MOVI ((label - datalabel Ln) >> 16) & 65535, R25 | |
264 | SHORI (label - datalabel Ln) & 65535, R25 | |
265 | Ln: | |
266 | PTREL R25,TRd | |
267 | which means two extra insns, 8 extra bytes. This is the limit for the | |
268 | 32-bit ABI. | |
269 | ||
270 | The expressions look a bit bad since we have to adjust this to avoid overflow on a | |
271 | 32-bit host. */ | |
272 | #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4) | |
273 | #define SH64PCREL32_LENGTH (2 * 4) | |
274 | ||
275 | /* Similarly, we just change the MOVI and add a SHORI for the 48-bit | |
276 | expansion. */ | |
277 | #if BFD_HOST_64BIT_LONG | |
278 | /* The "reach" type is long, so we can only do this for a 64-bit-long | |
279 | host. */ | |
280 | #define SH64PCREL32_M (((long) -1 << 30) * 2 - 4) | |
281 | #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4) | |
282 | #define SH64PCREL48_M (((long) -1 << 47) - 4) | |
283 | #define SH64PCREL48_LENGTH (3 * 4) | |
284 | #else | |
285 | /* If the host does not have 64-bit longs, just make this state identical | |
286 | in reach to the 32-bit state. Note that we have a slightly incorrect | |
287 | reach, but the correct one above will overflow a 32-bit number. */ | |
288 | #define SH64PCREL32_M (((long) -1 << 30) * 2) | |
289 | #define SH64PCREL48_F SH64PCREL32_F | |
290 | #define SH64PCREL48_M SH64PCREL32_M | |
291 | #define SH64PCREL48_LENGTH (3 * 4) | |
292 | #endif /* BFD_HOST_64BIT_LONG */ | |
293 | ||
294 | /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI | |
295 | + PTREL sequence. */ | |
296 | #define SH64PCREL64_LENGTH (4 * 4) | |
297 | ||
298 | /* For MOVI, we make the MOVI + SHORI... expansion you can see in the | |
299 | SH64PCREL expansions. The PCREL one is similar, but the other has no | |
300 | pc-relative reach; it must be fully expanded in | |
301 | shmedia_md_estimate_size_before_relax. */ | |
302 | #define MOVI_16_LENGTH 0 | |
303 | #define MOVI_16_F (32767 - 4) | |
304 | #define MOVI_16_M (-32768 - 4) | |
305 | #define MOVI_32_LENGTH 4 | |
306 | #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4) | |
307 | #define MOVI_48_LENGTH 8 | |
308 | ||
309 | #if BFD_HOST_64BIT_LONG | |
310 | /* The "reach" type is long, so we can only do this for a 64-bit-long | |
311 | host. */ | |
312 | #define MOVI_32_M (((long) -1 << 30) * 2 - 4) | |
313 | #define MOVI_48_F ((((long) 1 << 47) - 1) - 4) | |
314 | #define MOVI_48_M (((long) -1 << 47) - 4) | |
315 | #else | |
316 | /* If the host does not have 64-bit longs, just make this state identical | |
317 | in reach to the 32-bit state. Note that we have a slightly incorrect | |
318 | reach, but the correct one above will overflow a 32-bit number. */ | |
319 | #define MOVI_32_M (((long) -1 << 30) * 2) | |
320 | #define MOVI_48_F MOVI_32_F | |
321 | #define MOVI_48_M MOVI_32_M | |
322 | #endif /* BFD_HOST_64BIT_LONG */ | |
323 | ||
324 | #define MOVI_64_LENGTH 12 | |
325 | #endif /* HAVE_SH64 */ | |
326 | ||
43841e91 NC |
327 | #define EMPTY { 0, 0, 0, 0 } |
328 | ||
252b5132 | 329 | const relax_typeS md_relax_table[C (END, 0)] = { |
43841e91 NC |
330 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
331 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
252b5132 | 332 | |
43841e91 | 333 | EMPTY, |
252b5132 RH |
334 | /* C (COND_JUMP, COND8) */ |
335 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, | |
336 | /* C (COND_JUMP, COND12) */ | |
337 | { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, | |
338 | /* C (COND_JUMP, COND32) */ | |
339 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
e66457fb AM |
340 | /* C (COND_JUMP, UNDEF_WORD_DISP) */ |
341 | { 0, 0, COND32_LENGTH, 0, }, | |
342 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 343 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 | 344 | |
43841e91 | 345 | EMPTY, |
252b5132 RH |
346 | /* C (COND_JUMP_DELAY, COND8) */ |
347 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, | |
348 | /* C (COND_JUMP_DELAY, COND12) */ | |
349 | { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, | |
350 | /* C (COND_JUMP_DELAY, COND32) */ | |
351 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
e66457fb AM |
352 | /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */ |
353 | { 0, 0, COND32_LENGTH, 0, }, | |
354 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 355 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 | 356 | |
43841e91 | 357 | EMPTY, |
252b5132 RH |
358 | /* C (UNCOND_JUMP, UNCOND12) */ |
359 | { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, | |
360 | /* C (UNCOND_JUMP, UNCOND32) */ | |
361 | { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, | |
e66457fb AM |
362 | EMPTY, |
363 | /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */ | |
364 | { 0, 0, UNCOND32_LENGTH, 0, }, | |
365 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 366 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
324bfcf3 AO |
367 | |
368 | #ifdef HAVE_SH64 | |
369 | /* C (SH64PCREL16_32, SH64PCREL16) */ | |
370 | EMPTY, | |
371 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_32, SH64PCREL32) }, | |
372 | /* C (SH64PCREL16_32, SH64PCREL32) */ | |
373 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
374 | EMPTY, EMPTY, | |
375 | /* C (SH64PCREL16_32, SH64PCRELPLT) */ | |
376 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
377 | EMPTY, EMPTY, | |
378 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
379 | ||
380 | /* C (SH64PCREL16_64, SH64PCREL16) */ | |
381 | EMPTY, | |
382 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_64, SH64PCREL32) }, | |
383 | /* C (SH64PCREL16_64, SH64PCREL32) */ | |
384 | { SH64PCREL32_F, SH64PCREL32_M, SH64PCREL32_LENGTH, C (SH64PCREL16_64, SH64PCREL48) }, | |
385 | /* C (SH64PCREL16_64, SH64PCREL48) */ | |
386 | { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16_64, SH64PCREL64) }, | |
387 | /* C (SH64PCREL16_64, SH64PCREL64) */ | |
388 | { 0, 0, SH64PCREL64_LENGTH, 0 }, | |
389 | /* C (SH64PCREL16_64, SH64PCRELPLT) */ | |
390 | { 0, 0, SH64PCREL64_LENGTH, 0 }, | |
391 | EMPTY, EMPTY, | |
392 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
393 | ||
394 | /* C (SH64PCREL16PT_32, SH64PCREL16) */ | |
395 | EMPTY, | |
396 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_32, SH64PCREL32) }, | |
397 | /* C (SH64PCREL16PT_32, SH64PCREL32) */ | |
398 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
399 | EMPTY, EMPTY, | |
400 | /* C (SH64PCREL16PT_32, SH64PCRELPLT) */ | |
401 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
402 | EMPTY, EMPTY, | |
403 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
404 | ||
405 | /* C (SH64PCREL16PT_64, SH64PCREL16) */ | |
406 | EMPTY, | |
407 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_64, SH64PCREL32) }, | |
408 | /* C (SH64PCREL16PT_64, SH64PCREL32) */ | |
409 | { SH64PCREL32_F, | |
5d6255fe | 410 | SH64PCREL32_M, |
324bfcf3 AO |
411 | SH64PCREL32_LENGTH, |
412 | C (SH64PCREL16PT_64, SH64PCREL48) }, | |
413 | /* C (SH64PCREL16PT_64, SH64PCREL48) */ | |
414 | { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16PT_64, SH64PCREL64) }, | |
415 | /* C (SH64PCREL16PT_64, SH64PCREL64) */ | |
416 | { 0, 0, SH64PCREL64_LENGTH, 0 }, | |
417 | /* C (SH64PCREL16PT_64, SH64PCRELPLT) */ | |
418 | { 0, 0, SH64PCREL64_LENGTH, 0}, | |
419 | EMPTY, EMPTY, | |
420 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
421 | ||
422 | /* C (MOVI_IMM_32, UNDEF_MOVI) */ | |
423 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
424 | /* C (MOVI_IMM_32, MOVI_16) */ | |
425 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32, MOVI_32) }, | |
426 | /* C (MOVI_IMM_32, MOVI_32) */ | |
427 | { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, 0 }, | |
428 | EMPTY, EMPTY, EMPTY, | |
429 | /* C (MOVI_IMM_32, MOVI_GOTOFF) */ | |
430 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
431 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
432 | ||
433 | /* C (MOVI_IMM_32_PCREL, MOVI_16) */ | |
434 | EMPTY, | |
435 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32_PCREL, MOVI_32) }, | |
436 | /* C (MOVI_IMM_32_PCREL, MOVI_32) */ | |
437 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
438 | EMPTY, EMPTY, | |
439 | /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */ | |
440 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
441 | EMPTY, | |
442 | /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */ | |
443 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
444 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
445 | ||
446 | /* C (MOVI_IMM_64, UNDEF_MOVI) */ | |
447 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
448 | /* C (MOVI_IMM_64, MOVI_16) */ | |
449 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64, MOVI_32) }, | |
450 | /* C (MOVI_IMM_64, MOVI_32) */ | |
451 | { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64, MOVI_48) }, | |
452 | /* C (MOVI_IMM_64, MOVI_48) */ | |
453 | { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64, MOVI_64) }, | |
454 | /* C (MOVI_IMM_64, MOVI_64) */ | |
455 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
456 | EMPTY, | |
457 | /* C (MOVI_IMM_64, MOVI_GOTOFF) */ | |
458 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
459 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
460 | ||
461 | /* C (MOVI_IMM_64_PCREL, MOVI_16) */ | |
462 | EMPTY, | |
463 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_32) }, | |
464 | /* C (MOVI_IMM_64_PCREL, MOVI_32) */ | |
465 | { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_48) }, | |
466 | /* C (MOVI_IMM_64_PCREL, MOVI_48) */ | |
467 | { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_64) }, | |
468 | /* C (MOVI_IMM_64_PCREL, MOVI_64) */ | |
469 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
470 | /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */ | |
471 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
472 | EMPTY, | |
473 | /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */ | |
474 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
475 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
476 | ||
477 | #endif /* HAVE_SH64 */ | |
478 | ||
252b5132 RH |
479 | }; |
480 | ||
43841e91 NC |
481 | #undef EMPTY |
482 | ||
252b5132 RH |
483 | static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ |
484 | ||
a1cc9221 AO |
485 | \f |
486 | #ifdef OBJ_ELF | |
538cd60f AO |
487 | /* Determinet whether the symbol needs any kind of PIC relocation. */ |
488 | ||
489 | inline static int | |
8edc77b9 | 490 | sh_PIC_related_p (symbolS *sym) |
a1cc9221 | 491 | { |
538cd60f | 492 | expressionS *exp; |
a1cc9221 | 493 | |
538cd60f AO |
494 | if (! sym) |
495 | return 0; | |
496 | ||
497 | if (sym == GOT_symbol) | |
498 | return 1; | |
499 | ||
324bfcf3 AO |
500 | #ifdef HAVE_SH64 |
501 | if (sh_PIC_related_p (*symbol_get_tc (sym))) | |
502 | return 1; | |
503 | #endif | |
504 | ||
538cd60f AO |
505 | exp = symbol_get_value_expression (sym); |
506 | ||
507 | return (exp->X_op == O_PIC_reloc | |
508 | || sh_PIC_related_p (exp->X_add_symbol) | |
509 | || sh_PIC_related_p (exp->X_op_symbol)); | |
510 | } | |
511 | ||
512 | /* Determine the relocation type to be used to represent the | |
513 | expression, that may be rearranged. */ | |
514 | ||
515 | static int | |
8edc77b9 | 516 | sh_check_fixup (expressionS *main_exp, bfd_reloc_code_real_type *r_type_p) |
538cd60f AO |
517 | { |
518 | expressionS *exp = main_exp; | |
519 | ||
520 | /* This is here for backward-compatibility only. GCC used to generated: | |
521 | ||
522 | f@PLT + . - (.LPCS# + 2) | |
523 | ||
524 | but we'd rather be able to handle this as a PIC-related reference | |
525 | plus/minus a symbol. However, gas' parser gives us: | |
526 | ||
527 | O_subtract (O_add (f@PLT, .), .LPCS#+2) | |
5d6255fe | 528 | |
538cd60f AO |
529 | so we attempt to transform this into: |
530 | ||
531 | O_subtract (f@PLT, O_subtract (.LPCS#+2, .)) | |
532 | ||
5d6255fe | 533 | which we can handle simply below. */ |
538cd60f AO |
534 | if (exp->X_op == O_subtract) |
535 | { | |
536 | if (sh_PIC_related_p (exp->X_op_symbol)) | |
537 | return 1; | |
538 | ||
539 | exp = symbol_get_value_expression (exp->X_add_symbol); | |
540 | ||
541 | if (exp && sh_PIC_related_p (exp->X_op_symbol)) | |
542 | return 1; | |
543 | ||
544 | if (exp && exp->X_op == O_add | |
545 | && sh_PIC_related_p (exp->X_add_symbol)) | |
546 | { | |
547 | symbolS *sym = exp->X_add_symbol; | |
548 | ||
549 | exp->X_op = O_subtract; | |
550 | exp->X_add_symbol = main_exp->X_op_symbol; | |
551 | ||
552 | main_exp->X_op_symbol = main_exp->X_add_symbol; | |
553 | main_exp->X_add_symbol = sym; | |
554 | ||
555 | main_exp->X_add_number += exp->X_add_number; | |
556 | exp->X_add_number = 0; | |
557 | } | |
558 | ||
559 | exp = main_exp; | |
560 | } | |
561 | else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol)) | |
562 | return 1; | |
563 | ||
564 | if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract) | |
565 | { | |
324bfcf3 AO |
566 | #ifdef HAVE_SH64 |
567 | if (exp->X_add_symbol | |
568 | && (exp->X_add_symbol == GOT_symbol | |
569 | || (GOT_symbol | |
570 | && *symbol_get_tc (exp->X_add_symbol) == GOT_symbol))) | |
571 | { | |
572 | switch (*r_type_p) | |
573 | { | |
574 | case BFD_RELOC_SH_IMM_LOW16: | |
575 | *r_type_p = BFD_RELOC_SH_GOTPC_LOW16; | |
576 | break; | |
577 | ||
578 | case BFD_RELOC_SH_IMM_MEDLOW16: | |
579 | *r_type_p = BFD_RELOC_SH_GOTPC_MEDLOW16; | |
580 | break; | |
581 | ||
582 | case BFD_RELOC_SH_IMM_MEDHI16: | |
583 | *r_type_p = BFD_RELOC_SH_GOTPC_MEDHI16; | |
584 | break; | |
585 | ||
586 | case BFD_RELOC_SH_IMM_HI16: | |
587 | *r_type_p = BFD_RELOC_SH_GOTPC_HI16; | |
588 | break; | |
589 | ||
590 | case BFD_RELOC_NONE: | |
591 | case BFD_RELOC_UNUSED: | |
592 | *r_type_p = BFD_RELOC_SH_GOTPC; | |
593 | break; | |
5d6255fe | 594 | |
324bfcf3 AO |
595 | default: |
596 | abort (); | |
597 | } | |
598 | return 0; | |
599 | } | |
600 | #else | |
538cd60f AO |
601 | if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) |
602 | { | |
603 | *r_type_p = BFD_RELOC_SH_GOTPC; | |
604 | return 0; | |
605 | } | |
324bfcf3 | 606 | #endif |
538cd60f AO |
607 | exp = symbol_get_value_expression (exp->X_add_symbol); |
608 | if (! exp) | |
609 | return 0; | |
610 | } | |
611 | ||
612 | if (exp->X_op == O_PIC_reloc) | |
613 | { | |
324bfcf3 AO |
614 | #ifdef HAVE_SH64 |
615 | switch (*r_type_p) | |
616 | { | |
617 | case BFD_RELOC_NONE: | |
618 | case BFD_RELOC_UNUSED: | |
619 | *r_type_p = exp->X_md; | |
620 | break; | |
621 | ||
622 | case BFD_RELOC_SH_IMM_LOW16: | |
623 | switch (exp->X_md) | |
624 | { | |
625 | case BFD_RELOC_32_GOTOFF: | |
626 | *r_type_p = BFD_RELOC_SH_GOTOFF_LOW16; | |
627 | break; | |
5d6255fe | 628 | |
324bfcf3 AO |
629 | case BFD_RELOC_SH_GOTPLT32: |
630 | *r_type_p = BFD_RELOC_SH_GOTPLT_LOW16; | |
631 | break; | |
5d6255fe | 632 | |
324bfcf3 AO |
633 | case BFD_RELOC_32_GOT_PCREL: |
634 | *r_type_p = BFD_RELOC_SH_GOT_LOW16; | |
635 | break; | |
5d6255fe | 636 | |
324bfcf3 AO |
637 | case BFD_RELOC_32_PLT_PCREL: |
638 | *r_type_p = BFD_RELOC_SH_PLT_LOW16; | |
639 | break; | |
640 | ||
641 | default: | |
642 | abort (); | |
643 | } | |
644 | break; | |
645 | ||
646 | case BFD_RELOC_SH_IMM_MEDLOW16: | |
647 | switch (exp->X_md) | |
648 | { | |
649 | case BFD_RELOC_32_GOTOFF: | |
650 | *r_type_p = BFD_RELOC_SH_GOTOFF_MEDLOW16; | |
651 | break; | |
5d6255fe | 652 | |
324bfcf3 AO |
653 | case BFD_RELOC_SH_GOTPLT32: |
654 | *r_type_p = BFD_RELOC_SH_GOTPLT_MEDLOW16; | |
655 | break; | |
5d6255fe | 656 | |
324bfcf3 AO |
657 | case BFD_RELOC_32_GOT_PCREL: |
658 | *r_type_p = BFD_RELOC_SH_GOT_MEDLOW16; | |
659 | break; | |
5d6255fe | 660 | |
324bfcf3 AO |
661 | case BFD_RELOC_32_PLT_PCREL: |
662 | *r_type_p = BFD_RELOC_SH_PLT_MEDLOW16; | |
663 | break; | |
664 | ||
665 | default: | |
666 | abort (); | |
667 | } | |
668 | break; | |
669 | ||
670 | case BFD_RELOC_SH_IMM_MEDHI16: | |
671 | switch (exp->X_md) | |
672 | { | |
673 | case BFD_RELOC_32_GOTOFF: | |
674 | *r_type_p = BFD_RELOC_SH_GOTOFF_MEDHI16; | |
675 | break; | |
5d6255fe | 676 | |
324bfcf3 AO |
677 | case BFD_RELOC_SH_GOTPLT32: |
678 | *r_type_p = BFD_RELOC_SH_GOTPLT_MEDHI16; | |
679 | break; | |
5d6255fe | 680 | |
324bfcf3 AO |
681 | case BFD_RELOC_32_GOT_PCREL: |
682 | *r_type_p = BFD_RELOC_SH_GOT_MEDHI16; | |
683 | break; | |
5d6255fe | 684 | |
324bfcf3 AO |
685 | case BFD_RELOC_32_PLT_PCREL: |
686 | *r_type_p = BFD_RELOC_SH_PLT_MEDHI16; | |
687 | break; | |
688 | ||
689 | default: | |
690 | abort (); | |
691 | } | |
692 | break; | |
693 | ||
694 | case BFD_RELOC_SH_IMM_HI16: | |
695 | switch (exp->X_md) | |
696 | { | |
697 | case BFD_RELOC_32_GOTOFF: | |
698 | *r_type_p = BFD_RELOC_SH_GOTOFF_HI16; | |
699 | break; | |
5d6255fe | 700 | |
324bfcf3 AO |
701 | case BFD_RELOC_SH_GOTPLT32: |
702 | *r_type_p = BFD_RELOC_SH_GOTPLT_HI16; | |
703 | break; | |
5d6255fe | 704 | |
324bfcf3 AO |
705 | case BFD_RELOC_32_GOT_PCREL: |
706 | *r_type_p = BFD_RELOC_SH_GOT_HI16; | |
707 | break; | |
5d6255fe | 708 | |
324bfcf3 AO |
709 | case BFD_RELOC_32_PLT_PCREL: |
710 | *r_type_p = BFD_RELOC_SH_PLT_HI16; | |
711 | break; | |
712 | ||
713 | default: | |
714 | abort (); | |
715 | } | |
716 | break; | |
717 | ||
718 | default: | |
719 | abort (); | |
720 | } | |
721 | #else | |
538cd60f | 722 | *r_type_p = exp->X_md; |
324bfcf3 | 723 | #endif |
538cd60f AO |
724 | if (exp == main_exp) |
725 | exp->X_op = O_symbol; | |
726 | else | |
727 | { | |
728 | main_exp->X_add_symbol = exp->X_add_symbol; | |
729 | main_exp->X_add_number += exp->X_add_number; | |
730 | } | |
731 | } | |
732 | else | |
733 | return (sh_PIC_related_p (exp->X_add_symbol) | |
734 | || sh_PIC_related_p (exp->X_op_symbol)); | |
735 | ||
736 | return 0; | |
737 | } | |
738 | ||
739 | /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */ | |
740 | ||
741 | void | |
8edc77b9 | 742 | sh_cons_fix_new (fragS *frag, int off, int size, expressionS *exp) |
538cd60f AO |
743 | { |
744 | bfd_reloc_code_real_type r_type = BFD_RELOC_UNUSED; | |
745 | ||
746 | if (sh_check_fixup (exp, &r_type)) | |
747 | as_bad (_("Invalid PIC expression.")); | |
748 | ||
749 | if (r_type == BFD_RELOC_UNUSED) | |
750 | switch (size) | |
a1cc9221 | 751 | { |
538cd60f AO |
752 | case 1: |
753 | r_type = BFD_RELOC_8; | |
754 | break; | |
a1cc9221 | 755 | |
538cd60f AO |
756 | case 2: |
757 | r_type = BFD_RELOC_16; | |
758 | break; | |
759 | ||
760 | case 4: | |
761 | r_type = BFD_RELOC_32; | |
762 | break; | |
a1cc9221 | 763 | |
324bfcf3 AO |
764 | #ifdef HAVE_SH64 |
765 | case 8: | |
766 | r_type = BFD_RELOC_64; | |
767 | break; | |
768 | #endif | |
769 | ||
538cd60f AO |
770 | default: |
771 | goto error; | |
772 | } | |
773 | else if (size != 4) | |
774 | { | |
775 | error: | |
776 | as_bad (_("unsupported BFD relocation size %u"), size); | |
777 | r_type = BFD_RELOC_UNUSED; | |
778 | } | |
5d6255fe | 779 | |
538cd60f | 780 | fix_new_exp (frag, off, size, exp, 0, r_type); |
a1cc9221 AO |
781 | } |
782 | ||
783 | /* The regular cons() function, that reads constants, doesn't support | |
784 | suffixes such as @GOT, @GOTOFF and @PLT, that generate | |
785 | machine-specific relocation types. So we must define it here. */ | |
786 | /* Clobbers input_line_pointer, checks end-of-line. */ | |
8edc77b9 | 787 | /* NBYTES 1=.byte, 2=.word, 4=.long */ |
a1cc9221 | 788 | static void |
8edc77b9 | 789 | sh_elf_cons (register int nbytes) |
a1cc9221 | 790 | { |
538cd60f | 791 | expressionS exp; |
a1cc9221 | 792 | |
324bfcf3 AO |
793 | #ifdef HAVE_SH64 |
794 | ||
795 | /* Update existing range to include a previous insn, if there was one. */ | |
b34976b6 | 796 | sh64_update_contents_mark (TRUE); |
324bfcf3 AO |
797 | |
798 | /* We need to make sure the contents type is set to data. */ | |
799 | sh64_flag_output (); | |
800 | ||
801 | #endif /* HAVE_SH64 */ | |
802 | ||
a1cc9221 AO |
803 | if (is_it_end_of_statement ()) |
804 | { | |
805 | demand_empty_rest_of_line (); | |
806 | return; | |
807 | } | |
808 | ||
028f09bd NC |
809 | #ifdef md_cons_align |
810 | md_cons_align (nbytes); | |
811 | #endif | |
812 | ||
a1cc9221 AO |
813 | do |
814 | { | |
815 | expression (&exp); | |
538cd60f | 816 | emit_expr (&exp, (unsigned int) nbytes); |
a1cc9221 AO |
817 | } |
818 | while (*input_line_pointer++ == ','); | |
819 | ||
81d4177b | 820 | input_line_pointer--; /* Put terminator back into stream. */ |
a1cc9221 AO |
821 | if (*input_line_pointer == '#' || *input_line_pointer == '!') |
822 | { | |
dda5ecfc | 823 | while (! is_end_of_line[(unsigned char) *input_line_pointer++]); |
a1cc9221 AO |
824 | } |
825 | else | |
826 | demand_empty_rest_of_line (); | |
827 | } | |
0cc34095 KK |
828 | |
829 | /* The regular frag_offset_fixed_p doesn't work for rs_align_test | |
830 | frags. */ | |
831 | ||
832 | static bfd_boolean | |
833 | align_test_frag_offset_fixed_p (const fragS *frag1, const fragS *frag2, | |
834 | bfd_vma *offset) | |
835 | { | |
836 | const fragS *frag; | |
837 | bfd_vma off; | |
838 | ||
839 | /* Start with offset initialised to difference between the two frags. | |
840 | Prior to assigning frag addresses this will be zero. */ | |
841 | off = frag1->fr_address - frag2->fr_address; | |
842 | if (frag1 == frag2) | |
843 | { | |
844 | *offset = off; | |
845 | return TRUE; | |
846 | } | |
847 | ||
848 | /* Maybe frag2 is after frag1. */ | |
849 | frag = frag1; | |
0838d2ac KK |
850 | while (frag->fr_type == rs_fill |
851 | || frag->fr_type == rs_align_test) | |
0cc34095 | 852 | { |
0838d2ac KK |
853 | if (frag->fr_type == rs_fill) |
854 | off += frag->fr_fix + frag->fr_offset * frag->fr_var; | |
855 | else | |
856 | off += frag->fr_fix; | |
0cc34095 KK |
857 | frag = frag->fr_next; |
858 | if (frag == NULL) | |
859 | break; | |
860 | if (frag == frag2) | |
861 | { | |
862 | *offset = off; | |
863 | return TRUE; | |
864 | } | |
865 | } | |
866 | ||
867 | /* Maybe frag1 is after frag2. */ | |
868 | off = frag1->fr_address - frag2->fr_address; | |
869 | frag = frag2; | |
0838d2ac KK |
870 | while (frag->fr_type == rs_fill |
871 | || frag->fr_type == rs_align_test) | |
0cc34095 | 872 | { |
0838d2ac KK |
873 | if (frag->fr_type == rs_fill) |
874 | off -= frag->fr_fix + frag->fr_offset * frag->fr_var; | |
875 | else | |
876 | off -= frag->fr_fix; | |
0cc34095 KK |
877 | frag = frag->fr_next; |
878 | if (frag == NULL) | |
879 | break; | |
880 | if (frag == frag1) | |
881 | { | |
882 | *offset = off; | |
883 | return TRUE; | |
884 | } | |
885 | } | |
886 | ||
887 | return FALSE; | |
888 | } | |
a1cc9221 | 889 | |
0cc34095 KK |
890 | /* Optimize a difference of symbols which have rs_align_test frag if |
891 | possible. */ | |
892 | ||
893 | int | |
894 | sh_optimize_expr (expressionS *l, operatorT op, expressionS *r) | |
895 | { | |
0cc34095 KK |
896 | bfd_vma frag_off; |
897 | ||
898 | if (op == O_subtract | |
899 | && l->X_op == O_symbol | |
900 | && r->X_op == O_symbol | |
901 | && S_GET_SEGMENT (l->X_add_symbol) == S_GET_SEGMENT (r->X_add_symbol) | |
902 | && (SEG_NORMAL (S_GET_SEGMENT (l->X_add_symbol)) | |
903 | || r->X_add_symbol == l->X_add_symbol) | |
904 | && align_test_frag_offset_fixed_p (symbol_get_frag (l->X_add_symbol), | |
905 | symbol_get_frag (r->X_add_symbol), | |
906 | &frag_off)) | |
907 | { | |
908 | l->X_add_number -= r->X_add_number; | |
909 | l->X_add_number -= frag_off / OCTETS_PER_BYTE; | |
910 | l->X_add_number += (S_GET_VALUE (l->X_add_symbol) | |
911 | - S_GET_VALUE (r->X_add_symbol)); | |
912 | l->X_op = O_constant; | |
913 | l->X_add_symbol = 0; | |
914 | return 1; | |
915 | } | |
0cc34095 KK |
916 | return 0; |
917 | } | |
541d2ffd | 918 | #endif /* OBJ_ELF */ |
a1cc9221 | 919 | \f |
6b31947e NC |
920 | /* This function is called once, at assembler startup time. This should |
921 | set up all the tables, etc that the MD part of the assembler needs. */ | |
252b5132 RH |
922 | |
923 | void | |
8edc77b9 | 924 | md_begin (void) |
252b5132 | 925 | { |
5ff37431 | 926 | const sh_opcode_info *opcode; |
252b5132 | 927 | char *prev_name = ""; |
f6f9408f | 928 | unsigned int target_arch; |
252b5132 | 929 | |
bdfaef52 | 930 | target_arch |
e38bc3b5 | 931 | = preset_target_arch ? preset_target_arch : arch_sh_up & ~arch_sh_has_dsp; |
d4845d57 JR |
932 | valid_arch = target_arch; |
933 | ||
324bfcf3 AO |
934 | #ifdef HAVE_SH64 |
935 | shmedia_md_begin (); | |
936 | #endif | |
937 | ||
252b5132 RH |
938 | opcode_hash_control = hash_new (); |
939 | ||
6b31947e | 940 | /* Insert unique names into hash table. */ |
252b5132 RH |
941 | for (opcode = sh_table; opcode->name; opcode++) |
942 | { | |
5ff37431 | 943 | if (strcmp (prev_name, opcode->name) != 0) |
252b5132 | 944 | { |
f6f9408f | 945 | if (!SH_MERGE_ARCH_SET_VALID (opcode->arch, target_arch)) |
a37c8f88 | 946 | continue; |
252b5132 RH |
947 | prev_name = opcode->name; |
948 | hash_insert (opcode_hash_control, opcode->name, (char *) opcode); | |
949 | } | |
252b5132 RH |
950 | } |
951 | } | |
952 | ||
953 | static int reg_m; | |
954 | static int reg_n; | |
d4845d57 JR |
955 | static int reg_x, reg_y; |
956 | static int reg_efg; | |
252b5132 RH |
957 | static int reg_b; |
958 | ||
3882b010 | 959 | #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_') |
dead1419 | 960 | |
6b31947e NC |
961 | /* Try to parse a reg name. Return the number of chars consumed. */ |
962 | ||
37dedf66 NC |
963 | static unsigned int |
964 | parse_reg_without_prefix (char *src, int *mode, int *reg) | |
252b5132 | 965 | { |
3882b010 L |
966 | char l0 = TOLOWER (src[0]); |
967 | char l1 = l0 ? TOLOWER (src[1]) : 0; | |
e46fee70 | 968 | |
dead1419 | 969 | /* We use ! IDENT_CHAR for the next character after the register name, to |
252b5132 | 970 | make sure that we won't accidentally recognize a symbol name such as |
dead1419 | 971 | 'sram' or sr_ram as being a reference to the register 'sr'. */ |
252b5132 | 972 | |
e46fee70 | 973 | if (l0 == 'r') |
252b5132 | 974 | { |
e46fee70 | 975 | if (l1 == '1') |
d4845d57 JR |
976 | { |
977 | if (src[2] >= '0' && src[2] <= '5' | |
dead1419 | 978 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
979 | { |
980 | *mode = A_REG_N; | |
981 | *reg = 10 + src[2] - '0'; | |
982 | return 3; | |
983 | } | |
984 | } | |
e46fee70 | 985 | if (l1 >= '0' && l1 <= '9' |
dead1419 | 986 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
987 | { |
988 | *mode = A_REG_N; | |
e46fee70 | 989 | *reg = (l1 - '0'); |
d4845d57 JR |
990 | return 2; |
991 | } | |
e46fee70 | 992 | if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0 |
dead1419 JR |
993 | && ! IDENT_CHAR ((unsigned char) src[7])) |
994 | { | |
995 | *mode = A_REG_B; | |
e46fee70 | 996 | *reg = (l1 - '0'); |
dead1419 JR |
997 | return 7; |
998 | } | |
d4845d57 | 999 | |
e46fee70 | 1000 | if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1001 | { |
1002 | *mode = A_RE; | |
1003 | return 2; | |
1004 | } | |
e46fee70 | 1005 | if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1006 | { |
1007 | *mode = A_RS; | |
1008 | return 2; | |
1009 | } | |
252b5132 RH |
1010 | } |
1011 | ||
e46fee70 | 1012 | if (l0 == 'a') |
252b5132 | 1013 | { |
e46fee70 | 1014 | if (l1 == '0') |
d4845d57 | 1015 | { |
dead1419 | 1016 | if (! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1017 | { |
1018 | *mode = DSP_REG_N; | |
1019 | *reg = A_A0_NUM; | |
1020 | return 2; | |
1021 | } | |
3882b010 | 1022 | if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
1023 | { |
1024 | *mode = DSP_REG_N; | |
1025 | *reg = A_A0G_NUM; | |
1026 | return 3; | |
1027 | } | |
1028 | } | |
e46fee70 | 1029 | if (l1 == '1') |
252b5132 | 1030 | { |
dead1419 | 1031 | if (! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 1032 | { |
d4845d57 JR |
1033 | *mode = DSP_REG_N; |
1034 | *reg = A_A1_NUM; | |
1035 | return 2; | |
1036 | } | |
3882b010 | 1037 | if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
1038 | { |
1039 | *mode = DSP_REG_N; | |
1040 | *reg = A_A1G_NUM; | |
252b5132 RH |
1041 | return 3; |
1042 | } | |
1043 | } | |
d4845d57 | 1044 | |
e46fee70 | 1045 | if (l1 == 'x' && src[2] >= '0' && src[2] <= '1' |
dead1419 | 1046 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1047 | { |
1048 | *mode = A_REG_N; | |
e46fee70 | 1049 | *reg = 4 + (l1 - '0'); |
d4845d57 JR |
1050 | return 3; |
1051 | } | |
e46fee70 | 1052 | if (l1 == 'y' && src[2] >= '0' && src[2] <= '1' |
dead1419 | 1053 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
1054 | { |
1055 | *mode = A_REG_N; | |
e46fee70 | 1056 | *reg = 6 + (l1 - '0'); |
d4845d57 JR |
1057 | return 3; |
1058 | } | |
e46fee70 | 1059 | if (l1 == 's' && src[2] >= '0' && src[2] <= '3' |
dead1419 | 1060 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 | 1061 | { |
e46fee70 | 1062 | int n = l1 - '0'; |
d4845d57 JR |
1063 | |
1064 | *mode = A_REG_N; | |
1065 | *reg = n | ((~n & 2) << 1); | |
1066 | return 3; | |
1067 | } | |
1068 | } | |
1069 | ||
912a07db | 1070 | if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 | 1071 | { |
e46fee70 | 1072 | if (l1 == 's') |
d4845d57 JR |
1073 | { |
1074 | *mode = A_REG_N; | |
1075 | *reg = 8; | |
252b5132 RH |
1076 | return 2; |
1077 | } | |
e46fee70 | 1078 | if (l1 == 'x') |
d4845d57 JR |
1079 | { |
1080 | *mode = A_REG_N; | |
1081 | *reg = 8; | |
1082 | return 2; | |
1083 | } | |
e46fee70 | 1084 | if (l1 == 'y') |
d4845d57 JR |
1085 | { |
1086 | *mode = A_REG_N; | |
1087 | *reg = 9; | |
1088 | return 2; | |
1089 | } | |
1090 | } | |
1091 | ||
e46fee70 | 1092 | if (l0 == 'x' && l1 >= '0' && l1 <= '1' |
dead1419 | 1093 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1094 | { |
1095 | *mode = DSP_REG_N; | |
e46fee70 | 1096 | *reg = A_X0_NUM + l1 - '0'; |
d4845d57 JR |
1097 | return 2; |
1098 | } | |
1099 | ||
e46fee70 | 1100 | if (l0 == 'y' && l1 >= '0' && l1 <= '1' |
dead1419 | 1101 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1102 | { |
1103 | *mode = DSP_REG_N; | |
e46fee70 | 1104 | *reg = A_Y0_NUM + l1 - '0'; |
d4845d57 JR |
1105 | return 2; |
1106 | } | |
1107 | ||
e46fee70 | 1108 | if (l0 == 'm' && l1 >= '0' && l1 <= '1' |
dead1419 | 1109 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1110 | { |
1111 | *mode = DSP_REG_N; | |
e46fee70 | 1112 | *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM; |
d4845d57 | 1113 | return 2; |
252b5132 RH |
1114 | } |
1115 | ||
e46fee70 HPN |
1116 | if (l0 == 's' |
1117 | && l1 == 's' | |
3882b010 | 1118 | && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1119 | { |
1120 | *mode = A_SSR; | |
1121 | return 3; | |
1122 | } | |
1123 | ||
3882b010 | 1124 | if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c' |
dead1419 | 1125 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1126 | { |
1127 | *mode = A_SPC; | |
1128 | return 3; | |
1129 | } | |
1130 | ||
3882b010 | 1131 | if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r' |
dead1419 | 1132 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1133 | { |
1134 | *mode = A_SGR; | |
1135 | return 3; | |
1136 | } | |
1137 | ||
3882b010 | 1138 | if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r' |
dead1419 | 1139 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
1140 | { |
1141 | *mode = A_DSR; | |
1142 | return 3; | |
1143 | } | |
1144 | ||
3882b010 | 1145 | if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 1146 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1147 | { |
1148 | *mode = A_DBR; | |
1149 | return 3; | |
1150 | } | |
1151 | ||
e46fee70 | 1152 | if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
1153 | { |
1154 | *mode = A_SR; | |
1155 | return 2; | |
1156 | } | |
1157 | ||
e46fee70 | 1158 | if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
1159 | { |
1160 | *mode = A_REG_N; | |
1161 | *reg = 15; | |
1162 | return 2; | |
1163 | } | |
1164 | ||
e46fee70 | 1165 | if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
1166 | { |
1167 | *mode = A_PR; | |
1168 | return 2; | |
1169 | } | |
e46fee70 | 1170 | if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 1171 | { |
015551fc JR |
1172 | /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0' |
1173 | and use an uninitialized immediate. */ | |
1174 | *mode = A_PC; | |
252b5132 RH |
1175 | return 2; |
1176 | } | |
3882b010 | 1177 | if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 1178 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1179 | { |
1180 | *mode = A_GBR; | |
1181 | return 3; | |
1182 | } | |
3882b010 | 1183 | if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 1184 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1185 | { |
1186 | *mode = A_VBR; | |
1187 | return 3; | |
1188 | } | |
1189 | ||
1d70c7fb AO |
1190 | if (l0 == 't' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
1191 | && ! IDENT_CHAR ((unsigned char) src[3])) | |
1192 | { | |
1193 | *mode = A_TBR; | |
1194 | return 3; | |
1195 | } | |
3882b010 | 1196 | if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c' |
dead1419 | 1197 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 | 1198 | { |
3882b010 | 1199 | if (TOLOWER (src[3]) == 'l') |
252b5132 RH |
1200 | { |
1201 | *mode = A_MACL; | |
1202 | return 4; | |
1203 | } | |
3882b010 | 1204 | if (TOLOWER (src[3]) == 'h') |
252b5132 RH |
1205 | { |
1206 | *mode = A_MACH; | |
1207 | return 4; | |
1208 | } | |
1209 | } | |
3882b010 | 1210 | if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd' |
912a07db | 1211 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
1212 | { |
1213 | *mode = A_MOD; | |
1214 | return 3; | |
1215 | } | |
e46fee70 | 1216 | if (l0 == 'f' && l1 == 'r') |
252b5132 RH |
1217 | { |
1218 | if (src[2] == '1') | |
1219 | { | |
1220 | if (src[3] >= '0' && src[3] <= '5' | |
dead1419 | 1221 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1222 | { |
1223 | *mode = F_REG_N; | |
1224 | *reg = 10 + src[3] - '0'; | |
1225 | return 4; | |
1226 | } | |
1227 | } | |
1228 | if (src[2] >= '0' && src[2] <= '9' | |
dead1419 | 1229 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1230 | { |
1231 | *mode = F_REG_N; | |
1232 | *reg = (src[2] - '0'); | |
1233 | return 3; | |
1234 | } | |
1235 | } | |
e46fee70 | 1236 | if (l0 == 'd' && l1 == 'r') |
252b5132 RH |
1237 | { |
1238 | if (src[2] == '1') | |
1239 | { | |
1240 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 1241 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1242 | { |
1243 | *mode = D_REG_N; | |
1244 | *reg = 10 + src[3] - '0'; | |
1245 | return 4; | |
1246 | } | |
1247 | } | |
1248 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 1249 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1250 | { |
1251 | *mode = D_REG_N; | |
1252 | *reg = (src[2] - '0'); | |
1253 | return 3; | |
1254 | } | |
1255 | } | |
e46fee70 | 1256 | if (l0 == 'x' && l1 == 'd') |
252b5132 RH |
1257 | { |
1258 | if (src[2] == '1') | |
1259 | { | |
1260 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 1261 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1262 | { |
1263 | *mode = X_REG_N; | |
1264 | *reg = 11 + src[3] - '0'; | |
1265 | return 4; | |
1266 | } | |
1267 | } | |
1268 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 1269 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1270 | { |
1271 | *mode = X_REG_N; | |
1272 | *reg = (src[2] - '0') + 1; | |
1273 | return 3; | |
1274 | } | |
1275 | } | |
e46fee70 | 1276 | if (l0 == 'f' && l1 == 'v') |
252b5132 | 1277 | { |
dead1419 | 1278 | if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1279 | { |
1280 | *mode = V_REG_N; | |
1281 | *reg = 12; | |
1282 | return 4; | |
1283 | } | |
1284 | if ((src[2] == '0' || src[2] == '4' || src[2] == '8') | |
dead1419 | 1285 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1286 | { |
1287 | *mode = V_REG_N; | |
1288 | *reg = (src[2] - '0'); | |
1289 | return 3; | |
1290 | } | |
1291 | } | |
3882b010 L |
1292 | if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u' |
1293 | && TOLOWER (src[3]) == 'l' | |
dead1419 | 1294 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1295 | { |
1296 | *mode = FPUL_N; | |
1297 | return 4; | |
1298 | } | |
1299 | ||
3882b010 L |
1300 | if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's' |
1301 | && TOLOWER (src[3]) == 'c' | |
1302 | && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5])) | |
252b5132 RH |
1303 | { |
1304 | *mode = FPSCR_N; | |
1305 | return 5; | |
1306 | } | |
1307 | ||
3882b010 L |
1308 | if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't' |
1309 | && TOLOWER (src[3]) == 'r' | |
1310 | && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5])) | |
252b5132 RH |
1311 | { |
1312 | *mode = XMTRX_M4; | |
1313 | return 5; | |
1314 | } | |
1315 | ||
1316 | return 0; | |
1317 | } | |
1318 | ||
37dedf66 NC |
1319 | /* Like parse_reg_without_prefix, but this version supports |
1320 | $-prefixed register names if enabled by the user. */ | |
1321 | ||
1322 | static unsigned int | |
1323 | parse_reg (char *src, int *mode, int *reg) | |
1324 | { | |
1325 | unsigned int prefix; | |
1326 | unsigned int consumed; | |
1327 | ||
1328 | if (src[0] == '$') | |
1329 | { | |
1330 | if (allow_dollar_register_prefix) | |
1331 | { | |
1332 | src ++; | |
1333 | prefix = 1; | |
1334 | } | |
1335 | else | |
1336 | return 0; | |
1337 | } | |
1338 | else | |
1339 | prefix = 0; | |
1340 | ||
1341 | consumed = parse_reg_without_prefix (src, mode, reg); | |
1342 | ||
1343 | if (consumed == 0) | |
1344 | return 0; | |
1345 | ||
1346 | return consumed + prefix; | |
1347 | } | |
1348 | ||
c4aa876b | 1349 | static char * |
8edc77b9 | 1350 | parse_exp (char *s, sh_operand_info *op) |
252b5132 RH |
1351 | { |
1352 | char *save; | |
1353 | char *new; | |
1354 | ||
1355 | save = input_line_pointer; | |
1356 | input_line_pointer = s; | |
015551fc JR |
1357 | expression (&op->immediate); |
1358 | if (op->immediate.X_op == O_absent) | |
252b5132 | 1359 | as_bad (_("missing operand")); |
538cd60f AO |
1360 | #ifdef OBJ_ELF |
1361 | else if (op->immediate.X_op == O_PIC_reloc | |
1362 | || sh_PIC_related_p (op->immediate.X_add_symbol) | |
1363 | || sh_PIC_related_p (op->immediate.X_op_symbol)) | |
1364 | as_bad (_("misplaced PIC operand")); | |
1365 | #endif | |
252b5132 RH |
1366 | new = input_line_pointer; |
1367 | input_line_pointer = save; | |
1368 | return new; | |
1369 | } | |
1370 | ||
252b5132 RH |
1371 | /* The many forms of operand: |
1372 | ||
1373 | Rn Register direct | |
1374 | @Rn Register indirect | |
1375 | @Rn+ Autoincrement | |
1376 | @-Rn Autodecrement | |
1377 | @(disp:4,Rn) | |
1378 | @(disp:8,GBR) | |
1379 | @(disp:8,PC) | |
1380 | ||
1381 | @(R0,Rn) | |
1382 | @(R0,GBR) | |
1383 | ||
1384 | disp:8 | |
1385 | disp:12 | |
1386 | #imm8 | |
1387 | pr, gbr, vbr, macl, mach | |
252b5132 RH |
1388 | */ |
1389 | ||
c4aa876b | 1390 | static char * |
8edc77b9 | 1391 | parse_at (char *src, sh_operand_info *op) |
252b5132 RH |
1392 | { |
1393 | int len; | |
1394 | int mode; | |
1395 | src++; | |
1d70c7fb AO |
1396 | if (src[0] == '@') |
1397 | { | |
1398 | src = parse_at (src, op); | |
1399 | if (op->type == A_DISP_TBR) | |
1400 | op->type = A_DISP2_TBR; | |
1401 | else | |
1402 | as_bad (_("illegal double indirection")); | |
1403 | } | |
1404 | else if (src[0] == '-') | |
252b5132 | 1405 | { |
6b31947e | 1406 | /* Must be predecrement. */ |
252b5132 RH |
1407 | src++; |
1408 | ||
1409 | len = parse_reg (src, &mode, &(op->reg)); | |
1410 | if (mode != A_REG_N) | |
1411 | as_bad (_("illegal register after @-")); | |
1412 | ||
1413 | op->type = A_DEC_N; | |
1414 | src += len; | |
1415 | } | |
1416 | else if (src[0] == '(') | |
1417 | { | |
1418 | /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or | |
8d4d84c2 | 1419 | @(r0, rn). */ |
252b5132 RH |
1420 | src++; |
1421 | len = parse_reg (src, &mode, &(op->reg)); | |
1422 | if (len && mode == A_REG_N) | |
1423 | { | |
1424 | src += len; | |
1425 | if (op->reg != 0) | |
1426 | { | |
1427 | as_bad (_("must be @(r0,...)")); | |
1428 | } | |
1429 | if (src[0] == ',') | |
252b5132 | 1430 | { |
8d4d84c2 AO |
1431 | src++; |
1432 | /* Now can be rn or gbr. */ | |
1433 | len = parse_reg (src, &mode, &(op->reg)); | |
1434 | } | |
1435 | else | |
1436 | { | |
1437 | len = 0; | |
252b5132 | 1438 | } |
8d4d84c2 | 1439 | if (len) |
252b5132 | 1440 | { |
8d4d84c2 AO |
1441 | if (mode == A_GBR) |
1442 | { | |
1443 | op->type = A_R0_GBR; | |
1444 | } | |
1445 | else if (mode == A_REG_N) | |
1446 | { | |
1447 | op->type = A_IND_R0_REG_N; | |
1448 | } | |
1449 | else | |
1450 | { | |
1451 | as_bad (_("syntax error in @(r0,...)")); | |
1452 | } | |
252b5132 RH |
1453 | } |
1454 | else | |
1455 | { | |
8d4d84c2 | 1456 | as_bad (_("syntax error in @(r0...)")); |
252b5132 RH |
1457 | } |
1458 | } | |
1459 | else | |
1460 | { | |
8d4d84c2 | 1461 | /* Must be an @(disp,.. thing). */ |
015551fc | 1462 | src = parse_exp (src, op); |
252b5132 RH |
1463 | if (src[0] == ',') |
1464 | src++; | |
8d4d84c2 | 1465 | /* Now can be rn, gbr or pc. */ |
252b5132 RH |
1466 | len = parse_reg (src, &mode, &op->reg); |
1467 | if (len) | |
1468 | { | |
1469 | if (mode == A_REG_N) | |
1470 | { | |
1471 | op->type = A_DISP_REG_N; | |
1472 | } | |
1473 | else if (mode == A_GBR) | |
1474 | { | |
1475 | op->type = A_DISP_GBR; | |
1476 | } | |
1d70c7fb AO |
1477 | else if (mode == A_TBR) |
1478 | { | |
1479 | op->type = A_DISP_TBR; | |
1480 | } | |
015551fc | 1481 | else if (mode == A_PC) |
252b5132 | 1482 | { |
dbb4348d JR |
1483 | /* We want @(expr, pc) to uniformly address . + expr, |
1484 | no matter if expr is a constant, or a more complex | |
1485 | expression, e.g. sym-. or sym1-sym2. | |
1486 | However, we also used to accept @(sym,pc) | |
67c1ffbe | 1487 | as addressing sym, i.e. meaning the same as plain sym. |
dbb4348d JR |
1488 | Some existing code does use the @(sym,pc) syntax, so |
1489 | we give it the old semantics for now, but warn about | |
1490 | its use, so that users have some time to fix their code. | |
1491 | ||
1492 | Note that due to this backward compatibility hack, | |
1493 | we'll get unexpected results when @(offset, pc) is used, | |
1494 | and offset is a symbol that is set later to an an address | |
1495 | difference, or an external symbol that is set to an | |
1496 | address difference in another source file, so we want to | |
1497 | eventually remove it. */ | |
9691d64f JR |
1498 | if (op->immediate.X_op == O_symbol) |
1499 | { | |
1500 | op->type = A_DISP_PC; | |
1501 | as_warn (_("Deprecated syntax.")); | |
1502 | } | |
1503 | else | |
1504 | { | |
1505 | op->type = A_DISP_PC_ABS; | |
1506 | /* Such operands don't get corrected for PC==.+4, so | |
1507 | make the correction here. */ | |
1508 | op->immediate.X_add_number -= 4; | |
1509 | } | |
252b5132 RH |
1510 | } |
1511 | else | |
1512 | { | |
1513 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
1514 | } | |
1515 | } | |
1516 | else | |
1517 | { | |
1518 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
1519 | } | |
1520 | } | |
1521 | src += len; | |
1522 | if (src[0] != ')') | |
1523 | as_bad (_("expecting )")); | |
1524 | else | |
1525 | src++; | |
1526 | } | |
1527 | else | |
1528 | { | |
1529 | src += parse_reg (src, &mode, &(op->reg)); | |
1530 | if (mode != A_REG_N) | |
006299d3 NC |
1531 | as_bad (_("illegal register after @")); |
1532 | ||
252b5132 RH |
1533 | if (src[0] == '+') |
1534 | { | |
1000a02a NC |
1535 | char l0, l1; |
1536 | ||
252b5132 | 1537 | src++; |
1000a02a NC |
1538 | l0 = TOLOWER (src[0]); |
1539 | l1 = TOLOWER (src[1]); | |
1540 | ||
1541 | if ((l0 == 'r' && l1 == '8') | |
1542 | || (l0 == 'i' && (l1 == 'x' || l1 == 's'))) | |
d4845d57 JR |
1543 | { |
1544 | src += 2; | |
88da98f3 | 1545 | op->type = AX_PMOD_N; |
d4845d57 | 1546 | } |
006299d3 NC |
1547 | else if ( (l0 == 'r' && l1 == '9') |
1548 | || (l0 == 'i' && l1 == 'y')) | |
d4845d57 JR |
1549 | { |
1550 | src += 2; | |
88da98f3 | 1551 | op->type = AY_PMOD_N; |
d4845d57 JR |
1552 | } |
1553 | else | |
1554 | op->type = A_INC_N; | |
252b5132 RH |
1555 | } |
1556 | else | |
006299d3 | 1557 | op->type = A_IND_N; |
252b5132 RH |
1558 | } |
1559 | return src; | |
1560 | } | |
1561 | ||
1562 | static void | |
8edc77b9 | 1563 | get_operand (char **ptr, sh_operand_info *op) |
252b5132 RH |
1564 | { |
1565 | char *src = *ptr; | |
1566 | int mode = -1; | |
1567 | unsigned int len; | |
1568 | ||
1569 | if (src[0] == '#') | |
1570 | { | |
1571 | src++; | |
015551fc | 1572 | *ptr = parse_exp (src, op); |
252b5132 RH |
1573 | op->type = A_IMM; |
1574 | return; | |
1575 | } | |
1576 | ||
1577 | else if (src[0] == '@') | |
1578 | { | |
1579 | *ptr = parse_at (src, op); | |
1580 | return; | |
1581 | } | |
1582 | len = parse_reg (src, &mode, &(op->reg)); | |
1583 | if (len) | |
1584 | { | |
1585 | *ptr = src + len; | |
1586 | op->type = mode; | |
1587 | return; | |
1588 | } | |
1589 | else | |
1590 | { | |
6b31947e | 1591 | /* Not a reg, the only thing left is a displacement. */ |
015551fc | 1592 | *ptr = parse_exp (src, op); |
252b5132 RH |
1593 | op->type = A_DISP_PC; |
1594 | return; | |
1595 | } | |
1596 | } | |
1597 | ||
c4aa876b | 1598 | static char * |
8edc77b9 | 1599 | get_operands (sh_opcode_info *info, char *args, sh_operand_info *operand) |
252b5132 RH |
1600 | { |
1601 | char *ptr = args; | |
1602 | if (info->arg[0]) | |
1603 | { | |
d4845d57 JR |
1604 | /* The pre-processor will eliminate whitespace in front of '@' |
1605 | after the first argument; we may be called multiple times | |
1606 | from assemble_ppi, so don't insist on finding whitespace here. */ | |
1607 | if (*ptr == ' ') | |
1608 | ptr++; | |
252b5132 RH |
1609 | |
1610 | get_operand (&ptr, operand + 0); | |
1611 | if (info->arg[1]) | |
1612 | { | |
1613 | if (*ptr == ',') | |
1614 | { | |
1615 | ptr++; | |
1616 | } | |
1617 | get_operand (&ptr, operand + 1); | |
52ccafd0 JR |
1618 | /* ??? Hack: psha/pshl have a varying operand number depending on |
1619 | the type of the first operand. We handle this by having the | |
1620 | three-operand version first and reducing the number of operands | |
1621 | parsed to two if we see that the first operand is an immediate. | |
1622 | This works because no insn with three operands has an immediate | |
1623 | as first operand. */ | |
1624 | if (info->arg[2] && operand[0].type != A_IMM) | |
252b5132 RH |
1625 | { |
1626 | if (*ptr == ',') | |
1627 | { | |
1628 | ptr++; | |
1629 | } | |
1630 | get_operand (&ptr, operand + 2); | |
1631 | } | |
1632 | else | |
1633 | { | |
1634 | operand[2].type = 0; | |
1635 | } | |
1636 | } | |
1637 | else | |
1638 | { | |
1639 | operand[1].type = 0; | |
1640 | operand[2].type = 0; | |
1641 | } | |
1642 | } | |
1643 | else | |
1644 | { | |
1645 | operand[0].type = 0; | |
1646 | operand[1].type = 0; | |
1647 | operand[2].type = 0; | |
1648 | } | |
1649 | return ptr; | |
1650 | } | |
1651 | ||
1652 | /* Passed a pointer to a list of opcodes which use different | |
1653 | addressing modes, return the opcode which matches the opcodes | |
6b31947e | 1654 | provided. */ |
252b5132 | 1655 | |
c4aa876b | 1656 | static sh_opcode_info * |
8edc77b9 | 1657 | get_specific (sh_opcode_info *opcode, sh_operand_info *operands) |
252b5132 RH |
1658 | { |
1659 | sh_opcode_info *this_try = opcode; | |
1660 | char *name = opcode->name; | |
1661 | int n = 0; | |
c4aa876b | 1662 | |
252b5132 RH |
1663 | while (opcode->name) |
1664 | { | |
1665 | this_try = opcode++; | |
5ff37431 | 1666 | if ((this_try->name != name) && (strcmp (this_try->name, name) != 0)) |
252b5132 RH |
1667 | { |
1668 | /* We've looked so far down the table that we've run out of | |
6b31947e | 1669 | opcodes with the same name. */ |
252b5132 RH |
1670 | return 0; |
1671 | } | |
c4aa876b | 1672 | |
6b31947e | 1673 | /* Look at both operands needed by the opcodes and provided by |
252b5132 RH |
1674 | the user - since an arg test will often fail on the same arg |
1675 | again and again, we'll try and test the last failing arg the | |
6b31947e | 1676 | first on each opcode try. */ |
252b5132 RH |
1677 | for (n = 0; this_try->arg[n]; n++) |
1678 | { | |
1679 | sh_operand_info *user = operands + n; | |
1680 | sh_arg_type arg = this_try->arg[n]; | |
c4aa876b | 1681 | |
1d70c7fb AO |
1682 | if (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh2a_nofpu_up) |
1683 | && ( arg == A_DISP_REG_M | |
1684 | || arg == A_DISP_REG_N)) | |
1685 | { | |
1686 | /* Check a few key IMM* fields for overflow. */ | |
1687 | int opf; | |
1688 | long val = user->immediate.X_add_number; | |
1689 | ||
1690 | for (opf = 0; opf < 4; opf ++) | |
1691 | switch (this_try->nibbles[opf]) | |
1692 | { | |
1693 | case IMM0_4: | |
1694 | case IMM1_4: | |
1695 | if (val < 0 || val > 15) | |
1696 | goto fail; | |
1697 | break; | |
1698 | case IMM0_4BY2: | |
1699 | case IMM1_4BY2: | |
1700 | if (val < 0 || val > 15 * 2) | |
1701 | goto fail; | |
1702 | break; | |
1703 | case IMM0_4BY4: | |
1704 | case IMM1_4BY4: | |
1705 | if (val < 0 || val > 15 * 4) | |
1706 | goto fail; | |
1707 | break; | |
1708 | default: | |
1709 | break; | |
1710 | } | |
1711 | } | |
252b5132 RH |
1712 | switch (arg) |
1713 | { | |
7679ead9 AO |
1714 | case A_DISP_PC: |
1715 | if (user->type == A_DISP_PC_ABS) | |
1716 | break; | |
1717 | /* Fall through. */ | |
252b5132 RH |
1718 | case A_IMM: |
1719 | case A_BDISP12: | |
1720 | case A_BDISP8: | |
1721 | case A_DISP_GBR: | |
1d70c7fb | 1722 | case A_DISP2_TBR: |
252b5132 RH |
1723 | case A_MACH: |
1724 | case A_PR: | |
1725 | case A_MACL: | |
1726 | if (user->type != arg) | |
1727 | goto fail; | |
1728 | break; | |
1729 | case A_R0: | |
1730 | /* opcode needs r0 */ | |
1731 | if (user->type != A_REG_N || user->reg != 0) | |
1732 | goto fail; | |
1733 | break; | |
1734 | case A_R0_GBR: | |
1735 | if (user->type != A_R0_GBR || user->reg != 0) | |
1736 | goto fail; | |
1737 | break; | |
1738 | case F_FR0: | |
1739 | if (user->type != F_REG_N || user->reg != 0) | |
1740 | goto fail; | |
1741 | break; | |
1742 | ||
1743 | case A_REG_N: | |
1744 | case A_INC_N: | |
1745 | case A_DEC_N: | |
1746 | case A_IND_N: | |
1747 | case A_IND_R0_REG_N: | |
1748 | case A_DISP_REG_N: | |
1749 | case F_REG_N: | |
1750 | case D_REG_N: | |
1751 | case X_REG_N: | |
1752 | case V_REG_N: | |
1753 | case FPUL_N: | |
1754 | case FPSCR_N: | |
d4845d57 | 1755 | case DSP_REG_N: |
252b5132 RH |
1756 | /* Opcode needs rn */ |
1757 | if (user->type != arg) | |
1758 | goto fail; | |
1759 | reg_n = user->reg; | |
1760 | break; | |
252b5132 RH |
1761 | case DX_REG_N: |
1762 | if (user->type != D_REG_N && user->type != X_REG_N) | |
1763 | goto fail; | |
1764 | reg_n = user->reg; | |
1765 | break; | |
1766 | case A_GBR: | |
1d70c7fb | 1767 | case A_TBR: |
252b5132 RH |
1768 | case A_SR: |
1769 | case A_VBR: | |
d4845d57 JR |
1770 | case A_DSR: |
1771 | case A_MOD: | |
1772 | case A_RE: | |
1773 | case A_RS: | |
252b5132 RH |
1774 | case A_SSR: |
1775 | case A_SPC: | |
1776 | case A_SGR: | |
1777 | case A_DBR: | |
1778 | if (user->type != arg) | |
1779 | goto fail; | |
1780 | break; | |
1781 | ||
c4aa876b | 1782 | case A_REG_B: |
252b5132 RH |
1783 | if (user->type != arg) |
1784 | goto fail; | |
1785 | reg_b = user->reg; | |
1786 | break; | |
1787 | ||
1d70c7fb AO |
1788 | case A_INC_R15: |
1789 | if (user->type != A_INC_N) | |
1790 | goto fail; | |
1791 | if (user->reg != 15) | |
1792 | goto fail; | |
1793 | reg_n = user->reg; | |
1794 | break; | |
1795 | ||
1796 | case A_DEC_R15: | |
1797 | if (user->type != A_DEC_N) | |
1798 | goto fail; | |
1799 | if (user->reg != 15) | |
1800 | goto fail; | |
1801 | reg_n = user->reg; | |
1802 | break; | |
1803 | ||
252b5132 RH |
1804 | case A_REG_M: |
1805 | case A_INC_M: | |
1806 | case A_DEC_M: | |
1807 | case A_IND_M: | |
1808 | case A_IND_R0_REG_M: | |
1809 | case A_DISP_REG_M: | |
d4845d57 | 1810 | case DSP_REG_M: |
252b5132 RH |
1811 | /* Opcode needs rn */ |
1812 | if (user->type != arg - A_REG_M + A_REG_N) | |
1813 | goto fail; | |
1814 | reg_m = user->reg; | |
1815 | break; | |
1816 | ||
88da98f3 MS |
1817 | case AS_DEC_N: |
1818 | if (user->type != A_DEC_N) | |
1819 | goto fail; | |
1820 | if (user->reg < 2 || user->reg > 5) | |
1821 | goto fail; | |
1822 | reg_n = user->reg; | |
1823 | break; | |
13ef8878 | 1824 | |
88da98f3 MS |
1825 | case AS_INC_N: |
1826 | if (user->type != A_INC_N) | |
1827 | goto fail; | |
1828 | if (user->reg < 2 || user->reg > 5) | |
1829 | goto fail; | |
1830 | reg_n = user->reg; | |
1831 | break; | |
13ef8878 | 1832 | |
88da98f3 MS |
1833 | case AS_IND_N: |
1834 | if (user->type != A_IND_N) | |
1835 | goto fail; | |
1836 | if (user->reg < 2 || user->reg > 5) | |
1837 | goto fail; | |
1838 | reg_n = user->reg; | |
1839 | break; | |
13ef8878 | 1840 | |
88da98f3 MS |
1841 | case AS_PMOD_N: |
1842 | if (user->type != AX_PMOD_N) | |
1843 | goto fail; | |
1844 | if (user->reg < 2 || user->reg > 5) | |
1845 | goto fail; | |
1846 | reg_n = user->reg; | |
1847 | break; | |
13ef8878 | 1848 | |
88da98f3 MS |
1849 | case AX_INC_N: |
1850 | if (user->type != A_INC_N) | |
1851 | goto fail; | |
1852 | if (user->reg < 4 || user->reg > 5) | |
1853 | goto fail; | |
1854 | reg_n = user->reg; | |
1855 | break; | |
13ef8878 | 1856 | |
88da98f3 MS |
1857 | case AX_IND_N: |
1858 | if (user->type != A_IND_N) | |
1859 | goto fail; | |
1860 | if (user->reg < 4 || user->reg > 5) | |
1861 | goto fail; | |
1862 | reg_n = user->reg; | |
1863 | break; | |
13ef8878 | 1864 | |
88da98f3 MS |
1865 | case AX_PMOD_N: |
1866 | if (user->type != AX_PMOD_N) | |
1867 | goto fail; | |
1868 | if (user->reg < 4 || user->reg > 5) | |
1869 | goto fail; | |
1870 | reg_n = user->reg; | |
1871 | break; | |
13ef8878 | 1872 | |
88da98f3 MS |
1873 | case AXY_INC_N: |
1874 | if (user->type != A_INC_N) | |
1875 | goto fail; | |
1876 | if ((user->reg < 4 || user->reg > 5) | |
1877 | && (user->reg < 0 || user->reg > 1)) | |
1878 | goto fail; | |
1879 | reg_n = user->reg; | |
1880 | break; | |
13ef8878 | 1881 | |
88da98f3 MS |
1882 | case AXY_IND_N: |
1883 | if (user->type != A_IND_N) | |
1884 | goto fail; | |
1885 | if ((user->reg < 4 || user->reg > 5) | |
1886 | && (user->reg < 0 || user->reg > 1)) | |
1887 | goto fail; | |
1888 | reg_n = user->reg; | |
1889 | break; | |
13ef8878 | 1890 | |
88da98f3 MS |
1891 | case AXY_PMOD_N: |
1892 | if (user->type != AX_PMOD_N) | |
1893 | goto fail; | |
1894 | if ((user->reg < 4 || user->reg > 5) | |
1895 | && (user->reg < 0 || user->reg > 1)) | |
1896 | goto fail; | |
1897 | reg_n = user->reg; | |
1898 | break; | |
13ef8878 | 1899 | |
88da98f3 MS |
1900 | case AY_INC_N: |
1901 | if (user->type != A_INC_N) | |
1902 | goto fail; | |
1903 | if (user->reg < 6 || user->reg > 7) | |
1904 | goto fail; | |
1905 | reg_n = user->reg; | |
1906 | break; | |
13ef8878 | 1907 | |
88da98f3 MS |
1908 | case AY_IND_N: |
1909 | if (user->type != A_IND_N) | |
1910 | goto fail; | |
1911 | if (user->reg < 6 || user->reg > 7) | |
1912 | goto fail; | |
1913 | reg_n = user->reg; | |
1914 | break; | |
13ef8878 | 1915 | |
88da98f3 MS |
1916 | case AY_PMOD_N: |
1917 | if (user->type != AY_PMOD_N) | |
1918 | goto fail; | |
1919 | if (user->reg < 6 || user->reg > 7) | |
1920 | goto fail; | |
1921 | reg_n = user->reg; | |
1922 | break; | |
1923 | ||
1924 | case AYX_INC_N: | |
1925 | if (user->type != A_INC_N) | |
1926 | goto fail; | |
1927 | if ((user->reg < 6 || user->reg > 7) | |
1928 | && (user->reg < 2 || user->reg > 3)) | |
1929 | goto fail; | |
1930 | reg_n = user->reg; | |
1931 | break; | |
13ef8878 | 1932 | |
88da98f3 MS |
1933 | case AYX_IND_N: |
1934 | if (user->type != A_IND_N) | |
1935 | goto fail; | |
1936 | if ((user->reg < 6 || user->reg > 7) | |
1937 | && (user->reg < 2 || user->reg > 3)) | |
1938 | goto fail; | |
1939 | reg_n = user->reg; | |
1940 | break; | |
13ef8878 | 1941 | |
88da98f3 MS |
1942 | case AYX_PMOD_N: |
1943 | if (user->type != AY_PMOD_N) | |
1944 | goto fail; | |
1945 | if ((user->reg < 6 || user->reg > 7) | |
1946 | && (user->reg < 2 || user->reg > 3)) | |
1947 | goto fail; | |
1948 | reg_n = user->reg; | |
1949 | break; | |
1950 | ||
1951 | case DSP_REG_A_M: | |
1952 | if (user->type != DSP_REG_N) | |
1953 | goto fail; | |
1954 | if (user->reg != A_A0_NUM | |
1955 | && user->reg != A_A1_NUM) | |
1956 | goto fail; | |
1957 | reg_m = user->reg; | |
1958 | break; | |
1959 | ||
1960 | case DSP_REG_AX: | |
1961 | if (user->type != DSP_REG_N) | |
1962 | goto fail; | |
1963 | switch (user->reg) | |
1964 | { | |
1965 | case A_A0_NUM: | |
1966 | reg_x = 0; | |
1967 | break; | |
1968 | case A_A1_NUM: | |
1969 | reg_x = 2; | |
1970 | break; | |
1971 | case A_X0_NUM: | |
1972 | reg_x = 1; | |
1973 | break; | |
1974 | case A_X1_NUM: | |
1975 | reg_x = 3; | |
1976 | break; | |
1977 | default: | |
1978 | goto fail; | |
1979 | } | |
1980 | break; | |
1981 | ||
1982 | case DSP_REG_XY: | |
1983 | if (user->type != DSP_REG_N) | |
1984 | goto fail; | |
1985 | switch (user->reg) | |
1986 | { | |
1987 | case A_X0_NUM: | |
1988 | reg_x = 0; | |
1989 | break; | |
1990 | case A_X1_NUM: | |
1991 | reg_x = 2; | |
1992 | break; | |
1993 | case A_Y0_NUM: | |
1994 | reg_x = 1; | |
1995 | break; | |
1996 | case A_Y1_NUM: | |
1997 | reg_x = 3; | |
1998 | break; | |
1999 | default: | |
2000 | goto fail; | |
2001 | } | |
2002 | break; | |
2003 | ||
2004 | case DSP_REG_AY: | |
2005 | if (user->type != DSP_REG_N) | |
2006 | goto fail; | |
2007 | switch (user->reg) | |
2008 | { | |
2009 | case A_A0_NUM: | |
2010 | reg_y = 0; | |
2011 | break; | |
2012 | case A_A1_NUM: | |
2013 | reg_y = 1; | |
2014 | break; | |
2015 | case A_Y0_NUM: | |
2016 | reg_y = 2; | |
2017 | break; | |
2018 | case A_Y1_NUM: | |
2019 | reg_y = 3; | |
2020 | break; | |
2021 | default: | |
2022 | goto fail; | |
2023 | } | |
2024 | break; | |
2025 | ||
2026 | case DSP_REG_YX: | |
2027 | if (user->type != DSP_REG_N) | |
2028 | goto fail; | |
2029 | switch (user->reg) | |
2030 | { | |
2031 | case A_Y0_NUM: | |
2032 | reg_y = 0; | |
2033 | break; | |
2034 | case A_Y1_NUM: | |
2035 | reg_y = 1; | |
2036 | break; | |
2037 | case A_X0_NUM: | |
2038 | reg_y = 2; | |
2039 | break; | |
2040 | case A_X1_NUM: | |
2041 | reg_y = 3; | |
2042 | break; | |
2043 | default: | |
2044 | goto fail; | |
2045 | } | |
2046 | break; | |
2047 | ||
d4845d57 JR |
2048 | case DSP_REG_X: |
2049 | if (user->type != DSP_REG_N) | |
2050 | goto fail; | |
2051 | switch (user->reg) | |
2052 | { | |
2053 | case A_X0_NUM: | |
2054 | reg_x = 0; | |
2055 | break; | |
2056 | case A_X1_NUM: | |
2057 | reg_x = 1; | |
2058 | break; | |
2059 | case A_A0_NUM: | |
2060 | reg_x = 2; | |
2061 | break; | |
2062 | case A_A1_NUM: | |
2063 | reg_x = 3; | |
2064 | break; | |
2065 | default: | |
2066 | goto fail; | |
2067 | } | |
2068 | break; | |
2069 | ||
2070 | case DSP_REG_Y: | |
2071 | if (user->type != DSP_REG_N) | |
2072 | goto fail; | |
2073 | switch (user->reg) | |
2074 | { | |
2075 | case A_Y0_NUM: | |
2076 | reg_y = 0; | |
2077 | break; | |
2078 | case A_Y1_NUM: | |
2079 | reg_y = 1; | |
2080 | break; | |
2081 | case A_M0_NUM: | |
2082 | reg_y = 2; | |
2083 | break; | |
2084 | case A_M1_NUM: | |
2085 | reg_y = 3; | |
2086 | break; | |
2087 | default: | |
2088 | goto fail; | |
2089 | } | |
2090 | break; | |
2091 | ||
2092 | case DSP_REG_E: | |
2093 | if (user->type != DSP_REG_N) | |
2094 | goto fail; | |
2095 | switch (user->reg) | |
2096 | { | |
2097 | case A_X0_NUM: | |
2098 | reg_efg = 0 << 10; | |
2099 | break; | |
2100 | case A_X1_NUM: | |
2101 | reg_efg = 1 << 10; | |
2102 | break; | |
2103 | case A_Y0_NUM: | |
2104 | reg_efg = 2 << 10; | |
2105 | break; | |
2106 | case A_A1_NUM: | |
2107 | reg_efg = 3 << 10; | |
2108 | break; | |
2109 | default: | |
2110 | goto fail; | |
2111 | } | |
2112 | break; | |
2113 | ||
2114 | case DSP_REG_F: | |
2115 | if (user->type != DSP_REG_N) | |
2116 | goto fail; | |
2117 | switch (user->reg) | |
2118 | { | |
2119 | case A_Y0_NUM: | |
2120 | reg_efg |= 0 << 8; | |
2121 | break; | |
2122 | case A_Y1_NUM: | |
2123 | reg_efg |= 1 << 8; | |
2124 | break; | |
2125 | case A_X0_NUM: | |
2126 | reg_efg |= 2 << 8; | |
2127 | break; | |
2128 | case A_A1_NUM: | |
2129 | reg_efg |= 3 << 8; | |
2130 | break; | |
2131 | default: | |
2132 | goto fail; | |
2133 | } | |
2134 | break; | |
2135 | ||
2136 | case DSP_REG_G: | |
2137 | if (user->type != DSP_REG_N) | |
2138 | goto fail; | |
2139 | switch (user->reg) | |
2140 | { | |
2141 | case A_M0_NUM: | |
2142 | reg_efg |= 0 << 2; | |
2143 | break; | |
2144 | case A_M1_NUM: | |
2145 | reg_efg |= 1 << 2; | |
2146 | break; | |
2147 | case A_A0_NUM: | |
2148 | reg_efg |= 2 << 2; | |
2149 | break; | |
2150 | case A_A1_NUM: | |
2151 | reg_efg |= 3 << 2; | |
2152 | break; | |
2153 | default: | |
2154 | goto fail; | |
2155 | } | |
2156 | break; | |
2157 | ||
2158 | case A_A0: | |
2159 | if (user->type != DSP_REG_N || user->reg != A_A0_NUM) | |
2160 | goto fail; | |
2161 | break; | |
2162 | case A_X0: | |
2163 | if (user->type != DSP_REG_N || user->reg != A_X0_NUM) | |
2164 | goto fail; | |
2165 | break; | |
2166 | case A_X1: | |
2167 | if (user->type != DSP_REG_N || user->reg != A_X1_NUM) | |
2168 | goto fail; | |
2169 | break; | |
2170 | case A_Y0: | |
2171 | if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) | |
2172 | goto fail; | |
2173 | break; | |
2174 | case A_Y1: | |
2175 | if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) | |
2176 | goto fail; | |
2177 | break; | |
2178 | ||
252b5132 RH |
2179 | case F_REG_M: |
2180 | case D_REG_M: | |
2181 | case X_REG_M: | |
2182 | case V_REG_M: | |
2183 | case FPUL_M: | |
2184 | case FPSCR_M: | |
2185 | /* Opcode needs rn */ | |
2186 | if (user->type != arg - F_REG_M + F_REG_N) | |
2187 | goto fail; | |
2188 | reg_m = user->reg; | |
2189 | break; | |
2190 | case DX_REG_M: | |
2191 | if (user->type != D_REG_N && user->type != X_REG_N) | |
2192 | goto fail; | |
2193 | reg_m = user->reg; | |
2194 | break; | |
2195 | case XMTRX_M4: | |
2196 | if (user->type != XMTRX_M4) | |
2197 | goto fail; | |
2198 | reg_m = 4; | |
2199 | break; | |
c4aa876b | 2200 | |
252b5132 RH |
2201 | default: |
2202 | printf (_("unhandled %d\n"), arg); | |
2203 | goto fail; | |
2204 | } | |
2205 | } | |
f6f9408f | 2206 | if ( !SH_MERGE_ARCH_SET_VALID (valid_arch, this_try->arch)) |
a37c8f88 | 2207 | goto fail; |
f6f9408f | 2208 | valid_arch = SH_MERGE_ARCH_SET (valid_arch, this_try->arch); |
252b5132 | 2209 | return this_try; |
c4aa876b NC |
2210 | fail: |
2211 | ; | |
252b5132 RH |
2212 | } |
2213 | ||
2214 | return 0; | |
2215 | } | |
2216 | ||
252b5132 | 2217 | static void |
8edc77b9 | 2218 | insert (char *where, int how, int pcrel, sh_operand_info *op) |
252b5132 RH |
2219 | { |
2220 | fix_new_exp (frag_now, | |
2221 | where - frag_now->fr_literal, | |
2222 | 2, | |
015551fc | 2223 | &op->immediate, |
252b5132 RH |
2224 | pcrel, |
2225 | how); | |
2226 | } | |
2227 | ||
1d70c7fb AO |
2228 | static void |
2229 | insert4 (char * where, int how, int pcrel, sh_operand_info * op) | |
2230 | { | |
2231 | fix_new_exp (frag_now, | |
2232 | where - frag_now->fr_literal, | |
2233 | 4, | |
2234 | & op->immediate, | |
2235 | pcrel, | |
2236 | how); | |
2237 | } | |
252b5132 | 2238 | static void |
8edc77b9 | 2239 | build_relax (sh_opcode_info *opcode, sh_operand_info *op) |
252b5132 RH |
2240 | { |
2241 | int high_byte = target_big_endian ? 0 : 1; | |
2242 | char *p; | |
2243 | ||
2244 | if (opcode->arg[0] == A_BDISP8) | |
2245 | { | |
2246 | int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; | |
2247 | p = frag_var (rs_machine_dependent, | |
2248 | md_relax_table[C (what, COND32)].rlx_length, | |
2249 | md_relax_table[C (what, COND8)].rlx_length, | |
2250 | C (what, 0), | |
015551fc JR |
2251 | op->immediate.X_add_symbol, |
2252 | op->immediate.X_add_number, | |
252b5132 RH |
2253 | 0); |
2254 | p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); | |
2255 | } | |
2256 | else if (opcode->arg[0] == A_BDISP12) | |
2257 | { | |
2258 | p = frag_var (rs_machine_dependent, | |
2259 | md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, | |
2260 | md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, | |
2261 | C (UNCOND_JUMP, 0), | |
015551fc JR |
2262 | op->immediate.X_add_symbol, |
2263 | op->immediate.X_add_number, | |
252b5132 RH |
2264 | 0); |
2265 | p[high_byte] = (opcode->nibbles[0] << 4); | |
2266 | } | |
2267 | ||
2268 | } | |
2269 | ||
6b31947e | 2270 | /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */ |
d67b5d6d | 2271 | |
015551fc | 2272 | static char * |
8edc77b9 | 2273 | insert_loop_bounds (char *output, sh_operand_info *operand) |
015551fc JR |
2274 | { |
2275 | char *name; | |
2276 | symbolS *end_sym; | |
2277 | ||
2278 | /* Since the low byte of the opcode will be overwritten by the reloc, we | |
2279 | can just stash the high byte into both bytes and ignore endianness. */ | |
2280 | output[0] = 0x8c; | |
2281 | output[1] = 0x8c; | |
2282 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
2283 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
2284 | ||
2285 | if (sh_relax) | |
2286 | { | |
2287 | static int count = 0; | |
2288 | ||
2289 | /* If the last loop insn is a two-byte-insn, it is in danger of being | |
2290 | swapped with the insn after it. To prevent this, create a new | |
2291 | symbol - complete with SH_LABEL reloc - after the last loop insn. | |
2292 | If the last loop insn is four bytes long, the symbol will be | |
2293 | right in the middle, but four byte insns are not swapped anyways. */ | |
2294 | /* A REPEAT takes 6 bytes. The SH has a 32 bit address space. | |
2295 | Hence a 9 digit number should be enough to count all REPEATs. */ | |
2296 | name = alloca (11); | |
2297 | sprintf (name, "_R%x", count++ & 0x3fffffff); | |
c4aa876b | 2298 | end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag); |
015551fc JR |
2299 | /* Make this a local symbol. */ |
2300 | #ifdef OBJ_COFF | |
2301 | SF_SET_LOCAL (end_sym); | |
2302 | #endif /* OBJ_COFF */ | |
2303 | symbol_table_insert (end_sym); | |
2304 | end_sym->sy_value = operand[1].immediate; | |
2305 | end_sym->sy_value.X_add_number += 2; | |
2306 | fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL); | |
2307 | } | |
2308 | ||
2309 | output = frag_more (2); | |
2310 | output[0] = 0x8e; | |
2311 | output[1] = 0x8e; | |
2312 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
2313 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
2314 | ||
2315 | return frag_more (2); | |
2316 | } | |
2317 | ||
d67b5d6d | 2318 | /* Now we know what sort of opcodes it is, let's build the bytes. */ |
6b31947e | 2319 | |
0d10e182 | 2320 | static unsigned int |
8edc77b9 | 2321 | build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand) |
252b5132 RH |
2322 | { |
2323 | int index; | |
1d70c7fb AO |
2324 | char nbuf[8]; |
2325 | char *output; | |
0d10e182 | 2326 | unsigned int size = 2; |
252b5132 | 2327 | int low_byte = target_big_endian ? 1 : 0; |
1d70c7fb AO |
2328 | int max_index = 4; |
2329 | ||
252b5132 RH |
2330 | nbuf[0] = 0; |
2331 | nbuf[1] = 0; | |
2332 | nbuf[2] = 0; | |
2333 | nbuf[3] = 0; | |
1d70c7fb AO |
2334 | nbuf[4] = 0; |
2335 | nbuf[5] = 0; | |
2336 | nbuf[6] = 0; | |
2337 | nbuf[7] = 0; | |
2338 | ||
2339 | if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32)) | |
2340 | { | |
2341 | output = frag_more (4); | |
2342 | size = 4; | |
2343 | max_index = 8; | |
2344 | } | |
2345 | else | |
2346 | output = frag_more (2); | |
252b5132 | 2347 | |
1d70c7fb | 2348 | for (index = 0; index < max_index; index++) |
252b5132 RH |
2349 | { |
2350 | sh_nibble_type i = opcode->nibbles[index]; | |
2351 | if (i < 16) | |
2352 | { | |
2353 | nbuf[index] = i; | |
2354 | } | |
2355 | else | |
2356 | { | |
2357 | switch (i) | |
2358 | { | |
2359 | case REG_N: | |
6a5709a5 | 2360 | case REG_N_D: |
252b5132 RH |
2361 | nbuf[index] = reg_n; |
2362 | break; | |
2363 | case REG_M: | |
2364 | nbuf[index] = reg_m; | |
2365 | break; | |
d4845d57 JR |
2366 | case SDT_REG_N: |
2367 | if (reg_n < 2 || reg_n > 5) | |
2368 | as_bad (_("Invalid register: 'r%d'"), reg_n); | |
2369 | nbuf[index] = (reg_n & 3) | 4; | |
2370 | break; | |
252b5132 RH |
2371 | case REG_NM: |
2372 | nbuf[index] = reg_n | (reg_m >> 2); | |
2373 | break; | |
c4aa876b | 2374 | case REG_B: |
252b5132 RH |
2375 | nbuf[index] = reg_b | 0x08; |
2376 | break; | |
6a5709a5 JR |
2377 | case REG_N_B01: |
2378 | nbuf[index] = reg_n | 0x01; | |
2379 | break; | |
1d70c7fb AO |
2380 | case IMM0_3s: |
2381 | nbuf[index] |= 0x08; | |
2382 | case IMM0_3c: | |
2383 | insert (output + low_byte, BFD_RELOC_SH_IMM3, 0, operand); | |
2384 | break; | |
2385 | case IMM0_3Us: | |
2386 | nbuf[index] |= 0x80; | |
2387 | case IMM0_3Uc: | |
2388 | insert (output + low_byte, BFD_RELOC_SH_IMM3U, 0, operand); | |
2389 | break; | |
2390 | case DISP0_12: | |
2391 | insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand); | |
2392 | break; | |
2393 | case DISP0_12BY2: | |
2394 | insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand); | |
2395 | break; | |
2396 | case DISP0_12BY4: | |
2397 | insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand); | |
2398 | break; | |
2399 | case DISP0_12BY8: | |
2400 | insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand); | |
2401 | break; | |
2402 | case DISP1_12: | |
2403 | insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand+1); | |
2404 | break; | |
2405 | case DISP1_12BY2: | |
2406 | insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand+1); | |
2407 | break; | |
2408 | case DISP1_12BY4: | |
2409 | insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand+1); | |
2410 | break; | |
2411 | case DISP1_12BY8: | |
2412 | insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand+1); | |
2413 | break; | |
2414 | case IMM0_20_4: | |
2415 | break; | |
2416 | case IMM0_20: | |
2417 | insert4 (output, BFD_RELOC_SH_DISP20, 0, operand); | |
2418 | break; | |
2419 | case IMM0_20BY8: | |
2420 | insert4 (output, BFD_RELOC_SH_DISP20BY8, 0, operand); | |
2421 | break; | |
015551fc JR |
2422 | case IMM0_4BY4: |
2423 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); | |
2424 | break; | |
2425 | case IMM0_4BY2: | |
2426 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand); | |
2427 | break; | |
2428 | case IMM0_4: | |
2429 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand); | |
2430 | break; | |
2431 | case IMM1_4BY4: | |
2432 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1); | |
2433 | break; | |
2434 | case IMM1_4BY2: | |
2435 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1); | |
252b5132 | 2436 | break; |
015551fc JR |
2437 | case IMM1_4: |
2438 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1); | |
252b5132 | 2439 | break; |
015551fc JR |
2440 | case IMM0_8BY4: |
2441 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand); | |
252b5132 | 2442 | break; |
015551fc JR |
2443 | case IMM0_8BY2: |
2444 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand); | |
252b5132 | 2445 | break; |
015551fc JR |
2446 | case IMM0_8: |
2447 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand); | |
252b5132 | 2448 | break; |
015551fc JR |
2449 | case IMM1_8BY4: |
2450 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1); | |
252b5132 | 2451 | break; |
015551fc JR |
2452 | case IMM1_8BY2: |
2453 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1); | |
2454 | break; | |
2455 | case IMM1_8: | |
2456 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1); | |
252b5132 RH |
2457 | break; |
2458 | case PCRELIMM_8BY4: | |
7679ead9 AO |
2459 | insert (output, BFD_RELOC_SH_PCRELIMM8BY4, |
2460 | operand->type != A_DISP_PC_ABS, operand); | |
252b5132 RH |
2461 | break; |
2462 | case PCRELIMM_8BY2: | |
7679ead9 AO |
2463 | insert (output, BFD_RELOC_SH_PCRELIMM8BY2, |
2464 | operand->type != A_DISP_PC_ABS, operand); | |
015551fc JR |
2465 | break; |
2466 | case REPEAT: | |
2467 | output = insert_loop_bounds (output, operand); | |
2468 | nbuf[index] = opcode->nibbles[3]; | |
2469 | operand += 2; | |
252b5132 RH |
2470 | break; |
2471 | default: | |
2472 | printf (_("failed for %d\n"), i); | |
2473 | } | |
2474 | } | |
2475 | } | |
c4aa876b NC |
2476 | if (!target_big_endian) |
2477 | { | |
2478 | output[1] = (nbuf[0] << 4) | (nbuf[1]); | |
2479 | output[0] = (nbuf[2] << 4) | (nbuf[3]); | |
2480 | } | |
2481 | else | |
2482 | { | |
2483 | output[0] = (nbuf[0] << 4) | (nbuf[1]); | |
2484 | output[1] = (nbuf[2] << 4) | (nbuf[3]); | |
2485 | } | |
1d70c7fb AO |
2486 | if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32)) |
2487 | { | |
2488 | if (!target_big_endian) | |
2489 | { | |
2490 | output[3] = (nbuf[4] << 4) | (nbuf[5]); | |
2491 | output[2] = (nbuf[6] << 4) | (nbuf[7]); | |
2492 | } | |
2493 | else | |
2494 | { | |
2495 | output[2] = (nbuf[4] << 4) | (nbuf[5]); | |
2496 | output[3] = (nbuf[6] << 4) | (nbuf[7]); | |
2497 | } | |
2498 | } | |
0d10e182 | 2499 | return size; |
252b5132 RH |
2500 | } |
2501 | ||
d4845d57 JR |
2502 | /* Find an opcode at the start of *STR_P in the hash table, and set |
2503 | *STR_P to the first character after the last one read. */ | |
252b5132 | 2504 | |
d4845d57 | 2505 | static sh_opcode_info * |
8edc77b9 | 2506 | find_cooked_opcode (char **str_p) |
252b5132 | 2507 | { |
d4845d57 | 2508 | char *str = *str_p; |
252b5132 RH |
2509 | unsigned char *op_start; |
2510 | unsigned char *op_end; | |
252b5132 RH |
2511 | char name[20]; |
2512 | int nlen = 0; | |
c4aa876b | 2513 | |
6b31947e | 2514 | /* Drop leading whitespace. */ |
252b5132 RH |
2515 | while (*str == ' ') |
2516 | str++; | |
2517 | ||
d4845d57 JR |
2518 | /* Find the op code end. |
2519 | The pre-processor will eliminate whitespace in front of | |
2520 | any '@' after the first argument; we may be called from | |
2521 | assemble_ppi, so the opcode might be terminated by an '@'. */ | |
2132e3a3 | 2522 | for (op_start = op_end = (unsigned char *) str; |
252b5132 RH |
2523 | *op_end |
2524 | && nlen < 20 | |
d4845d57 | 2525 | && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; |
252b5132 RH |
2526 | op_end++) |
2527 | { | |
2528 | unsigned char c = op_start[nlen]; | |
2529 | ||
2530 | /* The machine independent code will convert CMP/EQ into cmp/EQ | |
d4845d57 JR |
2531 | because it thinks the '/' is the end of the symbol. Moreover, |
2532 | all but the first sub-insn is a parallel processing insn won't | |
3882b010 | 2533 | be capitalized. Instead of hacking up the machine independent |
d4845d57 | 2534 | code, we just deal with it here. */ |
3882b010 | 2535 | c = TOLOWER (c); |
252b5132 RH |
2536 | name[nlen] = c; |
2537 | nlen++; | |
2538 | } | |
c4aa876b | 2539 | |
252b5132 | 2540 | name[nlen] = 0; |
2132e3a3 | 2541 | *str_p = (char *) op_end; |
252b5132 RH |
2542 | |
2543 | if (nlen == 0) | |
6b31947e | 2544 | as_bad (_("can't find opcode ")); |
252b5132 | 2545 | |
d4845d57 JR |
2546 | return (sh_opcode_info *) hash_find (opcode_hash_control, name); |
2547 | } | |
2548 | ||
2549 | /* Assemble a parallel processing insn. */ | |
2550 | #define DDT_BASE 0xf000 /* Base value for double data transfer insns */ | |
6b31947e | 2551 | |
0d10e182 | 2552 | static unsigned int |
8edc77b9 | 2553 | assemble_ppi (char *op_end, sh_opcode_info *opcode) |
d4845d57 JR |
2554 | { |
2555 | int movx = 0; | |
2556 | int movy = 0; | |
2557 | int cond = 0; | |
2558 | int field_b = 0; | |
2559 | char *output; | |
2560 | int move_code; | |
0d10e182 | 2561 | unsigned int size; |
d4845d57 | 2562 | |
d4845d57 JR |
2563 | for (;;) |
2564 | { | |
2565 | sh_operand_info operand[3]; | |
2566 | ||
ac62e7a3 JR |
2567 | /* Some insn ignore one or more register fields, e.g. psts machl,a0. |
2568 | Make sure we encode a defined insn pattern. */ | |
2569 | reg_x = 0; | |
2570 | reg_y = 0; | |
2571 | reg_n = 0; | |
2572 | ||
d4845d57 JR |
2573 | if (opcode->arg[0] != A_END) |
2574 | op_end = get_operands (opcode, op_end, operand); | |
88da98f3 | 2575 | try_another_opcode: |
d4845d57 JR |
2576 | opcode = get_specific (opcode, operand); |
2577 | if (opcode == 0) | |
2578 | { | |
6b31947e | 2579 | /* Couldn't find an opcode which matched the operands. */ |
d4845d57 | 2580 | char *where = frag_more (2); |
0d10e182 | 2581 | size = 2; |
d4845d57 JR |
2582 | |
2583 | where[0] = 0x0; | |
2584 | where[1] = 0x0; | |
2585 | as_bad (_("invalid operands for opcode")); | |
0d10e182 | 2586 | return size; |
d4845d57 | 2587 | } |
c4aa876b | 2588 | |
d4845d57 JR |
2589 | if (opcode->nibbles[0] != PPI) |
2590 | as_bad (_("insn can't be combined with parallel processing insn")); | |
2591 | ||
2592 | switch (opcode->nibbles[1]) | |
2593 | { | |
2594 | ||
2595 | case NOPX: | |
2596 | if (movx) | |
2597 | as_bad (_("multiple movx specifications")); | |
2598 | movx = DDT_BASE; | |
2599 | break; | |
2600 | case NOPY: | |
2601 | if (movy) | |
2602 | as_bad (_("multiple movy specifications")); | |
2603 | movy = DDT_BASE; | |
2604 | break; | |
2605 | ||
88da98f3 MS |
2606 | case MOVX_NOPY: |
2607 | if (movx) | |
2608 | as_bad (_("multiple movx specifications")); | |
2609 | if ((reg_n < 4 || reg_n > 5) | |
2610 | && (reg_n < 0 || reg_n > 1)) | |
2611 | as_bad (_("invalid movx address register")); | |
2612 | if (movy && movy != DDT_BASE) | |
2613 | as_bad (_("insn cannot be combined with non-nopy")); | |
2614 | movx = ((((reg_n & 1) != 0) << 9) | |
2615 | + (((reg_n & 4) == 0) << 8) | |
2616 | + (reg_x << 6) | |
2617 | + (opcode->nibbles[2] << 4) | |
2618 | + opcode->nibbles[3] | |
2619 | + DDT_BASE); | |
2620 | break; | |
2621 | ||
2622 | case MOVY_NOPX: | |
2623 | if (movy) | |
2624 | as_bad (_("multiple movy specifications")); | |
2625 | if ((reg_n < 6 || reg_n > 7) | |
2626 | && (reg_n < 2 || reg_n > 3)) | |
2627 | as_bad (_("invalid movy address register")); | |
2628 | if (movx && movx != DDT_BASE) | |
2629 | as_bad (_("insn cannot be combined with non-nopx")); | |
2630 | movy = ((((reg_n & 1) != 0) << 8) | |
2631 | + (((reg_n & 4) == 0) << 9) | |
2632 | + (reg_y << 6) | |
2633 | + (opcode->nibbles[2] << 4) | |
2634 | + opcode->nibbles[3] | |
2635 | + DDT_BASE); | |
2636 | break; | |
2637 | ||
d4845d57 JR |
2638 | case MOVX: |
2639 | if (movx) | |
2640 | as_bad (_("multiple movx specifications")); | |
88da98f3 MS |
2641 | if (movy & 0x2ac) |
2642 | as_bad (_("previous movy requires nopx")); | |
d4845d57 JR |
2643 | if (reg_n < 4 || reg_n > 5) |
2644 | as_bad (_("invalid movx address register")); | |
2645 | if (opcode->nibbles[2] & 8) | |
2646 | { | |
2647 | if (reg_m == A_A1_NUM) | |
2648 | movx = 1 << 7; | |
2649 | else if (reg_m != A_A0_NUM) | |
2650 | as_bad (_("invalid movx dsp register")); | |
2651 | } | |
2652 | else | |
2653 | { | |
2654 | if (reg_x > 1) | |
2655 | as_bad (_("invalid movx dsp register")); | |
2656 | movx = reg_x << 7; | |
2657 | } | |
2658 | movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; | |
2659 | break; | |
2660 | ||
2661 | case MOVY: | |
2662 | if (movy) | |
2663 | as_bad (_("multiple movy specifications")); | |
88da98f3 MS |
2664 | if (movx & 0x153) |
2665 | as_bad (_("previous movx requires nopy")); | |
d4845d57 JR |
2666 | if (opcode->nibbles[2] & 8) |
2667 | { | |
2668 | /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, | |
2669 | so add 8 more. */ | |
2670 | movy = 8; | |
2671 | if (reg_m == A_A1_NUM) | |
2672 | movy += 1 << 6; | |
2673 | else if (reg_m != A_A0_NUM) | |
2674 | as_bad (_("invalid movy dsp register")); | |
2675 | } | |
2676 | else | |
2677 | { | |
2678 | if (reg_y > 1) | |
2679 | as_bad (_("invalid movy dsp register")); | |
2680 | movy = reg_y << 6; | |
2681 | } | |
2682 | if (reg_n < 6 || reg_n > 7) | |
2683 | as_bad (_("invalid movy address register")); | |
2684 | movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; | |
2685 | break; | |
2686 | ||
2687 | case PSH: | |
015551fc | 2688 | if (operand[0].immediate.X_op != O_constant) |
d4845d57 JR |
2689 | as_bad (_("dsp immediate shift value not constant")); |
2690 | field_b = ((opcode->nibbles[2] << 12) | |
015551fc | 2691 | | (operand[0].immediate.X_add_number & 127) << 4 |
d4845d57 JR |
2692 | | reg_n); |
2693 | break; | |
88da98f3 MS |
2694 | case PPI3NC: |
2695 | if (cond) | |
2696 | { | |
2697 | opcode++; | |
2698 | goto try_another_opcode; | |
2699 | } | |
2700 | /* Fall through. */ | |
d4845d57 JR |
2701 | case PPI3: |
2702 | if (field_b) | |
2703 | as_bad (_("multiple parallel processing specifications")); | |
2704 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
2705 | + (reg_x << 6) + (reg_y << 4) + reg_n); | |
88da98f3 MS |
2706 | switch (opcode->nibbles[4]) |
2707 | { | |
2708 | case HEX_0: | |
2709 | case HEX_XX00: | |
2710 | case HEX_00YY: | |
2711 | break; | |
2712 | case HEX_1: | |
2713 | case HEX_4: | |
2714 | field_b += opcode->nibbles[4] << 4; | |
2715 | break; | |
2716 | default: | |
2717 | abort (); | |
2718 | } | |
d4845d57 JR |
2719 | break; |
2720 | case PDC: | |
2721 | if (cond) | |
2722 | as_bad (_("multiple condition specifications")); | |
2723 | cond = opcode->nibbles[2] << 8; | |
2724 | if (*op_end) | |
2725 | goto skip_cond_check; | |
2726 | break; | |
2727 | case PPIC: | |
2728 | if (field_b) | |
2729 | as_bad (_("multiple parallel processing specifications")); | |
2730 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
2731 | + cond + (reg_x << 6) + (reg_y << 4) + reg_n); | |
2732 | cond = 0; | |
88da98f3 MS |
2733 | switch (opcode->nibbles[4]) |
2734 | { | |
2735 | case HEX_0: | |
2736 | case HEX_XX00: | |
2737 | case HEX_00YY: | |
2738 | break; | |
2739 | case HEX_1: | |
2740 | case HEX_4: | |
2741 | field_b += opcode->nibbles[4] << 4; | |
2742 | break; | |
2743 | default: | |
2744 | abort (); | |
2745 | } | |
d4845d57 JR |
2746 | break; |
2747 | case PMUL: | |
2748 | if (field_b) | |
2749 | { | |
88da98f3 MS |
2750 | if ((field_b & 0xef00) == 0xa100) |
2751 | field_b -= 0x8100; | |
2752 | /* pclr Dz pmuls Se,Sf,Dg */ | |
2753 | else if ((field_b & 0xff00) == 0x8d00 | |
f6f9408f | 2754 | && (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh4al_dsp_up))) |
88da98f3 | 2755 | { |
f6f9408f | 2756 | valid_arch = SH_MERGE_ARCH_SET (valid_arch, arch_sh4al_dsp_up); |
88da98f3 MS |
2757 | field_b -= 0x8cf0; |
2758 | } | |
2759 | else | |
d4845d57 | 2760 | as_bad (_("insn cannot be combined with pmuls")); |
d4845d57 JR |
2761 | switch (field_b & 0xf) |
2762 | { | |
2763 | case A_X0_NUM: | |
2764 | field_b += 0 - A_X0_NUM; | |
2765 | break; | |
2766 | case A_Y0_NUM: | |
2767 | field_b += 1 - A_Y0_NUM; | |
2768 | break; | |
2769 | case A_A0_NUM: | |
2770 | field_b += 2 - A_A0_NUM; | |
2771 | break; | |
2772 | case A_A1_NUM: | |
2773 | field_b += 3 - A_A1_NUM; | |
2774 | break; | |
2775 | default: | |
88da98f3 | 2776 | as_bad (_("bad combined pmuls output operand")); |
d4845d57 | 2777 | } |
7dd04abd JR |
2778 | /* Generate warning if the destination register for padd / psub |
2779 | and pmuls is the same ( only for A0 or A1 ). | |
2780 | If the last nibble is 1010 then A0 is used in both | |
2781 | padd / psub and pmuls. If it is 1111 then A1 is used | |
2782 | as destination register in both padd / psub and pmuls. */ | |
5db33d76 JR |
2783 | |
2784 | if ((((field_b | reg_efg) & 0x000F) == 0x000A) | |
2785 | || (((field_b | reg_efg) & 0x000F) == 0x000F)) | |
2786 | as_warn (_("destination register is same for parallel insns")); | |
d4845d57 JR |
2787 | } |
2788 | field_b += 0x4000 + reg_efg; | |
2789 | break; | |
2790 | default: | |
2791 | abort (); | |
2792 | } | |
2793 | if (cond) | |
2794 | { | |
2795 | as_bad (_("condition not followed by conditionalizable insn")); | |
2796 | cond = 0; | |
2797 | } | |
2798 | if (! *op_end) | |
2799 | break; | |
2800 | skip_cond_check: | |
2801 | opcode = find_cooked_opcode (&op_end); | |
2802 | if (opcode == NULL) | |
2803 | { | |
2804 | (as_bad | |
2805 | (_("unrecognized characters at end of parallel processing insn"))); | |
2806 | break; | |
2807 | } | |
2808 | } | |
2809 | ||
2810 | move_code = movx | movy; | |
2811 | if (field_b) | |
2812 | { | |
2813 | /* Parallel processing insn. */ | |
2814 | unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b; | |
2815 | ||
2816 | output = frag_more (4); | |
0d10e182 | 2817 | size = 4; |
d4845d57 JR |
2818 | if (! target_big_endian) |
2819 | { | |
2820 | output[3] = ppi_code >> 8; | |
2821 | output[2] = ppi_code; | |
2822 | } | |
2823 | else | |
2824 | { | |
2825 | output[2] = ppi_code >> 8; | |
2826 | output[3] = ppi_code; | |
2827 | } | |
2828 | move_code |= 0xf800; | |
2829 | } | |
2830 | else | |
0d10e182 JL |
2831 | { |
2832 | /* Just a double data transfer. */ | |
2833 | output = frag_more (2); | |
2834 | size = 2; | |
2835 | } | |
d4845d57 JR |
2836 | if (! target_big_endian) |
2837 | { | |
2838 | output[1] = move_code >> 8; | |
2839 | output[0] = move_code; | |
2840 | } | |
2841 | else | |
2842 | { | |
2843 | output[0] = move_code >> 8; | |
2844 | output[1] = move_code; | |
2845 | } | |
0d10e182 | 2846 | return size; |
d4845d57 JR |
2847 | } |
2848 | ||
2849 | /* This is the guts of the machine-dependent assembler. STR points to a | |
2850 | machine dependent instruction. This function is supposed to emit | |
6b31947e | 2851 | the frags/bytes it assembles to. */ |
d4845d57 JR |
2852 | |
2853 | void | |
8edc77b9 | 2854 | md_assemble (char *str) |
d4845d57 | 2855 | { |
2132e3a3 | 2856 | char *op_end; |
d4845d57 JR |
2857 | sh_operand_info operand[3]; |
2858 | sh_opcode_info *opcode; | |
dda5ecfc | 2859 | unsigned int size = 0; |
ae51a426 | 2860 | char *initial_str = str; |
d4845d57 | 2861 | |
324bfcf3 AO |
2862 | #ifdef HAVE_SH64 |
2863 | if (sh64_isa_mode == sh64_isa_shmedia) | |
2864 | { | |
2865 | shmedia_md_assemble (str); | |
2866 | return; | |
2867 | } | |
2868 | else | |
2869 | { | |
2870 | /* If we've seen pseudo-directives, make sure any emitted data or | |
2871 | frags are marked as data. */ | |
b34976b6 | 2872 | if (!seen_insn) |
324bfcf3 | 2873 | { |
b34976b6 | 2874 | sh64_update_contents_mark (TRUE); |
324bfcf3 AO |
2875 | sh64_set_contents_type (CRT_SH5_ISA16); |
2876 | } | |
2877 | ||
b34976b6 | 2878 | seen_insn = TRUE; |
324bfcf3 AO |
2879 | } |
2880 | #endif /* HAVE_SH64 */ | |
2881 | ||
d4845d57 JR |
2882 | opcode = find_cooked_opcode (&str); |
2883 | op_end = str; | |
252b5132 RH |
2884 | |
2885 | if (opcode == NULL) | |
2886 | { | |
ae51a426 | 2887 | /* The opcode is not in the hash table. |
708587a4 | 2888 | This means we definitely have an assembly failure, |
ae51a426 JR |
2889 | but the instruction may be valid in another CPU variant. |
2890 | In this case emit something better than 'unknown opcode'. | |
2891 | Search the full table in sh-opc.h to check. */ | |
2892 | ||
2893 | char *name = initial_str; | |
2894 | int name_length = 0; | |
2895 | const sh_opcode_info *op; | |
2896 | int found = 0; | |
2897 | ||
2898 | /* identify opcode in string */ | |
871ec896 | 2899 | while (ISSPACE (*name)) |
ae51a426 JR |
2900 | { |
2901 | name++; | |
2902 | } | |
871ec896 | 2903 | while (!ISSPACE (name[name_length])) |
ae51a426 JR |
2904 | { |
2905 | name_length++; | |
2906 | } | |
2907 | ||
2908 | /* search for opcode in full list */ | |
2909 | for (op = sh_table; op->name; op++) | |
2910 | { | |
f6f9408f JR |
2911 | if (strncasecmp (op->name, name, name_length) == 0 |
2912 | && op->name[name_length] == '\0') | |
ae51a426 JR |
2913 | { |
2914 | found = 1; | |
2915 | break; | |
2916 | } | |
2917 | } | |
2918 | ||
2919 | if ( found ) | |
2920 | { | |
2921 | as_bad (_("opcode not valid for this cpu variant")); | |
2922 | } | |
2923 | else | |
2924 | { | |
2925 | as_bad (_("unknown opcode")); | |
2926 | } | |
252b5132 RH |
2927 | return; |
2928 | } | |
2929 | ||
2930 | if (sh_relax | |
2931 | && ! seg_info (now_seg)->tc_segment_info_data.in_code) | |
2932 | { | |
2933 | /* Output a CODE reloc to tell the linker that the following | |
2934 | bytes are instructions, not data. */ | |
2935 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
2936 | BFD_RELOC_SH_CODE); | |
2937 | seg_info (now_seg)->tc_segment_info_data.in_code = 1; | |
2938 | } | |
2939 | ||
d4845d57 JR |
2940 | if (opcode->nibbles[0] == PPI) |
2941 | { | |
0d10e182 | 2942 | size = assemble_ppi (op_end, opcode); |
252b5132 RH |
2943 | } |
2944 | else | |
2945 | { | |
0d10e182 JL |
2946 | if (opcode->arg[0] == A_BDISP12 |
2947 | || opcode->arg[0] == A_BDISP8) | |
252b5132 | 2948 | { |
26c9b704 JR |
2949 | /* Since we skip get_specific here, we have to check & update |
2950 | valid_arch now. */ | |
f6f9408f JR |
2951 | if (SH_MERGE_ARCH_SET_VALID (valid_arch, opcode->arch)) |
2952 | valid_arch = SH_MERGE_ARCH_SET (valid_arch, opcode->arch); | |
26c9b704 JR |
2953 | else |
2954 | as_bad (_("Delayed branches not available on SH1")); | |
0d10e182 JL |
2955 | parse_exp (op_end + 1, &operand[0]); |
2956 | build_relax (opcode, &operand[0]); | |
86157c20 AS |
2957 | |
2958 | /* All branches are currently 16 bit. */ | |
2959 | size = 2; | |
5fc44b2d JR |
2960 | } |
2961 | else | |
2962 | { | |
0d10e182 JL |
2963 | if (opcode->arg[0] == A_END) |
2964 | { | |
2965 | /* Ignore trailing whitespace. If there is any, it has already | |
2966 | been compressed to a single space. */ | |
2967 | if (*op_end == ' ') | |
2968 | op_end++; | |
2969 | } | |
2970 | else | |
2971 | { | |
2972 | op_end = get_operands (opcode, op_end, operand); | |
2973 | } | |
2974 | opcode = get_specific (opcode, operand); | |
252b5132 | 2975 | |
0d10e182 JL |
2976 | if (opcode == 0) |
2977 | { | |
2978 | /* Couldn't find an opcode which matched the operands. */ | |
2979 | char *where = frag_more (2); | |
2980 | size = 2; | |
252b5132 | 2981 | |
0d10e182 JL |
2982 | where[0] = 0x0; |
2983 | where[1] = 0x0; | |
2984 | as_bad (_("invalid operands for opcode")); | |
2985 | } | |
2986 | else | |
2987 | { | |
2988 | if (*op_end) | |
2989 | as_bad (_("excess operands: '%s'"), op_end); | |
2990 | ||
2991 | size = build_Mytes (opcode, operand); | |
2992 | } | |
252b5132 | 2993 | } |
0d10e182 | 2994 | } |
252b5132 | 2995 | |
4dc7ead9 | 2996 | dwarf2_emit_insn (size); |
252b5132 RH |
2997 | } |
2998 | ||
2999 | /* This routine is called each time a label definition is seen. It | |
3000 | emits a BFD_RELOC_SH_LABEL reloc if necessary. */ | |
3001 | ||
3002 | void | |
07a53e5c | 3003 | sh_frob_label (symbolS *sym) |
252b5132 RH |
3004 | { |
3005 | static fragS *last_label_frag; | |
3006 | static int last_label_offset; | |
3007 | ||
3008 | if (sh_relax | |
3009 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
3010 | { | |
3011 | int offset; | |
3012 | ||
3013 | offset = frag_now_fix (); | |
3014 | if (frag_now != last_label_frag | |
3015 | || offset != last_label_offset) | |
c4aa876b | 3016 | { |
252b5132 RH |
3017 | fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); |
3018 | last_label_frag = frag_now; | |
3019 | last_label_offset = offset; | |
3020 | } | |
3021 | } | |
07a53e5c RH |
3022 | |
3023 | dwarf2_emit_label (sym); | |
252b5132 RH |
3024 | } |
3025 | ||
3026 | /* This routine is called when the assembler is about to output some | |
3027 | data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ | |
3028 | ||
3029 | void | |
8edc77b9 | 3030 | sh_flush_pending_output (void) |
252b5132 RH |
3031 | { |
3032 | if (sh_relax | |
3033 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
3034 | { | |
3035 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
3036 | BFD_RELOC_SH_DATA); | |
3037 | seg_info (now_seg)->tc_segment_info_data.in_code = 0; | |
3038 | } | |
3039 | } | |
3040 | ||
3041 | symbolS * | |
8edc77b9 | 3042 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
252b5132 RH |
3043 | { |
3044 | return 0; | |
3045 | } | |
3046 | ||
6b31947e NC |
3047 | /* Various routines to kill one day. */ |
3048 | /* Equal to MAX_PRECISION in atof-ieee.c. */ | |
252b5132 RH |
3049 | #define MAX_LITTLENUMS 6 |
3050 | ||
6b31947e NC |
3051 | /* Turn a string in input_line_pointer into a floating point constant |
3052 | of type TYPE, and store the appropriate bytes in *LITP. The number | |
3053 | of LITTLENUMS emitted is stored in *SIZEP . An error message is | |
3054 | returned, or NULL on OK. */ | |
3055 | ||
252b5132 | 3056 | char * |
8edc77b9 | 3057 | md_atof (int type, char *litP, int *sizeP) |
252b5132 RH |
3058 | { |
3059 | int prec; | |
3060 | LITTLENUM_TYPE words[4]; | |
3061 | char *t; | |
3062 | int i; | |
3063 | ||
3064 | switch (type) | |
3065 | { | |
3066 | case 'f': | |
3067 | prec = 2; | |
3068 | break; | |
3069 | ||
3070 | case 'd': | |
3071 | prec = 4; | |
3072 | break; | |
3073 | ||
3074 | default: | |
3075 | *sizeP = 0; | |
3076 | return _("bad call to md_atof"); | |
3077 | } | |
3078 | ||
3079 | t = atof_ieee (input_line_pointer, type, words); | |
3080 | if (t) | |
3081 | input_line_pointer = t; | |
3082 | ||
3083 | *sizeP = prec * 2; | |
3084 | ||
3085 | if (! target_big_endian) | |
3086 | { | |
3087 | for (i = prec - 1; i >= 0; i--) | |
3088 | { | |
3089 | md_number_to_chars (litP, (valueT) words[i], 2); | |
3090 | litP += 2; | |
3091 | } | |
3092 | } | |
3093 | else | |
3094 | { | |
3095 | for (i = 0; i < prec; i++) | |
3096 | { | |
3097 | md_number_to_chars (litP, (valueT) words[i], 2); | |
3098 | litP += 2; | |
3099 | } | |
3100 | } | |
c4aa876b | 3101 | |
252b5132 RH |
3102 | return NULL; |
3103 | } | |
3104 | ||
3105 | /* Handle the .uses pseudo-op. This pseudo-op is used just before a | |
3106 | call instruction. It refers to a label of the instruction which | |
3107 | loads the register which the call uses. We use it to generate a | |
3108 | special reloc for the linker. */ | |
3109 | ||
3110 | static void | |
8edc77b9 | 3111 | s_uses (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3112 | { |
3113 | expressionS ex; | |
3114 | ||
3115 | if (! sh_relax) | |
3116 | as_warn (_(".uses pseudo-op seen when not relaxing")); | |
3117 | ||
3118 | expression (&ex); | |
3119 | ||
3120 | if (ex.X_op != O_symbol || ex.X_add_number != 0) | |
3121 | { | |
3122 | as_bad (_("bad .uses format")); | |
3123 | ignore_rest_of_line (); | |
3124 | return; | |
3125 | } | |
3126 | ||
3127 | fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); | |
3128 | ||
3129 | demand_empty_rest_of_line (); | |
3130 | } | |
3131 | \f | |
37dedf66 NC |
3132 | enum options |
3133 | { | |
3134 | OPTION_RELAX = OPTION_MD_BASE, | |
3135 | OPTION_BIG, | |
3136 | OPTION_LITTLE, | |
3137 | OPTION_SMALL, | |
3138 | OPTION_DSP, | |
3139 | OPTION_ISA, | |
3140 | OPTION_RENESAS, | |
3141 | OPTION_ALLOW_REG_PREFIX, | |
3142 | #ifdef HAVE_SH64 | |
3143 | OPTION_ABI, | |
3144 | OPTION_NO_MIX, | |
3145 | OPTION_SHCOMPACT_CONST_CRANGE, | |
3146 | OPTION_NO_EXPAND, | |
3147 | OPTION_PT32, | |
3148 | #endif | |
3149 | OPTION_DUMMY /* Not used. This is just here to make it easy to add and subtract options from this enum. */ | |
3150 | }; | |
3151 | ||
5a38dc70 | 3152 | const char *md_shortopts = ""; |
6b31947e NC |
3153 | struct option md_longopts[] = |
3154 | { | |
252b5132 | 3155 | {"relax", no_argument, NULL, OPTION_RELAX}, |
05982cac | 3156 | {"big", no_argument, NULL, OPTION_BIG}, |
252b5132 | 3157 | {"little", no_argument, NULL, OPTION_LITTLE}, |
784906c5 NC |
3158 | /* The next two switches are here because the |
3159 | generic parts of the linker testsuite uses them. */ | |
3160 | {"EB", no_argument, NULL, OPTION_BIG}, | |
3161 | {"EL", no_argument, NULL, OPTION_LITTLE}, | |
252b5132 | 3162 | {"small", no_argument, NULL, OPTION_SMALL}, |
d4845d57 | 3163 | {"dsp", no_argument, NULL, OPTION_DSP}, |
37dedf66 | 3164 | {"isa", required_argument, NULL, OPTION_ISA}, |
f55629b8 | 3165 | {"renesas", no_argument, NULL, OPTION_RENESAS}, |
37dedf66 | 3166 | {"allow-reg-prefix", no_argument, NULL, OPTION_ALLOW_REG_PREFIX}, |
f55629b8 | 3167 | |
324bfcf3 | 3168 | #ifdef HAVE_SH64 |
324bfcf3 AO |
3169 | {"abi", required_argument, NULL, OPTION_ABI}, |
3170 | {"no-mix", no_argument, NULL, OPTION_NO_MIX}, | |
3171 | {"shcompact-const-crange", no_argument, NULL, OPTION_SHCOMPACT_CONST_CRANGE}, | |
3172 | {"no-expand", no_argument, NULL, OPTION_NO_EXPAND}, | |
3173 | {"expand-pt32", no_argument, NULL, OPTION_PT32}, | |
3174 | #endif /* HAVE_SH64 */ | |
3175 | ||
252b5132 RH |
3176 | {NULL, no_argument, NULL, 0} |
3177 | }; | |
c4aa876b | 3178 | size_t md_longopts_size = sizeof (md_longopts); |
252b5132 RH |
3179 | |
3180 | int | |
8edc77b9 | 3181 | md_parse_option (int c, char *arg ATTRIBUTE_UNUSED) |
252b5132 RH |
3182 | { |
3183 | switch (c) | |
3184 | { | |
3185 | case OPTION_RELAX: | |
3186 | sh_relax = 1; | |
3187 | break; | |
3188 | ||
05982cac HPN |
3189 | case OPTION_BIG: |
3190 | target_big_endian = 1; | |
3191 | break; | |
3192 | ||
252b5132 | 3193 | case OPTION_LITTLE: |
252b5132 RH |
3194 | target_big_endian = 0; |
3195 | break; | |
3196 | ||
3197 | case OPTION_SMALL: | |
3198 | sh_small = 1; | |
3199 | break; | |
3200 | ||
d4845d57 | 3201 | case OPTION_DSP: |
e38bc3b5 | 3202 | preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); |
d4845d57 JR |
3203 | break; |
3204 | ||
f55629b8 KK |
3205 | case OPTION_RENESAS: |
3206 | dont_adjust_reloc_32 = 1; | |
3207 | break; | |
3208 | ||
37dedf66 NC |
3209 | case OPTION_ALLOW_REG_PREFIX: |
3210 | allow_dollar_register_prefix = 1; | |
3211 | break; | |
3212 | ||
324bfcf3 | 3213 | case OPTION_ISA: |
871ec896 | 3214 | if (strcasecmp (arg, "dsp") == 0) |
e38bc3b5 | 3215 | preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); |
88da98f3 | 3216 | else if (strcasecmp (arg, "fp") == 0) |
e38bc3b5 | 3217 | preset_target_arch = arch_sh_up & ~arch_sh_has_dsp; |
bdfaef52 | 3218 | else if (strcasecmp (arg, "any") == 0) |
e38bc3b5 | 3219 | preset_target_arch = arch_sh_up; |
bdfaef52 JR |
3220 | #ifdef HAVE_SH64 |
3221 | else if (strcasecmp (arg, "shmedia") == 0) | |
324bfcf3 AO |
3222 | { |
3223 | if (sh64_isa_mode == sh64_isa_shcompact) | |
3224 | as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia")); | |
3225 | sh64_isa_mode = sh64_isa_shmedia; | |
3226 | } | |
3227 | else if (strcasecmp (arg, "shcompact") == 0) | |
3228 | { | |
3229 | if (sh64_isa_mode == sh64_isa_shmedia) | |
3230 | as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact")); | |
3231 | if (sh64_abi == sh64_abi_64) | |
3232 | as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact")); | |
3233 | sh64_isa_mode = sh64_isa_shcompact; | |
3234 | } | |
bdfaef52 | 3235 | #endif /* HAVE_SH64 */ |
324bfcf3 | 3236 | else |
f6f9408f JR |
3237 | { |
3238 | extern const bfd_arch_info_type bfd_sh_arch; | |
871ec896 | 3239 | bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; |
37dedf66 | 3240 | |
f6f9408f JR |
3241 | preset_target_arch = 0; |
3242 | for (; bfd_arch; bfd_arch=bfd_arch->next) | |
3243 | { | |
3244 | int len = strlen(bfd_arch->printable_name); | |
3245 | ||
3246 | if (bfd_arch->mach == bfd_mach_sh5) | |
3247 | continue; | |
3248 | ||
3249 | if (strncasecmp (bfd_arch->printable_name, arg, len) != 0) | |
3250 | continue; | |
3251 | ||
3252 | if (arg[len] == '\0') | |
3253 | preset_target_arch = | |
3254 | sh_get_arch_from_bfd_mach (bfd_arch->mach); | |
3255 | else if (strcasecmp(&arg[len], "-up") == 0) | |
3256 | preset_target_arch = | |
3257 | sh_get_arch_up_from_bfd_mach (bfd_arch->mach); | |
3258 | else | |
3259 | continue; | |
3260 | break; | |
3261 | } | |
3262 | ||
3263 | if (!preset_target_arch) | |
3264 | as_bad ("Invalid argument to --isa option: %s", arg); | |
3265 | } | |
324bfcf3 AO |
3266 | break; |
3267 | ||
bdfaef52 | 3268 | #ifdef HAVE_SH64 |
324bfcf3 AO |
3269 | case OPTION_ABI: |
3270 | if (strcmp (arg, "32") == 0) | |
3271 | { | |
3272 | if (sh64_abi == sh64_abi_64) | |
3273 | as_bad (_("Invalid combination: --abi=32 with --abi=64")); | |
3274 | sh64_abi = sh64_abi_32; | |
3275 | } | |
3276 | else if (strcmp (arg, "64") == 0) | |
3277 | { | |
3278 | if (sh64_abi == sh64_abi_32) | |
3279 | as_bad (_("Invalid combination: --abi=64 with --abi=32")); | |
3280 | if (sh64_isa_mode == sh64_isa_shcompact) | |
3281 | as_bad (_("Invalid combination: --isa=SHcompact with --abi=64")); | |
3282 | sh64_abi = sh64_abi_64; | |
3283 | } | |
3284 | else | |
3285 | as_bad ("Invalid argument to --abi option: %s", arg); | |
3286 | break; | |
3287 | ||
3288 | case OPTION_NO_MIX: | |
b34976b6 | 3289 | sh64_mix = FALSE; |
324bfcf3 AO |
3290 | break; |
3291 | ||
3292 | case OPTION_SHCOMPACT_CONST_CRANGE: | |
b34976b6 | 3293 | sh64_shcompact_const_crange = TRUE; |
324bfcf3 AO |
3294 | break; |
3295 | ||
3296 | case OPTION_NO_EXPAND: | |
b34976b6 | 3297 | sh64_expand = FALSE; |
324bfcf3 AO |
3298 | break; |
3299 | ||
3300 | case OPTION_PT32: | |
b34976b6 | 3301 | sh64_pt32 = TRUE; |
324bfcf3 AO |
3302 | break; |
3303 | #endif /* HAVE_SH64 */ | |
3304 | ||
252b5132 RH |
3305 | default: |
3306 | return 0; | |
3307 | } | |
3308 | ||
3309 | return 1; | |
3310 | } | |
3311 | ||
3312 | void | |
8edc77b9 | 3313 | md_show_usage (FILE *stream) |
252b5132 | 3314 | { |
c4aa876b | 3315 | fprintf (stream, _("\ |
252b5132 | 3316 | SH options:\n\ |
37dedf66 NC |
3317 | --little generate little endian code\n\ |
3318 | --big generate big endian code\n\ | |
3319 | --relax alter jump instructions for long displacements\n\ | |
3320 | --renesas disable optimization with section symbol for\n\ | |
f55629b8 | 3321 | compatibility with Renesas assembler.\n\ |
37dedf66 NC |
3322 | --small align sections to 4 byte boundaries, not 16\n\ |
3323 | --dsp enable sh-dsp insns, and disable floating-point ISAs.\n\ | |
3324 | --allow-reg-prefix allow '$' as a register name prefix.\n\ | |
3325 | --isa=[any use most appropriate isa\n\ | |
ae51a426 | 3326 | | dsp same as '-dsp'\n\ |
f6f9408f JR |
3327 | | fp")); |
3328 | { | |
3329 | extern const bfd_arch_info_type bfd_sh_arch; | |
871ec896 | 3330 | bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; |
37dedf66 | 3331 | |
f6f9408f JR |
3332 | for (; bfd_arch; bfd_arch=bfd_arch->next) |
3333 | if (bfd_arch->mach != bfd_mach_sh5) | |
3334 | { | |
3335 | fprintf (stream, "\n | %s", bfd_arch->printable_name); | |
3336 | fprintf (stream, "\n | %s-up", bfd_arch->printable_name); | |
3337 | } | |
3338 | } | |
3339 | fprintf (stream, "]\n"); | |
ae51a426 JR |
3340 | #ifdef HAVE_SH64 |
3341 | fprintf (stream, _("\ | |
37dedf66 | 3342 | --isa=[shmedia set as the default instruction set for SH64\n\ |
88da98f3 MS |
3343 | | SHmedia\n\ |
3344 | | shcompact\n\ | |
ae51a426 | 3345 | | SHcompact]\n")); |
324bfcf3 | 3346 | fprintf (stream, _("\ |
37dedf66 | 3347 | --abi=[32|64] set size of expanded SHmedia operands and object\n\ |
324bfcf3 | 3348 | file type\n\ |
37dedf66 | 3349 | --shcompact-const-crange emit code-range descriptors for constants in\n\ |
324bfcf3 | 3350 | SHcompact code sections\n\ |
37dedf66 | 3351 | --no-mix disallow SHmedia code in the same section as\n\ |
324bfcf3 | 3352 | constants and SHcompact code\n\ |
37dedf66 NC |
3353 | --no-expand do not expand MOVI, PT, PTA or PTB instructions\n\ |
3354 | --expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\ | |
2acb89ed | 3355 | to 32 bits only\n")); |
324bfcf3 | 3356 | #endif /* HAVE_SH64 */ |
252b5132 RH |
3357 | } |
3358 | \f | |
252b5132 RH |
3359 | /* This struct is used to pass arguments to sh_count_relocs through |
3360 | bfd_map_over_sections. */ | |
3361 | ||
3362 | struct sh_count_relocs | |
3363 | { | |
3364 | /* Symbol we are looking for. */ | |
3365 | symbolS *sym; | |
3366 | /* Count of relocs found. */ | |
3367 | int count; | |
3368 | }; | |
3369 | ||
3370 | /* Count the number of fixups in a section which refer to a particular | |
7be1c489 | 3371 | symbol. This is called via bfd_map_over_sections. */ |
252b5132 | 3372 | |
252b5132 | 3373 | static void |
8edc77b9 | 3374 | sh_count_relocs (bfd *abfd ATTRIBUTE_UNUSED, segT sec, void *data) |
252b5132 RH |
3375 | { |
3376 | struct sh_count_relocs *info = (struct sh_count_relocs *) data; | |
3377 | segment_info_type *seginfo; | |
3378 | symbolS *sym; | |
3379 | fixS *fix; | |
3380 | ||
3381 | seginfo = seg_info (sec); | |
3382 | if (seginfo == NULL) | |
3383 | return; | |
3384 | ||
3385 | sym = info->sym; | |
3386 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
3387 | { | |
3388 | if (fix->fx_addsy == sym) | |
3389 | { | |
3390 | ++info->count; | |
3391 | fix->fx_tcbit = 1; | |
3392 | } | |
3393 | } | |
3394 | } | |
3395 | ||
7be1c489 AM |
3396 | /* Handle the count relocs for a particular section. |
3397 | This is called via bfd_map_over_sections. */ | |
252b5132 | 3398 | |
252b5132 | 3399 | static void |
8edc77b9 KK |
3400 | sh_frob_section (bfd *abfd ATTRIBUTE_UNUSED, segT sec, |
3401 | void *ignore ATTRIBUTE_UNUSED) | |
252b5132 RH |
3402 | { |
3403 | segment_info_type *seginfo; | |
3404 | fixS *fix; | |
3405 | ||
3406 | seginfo = seg_info (sec); | |
3407 | if (seginfo == NULL) | |
3408 | return; | |
3409 | ||
e14e52f8 DD |
3410 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) |
3411 | { | |
3412 | symbolS *sym; | |
3413 | ||
3414 | sym = fix->fx_addsy; | |
3415 | /* Check for a local_symbol. */ | |
3416 | if (sym && sym->bsym == NULL) | |
3417 | { | |
3418 | struct local_symbol *ls = (struct local_symbol *)sym; | |
3419 | /* See if it's been converted. If so, canonicalize. */ | |
3420 | if (local_symbol_converted_p (ls)) | |
3421 | fix->fx_addsy = local_symbol_get_real_symbol (ls); | |
3422 | } | |
3423 | } | |
3424 | ||
252b5132 RH |
3425 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) |
3426 | { | |
3427 | symbolS *sym; | |
3428 | bfd_vma val; | |
3429 | fixS *fscan; | |
3430 | struct sh_count_relocs info; | |
3431 | ||
3432 | if (fix->fx_r_type != BFD_RELOC_SH_USES) | |
3433 | continue; | |
3434 | ||
3435 | /* The BFD_RELOC_SH_USES reloc should refer to a defined local | |
3436 | symbol in the same section. */ | |
3437 | sym = fix->fx_addsy; | |
3438 | if (sym == NULL | |
3439 | || fix->fx_subsy != NULL | |
3440 | || fix->fx_addnumber != 0 | |
3441 | || S_GET_SEGMENT (sym) != sec | |
252b5132 RH |
3442 | || S_IS_EXTERNAL (sym)) |
3443 | { | |
3444 | as_warn_where (fix->fx_file, fix->fx_line, | |
3445 | _(".uses does not refer to a local symbol in the same section")); | |
3446 | continue; | |
3447 | } | |
3448 | ||
3449 | /* Look through the fixups again, this time looking for one | |
3450 | at the same location as sym. */ | |
3451 | val = S_GET_VALUE (sym); | |
3452 | for (fscan = seginfo->fix_root; | |
3453 | fscan != NULL; | |
3454 | fscan = fscan->fx_next) | |
3455 | if (val == fscan->fx_frag->fr_address + fscan->fx_where | |
3456 | && fscan->fx_r_type != BFD_RELOC_SH_ALIGN | |
3457 | && fscan->fx_r_type != BFD_RELOC_SH_CODE | |
3458 | && fscan->fx_r_type != BFD_RELOC_SH_DATA | |
3459 | && fscan->fx_r_type != BFD_RELOC_SH_LABEL) | |
3460 | break; | |
3461 | if (fscan == NULL) | |
3462 | { | |
3463 | as_warn_where (fix->fx_file, fix->fx_line, | |
3464 | _("can't find fixup pointed to by .uses")); | |
3465 | continue; | |
3466 | } | |
3467 | ||
3468 | if (fscan->fx_tcbit) | |
3469 | { | |
3470 | /* We've already done this one. */ | |
3471 | continue; | |
3472 | } | |
3473 | ||
6b31947e NC |
3474 | /* The variable fscan should also be a fixup to a local symbol |
3475 | in the same section. */ | |
252b5132 RH |
3476 | sym = fscan->fx_addsy; |
3477 | if (sym == NULL | |
3478 | || fscan->fx_subsy != NULL | |
3479 | || fscan->fx_addnumber != 0 | |
3480 | || S_GET_SEGMENT (sym) != sec | |
252b5132 RH |
3481 | || S_IS_EXTERNAL (sym)) |
3482 | { | |
3483 | as_warn_where (fix->fx_file, fix->fx_line, | |
3484 | _(".uses target does not refer to a local symbol in the same section")); | |
3485 | continue; | |
3486 | } | |
3487 | ||
3488 | /* Now we look through all the fixups of all the sections, | |
3489 | counting the number of times we find a reference to sym. */ | |
3490 | info.sym = sym; | |
3491 | info.count = 0; | |
8edc77b9 | 3492 | bfd_map_over_sections (stdoutput, sh_count_relocs, &info); |
252b5132 RH |
3493 | |
3494 | if (info.count < 1) | |
3495 | abort (); | |
3496 | ||
3497 | /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. | |
3498 | We have already adjusted the value of sym to include the | |
3499 | fragment address, so we undo that adjustment here. */ | |
3500 | subseg_change (sec, 0); | |
7bcad3e5 NC |
3501 | fix_new (fscan->fx_frag, |
3502 | S_GET_VALUE (sym) - fscan->fx_frag->fr_address, | |
252b5132 RH |
3503 | 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); |
3504 | } | |
3505 | } | |
3506 | ||
3507 | /* This function is called after the symbol table has been completed, | |
3508 | but before the relocs or section contents have been written out. | |
3509 | If we have seen any .uses pseudo-ops, they point to an instruction | |
3510 | which loads a register with the address of a function. We look | |
3511 | through the fixups to find where the function address is being | |
3512 | loaded from. We then generate a COUNT reloc giving the number of | |
3513 | times that function address is referred to. The linker uses this | |
3514 | information when doing relaxing, to decide when it can eliminate | |
3515 | the stored function address entirely. */ | |
3516 | ||
3517 | void | |
8edc77b9 | 3518 | sh_frob_file (void) |
252b5132 | 3519 | { |
324bfcf3 AO |
3520 | #ifdef HAVE_SH64 |
3521 | shmedia_frob_file_before_adjust (); | |
3522 | #endif | |
3523 | ||
252b5132 RH |
3524 | if (! sh_relax) |
3525 | return; | |
3526 | ||
8edc77b9 | 3527 | bfd_map_over_sections (stdoutput, sh_frob_section, NULL); |
252b5132 RH |
3528 | } |
3529 | ||
3530 | /* Called after relaxing. Set the correct sizes of the fragments, and | |
55cf6793 | 3531 | create relocs so that md_apply_fix will fill in the correct values. */ |
252b5132 RH |
3532 | |
3533 | void | |
8edc77b9 | 3534 | md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT seg, fragS *fragP) |
252b5132 RH |
3535 | { |
3536 | int donerelax = 0; | |
3537 | ||
3538 | switch (fragP->fr_subtype) | |
3539 | { | |
3540 | case C (COND_JUMP, COND8): | |
3541 | case C (COND_JUMP_DELAY, COND8): | |
3542 | subseg_change (seg, 0); | |
3543 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
3544 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
3545 | fragP->fr_fix += 2; | |
3546 | fragP->fr_var = 0; | |
3547 | break; | |
3548 | ||
3549 | case C (UNCOND_JUMP, UNCOND12): | |
3550 | subseg_change (seg, 0); | |
3551 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
3552 | 1, BFD_RELOC_SH_PCDISP12BY2); | |
3553 | fragP->fr_fix += 2; | |
3554 | fragP->fr_var = 0; | |
3555 | break; | |
3556 | ||
3557 | case C (UNCOND_JUMP, UNCOND32): | |
3558 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): | |
3559 | if (fragP->fr_symbol == NULL) | |
99b222b4 HPN |
3560 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3561 | _("displacement overflows 12-bit field")); | |
252b5132 | 3562 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
99b222b4 HPN |
3563 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3564 | _("displacement to defined symbol %s overflows 12-bit field"), | |
3565 | S_GET_NAME (fragP->fr_symbol)); | |
252b5132 | 3566 | else |
99b222b4 HPN |
3567 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3568 | _("displacement to undefined symbol %s overflows 12-bit field"), | |
3569 | S_GET_NAME (fragP->fr_symbol)); | |
3570 | /* Stabilize this frag, so we don't trip an assert. */ | |
3571 | fragP->fr_fix += fragP->fr_var; | |
3572 | fragP->fr_var = 0; | |
252b5132 RH |
3573 | break; |
3574 | ||
3575 | case C (COND_JUMP, COND12): | |
3576 | case C (COND_JUMP_DELAY, COND12): | |
6b31947e | 3577 | /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */ |
252b5132 RH |
3578 | /* I found that a relax failure for gcc.c-torture/execute/930628-1.c |
3579 | was due to gas incorrectly relaxing an out-of-range conditional | |
3580 | branch with delay slot. It turned: | |
3581 | bf.s L6 (slot mov.l r12,@(44,r0)) | |
3582 | into: | |
c4aa876b | 3583 | |
252b5132 RH |
3584 | 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) |
3585 | 30: 00 09 nop | |
3586 | 32: 10 cb mov.l r12,@(44,r0) | |
3587 | Therefore, branches with delay slots have to be handled | |
3588 | differently from ones without delay slots. */ | |
3589 | { | |
3590 | unsigned char *buffer = | |
3591 | (unsigned char *) (fragP->fr_fix + fragP->fr_literal); | |
3592 | int highbyte = target_big_endian ? 0 : 1; | |
3593 | int lowbyte = target_big_endian ? 1 : 0; | |
3594 | int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); | |
3595 | ||
3596 | /* Toggle the true/false bit of the bcond. */ | |
3597 | buffer[highbyte] ^= 0x2; | |
3598 | ||
d3ecfc59 | 3599 | /* If this is a delayed branch, we may not put the bra in the |
252b5132 RH |
3600 | slot. So we change it to a non-delayed branch, like that: |
3601 | b! cond slot_label; bra disp; slot_label: slot_insn | |
3602 | ??? We should try if swapping the conditional branch and | |
3603 | its delay-slot insn already makes the branch reach. */ | |
3604 | ||
3605 | /* Build a relocation to six / four bytes farther on. */ | |
3606 | subseg_change (seg, 0); | |
7be1c489 | 3607 | fix_new (fragP, fragP->fr_fix, 2, section_symbol (seg), |
252b5132 RH |
3608 | fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), |
3609 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
3610 | ||
3611 | /* Set up a jump instruction. */ | |
3612 | buffer[highbyte + 2] = 0xa0; | |
3613 | buffer[lowbyte + 2] = 0; | |
3614 | fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, | |
3615 | fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); | |
3616 | ||
3617 | if (delay) | |
3618 | { | |
3619 | buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ | |
3620 | fragP->fr_fix += 4; | |
3621 | } | |
3622 | else | |
3623 | { | |
3624 | /* Fill in a NOP instruction. */ | |
3625 | buffer[highbyte + 4] = 0x0; | |
3626 | buffer[lowbyte + 4] = 0x9; | |
3627 | ||
3628 | fragP->fr_fix += 6; | |
3629 | } | |
3630 | fragP->fr_var = 0; | |
3631 | donerelax = 1; | |
3632 | } | |
3633 | break; | |
3634 | ||
3635 | case C (COND_JUMP, COND32): | |
3636 | case C (COND_JUMP_DELAY, COND32): | |
3637 | case C (COND_JUMP, UNDEF_WORD_DISP): | |
3638 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): | |
3639 | if (fragP->fr_symbol == NULL) | |
99b222b4 HPN |
3640 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3641 | _("displacement overflows 8-bit field")); | |
252b5132 | 3642 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
99b222b4 HPN |
3643 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3644 | _("displacement to defined symbol %s overflows 8-bit field"), | |
3645 | S_GET_NAME (fragP->fr_symbol)); | |
252b5132 | 3646 | else |
99b222b4 HPN |
3647 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3648 | _("displacement to undefined symbol %s overflows 8-bit field "), | |
3649 | S_GET_NAME (fragP->fr_symbol)); | |
3650 | /* Stabilize this frag, so we don't trip an assert. */ | |
3651 | fragP->fr_fix += fragP->fr_var; | |
3652 | fragP->fr_var = 0; | |
252b5132 RH |
3653 | break; |
3654 | ||
3655 | default: | |
324bfcf3 | 3656 | #ifdef HAVE_SH64 |
b34976b6 | 3657 | shmedia_md_convert_frag (headers, seg, fragP, TRUE); |
324bfcf3 | 3658 | #else |
252b5132 | 3659 | abort (); |
324bfcf3 | 3660 | #endif |
252b5132 RH |
3661 | } |
3662 | ||
3663 | if (donerelax && !sh_relax) | |
3664 | as_warn_where (fragP->fr_file, fragP->fr_line, | |
3665 | _("overflow in branch to %s; converted into longer instruction sequence"), | |
3666 | (fragP->fr_symbol != NULL | |
3667 | ? S_GET_NAME (fragP->fr_symbol) | |
3668 | : "")); | |
3669 | } | |
3670 | ||
3671 | valueT | |
8edc77b9 | 3672 | md_section_align (segT seg ATTRIBUTE_UNUSED, valueT size) |
252b5132 | 3673 | { |
252b5132 RH |
3674 | #ifdef OBJ_ELF |
3675 | return size; | |
3676 | #else /* ! OBJ_ELF */ | |
3677 | return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1) | |
3678 | & (-1 << bfd_get_section_alignment (stdoutput, seg))); | |
3679 | #endif /* ! OBJ_ELF */ | |
252b5132 RH |
3680 | } |
3681 | ||
3682 | /* This static variable is set by s_uacons to tell sh_cons_align that | |
67c1ffbe | 3683 | the expression does not need to be aligned. */ |
252b5132 RH |
3684 | |
3685 | static int sh_no_align_cons = 0; | |
3686 | ||
3687 | /* This handles the unaligned space allocation pseudo-ops, such as | |
3688 | .uaword. .uaword is just like .word, but the value does not need | |
3689 | to be aligned. */ | |
3690 | ||
3691 | static void | |
8edc77b9 | 3692 | s_uacons (int bytes) |
252b5132 RH |
3693 | { |
3694 | /* Tell sh_cons_align not to align this value. */ | |
3695 | sh_no_align_cons = 1; | |
3696 | cons (bytes); | |
3697 | } | |
3698 | ||
3699 | /* If a .word, et. al., pseud-op is seen, warn if the value is not | |
3700 | aligned correctly. Note that this can cause warnings to be issued | |
3701 | when assembling initialized structured which were declared with the | |
3702 | packed attribute. FIXME: Perhaps we should require an option to | |
3703 | enable this warning? */ | |
3704 | ||
3705 | void | |
8edc77b9 | 3706 | sh_cons_align (int nbytes) |
252b5132 RH |
3707 | { |
3708 | int nalign; | |
3709 | char *p; | |
3710 | ||
3711 | if (sh_no_align_cons) | |
3712 | { | |
3713 | /* This is an unaligned pseudo-op. */ | |
3714 | sh_no_align_cons = 0; | |
3715 | return; | |
3716 | } | |
3717 | ||
3718 | nalign = 0; | |
3719 | while ((nbytes & 1) == 0) | |
3720 | { | |
3721 | ++nalign; | |
3722 | nbytes >>= 1; | |
3723 | } | |
3724 | ||
3725 | if (nalign == 0) | |
3726 | return; | |
3727 | ||
3728 | if (now_seg == absolute_section) | |
3729 | { | |
3730 | if ((abs_section_offset & ((1 << nalign) - 1)) != 0) | |
3731 | as_warn (_("misaligned data")); | |
3732 | return; | |
3733 | } | |
3734 | ||
0a9ef439 | 3735 | p = frag_var (rs_align_test, 1, 1, (relax_substateT) 0, |
252b5132 RH |
3736 | (symbolS *) NULL, (offsetT) nalign, (char *) NULL); |
3737 | ||
3738 | record_alignment (now_seg, nalign); | |
3739 | } | |
3740 | ||
3741 | /* When relaxing, we need to output a reloc for any .align directive | |
3742 | that requests alignment to a four byte boundary or larger. This is | |
3743 | also where we check for misaligned data. */ | |
3744 | ||
3745 | void | |
8edc77b9 | 3746 | sh_handle_align (fragS *frag) |
252b5132 | 3747 | { |
0a9ef439 RH |
3748 | int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix; |
3749 | ||
3750 | if (frag->fr_type == rs_align_code) | |
3751 | { | |
3752 | static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; | |
3753 | static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; | |
3754 | ||
3755 | char *p = frag->fr_literal + frag->fr_fix; | |
3756 | ||
3757 | if (bytes & 1) | |
3758 | { | |
3759 | *p++ = 0; | |
3760 | bytes--; | |
3761 | frag->fr_fix += 1; | |
3762 | } | |
3763 | ||
3764 | if (target_big_endian) | |
3765 | { | |
3766 | memcpy (p, big_nop_pattern, sizeof big_nop_pattern); | |
3767 | frag->fr_var = sizeof big_nop_pattern; | |
3768 | } | |
3769 | else | |
3770 | { | |
3771 | memcpy (p, little_nop_pattern, sizeof little_nop_pattern); | |
3772 | frag->fr_var = sizeof little_nop_pattern; | |
3773 | } | |
3774 | } | |
3775 | else if (frag->fr_type == rs_align_test) | |
3776 | { | |
3777 | if (bytes != 0) | |
91382b56 | 3778 | as_bad_where (frag->fr_file, frag->fr_line, _("misaligned data")); |
0a9ef439 RH |
3779 | } |
3780 | ||
252b5132 | 3781 | if (sh_relax |
0a9ef439 RH |
3782 | && (frag->fr_type == rs_align |
3783 | || frag->fr_type == rs_align_code) | |
252b5132 RH |
3784 | && frag->fr_address + frag->fr_fix > 0 |
3785 | && frag->fr_offset > 1 | |
3786 | && now_seg != bss_section) | |
3787 | fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, | |
3788 | BFD_RELOC_SH_ALIGN); | |
252b5132 RH |
3789 | } |
3790 | ||
28602ebf KK |
3791 | /* See whether the relocation should be resolved locally. */ |
3792 | ||
b34976b6 | 3793 | static bfd_boolean |
8edc77b9 | 3794 | sh_local_pcrel (fixS *fix) |
28602ebf | 3795 | { |
b34976b6 AM |
3796 | return (! sh_relax |
3797 | && (fix->fx_r_type == BFD_RELOC_SH_PCDISP8BY2 | |
3798 | || fix->fx_r_type == BFD_RELOC_SH_PCDISP12BY2 | |
3799 | || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2 | |
3800 | || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4 | |
3801 | || fix->fx_r_type == BFD_RELOC_8_PCREL | |
3802 | || fix->fx_r_type == BFD_RELOC_SH_SWITCH16 | |
3803 | || fix->fx_r_type == BFD_RELOC_SH_SWITCH32)); | |
28602ebf KK |
3804 | } |
3805 | ||
252b5132 RH |
3806 | /* See whether we need to force a relocation into the output file. |
3807 | This is used to force out switch and PC relative relocations when | |
3808 | relaxing. */ | |
3809 | ||
3810 | int | |
8edc77b9 | 3811 | sh_force_relocation (fixS *fix) |
252b5132 | 3812 | { |
8ba4dac0 DJ |
3813 | /* These relocations can't make it into a DSO, so no use forcing |
3814 | them for global symbols. */ | |
28602ebf | 3815 | if (sh_local_pcrel (fix)) |
8ba4dac0 DJ |
3816 | return 0; |
3817 | ||
9efb3b7b | 3818 | /* Make sure some relocations get emitted. */ |
ae6063d4 | 3819 | if (fix->fx_r_type == BFD_RELOC_SH_LOOP_START |
a161fe53 | 3820 | || fix->fx_r_type == BFD_RELOC_SH_LOOP_END |
9efb3b7b KK |
3821 | || fix->fx_r_type == BFD_RELOC_SH_TLS_GD_32 |
3822 | || fix->fx_r_type == BFD_RELOC_SH_TLS_LD_32 | |
3823 | || fix->fx_r_type == BFD_RELOC_SH_TLS_IE_32 | |
3824 | || fix->fx_r_type == BFD_RELOC_SH_TLS_LDO_32 | |
3825 | || fix->fx_r_type == BFD_RELOC_SH_TLS_LE_32 | |
ae6063d4 | 3826 | || generic_force_reloc (fix)) |
252b5132 RH |
3827 | return 1; |
3828 | ||
3829 | if (! sh_relax) | |
3830 | return 0; | |
3831 | ||
3832 | return (fix->fx_pcrel | |
3833 | || SWITCH_TABLE (fix) | |
3834 | || fix->fx_r_type == BFD_RELOC_SH_COUNT | |
3835 | || fix->fx_r_type == BFD_RELOC_SH_ALIGN | |
3836 | || fix->fx_r_type == BFD_RELOC_SH_CODE | |
3837 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
324bfcf3 AO |
3838 | #ifdef HAVE_SH64 |
3839 | || fix->fx_r_type == BFD_RELOC_SH_SHMEDIA_CODE | |
3840 | #endif | |
252b5132 RH |
3841 | || fix->fx_r_type == BFD_RELOC_SH_LABEL); |
3842 | } | |
3843 | ||
3844 | #ifdef OBJ_ELF | |
b34976b6 | 3845 | bfd_boolean |
8edc77b9 | 3846 | sh_fix_adjustable (fixS *fixP) |
252b5132 | 3847 | { |
a161fe53 AM |
3848 | if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL |
3849 | || fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL | |
3850 | || fixP->fx_r_type == BFD_RELOC_SH_GOTPC | |
f55629b8 | 3851 | || ((fixP->fx_r_type == BFD_RELOC_32) && dont_adjust_reloc_32) |
a1cc9221 AO |
3852 | || fixP->fx_r_type == BFD_RELOC_RVA) |
3853 | return 0; | |
3854 | ||
252b5132 RH |
3855 | /* We need the symbol name for the VTABLE entries */ |
3856 | if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
3857 | || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
3858 | return 0; | |
3859 | ||
3860 | return 1; | |
3861 | } | |
d4845d57 | 3862 | |
6b31947e | 3863 | void |
8edc77b9 | 3864 | sh_elf_final_processing (void) |
d4845d57 JR |
3865 | { |
3866 | int val; | |
3867 | ||
3868 | /* Set file-specific flags to indicate if this code needs | |
88da98f3 | 3869 | a processor with the sh-dsp / sh2e ISA to execute. */ |
324bfcf3 AO |
3870 | #ifdef HAVE_SH64 |
3871 | /* SH5 and above don't know about the valid_arch arch_sh* bits defined | |
3872 | in sh-opc.h, so check SH64 mode before checking valid_arch. */ | |
3873 | if (sh64_isa_mode != sh64_isa_unspecified) | |
3874 | val = EF_SH5; | |
3875 | else | |
1a320fbb NC |
3876 | #elif defined TARGET_SYMBIAN |
3877 | if (1) | |
1a66a017 NC |
3878 | { |
3879 | extern int sh_symbian_find_elf_flags (unsigned int); | |
3880 | ||
3881 | val = sh_symbian_find_elf_flags (valid_arch); | |
3882 | } | |
1a320fbb | 3883 | else |
324bfcf3 | 3884 | #endif /* HAVE_SH64 */ |
f6f9408f | 3885 | val = sh_find_elf_flags (valid_arch); |
d4845d57 JR |
3886 | |
3887 | elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; | |
3888 | elf_elfheader (stdoutput)->e_flags |= val; | |
3889 | } | |
252b5132 RH |
3890 | #endif |
3891 | ||
55e6e397 RS |
3892 | /* Apply fixup FIXP to SIZE-byte field BUF given that VAL is its |
3893 | assembly-time value. If we're generating a reloc for FIXP, | |
3894 | see whether the addend should be stored in-place or whether | |
3895 | it should be in an ELF r_addend field. */ | |
3896 | ||
3897 | static void | |
3898 | apply_full_field_fix (fixS *fixP, char *buf, bfd_vma val, int size) | |
3899 | { | |
3900 | reloc_howto_type *howto; | |
3901 | ||
3902 | if (fixP->fx_addsy != NULL || fixP->fx_pcrel) | |
3903 | { | |
3904 | howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); | |
3905 | if (howto && !howto->partial_inplace) | |
3906 | { | |
3907 | fixP->fx_addnumber = val; | |
3908 | return; | |
3909 | } | |
3910 | } | |
3911 | md_number_to_chars (buf, val, size); | |
3912 | } | |
3913 | ||
252b5132 RH |
3914 | /* Apply a fixup to the object file. */ |
3915 | ||
252b5132 | 3916 | void |
55cf6793 | 3917 | md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) |
252b5132 RH |
3918 | { |
3919 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; | |
3920 | int lowbyte = target_big_endian ? 1 : 0; | |
3921 | int highbyte = target_big_endian ? 0 : 1; | |
2ed5f585 | 3922 | long val = (long) *valP; |
252b5132 RH |
3923 | long max, min; |
3924 | int shift; | |
3925 | ||
a1cc9221 AO |
3926 | /* A difference between two symbols, the second of which is in the |
3927 | current section, is transformed in a PC-relative relocation to | |
3928 | the other symbol. We have to adjust the relocation type here. */ | |
3929 | if (fixP->fx_pcrel) | |
3930 | { | |
3931 | switch (fixP->fx_r_type) | |
3932 | { | |
3933 | default: | |
3934 | break; | |
3935 | ||
3936 | case BFD_RELOC_32: | |
3937 | fixP->fx_r_type = BFD_RELOC_32_PCREL; | |
3938 | break; | |
3939 | ||
3940 | /* Currently, we only support 32-bit PCREL relocations. | |
3941 | We'd need a new reloc type to handle 16_PCREL, and | |
3942 | 8_PCREL is already taken for R_SH_SWITCH8, which | |
3943 | apparently does something completely different than what | |
3944 | we need. FIXME. */ | |
3945 | case BFD_RELOC_16: | |
3946 | bfd_set_error (bfd_error_bad_value); | |
94f592af | 3947 | return; |
81d4177b | 3948 | |
a1cc9221 AO |
3949 | case BFD_RELOC_8: |
3950 | bfd_set_error (bfd_error_bad_value); | |
94f592af | 3951 | return; |
a1cc9221 AO |
3952 | } |
3953 | } | |
3954 | ||
6b31947e NC |
3955 | /* The function adjust_reloc_syms won't convert a reloc against a weak |
3956 | symbol into a reloc against a section, but bfd_install_relocation | |
3957 | will screw up if the symbol is defined, so we have to adjust val here | |
1308f14c HPN |
3958 | to avoid the screw up later. |
3959 | ||
3960 | For ordinary relocs, this does not happen for ELF, since for ELF, | |
3961 | bfd_install_relocation uses the "special function" field of the | |
3962 | howto, and does not execute the code that needs to be undone, as long | |
3963 | as the special function does not return bfd_reloc_continue. | |
3964 | It can happen for GOT- and PLT-type relocs the way they are | |
3965 | described in elf32-sh.c as they use bfd_elf_generic_reloc, but it | |
3966 | doesn't matter here since those relocs don't use VAL; see below. */ | |
3967 | if (OUTPUT_FLAVOR != bfd_target_elf_flavour | |
3968 | && fixP->fx_addsy != NULL | |
252b5132 RH |
3969 | && S_IS_WEAK (fixP->fx_addsy)) |
3970 | val -= S_GET_VALUE (fixP->fx_addsy); | |
252b5132 | 3971 | |
bdfaef52 JR |
3972 | if (SWITCH_TABLE (fixP)) |
3973 | val -= S_GET_VALUE (fixP->fx_subsy); | |
252b5132 RH |
3974 | |
3975 | max = min = 0; | |
3976 | shift = 0; | |
3977 | switch (fixP->fx_r_type) | |
3978 | { | |
1d70c7fb AO |
3979 | case BFD_RELOC_SH_IMM3: |
3980 | max = 0x7; | |
3981 | * buf = (* buf & 0xf8) | (val & 0x7); | |
3982 | break; | |
3983 | case BFD_RELOC_SH_IMM3U: | |
3984 | max = 0x7; | |
3985 | * buf = (* buf & 0x8f) | ((val & 0x7) << 4); | |
3986 | break; | |
3987 | case BFD_RELOC_SH_DISP12: | |
3988 | max = 0xfff; | |
3989 | buf[lowbyte] = val & 0xff; | |
3990 | buf[highbyte] |= (val >> 8) & 0x0f; | |
3991 | break; | |
3992 | case BFD_RELOC_SH_DISP12BY2: | |
3993 | max = 0xfff; | |
3994 | shift = 1; | |
3995 | buf[lowbyte] = (val >> 1) & 0xff; | |
3996 | buf[highbyte] |= (val >> 9) & 0x0f; | |
3997 | break; | |
3998 | case BFD_RELOC_SH_DISP12BY4: | |
3999 | max = 0xfff; | |
4000 | shift = 2; | |
4001 | buf[lowbyte] = (val >> 2) & 0xff; | |
4002 | buf[highbyte] |= (val >> 10) & 0x0f; | |
4003 | break; | |
4004 | case BFD_RELOC_SH_DISP12BY8: | |
4005 | max = 0xfff; | |
4006 | shift = 3; | |
4007 | buf[lowbyte] = (val >> 3) & 0xff; | |
4008 | buf[highbyte] |= (val >> 11) & 0x0f; | |
4009 | break; | |
4010 | case BFD_RELOC_SH_DISP20: | |
4011 | if (! target_big_endian) | |
4012 | abort(); | |
4013 | max = 0x7ffff; | |
4014 | min = -0x80000; | |
28013b5c | 4015 | buf[1] = (buf[1] & 0x0f) | ((val >> 12) & 0xf0); |
1d70c7fb AO |
4016 | buf[2] = (val >> 8) & 0xff; |
4017 | buf[3] = val & 0xff; | |
4018 | break; | |
4019 | case BFD_RELOC_SH_DISP20BY8: | |
4020 | if (!target_big_endian) | |
4021 | abort(); | |
4022 | max = 0x7ffff; | |
4023 | min = -0x80000; | |
4024 | shift = 8; | |
28013b5c | 4025 | buf[1] = (buf[1] & 0x0f) | ((val >> 20) & 0xf0); |
1d70c7fb AO |
4026 | buf[2] = (val >> 16) & 0xff; |
4027 | buf[3] = (val >> 8) & 0xff; | |
4028 | break; | |
4029 | ||
252b5132 RH |
4030 | case BFD_RELOC_SH_IMM4: |
4031 | max = 0xf; | |
4032 | *buf = (*buf & 0xf0) | (val & 0xf); | |
4033 | break; | |
4034 | ||
4035 | case BFD_RELOC_SH_IMM4BY2: | |
4036 | max = 0xf; | |
4037 | shift = 1; | |
4038 | *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); | |
4039 | break; | |
4040 | ||
4041 | case BFD_RELOC_SH_IMM4BY4: | |
4042 | max = 0xf; | |
4043 | shift = 2; | |
4044 | *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); | |
4045 | break; | |
4046 | ||
4047 | case BFD_RELOC_SH_IMM8BY2: | |
4048 | max = 0xff; | |
4049 | shift = 1; | |
4050 | *buf = val >> 1; | |
4051 | break; | |
4052 | ||
4053 | case BFD_RELOC_SH_IMM8BY4: | |
4054 | max = 0xff; | |
4055 | shift = 2; | |
4056 | *buf = val >> 2; | |
4057 | break; | |
4058 | ||
4059 | case BFD_RELOC_8: | |
4060 | case BFD_RELOC_SH_IMM8: | |
4061 | /* Sometimes the 8 bit value is sign extended (e.g., add) and | |
4062 | sometimes it is not (e.g., and). We permit any 8 bit value. | |
4063 | Note that adding further restrictions may invalidate | |
4064 | reasonable looking assembly code, such as ``and -0x1,r0''. */ | |
4065 | max = 0xff; | |
c4aa876b | 4066 | min = -0xff; |
252b5132 RH |
4067 | *buf++ = val; |
4068 | break; | |
4069 | ||
4070 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
4071 | /* The lower two bits of the PC are cleared before the | |
4072 | displacement is added in. We can assume that the destination | |
67c1ffbe | 4073 | is on a 4 byte boundary. If this instruction is also on a 4 |
252b5132 RH |
4074 | byte boundary, then we want |
4075 | (target - here) / 4 | |
4076 | and target - here is a multiple of 4. | |
4077 | Otherwise, we are on a 2 byte boundary, and we want | |
4078 | (target - (here - 2)) / 4 | |
4079 | and target - here is not a multiple of 4. Computing | |
4080 | (target - (here - 2)) / 4 == (target - here + 2) / 4 | |
4081 | works for both cases, since in the first case the addition of | |
4082 | 2 will be removed by the division. target - here is in the | |
4083 | variable val. */ | |
4084 | val = (val + 2) / 4; | |
4085 | if (val & ~0xff) | |
4086 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
4087 | buf[lowbyte] = val; | |
4088 | break; | |
4089 | ||
4090 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
4091 | val /= 2; | |
4092 | if (val & ~0xff) | |
4093 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
4094 | buf[lowbyte] = val; | |
4095 | break; | |
4096 | ||
4097 | case BFD_RELOC_SH_PCDISP8BY2: | |
4098 | val /= 2; | |
4099 | if (val < -0x80 || val > 0x7f) | |
4100 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
4101 | buf[lowbyte] = val; | |
4102 | break; | |
4103 | ||
4104 | case BFD_RELOC_SH_PCDISP12BY2: | |
4105 | val /= 2; | |
8637c045 | 4106 | if (val < -0x800 || val > 0x7ff) |
252b5132 RH |
4107 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); |
4108 | buf[lowbyte] = val & 0xff; | |
4109 | buf[highbyte] |= (val >> 8) & 0xf; | |
4110 | break; | |
4111 | ||
4112 | case BFD_RELOC_32: | |
a1cc9221 | 4113 | case BFD_RELOC_32_PCREL: |
55e6e397 | 4114 | apply_full_field_fix (fixP, buf, val, 4); |
252b5132 RH |
4115 | break; |
4116 | ||
4117 | case BFD_RELOC_16: | |
55e6e397 | 4118 | apply_full_field_fix (fixP, buf, val, 2); |
252b5132 RH |
4119 | break; |
4120 | ||
4121 | case BFD_RELOC_SH_USES: | |
fefaa1aa | 4122 | /* Pass the value into sh_reloc(). */ |
252b5132 RH |
4123 | fixP->fx_addnumber = val; |
4124 | break; | |
4125 | ||
4126 | case BFD_RELOC_SH_COUNT: | |
4127 | case BFD_RELOC_SH_ALIGN: | |
4128 | case BFD_RELOC_SH_CODE: | |
4129 | case BFD_RELOC_SH_DATA: | |
4130 | case BFD_RELOC_SH_LABEL: | |
4131 | /* Nothing to do here. */ | |
4132 | break; | |
4133 | ||
015551fc JR |
4134 | case BFD_RELOC_SH_LOOP_START: |
4135 | case BFD_RELOC_SH_LOOP_END: | |
4136 | ||
252b5132 RH |
4137 | case BFD_RELOC_VTABLE_INHERIT: |
4138 | case BFD_RELOC_VTABLE_ENTRY: | |
4139 | fixP->fx_done = 0; | |
4140 | return; | |
4141 | ||
a1cc9221 AO |
4142 | #ifdef OBJ_ELF |
4143 | case BFD_RELOC_32_PLT_PCREL: | |
4144 | /* Make the jump instruction point to the address of the operand. At | |
81d4177b | 4145 | runtime we merely add the offset to the actual PLT entry. */ |
94f592af | 4146 | * valP = 0xfffffffc; |
0174e383 | 4147 | val = fixP->fx_offset; |
ac3f04d7 AO |
4148 | if (fixP->fx_subsy) |
4149 | val -= S_GET_VALUE (fixP->fx_subsy); | |
55e6e397 | 4150 | apply_full_field_fix (fixP, buf, val, 4); |
a1cc9221 AO |
4151 | break; |
4152 | ||
4153 | case BFD_RELOC_SH_GOTPC: | |
4154 | /* This is tough to explain. We end up with this one if we have | |
4155 | operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". | |
4156 | The goal here is to obtain the absolute address of the GOT, | |
4157 | and it is strongly preferable from a performance point of | |
4158 | view to avoid using a runtime relocation for this. There are | |
4159 | cases where you have something like: | |
81d4177b | 4160 | |
a1cc9221 | 4161 | .long _GLOBAL_OFFSET_TABLE_+[.-.L66] |
81d4177b | 4162 | |
a1cc9221 AO |
4163 | and here no correction would be required. Internally in the |
4164 | assembler we treat operands of this form as not being pcrel | |
4165 | since the '.' is explicitly mentioned, and I wonder whether | |
4166 | it would simplify matters to do it this way. Who knows. In | |
4167 | earlier versions of the PIC patches, the pcrel_adjust field | |
4168 | was used to store the correction, but since the expression is | |
4169 | not pcrel, I felt it would be confusing to do it this way. */ | |
94f592af | 4170 | * valP -= 1; |
55e6e397 | 4171 | apply_full_field_fix (fixP, buf, val, 4); |
a1cc9221 AO |
4172 | break; |
4173 | ||
9efb3b7b KK |
4174 | case BFD_RELOC_SH_TLS_GD_32: |
4175 | case BFD_RELOC_SH_TLS_LD_32: | |
4176 | case BFD_RELOC_SH_TLS_IE_32: | |
2bba4140 KK |
4177 | S_SET_THREAD_LOCAL (fixP->fx_addsy); |
4178 | /* Fallthrough */ | |
4179 | case BFD_RELOC_32_GOT_PCREL: | |
4180 | case BFD_RELOC_SH_GOTPLT32: | |
94f592af | 4181 | * valP = 0; /* Fully resolved at runtime. No addend. */ |
55e6e397 | 4182 | apply_full_field_fix (fixP, buf, 0, 4); |
a1cc9221 AO |
4183 | break; |
4184 | ||
9efb3b7b KK |
4185 | case BFD_RELOC_SH_TLS_LDO_32: |
4186 | case BFD_RELOC_SH_TLS_LE_32: | |
2bba4140 KK |
4187 | S_SET_THREAD_LOCAL (fixP->fx_addsy); |
4188 | /* Fallthrough */ | |
4189 | case BFD_RELOC_32_GOTOFF: | |
55e6e397 | 4190 | apply_full_field_fix (fixP, buf, val, 4); |
a1cc9221 AO |
4191 | break; |
4192 | #endif | |
4193 | ||
252b5132 | 4194 | default: |
324bfcf3 | 4195 | #ifdef HAVE_SH64 |
55cf6793 | 4196 | shmedia_md_apply_fix (fixP, valP); |
324bfcf3 AO |
4197 | return; |
4198 | #else | |
252b5132 | 4199 | abort (); |
324bfcf3 | 4200 | #endif |
252b5132 RH |
4201 | } |
4202 | ||
4203 | if (shift != 0) | |
4204 | { | |
4205 | if ((val & ((1 << shift) - 1)) != 0) | |
4206 | as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); | |
4207 | if (val >= 0) | |
4208 | val >>= shift; | |
4209 | else | |
4210 | val = ((val >> shift) | |
4211 | | ((long) -1 & ~ ((long) -1 >> shift))); | |
4212 | } | |
4213 | if (max != 0 && (val < min || val > max)) | |
4214 | as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); | |
01eaea5a NC |
4215 | else if (max != 0) |
4216 | /* Stop the generic code from trying to overlow check the value as well. | |
4217 | It may not have the correct value anyway, as we do not store val back | |
4218 | into *valP. */ | |
4219 | fixP->fx_no_overflow = 1; | |
252b5132 | 4220 | |
94f592af NC |
4221 | if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) |
4222 | fixP->fx_done = 1; | |
252b5132 RH |
4223 | } |
4224 | ||
4225 | /* Called just before address relaxation. Return the length | |
4226 | by which a fragment must grow to reach it's destination. */ | |
4227 | ||
4228 | int | |
8edc77b9 | 4229 | md_estimate_size_before_relax (fragS *fragP, segT segment_type) |
252b5132 | 4230 | { |
e66457fb AM |
4231 | int what; |
4232 | ||
252b5132 RH |
4233 | switch (fragP->fr_subtype) |
4234 | { | |
93c2a809 | 4235 | default: |
324bfcf3 AO |
4236 | #ifdef HAVE_SH64 |
4237 | return shmedia_md_estimate_size_before_relax (fragP, segment_type); | |
4238 | #else | |
93c2a809 | 4239 | abort (); |
324bfcf3 AO |
4240 | #endif |
4241 | ||
93c2a809 | 4242 | |
252b5132 | 4243 | case C (UNCOND_JUMP, UNDEF_DISP): |
6b31947e | 4244 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
4245 | if (!fragP->fr_symbol) |
4246 | { | |
4247 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
252b5132 RH |
4248 | } |
4249 | else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
4250 | { | |
4251 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
252b5132 RH |
4252 | } |
4253 | else | |
4254 | { | |
4255 | fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); | |
252b5132 RH |
4256 | } |
4257 | break; | |
4258 | ||
252b5132 RH |
4259 | case C (COND_JUMP, UNDEF_DISP): |
4260 | case C (COND_JUMP_DELAY, UNDEF_DISP): | |
e66457fb | 4261 | what = GET_WHAT (fragP->fr_subtype); |
6b31947e | 4262 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
4263 | if (fragP->fr_symbol |
4264 | && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
4265 | { | |
252b5132 | 4266 | /* Got a symbol and it's defined in this segment, become byte |
6b31947e | 4267 | sized - maybe it will fix up. */ |
252b5132 | 4268 | fragP->fr_subtype = C (what, COND8); |
252b5132 RH |
4269 | } |
4270 | else if (fragP->fr_symbol) | |
4271 | { | |
6b31947e | 4272 | /* Its got a segment, but its not ours, so it will always be long. */ |
252b5132 | 4273 | fragP->fr_subtype = C (what, UNDEF_WORD_DISP); |
252b5132 RH |
4274 | } |
4275 | else | |
4276 | { | |
6b31947e | 4277 | /* We know the abs value. */ |
252b5132 | 4278 | fragP->fr_subtype = C (what, COND8); |
252b5132 | 4279 | } |
93c2a809 | 4280 | break; |
252b5132 | 4281 | |
93c2a809 | 4282 | case C (UNCOND_JUMP, UNCOND12): |
e66457fb | 4283 | case C (UNCOND_JUMP, UNCOND32): |
93c2a809 AM |
4284 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): |
4285 | case C (COND_JUMP, COND8): | |
e66457fb AM |
4286 | case C (COND_JUMP, COND12): |
4287 | case C (COND_JUMP, COND32): | |
93c2a809 AM |
4288 | case C (COND_JUMP, UNDEF_WORD_DISP): |
4289 | case C (COND_JUMP_DELAY, COND8): | |
e66457fb AM |
4290 | case C (COND_JUMP_DELAY, COND12): |
4291 | case C (COND_JUMP_DELAY, COND32): | |
93c2a809 AM |
4292 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): |
4293 | /* When relaxing a section for the second time, we don't need to | |
e66457fb | 4294 | do anything besides return the current size. */ |
252b5132 RH |
4295 | break; |
4296 | } | |
e66457fb AM |
4297 | |
4298 | fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length; | |
252b5132 RH |
4299 | return fragP->fr_var; |
4300 | } | |
4301 | ||
6b31947e | 4302 | /* Put number into target byte order. */ |
252b5132 RH |
4303 | |
4304 | void | |
8edc77b9 | 4305 | md_number_to_chars (char *ptr, valueT use, int nbytes) |
252b5132 | 4306 | { |
324bfcf3 AO |
4307 | #ifdef HAVE_SH64 |
4308 | /* We might need to set the contents type to data. */ | |
4309 | sh64_flag_output (); | |
4310 | #endif | |
4311 | ||
252b5132 RH |
4312 | if (! target_big_endian) |
4313 | number_to_chars_littleendian (ptr, use, nbytes); | |
4314 | else | |
4315 | number_to_chars_bigendian (ptr, use, nbytes); | |
4316 | } | |
4317 | ||
7be1c489 | 4318 | /* This version is used in obj-coff.c eg. for the sh-hms target. */ |
cce5a618 NC |
4319 | |
4320 | long | |
8edc77b9 | 4321 | md_pcrel_from (fixS *fixP) |
cce5a618 NC |
4322 | { |
4323 | return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; | |
4324 | } | |
4325 | ||
252b5132 | 4326 | long |
8edc77b9 | 4327 | md_pcrel_from_section (fixS *fixP, segT sec) |
252b5132 | 4328 | { |
28602ebf KK |
4329 | if (! sh_local_pcrel (fixP) |
4330 | && fixP->fx_addsy != (symbolS *) NULL | |
ae6063d4 | 4331 | && (generic_force_reloc (fixP) |
ef17112f HPN |
4332 | || S_GET_SEGMENT (fixP->fx_addsy) != sec)) |
4333 | { | |
4334 | /* The symbol is undefined (or is defined but not in this section, | |
4335 | or we're not sure about it being the final definition). Let the | |
4336 | linker figure it out. We need to adjust the subtraction of a | |
4337 | symbol to the position of the relocated data, though. */ | |
4338 | return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0; | |
4339 | } | |
4340 | ||
cce5a618 | 4341 | return md_pcrel_from (fixP); |
252b5132 RH |
4342 | } |
4343 | ||
252b5132 RH |
4344 | /* Create a reloc. */ |
4345 | ||
4346 | arelent * | |
8edc77b9 | 4347 | tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) |
252b5132 RH |
4348 | { |
4349 | arelent *rel; | |
4350 | bfd_reloc_code_real_type r_type; | |
4351 | ||
4352 | rel = (arelent *) xmalloc (sizeof (arelent)); | |
49309057 ILT |
4353 | rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
4354 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
252b5132 RH |
4355 | rel->address = fixp->fx_frag->fr_address + fixp->fx_where; |
4356 | ||
4357 | r_type = fixp->fx_r_type; | |
4358 | ||
4359 | if (SWITCH_TABLE (fixp)) | |
4360 | { | |
bdfaef52 JR |
4361 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy); |
4362 | rel->addend = 0; | |
252b5132 RH |
4363 | if (r_type == BFD_RELOC_16) |
4364 | r_type = BFD_RELOC_SH_SWITCH16; | |
4365 | else if (r_type == BFD_RELOC_8) | |
4366 | r_type = BFD_RELOC_8_PCREL; | |
4367 | else if (r_type == BFD_RELOC_32) | |
4368 | r_type = BFD_RELOC_SH_SWITCH32; | |
4369 | else | |
4370 | abort (); | |
4371 | } | |
4372 | else if (r_type == BFD_RELOC_SH_USES) | |
4373 | rel->addend = fixp->fx_addnumber; | |
4374 | else if (r_type == BFD_RELOC_SH_COUNT) | |
4375 | rel->addend = fixp->fx_offset; | |
4376 | else if (r_type == BFD_RELOC_SH_ALIGN) | |
4377 | rel->addend = fixp->fx_offset; | |
4378 | else if (r_type == BFD_RELOC_VTABLE_INHERIT | |
4379 | || r_type == BFD_RELOC_VTABLE_ENTRY) | |
4380 | rel->addend = fixp->fx_offset; | |
015551fc JR |
4381 | else if (r_type == BFD_RELOC_SH_LOOP_START |
4382 | || r_type == BFD_RELOC_SH_LOOP_END) | |
4383 | rel->addend = fixp->fx_offset; | |
4384 | else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel) | |
4385 | { | |
4386 | rel->addend = 0; | |
4387 | rel->address = rel->addend = fixp->fx_offset; | |
4388 | } | |
324bfcf3 AO |
4389 | #ifdef HAVE_SH64 |
4390 | else if (shmedia_init_reloc (rel, fixp)) | |
4391 | ; | |
4392 | #endif | |
252b5132 | 4393 | else |
55e6e397 | 4394 | rel->addend = fixp->fx_addnumber; |
252b5132 RH |
4395 | |
4396 | rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); | |
78878175 | 4397 | |
a161fe53 | 4398 | if (rel->howto == NULL) |
252b5132 RH |
4399 | { |
4400 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
4401 | _("Cannot represent relocation type %s"), | |
4402 | bfd_get_reloc_code_name (r_type)); | |
4403 | /* Set howto to a garbage value so that we can keep going. */ | |
4404 | rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); | |
4405 | assert (rel->howto != NULL); | |
4406 | } | |
78878175 NC |
4407 | #ifdef OBJ_ELF |
4408 | else if (rel->howto->type == R_SH_IND12W) | |
4409 | rel->addend += fixp->fx_offset - 4; | |
4410 | #endif | |
252b5132 RH |
4411 | |
4412 | return rel; | |
4413 | } | |
4414 | ||
538cd60f AO |
4415 | #ifdef OBJ_ELF |
4416 | inline static char * | |
8edc77b9 | 4417 | sh_end_of_match (char *cont, char *what) |
538cd60f AO |
4418 | { |
4419 | int len = strlen (what); | |
4420 | ||
4421 | if (strncasecmp (cont, what, strlen (what)) == 0 | |
4422 | && ! is_part_of_name (cont[len])) | |
4423 | return cont + len; | |
4424 | ||
4425 | return NULL; | |
5d6255fe | 4426 | } |
538cd60f AO |
4427 | |
4428 | int | |
9497f5ac NC |
4429 | sh_parse_name (char const *name, |
4430 | expressionS *exprP, | |
4431 | enum expr_mode mode, | |
4432 | char *nextcharP) | |
538cd60f AO |
4433 | { |
4434 | char *next = input_line_pointer; | |
4435 | char *next_end; | |
4436 | int reloc_type; | |
4437 | segT segment; | |
4438 | ||
4439 | exprP->X_op_symbol = NULL; | |
4440 | ||
4441 | if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) | |
4442 | { | |
4443 | if (! GOT_symbol) | |
4444 | GOT_symbol = symbol_find_or_make (name); | |
4445 | ||
4446 | exprP->X_add_symbol = GOT_symbol; | |
4447 | no_suffix: | |
4448 | /* If we have an absolute symbol or a reg, then we know its | |
37dedf66 | 4449 | value now. */ |
538cd60f | 4450 | segment = S_GET_SEGMENT (exprP->X_add_symbol); |
9497f5ac | 4451 | if (mode != expr_defer && segment == absolute_section) |
538cd60f AO |
4452 | { |
4453 | exprP->X_op = O_constant; | |
4454 | exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); | |
4455 | exprP->X_add_symbol = NULL; | |
4456 | } | |
9497f5ac | 4457 | else if (mode != expr_defer && segment == reg_section) |
538cd60f AO |
4458 | { |
4459 | exprP->X_op = O_register; | |
4460 | exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); | |
4461 | exprP->X_add_symbol = NULL; | |
4462 | } | |
4463 | else | |
4464 | { | |
4465 | exprP->X_op = O_symbol; | |
4466 | exprP->X_add_number = 0; | |
4467 | } | |
4468 | ||
4469 | return 1; | |
4470 | } | |
4471 | ||
4472 | exprP->X_add_symbol = symbol_find_or_make (name); | |
5d6255fe | 4473 | |
538cd60f AO |
4474 | if (*nextcharP != '@') |
4475 | goto no_suffix; | |
4476 | else if ((next_end = sh_end_of_match (next + 1, "GOTOFF"))) | |
4477 | reloc_type = BFD_RELOC_32_GOTOFF; | |
324bfcf3 AO |
4478 | else if ((next_end = sh_end_of_match (next + 1, "GOTPLT"))) |
4479 | reloc_type = BFD_RELOC_SH_GOTPLT32; | |
538cd60f AO |
4480 | else if ((next_end = sh_end_of_match (next + 1, "GOT"))) |
4481 | reloc_type = BFD_RELOC_32_GOT_PCREL; | |
4482 | else if ((next_end = sh_end_of_match (next + 1, "PLT"))) | |
4483 | reloc_type = BFD_RELOC_32_PLT_PCREL; | |
9efb3b7b KK |
4484 | else if ((next_end = sh_end_of_match (next + 1, "TLSGD"))) |
4485 | reloc_type = BFD_RELOC_SH_TLS_GD_32; | |
4486 | else if ((next_end = sh_end_of_match (next + 1, "TLSLDM"))) | |
4487 | reloc_type = BFD_RELOC_SH_TLS_LD_32; | |
4488 | else if ((next_end = sh_end_of_match (next + 1, "GOTTPOFF"))) | |
4489 | reloc_type = BFD_RELOC_SH_TLS_IE_32; | |
4490 | else if ((next_end = sh_end_of_match (next + 1, "TPOFF"))) | |
4491 | reloc_type = BFD_RELOC_SH_TLS_LE_32; | |
4492 | else if ((next_end = sh_end_of_match (next + 1, "DTPOFF"))) | |
4493 | reloc_type = BFD_RELOC_SH_TLS_LDO_32; | |
538cd60f AO |
4494 | else |
4495 | goto no_suffix; | |
4496 | ||
4497 | *input_line_pointer = *nextcharP; | |
4498 | input_line_pointer = next_end; | |
4499 | *nextcharP = *input_line_pointer; | |
4500 | *input_line_pointer = '\0'; | |
4501 | ||
4502 | exprP->X_op = O_PIC_reloc; | |
4503 | exprP->X_add_number = 0; | |
4504 | exprP->X_md = reloc_type; | |
4505 | ||
4506 | return 1; | |
4507 | } | |
2ce4cc60 KK |
4508 | |
4509 | void | |
4510 | sh_cfi_frame_initial_instructions (void) | |
4511 | { | |
4512 | cfi_add_CFA_def_cfa (15, 0); | |
4513 | } | |
4514 | ||
4515 | int | |
1df69f4f | 4516 | sh_regname_to_dw2regnum (char *regname) |
2ce4cc60 KK |
4517 | { |
4518 | unsigned int regnum = -1; | |
4519 | unsigned int i; | |
4520 | const char *p; | |
4521 | char *q; | |
4522 | static struct { char *name; int dw2regnum; } regnames[] = | |
4523 | { | |
4524 | { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 }, | |
4525 | { "macl", 21 }, { "fpul", 23 } | |
4526 | }; | |
4527 | ||
4528 | for (i = 0; i < ARRAY_SIZE (regnames); ++i) | |
4529 | if (strcmp (regnames[i].name, regname) == 0) | |
4530 | return regnames[i].dw2regnum; | |
4531 | ||
4532 | if (regname[0] == 'r') | |
4533 | { | |
4534 | p = regname + 1; | |
4535 | regnum = strtoul (p, &q, 10); | |
4536 | if (p == q || *q || regnum >= 16) | |
4537 | return -1; | |
4538 | } | |
4539 | else if (regname[0] == 'f' && regname[1] == 'r') | |
4540 | { | |
4541 | p = regname + 2; | |
4542 | regnum = strtoul (p, &q, 10); | |
4543 | if (p == q || *q || regnum >= 16) | |
4544 | return -1; | |
4545 | regnum += 25; | |
4546 | } | |
4547 | else if (regname[0] == 'x' && regname[1] == 'd') | |
4548 | { | |
4549 | p = regname + 2; | |
4550 | regnum = strtoul (p, &q, 10); | |
4551 | if (p == q || *q || regnum >= 8) | |
4552 | return -1; | |
4553 | regnum += 87; | |
4554 | } | |
4555 | return regnum; | |
4556 | } | |
f17c130b | 4557 | #endif /* OBJ_ELF */ |