Commit | Line | Data |
---|---|---|
ef230218 | 1 | /* tc-sh.c -- Assemble code for the Renesas / SuperH SH |
6f2750fe | 2 | Copyright (C) 1993-2016 Free Software Foundation, Inc. |
252b5132 RH |
3 | |
4 | This file is part of GAS, the GNU Assembler. | |
5 | ||
6 | GAS is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 8 | the Free Software Foundation; either version 3, or (at your option) |
252b5132 RH |
9 | any later version. |
10 | ||
11 | GAS is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GAS; see the file COPYING. If not, write to | |
4b4da160 NC |
18 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
19 | Boston, MA 02110-1301, USA. */ | |
252b5132 | 20 | |
6b31947e | 21 | /* Written By Steve Chamberlain <sac@cygnus.com> */ |
252b5132 | 22 | |
252b5132 | 23 | #include "as.h" |
252b5132 RH |
24 | #include "subsegs.h" |
25 | #define DEFINE_TABLE | |
26 | #include "opcodes/sh-opc.h" | |
3882b010 | 27 | #include "safe-ctype.h" |
43841e91 | 28 | #include "struc-symbol.h" |
d4845d57 JR |
29 | |
30 | #ifdef OBJ_ELF | |
31 | #include "elf/sh.h" | |
32 | #endif | |
33 | ||
0d10e182 | 34 | #include "dwarf2dbg.h" |
2ce4cc60 | 35 | #include "dw2gencfi.h" |
0d10e182 | 36 | |
e08ae979 HPN |
37 | typedef struct |
38 | { | |
39 | sh_arg_type type; | |
40 | int reg; | |
41 | expressionS immediate; | |
42 | } | |
43 | sh_operand_info; | |
44 | ||
252b5132 RH |
45 | const char comment_chars[] = "!"; |
46 | const char line_separator_chars[] = ";"; | |
47 | const char line_comment_chars[] = "!#"; | |
48 | ||
8edc77b9 KK |
49 | static void s_uses (int); |
50 | static void s_uacons (int); | |
252b5132 | 51 | |
a1cc9221 | 52 | #ifdef OBJ_ELF |
8edc77b9 | 53 | static void sh_elf_cons (int); |
538cd60f | 54 | |
a1cc9221 AO |
55 | symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ |
56 | #endif | |
57 | ||
05982cac | 58 | static void |
8edc77b9 | 59 | big (int ignore ATTRIBUTE_UNUSED) |
05982cac HPN |
60 | { |
61 | if (! target_big_endian) | |
62 | as_bad (_("directive .big encountered when option -big required")); | |
63 | ||
64 | /* Stop further messages. */ | |
65 | target_big_endian = 1; | |
66 | } | |
252b5132 RH |
67 | |
68 | static void | |
8edc77b9 | 69 | little (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 70 | { |
05982cac HPN |
71 | if (target_big_endian) |
72 | as_bad (_("directive .little encountered when option -little required")); | |
73 | ||
74 | /* Stop further messages. */ | |
252b5132 RH |
75 | target_big_endian = 0; |
76 | } | |
77 | ||
d4845d57 JR |
78 | /* This table describes all the machine specific pseudo-ops the assembler |
79 | has to support. The fields are: | |
80 | pseudo-op name without dot | |
81 | function to call to execute this pseudo-op | |
6b31947e | 82 | Integer arg to pass to the function. */ |
d4845d57 | 83 | |
252b5132 RH |
84 | const pseudo_typeS md_pseudo_table[] = |
85 | { | |
a1cc9221 AO |
86 | #ifdef OBJ_ELF |
87 | {"long", sh_elf_cons, 4}, | |
88 | {"int", sh_elf_cons, 4}, | |
89 | {"word", sh_elf_cons, 2}, | |
90 | {"short", sh_elf_cons, 2}, | |
91 | #else | |
252b5132 RH |
92 | {"int", cons, 4}, |
93 | {"word", cons, 2}, | |
a1cc9221 | 94 | #endif /* OBJ_ELF */ |
05982cac | 95 | {"big", big, 0}, |
252b5132 RH |
96 | {"form", listing_psize, 0}, |
97 | {"little", little, 0}, | |
98 | {"heading", listing_title, 0}, | |
99 | {"import", s_ignore, 0}, | |
100 | {"page", listing_eject, 0}, | |
101 | {"program", s_ignore, 0}, | |
102 | {"uses", s_uses, 0}, | |
103 | {"uaword", s_uacons, 2}, | |
104 | {"ualong", s_uacons, 4}, | |
de68de20 AO |
105 | {"uaquad", s_uacons, 8}, |
106 | {"2byte", s_uacons, 2}, | |
107 | {"4byte", s_uacons, 4}, | |
108 | {"8byte", s_uacons, 8}, | |
324bfcf3 AO |
109 | #ifdef HAVE_SH64 |
110 | {"mode", s_sh64_mode, 0 }, | |
111 | ||
112 | /* Have the old name too. */ | |
113 | {"isa", s_sh64_mode, 0 }, | |
114 | ||
115 | /* Assert that the right ABI is used. */ | |
116 | {"abi", s_sh64_abi, 0 }, | |
117 | ||
118 | { "vtable_inherit", sh64_vtable_inherit, 0 }, | |
119 | { "vtable_entry", sh64_vtable_entry, 0 }, | |
120 | #endif /* HAVE_SH64 */ | |
252b5132 RH |
121 | {0, 0, 0} |
122 | }; | |
123 | ||
252b5132 RH |
124 | int sh_relax; /* set if -relax seen */ |
125 | ||
126 | /* Whether -small was seen. */ | |
127 | ||
128 | int sh_small; | |
129 | ||
f55629b8 KK |
130 | /* Flag to generate relocations against symbol values for local symbols. */ |
131 | ||
132 | static int dont_adjust_reloc_32; | |
133 | ||
37dedf66 NC |
134 | /* Flag to indicate that '$' is allowed as a register prefix. */ |
135 | ||
136 | static int allow_dollar_register_prefix; | |
137 | ||
138 | /* Preset architecture set, if given; zero otherwise. */ | |
d4845d57 | 139 | |
f6f9408f | 140 | static unsigned int preset_target_arch; |
d4845d57 JR |
141 | |
142 | /* The bit mask of architectures that could | |
67c1ffbe | 143 | accommodate the insns seen so far. */ |
f6f9408f | 144 | static unsigned int valid_arch; |
d4845d57 | 145 | |
87975d2a | 146 | #ifdef OBJ_ELF |
8e45593f NC |
147 | /* Whether --fdpic was given. */ |
148 | static int sh_fdpic; | |
87975d2a | 149 | #endif |
8e45593f | 150 | |
252b5132 RH |
151 | const char EXP_CHARS[] = "eE"; |
152 | ||
6b31947e | 153 | /* Chars that mean this number is a floating point constant. */ |
252b5132 RH |
154 | /* As in 0f12.456 */ |
155 | /* or 0d1.2345e12 */ | |
156 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
157 | ||
158 | #define C(a,b) ENCODE_RELAX(a,b) | |
159 | ||
252b5132 RH |
160 | #define ENCODE_RELAX(what,length) (((what) << 4) + (length)) |
161 | #define GET_WHAT(x) ((x>>4)) | |
162 | ||
67c1ffbe | 163 | /* These are the three types of relaxable instruction. */ |
324bfcf3 AO |
164 | /* These are the types of relaxable instructions; except for END which is |
165 | a marker. */ | |
252b5132 RH |
166 | #define COND_JUMP 1 |
167 | #define COND_JUMP_DELAY 2 | |
168 | #define UNCOND_JUMP 3 | |
324bfcf3 AO |
169 | |
170 | #ifdef HAVE_SH64 | |
171 | ||
172 | /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */ | |
173 | #define SH64PCREL16_32 4 | |
174 | /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */ | |
175 | #define SH64PCREL16_64 5 | |
176 | ||
177 | /* Variants of the above for adjusting the insn to PTA or PTB according to | |
178 | the label. */ | |
179 | #define SH64PCREL16PT_32 6 | |
180 | #define SH64PCREL16PT_64 7 | |
181 | ||
182 | /* A MOVI expansion, expanding to at most 32 or 64 bits. */ | |
183 | #define MOVI_IMM_32 8 | |
184 | #define MOVI_IMM_32_PCREL 9 | |
185 | #define MOVI_IMM_64 10 | |
186 | #define MOVI_IMM_64_PCREL 11 | |
187 | #define END 12 | |
188 | ||
189 | #else /* HAVE_SH64 */ | |
190 | ||
252b5132 RH |
191 | #define END 4 |
192 | ||
324bfcf3 AO |
193 | #endif /* HAVE_SH64 */ |
194 | ||
252b5132 RH |
195 | #define UNDEF_DISP 0 |
196 | #define COND8 1 | |
197 | #define COND12 2 | |
198 | #define COND32 3 | |
252b5132 RH |
199 | #define UNDEF_WORD_DISP 4 |
200 | ||
201 | #define UNCOND12 1 | |
202 | #define UNCOND32 2 | |
203 | ||
324bfcf3 AO |
204 | #ifdef HAVE_SH64 |
205 | #define UNDEF_SH64PCREL 0 | |
206 | #define SH64PCREL16 1 | |
207 | #define SH64PCREL32 2 | |
208 | #define SH64PCREL48 3 | |
209 | #define SH64PCREL64 4 | |
210 | #define SH64PCRELPLT 5 | |
211 | ||
212 | #define UNDEF_MOVI 0 | |
213 | #define MOVI_16 1 | |
214 | #define MOVI_32 2 | |
215 | #define MOVI_48 3 | |
216 | #define MOVI_64 4 | |
217 | #define MOVI_PLT 5 | |
218 | #define MOVI_GOTOFF 6 | |
219 | #define MOVI_GOTPC 7 | |
220 | #endif /* HAVE_SH64 */ | |
221 | ||
252b5132 RH |
222 | /* Branch displacements are from the address of the branch plus |
223 | four, thus all minimum and maximum values have 4 added to them. */ | |
224 | #define COND8_F 258 | |
225 | #define COND8_M -252 | |
226 | #define COND8_LENGTH 2 | |
227 | ||
228 | /* There is one extra instruction before the branch, so we must add | |
229 | two more bytes to account for it. */ | |
230 | #define COND12_F 4100 | |
231 | #define COND12_M -4090 | |
232 | #define COND12_LENGTH 6 | |
233 | ||
234 | #define COND12_DELAY_LENGTH 4 | |
235 | ||
236 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
237 | since this relocation type is not supported yet. */ | |
238 | #define COND32_F (1<<30) | |
239 | #define COND32_M -(1<<30) | |
240 | #define COND32_LENGTH 14 | |
241 | ||
242 | #define UNCOND12_F 4098 | |
243 | #define UNCOND12_M -4092 | |
244 | #define UNCOND12_LENGTH 2 | |
245 | ||
246 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
247 | since this relocation type is not supported yet. */ | |
248 | #define UNCOND32_F (1<<30) | |
249 | #define UNCOND32_M -(1<<30) | |
250 | #define UNCOND32_LENGTH 14 | |
251 | ||
324bfcf3 AO |
252 | #ifdef HAVE_SH64 |
253 | /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label, | |
254 | TRd" as is the current insn, so no extra length. Note that the "reach" | |
255 | is calculated from the address *after* that insn, but the offset in the | |
256 | insn is calculated from the beginning of the insn. We also need to | |
257 | take into account the implicit 1 coded as the "A" in PTA when counting | |
258 | forward. If PTB reaches an odd address, we trap that as an error | |
259 | elsewhere, so we don't have to have different relaxation entries. We | |
260 | don't add a one to the negative range, since PTB would then have the | |
261 | farthest backward-reaching value skipped, not generated at relaxation. */ | |
262 | #define SH64PCREL16_F (32767 * 4 - 4 + 1) | |
263 | #define SH64PCREL16_M (-32768 * 4 - 4) | |
264 | #define SH64PCREL16_LENGTH 0 | |
265 | ||
266 | /* The next step is to change that PT insn into | |
267 | MOVI ((label - datalabel Ln) >> 16) & 65535, R25 | |
268 | SHORI (label - datalabel Ln) & 65535, R25 | |
269 | Ln: | |
270 | PTREL R25,TRd | |
271 | which means two extra insns, 8 extra bytes. This is the limit for the | |
272 | 32-bit ABI. | |
273 | ||
274 | The expressions look a bit bad since we have to adjust this to avoid overflow on a | |
275 | 32-bit host. */ | |
276 | #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4) | |
277 | #define SH64PCREL32_LENGTH (2 * 4) | |
278 | ||
279 | /* Similarly, we just change the MOVI and add a SHORI for the 48-bit | |
280 | expansion. */ | |
281 | #if BFD_HOST_64BIT_LONG | |
282 | /* The "reach" type is long, so we can only do this for a 64-bit-long | |
283 | host. */ | |
8d3842cd | 284 | #define SH64PCREL32_M ((-((long) 1 << 30)) * 2 - 4) |
324bfcf3 | 285 | #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4) |
8d3842cd | 286 | #define SH64PCREL48_M ((-((long) 1 << 47)) - 4) |
324bfcf3 AO |
287 | #define SH64PCREL48_LENGTH (3 * 4) |
288 | #else | |
289 | /* If the host does not have 64-bit longs, just make this state identical | |
290 | in reach to the 32-bit state. Note that we have a slightly incorrect | |
291 | reach, but the correct one above will overflow a 32-bit number. */ | |
8d3842cd | 292 | #define SH64PCREL32_M ((-((long) 1 << 30)) * 2) |
324bfcf3 AO |
293 | #define SH64PCREL48_F SH64PCREL32_F |
294 | #define SH64PCREL48_M SH64PCREL32_M | |
295 | #define SH64PCREL48_LENGTH (3 * 4) | |
296 | #endif /* BFD_HOST_64BIT_LONG */ | |
297 | ||
298 | /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI | |
299 | + PTREL sequence. */ | |
300 | #define SH64PCREL64_LENGTH (4 * 4) | |
301 | ||
302 | /* For MOVI, we make the MOVI + SHORI... expansion you can see in the | |
303 | SH64PCREL expansions. The PCREL one is similar, but the other has no | |
304 | pc-relative reach; it must be fully expanded in | |
305 | shmedia_md_estimate_size_before_relax. */ | |
306 | #define MOVI_16_LENGTH 0 | |
307 | #define MOVI_16_F (32767 - 4) | |
308 | #define MOVI_16_M (-32768 - 4) | |
309 | #define MOVI_32_LENGTH 4 | |
310 | #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4) | |
311 | #define MOVI_48_LENGTH 8 | |
312 | ||
313 | #if BFD_HOST_64BIT_LONG | |
314 | /* The "reach" type is long, so we can only do this for a 64-bit-long | |
315 | host. */ | |
8d3842cd | 316 | #define MOVI_32_M ((-((long) 1 << 30)) * 2 - 4) |
324bfcf3 | 317 | #define MOVI_48_F ((((long) 1 << 47) - 1) - 4) |
8d3842cd | 318 | #define MOVI_48_M ((-((long) 1 << 47)) - 4) |
324bfcf3 AO |
319 | #else |
320 | /* If the host does not have 64-bit longs, just make this state identical | |
321 | in reach to the 32-bit state. Note that we have a slightly incorrect | |
322 | reach, but the correct one above will overflow a 32-bit number. */ | |
8d3842cd | 323 | #define MOVI_32_M ((-((long) 1 << 30)) * 2) |
324bfcf3 AO |
324 | #define MOVI_48_F MOVI_32_F |
325 | #define MOVI_48_M MOVI_32_M | |
326 | #endif /* BFD_HOST_64BIT_LONG */ | |
327 | ||
328 | #define MOVI_64_LENGTH 12 | |
329 | #endif /* HAVE_SH64 */ | |
330 | ||
43841e91 NC |
331 | #define EMPTY { 0, 0, 0, 0 } |
332 | ||
252b5132 | 333 | const relax_typeS md_relax_table[C (END, 0)] = { |
43841e91 NC |
334 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
335 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
252b5132 | 336 | |
43841e91 | 337 | EMPTY, |
252b5132 RH |
338 | /* C (COND_JUMP, COND8) */ |
339 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, | |
340 | /* C (COND_JUMP, COND12) */ | |
341 | { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, | |
342 | /* C (COND_JUMP, COND32) */ | |
343 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
e66457fb AM |
344 | /* C (COND_JUMP, UNDEF_WORD_DISP) */ |
345 | { 0, 0, COND32_LENGTH, 0, }, | |
346 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 347 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 | 348 | |
43841e91 | 349 | EMPTY, |
252b5132 RH |
350 | /* C (COND_JUMP_DELAY, COND8) */ |
351 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, | |
352 | /* C (COND_JUMP_DELAY, COND12) */ | |
353 | { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, | |
354 | /* C (COND_JUMP_DELAY, COND32) */ | |
355 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
e66457fb AM |
356 | /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */ |
357 | { 0, 0, COND32_LENGTH, 0, }, | |
358 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 359 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 | 360 | |
43841e91 | 361 | EMPTY, |
252b5132 RH |
362 | /* C (UNCOND_JUMP, UNCOND12) */ |
363 | { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, | |
364 | /* C (UNCOND_JUMP, UNCOND32) */ | |
365 | { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, | |
e66457fb AM |
366 | EMPTY, |
367 | /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */ | |
368 | { 0, 0, UNCOND32_LENGTH, 0, }, | |
369 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 370 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
324bfcf3 AO |
371 | |
372 | #ifdef HAVE_SH64 | |
373 | /* C (SH64PCREL16_32, SH64PCREL16) */ | |
374 | EMPTY, | |
375 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_32, SH64PCREL32) }, | |
376 | /* C (SH64PCREL16_32, SH64PCREL32) */ | |
377 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
378 | EMPTY, EMPTY, | |
379 | /* C (SH64PCREL16_32, SH64PCRELPLT) */ | |
380 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
381 | EMPTY, EMPTY, | |
382 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
383 | ||
384 | /* C (SH64PCREL16_64, SH64PCREL16) */ | |
385 | EMPTY, | |
386 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_64, SH64PCREL32) }, | |
387 | /* C (SH64PCREL16_64, SH64PCREL32) */ | |
388 | { SH64PCREL32_F, SH64PCREL32_M, SH64PCREL32_LENGTH, C (SH64PCREL16_64, SH64PCREL48) }, | |
389 | /* C (SH64PCREL16_64, SH64PCREL48) */ | |
390 | { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16_64, SH64PCREL64) }, | |
391 | /* C (SH64PCREL16_64, SH64PCREL64) */ | |
392 | { 0, 0, SH64PCREL64_LENGTH, 0 }, | |
393 | /* C (SH64PCREL16_64, SH64PCRELPLT) */ | |
394 | { 0, 0, SH64PCREL64_LENGTH, 0 }, | |
395 | EMPTY, EMPTY, | |
396 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
397 | ||
398 | /* C (SH64PCREL16PT_32, SH64PCREL16) */ | |
399 | EMPTY, | |
400 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_32, SH64PCREL32) }, | |
401 | /* C (SH64PCREL16PT_32, SH64PCREL32) */ | |
402 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
403 | EMPTY, EMPTY, | |
404 | /* C (SH64PCREL16PT_32, SH64PCRELPLT) */ | |
405 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
406 | EMPTY, EMPTY, | |
407 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
408 | ||
409 | /* C (SH64PCREL16PT_64, SH64PCREL16) */ | |
410 | EMPTY, | |
411 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_64, SH64PCREL32) }, | |
412 | /* C (SH64PCREL16PT_64, SH64PCREL32) */ | |
413 | { SH64PCREL32_F, | |
5d6255fe | 414 | SH64PCREL32_M, |
324bfcf3 AO |
415 | SH64PCREL32_LENGTH, |
416 | C (SH64PCREL16PT_64, SH64PCREL48) }, | |
417 | /* C (SH64PCREL16PT_64, SH64PCREL48) */ | |
418 | { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16PT_64, SH64PCREL64) }, | |
419 | /* C (SH64PCREL16PT_64, SH64PCREL64) */ | |
420 | { 0, 0, SH64PCREL64_LENGTH, 0 }, | |
421 | /* C (SH64PCREL16PT_64, SH64PCRELPLT) */ | |
422 | { 0, 0, SH64PCREL64_LENGTH, 0}, | |
423 | EMPTY, EMPTY, | |
424 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
425 | ||
426 | /* C (MOVI_IMM_32, UNDEF_MOVI) */ | |
427 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
428 | /* C (MOVI_IMM_32, MOVI_16) */ | |
429 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32, MOVI_32) }, | |
430 | /* C (MOVI_IMM_32, MOVI_32) */ | |
431 | { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, 0 }, | |
432 | EMPTY, EMPTY, EMPTY, | |
433 | /* C (MOVI_IMM_32, MOVI_GOTOFF) */ | |
434 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
435 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
436 | ||
437 | /* C (MOVI_IMM_32_PCREL, MOVI_16) */ | |
438 | EMPTY, | |
439 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32_PCREL, MOVI_32) }, | |
440 | /* C (MOVI_IMM_32_PCREL, MOVI_32) */ | |
441 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
442 | EMPTY, EMPTY, | |
443 | /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */ | |
444 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
445 | EMPTY, | |
446 | /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */ | |
447 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
448 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
449 | ||
450 | /* C (MOVI_IMM_64, UNDEF_MOVI) */ | |
451 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
452 | /* C (MOVI_IMM_64, MOVI_16) */ | |
453 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64, MOVI_32) }, | |
454 | /* C (MOVI_IMM_64, MOVI_32) */ | |
455 | { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64, MOVI_48) }, | |
456 | /* C (MOVI_IMM_64, MOVI_48) */ | |
457 | { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64, MOVI_64) }, | |
458 | /* C (MOVI_IMM_64, MOVI_64) */ | |
459 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
460 | EMPTY, | |
461 | /* C (MOVI_IMM_64, MOVI_GOTOFF) */ | |
462 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
463 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
464 | ||
465 | /* C (MOVI_IMM_64_PCREL, MOVI_16) */ | |
466 | EMPTY, | |
467 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_32) }, | |
468 | /* C (MOVI_IMM_64_PCREL, MOVI_32) */ | |
469 | { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_48) }, | |
470 | /* C (MOVI_IMM_64_PCREL, MOVI_48) */ | |
471 | { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_64) }, | |
472 | /* C (MOVI_IMM_64_PCREL, MOVI_64) */ | |
473 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
474 | /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */ | |
475 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
476 | EMPTY, | |
477 | /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */ | |
478 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
479 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
480 | ||
481 | #endif /* HAVE_SH64 */ | |
482 | ||
252b5132 RH |
483 | }; |
484 | ||
43841e91 NC |
485 | #undef EMPTY |
486 | ||
252b5132 RH |
487 | static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ |
488 | ||
a1cc9221 AO |
489 | \f |
490 | #ifdef OBJ_ELF | |
538cd60f AO |
491 | /* Determinet whether the symbol needs any kind of PIC relocation. */ |
492 | ||
493 | inline static int | |
8edc77b9 | 494 | sh_PIC_related_p (symbolS *sym) |
a1cc9221 | 495 | { |
538cd60f | 496 | expressionS *exp; |
a1cc9221 | 497 | |
538cd60f AO |
498 | if (! sym) |
499 | return 0; | |
500 | ||
501 | if (sym == GOT_symbol) | |
502 | return 1; | |
503 | ||
324bfcf3 AO |
504 | #ifdef HAVE_SH64 |
505 | if (sh_PIC_related_p (*symbol_get_tc (sym))) | |
506 | return 1; | |
507 | #endif | |
508 | ||
538cd60f AO |
509 | exp = symbol_get_value_expression (sym); |
510 | ||
511 | return (exp->X_op == O_PIC_reloc | |
512 | || sh_PIC_related_p (exp->X_add_symbol) | |
513 | || sh_PIC_related_p (exp->X_op_symbol)); | |
514 | } | |
515 | ||
516 | /* Determine the relocation type to be used to represent the | |
517 | expression, that may be rearranged. */ | |
518 | ||
519 | static int | |
8edc77b9 | 520 | sh_check_fixup (expressionS *main_exp, bfd_reloc_code_real_type *r_type_p) |
538cd60f AO |
521 | { |
522 | expressionS *exp = main_exp; | |
523 | ||
524 | /* This is here for backward-compatibility only. GCC used to generated: | |
525 | ||
526 | f@PLT + . - (.LPCS# + 2) | |
527 | ||
528 | but we'd rather be able to handle this as a PIC-related reference | |
529 | plus/minus a symbol. However, gas' parser gives us: | |
530 | ||
531 | O_subtract (O_add (f@PLT, .), .LPCS#+2) | |
5d6255fe | 532 | |
538cd60f AO |
533 | so we attempt to transform this into: |
534 | ||
535 | O_subtract (f@PLT, O_subtract (.LPCS#+2, .)) | |
536 | ||
5d6255fe | 537 | which we can handle simply below. */ |
538cd60f AO |
538 | if (exp->X_op == O_subtract) |
539 | { | |
540 | if (sh_PIC_related_p (exp->X_op_symbol)) | |
541 | return 1; | |
542 | ||
543 | exp = symbol_get_value_expression (exp->X_add_symbol); | |
544 | ||
545 | if (exp && sh_PIC_related_p (exp->X_op_symbol)) | |
546 | return 1; | |
547 | ||
548 | if (exp && exp->X_op == O_add | |
549 | && sh_PIC_related_p (exp->X_add_symbol)) | |
550 | { | |
551 | symbolS *sym = exp->X_add_symbol; | |
552 | ||
553 | exp->X_op = O_subtract; | |
554 | exp->X_add_symbol = main_exp->X_op_symbol; | |
555 | ||
556 | main_exp->X_op_symbol = main_exp->X_add_symbol; | |
557 | main_exp->X_add_symbol = sym; | |
558 | ||
559 | main_exp->X_add_number += exp->X_add_number; | |
560 | exp->X_add_number = 0; | |
561 | } | |
562 | ||
563 | exp = main_exp; | |
564 | } | |
565 | else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol)) | |
566 | return 1; | |
567 | ||
568 | if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract) | |
569 | { | |
324bfcf3 AO |
570 | #ifdef HAVE_SH64 |
571 | if (exp->X_add_symbol | |
572 | && (exp->X_add_symbol == GOT_symbol | |
573 | || (GOT_symbol | |
574 | && *symbol_get_tc (exp->X_add_symbol) == GOT_symbol))) | |
575 | { | |
576 | switch (*r_type_p) | |
577 | { | |
578 | case BFD_RELOC_SH_IMM_LOW16: | |
579 | *r_type_p = BFD_RELOC_SH_GOTPC_LOW16; | |
580 | break; | |
581 | ||
582 | case BFD_RELOC_SH_IMM_MEDLOW16: | |
583 | *r_type_p = BFD_RELOC_SH_GOTPC_MEDLOW16; | |
584 | break; | |
585 | ||
586 | case BFD_RELOC_SH_IMM_MEDHI16: | |
587 | *r_type_p = BFD_RELOC_SH_GOTPC_MEDHI16; | |
588 | break; | |
589 | ||
590 | case BFD_RELOC_SH_IMM_HI16: | |
591 | *r_type_p = BFD_RELOC_SH_GOTPC_HI16; | |
592 | break; | |
593 | ||
594 | case BFD_RELOC_NONE: | |
595 | case BFD_RELOC_UNUSED: | |
596 | *r_type_p = BFD_RELOC_SH_GOTPC; | |
597 | break; | |
5d6255fe | 598 | |
324bfcf3 AO |
599 | default: |
600 | abort (); | |
601 | } | |
602 | return 0; | |
603 | } | |
604 | #else | |
538cd60f AO |
605 | if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) |
606 | { | |
607 | *r_type_p = BFD_RELOC_SH_GOTPC; | |
608 | return 0; | |
609 | } | |
324bfcf3 | 610 | #endif |
538cd60f AO |
611 | exp = symbol_get_value_expression (exp->X_add_symbol); |
612 | if (! exp) | |
613 | return 0; | |
614 | } | |
615 | ||
616 | if (exp->X_op == O_PIC_reloc) | |
617 | { | |
324bfcf3 AO |
618 | switch (*r_type_p) |
619 | { | |
620 | case BFD_RELOC_NONE: | |
621 | case BFD_RELOC_UNUSED: | |
622 | *r_type_p = exp->X_md; | |
623 | break; | |
624 | ||
8e45593f NC |
625 | case BFD_RELOC_SH_DISP20: |
626 | switch (exp->X_md) | |
627 | { | |
628 | case BFD_RELOC_32_GOT_PCREL: | |
629 | *r_type_p = BFD_RELOC_SH_GOT20; | |
630 | break; | |
631 | ||
632 | case BFD_RELOC_32_GOTOFF: | |
633 | *r_type_p = BFD_RELOC_SH_GOTOFF20; | |
634 | break; | |
635 | ||
636 | case BFD_RELOC_SH_GOTFUNCDESC: | |
637 | *r_type_p = BFD_RELOC_SH_GOTFUNCDESC20; | |
638 | break; | |
639 | ||
640 | case BFD_RELOC_SH_GOTOFFFUNCDESC: | |
641 | *r_type_p = BFD_RELOC_SH_GOTOFFFUNCDESC20; | |
642 | break; | |
643 | ||
644 | default: | |
645 | abort (); | |
646 | } | |
647 | break; | |
648 | ||
649 | #ifdef HAVE_SH64 | |
324bfcf3 AO |
650 | case BFD_RELOC_SH_IMM_LOW16: |
651 | switch (exp->X_md) | |
652 | { | |
653 | case BFD_RELOC_32_GOTOFF: | |
654 | *r_type_p = BFD_RELOC_SH_GOTOFF_LOW16; | |
655 | break; | |
5d6255fe | 656 | |
324bfcf3 AO |
657 | case BFD_RELOC_SH_GOTPLT32: |
658 | *r_type_p = BFD_RELOC_SH_GOTPLT_LOW16; | |
659 | break; | |
5d6255fe | 660 | |
324bfcf3 AO |
661 | case BFD_RELOC_32_GOT_PCREL: |
662 | *r_type_p = BFD_RELOC_SH_GOT_LOW16; | |
663 | break; | |
5d6255fe | 664 | |
324bfcf3 AO |
665 | case BFD_RELOC_32_PLT_PCREL: |
666 | *r_type_p = BFD_RELOC_SH_PLT_LOW16; | |
667 | break; | |
668 | ||
669 | default: | |
670 | abort (); | |
671 | } | |
672 | break; | |
673 | ||
674 | case BFD_RELOC_SH_IMM_MEDLOW16: | |
675 | switch (exp->X_md) | |
676 | { | |
677 | case BFD_RELOC_32_GOTOFF: | |
678 | *r_type_p = BFD_RELOC_SH_GOTOFF_MEDLOW16; | |
679 | break; | |
5d6255fe | 680 | |
324bfcf3 AO |
681 | case BFD_RELOC_SH_GOTPLT32: |
682 | *r_type_p = BFD_RELOC_SH_GOTPLT_MEDLOW16; | |
683 | break; | |
5d6255fe | 684 | |
324bfcf3 AO |
685 | case BFD_RELOC_32_GOT_PCREL: |
686 | *r_type_p = BFD_RELOC_SH_GOT_MEDLOW16; | |
687 | break; | |
5d6255fe | 688 | |
324bfcf3 AO |
689 | case BFD_RELOC_32_PLT_PCREL: |
690 | *r_type_p = BFD_RELOC_SH_PLT_MEDLOW16; | |
691 | break; | |
692 | ||
693 | default: | |
694 | abort (); | |
695 | } | |
696 | break; | |
697 | ||
698 | case BFD_RELOC_SH_IMM_MEDHI16: | |
699 | switch (exp->X_md) | |
700 | { | |
701 | case BFD_RELOC_32_GOTOFF: | |
702 | *r_type_p = BFD_RELOC_SH_GOTOFF_MEDHI16; | |
703 | break; | |
5d6255fe | 704 | |
324bfcf3 AO |
705 | case BFD_RELOC_SH_GOTPLT32: |
706 | *r_type_p = BFD_RELOC_SH_GOTPLT_MEDHI16; | |
707 | break; | |
5d6255fe | 708 | |
324bfcf3 AO |
709 | case BFD_RELOC_32_GOT_PCREL: |
710 | *r_type_p = BFD_RELOC_SH_GOT_MEDHI16; | |
711 | break; | |
5d6255fe | 712 | |
324bfcf3 AO |
713 | case BFD_RELOC_32_PLT_PCREL: |
714 | *r_type_p = BFD_RELOC_SH_PLT_MEDHI16; | |
715 | break; | |
716 | ||
717 | default: | |
718 | abort (); | |
719 | } | |
720 | break; | |
721 | ||
722 | case BFD_RELOC_SH_IMM_HI16: | |
723 | switch (exp->X_md) | |
724 | { | |
725 | case BFD_RELOC_32_GOTOFF: | |
726 | *r_type_p = BFD_RELOC_SH_GOTOFF_HI16; | |
727 | break; | |
5d6255fe | 728 | |
324bfcf3 AO |
729 | case BFD_RELOC_SH_GOTPLT32: |
730 | *r_type_p = BFD_RELOC_SH_GOTPLT_HI16; | |
731 | break; | |
5d6255fe | 732 | |
324bfcf3 AO |
733 | case BFD_RELOC_32_GOT_PCREL: |
734 | *r_type_p = BFD_RELOC_SH_GOT_HI16; | |
735 | break; | |
5d6255fe | 736 | |
324bfcf3 AO |
737 | case BFD_RELOC_32_PLT_PCREL: |
738 | *r_type_p = BFD_RELOC_SH_PLT_HI16; | |
739 | break; | |
740 | ||
741 | default: | |
742 | abort (); | |
743 | } | |
744 | break; | |
8e45593f | 745 | #endif |
324bfcf3 AO |
746 | |
747 | default: | |
748 | abort (); | |
749 | } | |
538cd60f AO |
750 | if (exp == main_exp) |
751 | exp->X_op = O_symbol; | |
752 | else | |
753 | { | |
754 | main_exp->X_add_symbol = exp->X_add_symbol; | |
755 | main_exp->X_add_number += exp->X_add_number; | |
756 | } | |
757 | } | |
758 | else | |
759 | return (sh_PIC_related_p (exp->X_add_symbol) | |
760 | || sh_PIC_related_p (exp->X_op_symbol)); | |
761 | ||
762 | return 0; | |
763 | } | |
764 | ||
765 | /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */ | |
766 | ||
767 | void | |
62ebcb5c AM |
768 | sh_cons_fix_new (fragS *frag, int off, int size, expressionS *exp, |
769 | bfd_reloc_code_real_type r_type) | |
538cd60f | 770 | { |
62ebcb5c | 771 | r_type = BFD_RELOC_UNUSED; |
538cd60f AO |
772 | |
773 | if (sh_check_fixup (exp, &r_type)) | |
774 | as_bad (_("Invalid PIC expression.")); | |
775 | ||
776 | if (r_type == BFD_RELOC_UNUSED) | |
777 | switch (size) | |
a1cc9221 | 778 | { |
538cd60f AO |
779 | case 1: |
780 | r_type = BFD_RELOC_8; | |
781 | break; | |
a1cc9221 | 782 | |
538cd60f AO |
783 | case 2: |
784 | r_type = BFD_RELOC_16; | |
785 | break; | |
786 | ||
787 | case 4: | |
788 | r_type = BFD_RELOC_32; | |
789 | break; | |
a1cc9221 | 790 | |
324bfcf3 AO |
791 | case 8: |
792 | r_type = BFD_RELOC_64; | |
793 | break; | |
324bfcf3 | 794 | |
538cd60f AO |
795 | default: |
796 | goto error; | |
797 | } | |
798 | else if (size != 4) | |
799 | { | |
800 | error: | |
801 | as_bad (_("unsupported BFD relocation size %u"), size); | |
802 | r_type = BFD_RELOC_UNUSED; | |
803 | } | |
5d6255fe | 804 | |
538cd60f | 805 | fix_new_exp (frag, off, size, exp, 0, r_type); |
a1cc9221 AO |
806 | } |
807 | ||
808 | /* The regular cons() function, that reads constants, doesn't support | |
809 | suffixes such as @GOT, @GOTOFF and @PLT, that generate | |
810 | machine-specific relocation types. So we must define it here. */ | |
811 | /* Clobbers input_line_pointer, checks end-of-line. */ | |
8edc77b9 | 812 | /* NBYTES 1=.byte, 2=.word, 4=.long */ |
a1cc9221 | 813 | static void |
ed9e98c2 | 814 | sh_elf_cons (int nbytes) |
a1cc9221 | 815 | { |
538cd60f | 816 | expressionS exp; |
a1cc9221 | 817 | |
324bfcf3 AO |
818 | #ifdef HAVE_SH64 |
819 | ||
820 | /* Update existing range to include a previous insn, if there was one. */ | |
b34976b6 | 821 | sh64_update_contents_mark (TRUE); |
324bfcf3 AO |
822 | |
823 | /* We need to make sure the contents type is set to data. */ | |
824 | sh64_flag_output (); | |
825 | ||
826 | #endif /* HAVE_SH64 */ | |
827 | ||
a1cc9221 AO |
828 | if (is_it_end_of_statement ()) |
829 | { | |
830 | demand_empty_rest_of_line (); | |
831 | return; | |
832 | } | |
833 | ||
028f09bd NC |
834 | #ifdef md_cons_align |
835 | md_cons_align (nbytes); | |
836 | #endif | |
837 | ||
a1cc9221 AO |
838 | do |
839 | { | |
840 | expression (&exp); | |
538cd60f | 841 | emit_expr (&exp, (unsigned int) nbytes); |
a1cc9221 AO |
842 | } |
843 | while (*input_line_pointer++ == ','); | |
844 | ||
81d4177b | 845 | input_line_pointer--; /* Put terminator back into stream. */ |
a1cc9221 AO |
846 | if (*input_line_pointer == '#' || *input_line_pointer == '!') |
847 | { | |
dda5ecfc | 848 | while (! is_end_of_line[(unsigned char) *input_line_pointer++]); |
a1cc9221 AO |
849 | } |
850 | else | |
851 | demand_empty_rest_of_line (); | |
852 | } | |
0cc34095 KK |
853 | |
854 | /* The regular frag_offset_fixed_p doesn't work for rs_align_test | |
855 | frags. */ | |
856 | ||
857 | static bfd_boolean | |
858 | align_test_frag_offset_fixed_p (const fragS *frag1, const fragS *frag2, | |
859 | bfd_vma *offset) | |
860 | { | |
861 | const fragS *frag; | |
862 | bfd_vma off; | |
863 | ||
864 | /* Start with offset initialised to difference between the two frags. | |
865 | Prior to assigning frag addresses this will be zero. */ | |
866 | off = frag1->fr_address - frag2->fr_address; | |
867 | if (frag1 == frag2) | |
868 | { | |
869 | *offset = off; | |
870 | return TRUE; | |
871 | } | |
872 | ||
873 | /* Maybe frag2 is after frag1. */ | |
874 | frag = frag1; | |
0838d2ac KK |
875 | while (frag->fr_type == rs_fill |
876 | || frag->fr_type == rs_align_test) | |
0cc34095 | 877 | { |
0838d2ac KK |
878 | if (frag->fr_type == rs_fill) |
879 | off += frag->fr_fix + frag->fr_offset * frag->fr_var; | |
880 | else | |
881 | off += frag->fr_fix; | |
0cc34095 KK |
882 | frag = frag->fr_next; |
883 | if (frag == NULL) | |
884 | break; | |
885 | if (frag == frag2) | |
886 | { | |
887 | *offset = off; | |
888 | return TRUE; | |
889 | } | |
890 | } | |
891 | ||
892 | /* Maybe frag1 is after frag2. */ | |
893 | off = frag1->fr_address - frag2->fr_address; | |
894 | frag = frag2; | |
0838d2ac KK |
895 | while (frag->fr_type == rs_fill |
896 | || frag->fr_type == rs_align_test) | |
0cc34095 | 897 | { |
0838d2ac KK |
898 | if (frag->fr_type == rs_fill) |
899 | off -= frag->fr_fix + frag->fr_offset * frag->fr_var; | |
900 | else | |
901 | off -= frag->fr_fix; | |
0cc34095 KK |
902 | frag = frag->fr_next; |
903 | if (frag == NULL) | |
904 | break; | |
905 | if (frag == frag1) | |
906 | { | |
907 | *offset = off; | |
908 | return TRUE; | |
909 | } | |
910 | } | |
911 | ||
912 | return FALSE; | |
913 | } | |
a1cc9221 | 914 | |
0cc34095 KK |
915 | /* Optimize a difference of symbols which have rs_align_test frag if |
916 | possible. */ | |
917 | ||
918 | int | |
919 | sh_optimize_expr (expressionS *l, operatorT op, expressionS *r) | |
920 | { | |
0cc34095 KK |
921 | bfd_vma frag_off; |
922 | ||
923 | if (op == O_subtract | |
924 | && l->X_op == O_symbol | |
925 | && r->X_op == O_symbol | |
926 | && S_GET_SEGMENT (l->X_add_symbol) == S_GET_SEGMENT (r->X_add_symbol) | |
927 | && (SEG_NORMAL (S_GET_SEGMENT (l->X_add_symbol)) | |
928 | || r->X_add_symbol == l->X_add_symbol) | |
929 | && align_test_frag_offset_fixed_p (symbol_get_frag (l->X_add_symbol), | |
930 | symbol_get_frag (r->X_add_symbol), | |
931 | &frag_off)) | |
932 | { | |
4455e9ad JB |
933 | offsetT symval_diff = S_GET_VALUE (l->X_add_symbol) |
934 | - S_GET_VALUE (r->X_add_symbol); | |
935 | subtract_from_result (l, r->X_add_number, r->X_extrabit); | |
936 | subtract_from_result (l, frag_off / OCTETS_PER_BYTE, 0); | |
937 | add_to_result (l, symval_diff, symval_diff < 0); | |
0cc34095 KK |
938 | l->X_op = O_constant; |
939 | l->X_add_symbol = 0; | |
940 | return 1; | |
941 | } | |
0cc34095 KK |
942 | return 0; |
943 | } | |
541d2ffd | 944 | #endif /* OBJ_ELF */ |
a1cc9221 | 945 | \f |
6b31947e NC |
946 | /* This function is called once, at assembler startup time. This should |
947 | set up all the tables, etc that the MD part of the assembler needs. */ | |
252b5132 RH |
948 | |
949 | void | |
8edc77b9 | 950 | md_begin (void) |
252b5132 | 951 | { |
5ff37431 | 952 | const sh_opcode_info *opcode; |
252b5132 | 953 | char *prev_name = ""; |
f6f9408f | 954 | unsigned int target_arch; |
252b5132 | 955 | |
bdfaef52 | 956 | target_arch |
e38bc3b5 | 957 | = preset_target_arch ? preset_target_arch : arch_sh_up & ~arch_sh_has_dsp; |
d4845d57 JR |
958 | valid_arch = target_arch; |
959 | ||
324bfcf3 AO |
960 | #ifdef HAVE_SH64 |
961 | shmedia_md_begin (); | |
962 | #endif | |
963 | ||
252b5132 RH |
964 | opcode_hash_control = hash_new (); |
965 | ||
6b31947e | 966 | /* Insert unique names into hash table. */ |
252b5132 RH |
967 | for (opcode = sh_table; opcode->name; opcode++) |
968 | { | |
5ff37431 | 969 | if (strcmp (prev_name, opcode->name) != 0) |
252b5132 | 970 | { |
f6f9408f | 971 | if (!SH_MERGE_ARCH_SET_VALID (opcode->arch, target_arch)) |
a37c8f88 | 972 | continue; |
252b5132 RH |
973 | prev_name = opcode->name; |
974 | hash_insert (opcode_hash_control, opcode->name, (char *) opcode); | |
975 | } | |
252b5132 RH |
976 | } |
977 | } | |
978 | ||
979 | static int reg_m; | |
980 | static int reg_n; | |
d4845d57 JR |
981 | static int reg_x, reg_y; |
982 | static int reg_efg; | |
252b5132 RH |
983 | static int reg_b; |
984 | ||
3882b010 | 985 | #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_') |
dead1419 | 986 | |
6b31947e NC |
987 | /* Try to parse a reg name. Return the number of chars consumed. */ |
988 | ||
37dedf66 NC |
989 | static unsigned int |
990 | parse_reg_without_prefix (char *src, int *mode, int *reg) | |
252b5132 | 991 | { |
3882b010 L |
992 | char l0 = TOLOWER (src[0]); |
993 | char l1 = l0 ? TOLOWER (src[1]) : 0; | |
e46fee70 | 994 | |
dead1419 | 995 | /* We use ! IDENT_CHAR for the next character after the register name, to |
252b5132 | 996 | make sure that we won't accidentally recognize a symbol name such as |
dead1419 | 997 | 'sram' or sr_ram as being a reference to the register 'sr'. */ |
252b5132 | 998 | |
e46fee70 | 999 | if (l0 == 'r') |
252b5132 | 1000 | { |
e46fee70 | 1001 | if (l1 == '1') |
d4845d57 JR |
1002 | { |
1003 | if (src[2] >= '0' && src[2] <= '5' | |
dead1419 | 1004 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
1005 | { |
1006 | *mode = A_REG_N; | |
1007 | *reg = 10 + src[2] - '0'; | |
1008 | return 3; | |
1009 | } | |
1010 | } | |
e46fee70 | 1011 | if (l1 >= '0' && l1 <= '9' |
dead1419 | 1012 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1013 | { |
1014 | *mode = A_REG_N; | |
e46fee70 | 1015 | *reg = (l1 - '0'); |
d4845d57 JR |
1016 | return 2; |
1017 | } | |
e46fee70 | 1018 | if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0 |
dead1419 JR |
1019 | && ! IDENT_CHAR ((unsigned char) src[7])) |
1020 | { | |
1021 | *mode = A_REG_B; | |
e46fee70 | 1022 | *reg = (l1 - '0'); |
dead1419 JR |
1023 | return 7; |
1024 | } | |
d4845d57 | 1025 | |
e46fee70 | 1026 | if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1027 | { |
1028 | *mode = A_RE; | |
1029 | return 2; | |
1030 | } | |
e46fee70 | 1031 | if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1032 | { |
1033 | *mode = A_RS; | |
1034 | return 2; | |
1035 | } | |
252b5132 RH |
1036 | } |
1037 | ||
e46fee70 | 1038 | if (l0 == 'a') |
252b5132 | 1039 | { |
e46fee70 | 1040 | if (l1 == '0') |
d4845d57 | 1041 | { |
dead1419 | 1042 | if (! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1043 | { |
1044 | *mode = DSP_REG_N; | |
1045 | *reg = A_A0_NUM; | |
1046 | return 2; | |
1047 | } | |
3882b010 | 1048 | if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
1049 | { |
1050 | *mode = DSP_REG_N; | |
1051 | *reg = A_A0G_NUM; | |
1052 | return 3; | |
1053 | } | |
1054 | } | |
e46fee70 | 1055 | if (l1 == '1') |
252b5132 | 1056 | { |
dead1419 | 1057 | if (! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 1058 | { |
d4845d57 JR |
1059 | *mode = DSP_REG_N; |
1060 | *reg = A_A1_NUM; | |
1061 | return 2; | |
1062 | } | |
3882b010 | 1063 | if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
1064 | { |
1065 | *mode = DSP_REG_N; | |
1066 | *reg = A_A1G_NUM; | |
252b5132 RH |
1067 | return 3; |
1068 | } | |
1069 | } | |
d4845d57 | 1070 | |
e46fee70 | 1071 | if (l1 == 'x' && src[2] >= '0' && src[2] <= '1' |
dead1419 | 1072 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1073 | { |
1074 | *mode = A_REG_N; | |
e46fee70 | 1075 | *reg = 4 + (l1 - '0'); |
d4845d57 JR |
1076 | return 3; |
1077 | } | |
e46fee70 | 1078 | if (l1 == 'y' && src[2] >= '0' && src[2] <= '1' |
dead1419 | 1079 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
1080 | { |
1081 | *mode = A_REG_N; | |
e46fee70 | 1082 | *reg = 6 + (l1 - '0'); |
d4845d57 JR |
1083 | return 3; |
1084 | } | |
e46fee70 | 1085 | if (l1 == 's' && src[2] >= '0' && src[2] <= '3' |
dead1419 | 1086 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 | 1087 | { |
e46fee70 | 1088 | int n = l1 - '0'; |
d4845d57 JR |
1089 | |
1090 | *mode = A_REG_N; | |
1091 | *reg = n | ((~n & 2) << 1); | |
1092 | return 3; | |
1093 | } | |
1094 | } | |
1095 | ||
912a07db | 1096 | if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 | 1097 | { |
e46fee70 | 1098 | if (l1 == 's') |
d4845d57 JR |
1099 | { |
1100 | *mode = A_REG_N; | |
1101 | *reg = 8; | |
252b5132 RH |
1102 | return 2; |
1103 | } | |
e46fee70 | 1104 | if (l1 == 'x') |
d4845d57 JR |
1105 | { |
1106 | *mode = A_REG_N; | |
1107 | *reg = 8; | |
1108 | return 2; | |
1109 | } | |
e46fee70 | 1110 | if (l1 == 'y') |
d4845d57 JR |
1111 | { |
1112 | *mode = A_REG_N; | |
1113 | *reg = 9; | |
1114 | return 2; | |
1115 | } | |
1116 | } | |
1117 | ||
e46fee70 | 1118 | if (l0 == 'x' && l1 >= '0' && l1 <= '1' |
dead1419 | 1119 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1120 | { |
1121 | *mode = DSP_REG_N; | |
e46fee70 | 1122 | *reg = A_X0_NUM + l1 - '0'; |
d4845d57 JR |
1123 | return 2; |
1124 | } | |
1125 | ||
e46fee70 | 1126 | if (l0 == 'y' && l1 >= '0' && l1 <= '1' |
dead1419 | 1127 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1128 | { |
1129 | *mode = DSP_REG_N; | |
e46fee70 | 1130 | *reg = A_Y0_NUM + l1 - '0'; |
d4845d57 JR |
1131 | return 2; |
1132 | } | |
1133 | ||
e46fee70 | 1134 | if (l0 == 'm' && l1 >= '0' && l1 <= '1' |
dead1419 | 1135 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1136 | { |
1137 | *mode = DSP_REG_N; | |
e46fee70 | 1138 | *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM; |
d4845d57 | 1139 | return 2; |
252b5132 RH |
1140 | } |
1141 | ||
e46fee70 HPN |
1142 | if (l0 == 's' |
1143 | && l1 == 's' | |
3882b010 | 1144 | && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1145 | { |
1146 | *mode = A_SSR; | |
1147 | return 3; | |
1148 | } | |
1149 | ||
3882b010 | 1150 | if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c' |
dead1419 | 1151 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1152 | { |
1153 | *mode = A_SPC; | |
1154 | return 3; | |
1155 | } | |
1156 | ||
3882b010 | 1157 | if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r' |
dead1419 | 1158 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1159 | { |
1160 | *mode = A_SGR; | |
1161 | return 3; | |
1162 | } | |
1163 | ||
3882b010 | 1164 | if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r' |
dead1419 | 1165 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
1166 | { |
1167 | *mode = A_DSR; | |
1168 | return 3; | |
1169 | } | |
1170 | ||
3882b010 | 1171 | if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 1172 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1173 | { |
1174 | *mode = A_DBR; | |
1175 | return 3; | |
1176 | } | |
1177 | ||
e46fee70 | 1178 | if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
1179 | { |
1180 | *mode = A_SR; | |
1181 | return 2; | |
1182 | } | |
1183 | ||
e46fee70 | 1184 | if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
1185 | { |
1186 | *mode = A_REG_N; | |
1187 | *reg = 15; | |
1188 | return 2; | |
1189 | } | |
1190 | ||
e46fee70 | 1191 | if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
1192 | { |
1193 | *mode = A_PR; | |
1194 | return 2; | |
1195 | } | |
e46fee70 | 1196 | if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 1197 | { |
015551fc JR |
1198 | /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0' |
1199 | and use an uninitialized immediate. */ | |
1200 | *mode = A_PC; | |
252b5132 RH |
1201 | return 2; |
1202 | } | |
3882b010 | 1203 | if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 1204 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1205 | { |
1206 | *mode = A_GBR; | |
1207 | return 3; | |
1208 | } | |
3882b010 | 1209 | if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 1210 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1211 | { |
1212 | *mode = A_VBR; | |
1213 | return 3; | |
1214 | } | |
1215 | ||
1d70c7fb AO |
1216 | if (l0 == 't' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
1217 | && ! IDENT_CHAR ((unsigned char) src[3])) | |
1218 | { | |
1219 | *mode = A_TBR; | |
1220 | return 3; | |
1221 | } | |
3882b010 | 1222 | if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c' |
dead1419 | 1223 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 | 1224 | { |
3882b010 | 1225 | if (TOLOWER (src[3]) == 'l') |
252b5132 RH |
1226 | { |
1227 | *mode = A_MACL; | |
1228 | return 4; | |
1229 | } | |
3882b010 | 1230 | if (TOLOWER (src[3]) == 'h') |
252b5132 RH |
1231 | { |
1232 | *mode = A_MACH; | |
1233 | return 4; | |
1234 | } | |
1235 | } | |
3882b010 | 1236 | if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd' |
912a07db | 1237 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
1238 | { |
1239 | *mode = A_MOD; | |
1240 | return 3; | |
1241 | } | |
e46fee70 | 1242 | if (l0 == 'f' && l1 == 'r') |
252b5132 RH |
1243 | { |
1244 | if (src[2] == '1') | |
1245 | { | |
1246 | if (src[3] >= '0' && src[3] <= '5' | |
dead1419 | 1247 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1248 | { |
1249 | *mode = F_REG_N; | |
1250 | *reg = 10 + src[3] - '0'; | |
1251 | return 4; | |
1252 | } | |
1253 | } | |
1254 | if (src[2] >= '0' && src[2] <= '9' | |
dead1419 | 1255 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1256 | { |
1257 | *mode = F_REG_N; | |
1258 | *reg = (src[2] - '0'); | |
1259 | return 3; | |
1260 | } | |
1261 | } | |
e46fee70 | 1262 | if (l0 == 'd' && l1 == 'r') |
252b5132 RH |
1263 | { |
1264 | if (src[2] == '1') | |
1265 | { | |
1266 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 1267 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1268 | { |
1269 | *mode = D_REG_N; | |
1270 | *reg = 10 + src[3] - '0'; | |
1271 | return 4; | |
1272 | } | |
1273 | } | |
1274 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 1275 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1276 | { |
1277 | *mode = D_REG_N; | |
1278 | *reg = (src[2] - '0'); | |
1279 | return 3; | |
1280 | } | |
1281 | } | |
e46fee70 | 1282 | if (l0 == 'x' && l1 == 'd') |
252b5132 RH |
1283 | { |
1284 | if (src[2] == '1') | |
1285 | { | |
1286 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 1287 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1288 | { |
1289 | *mode = X_REG_N; | |
1290 | *reg = 11 + src[3] - '0'; | |
1291 | return 4; | |
1292 | } | |
1293 | } | |
1294 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 1295 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1296 | { |
1297 | *mode = X_REG_N; | |
1298 | *reg = (src[2] - '0') + 1; | |
1299 | return 3; | |
1300 | } | |
1301 | } | |
e46fee70 | 1302 | if (l0 == 'f' && l1 == 'v') |
252b5132 | 1303 | { |
dead1419 | 1304 | if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1305 | { |
1306 | *mode = V_REG_N; | |
1307 | *reg = 12; | |
1308 | return 4; | |
1309 | } | |
1310 | if ((src[2] == '0' || src[2] == '4' || src[2] == '8') | |
dead1419 | 1311 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1312 | { |
1313 | *mode = V_REG_N; | |
1314 | *reg = (src[2] - '0'); | |
1315 | return 3; | |
1316 | } | |
1317 | } | |
3882b010 L |
1318 | if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u' |
1319 | && TOLOWER (src[3]) == 'l' | |
dead1419 | 1320 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1321 | { |
1322 | *mode = FPUL_N; | |
1323 | return 4; | |
1324 | } | |
1325 | ||
3882b010 L |
1326 | if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's' |
1327 | && TOLOWER (src[3]) == 'c' | |
1328 | && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5])) | |
252b5132 RH |
1329 | { |
1330 | *mode = FPSCR_N; | |
1331 | return 5; | |
1332 | } | |
1333 | ||
3882b010 L |
1334 | if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't' |
1335 | && TOLOWER (src[3]) == 'r' | |
1336 | && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5])) | |
252b5132 RH |
1337 | { |
1338 | *mode = XMTRX_M4; | |
1339 | return 5; | |
1340 | } | |
1341 | ||
1342 | return 0; | |
1343 | } | |
1344 | ||
37dedf66 NC |
1345 | /* Like parse_reg_without_prefix, but this version supports |
1346 | $-prefixed register names if enabled by the user. */ | |
1347 | ||
1348 | static unsigned int | |
1349 | parse_reg (char *src, int *mode, int *reg) | |
1350 | { | |
1351 | unsigned int prefix; | |
1352 | unsigned int consumed; | |
1353 | ||
1354 | if (src[0] == '$') | |
1355 | { | |
1356 | if (allow_dollar_register_prefix) | |
1357 | { | |
1358 | src ++; | |
1359 | prefix = 1; | |
1360 | } | |
1361 | else | |
1362 | return 0; | |
1363 | } | |
1364 | else | |
1365 | prefix = 0; | |
3739860c | 1366 | |
37dedf66 NC |
1367 | consumed = parse_reg_without_prefix (src, mode, reg); |
1368 | ||
1369 | if (consumed == 0) | |
1370 | return 0; | |
1371 | ||
1372 | return consumed + prefix; | |
1373 | } | |
1374 | ||
c4aa876b | 1375 | static char * |
8edc77b9 | 1376 | parse_exp (char *s, sh_operand_info *op) |
252b5132 RH |
1377 | { |
1378 | char *save; | |
d3ce72d0 | 1379 | char *new_pointer; |
252b5132 RH |
1380 | |
1381 | save = input_line_pointer; | |
1382 | input_line_pointer = s; | |
015551fc JR |
1383 | expression (&op->immediate); |
1384 | if (op->immediate.X_op == O_absent) | |
252b5132 | 1385 | as_bad (_("missing operand")); |
d3ce72d0 | 1386 | new_pointer = input_line_pointer; |
252b5132 | 1387 | input_line_pointer = save; |
d3ce72d0 | 1388 | return new_pointer; |
252b5132 RH |
1389 | } |
1390 | ||
252b5132 RH |
1391 | /* The many forms of operand: |
1392 | ||
1393 | Rn Register direct | |
1394 | @Rn Register indirect | |
1395 | @Rn+ Autoincrement | |
1396 | @-Rn Autodecrement | |
1397 | @(disp:4,Rn) | |
1398 | @(disp:8,GBR) | |
1399 | @(disp:8,PC) | |
1400 | ||
1401 | @(R0,Rn) | |
1402 | @(R0,GBR) | |
1403 | ||
1404 | disp:8 | |
1405 | disp:12 | |
1406 | #imm8 | |
1407 | pr, gbr, vbr, macl, mach | |
252b5132 RH |
1408 | */ |
1409 | ||
c4aa876b | 1410 | static char * |
8edc77b9 | 1411 | parse_at (char *src, sh_operand_info *op) |
252b5132 RH |
1412 | { |
1413 | int len; | |
1414 | int mode; | |
1415 | src++; | |
1d70c7fb AO |
1416 | if (src[0] == '@') |
1417 | { | |
1418 | src = parse_at (src, op); | |
1419 | if (op->type == A_DISP_TBR) | |
1420 | op->type = A_DISP2_TBR; | |
1421 | else | |
1422 | as_bad (_("illegal double indirection")); | |
1423 | } | |
1424 | else if (src[0] == '-') | |
252b5132 | 1425 | { |
6b31947e | 1426 | /* Must be predecrement. */ |
252b5132 RH |
1427 | src++; |
1428 | ||
1429 | len = parse_reg (src, &mode, &(op->reg)); | |
1430 | if (mode != A_REG_N) | |
1431 | as_bad (_("illegal register after @-")); | |
1432 | ||
1433 | op->type = A_DEC_N; | |
1434 | src += len; | |
1435 | } | |
1436 | else if (src[0] == '(') | |
1437 | { | |
1438 | /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or | |
8d4d84c2 | 1439 | @(r0, rn). */ |
252b5132 RH |
1440 | src++; |
1441 | len = parse_reg (src, &mode, &(op->reg)); | |
1442 | if (len && mode == A_REG_N) | |
1443 | { | |
1444 | src += len; | |
1445 | if (op->reg != 0) | |
1446 | { | |
1447 | as_bad (_("must be @(r0,...)")); | |
1448 | } | |
1449 | if (src[0] == ',') | |
252b5132 | 1450 | { |
8d4d84c2 AO |
1451 | src++; |
1452 | /* Now can be rn or gbr. */ | |
1453 | len = parse_reg (src, &mode, &(op->reg)); | |
1454 | } | |
1455 | else | |
1456 | { | |
1457 | len = 0; | |
252b5132 | 1458 | } |
8d4d84c2 | 1459 | if (len) |
252b5132 | 1460 | { |
8d4d84c2 AO |
1461 | if (mode == A_GBR) |
1462 | { | |
1463 | op->type = A_R0_GBR; | |
1464 | } | |
1465 | else if (mode == A_REG_N) | |
1466 | { | |
1467 | op->type = A_IND_R0_REG_N; | |
1468 | } | |
1469 | else | |
1470 | { | |
1471 | as_bad (_("syntax error in @(r0,...)")); | |
1472 | } | |
252b5132 RH |
1473 | } |
1474 | else | |
1475 | { | |
8d4d84c2 | 1476 | as_bad (_("syntax error in @(r0...)")); |
252b5132 RH |
1477 | } |
1478 | } | |
1479 | else | |
1480 | { | |
8d4d84c2 | 1481 | /* Must be an @(disp,.. thing). */ |
015551fc | 1482 | src = parse_exp (src, op); |
252b5132 RH |
1483 | if (src[0] == ',') |
1484 | src++; | |
8d4d84c2 | 1485 | /* Now can be rn, gbr or pc. */ |
252b5132 RH |
1486 | len = parse_reg (src, &mode, &op->reg); |
1487 | if (len) | |
1488 | { | |
1489 | if (mode == A_REG_N) | |
1490 | { | |
1491 | op->type = A_DISP_REG_N; | |
1492 | } | |
1493 | else if (mode == A_GBR) | |
1494 | { | |
1495 | op->type = A_DISP_GBR; | |
1496 | } | |
1d70c7fb AO |
1497 | else if (mode == A_TBR) |
1498 | { | |
1499 | op->type = A_DISP_TBR; | |
1500 | } | |
015551fc | 1501 | else if (mode == A_PC) |
252b5132 | 1502 | { |
dbb4348d JR |
1503 | /* We want @(expr, pc) to uniformly address . + expr, |
1504 | no matter if expr is a constant, or a more complex | |
1505 | expression, e.g. sym-. or sym1-sym2. | |
1506 | However, we also used to accept @(sym,pc) | |
67c1ffbe | 1507 | as addressing sym, i.e. meaning the same as plain sym. |
dbb4348d JR |
1508 | Some existing code does use the @(sym,pc) syntax, so |
1509 | we give it the old semantics for now, but warn about | |
1510 | its use, so that users have some time to fix their code. | |
1511 | ||
1512 | Note that due to this backward compatibility hack, | |
1513 | we'll get unexpected results when @(offset, pc) is used, | |
1514 | and offset is a symbol that is set later to an an address | |
1515 | difference, or an external symbol that is set to an | |
1516 | address difference in another source file, so we want to | |
1517 | eventually remove it. */ | |
9691d64f JR |
1518 | if (op->immediate.X_op == O_symbol) |
1519 | { | |
1520 | op->type = A_DISP_PC; | |
1521 | as_warn (_("Deprecated syntax.")); | |
1522 | } | |
1523 | else | |
1524 | { | |
1525 | op->type = A_DISP_PC_ABS; | |
1526 | /* Such operands don't get corrected for PC==.+4, so | |
1527 | make the correction here. */ | |
1528 | op->immediate.X_add_number -= 4; | |
1529 | } | |
252b5132 RH |
1530 | } |
1531 | else | |
1532 | { | |
1533 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
1534 | } | |
1535 | } | |
1536 | else | |
1537 | { | |
1538 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
1539 | } | |
1540 | } | |
1541 | src += len; | |
1542 | if (src[0] != ')') | |
1543 | as_bad (_("expecting )")); | |
1544 | else | |
1545 | src++; | |
1546 | } | |
1547 | else | |
1548 | { | |
1549 | src += parse_reg (src, &mode, &(op->reg)); | |
1550 | if (mode != A_REG_N) | |
006299d3 NC |
1551 | as_bad (_("illegal register after @")); |
1552 | ||
252b5132 RH |
1553 | if (src[0] == '+') |
1554 | { | |
1000a02a NC |
1555 | char l0, l1; |
1556 | ||
252b5132 | 1557 | src++; |
1000a02a NC |
1558 | l0 = TOLOWER (src[0]); |
1559 | l1 = TOLOWER (src[1]); | |
1560 | ||
1561 | if ((l0 == 'r' && l1 == '8') | |
1562 | || (l0 == 'i' && (l1 == 'x' || l1 == 's'))) | |
d4845d57 JR |
1563 | { |
1564 | src += 2; | |
88da98f3 | 1565 | op->type = AX_PMOD_N; |
d4845d57 | 1566 | } |
006299d3 NC |
1567 | else if ( (l0 == 'r' && l1 == '9') |
1568 | || (l0 == 'i' && l1 == 'y')) | |
d4845d57 JR |
1569 | { |
1570 | src += 2; | |
88da98f3 | 1571 | op->type = AY_PMOD_N; |
d4845d57 JR |
1572 | } |
1573 | else | |
1574 | op->type = A_INC_N; | |
252b5132 RH |
1575 | } |
1576 | else | |
006299d3 | 1577 | op->type = A_IND_N; |
252b5132 RH |
1578 | } |
1579 | return src; | |
1580 | } | |
1581 | ||
1582 | static void | |
8edc77b9 | 1583 | get_operand (char **ptr, sh_operand_info *op) |
252b5132 RH |
1584 | { |
1585 | char *src = *ptr; | |
1586 | int mode = -1; | |
1587 | unsigned int len; | |
1588 | ||
1589 | if (src[0] == '#') | |
1590 | { | |
1591 | src++; | |
015551fc | 1592 | *ptr = parse_exp (src, op); |
252b5132 RH |
1593 | op->type = A_IMM; |
1594 | return; | |
1595 | } | |
1596 | ||
1597 | else if (src[0] == '@') | |
1598 | { | |
1599 | *ptr = parse_at (src, op); | |
1600 | return; | |
1601 | } | |
1602 | len = parse_reg (src, &mode, &(op->reg)); | |
1603 | if (len) | |
1604 | { | |
1605 | *ptr = src + len; | |
1606 | op->type = mode; | |
1607 | return; | |
1608 | } | |
1609 | else | |
1610 | { | |
6b31947e | 1611 | /* Not a reg, the only thing left is a displacement. */ |
015551fc | 1612 | *ptr = parse_exp (src, op); |
252b5132 RH |
1613 | op->type = A_DISP_PC; |
1614 | return; | |
1615 | } | |
1616 | } | |
1617 | ||
c4aa876b | 1618 | static char * |
8edc77b9 | 1619 | get_operands (sh_opcode_info *info, char *args, sh_operand_info *operand) |
252b5132 RH |
1620 | { |
1621 | char *ptr = args; | |
1622 | if (info->arg[0]) | |
1623 | { | |
d4845d57 JR |
1624 | /* The pre-processor will eliminate whitespace in front of '@' |
1625 | after the first argument; we may be called multiple times | |
1626 | from assemble_ppi, so don't insist on finding whitespace here. */ | |
1627 | if (*ptr == ' ') | |
1628 | ptr++; | |
252b5132 RH |
1629 | |
1630 | get_operand (&ptr, operand + 0); | |
1631 | if (info->arg[1]) | |
1632 | { | |
1633 | if (*ptr == ',') | |
1634 | { | |
1635 | ptr++; | |
1636 | } | |
1637 | get_operand (&ptr, operand + 1); | |
52ccafd0 JR |
1638 | /* ??? Hack: psha/pshl have a varying operand number depending on |
1639 | the type of the first operand. We handle this by having the | |
1640 | three-operand version first and reducing the number of operands | |
1641 | parsed to two if we see that the first operand is an immediate. | |
1642 | This works because no insn with three operands has an immediate | |
1643 | as first operand. */ | |
1644 | if (info->arg[2] && operand[0].type != A_IMM) | |
252b5132 RH |
1645 | { |
1646 | if (*ptr == ',') | |
1647 | { | |
1648 | ptr++; | |
1649 | } | |
1650 | get_operand (&ptr, operand + 2); | |
1651 | } | |
1652 | else | |
1653 | { | |
1654 | operand[2].type = 0; | |
1655 | } | |
1656 | } | |
1657 | else | |
1658 | { | |
1659 | operand[1].type = 0; | |
1660 | operand[2].type = 0; | |
1661 | } | |
1662 | } | |
1663 | else | |
1664 | { | |
1665 | operand[0].type = 0; | |
1666 | operand[1].type = 0; | |
1667 | operand[2].type = 0; | |
1668 | } | |
1669 | return ptr; | |
1670 | } | |
1671 | ||
1672 | /* Passed a pointer to a list of opcodes which use different | |
1673 | addressing modes, return the opcode which matches the opcodes | |
6b31947e | 1674 | provided. */ |
252b5132 | 1675 | |
c4aa876b | 1676 | static sh_opcode_info * |
8edc77b9 | 1677 | get_specific (sh_opcode_info *opcode, sh_operand_info *operands) |
252b5132 RH |
1678 | { |
1679 | sh_opcode_info *this_try = opcode; | |
1680 | char *name = opcode->name; | |
1681 | int n = 0; | |
c4aa876b | 1682 | |
252b5132 RH |
1683 | while (opcode->name) |
1684 | { | |
1685 | this_try = opcode++; | |
5ff37431 | 1686 | if ((this_try->name != name) && (strcmp (this_try->name, name) != 0)) |
252b5132 RH |
1687 | { |
1688 | /* We've looked so far down the table that we've run out of | |
6b31947e | 1689 | opcodes with the same name. */ |
252b5132 RH |
1690 | return 0; |
1691 | } | |
c4aa876b | 1692 | |
6b31947e | 1693 | /* Look at both operands needed by the opcodes and provided by |
252b5132 RH |
1694 | the user - since an arg test will often fail on the same arg |
1695 | again and again, we'll try and test the last failing arg the | |
6b31947e | 1696 | first on each opcode try. */ |
252b5132 RH |
1697 | for (n = 0; this_try->arg[n]; n++) |
1698 | { | |
1699 | sh_operand_info *user = operands + n; | |
1700 | sh_arg_type arg = this_try->arg[n]; | |
c4aa876b | 1701 | |
252b5132 RH |
1702 | switch (arg) |
1703 | { | |
7679ead9 AO |
1704 | case A_DISP_PC: |
1705 | if (user->type == A_DISP_PC_ABS) | |
1706 | break; | |
1707 | /* Fall through. */ | |
252b5132 RH |
1708 | case A_IMM: |
1709 | case A_BDISP12: | |
1710 | case A_BDISP8: | |
1711 | case A_DISP_GBR: | |
1d70c7fb | 1712 | case A_DISP2_TBR: |
252b5132 RH |
1713 | case A_MACH: |
1714 | case A_PR: | |
1715 | case A_MACL: | |
1716 | if (user->type != arg) | |
1717 | goto fail; | |
1718 | break; | |
1719 | case A_R0: | |
1720 | /* opcode needs r0 */ | |
1721 | if (user->type != A_REG_N || user->reg != 0) | |
1722 | goto fail; | |
1723 | break; | |
1724 | case A_R0_GBR: | |
1725 | if (user->type != A_R0_GBR || user->reg != 0) | |
1726 | goto fail; | |
1727 | break; | |
1728 | case F_FR0: | |
1729 | if (user->type != F_REG_N || user->reg != 0) | |
1730 | goto fail; | |
1731 | break; | |
1732 | ||
1733 | case A_REG_N: | |
1734 | case A_INC_N: | |
1735 | case A_DEC_N: | |
1736 | case A_IND_N: | |
1737 | case A_IND_R0_REG_N: | |
1738 | case A_DISP_REG_N: | |
1739 | case F_REG_N: | |
1740 | case D_REG_N: | |
1741 | case X_REG_N: | |
1742 | case V_REG_N: | |
1743 | case FPUL_N: | |
1744 | case FPSCR_N: | |
d4845d57 | 1745 | case DSP_REG_N: |
252b5132 RH |
1746 | /* Opcode needs rn */ |
1747 | if (user->type != arg) | |
1748 | goto fail; | |
1749 | reg_n = user->reg; | |
1750 | break; | |
252b5132 RH |
1751 | case DX_REG_N: |
1752 | if (user->type != D_REG_N && user->type != X_REG_N) | |
1753 | goto fail; | |
1754 | reg_n = user->reg; | |
1755 | break; | |
1756 | case A_GBR: | |
1d70c7fb | 1757 | case A_TBR: |
252b5132 RH |
1758 | case A_SR: |
1759 | case A_VBR: | |
d4845d57 JR |
1760 | case A_DSR: |
1761 | case A_MOD: | |
1762 | case A_RE: | |
1763 | case A_RS: | |
252b5132 RH |
1764 | case A_SSR: |
1765 | case A_SPC: | |
1766 | case A_SGR: | |
1767 | case A_DBR: | |
1768 | if (user->type != arg) | |
1769 | goto fail; | |
1770 | break; | |
1771 | ||
c4aa876b | 1772 | case A_REG_B: |
252b5132 RH |
1773 | if (user->type != arg) |
1774 | goto fail; | |
1775 | reg_b = user->reg; | |
1776 | break; | |
1777 | ||
1d70c7fb AO |
1778 | case A_INC_R15: |
1779 | if (user->type != A_INC_N) | |
1780 | goto fail; | |
1781 | if (user->reg != 15) | |
1782 | goto fail; | |
1783 | reg_n = user->reg; | |
1784 | break; | |
1785 | ||
1786 | case A_DEC_R15: | |
1787 | if (user->type != A_DEC_N) | |
1788 | goto fail; | |
1789 | if (user->reg != 15) | |
1790 | goto fail; | |
1791 | reg_n = user->reg; | |
1792 | break; | |
1793 | ||
252b5132 RH |
1794 | case A_REG_M: |
1795 | case A_INC_M: | |
1796 | case A_DEC_M: | |
1797 | case A_IND_M: | |
1798 | case A_IND_R0_REG_M: | |
1799 | case A_DISP_REG_M: | |
d4845d57 | 1800 | case DSP_REG_M: |
252b5132 RH |
1801 | /* Opcode needs rn */ |
1802 | if (user->type != arg - A_REG_M + A_REG_N) | |
1803 | goto fail; | |
1804 | reg_m = user->reg; | |
1805 | break; | |
1806 | ||
88da98f3 MS |
1807 | case AS_DEC_N: |
1808 | if (user->type != A_DEC_N) | |
1809 | goto fail; | |
1810 | if (user->reg < 2 || user->reg > 5) | |
1811 | goto fail; | |
1812 | reg_n = user->reg; | |
1813 | break; | |
13ef8878 | 1814 | |
88da98f3 MS |
1815 | case AS_INC_N: |
1816 | if (user->type != A_INC_N) | |
1817 | goto fail; | |
1818 | if (user->reg < 2 || user->reg > 5) | |
1819 | goto fail; | |
1820 | reg_n = user->reg; | |
1821 | break; | |
13ef8878 | 1822 | |
88da98f3 MS |
1823 | case AS_IND_N: |
1824 | if (user->type != A_IND_N) | |
1825 | goto fail; | |
1826 | if (user->reg < 2 || user->reg > 5) | |
1827 | goto fail; | |
1828 | reg_n = user->reg; | |
1829 | break; | |
13ef8878 | 1830 | |
88da98f3 MS |
1831 | case AS_PMOD_N: |
1832 | if (user->type != AX_PMOD_N) | |
1833 | goto fail; | |
1834 | if (user->reg < 2 || user->reg > 5) | |
1835 | goto fail; | |
1836 | reg_n = user->reg; | |
1837 | break; | |
13ef8878 | 1838 | |
88da98f3 MS |
1839 | case AX_INC_N: |
1840 | if (user->type != A_INC_N) | |
1841 | goto fail; | |
1842 | if (user->reg < 4 || user->reg > 5) | |
1843 | goto fail; | |
1844 | reg_n = user->reg; | |
1845 | break; | |
13ef8878 | 1846 | |
88da98f3 MS |
1847 | case AX_IND_N: |
1848 | if (user->type != A_IND_N) | |
1849 | goto fail; | |
1850 | if (user->reg < 4 || user->reg > 5) | |
1851 | goto fail; | |
1852 | reg_n = user->reg; | |
1853 | break; | |
13ef8878 | 1854 | |
88da98f3 MS |
1855 | case AX_PMOD_N: |
1856 | if (user->type != AX_PMOD_N) | |
1857 | goto fail; | |
1858 | if (user->reg < 4 || user->reg > 5) | |
1859 | goto fail; | |
1860 | reg_n = user->reg; | |
1861 | break; | |
13ef8878 | 1862 | |
88da98f3 MS |
1863 | case AXY_INC_N: |
1864 | if (user->type != A_INC_N) | |
1865 | goto fail; | |
1866 | if ((user->reg < 4 || user->reg > 5) | |
1867 | && (user->reg < 0 || user->reg > 1)) | |
1868 | goto fail; | |
1869 | reg_n = user->reg; | |
1870 | break; | |
13ef8878 | 1871 | |
88da98f3 MS |
1872 | case AXY_IND_N: |
1873 | if (user->type != A_IND_N) | |
1874 | goto fail; | |
1875 | if ((user->reg < 4 || user->reg > 5) | |
1876 | && (user->reg < 0 || user->reg > 1)) | |
1877 | goto fail; | |
1878 | reg_n = user->reg; | |
1879 | break; | |
13ef8878 | 1880 | |
88da98f3 MS |
1881 | case AXY_PMOD_N: |
1882 | if (user->type != AX_PMOD_N) | |
1883 | goto fail; | |
1884 | if ((user->reg < 4 || user->reg > 5) | |
1885 | && (user->reg < 0 || user->reg > 1)) | |
1886 | goto fail; | |
1887 | reg_n = user->reg; | |
1888 | break; | |
13ef8878 | 1889 | |
88da98f3 MS |
1890 | case AY_INC_N: |
1891 | if (user->type != A_INC_N) | |
1892 | goto fail; | |
1893 | if (user->reg < 6 || user->reg > 7) | |
1894 | goto fail; | |
1895 | reg_n = user->reg; | |
1896 | break; | |
13ef8878 | 1897 | |
88da98f3 MS |
1898 | case AY_IND_N: |
1899 | if (user->type != A_IND_N) | |
1900 | goto fail; | |
1901 | if (user->reg < 6 || user->reg > 7) | |
1902 | goto fail; | |
1903 | reg_n = user->reg; | |
1904 | break; | |
13ef8878 | 1905 | |
88da98f3 MS |
1906 | case AY_PMOD_N: |
1907 | if (user->type != AY_PMOD_N) | |
1908 | goto fail; | |
1909 | if (user->reg < 6 || user->reg > 7) | |
1910 | goto fail; | |
1911 | reg_n = user->reg; | |
1912 | break; | |
1913 | ||
1914 | case AYX_INC_N: | |
1915 | if (user->type != A_INC_N) | |
1916 | goto fail; | |
1917 | if ((user->reg < 6 || user->reg > 7) | |
1918 | && (user->reg < 2 || user->reg > 3)) | |
1919 | goto fail; | |
1920 | reg_n = user->reg; | |
1921 | break; | |
13ef8878 | 1922 | |
88da98f3 MS |
1923 | case AYX_IND_N: |
1924 | if (user->type != A_IND_N) | |
1925 | goto fail; | |
1926 | if ((user->reg < 6 || user->reg > 7) | |
1927 | && (user->reg < 2 || user->reg > 3)) | |
1928 | goto fail; | |
1929 | reg_n = user->reg; | |
1930 | break; | |
13ef8878 | 1931 | |
88da98f3 MS |
1932 | case AYX_PMOD_N: |
1933 | if (user->type != AY_PMOD_N) | |
1934 | goto fail; | |
1935 | if ((user->reg < 6 || user->reg > 7) | |
1936 | && (user->reg < 2 || user->reg > 3)) | |
1937 | goto fail; | |
1938 | reg_n = user->reg; | |
1939 | break; | |
1940 | ||
1941 | case DSP_REG_A_M: | |
1942 | if (user->type != DSP_REG_N) | |
1943 | goto fail; | |
1944 | if (user->reg != A_A0_NUM | |
1945 | && user->reg != A_A1_NUM) | |
1946 | goto fail; | |
1947 | reg_m = user->reg; | |
1948 | break; | |
1949 | ||
1950 | case DSP_REG_AX: | |
1951 | if (user->type != DSP_REG_N) | |
1952 | goto fail; | |
1953 | switch (user->reg) | |
1954 | { | |
1955 | case A_A0_NUM: | |
1956 | reg_x = 0; | |
1957 | break; | |
1958 | case A_A1_NUM: | |
1959 | reg_x = 2; | |
1960 | break; | |
1961 | case A_X0_NUM: | |
1962 | reg_x = 1; | |
1963 | break; | |
1964 | case A_X1_NUM: | |
1965 | reg_x = 3; | |
1966 | break; | |
1967 | default: | |
1968 | goto fail; | |
1969 | } | |
1970 | break; | |
1971 | ||
1972 | case DSP_REG_XY: | |
1973 | if (user->type != DSP_REG_N) | |
1974 | goto fail; | |
1975 | switch (user->reg) | |
1976 | { | |
1977 | case A_X0_NUM: | |
1978 | reg_x = 0; | |
1979 | break; | |
1980 | case A_X1_NUM: | |
1981 | reg_x = 2; | |
1982 | break; | |
1983 | case A_Y0_NUM: | |
1984 | reg_x = 1; | |
1985 | break; | |
1986 | case A_Y1_NUM: | |
1987 | reg_x = 3; | |
1988 | break; | |
1989 | default: | |
1990 | goto fail; | |
1991 | } | |
1992 | break; | |
1993 | ||
1994 | case DSP_REG_AY: | |
1995 | if (user->type != DSP_REG_N) | |
1996 | goto fail; | |
1997 | switch (user->reg) | |
1998 | { | |
1999 | case A_A0_NUM: | |
2000 | reg_y = 0; | |
2001 | break; | |
2002 | case A_A1_NUM: | |
2003 | reg_y = 1; | |
2004 | break; | |
2005 | case A_Y0_NUM: | |
2006 | reg_y = 2; | |
2007 | break; | |
2008 | case A_Y1_NUM: | |
2009 | reg_y = 3; | |
2010 | break; | |
2011 | default: | |
2012 | goto fail; | |
2013 | } | |
2014 | break; | |
2015 | ||
2016 | case DSP_REG_YX: | |
2017 | if (user->type != DSP_REG_N) | |
2018 | goto fail; | |
2019 | switch (user->reg) | |
2020 | { | |
2021 | case A_Y0_NUM: | |
2022 | reg_y = 0; | |
2023 | break; | |
2024 | case A_Y1_NUM: | |
2025 | reg_y = 1; | |
2026 | break; | |
2027 | case A_X0_NUM: | |
2028 | reg_y = 2; | |
2029 | break; | |
2030 | case A_X1_NUM: | |
2031 | reg_y = 3; | |
2032 | break; | |
2033 | default: | |
2034 | goto fail; | |
2035 | } | |
2036 | break; | |
2037 | ||
d4845d57 JR |
2038 | case DSP_REG_X: |
2039 | if (user->type != DSP_REG_N) | |
2040 | goto fail; | |
2041 | switch (user->reg) | |
2042 | { | |
2043 | case A_X0_NUM: | |
2044 | reg_x = 0; | |
2045 | break; | |
2046 | case A_X1_NUM: | |
2047 | reg_x = 1; | |
2048 | break; | |
2049 | case A_A0_NUM: | |
2050 | reg_x = 2; | |
2051 | break; | |
2052 | case A_A1_NUM: | |
2053 | reg_x = 3; | |
2054 | break; | |
2055 | default: | |
2056 | goto fail; | |
2057 | } | |
2058 | break; | |
2059 | ||
2060 | case DSP_REG_Y: | |
2061 | if (user->type != DSP_REG_N) | |
2062 | goto fail; | |
2063 | switch (user->reg) | |
2064 | { | |
2065 | case A_Y0_NUM: | |
2066 | reg_y = 0; | |
2067 | break; | |
2068 | case A_Y1_NUM: | |
2069 | reg_y = 1; | |
2070 | break; | |
2071 | case A_M0_NUM: | |
2072 | reg_y = 2; | |
2073 | break; | |
2074 | case A_M1_NUM: | |
2075 | reg_y = 3; | |
2076 | break; | |
2077 | default: | |
2078 | goto fail; | |
2079 | } | |
2080 | break; | |
2081 | ||
2082 | case DSP_REG_E: | |
2083 | if (user->type != DSP_REG_N) | |
2084 | goto fail; | |
2085 | switch (user->reg) | |
2086 | { | |
2087 | case A_X0_NUM: | |
2088 | reg_efg = 0 << 10; | |
2089 | break; | |
2090 | case A_X1_NUM: | |
2091 | reg_efg = 1 << 10; | |
2092 | break; | |
2093 | case A_Y0_NUM: | |
2094 | reg_efg = 2 << 10; | |
2095 | break; | |
2096 | case A_A1_NUM: | |
2097 | reg_efg = 3 << 10; | |
2098 | break; | |
2099 | default: | |
2100 | goto fail; | |
2101 | } | |
2102 | break; | |
2103 | ||
2104 | case DSP_REG_F: | |
2105 | if (user->type != DSP_REG_N) | |
2106 | goto fail; | |
2107 | switch (user->reg) | |
2108 | { | |
2109 | case A_Y0_NUM: | |
2110 | reg_efg |= 0 << 8; | |
2111 | break; | |
2112 | case A_Y1_NUM: | |
2113 | reg_efg |= 1 << 8; | |
2114 | break; | |
2115 | case A_X0_NUM: | |
2116 | reg_efg |= 2 << 8; | |
2117 | break; | |
2118 | case A_A1_NUM: | |
2119 | reg_efg |= 3 << 8; | |
2120 | break; | |
2121 | default: | |
2122 | goto fail; | |
2123 | } | |
2124 | break; | |
2125 | ||
2126 | case DSP_REG_G: | |
2127 | if (user->type != DSP_REG_N) | |
2128 | goto fail; | |
2129 | switch (user->reg) | |
2130 | { | |
2131 | case A_M0_NUM: | |
2132 | reg_efg |= 0 << 2; | |
2133 | break; | |
2134 | case A_M1_NUM: | |
2135 | reg_efg |= 1 << 2; | |
2136 | break; | |
2137 | case A_A0_NUM: | |
2138 | reg_efg |= 2 << 2; | |
2139 | break; | |
2140 | case A_A1_NUM: | |
2141 | reg_efg |= 3 << 2; | |
2142 | break; | |
2143 | default: | |
2144 | goto fail; | |
2145 | } | |
2146 | break; | |
2147 | ||
2148 | case A_A0: | |
2149 | if (user->type != DSP_REG_N || user->reg != A_A0_NUM) | |
2150 | goto fail; | |
2151 | break; | |
2152 | case A_X0: | |
2153 | if (user->type != DSP_REG_N || user->reg != A_X0_NUM) | |
2154 | goto fail; | |
2155 | break; | |
2156 | case A_X1: | |
2157 | if (user->type != DSP_REG_N || user->reg != A_X1_NUM) | |
2158 | goto fail; | |
2159 | break; | |
2160 | case A_Y0: | |
2161 | if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) | |
2162 | goto fail; | |
2163 | break; | |
2164 | case A_Y1: | |
2165 | if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) | |
2166 | goto fail; | |
2167 | break; | |
2168 | ||
252b5132 RH |
2169 | case F_REG_M: |
2170 | case D_REG_M: | |
2171 | case X_REG_M: | |
2172 | case V_REG_M: | |
2173 | case FPUL_M: | |
2174 | case FPSCR_M: | |
2175 | /* Opcode needs rn */ | |
2176 | if (user->type != arg - F_REG_M + F_REG_N) | |
2177 | goto fail; | |
2178 | reg_m = user->reg; | |
2179 | break; | |
2180 | case DX_REG_M: | |
2181 | if (user->type != D_REG_N && user->type != X_REG_N) | |
2182 | goto fail; | |
2183 | reg_m = user->reg; | |
2184 | break; | |
2185 | case XMTRX_M4: | |
2186 | if (user->type != XMTRX_M4) | |
2187 | goto fail; | |
2188 | reg_m = 4; | |
2189 | break; | |
c4aa876b | 2190 | |
252b5132 RH |
2191 | default: |
2192 | printf (_("unhandled %d\n"), arg); | |
2193 | goto fail; | |
2194 | } | |
772657e9 AS |
2195 | if (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh2a_nofpu_up) |
2196 | && ( arg == A_DISP_REG_M | |
2197 | || arg == A_DISP_REG_N)) | |
2198 | { | |
2199 | /* Check a few key IMM* fields for overflow. */ | |
2200 | int opf; | |
2201 | long val = user->immediate.X_add_number; | |
2202 | ||
2203 | for (opf = 0; opf < 4; opf ++) | |
2204 | switch (this_try->nibbles[opf]) | |
2205 | { | |
2206 | case IMM0_4: | |
2207 | case IMM1_4: | |
2208 | if (val < 0 || val > 15) | |
2209 | goto fail; | |
2210 | break; | |
2211 | case IMM0_4BY2: | |
2212 | case IMM1_4BY2: | |
2213 | if (val < 0 || val > 15 * 2) | |
2214 | goto fail; | |
2215 | break; | |
2216 | case IMM0_4BY4: | |
2217 | case IMM1_4BY4: | |
2218 | if (val < 0 || val > 15 * 4) | |
2219 | goto fail; | |
2220 | break; | |
2221 | default: | |
2222 | break; | |
2223 | } | |
2224 | } | |
252b5132 | 2225 | } |
f6f9408f | 2226 | if ( !SH_MERGE_ARCH_SET_VALID (valid_arch, this_try->arch)) |
a37c8f88 | 2227 | goto fail; |
f6f9408f | 2228 | valid_arch = SH_MERGE_ARCH_SET (valid_arch, this_try->arch); |
252b5132 | 2229 | return this_try; |
c4aa876b NC |
2230 | fail: |
2231 | ; | |
252b5132 RH |
2232 | } |
2233 | ||
2234 | return 0; | |
2235 | } | |
2236 | ||
252b5132 | 2237 | static void |
8edc77b9 | 2238 | insert (char *where, int how, int pcrel, sh_operand_info *op) |
252b5132 RH |
2239 | { |
2240 | fix_new_exp (frag_now, | |
2241 | where - frag_now->fr_literal, | |
2242 | 2, | |
015551fc | 2243 | &op->immediate, |
252b5132 RH |
2244 | pcrel, |
2245 | how); | |
2246 | } | |
2247 | ||
1d70c7fb AO |
2248 | static void |
2249 | insert4 (char * where, int how, int pcrel, sh_operand_info * op) | |
2250 | { | |
2251 | fix_new_exp (frag_now, | |
2252 | where - frag_now->fr_literal, | |
2253 | 4, | |
2254 | & op->immediate, | |
2255 | pcrel, | |
2256 | how); | |
2257 | } | |
252b5132 | 2258 | static void |
8edc77b9 | 2259 | build_relax (sh_opcode_info *opcode, sh_operand_info *op) |
252b5132 RH |
2260 | { |
2261 | int high_byte = target_big_endian ? 0 : 1; | |
2262 | char *p; | |
2263 | ||
2264 | if (opcode->arg[0] == A_BDISP8) | |
2265 | { | |
2266 | int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; | |
2267 | p = frag_var (rs_machine_dependent, | |
2268 | md_relax_table[C (what, COND32)].rlx_length, | |
2269 | md_relax_table[C (what, COND8)].rlx_length, | |
2270 | C (what, 0), | |
015551fc JR |
2271 | op->immediate.X_add_symbol, |
2272 | op->immediate.X_add_number, | |
252b5132 RH |
2273 | 0); |
2274 | p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); | |
2275 | } | |
2276 | else if (opcode->arg[0] == A_BDISP12) | |
2277 | { | |
2278 | p = frag_var (rs_machine_dependent, | |
2279 | md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, | |
2280 | md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, | |
2281 | C (UNCOND_JUMP, 0), | |
015551fc JR |
2282 | op->immediate.X_add_symbol, |
2283 | op->immediate.X_add_number, | |
252b5132 RH |
2284 | 0); |
2285 | p[high_byte] = (opcode->nibbles[0] << 4); | |
2286 | } | |
2287 | ||
2288 | } | |
2289 | ||
6b31947e | 2290 | /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */ |
d67b5d6d | 2291 | |
015551fc | 2292 | static char * |
8edc77b9 | 2293 | insert_loop_bounds (char *output, sh_operand_info *operand) |
015551fc JR |
2294 | { |
2295 | char *name; | |
2296 | symbolS *end_sym; | |
2297 | ||
2298 | /* Since the low byte of the opcode will be overwritten by the reloc, we | |
2299 | can just stash the high byte into both bytes and ignore endianness. */ | |
2300 | output[0] = 0x8c; | |
2301 | output[1] = 0x8c; | |
2302 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
2303 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
2304 | ||
2305 | if (sh_relax) | |
2306 | { | |
2307 | static int count = 0; | |
2308 | ||
2309 | /* If the last loop insn is a two-byte-insn, it is in danger of being | |
2310 | swapped with the insn after it. To prevent this, create a new | |
2311 | symbol - complete with SH_LABEL reloc - after the last loop insn. | |
2312 | If the last loop insn is four bytes long, the symbol will be | |
2313 | right in the middle, but four byte insns are not swapped anyways. */ | |
2314 | /* A REPEAT takes 6 bytes. The SH has a 32 bit address space. | |
2315 | Hence a 9 digit number should be enough to count all REPEATs. */ | |
2316 | name = alloca (11); | |
2317 | sprintf (name, "_R%x", count++ & 0x3fffffff); | |
c4aa876b | 2318 | end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag); |
015551fc JR |
2319 | /* Make this a local symbol. */ |
2320 | #ifdef OBJ_COFF | |
2321 | SF_SET_LOCAL (end_sym); | |
2322 | #endif /* OBJ_COFF */ | |
2323 | symbol_table_insert (end_sym); | |
2324 | end_sym->sy_value = operand[1].immediate; | |
2325 | end_sym->sy_value.X_add_number += 2; | |
2326 | fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL); | |
2327 | } | |
2328 | ||
2329 | output = frag_more (2); | |
2330 | output[0] = 0x8e; | |
2331 | output[1] = 0x8e; | |
2332 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
2333 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
2334 | ||
2335 | return frag_more (2); | |
2336 | } | |
2337 | ||
d67b5d6d | 2338 | /* Now we know what sort of opcodes it is, let's build the bytes. */ |
6b31947e | 2339 | |
0d10e182 | 2340 | static unsigned int |
8edc77b9 | 2341 | build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand) |
252b5132 | 2342 | { |
91d6fa6a | 2343 | int indx; |
1d70c7fb AO |
2344 | char nbuf[8]; |
2345 | char *output; | |
0d10e182 | 2346 | unsigned int size = 2; |
252b5132 | 2347 | int low_byte = target_big_endian ? 1 : 0; |
1d70c7fb | 2348 | int max_index = 4; |
8e45593f | 2349 | bfd_reloc_code_real_type r_type; |
87975d2a | 2350 | #ifdef OBJ_ELF |
8e45593f | 2351 | int unhandled_pic = 0; |
87975d2a | 2352 | #endif |
1d70c7fb | 2353 | |
252b5132 RH |
2354 | nbuf[0] = 0; |
2355 | nbuf[1] = 0; | |
2356 | nbuf[2] = 0; | |
2357 | nbuf[3] = 0; | |
1d70c7fb AO |
2358 | nbuf[4] = 0; |
2359 | nbuf[5] = 0; | |
2360 | nbuf[6] = 0; | |
2361 | nbuf[7] = 0; | |
2362 | ||
87975d2a | 2363 | #ifdef OBJ_ELF |
8e45593f NC |
2364 | for (indx = 0; indx < 3; indx++) |
2365 | if (opcode->arg[indx] == A_IMM | |
2366 | && operand[indx].type == A_IMM | |
2367 | && (operand[indx].immediate.X_op == O_PIC_reloc | |
2368 | || sh_PIC_related_p (operand[indx].immediate.X_add_symbol) | |
2369 | || sh_PIC_related_p (operand[indx].immediate.X_op_symbol))) | |
2370 | unhandled_pic = 1; | |
87975d2a | 2371 | #endif |
8e45593f | 2372 | |
1d70c7fb AO |
2373 | if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32)) |
2374 | { | |
2375 | output = frag_more (4); | |
2376 | size = 4; | |
2377 | max_index = 8; | |
2378 | } | |
2379 | else | |
2380 | output = frag_more (2); | |
252b5132 | 2381 | |
91d6fa6a | 2382 | for (indx = 0; indx < max_index; indx++) |
252b5132 | 2383 | { |
91d6fa6a | 2384 | sh_nibble_type i = opcode->nibbles[indx]; |
252b5132 RH |
2385 | if (i < 16) |
2386 | { | |
91d6fa6a | 2387 | nbuf[indx] = i; |
252b5132 RH |
2388 | } |
2389 | else | |
2390 | { | |
2391 | switch (i) | |
2392 | { | |
2393 | case REG_N: | |
6a5709a5 | 2394 | case REG_N_D: |
91d6fa6a | 2395 | nbuf[indx] = reg_n; |
252b5132 RH |
2396 | break; |
2397 | case REG_M: | |
91d6fa6a | 2398 | nbuf[indx] = reg_m; |
252b5132 | 2399 | break; |
d4845d57 JR |
2400 | case SDT_REG_N: |
2401 | if (reg_n < 2 || reg_n > 5) | |
2402 | as_bad (_("Invalid register: 'r%d'"), reg_n); | |
91d6fa6a | 2403 | nbuf[indx] = (reg_n & 3) | 4; |
d4845d57 | 2404 | break; |
252b5132 | 2405 | case REG_NM: |
91d6fa6a | 2406 | nbuf[indx] = reg_n | (reg_m >> 2); |
252b5132 | 2407 | break; |
c4aa876b | 2408 | case REG_B: |
91d6fa6a | 2409 | nbuf[indx] = reg_b | 0x08; |
252b5132 | 2410 | break; |
6a5709a5 | 2411 | case REG_N_B01: |
91d6fa6a | 2412 | nbuf[indx] = reg_n | 0x01; |
6a5709a5 | 2413 | break; |
1d70c7fb | 2414 | case IMM0_3s: |
91d6fa6a | 2415 | nbuf[indx] |= 0x08; |
1d70c7fb AO |
2416 | case IMM0_3c: |
2417 | insert (output + low_byte, BFD_RELOC_SH_IMM3, 0, operand); | |
2418 | break; | |
2419 | case IMM0_3Us: | |
91d6fa6a | 2420 | nbuf[indx] |= 0x80; |
1d70c7fb AO |
2421 | case IMM0_3Uc: |
2422 | insert (output + low_byte, BFD_RELOC_SH_IMM3U, 0, operand); | |
2423 | break; | |
2424 | case DISP0_12: | |
2425 | insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand); | |
2426 | break; | |
2427 | case DISP0_12BY2: | |
2428 | insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand); | |
2429 | break; | |
2430 | case DISP0_12BY4: | |
2431 | insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand); | |
2432 | break; | |
2433 | case DISP0_12BY8: | |
2434 | insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand); | |
2435 | break; | |
2436 | case DISP1_12: | |
2437 | insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand+1); | |
2438 | break; | |
2439 | case DISP1_12BY2: | |
2440 | insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand+1); | |
2441 | break; | |
2442 | case DISP1_12BY4: | |
2443 | insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand+1); | |
2444 | break; | |
2445 | case DISP1_12BY8: | |
2446 | insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand+1); | |
2447 | break; | |
2448 | case IMM0_20_4: | |
2449 | break; | |
2450 | case IMM0_20: | |
8e45593f | 2451 | r_type = BFD_RELOC_SH_DISP20; |
87975d2a | 2452 | #ifdef OBJ_ELF |
8e45593f NC |
2453 | if (sh_check_fixup (&operand->immediate, &r_type)) |
2454 | as_bad (_("Invalid PIC expression.")); | |
2455 | unhandled_pic = 0; | |
87975d2a | 2456 | #endif |
8e45593f | 2457 | insert4 (output, r_type, 0, operand); |
1d70c7fb AO |
2458 | break; |
2459 | case IMM0_20BY8: | |
2460 | insert4 (output, BFD_RELOC_SH_DISP20BY8, 0, operand); | |
2461 | break; | |
015551fc JR |
2462 | case IMM0_4BY4: |
2463 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); | |
2464 | break; | |
2465 | case IMM0_4BY2: | |
2466 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand); | |
2467 | break; | |
2468 | case IMM0_4: | |
2469 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand); | |
2470 | break; | |
2471 | case IMM1_4BY4: | |
2472 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1); | |
2473 | break; | |
2474 | case IMM1_4BY2: | |
2475 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1); | |
252b5132 | 2476 | break; |
015551fc JR |
2477 | case IMM1_4: |
2478 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1); | |
252b5132 | 2479 | break; |
015551fc JR |
2480 | case IMM0_8BY4: |
2481 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand); | |
252b5132 | 2482 | break; |
015551fc JR |
2483 | case IMM0_8BY2: |
2484 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand); | |
252b5132 | 2485 | break; |
015551fc JR |
2486 | case IMM0_8: |
2487 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand); | |
252b5132 | 2488 | break; |
015551fc JR |
2489 | case IMM1_8BY4: |
2490 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1); | |
252b5132 | 2491 | break; |
015551fc JR |
2492 | case IMM1_8BY2: |
2493 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1); | |
2494 | break; | |
2495 | case IMM1_8: | |
2496 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1); | |
252b5132 RH |
2497 | break; |
2498 | case PCRELIMM_8BY4: | |
7679ead9 AO |
2499 | insert (output, BFD_RELOC_SH_PCRELIMM8BY4, |
2500 | operand->type != A_DISP_PC_ABS, operand); | |
252b5132 RH |
2501 | break; |
2502 | case PCRELIMM_8BY2: | |
7679ead9 AO |
2503 | insert (output, BFD_RELOC_SH_PCRELIMM8BY2, |
2504 | operand->type != A_DISP_PC_ABS, operand); | |
015551fc JR |
2505 | break; |
2506 | case REPEAT: | |
2507 | output = insert_loop_bounds (output, operand); | |
91d6fa6a | 2508 | nbuf[indx] = opcode->nibbles[3]; |
015551fc | 2509 | operand += 2; |
252b5132 RH |
2510 | break; |
2511 | default: | |
2512 | printf (_("failed for %d\n"), i); | |
2513 | } | |
2514 | } | |
2515 | } | |
87975d2a | 2516 | #ifdef OBJ_ELF |
8e45593f NC |
2517 | if (unhandled_pic) |
2518 | as_bad (_("misplaced PIC operand")); | |
87975d2a | 2519 | #endif |
c4aa876b NC |
2520 | if (!target_big_endian) |
2521 | { | |
2522 | output[1] = (nbuf[0] << 4) | (nbuf[1]); | |
2523 | output[0] = (nbuf[2] << 4) | (nbuf[3]); | |
2524 | } | |
2525 | else | |
2526 | { | |
2527 | output[0] = (nbuf[0] << 4) | (nbuf[1]); | |
2528 | output[1] = (nbuf[2] << 4) | (nbuf[3]); | |
2529 | } | |
1d70c7fb AO |
2530 | if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32)) |
2531 | { | |
2532 | if (!target_big_endian) | |
2533 | { | |
2534 | output[3] = (nbuf[4] << 4) | (nbuf[5]); | |
2535 | output[2] = (nbuf[6] << 4) | (nbuf[7]); | |
2536 | } | |
2537 | else | |
2538 | { | |
2539 | output[2] = (nbuf[4] << 4) | (nbuf[5]); | |
2540 | output[3] = (nbuf[6] << 4) | (nbuf[7]); | |
2541 | } | |
2542 | } | |
0d10e182 | 2543 | return size; |
252b5132 RH |
2544 | } |
2545 | ||
d4845d57 JR |
2546 | /* Find an opcode at the start of *STR_P in the hash table, and set |
2547 | *STR_P to the first character after the last one read. */ | |
252b5132 | 2548 | |
d4845d57 | 2549 | static sh_opcode_info * |
8edc77b9 | 2550 | find_cooked_opcode (char **str_p) |
252b5132 | 2551 | { |
d4845d57 | 2552 | char *str = *str_p; |
252b5132 RH |
2553 | unsigned char *op_start; |
2554 | unsigned char *op_end; | |
252b5132 | 2555 | char name[20]; |
6d0cb78c | 2556 | unsigned int nlen = 0; |
c4aa876b | 2557 | |
6b31947e | 2558 | /* Drop leading whitespace. */ |
252b5132 RH |
2559 | while (*str == ' ') |
2560 | str++; | |
2561 | ||
d4845d57 JR |
2562 | /* Find the op code end. |
2563 | The pre-processor will eliminate whitespace in front of | |
2564 | any '@' after the first argument; we may be called from | |
2565 | assemble_ppi, so the opcode might be terminated by an '@'. */ | |
2132e3a3 | 2566 | for (op_start = op_end = (unsigned char *) str; |
252b5132 | 2567 | *op_end |
6d0cb78c | 2568 | && nlen < sizeof (name) - 1 |
d4845d57 | 2569 | && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; |
252b5132 RH |
2570 | op_end++) |
2571 | { | |
2572 | unsigned char c = op_start[nlen]; | |
2573 | ||
2574 | /* The machine independent code will convert CMP/EQ into cmp/EQ | |
d4845d57 JR |
2575 | because it thinks the '/' is the end of the symbol. Moreover, |
2576 | all but the first sub-insn is a parallel processing insn won't | |
3882b010 | 2577 | be capitalized. Instead of hacking up the machine independent |
d4845d57 | 2578 | code, we just deal with it here. */ |
3882b010 | 2579 | c = TOLOWER (c); |
252b5132 RH |
2580 | name[nlen] = c; |
2581 | nlen++; | |
2582 | } | |
c4aa876b | 2583 | |
252b5132 | 2584 | name[nlen] = 0; |
2132e3a3 | 2585 | *str_p = (char *) op_end; |
252b5132 RH |
2586 | |
2587 | if (nlen == 0) | |
6b31947e | 2588 | as_bad (_("can't find opcode ")); |
252b5132 | 2589 | |
d4845d57 JR |
2590 | return (sh_opcode_info *) hash_find (opcode_hash_control, name); |
2591 | } | |
2592 | ||
2593 | /* Assemble a parallel processing insn. */ | |
2594 | #define DDT_BASE 0xf000 /* Base value for double data transfer insns */ | |
6b31947e | 2595 | |
0d10e182 | 2596 | static unsigned int |
8edc77b9 | 2597 | assemble_ppi (char *op_end, sh_opcode_info *opcode) |
d4845d57 JR |
2598 | { |
2599 | int movx = 0; | |
2600 | int movy = 0; | |
2601 | int cond = 0; | |
2602 | int field_b = 0; | |
2603 | char *output; | |
2604 | int move_code; | |
0d10e182 | 2605 | unsigned int size; |
d4845d57 | 2606 | |
d4845d57 JR |
2607 | for (;;) |
2608 | { | |
2609 | sh_operand_info operand[3]; | |
2610 | ||
ac62e7a3 JR |
2611 | /* Some insn ignore one or more register fields, e.g. psts machl,a0. |
2612 | Make sure we encode a defined insn pattern. */ | |
2613 | reg_x = 0; | |
2614 | reg_y = 0; | |
2615 | reg_n = 0; | |
2616 | ||
d4845d57 JR |
2617 | if (opcode->arg[0] != A_END) |
2618 | op_end = get_operands (opcode, op_end, operand); | |
88da98f3 | 2619 | try_another_opcode: |
d4845d57 JR |
2620 | opcode = get_specific (opcode, operand); |
2621 | if (opcode == 0) | |
2622 | { | |
6b31947e | 2623 | /* Couldn't find an opcode which matched the operands. */ |
d4845d57 | 2624 | char *where = frag_more (2); |
0d10e182 | 2625 | size = 2; |
d4845d57 JR |
2626 | |
2627 | where[0] = 0x0; | |
2628 | where[1] = 0x0; | |
2629 | as_bad (_("invalid operands for opcode")); | |
0d10e182 | 2630 | return size; |
d4845d57 | 2631 | } |
c4aa876b | 2632 | |
d4845d57 JR |
2633 | if (opcode->nibbles[0] != PPI) |
2634 | as_bad (_("insn can't be combined with parallel processing insn")); | |
2635 | ||
2636 | switch (opcode->nibbles[1]) | |
2637 | { | |
2638 | ||
2639 | case NOPX: | |
2640 | if (movx) | |
2641 | as_bad (_("multiple movx specifications")); | |
2642 | movx = DDT_BASE; | |
2643 | break; | |
2644 | case NOPY: | |
2645 | if (movy) | |
2646 | as_bad (_("multiple movy specifications")); | |
2647 | movy = DDT_BASE; | |
2648 | break; | |
2649 | ||
88da98f3 MS |
2650 | case MOVX_NOPY: |
2651 | if (movx) | |
2652 | as_bad (_("multiple movx specifications")); | |
2653 | if ((reg_n < 4 || reg_n > 5) | |
2654 | && (reg_n < 0 || reg_n > 1)) | |
2655 | as_bad (_("invalid movx address register")); | |
2656 | if (movy && movy != DDT_BASE) | |
2657 | as_bad (_("insn cannot be combined with non-nopy")); | |
2658 | movx = ((((reg_n & 1) != 0) << 9) | |
2659 | + (((reg_n & 4) == 0) << 8) | |
2660 | + (reg_x << 6) | |
2661 | + (opcode->nibbles[2] << 4) | |
2662 | + opcode->nibbles[3] | |
2663 | + DDT_BASE); | |
2664 | break; | |
2665 | ||
2666 | case MOVY_NOPX: | |
2667 | if (movy) | |
2668 | as_bad (_("multiple movy specifications")); | |
2669 | if ((reg_n < 6 || reg_n > 7) | |
2670 | && (reg_n < 2 || reg_n > 3)) | |
2671 | as_bad (_("invalid movy address register")); | |
2672 | if (movx && movx != DDT_BASE) | |
2673 | as_bad (_("insn cannot be combined with non-nopx")); | |
2674 | movy = ((((reg_n & 1) != 0) << 8) | |
2675 | + (((reg_n & 4) == 0) << 9) | |
2676 | + (reg_y << 6) | |
2677 | + (opcode->nibbles[2] << 4) | |
2678 | + opcode->nibbles[3] | |
2679 | + DDT_BASE); | |
2680 | break; | |
2681 | ||
d4845d57 JR |
2682 | case MOVX: |
2683 | if (movx) | |
2684 | as_bad (_("multiple movx specifications")); | |
88da98f3 MS |
2685 | if (movy & 0x2ac) |
2686 | as_bad (_("previous movy requires nopx")); | |
d4845d57 JR |
2687 | if (reg_n < 4 || reg_n > 5) |
2688 | as_bad (_("invalid movx address register")); | |
2689 | if (opcode->nibbles[2] & 8) | |
2690 | { | |
2691 | if (reg_m == A_A1_NUM) | |
2692 | movx = 1 << 7; | |
2693 | else if (reg_m != A_A0_NUM) | |
2694 | as_bad (_("invalid movx dsp register")); | |
2695 | } | |
2696 | else | |
2697 | { | |
2698 | if (reg_x > 1) | |
2699 | as_bad (_("invalid movx dsp register")); | |
2700 | movx = reg_x << 7; | |
2701 | } | |
2702 | movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; | |
2703 | break; | |
2704 | ||
2705 | case MOVY: | |
2706 | if (movy) | |
2707 | as_bad (_("multiple movy specifications")); | |
88da98f3 MS |
2708 | if (movx & 0x153) |
2709 | as_bad (_("previous movx requires nopy")); | |
d4845d57 JR |
2710 | if (opcode->nibbles[2] & 8) |
2711 | { | |
2712 | /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, | |
2713 | so add 8 more. */ | |
2714 | movy = 8; | |
2715 | if (reg_m == A_A1_NUM) | |
2716 | movy += 1 << 6; | |
2717 | else if (reg_m != A_A0_NUM) | |
2718 | as_bad (_("invalid movy dsp register")); | |
2719 | } | |
2720 | else | |
2721 | { | |
2722 | if (reg_y > 1) | |
2723 | as_bad (_("invalid movy dsp register")); | |
2724 | movy = reg_y << 6; | |
2725 | } | |
2726 | if (reg_n < 6 || reg_n > 7) | |
2727 | as_bad (_("invalid movy address register")); | |
2728 | movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; | |
2729 | break; | |
2730 | ||
2731 | case PSH: | |
015551fc | 2732 | if (operand[0].immediate.X_op != O_constant) |
d4845d57 JR |
2733 | as_bad (_("dsp immediate shift value not constant")); |
2734 | field_b = ((opcode->nibbles[2] << 12) | |
015551fc | 2735 | | (operand[0].immediate.X_add_number & 127) << 4 |
d4845d57 JR |
2736 | | reg_n); |
2737 | break; | |
88da98f3 MS |
2738 | case PPI3NC: |
2739 | if (cond) | |
2740 | { | |
2741 | opcode++; | |
2742 | goto try_another_opcode; | |
2743 | } | |
2744 | /* Fall through. */ | |
d4845d57 JR |
2745 | case PPI3: |
2746 | if (field_b) | |
2747 | as_bad (_("multiple parallel processing specifications")); | |
2748 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
2749 | + (reg_x << 6) + (reg_y << 4) + reg_n); | |
88da98f3 MS |
2750 | switch (opcode->nibbles[4]) |
2751 | { | |
2752 | case HEX_0: | |
2753 | case HEX_XX00: | |
2754 | case HEX_00YY: | |
2755 | break; | |
2756 | case HEX_1: | |
2757 | case HEX_4: | |
2758 | field_b += opcode->nibbles[4] << 4; | |
2759 | break; | |
2760 | default: | |
2761 | abort (); | |
2762 | } | |
d4845d57 JR |
2763 | break; |
2764 | case PDC: | |
2765 | if (cond) | |
2766 | as_bad (_("multiple condition specifications")); | |
2767 | cond = opcode->nibbles[2] << 8; | |
2768 | if (*op_end) | |
2769 | goto skip_cond_check; | |
2770 | break; | |
2771 | case PPIC: | |
2772 | if (field_b) | |
2773 | as_bad (_("multiple parallel processing specifications")); | |
2774 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
2775 | + cond + (reg_x << 6) + (reg_y << 4) + reg_n); | |
2776 | cond = 0; | |
88da98f3 MS |
2777 | switch (opcode->nibbles[4]) |
2778 | { | |
2779 | case HEX_0: | |
2780 | case HEX_XX00: | |
2781 | case HEX_00YY: | |
2782 | break; | |
2783 | case HEX_1: | |
2784 | case HEX_4: | |
2785 | field_b += opcode->nibbles[4] << 4; | |
2786 | break; | |
2787 | default: | |
2788 | abort (); | |
2789 | } | |
d4845d57 JR |
2790 | break; |
2791 | case PMUL: | |
2792 | if (field_b) | |
2793 | { | |
88da98f3 MS |
2794 | if ((field_b & 0xef00) == 0xa100) |
2795 | field_b -= 0x8100; | |
2796 | /* pclr Dz pmuls Se,Sf,Dg */ | |
2797 | else if ((field_b & 0xff00) == 0x8d00 | |
f6f9408f | 2798 | && (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh4al_dsp_up))) |
88da98f3 | 2799 | { |
f6f9408f | 2800 | valid_arch = SH_MERGE_ARCH_SET (valid_arch, arch_sh4al_dsp_up); |
88da98f3 MS |
2801 | field_b -= 0x8cf0; |
2802 | } | |
2803 | else | |
d4845d57 | 2804 | as_bad (_("insn cannot be combined with pmuls")); |
d4845d57 JR |
2805 | switch (field_b & 0xf) |
2806 | { | |
2807 | case A_X0_NUM: | |
2808 | field_b += 0 - A_X0_NUM; | |
2809 | break; | |
2810 | case A_Y0_NUM: | |
2811 | field_b += 1 - A_Y0_NUM; | |
2812 | break; | |
2813 | case A_A0_NUM: | |
2814 | field_b += 2 - A_A0_NUM; | |
2815 | break; | |
2816 | case A_A1_NUM: | |
2817 | field_b += 3 - A_A1_NUM; | |
2818 | break; | |
2819 | default: | |
88da98f3 | 2820 | as_bad (_("bad combined pmuls output operand")); |
d4845d57 | 2821 | } |
7dd04abd JR |
2822 | /* Generate warning if the destination register for padd / psub |
2823 | and pmuls is the same ( only for A0 or A1 ). | |
2824 | If the last nibble is 1010 then A0 is used in both | |
2825 | padd / psub and pmuls. If it is 1111 then A1 is used | |
2826 | as destination register in both padd / psub and pmuls. */ | |
5db33d76 JR |
2827 | |
2828 | if ((((field_b | reg_efg) & 0x000F) == 0x000A) | |
2829 | || (((field_b | reg_efg) & 0x000F) == 0x000F)) | |
2830 | as_warn (_("destination register is same for parallel insns")); | |
d4845d57 JR |
2831 | } |
2832 | field_b += 0x4000 + reg_efg; | |
2833 | break; | |
2834 | default: | |
2835 | abort (); | |
2836 | } | |
2837 | if (cond) | |
2838 | { | |
2839 | as_bad (_("condition not followed by conditionalizable insn")); | |
2840 | cond = 0; | |
2841 | } | |
2842 | if (! *op_end) | |
2843 | break; | |
2844 | skip_cond_check: | |
2845 | opcode = find_cooked_opcode (&op_end); | |
2846 | if (opcode == NULL) | |
2847 | { | |
2848 | (as_bad | |
2849 | (_("unrecognized characters at end of parallel processing insn"))); | |
2850 | break; | |
2851 | } | |
2852 | } | |
2853 | ||
2854 | move_code = movx | movy; | |
2855 | if (field_b) | |
2856 | { | |
2857 | /* Parallel processing insn. */ | |
2858 | unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b; | |
2859 | ||
2860 | output = frag_more (4); | |
0d10e182 | 2861 | size = 4; |
d4845d57 JR |
2862 | if (! target_big_endian) |
2863 | { | |
2864 | output[3] = ppi_code >> 8; | |
2865 | output[2] = ppi_code; | |
2866 | } | |
2867 | else | |
2868 | { | |
2869 | output[2] = ppi_code >> 8; | |
2870 | output[3] = ppi_code; | |
2871 | } | |
2872 | move_code |= 0xf800; | |
2873 | } | |
2874 | else | |
0d10e182 JL |
2875 | { |
2876 | /* Just a double data transfer. */ | |
2877 | output = frag_more (2); | |
2878 | size = 2; | |
2879 | } | |
d4845d57 JR |
2880 | if (! target_big_endian) |
2881 | { | |
2882 | output[1] = move_code >> 8; | |
2883 | output[0] = move_code; | |
2884 | } | |
2885 | else | |
2886 | { | |
2887 | output[0] = move_code >> 8; | |
2888 | output[1] = move_code; | |
2889 | } | |
0d10e182 | 2890 | return size; |
d4845d57 JR |
2891 | } |
2892 | ||
2893 | /* This is the guts of the machine-dependent assembler. STR points to a | |
2894 | machine dependent instruction. This function is supposed to emit | |
6b31947e | 2895 | the frags/bytes it assembles to. */ |
d4845d57 JR |
2896 | |
2897 | void | |
8edc77b9 | 2898 | md_assemble (char *str) |
d4845d57 | 2899 | { |
2132e3a3 | 2900 | char *op_end; |
d4845d57 JR |
2901 | sh_operand_info operand[3]; |
2902 | sh_opcode_info *opcode; | |
dda5ecfc | 2903 | unsigned int size = 0; |
ae51a426 | 2904 | char *initial_str = str; |
d4845d57 | 2905 | |
324bfcf3 AO |
2906 | #ifdef HAVE_SH64 |
2907 | if (sh64_isa_mode == sh64_isa_shmedia) | |
2908 | { | |
2909 | shmedia_md_assemble (str); | |
2910 | return; | |
2911 | } | |
2912 | else | |
2913 | { | |
2914 | /* If we've seen pseudo-directives, make sure any emitted data or | |
2915 | frags are marked as data. */ | |
b34976b6 | 2916 | if (!seen_insn) |
324bfcf3 | 2917 | { |
b34976b6 | 2918 | sh64_update_contents_mark (TRUE); |
324bfcf3 AO |
2919 | sh64_set_contents_type (CRT_SH5_ISA16); |
2920 | } | |
2921 | ||
b34976b6 | 2922 | seen_insn = TRUE; |
324bfcf3 AO |
2923 | } |
2924 | #endif /* HAVE_SH64 */ | |
2925 | ||
d4845d57 JR |
2926 | opcode = find_cooked_opcode (&str); |
2927 | op_end = str; | |
252b5132 RH |
2928 | |
2929 | if (opcode == NULL) | |
2930 | { | |
ae51a426 | 2931 | /* The opcode is not in the hash table. |
708587a4 | 2932 | This means we definitely have an assembly failure, |
ae51a426 JR |
2933 | but the instruction may be valid in another CPU variant. |
2934 | In this case emit something better than 'unknown opcode'. | |
2935 | Search the full table in sh-opc.h to check. */ | |
2936 | ||
2937 | char *name = initial_str; | |
2938 | int name_length = 0; | |
2939 | const sh_opcode_info *op; | |
2940 | int found = 0; | |
2941 | ||
2942 | /* identify opcode in string */ | |
871ec896 | 2943 | while (ISSPACE (*name)) |
ae51a426 JR |
2944 | { |
2945 | name++; | |
2946 | } | |
871ec896 | 2947 | while (!ISSPACE (name[name_length])) |
ae51a426 JR |
2948 | { |
2949 | name_length++; | |
2950 | } | |
2951 | ||
2952 | /* search for opcode in full list */ | |
2953 | for (op = sh_table; op->name; op++) | |
2954 | { | |
f6f9408f JR |
2955 | if (strncasecmp (op->name, name, name_length) == 0 |
2956 | && op->name[name_length] == '\0') | |
ae51a426 JR |
2957 | { |
2958 | found = 1; | |
2959 | break; | |
2960 | } | |
2961 | } | |
2962 | ||
2963 | if ( found ) | |
2964 | { | |
2965 | as_bad (_("opcode not valid for this cpu variant")); | |
2966 | } | |
2967 | else | |
2968 | { | |
2969 | as_bad (_("unknown opcode")); | |
2970 | } | |
252b5132 RH |
2971 | return; |
2972 | } | |
2973 | ||
2974 | if (sh_relax | |
2975 | && ! seg_info (now_seg)->tc_segment_info_data.in_code) | |
2976 | { | |
2977 | /* Output a CODE reloc to tell the linker that the following | |
2978 | bytes are instructions, not data. */ | |
2979 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
2980 | BFD_RELOC_SH_CODE); | |
2981 | seg_info (now_seg)->tc_segment_info_data.in_code = 1; | |
2982 | } | |
2983 | ||
d4845d57 JR |
2984 | if (opcode->nibbles[0] == PPI) |
2985 | { | |
0d10e182 | 2986 | size = assemble_ppi (op_end, opcode); |
252b5132 RH |
2987 | } |
2988 | else | |
2989 | { | |
0d10e182 JL |
2990 | if (opcode->arg[0] == A_BDISP12 |
2991 | || opcode->arg[0] == A_BDISP8) | |
252b5132 | 2992 | { |
26c9b704 JR |
2993 | /* Since we skip get_specific here, we have to check & update |
2994 | valid_arch now. */ | |
f6f9408f JR |
2995 | if (SH_MERGE_ARCH_SET_VALID (valid_arch, opcode->arch)) |
2996 | valid_arch = SH_MERGE_ARCH_SET (valid_arch, opcode->arch); | |
26c9b704 JR |
2997 | else |
2998 | as_bad (_("Delayed branches not available on SH1")); | |
0d10e182 JL |
2999 | parse_exp (op_end + 1, &operand[0]); |
3000 | build_relax (opcode, &operand[0]); | |
86157c20 AS |
3001 | |
3002 | /* All branches are currently 16 bit. */ | |
3003 | size = 2; | |
5fc44b2d JR |
3004 | } |
3005 | else | |
3006 | { | |
0d10e182 JL |
3007 | if (opcode->arg[0] == A_END) |
3008 | { | |
3009 | /* Ignore trailing whitespace. If there is any, it has already | |
3010 | been compressed to a single space. */ | |
3011 | if (*op_end == ' ') | |
3012 | op_end++; | |
3013 | } | |
3014 | else | |
3015 | { | |
3016 | op_end = get_operands (opcode, op_end, operand); | |
3017 | } | |
3018 | opcode = get_specific (opcode, operand); | |
252b5132 | 3019 | |
0d10e182 JL |
3020 | if (opcode == 0) |
3021 | { | |
3022 | /* Couldn't find an opcode which matched the operands. */ | |
3023 | char *where = frag_more (2); | |
3024 | size = 2; | |
252b5132 | 3025 | |
0d10e182 JL |
3026 | where[0] = 0x0; |
3027 | where[1] = 0x0; | |
3028 | as_bad (_("invalid operands for opcode")); | |
3029 | } | |
3030 | else | |
3031 | { | |
3032 | if (*op_end) | |
3033 | as_bad (_("excess operands: '%s'"), op_end); | |
3034 | ||
3035 | size = build_Mytes (opcode, operand); | |
3036 | } | |
252b5132 | 3037 | } |
0d10e182 | 3038 | } |
252b5132 | 3039 | |
4dc7ead9 | 3040 | dwarf2_emit_insn (size); |
252b5132 RH |
3041 | } |
3042 | ||
3043 | /* This routine is called each time a label definition is seen. It | |
3044 | emits a BFD_RELOC_SH_LABEL reloc if necessary. */ | |
3045 | ||
3046 | void | |
07a53e5c | 3047 | sh_frob_label (symbolS *sym) |
252b5132 RH |
3048 | { |
3049 | static fragS *last_label_frag; | |
3050 | static int last_label_offset; | |
3051 | ||
3052 | if (sh_relax | |
3053 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
3054 | { | |
3055 | int offset; | |
3056 | ||
3057 | offset = frag_now_fix (); | |
3058 | if (frag_now != last_label_frag | |
3059 | || offset != last_label_offset) | |
c4aa876b | 3060 | { |
252b5132 RH |
3061 | fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); |
3062 | last_label_frag = frag_now; | |
3063 | last_label_offset = offset; | |
3064 | } | |
3065 | } | |
07a53e5c RH |
3066 | |
3067 | dwarf2_emit_label (sym); | |
252b5132 RH |
3068 | } |
3069 | ||
3070 | /* This routine is called when the assembler is about to output some | |
3071 | data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ | |
3072 | ||
3073 | void | |
8edc77b9 | 3074 | sh_flush_pending_output (void) |
252b5132 RH |
3075 | { |
3076 | if (sh_relax | |
3077 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
3078 | { | |
3079 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
3080 | BFD_RELOC_SH_DATA); | |
3081 | seg_info (now_seg)->tc_segment_info_data.in_code = 0; | |
3082 | } | |
3083 | } | |
3084 | ||
3085 | symbolS * | |
8edc77b9 | 3086 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
252b5132 RH |
3087 | { |
3088 | return 0; | |
3089 | } | |
3090 | ||
6b31947e | 3091 | /* Various routines to kill one day. */ |
6b31947e | 3092 | |
252b5132 | 3093 | char * |
8edc77b9 | 3094 | md_atof (int type, char *litP, int *sizeP) |
252b5132 | 3095 | { |
499ac353 | 3096 | return ieee_md_atof (type, litP, sizeP, target_big_endian); |
252b5132 RH |
3097 | } |
3098 | ||
3099 | /* Handle the .uses pseudo-op. This pseudo-op is used just before a | |
3100 | call instruction. It refers to a label of the instruction which | |
3101 | loads the register which the call uses. We use it to generate a | |
3102 | special reloc for the linker. */ | |
3103 | ||
3104 | static void | |
8edc77b9 | 3105 | s_uses (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
3106 | { |
3107 | expressionS ex; | |
3108 | ||
3109 | if (! sh_relax) | |
3110 | as_warn (_(".uses pseudo-op seen when not relaxing")); | |
3111 | ||
3112 | expression (&ex); | |
3113 | ||
3114 | if (ex.X_op != O_symbol || ex.X_add_number != 0) | |
3115 | { | |
3116 | as_bad (_("bad .uses format")); | |
3117 | ignore_rest_of_line (); | |
3118 | return; | |
3119 | } | |
3120 | ||
3121 | fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); | |
3122 | ||
3123 | demand_empty_rest_of_line (); | |
3124 | } | |
3125 | \f | |
37dedf66 NC |
3126 | enum options |
3127 | { | |
3128 | OPTION_RELAX = OPTION_MD_BASE, | |
3129 | OPTION_BIG, | |
3130 | OPTION_LITTLE, | |
3131 | OPTION_SMALL, | |
3132 | OPTION_DSP, | |
3133 | OPTION_ISA, | |
3134 | OPTION_RENESAS, | |
3135 | OPTION_ALLOW_REG_PREFIX, | |
3136 | #ifdef HAVE_SH64 | |
3137 | OPTION_ABI, | |
3138 | OPTION_NO_MIX, | |
3139 | OPTION_SHCOMPACT_CONST_CRANGE, | |
3140 | OPTION_NO_EXPAND, | |
3141 | OPTION_PT32, | |
3142 | #endif | |
6fd4f6cc | 3143 | OPTION_H_TICK_HEX, |
8e45593f NC |
3144 | #ifdef OBJ_ELF |
3145 | OPTION_FDPIC, | |
3146 | #endif | |
37dedf66 NC |
3147 | OPTION_DUMMY /* Not used. This is just here to make it easy to add and subtract options from this enum. */ |
3148 | }; | |
3149 | ||
5a38dc70 | 3150 | const char *md_shortopts = ""; |
6b31947e NC |
3151 | struct option md_longopts[] = |
3152 | { | |
252b5132 | 3153 | {"relax", no_argument, NULL, OPTION_RELAX}, |
05982cac | 3154 | {"big", no_argument, NULL, OPTION_BIG}, |
252b5132 | 3155 | {"little", no_argument, NULL, OPTION_LITTLE}, |
784906c5 NC |
3156 | /* The next two switches are here because the |
3157 | generic parts of the linker testsuite uses them. */ | |
3158 | {"EB", no_argument, NULL, OPTION_BIG}, | |
3159 | {"EL", no_argument, NULL, OPTION_LITTLE}, | |
252b5132 | 3160 | {"small", no_argument, NULL, OPTION_SMALL}, |
d4845d57 | 3161 | {"dsp", no_argument, NULL, OPTION_DSP}, |
37dedf66 | 3162 | {"isa", required_argument, NULL, OPTION_ISA}, |
f55629b8 | 3163 | {"renesas", no_argument, NULL, OPTION_RENESAS}, |
37dedf66 | 3164 | {"allow-reg-prefix", no_argument, NULL, OPTION_ALLOW_REG_PREFIX}, |
f55629b8 | 3165 | |
324bfcf3 | 3166 | #ifdef HAVE_SH64 |
324bfcf3 AO |
3167 | {"abi", required_argument, NULL, OPTION_ABI}, |
3168 | {"no-mix", no_argument, NULL, OPTION_NO_MIX}, | |
3169 | {"shcompact-const-crange", no_argument, NULL, OPTION_SHCOMPACT_CONST_CRANGE}, | |
3170 | {"no-expand", no_argument, NULL, OPTION_NO_EXPAND}, | |
3171 | {"expand-pt32", no_argument, NULL, OPTION_PT32}, | |
3172 | #endif /* HAVE_SH64 */ | |
6fd4f6cc | 3173 | { "h-tick-hex", no_argument, NULL, OPTION_H_TICK_HEX }, |
324bfcf3 | 3174 | |
8e45593f NC |
3175 | #ifdef OBJ_ELF |
3176 | {"fdpic", no_argument, NULL, OPTION_FDPIC}, | |
3177 | #endif | |
3178 | ||
252b5132 RH |
3179 | {NULL, no_argument, NULL, 0} |
3180 | }; | |
c4aa876b | 3181 | size_t md_longopts_size = sizeof (md_longopts); |
252b5132 RH |
3182 | |
3183 | int | |
8edc77b9 | 3184 | md_parse_option (int c, char *arg ATTRIBUTE_UNUSED) |
252b5132 RH |
3185 | { |
3186 | switch (c) | |
3187 | { | |
3188 | case OPTION_RELAX: | |
3189 | sh_relax = 1; | |
3190 | break; | |
3191 | ||
05982cac HPN |
3192 | case OPTION_BIG: |
3193 | target_big_endian = 1; | |
3194 | break; | |
3195 | ||
252b5132 | 3196 | case OPTION_LITTLE: |
252b5132 RH |
3197 | target_big_endian = 0; |
3198 | break; | |
3199 | ||
3200 | case OPTION_SMALL: | |
3201 | sh_small = 1; | |
3202 | break; | |
3203 | ||
d4845d57 | 3204 | case OPTION_DSP: |
e38bc3b5 | 3205 | preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); |
d4845d57 JR |
3206 | break; |
3207 | ||
f55629b8 KK |
3208 | case OPTION_RENESAS: |
3209 | dont_adjust_reloc_32 = 1; | |
3210 | break; | |
3211 | ||
37dedf66 NC |
3212 | case OPTION_ALLOW_REG_PREFIX: |
3213 | allow_dollar_register_prefix = 1; | |
3214 | break; | |
3215 | ||
324bfcf3 | 3216 | case OPTION_ISA: |
871ec896 | 3217 | if (strcasecmp (arg, "dsp") == 0) |
e38bc3b5 | 3218 | preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); |
88da98f3 | 3219 | else if (strcasecmp (arg, "fp") == 0) |
e38bc3b5 | 3220 | preset_target_arch = arch_sh_up & ~arch_sh_has_dsp; |
bdfaef52 | 3221 | else if (strcasecmp (arg, "any") == 0) |
e38bc3b5 | 3222 | preset_target_arch = arch_sh_up; |
bdfaef52 JR |
3223 | #ifdef HAVE_SH64 |
3224 | else if (strcasecmp (arg, "shmedia") == 0) | |
324bfcf3 AO |
3225 | { |
3226 | if (sh64_isa_mode == sh64_isa_shcompact) | |
3227 | as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia")); | |
3228 | sh64_isa_mode = sh64_isa_shmedia; | |
3229 | } | |
3230 | else if (strcasecmp (arg, "shcompact") == 0) | |
3231 | { | |
3232 | if (sh64_isa_mode == sh64_isa_shmedia) | |
3233 | as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact")); | |
3234 | if (sh64_abi == sh64_abi_64) | |
3235 | as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact")); | |
3236 | sh64_isa_mode = sh64_isa_shcompact; | |
3237 | } | |
bdfaef52 | 3238 | #endif /* HAVE_SH64 */ |
324bfcf3 | 3239 | else |
f6f9408f JR |
3240 | { |
3241 | extern const bfd_arch_info_type bfd_sh_arch; | |
871ec896 | 3242 | bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; |
37dedf66 | 3243 | |
f6f9408f JR |
3244 | preset_target_arch = 0; |
3245 | for (; bfd_arch; bfd_arch=bfd_arch->next) | |
3246 | { | |
3247 | int len = strlen(bfd_arch->printable_name); | |
3739860c | 3248 | |
f6f9408f JR |
3249 | if (bfd_arch->mach == bfd_mach_sh5) |
3250 | continue; | |
3739860c | 3251 | |
f6f9408f JR |
3252 | if (strncasecmp (bfd_arch->printable_name, arg, len) != 0) |
3253 | continue; | |
3254 | ||
3255 | if (arg[len] == '\0') | |
3256 | preset_target_arch = | |
3257 | sh_get_arch_from_bfd_mach (bfd_arch->mach); | |
3258 | else if (strcasecmp(&arg[len], "-up") == 0) | |
3259 | preset_target_arch = | |
3260 | sh_get_arch_up_from_bfd_mach (bfd_arch->mach); | |
3261 | else | |
3262 | continue; | |
3263 | break; | |
3264 | } | |
3739860c | 3265 | |
f6f9408f | 3266 | if (!preset_target_arch) |
20203fb9 | 3267 | as_bad (_("Invalid argument to --isa option: %s"), arg); |
f6f9408f | 3268 | } |
324bfcf3 AO |
3269 | break; |
3270 | ||
bdfaef52 | 3271 | #ifdef HAVE_SH64 |
324bfcf3 AO |
3272 | case OPTION_ABI: |
3273 | if (strcmp (arg, "32") == 0) | |
3274 | { | |
3275 | if (sh64_abi == sh64_abi_64) | |
3276 | as_bad (_("Invalid combination: --abi=32 with --abi=64")); | |
3277 | sh64_abi = sh64_abi_32; | |
3278 | } | |
3279 | else if (strcmp (arg, "64") == 0) | |
3280 | { | |
3281 | if (sh64_abi == sh64_abi_32) | |
3282 | as_bad (_("Invalid combination: --abi=64 with --abi=32")); | |
3283 | if (sh64_isa_mode == sh64_isa_shcompact) | |
3284 | as_bad (_("Invalid combination: --isa=SHcompact with --abi=64")); | |
3285 | sh64_abi = sh64_abi_64; | |
3286 | } | |
3287 | else | |
20203fb9 | 3288 | as_bad (_("Invalid argument to --abi option: %s"), arg); |
324bfcf3 AO |
3289 | break; |
3290 | ||
3291 | case OPTION_NO_MIX: | |
b34976b6 | 3292 | sh64_mix = FALSE; |
324bfcf3 AO |
3293 | break; |
3294 | ||
3295 | case OPTION_SHCOMPACT_CONST_CRANGE: | |
b34976b6 | 3296 | sh64_shcompact_const_crange = TRUE; |
324bfcf3 AO |
3297 | break; |
3298 | ||
3299 | case OPTION_NO_EXPAND: | |
b34976b6 | 3300 | sh64_expand = FALSE; |
324bfcf3 AO |
3301 | break; |
3302 | ||
3303 | case OPTION_PT32: | |
b34976b6 | 3304 | sh64_pt32 = TRUE; |
324bfcf3 AO |
3305 | break; |
3306 | #endif /* HAVE_SH64 */ | |
3307 | ||
6fd4f6cc DD |
3308 | case OPTION_H_TICK_HEX: |
3309 | enable_h_tick_hex = 1; | |
3310 | break; | |
3311 | ||
8e45593f NC |
3312 | #ifdef OBJ_ELF |
3313 | case OPTION_FDPIC: | |
3314 | sh_fdpic = TRUE; | |
3315 | break; | |
3316 | #endif /* OBJ_ELF */ | |
3317 | ||
252b5132 RH |
3318 | default: |
3319 | return 0; | |
3320 | } | |
3321 | ||
3322 | return 1; | |
3323 | } | |
3324 | ||
3325 | void | |
8edc77b9 | 3326 | md_show_usage (FILE *stream) |
252b5132 | 3327 | { |
c4aa876b | 3328 | fprintf (stream, _("\ |
252b5132 | 3329 | SH options:\n\ |
37dedf66 NC |
3330 | --little generate little endian code\n\ |
3331 | --big generate big endian code\n\ | |
3332 | --relax alter jump instructions for long displacements\n\ | |
3333 | --renesas disable optimization with section symbol for\n\ | |
f55629b8 | 3334 | compatibility with Renesas assembler.\n\ |
37dedf66 NC |
3335 | --small align sections to 4 byte boundaries, not 16\n\ |
3336 | --dsp enable sh-dsp insns, and disable floating-point ISAs.\n\ | |
3337 | --allow-reg-prefix allow '$' as a register name prefix.\n\ | |
3338 | --isa=[any use most appropriate isa\n\ | |
ae51a426 | 3339 | | dsp same as '-dsp'\n\ |
f6f9408f JR |
3340 | | fp")); |
3341 | { | |
3342 | extern const bfd_arch_info_type bfd_sh_arch; | |
871ec896 | 3343 | bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; |
37dedf66 | 3344 | |
f6f9408f JR |
3345 | for (; bfd_arch; bfd_arch=bfd_arch->next) |
3346 | if (bfd_arch->mach != bfd_mach_sh5) | |
3347 | { | |
3348 | fprintf (stream, "\n | %s", bfd_arch->printable_name); | |
3349 | fprintf (stream, "\n | %s-up", bfd_arch->printable_name); | |
3350 | } | |
3351 | } | |
3352 | fprintf (stream, "]\n"); | |
ae51a426 JR |
3353 | #ifdef HAVE_SH64 |
3354 | fprintf (stream, _("\ | |
37dedf66 | 3355 | --isa=[shmedia set as the default instruction set for SH64\n\ |
88da98f3 MS |
3356 | | SHmedia\n\ |
3357 | | shcompact\n\ | |
ae51a426 | 3358 | | SHcompact]\n")); |
324bfcf3 | 3359 | fprintf (stream, _("\ |
37dedf66 | 3360 | --abi=[32|64] set size of expanded SHmedia operands and object\n\ |
324bfcf3 | 3361 | file type\n\ |
37dedf66 | 3362 | --shcompact-const-crange emit code-range descriptors for constants in\n\ |
324bfcf3 | 3363 | SHcompact code sections\n\ |
37dedf66 | 3364 | --no-mix disallow SHmedia code in the same section as\n\ |
324bfcf3 | 3365 | constants and SHcompact code\n\ |
37dedf66 NC |
3366 | --no-expand do not expand MOVI, PT, PTA or PTB instructions\n\ |
3367 | --expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\ | |
2acb89ed | 3368 | to 32 bits only\n")); |
324bfcf3 | 3369 | #endif /* HAVE_SH64 */ |
8e45593f NC |
3370 | #ifdef OBJ_ELF |
3371 | fprintf (stream, _("\ | |
3372 | --fdpic generate an FDPIC object file\n")); | |
3373 | #endif /* OBJ_ELF */ | |
252b5132 RH |
3374 | } |
3375 | \f | |
252b5132 RH |
3376 | /* This struct is used to pass arguments to sh_count_relocs through |
3377 | bfd_map_over_sections. */ | |
3378 | ||
3379 | struct sh_count_relocs | |
3380 | { | |
3381 | /* Symbol we are looking for. */ | |
3382 | symbolS *sym; | |
3383 | /* Count of relocs found. */ | |
3384 | int count; | |
3385 | }; | |
3386 | ||
3387 | /* Count the number of fixups in a section which refer to a particular | |
7be1c489 | 3388 | symbol. This is called via bfd_map_over_sections. */ |
252b5132 | 3389 | |
252b5132 | 3390 | static void |
8edc77b9 | 3391 | sh_count_relocs (bfd *abfd ATTRIBUTE_UNUSED, segT sec, void *data) |
252b5132 RH |
3392 | { |
3393 | struct sh_count_relocs *info = (struct sh_count_relocs *) data; | |
3394 | segment_info_type *seginfo; | |
3395 | symbolS *sym; | |
3396 | fixS *fix; | |
3397 | ||
3398 | seginfo = seg_info (sec); | |
3399 | if (seginfo == NULL) | |
3400 | return; | |
3401 | ||
3402 | sym = info->sym; | |
3403 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
3404 | { | |
3405 | if (fix->fx_addsy == sym) | |
3406 | { | |
3407 | ++info->count; | |
3408 | fix->fx_tcbit = 1; | |
3409 | } | |
3410 | } | |
3411 | } | |
3412 | ||
7be1c489 AM |
3413 | /* Handle the count relocs for a particular section. |
3414 | This is called via bfd_map_over_sections. */ | |
252b5132 | 3415 | |
252b5132 | 3416 | static void |
8edc77b9 KK |
3417 | sh_frob_section (bfd *abfd ATTRIBUTE_UNUSED, segT sec, |
3418 | void *ignore ATTRIBUTE_UNUSED) | |
252b5132 RH |
3419 | { |
3420 | segment_info_type *seginfo; | |
3421 | fixS *fix; | |
3422 | ||
3423 | seginfo = seg_info (sec); | |
3424 | if (seginfo == NULL) | |
3425 | return; | |
3426 | ||
e14e52f8 DD |
3427 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) |
3428 | { | |
3429 | symbolS *sym; | |
3430 | ||
3431 | sym = fix->fx_addsy; | |
3432 | /* Check for a local_symbol. */ | |
3433 | if (sym && sym->bsym == NULL) | |
3434 | { | |
3435 | struct local_symbol *ls = (struct local_symbol *)sym; | |
3436 | /* See if it's been converted. If so, canonicalize. */ | |
3437 | if (local_symbol_converted_p (ls)) | |
3438 | fix->fx_addsy = local_symbol_get_real_symbol (ls); | |
3439 | } | |
3440 | } | |
3441 | ||
252b5132 RH |
3442 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) |
3443 | { | |
3444 | symbolS *sym; | |
3445 | bfd_vma val; | |
3446 | fixS *fscan; | |
3447 | struct sh_count_relocs info; | |
3448 | ||
3449 | if (fix->fx_r_type != BFD_RELOC_SH_USES) | |
3450 | continue; | |
3451 | ||
3452 | /* The BFD_RELOC_SH_USES reloc should refer to a defined local | |
3453 | symbol in the same section. */ | |
3454 | sym = fix->fx_addsy; | |
3455 | if (sym == NULL | |
3456 | || fix->fx_subsy != NULL | |
3457 | || fix->fx_addnumber != 0 | |
3458 | || S_GET_SEGMENT (sym) != sec | |
252b5132 RH |
3459 | || S_IS_EXTERNAL (sym)) |
3460 | { | |
3461 | as_warn_where (fix->fx_file, fix->fx_line, | |
3462 | _(".uses does not refer to a local symbol in the same section")); | |
3463 | continue; | |
3464 | } | |
3465 | ||
3466 | /* Look through the fixups again, this time looking for one | |
3467 | at the same location as sym. */ | |
3468 | val = S_GET_VALUE (sym); | |
3469 | for (fscan = seginfo->fix_root; | |
3470 | fscan != NULL; | |
3471 | fscan = fscan->fx_next) | |
3472 | if (val == fscan->fx_frag->fr_address + fscan->fx_where | |
3473 | && fscan->fx_r_type != BFD_RELOC_SH_ALIGN | |
3474 | && fscan->fx_r_type != BFD_RELOC_SH_CODE | |
3475 | && fscan->fx_r_type != BFD_RELOC_SH_DATA | |
3476 | && fscan->fx_r_type != BFD_RELOC_SH_LABEL) | |
3477 | break; | |
3478 | if (fscan == NULL) | |
3479 | { | |
3480 | as_warn_where (fix->fx_file, fix->fx_line, | |
3481 | _("can't find fixup pointed to by .uses")); | |
3482 | continue; | |
3483 | } | |
3484 | ||
3485 | if (fscan->fx_tcbit) | |
3486 | { | |
3487 | /* We've already done this one. */ | |
3488 | continue; | |
3489 | } | |
3490 | ||
6b31947e NC |
3491 | /* The variable fscan should also be a fixup to a local symbol |
3492 | in the same section. */ | |
252b5132 RH |
3493 | sym = fscan->fx_addsy; |
3494 | if (sym == NULL | |
3495 | || fscan->fx_subsy != NULL | |
3496 | || fscan->fx_addnumber != 0 | |
3497 | || S_GET_SEGMENT (sym) != sec | |
252b5132 RH |
3498 | || S_IS_EXTERNAL (sym)) |
3499 | { | |
3500 | as_warn_where (fix->fx_file, fix->fx_line, | |
3501 | _(".uses target does not refer to a local symbol in the same section")); | |
3502 | continue; | |
3503 | } | |
3504 | ||
3505 | /* Now we look through all the fixups of all the sections, | |
3506 | counting the number of times we find a reference to sym. */ | |
3507 | info.sym = sym; | |
3508 | info.count = 0; | |
8edc77b9 | 3509 | bfd_map_over_sections (stdoutput, sh_count_relocs, &info); |
252b5132 RH |
3510 | |
3511 | if (info.count < 1) | |
3512 | abort (); | |
3513 | ||
3514 | /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. | |
3515 | We have already adjusted the value of sym to include the | |
3516 | fragment address, so we undo that adjustment here. */ | |
3517 | subseg_change (sec, 0); | |
7bcad3e5 NC |
3518 | fix_new (fscan->fx_frag, |
3519 | S_GET_VALUE (sym) - fscan->fx_frag->fr_address, | |
252b5132 RH |
3520 | 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); |
3521 | } | |
3522 | } | |
3523 | ||
3524 | /* This function is called after the symbol table has been completed, | |
3525 | but before the relocs or section contents have been written out. | |
3526 | If we have seen any .uses pseudo-ops, they point to an instruction | |
3527 | which loads a register with the address of a function. We look | |
3528 | through the fixups to find where the function address is being | |
3529 | loaded from. We then generate a COUNT reloc giving the number of | |
3530 | times that function address is referred to. The linker uses this | |
3531 | information when doing relaxing, to decide when it can eliminate | |
3532 | the stored function address entirely. */ | |
3533 | ||
3534 | void | |
8edc77b9 | 3535 | sh_frob_file (void) |
252b5132 | 3536 | { |
324bfcf3 AO |
3537 | #ifdef HAVE_SH64 |
3538 | shmedia_frob_file_before_adjust (); | |
3539 | #endif | |
3540 | ||
252b5132 RH |
3541 | if (! sh_relax) |
3542 | return; | |
3543 | ||
8edc77b9 | 3544 | bfd_map_over_sections (stdoutput, sh_frob_section, NULL); |
252b5132 RH |
3545 | } |
3546 | ||
3547 | /* Called after relaxing. Set the correct sizes of the fragments, and | |
55cf6793 | 3548 | create relocs so that md_apply_fix will fill in the correct values. */ |
252b5132 RH |
3549 | |
3550 | void | |
8edc77b9 | 3551 | md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT seg, fragS *fragP) |
252b5132 RH |
3552 | { |
3553 | int donerelax = 0; | |
3554 | ||
3555 | switch (fragP->fr_subtype) | |
3556 | { | |
3557 | case C (COND_JUMP, COND8): | |
3558 | case C (COND_JUMP_DELAY, COND8): | |
3559 | subseg_change (seg, 0); | |
3560 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
3561 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
3562 | fragP->fr_fix += 2; | |
3563 | fragP->fr_var = 0; | |
3564 | break; | |
3565 | ||
3566 | case C (UNCOND_JUMP, UNCOND12): | |
3567 | subseg_change (seg, 0); | |
3568 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
3569 | 1, BFD_RELOC_SH_PCDISP12BY2); | |
3570 | fragP->fr_fix += 2; | |
3571 | fragP->fr_var = 0; | |
3572 | break; | |
3573 | ||
3574 | case C (UNCOND_JUMP, UNCOND32): | |
3575 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): | |
3576 | if (fragP->fr_symbol == NULL) | |
99b222b4 HPN |
3577 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3578 | _("displacement overflows 12-bit field")); | |
252b5132 | 3579 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
99b222b4 HPN |
3580 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3581 | _("displacement to defined symbol %s overflows 12-bit field"), | |
3582 | S_GET_NAME (fragP->fr_symbol)); | |
252b5132 | 3583 | else |
99b222b4 HPN |
3584 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3585 | _("displacement to undefined symbol %s overflows 12-bit field"), | |
3586 | S_GET_NAME (fragP->fr_symbol)); | |
3587 | /* Stabilize this frag, so we don't trip an assert. */ | |
3588 | fragP->fr_fix += fragP->fr_var; | |
3589 | fragP->fr_var = 0; | |
252b5132 RH |
3590 | break; |
3591 | ||
3592 | case C (COND_JUMP, COND12): | |
3593 | case C (COND_JUMP_DELAY, COND12): | |
6b31947e | 3594 | /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */ |
252b5132 RH |
3595 | /* I found that a relax failure for gcc.c-torture/execute/930628-1.c |
3596 | was due to gas incorrectly relaxing an out-of-range conditional | |
3597 | branch with delay slot. It turned: | |
3598 | bf.s L6 (slot mov.l r12,@(44,r0)) | |
3599 | into: | |
c4aa876b | 3600 | |
252b5132 RH |
3601 | 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) |
3602 | 30: 00 09 nop | |
3603 | 32: 10 cb mov.l r12,@(44,r0) | |
3604 | Therefore, branches with delay slots have to be handled | |
3605 | differently from ones without delay slots. */ | |
3606 | { | |
3607 | unsigned char *buffer = | |
3608 | (unsigned char *) (fragP->fr_fix + fragP->fr_literal); | |
3609 | int highbyte = target_big_endian ? 0 : 1; | |
3610 | int lowbyte = target_big_endian ? 1 : 0; | |
3611 | int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); | |
3612 | ||
3613 | /* Toggle the true/false bit of the bcond. */ | |
3614 | buffer[highbyte] ^= 0x2; | |
3615 | ||
d3ecfc59 | 3616 | /* If this is a delayed branch, we may not put the bra in the |
252b5132 RH |
3617 | slot. So we change it to a non-delayed branch, like that: |
3618 | b! cond slot_label; bra disp; slot_label: slot_insn | |
3619 | ??? We should try if swapping the conditional branch and | |
3620 | its delay-slot insn already makes the branch reach. */ | |
3621 | ||
3622 | /* Build a relocation to six / four bytes farther on. */ | |
3623 | subseg_change (seg, 0); | |
7be1c489 | 3624 | fix_new (fragP, fragP->fr_fix, 2, section_symbol (seg), |
252b5132 RH |
3625 | fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), |
3626 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
3627 | ||
3628 | /* Set up a jump instruction. */ | |
3629 | buffer[highbyte + 2] = 0xa0; | |
3630 | buffer[lowbyte + 2] = 0; | |
3631 | fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, | |
3632 | fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); | |
3633 | ||
3634 | if (delay) | |
3635 | { | |
3636 | buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ | |
3637 | fragP->fr_fix += 4; | |
3638 | } | |
3639 | else | |
3640 | { | |
3641 | /* Fill in a NOP instruction. */ | |
3642 | buffer[highbyte + 4] = 0x0; | |
3643 | buffer[lowbyte + 4] = 0x9; | |
3644 | ||
3645 | fragP->fr_fix += 6; | |
3646 | } | |
3647 | fragP->fr_var = 0; | |
3648 | donerelax = 1; | |
3649 | } | |
3650 | break; | |
3651 | ||
3652 | case C (COND_JUMP, COND32): | |
3653 | case C (COND_JUMP_DELAY, COND32): | |
3654 | case C (COND_JUMP, UNDEF_WORD_DISP): | |
3655 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): | |
3656 | if (fragP->fr_symbol == NULL) | |
99b222b4 HPN |
3657 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3658 | _("displacement overflows 8-bit field")); | |
252b5132 | 3659 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
99b222b4 HPN |
3660 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3661 | _("displacement to defined symbol %s overflows 8-bit field"), | |
3662 | S_GET_NAME (fragP->fr_symbol)); | |
252b5132 | 3663 | else |
99b222b4 HPN |
3664 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3665 | _("displacement to undefined symbol %s overflows 8-bit field "), | |
3666 | S_GET_NAME (fragP->fr_symbol)); | |
3667 | /* Stabilize this frag, so we don't trip an assert. */ | |
3668 | fragP->fr_fix += fragP->fr_var; | |
3669 | fragP->fr_var = 0; | |
252b5132 RH |
3670 | break; |
3671 | ||
3672 | default: | |
324bfcf3 | 3673 | #ifdef HAVE_SH64 |
b34976b6 | 3674 | shmedia_md_convert_frag (headers, seg, fragP, TRUE); |
324bfcf3 | 3675 | #else |
252b5132 | 3676 | abort (); |
324bfcf3 | 3677 | #endif |
252b5132 RH |
3678 | } |
3679 | ||
3680 | if (donerelax && !sh_relax) | |
3681 | as_warn_where (fragP->fr_file, fragP->fr_line, | |
3682 | _("overflow in branch to %s; converted into longer instruction sequence"), | |
3683 | (fragP->fr_symbol != NULL | |
3684 | ? S_GET_NAME (fragP->fr_symbol) | |
3685 | : "")); | |
3686 | } | |
3687 | ||
3688 | valueT | |
8edc77b9 | 3689 | md_section_align (segT seg ATTRIBUTE_UNUSED, valueT size) |
252b5132 | 3690 | { |
252b5132 RH |
3691 | #ifdef OBJ_ELF |
3692 | return size; | |
3693 | #else /* ! OBJ_ELF */ | |
3694 | return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1) | |
8d3842cd | 3695 | & -(1 << bfd_get_section_alignment (stdoutput, seg))); |
252b5132 | 3696 | #endif /* ! OBJ_ELF */ |
252b5132 RH |
3697 | } |
3698 | ||
3699 | /* This static variable is set by s_uacons to tell sh_cons_align that | |
67c1ffbe | 3700 | the expression does not need to be aligned. */ |
252b5132 RH |
3701 | |
3702 | static int sh_no_align_cons = 0; | |
3703 | ||
3704 | /* This handles the unaligned space allocation pseudo-ops, such as | |
3705 | .uaword. .uaword is just like .word, but the value does not need | |
3706 | to be aligned. */ | |
3707 | ||
3708 | static void | |
8edc77b9 | 3709 | s_uacons (int bytes) |
252b5132 RH |
3710 | { |
3711 | /* Tell sh_cons_align not to align this value. */ | |
3712 | sh_no_align_cons = 1; | |
3713 | cons (bytes); | |
3714 | } | |
3715 | ||
3716 | /* If a .word, et. al., pseud-op is seen, warn if the value is not | |
3717 | aligned correctly. Note that this can cause warnings to be issued | |
3718 | when assembling initialized structured which were declared with the | |
3719 | packed attribute. FIXME: Perhaps we should require an option to | |
3720 | enable this warning? */ | |
3721 | ||
3722 | void | |
8edc77b9 | 3723 | sh_cons_align (int nbytes) |
252b5132 RH |
3724 | { |
3725 | int nalign; | |
252b5132 RH |
3726 | |
3727 | if (sh_no_align_cons) | |
3728 | { | |
3729 | /* This is an unaligned pseudo-op. */ | |
3730 | sh_no_align_cons = 0; | |
3731 | return; | |
3732 | } | |
3733 | ||
3734 | nalign = 0; | |
3735 | while ((nbytes & 1) == 0) | |
3736 | { | |
3737 | ++nalign; | |
3738 | nbytes >>= 1; | |
3739 | } | |
3740 | ||
3741 | if (nalign == 0) | |
3742 | return; | |
3743 | ||
3744 | if (now_seg == absolute_section) | |
3745 | { | |
3746 | if ((abs_section_offset & ((1 << nalign) - 1)) != 0) | |
3747 | as_warn (_("misaligned data")); | |
3748 | return; | |
3749 | } | |
3750 | ||
87975d2a AM |
3751 | frag_var (rs_align_test, 1, 1, (relax_substateT) 0, |
3752 | (symbolS *) NULL, (offsetT) nalign, (char *) NULL); | |
252b5132 RH |
3753 | |
3754 | record_alignment (now_seg, nalign); | |
3755 | } | |
3756 | ||
3757 | /* When relaxing, we need to output a reloc for any .align directive | |
3758 | that requests alignment to a four byte boundary or larger. This is | |
3759 | also where we check for misaligned data. */ | |
3760 | ||
3761 | void | |
8edc77b9 | 3762 | sh_handle_align (fragS *frag) |
252b5132 | 3763 | { |
0a9ef439 RH |
3764 | int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix; |
3765 | ||
3766 | if (frag->fr_type == rs_align_code) | |
3767 | { | |
3768 | static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; | |
3769 | static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; | |
3770 | ||
3771 | char *p = frag->fr_literal + frag->fr_fix; | |
3772 | ||
3773 | if (bytes & 1) | |
3774 | { | |
3775 | *p++ = 0; | |
3776 | bytes--; | |
3777 | frag->fr_fix += 1; | |
3778 | } | |
3779 | ||
3780 | if (target_big_endian) | |
3781 | { | |
3782 | memcpy (p, big_nop_pattern, sizeof big_nop_pattern); | |
3783 | frag->fr_var = sizeof big_nop_pattern; | |
3784 | } | |
3785 | else | |
3786 | { | |
3787 | memcpy (p, little_nop_pattern, sizeof little_nop_pattern); | |
3788 | frag->fr_var = sizeof little_nop_pattern; | |
3789 | } | |
3790 | } | |
3791 | else if (frag->fr_type == rs_align_test) | |
3792 | { | |
3793 | if (bytes != 0) | |
91382b56 | 3794 | as_bad_where (frag->fr_file, frag->fr_line, _("misaligned data")); |
0a9ef439 RH |
3795 | } |
3796 | ||
252b5132 | 3797 | if (sh_relax |
0a9ef439 RH |
3798 | && (frag->fr_type == rs_align |
3799 | || frag->fr_type == rs_align_code) | |
252b5132 RH |
3800 | && frag->fr_address + frag->fr_fix > 0 |
3801 | && frag->fr_offset > 1 | |
3802 | && now_seg != bss_section) | |
3803 | fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, | |
3804 | BFD_RELOC_SH_ALIGN); | |
252b5132 RH |
3805 | } |
3806 | ||
28602ebf KK |
3807 | /* See whether the relocation should be resolved locally. */ |
3808 | ||
b34976b6 | 3809 | static bfd_boolean |
8edc77b9 | 3810 | sh_local_pcrel (fixS *fix) |
28602ebf | 3811 | { |
b34976b6 AM |
3812 | return (! sh_relax |
3813 | && (fix->fx_r_type == BFD_RELOC_SH_PCDISP8BY2 | |
3814 | || fix->fx_r_type == BFD_RELOC_SH_PCDISP12BY2 | |
3815 | || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2 | |
3816 | || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4 | |
3817 | || fix->fx_r_type == BFD_RELOC_8_PCREL | |
3818 | || fix->fx_r_type == BFD_RELOC_SH_SWITCH16 | |
3819 | || fix->fx_r_type == BFD_RELOC_SH_SWITCH32)); | |
28602ebf KK |
3820 | } |
3821 | ||
252b5132 RH |
3822 | /* See whether we need to force a relocation into the output file. |
3823 | This is used to force out switch and PC relative relocations when | |
3824 | relaxing. */ | |
3825 | ||
3826 | int | |
8edc77b9 | 3827 | sh_force_relocation (fixS *fix) |
252b5132 | 3828 | { |
8ba4dac0 DJ |
3829 | /* These relocations can't make it into a DSO, so no use forcing |
3830 | them for global symbols. */ | |
28602ebf | 3831 | if (sh_local_pcrel (fix)) |
8ba4dac0 DJ |
3832 | return 0; |
3833 | ||
9efb3b7b | 3834 | /* Make sure some relocations get emitted. */ |
ae6063d4 | 3835 | if (fix->fx_r_type == BFD_RELOC_SH_LOOP_START |
a161fe53 | 3836 | || fix->fx_r_type == BFD_RELOC_SH_LOOP_END |
9efb3b7b KK |
3837 | || fix->fx_r_type == BFD_RELOC_SH_TLS_GD_32 |
3838 | || fix->fx_r_type == BFD_RELOC_SH_TLS_LD_32 | |
3839 | || fix->fx_r_type == BFD_RELOC_SH_TLS_IE_32 | |
3840 | || fix->fx_r_type == BFD_RELOC_SH_TLS_LDO_32 | |
3841 | || fix->fx_r_type == BFD_RELOC_SH_TLS_LE_32 | |
ae6063d4 | 3842 | || generic_force_reloc (fix)) |
252b5132 RH |
3843 | return 1; |
3844 | ||
3845 | if (! sh_relax) | |
3846 | return 0; | |
3847 | ||
3848 | return (fix->fx_pcrel | |
3849 | || SWITCH_TABLE (fix) | |
3850 | || fix->fx_r_type == BFD_RELOC_SH_COUNT | |
3851 | || fix->fx_r_type == BFD_RELOC_SH_ALIGN | |
3852 | || fix->fx_r_type == BFD_RELOC_SH_CODE | |
3853 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
324bfcf3 AO |
3854 | #ifdef HAVE_SH64 |
3855 | || fix->fx_r_type == BFD_RELOC_SH_SHMEDIA_CODE | |
3856 | #endif | |
252b5132 RH |
3857 | || fix->fx_r_type == BFD_RELOC_SH_LABEL); |
3858 | } | |
3859 | ||
3860 | #ifdef OBJ_ELF | |
b34976b6 | 3861 | bfd_boolean |
8edc77b9 | 3862 | sh_fix_adjustable (fixS *fixP) |
252b5132 | 3863 | { |
a161fe53 AM |
3864 | if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL |
3865 | || fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL | |
8e45593f | 3866 | || fixP->fx_r_type == BFD_RELOC_SH_GOT20 |
a161fe53 | 3867 | || fixP->fx_r_type == BFD_RELOC_SH_GOTPC |
8e45593f NC |
3868 | || fixP->fx_r_type == BFD_RELOC_SH_GOTFUNCDESC |
3869 | || fixP->fx_r_type == BFD_RELOC_SH_GOTFUNCDESC20 | |
3870 | || fixP->fx_r_type == BFD_RELOC_SH_GOTOFFFUNCDESC | |
3871 | || fixP->fx_r_type == BFD_RELOC_SH_GOTOFFFUNCDESC20 | |
3872 | || fixP->fx_r_type == BFD_RELOC_SH_FUNCDESC | |
f55629b8 | 3873 | || ((fixP->fx_r_type == BFD_RELOC_32) && dont_adjust_reloc_32) |
a1cc9221 AO |
3874 | || fixP->fx_r_type == BFD_RELOC_RVA) |
3875 | return 0; | |
3876 | ||
252b5132 RH |
3877 | /* We need the symbol name for the VTABLE entries */ |
3878 | if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
3879 | || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
3880 | return 0; | |
3881 | ||
3882 | return 1; | |
3883 | } | |
d4845d57 | 3884 | |
6b31947e | 3885 | void |
8edc77b9 | 3886 | sh_elf_final_processing (void) |
d4845d57 JR |
3887 | { |
3888 | int val; | |
3889 | ||
3890 | /* Set file-specific flags to indicate if this code needs | |
88da98f3 | 3891 | a processor with the sh-dsp / sh2e ISA to execute. */ |
324bfcf3 AO |
3892 | #ifdef HAVE_SH64 |
3893 | /* SH5 and above don't know about the valid_arch arch_sh* bits defined | |
3894 | in sh-opc.h, so check SH64 mode before checking valid_arch. */ | |
3895 | if (sh64_isa_mode != sh64_isa_unspecified) | |
3896 | val = EF_SH5; | |
3897 | else | |
1a320fbb NC |
3898 | #elif defined TARGET_SYMBIAN |
3899 | if (1) | |
1a66a017 NC |
3900 | { |
3901 | extern int sh_symbian_find_elf_flags (unsigned int); | |
3902 | ||
3903 | val = sh_symbian_find_elf_flags (valid_arch); | |
3904 | } | |
1a320fbb | 3905 | else |
324bfcf3 | 3906 | #endif /* HAVE_SH64 */ |
f6f9408f | 3907 | val = sh_find_elf_flags (valid_arch); |
d4845d57 JR |
3908 | |
3909 | elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; | |
3910 | elf_elfheader (stdoutput)->e_flags |= val; | |
8e45593f NC |
3911 | |
3912 | if (sh_fdpic) | |
3913 | elf_elfheader (stdoutput)->e_flags |= EF_SH_FDPIC; | |
3914 | } | |
3915 | #endif | |
3916 | ||
3917 | #ifdef TE_UCLINUX | |
3918 | /* Return the target format for uClinux. */ | |
3919 | ||
3920 | const char * | |
3921 | sh_uclinux_target_format (void) | |
3922 | { | |
3923 | if (sh_fdpic) | |
3924 | return (!target_big_endian ? "elf32-sh-fdpic" : "elf32-shbig-fdpic"); | |
3925 | else | |
3926 | return (!target_big_endian ? "elf32-shl" : "elf32-sh"); | |
d4845d57 | 3927 | } |
252b5132 RH |
3928 | #endif |
3929 | ||
55e6e397 RS |
3930 | /* Apply fixup FIXP to SIZE-byte field BUF given that VAL is its |
3931 | assembly-time value. If we're generating a reloc for FIXP, | |
3932 | see whether the addend should be stored in-place or whether | |
3933 | it should be in an ELF r_addend field. */ | |
3934 | ||
3935 | static void | |
3936 | apply_full_field_fix (fixS *fixP, char *buf, bfd_vma val, int size) | |
3937 | { | |
3938 | reloc_howto_type *howto; | |
3939 | ||
3940 | if (fixP->fx_addsy != NULL || fixP->fx_pcrel) | |
3941 | { | |
3942 | howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); | |
3943 | if (howto && !howto->partial_inplace) | |
3944 | { | |
3945 | fixP->fx_addnumber = val; | |
3946 | return; | |
3947 | } | |
3948 | } | |
3949 | md_number_to_chars (buf, val, size); | |
3950 | } | |
3951 | ||
252b5132 RH |
3952 | /* Apply a fixup to the object file. */ |
3953 | ||
252b5132 | 3954 | void |
55cf6793 | 3955 | md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) |
252b5132 RH |
3956 | { |
3957 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; | |
3958 | int lowbyte = target_big_endian ? 1 : 0; | |
3959 | int highbyte = target_big_endian ? 0 : 1; | |
2ed5f585 | 3960 | long val = (long) *valP; |
252b5132 RH |
3961 | long max, min; |
3962 | int shift; | |
3963 | ||
a1cc9221 AO |
3964 | /* A difference between two symbols, the second of which is in the |
3965 | current section, is transformed in a PC-relative relocation to | |
3966 | the other symbol. We have to adjust the relocation type here. */ | |
3967 | if (fixP->fx_pcrel) | |
3968 | { | |
32b9ff0d TS |
3969 | #ifndef HAVE_SH64 |
3970 | /* Safeguard; this must not occur for non-sh64 configurations. */ | |
3971 | gas_assert (fixP->fx_r_type != BFD_RELOC_64); | |
3972 | #endif | |
3973 | ||
a1cc9221 AO |
3974 | switch (fixP->fx_r_type) |
3975 | { | |
3976 | default: | |
3977 | break; | |
3978 | ||
3979 | case BFD_RELOC_32: | |
3980 | fixP->fx_r_type = BFD_RELOC_32_PCREL; | |
3981 | break; | |
3982 | ||
3983 | /* Currently, we only support 32-bit PCREL relocations. | |
3984 | We'd need a new reloc type to handle 16_PCREL, and | |
3985 | 8_PCREL is already taken for R_SH_SWITCH8, which | |
3986 | apparently does something completely different than what | |
3987 | we need. FIXME. */ | |
3988 | case BFD_RELOC_16: | |
3989 | bfd_set_error (bfd_error_bad_value); | |
94f592af | 3990 | return; |
81d4177b | 3991 | |
a1cc9221 AO |
3992 | case BFD_RELOC_8: |
3993 | bfd_set_error (bfd_error_bad_value); | |
94f592af | 3994 | return; |
a1cc9221 AO |
3995 | } |
3996 | } | |
3997 | ||
6b31947e NC |
3998 | /* The function adjust_reloc_syms won't convert a reloc against a weak |
3999 | symbol into a reloc against a section, but bfd_install_relocation | |
4000 | will screw up if the symbol is defined, so we have to adjust val here | |
1308f14c HPN |
4001 | to avoid the screw up later. |
4002 | ||
4003 | For ordinary relocs, this does not happen for ELF, since for ELF, | |
4004 | bfd_install_relocation uses the "special function" field of the | |
4005 | howto, and does not execute the code that needs to be undone, as long | |
4006 | as the special function does not return bfd_reloc_continue. | |
4007 | It can happen for GOT- and PLT-type relocs the way they are | |
4008 | described in elf32-sh.c as they use bfd_elf_generic_reloc, but it | |
4009 | doesn't matter here since those relocs don't use VAL; see below. */ | |
4010 | if (OUTPUT_FLAVOR != bfd_target_elf_flavour | |
4011 | && fixP->fx_addsy != NULL | |
252b5132 RH |
4012 | && S_IS_WEAK (fixP->fx_addsy)) |
4013 | val -= S_GET_VALUE (fixP->fx_addsy); | |
252b5132 | 4014 | |
bdfaef52 JR |
4015 | if (SWITCH_TABLE (fixP)) |
4016 | val -= S_GET_VALUE (fixP->fx_subsy); | |
252b5132 RH |
4017 | |
4018 | max = min = 0; | |
4019 | shift = 0; | |
4020 | switch (fixP->fx_r_type) | |
4021 | { | |
1d70c7fb AO |
4022 | case BFD_RELOC_SH_IMM3: |
4023 | max = 0x7; | |
4024 | * buf = (* buf & 0xf8) | (val & 0x7); | |
4025 | break; | |
4026 | case BFD_RELOC_SH_IMM3U: | |
4027 | max = 0x7; | |
4028 | * buf = (* buf & 0x8f) | ((val & 0x7) << 4); | |
4029 | break; | |
4030 | case BFD_RELOC_SH_DISP12: | |
4031 | max = 0xfff; | |
4032 | buf[lowbyte] = val & 0xff; | |
4033 | buf[highbyte] |= (val >> 8) & 0x0f; | |
4034 | break; | |
4035 | case BFD_RELOC_SH_DISP12BY2: | |
4036 | max = 0xfff; | |
4037 | shift = 1; | |
4038 | buf[lowbyte] = (val >> 1) & 0xff; | |
4039 | buf[highbyte] |= (val >> 9) & 0x0f; | |
4040 | break; | |
4041 | case BFD_RELOC_SH_DISP12BY4: | |
4042 | max = 0xfff; | |
4043 | shift = 2; | |
4044 | buf[lowbyte] = (val >> 2) & 0xff; | |
4045 | buf[highbyte] |= (val >> 10) & 0x0f; | |
4046 | break; | |
4047 | case BFD_RELOC_SH_DISP12BY8: | |
4048 | max = 0xfff; | |
4049 | shift = 3; | |
4050 | buf[lowbyte] = (val >> 3) & 0xff; | |
4051 | buf[highbyte] |= (val >> 11) & 0x0f; | |
4052 | break; | |
4053 | case BFD_RELOC_SH_DISP20: | |
4054 | if (! target_big_endian) | |
4055 | abort(); | |
4056 | max = 0x7ffff; | |
4057 | min = -0x80000; | |
28013b5c | 4058 | buf[1] = (buf[1] & 0x0f) | ((val >> 12) & 0xf0); |
1d70c7fb AO |
4059 | buf[2] = (val >> 8) & 0xff; |
4060 | buf[3] = val & 0xff; | |
4061 | break; | |
4062 | case BFD_RELOC_SH_DISP20BY8: | |
4063 | if (!target_big_endian) | |
4064 | abort(); | |
4065 | max = 0x7ffff; | |
4066 | min = -0x80000; | |
4067 | shift = 8; | |
28013b5c | 4068 | buf[1] = (buf[1] & 0x0f) | ((val >> 20) & 0xf0); |
1d70c7fb AO |
4069 | buf[2] = (val >> 16) & 0xff; |
4070 | buf[3] = (val >> 8) & 0xff; | |
4071 | break; | |
4072 | ||
252b5132 RH |
4073 | case BFD_RELOC_SH_IMM4: |
4074 | max = 0xf; | |
4075 | *buf = (*buf & 0xf0) | (val & 0xf); | |
4076 | break; | |
4077 | ||
4078 | case BFD_RELOC_SH_IMM4BY2: | |
4079 | max = 0xf; | |
4080 | shift = 1; | |
4081 | *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); | |
4082 | break; | |
4083 | ||
4084 | case BFD_RELOC_SH_IMM4BY4: | |
4085 | max = 0xf; | |
4086 | shift = 2; | |
4087 | *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); | |
4088 | break; | |
4089 | ||
4090 | case BFD_RELOC_SH_IMM8BY2: | |
4091 | max = 0xff; | |
4092 | shift = 1; | |
4093 | *buf = val >> 1; | |
4094 | break; | |
4095 | ||
4096 | case BFD_RELOC_SH_IMM8BY4: | |
4097 | max = 0xff; | |
4098 | shift = 2; | |
4099 | *buf = val >> 2; | |
4100 | break; | |
4101 | ||
4102 | case BFD_RELOC_8: | |
4103 | case BFD_RELOC_SH_IMM8: | |
4104 | /* Sometimes the 8 bit value is sign extended (e.g., add) and | |
4105 | sometimes it is not (e.g., and). We permit any 8 bit value. | |
4106 | Note that adding further restrictions may invalidate | |
4107 | reasonable looking assembly code, such as ``and -0x1,r0''. */ | |
4108 | max = 0xff; | |
c4aa876b | 4109 | min = -0xff; |
252b5132 RH |
4110 | *buf++ = val; |
4111 | break; | |
4112 | ||
4113 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
52b5ca5b AS |
4114 | /* If we are dealing with a known destination ... */ |
4115 | if ((fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) | |
4116 | && (fixP->fx_subsy == NULL || S_IS_DEFINED (fixP->fx_addsy))) | |
4117 | { | |
4118 | /* Don't silently move the destination due to misalignment. | |
4119 | The absolute address is the fragment base plus the offset into | |
4120 | the fragment plus the pc relative offset to the label. */ | |
4121 | if ((fixP->fx_frag->fr_address + fixP->fx_where + val) & 3) | |
4122 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
4123 | _("offset to unaligned destination")); | |
4124 | ||
4125 | /* The displacement cannot be zero or backward even if aligned. | |
4126 | Allow -2 because val has already been adjusted somewhere. */ | |
4127 | if (val < -2) | |
4128 | as_bad_where (fixP->fx_file, fixP->fx_line, _("negative offset")); | |
4129 | } | |
4130 | ||
252b5132 RH |
4131 | /* The lower two bits of the PC are cleared before the |
4132 | displacement is added in. We can assume that the destination | |
67c1ffbe | 4133 | is on a 4 byte boundary. If this instruction is also on a 4 |
252b5132 RH |
4134 | byte boundary, then we want |
4135 | (target - here) / 4 | |
4136 | and target - here is a multiple of 4. | |
4137 | Otherwise, we are on a 2 byte boundary, and we want | |
4138 | (target - (here - 2)) / 4 | |
4139 | and target - here is not a multiple of 4. Computing | |
4140 | (target - (here - 2)) / 4 == (target - here + 2) / 4 | |
4141 | works for both cases, since in the first case the addition of | |
4142 | 2 will be removed by the division. target - here is in the | |
4143 | variable val. */ | |
4144 | val = (val + 2) / 4; | |
4145 | if (val & ~0xff) | |
4146 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
4147 | buf[lowbyte] = val; | |
4148 | break; | |
4149 | ||
4150 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
4151 | val /= 2; | |
4152 | if (val & ~0xff) | |
4153 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
4154 | buf[lowbyte] = val; | |
4155 | break; | |
4156 | ||
4157 | case BFD_RELOC_SH_PCDISP8BY2: | |
4158 | val /= 2; | |
4159 | if (val < -0x80 || val > 0x7f) | |
4160 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
4161 | buf[lowbyte] = val; | |
4162 | break; | |
4163 | ||
4164 | case BFD_RELOC_SH_PCDISP12BY2: | |
4165 | val /= 2; | |
8637c045 | 4166 | if (val < -0x800 || val > 0x7ff) |
252b5132 RH |
4167 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); |
4168 | buf[lowbyte] = val & 0xff; | |
4169 | buf[highbyte] |= (val >> 8) & 0xf; | |
4170 | break; | |
4171 | ||
32b9ff0d TS |
4172 | #ifndef HAVE_SH64 |
4173 | case BFD_RELOC_64: | |
4174 | apply_full_field_fix (fixP, buf, *valP, 8); | |
4175 | break; | |
4176 | #endif | |
4177 | ||
252b5132 | 4178 | case BFD_RELOC_32: |
a1cc9221 | 4179 | case BFD_RELOC_32_PCREL: |
55e6e397 | 4180 | apply_full_field_fix (fixP, buf, val, 4); |
252b5132 RH |
4181 | break; |
4182 | ||
4183 | case BFD_RELOC_16: | |
55e6e397 | 4184 | apply_full_field_fix (fixP, buf, val, 2); |
252b5132 RH |
4185 | break; |
4186 | ||
4187 | case BFD_RELOC_SH_USES: | |
fefaa1aa | 4188 | /* Pass the value into sh_reloc(). */ |
252b5132 RH |
4189 | fixP->fx_addnumber = val; |
4190 | break; | |
4191 | ||
4192 | case BFD_RELOC_SH_COUNT: | |
4193 | case BFD_RELOC_SH_ALIGN: | |
4194 | case BFD_RELOC_SH_CODE: | |
4195 | case BFD_RELOC_SH_DATA: | |
4196 | case BFD_RELOC_SH_LABEL: | |
4197 | /* Nothing to do here. */ | |
4198 | break; | |
4199 | ||
015551fc JR |
4200 | case BFD_RELOC_SH_LOOP_START: |
4201 | case BFD_RELOC_SH_LOOP_END: | |
4202 | ||
252b5132 RH |
4203 | case BFD_RELOC_VTABLE_INHERIT: |
4204 | case BFD_RELOC_VTABLE_ENTRY: | |
4205 | fixP->fx_done = 0; | |
4206 | return; | |
4207 | ||
a1cc9221 AO |
4208 | #ifdef OBJ_ELF |
4209 | case BFD_RELOC_32_PLT_PCREL: | |
4210 | /* Make the jump instruction point to the address of the operand. At | |
81d4177b | 4211 | runtime we merely add the offset to the actual PLT entry. */ |
94f592af | 4212 | * valP = 0xfffffffc; |
0174e383 | 4213 | val = fixP->fx_offset; |
ac3f04d7 AO |
4214 | if (fixP->fx_subsy) |
4215 | val -= S_GET_VALUE (fixP->fx_subsy); | |
55e6e397 | 4216 | apply_full_field_fix (fixP, buf, val, 4); |
a1cc9221 AO |
4217 | break; |
4218 | ||
4219 | case BFD_RELOC_SH_GOTPC: | |
4220 | /* This is tough to explain. We end up with this one if we have | |
4221 | operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". | |
4222 | The goal here is to obtain the absolute address of the GOT, | |
4223 | and it is strongly preferable from a performance point of | |
4224 | view to avoid using a runtime relocation for this. There are | |
4225 | cases where you have something like: | |
81d4177b | 4226 | |
a1cc9221 | 4227 | .long _GLOBAL_OFFSET_TABLE_+[.-.L66] |
81d4177b | 4228 | |
a1cc9221 AO |
4229 | and here no correction would be required. Internally in the |
4230 | assembler we treat operands of this form as not being pcrel | |
4231 | since the '.' is explicitly mentioned, and I wonder whether | |
4232 | it would simplify matters to do it this way. Who knows. In | |
4233 | earlier versions of the PIC patches, the pcrel_adjust field | |
4234 | was used to store the correction, but since the expression is | |
4235 | not pcrel, I felt it would be confusing to do it this way. */ | |
94f592af | 4236 | * valP -= 1; |
55e6e397 | 4237 | apply_full_field_fix (fixP, buf, val, 4); |
a1cc9221 AO |
4238 | break; |
4239 | ||
9efb3b7b KK |
4240 | case BFD_RELOC_SH_TLS_GD_32: |
4241 | case BFD_RELOC_SH_TLS_LD_32: | |
4242 | case BFD_RELOC_SH_TLS_IE_32: | |
2bba4140 KK |
4243 | S_SET_THREAD_LOCAL (fixP->fx_addsy); |
4244 | /* Fallthrough */ | |
4245 | case BFD_RELOC_32_GOT_PCREL: | |
8e45593f | 4246 | case BFD_RELOC_SH_GOT20: |
2bba4140 | 4247 | case BFD_RELOC_SH_GOTPLT32: |
8e45593f NC |
4248 | case BFD_RELOC_SH_GOTFUNCDESC: |
4249 | case BFD_RELOC_SH_GOTFUNCDESC20: | |
4250 | case BFD_RELOC_SH_GOTOFFFUNCDESC: | |
4251 | case BFD_RELOC_SH_GOTOFFFUNCDESC20: | |
4252 | case BFD_RELOC_SH_FUNCDESC: | |
94f592af | 4253 | * valP = 0; /* Fully resolved at runtime. No addend. */ |
55e6e397 | 4254 | apply_full_field_fix (fixP, buf, 0, 4); |
a1cc9221 AO |
4255 | break; |
4256 | ||
9efb3b7b KK |
4257 | case BFD_RELOC_SH_TLS_LDO_32: |
4258 | case BFD_RELOC_SH_TLS_LE_32: | |
2bba4140 KK |
4259 | S_SET_THREAD_LOCAL (fixP->fx_addsy); |
4260 | /* Fallthrough */ | |
4261 | case BFD_RELOC_32_GOTOFF: | |
8e45593f | 4262 | case BFD_RELOC_SH_GOTOFF20: |
55e6e397 | 4263 | apply_full_field_fix (fixP, buf, val, 4); |
a1cc9221 AO |
4264 | break; |
4265 | #endif | |
4266 | ||
252b5132 | 4267 | default: |
324bfcf3 | 4268 | #ifdef HAVE_SH64 |
55cf6793 | 4269 | shmedia_md_apply_fix (fixP, valP); |
324bfcf3 AO |
4270 | return; |
4271 | #else | |
252b5132 | 4272 | abort (); |
324bfcf3 | 4273 | #endif |
252b5132 RH |
4274 | } |
4275 | ||
4276 | if (shift != 0) | |
4277 | { | |
4278 | if ((val & ((1 << shift) - 1)) != 0) | |
4279 | as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); | |
4280 | if (val >= 0) | |
4281 | val >>= shift; | |
4282 | else | |
4283 | val = ((val >> shift) | |
4284 | | ((long) -1 & ~ ((long) -1 >> shift))); | |
4285 | } | |
0c9b4fd7 KK |
4286 | |
4287 | /* Extend sign for 64-bit host. */ | |
4288 | val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000; | |
252b5132 RH |
4289 | if (max != 0 && (val < min || val > max)) |
4290 | as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); | |
01eaea5a NC |
4291 | else if (max != 0) |
4292 | /* Stop the generic code from trying to overlow check the value as well. | |
4293 | It may not have the correct value anyway, as we do not store val back | |
4294 | into *valP. */ | |
4295 | fixP->fx_no_overflow = 1; | |
252b5132 | 4296 | |
94f592af NC |
4297 | if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) |
4298 | fixP->fx_done = 1; | |
252b5132 RH |
4299 | } |
4300 | ||
4301 | /* Called just before address relaxation. Return the length | |
4302 | by which a fragment must grow to reach it's destination. */ | |
4303 | ||
4304 | int | |
8edc77b9 | 4305 | md_estimate_size_before_relax (fragS *fragP, segT segment_type) |
252b5132 | 4306 | { |
e66457fb AM |
4307 | int what; |
4308 | ||
252b5132 RH |
4309 | switch (fragP->fr_subtype) |
4310 | { | |
93c2a809 | 4311 | default: |
324bfcf3 AO |
4312 | #ifdef HAVE_SH64 |
4313 | return shmedia_md_estimate_size_before_relax (fragP, segment_type); | |
4314 | #else | |
93c2a809 | 4315 | abort (); |
324bfcf3 AO |
4316 | #endif |
4317 | ||
93c2a809 | 4318 | |
252b5132 | 4319 | case C (UNCOND_JUMP, UNDEF_DISP): |
6b31947e | 4320 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
4321 | if (!fragP->fr_symbol) |
4322 | { | |
4323 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
252b5132 RH |
4324 | } |
4325 | else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
4326 | { | |
4327 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
252b5132 RH |
4328 | } |
4329 | else | |
4330 | { | |
4331 | fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); | |
252b5132 RH |
4332 | } |
4333 | break; | |
4334 | ||
252b5132 RH |
4335 | case C (COND_JUMP, UNDEF_DISP): |
4336 | case C (COND_JUMP_DELAY, UNDEF_DISP): | |
e66457fb | 4337 | what = GET_WHAT (fragP->fr_subtype); |
6b31947e | 4338 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
4339 | if (fragP->fr_symbol |
4340 | && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
4341 | { | |
252b5132 | 4342 | /* Got a symbol and it's defined in this segment, become byte |
6b31947e | 4343 | sized - maybe it will fix up. */ |
252b5132 | 4344 | fragP->fr_subtype = C (what, COND8); |
252b5132 RH |
4345 | } |
4346 | else if (fragP->fr_symbol) | |
4347 | { | |
6b31947e | 4348 | /* Its got a segment, but its not ours, so it will always be long. */ |
252b5132 | 4349 | fragP->fr_subtype = C (what, UNDEF_WORD_DISP); |
252b5132 RH |
4350 | } |
4351 | else | |
4352 | { | |
6b31947e | 4353 | /* We know the abs value. */ |
252b5132 | 4354 | fragP->fr_subtype = C (what, COND8); |
252b5132 | 4355 | } |
93c2a809 | 4356 | break; |
252b5132 | 4357 | |
93c2a809 | 4358 | case C (UNCOND_JUMP, UNCOND12): |
e66457fb | 4359 | case C (UNCOND_JUMP, UNCOND32): |
93c2a809 AM |
4360 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): |
4361 | case C (COND_JUMP, COND8): | |
e66457fb AM |
4362 | case C (COND_JUMP, COND12): |
4363 | case C (COND_JUMP, COND32): | |
93c2a809 AM |
4364 | case C (COND_JUMP, UNDEF_WORD_DISP): |
4365 | case C (COND_JUMP_DELAY, COND8): | |
e66457fb AM |
4366 | case C (COND_JUMP_DELAY, COND12): |
4367 | case C (COND_JUMP_DELAY, COND32): | |
93c2a809 AM |
4368 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): |
4369 | /* When relaxing a section for the second time, we don't need to | |
e66457fb | 4370 | do anything besides return the current size. */ |
252b5132 RH |
4371 | break; |
4372 | } | |
e66457fb AM |
4373 | |
4374 | fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length; | |
252b5132 RH |
4375 | return fragP->fr_var; |
4376 | } | |
4377 | ||
6b31947e | 4378 | /* Put number into target byte order. */ |
252b5132 RH |
4379 | |
4380 | void | |
8edc77b9 | 4381 | md_number_to_chars (char *ptr, valueT use, int nbytes) |
252b5132 | 4382 | { |
324bfcf3 AO |
4383 | #ifdef HAVE_SH64 |
4384 | /* We might need to set the contents type to data. */ | |
4385 | sh64_flag_output (); | |
4386 | #endif | |
4387 | ||
252b5132 RH |
4388 | if (! target_big_endian) |
4389 | number_to_chars_littleendian (ptr, use, nbytes); | |
4390 | else | |
4391 | number_to_chars_bigendian (ptr, use, nbytes); | |
4392 | } | |
4393 | ||
7be1c489 | 4394 | /* This version is used in obj-coff.c eg. for the sh-hms target. */ |
cce5a618 NC |
4395 | |
4396 | long | |
8edc77b9 | 4397 | md_pcrel_from (fixS *fixP) |
cce5a618 NC |
4398 | { |
4399 | return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; | |
4400 | } | |
4401 | ||
252b5132 | 4402 | long |
8edc77b9 | 4403 | md_pcrel_from_section (fixS *fixP, segT sec) |
252b5132 | 4404 | { |
28602ebf KK |
4405 | if (! sh_local_pcrel (fixP) |
4406 | && fixP->fx_addsy != (symbolS *) NULL | |
ae6063d4 | 4407 | && (generic_force_reloc (fixP) |
ef17112f HPN |
4408 | || S_GET_SEGMENT (fixP->fx_addsy) != sec)) |
4409 | { | |
4410 | /* The symbol is undefined (or is defined but not in this section, | |
4411 | or we're not sure about it being the final definition). Let the | |
4412 | linker figure it out. We need to adjust the subtraction of a | |
4413 | symbol to the position of the relocated data, though. */ | |
4414 | return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0; | |
4415 | } | |
4416 | ||
cce5a618 | 4417 | return md_pcrel_from (fixP); |
252b5132 RH |
4418 | } |
4419 | ||
252b5132 RH |
4420 | /* Create a reloc. */ |
4421 | ||
4422 | arelent * | |
8edc77b9 | 4423 | tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) |
252b5132 RH |
4424 | { |
4425 | arelent *rel; | |
4426 | bfd_reloc_code_real_type r_type; | |
4427 | ||
4428 | rel = (arelent *) xmalloc (sizeof (arelent)); | |
49309057 ILT |
4429 | rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
4430 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
252b5132 RH |
4431 | rel->address = fixp->fx_frag->fr_address + fixp->fx_where; |
4432 | ||
4433 | r_type = fixp->fx_r_type; | |
4434 | ||
4435 | if (SWITCH_TABLE (fixp)) | |
4436 | { | |
bdfaef52 | 4437 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy); |
b131d1fc | 4438 | rel->addend = rel->address - S_GET_VALUE(fixp->fx_subsy); |
252b5132 RH |
4439 | if (r_type == BFD_RELOC_16) |
4440 | r_type = BFD_RELOC_SH_SWITCH16; | |
4441 | else if (r_type == BFD_RELOC_8) | |
4442 | r_type = BFD_RELOC_8_PCREL; | |
4443 | else if (r_type == BFD_RELOC_32) | |
4444 | r_type = BFD_RELOC_SH_SWITCH32; | |
4445 | else | |
4446 | abort (); | |
4447 | } | |
4448 | else if (r_type == BFD_RELOC_SH_USES) | |
4449 | rel->addend = fixp->fx_addnumber; | |
4450 | else if (r_type == BFD_RELOC_SH_COUNT) | |
4451 | rel->addend = fixp->fx_offset; | |
4452 | else if (r_type == BFD_RELOC_SH_ALIGN) | |
4453 | rel->addend = fixp->fx_offset; | |
4454 | else if (r_type == BFD_RELOC_VTABLE_INHERIT | |
4455 | || r_type == BFD_RELOC_VTABLE_ENTRY) | |
4456 | rel->addend = fixp->fx_offset; | |
015551fc JR |
4457 | else if (r_type == BFD_RELOC_SH_LOOP_START |
4458 | || r_type == BFD_RELOC_SH_LOOP_END) | |
4459 | rel->addend = fixp->fx_offset; | |
4460 | else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel) | |
4461 | { | |
4462 | rel->addend = 0; | |
4463 | rel->address = rel->addend = fixp->fx_offset; | |
4464 | } | |
324bfcf3 AO |
4465 | #ifdef HAVE_SH64 |
4466 | else if (shmedia_init_reloc (rel, fixp)) | |
4467 | ; | |
4468 | #endif | |
252b5132 | 4469 | else |
55e6e397 | 4470 | rel->addend = fixp->fx_addnumber; |
252b5132 RH |
4471 | |
4472 | rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); | |
78878175 | 4473 | |
a161fe53 | 4474 | if (rel->howto == NULL) |
252b5132 RH |
4475 | { |
4476 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
4477 | _("Cannot represent relocation type %s"), | |
4478 | bfd_get_reloc_code_name (r_type)); | |
4479 | /* Set howto to a garbage value so that we can keep going. */ | |
4480 | rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); | |
9c2799c2 | 4481 | gas_assert (rel->howto != NULL); |
252b5132 | 4482 | } |
78878175 NC |
4483 | #ifdef OBJ_ELF |
4484 | else if (rel->howto->type == R_SH_IND12W) | |
4485 | rel->addend += fixp->fx_offset - 4; | |
4486 | #endif | |
252b5132 RH |
4487 | |
4488 | return rel; | |
4489 | } | |
4490 | ||
538cd60f AO |
4491 | #ifdef OBJ_ELF |
4492 | inline static char * | |
8edc77b9 | 4493 | sh_end_of_match (char *cont, char *what) |
538cd60f AO |
4494 | { |
4495 | int len = strlen (what); | |
4496 | ||
4497 | if (strncasecmp (cont, what, strlen (what)) == 0 | |
4498 | && ! is_part_of_name (cont[len])) | |
4499 | return cont + len; | |
4500 | ||
4501 | return NULL; | |
5d6255fe | 4502 | } |
538cd60f AO |
4503 | |
4504 | int | |
9497f5ac NC |
4505 | sh_parse_name (char const *name, |
4506 | expressionS *exprP, | |
4507 | enum expr_mode mode, | |
4508 | char *nextcharP) | |
538cd60f AO |
4509 | { |
4510 | char *next = input_line_pointer; | |
4511 | char *next_end; | |
4512 | int reloc_type; | |
4513 | segT segment; | |
4514 | ||
4515 | exprP->X_op_symbol = NULL; | |
4516 | ||
4517 | if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) | |
4518 | { | |
4519 | if (! GOT_symbol) | |
4520 | GOT_symbol = symbol_find_or_make (name); | |
4521 | ||
4522 | exprP->X_add_symbol = GOT_symbol; | |
4523 | no_suffix: | |
4524 | /* If we have an absolute symbol or a reg, then we know its | |
37dedf66 | 4525 | value now. */ |
538cd60f | 4526 | segment = S_GET_SEGMENT (exprP->X_add_symbol); |
9497f5ac | 4527 | if (mode != expr_defer && segment == absolute_section) |
538cd60f AO |
4528 | { |
4529 | exprP->X_op = O_constant; | |
4530 | exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); | |
4531 | exprP->X_add_symbol = NULL; | |
4532 | } | |
9497f5ac | 4533 | else if (mode != expr_defer && segment == reg_section) |
538cd60f AO |
4534 | { |
4535 | exprP->X_op = O_register; | |
4536 | exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); | |
4537 | exprP->X_add_symbol = NULL; | |
4538 | } | |
4539 | else | |
4540 | { | |
4541 | exprP->X_op = O_symbol; | |
4542 | exprP->X_add_number = 0; | |
4543 | } | |
4544 | ||
4545 | return 1; | |
4546 | } | |
4547 | ||
4548 | exprP->X_add_symbol = symbol_find_or_make (name); | |
5d6255fe | 4549 | |
538cd60f AO |
4550 | if (*nextcharP != '@') |
4551 | goto no_suffix; | |
4552 | else if ((next_end = sh_end_of_match (next + 1, "GOTOFF"))) | |
4553 | reloc_type = BFD_RELOC_32_GOTOFF; | |
324bfcf3 AO |
4554 | else if ((next_end = sh_end_of_match (next + 1, "GOTPLT"))) |
4555 | reloc_type = BFD_RELOC_SH_GOTPLT32; | |
538cd60f AO |
4556 | else if ((next_end = sh_end_of_match (next + 1, "GOT"))) |
4557 | reloc_type = BFD_RELOC_32_GOT_PCREL; | |
4558 | else if ((next_end = sh_end_of_match (next + 1, "PLT"))) | |
4559 | reloc_type = BFD_RELOC_32_PLT_PCREL; | |
9efb3b7b KK |
4560 | else if ((next_end = sh_end_of_match (next + 1, "TLSGD"))) |
4561 | reloc_type = BFD_RELOC_SH_TLS_GD_32; | |
4562 | else if ((next_end = sh_end_of_match (next + 1, "TLSLDM"))) | |
4563 | reloc_type = BFD_RELOC_SH_TLS_LD_32; | |
4564 | else if ((next_end = sh_end_of_match (next + 1, "GOTTPOFF"))) | |
4565 | reloc_type = BFD_RELOC_SH_TLS_IE_32; | |
4566 | else if ((next_end = sh_end_of_match (next + 1, "TPOFF"))) | |
4567 | reloc_type = BFD_RELOC_SH_TLS_LE_32; | |
4568 | else if ((next_end = sh_end_of_match (next + 1, "DTPOFF"))) | |
4569 | reloc_type = BFD_RELOC_SH_TLS_LDO_32; | |
8e45593f NC |
4570 | else if ((next_end = sh_end_of_match (next + 1, "PCREL"))) |
4571 | reloc_type = BFD_RELOC_32_PCREL; | |
4572 | else if ((next_end = sh_end_of_match (next + 1, "GOTFUNCDESC"))) | |
4573 | reloc_type = BFD_RELOC_SH_GOTFUNCDESC; | |
4574 | else if ((next_end = sh_end_of_match (next + 1, "GOTOFFFUNCDESC"))) | |
4575 | reloc_type = BFD_RELOC_SH_GOTOFFFUNCDESC; | |
4576 | else if ((next_end = sh_end_of_match (next + 1, "FUNCDESC"))) | |
4577 | reloc_type = BFD_RELOC_SH_FUNCDESC; | |
538cd60f AO |
4578 | else |
4579 | goto no_suffix; | |
4580 | ||
4581 | *input_line_pointer = *nextcharP; | |
4582 | input_line_pointer = next_end; | |
4583 | *nextcharP = *input_line_pointer; | |
4584 | *input_line_pointer = '\0'; | |
4585 | ||
4586 | exprP->X_op = O_PIC_reloc; | |
4587 | exprP->X_add_number = 0; | |
4588 | exprP->X_md = reloc_type; | |
4589 | ||
4590 | return 1; | |
4591 | } | |
2ce4cc60 KK |
4592 | |
4593 | void | |
4594 | sh_cfi_frame_initial_instructions (void) | |
4595 | { | |
4596 | cfi_add_CFA_def_cfa (15, 0); | |
4597 | } | |
4598 | ||
4599 | int | |
1df69f4f | 4600 | sh_regname_to_dw2regnum (char *regname) |
2ce4cc60 KK |
4601 | { |
4602 | unsigned int regnum = -1; | |
4603 | unsigned int i; | |
4604 | const char *p; | |
4605 | char *q; | |
4606 | static struct { char *name; int dw2regnum; } regnames[] = | |
4607 | { | |
4608 | { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 }, | |
4609 | { "macl", 21 }, { "fpul", 23 } | |
4610 | }; | |
4611 | ||
4612 | for (i = 0; i < ARRAY_SIZE (regnames); ++i) | |
4613 | if (strcmp (regnames[i].name, regname) == 0) | |
4614 | return regnames[i].dw2regnum; | |
4615 | ||
4616 | if (regname[0] == 'r') | |
4617 | { | |
4618 | p = regname + 1; | |
4619 | regnum = strtoul (p, &q, 10); | |
4620 | if (p == q || *q || regnum >= 16) | |
4621 | return -1; | |
4622 | } | |
4623 | else if (regname[0] == 'f' && regname[1] == 'r') | |
4624 | { | |
4625 | p = regname + 2; | |
4626 | regnum = strtoul (p, &q, 10); | |
4627 | if (p == q || *q || regnum >= 16) | |
4628 | return -1; | |
4629 | regnum += 25; | |
4630 | } | |
4631 | else if (regname[0] == 'x' && regname[1] == 'd') | |
4632 | { | |
4633 | p = regname + 2; | |
4634 | regnum = strtoul (p, &q, 10); | |
4635 | if (p == q || *q || regnum >= 8) | |
4636 | return -1; | |
4637 | regnum += 87; | |
4638 | } | |
4639 | return regnum; | |
4640 | } | |
f17c130b | 4641 | #endif /* OBJ_ELF */ |