Commit | Line | Data |
---|---|---|
ef230218 | 1 | /* tc-sh.c -- Assemble code for the Renesas / SuperH SH |
ae6063d4 | 2 | Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 |
f7e42eb4 | 3 | Free Software Foundation, Inc. |
252b5132 RH |
4 | |
5 | This file is part of GAS, the GNU Assembler. | |
6 | ||
7 | GAS is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GAS is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GAS; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
6b31947e | 22 | /* Written By Steve Chamberlain <sac@cygnus.com> */ |
252b5132 RH |
23 | |
24 | #include <stdio.h> | |
25 | #include "as.h" | |
26 | #include "bfd.h" | |
27 | #include "subsegs.h" | |
28 | #define DEFINE_TABLE | |
29 | #include "opcodes/sh-opc.h" | |
3882b010 | 30 | #include "safe-ctype.h" |
43841e91 | 31 | #include "struc-symbol.h" |
d4845d57 JR |
32 | |
33 | #ifdef OBJ_ELF | |
34 | #include "elf/sh.h" | |
35 | #endif | |
36 | ||
0d10e182 | 37 | #include "dwarf2dbg.h" |
0d10e182 | 38 | |
e08ae979 HPN |
39 | typedef struct |
40 | { | |
41 | sh_arg_type type; | |
42 | int reg; | |
43 | expressionS immediate; | |
44 | } | |
45 | sh_operand_info; | |
46 | ||
252b5132 RH |
47 | const char comment_chars[] = "!"; |
48 | const char line_separator_chars[] = ";"; | |
49 | const char line_comment_chars[] = "!#"; | |
50 | ||
51 | static void s_uses PARAMS ((int)); | |
52 | ||
53 | static void sh_count_relocs PARAMS ((bfd *, segT, PTR)); | |
54 | static void sh_frob_section PARAMS ((bfd *, segT, PTR)); | |
55 | ||
252b5132 | 56 | static void s_uacons PARAMS ((int)); |
d4845d57 | 57 | static sh_opcode_info *find_cooked_opcode PARAMS ((char **)); |
0d10e182 | 58 | static unsigned int assemble_ppi PARAMS ((char *, sh_opcode_info *)); |
e08ae979 | 59 | static void little PARAMS ((int)); |
05982cac | 60 | static void big PARAMS ((int)); |
e08ae979 | 61 | static int parse_reg PARAMS ((char *, int *, int *)); |
e08ae979 HPN |
62 | static char *parse_exp PARAMS ((char *, sh_operand_info *)); |
63 | static char *parse_at PARAMS ((char *, sh_operand_info *)); | |
64 | static void get_operand PARAMS ((char **, sh_operand_info *)); | |
65 | static char *get_operands | |
66 | PARAMS ((sh_opcode_info *, char *, sh_operand_info *)); | |
67 | static sh_opcode_info *get_specific | |
68 | PARAMS ((sh_opcode_info *, sh_operand_info *)); | |
69 | static void insert PARAMS ((char *, int, int, sh_operand_info *)); | |
70 | static void build_relax PARAMS ((sh_opcode_info *, sh_operand_info *)); | |
71 | static char *insert_loop_bounds PARAMS ((char *, sh_operand_info *)); | |
72 | static unsigned int build_Mytes | |
73 | PARAMS ((sh_opcode_info *, sh_operand_info *)); | |
b34976b6 | 74 | static bfd_boolean sh_local_pcrel PARAMS ((fixS *fix)); |
252b5132 | 75 | |
a1cc9221 AO |
76 | #ifdef OBJ_ELF |
77 | static void sh_elf_cons PARAMS ((int)); | |
78 | ||
538cd60f AO |
79 | inline static int sh_PIC_related_p PARAMS ((symbolS *)); |
80 | static int sh_check_fixup PARAMS ((expressionS *, bfd_reloc_code_real_type *)); | |
81 | inline static char *sh_end_of_match PARAMS ((char *, char *)); | |
82 | ||
a1cc9221 AO |
83 | symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ |
84 | #endif | |
85 | ||
05982cac HPN |
86 | static void |
87 | big (ignore) | |
88 | int ignore ATTRIBUTE_UNUSED; | |
89 | { | |
90 | if (! target_big_endian) | |
91 | as_bad (_("directive .big encountered when option -big required")); | |
92 | ||
93 | /* Stop further messages. */ | |
94 | target_big_endian = 1; | |
95 | } | |
252b5132 RH |
96 | |
97 | static void | |
98 | little (ignore) | |
43841e91 | 99 | int ignore ATTRIBUTE_UNUSED; |
252b5132 | 100 | { |
05982cac HPN |
101 | if (target_big_endian) |
102 | as_bad (_("directive .little encountered when option -little required")); | |
103 | ||
104 | /* Stop further messages. */ | |
252b5132 RH |
105 | target_big_endian = 0; |
106 | } | |
107 | ||
d4845d57 JR |
108 | /* This table describes all the machine specific pseudo-ops the assembler |
109 | has to support. The fields are: | |
110 | pseudo-op name without dot | |
111 | function to call to execute this pseudo-op | |
6b31947e | 112 | Integer arg to pass to the function. */ |
d4845d57 | 113 | |
252b5132 RH |
114 | const pseudo_typeS md_pseudo_table[] = |
115 | { | |
a1cc9221 AO |
116 | #ifdef OBJ_ELF |
117 | {"long", sh_elf_cons, 4}, | |
118 | {"int", sh_elf_cons, 4}, | |
119 | {"word", sh_elf_cons, 2}, | |
120 | {"short", sh_elf_cons, 2}, | |
121 | #else | |
252b5132 RH |
122 | {"int", cons, 4}, |
123 | {"word", cons, 2}, | |
a1cc9221 | 124 | #endif /* OBJ_ELF */ |
05982cac | 125 | {"big", big, 0}, |
252b5132 RH |
126 | {"form", listing_psize, 0}, |
127 | {"little", little, 0}, | |
128 | {"heading", listing_title, 0}, | |
129 | {"import", s_ignore, 0}, | |
130 | {"page", listing_eject, 0}, | |
131 | {"program", s_ignore, 0}, | |
132 | {"uses", s_uses, 0}, | |
133 | {"uaword", s_uacons, 2}, | |
134 | {"ualong", s_uacons, 4}, | |
de68de20 AO |
135 | {"uaquad", s_uacons, 8}, |
136 | {"2byte", s_uacons, 2}, | |
137 | {"4byte", s_uacons, 4}, | |
138 | {"8byte", s_uacons, 8}, | |
324bfcf3 AO |
139 | #ifdef HAVE_SH64 |
140 | {"mode", s_sh64_mode, 0 }, | |
141 | ||
142 | /* Have the old name too. */ | |
143 | {"isa", s_sh64_mode, 0 }, | |
144 | ||
145 | /* Assert that the right ABI is used. */ | |
146 | {"abi", s_sh64_abi, 0 }, | |
147 | ||
148 | { "vtable_inherit", sh64_vtable_inherit, 0 }, | |
149 | { "vtable_entry", sh64_vtable_entry, 0 }, | |
150 | #endif /* HAVE_SH64 */ | |
252b5132 RH |
151 | {0, 0, 0} |
152 | }; | |
153 | ||
154 | /*int md_reloc_size; */ | |
155 | ||
156 | int sh_relax; /* set if -relax seen */ | |
157 | ||
158 | /* Whether -small was seen. */ | |
159 | ||
160 | int sh_small; | |
161 | ||
bdfaef52 | 162 | /* preset architecture set, if given; zero otherwise. */ |
d4845d57 | 163 | |
bdfaef52 | 164 | static int preset_target_arch; |
d4845d57 JR |
165 | |
166 | /* The bit mask of architectures that could | |
167 | accomodate the insns seen so far. */ | |
168 | static int valid_arch; | |
169 | ||
252b5132 RH |
170 | const char EXP_CHARS[] = "eE"; |
171 | ||
6b31947e | 172 | /* Chars that mean this number is a floating point constant. */ |
252b5132 RH |
173 | /* As in 0f12.456 */ |
174 | /* or 0d1.2345e12 */ | |
175 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
176 | ||
177 | #define C(a,b) ENCODE_RELAX(a,b) | |
178 | ||
252b5132 RH |
179 | #define ENCODE_RELAX(what,length) (((what) << 4) + (length)) |
180 | #define GET_WHAT(x) ((x>>4)) | |
181 | ||
6b31947e | 182 | /* These are the three types of relaxable instrction. */ |
324bfcf3 AO |
183 | /* These are the types of relaxable instructions; except for END which is |
184 | a marker. */ | |
252b5132 RH |
185 | #define COND_JUMP 1 |
186 | #define COND_JUMP_DELAY 2 | |
187 | #define UNCOND_JUMP 3 | |
324bfcf3 AO |
188 | |
189 | #ifdef HAVE_SH64 | |
190 | ||
191 | /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */ | |
192 | #define SH64PCREL16_32 4 | |
193 | /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */ | |
194 | #define SH64PCREL16_64 5 | |
195 | ||
196 | /* Variants of the above for adjusting the insn to PTA or PTB according to | |
197 | the label. */ | |
198 | #define SH64PCREL16PT_32 6 | |
199 | #define SH64PCREL16PT_64 7 | |
200 | ||
201 | /* A MOVI expansion, expanding to at most 32 or 64 bits. */ | |
202 | #define MOVI_IMM_32 8 | |
203 | #define MOVI_IMM_32_PCREL 9 | |
204 | #define MOVI_IMM_64 10 | |
205 | #define MOVI_IMM_64_PCREL 11 | |
206 | #define END 12 | |
207 | ||
208 | #else /* HAVE_SH64 */ | |
209 | ||
252b5132 RH |
210 | #define END 4 |
211 | ||
324bfcf3 AO |
212 | #endif /* HAVE_SH64 */ |
213 | ||
252b5132 RH |
214 | #define UNDEF_DISP 0 |
215 | #define COND8 1 | |
216 | #define COND12 2 | |
217 | #define COND32 3 | |
252b5132 RH |
218 | #define UNDEF_WORD_DISP 4 |
219 | ||
220 | #define UNCOND12 1 | |
221 | #define UNCOND32 2 | |
222 | ||
324bfcf3 AO |
223 | #ifdef HAVE_SH64 |
224 | #define UNDEF_SH64PCREL 0 | |
225 | #define SH64PCREL16 1 | |
226 | #define SH64PCREL32 2 | |
227 | #define SH64PCREL48 3 | |
228 | #define SH64PCREL64 4 | |
229 | #define SH64PCRELPLT 5 | |
230 | ||
231 | #define UNDEF_MOVI 0 | |
232 | #define MOVI_16 1 | |
233 | #define MOVI_32 2 | |
234 | #define MOVI_48 3 | |
235 | #define MOVI_64 4 | |
236 | #define MOVI_PLT 5 | |
237 | #define MOVI_GOTOFF 6 | |
238 | #define MOVI_GOTPC 7 | |
239 | #endif /* HAVE_SH64 */ | |
240 | ||
252b5132 RH |
241 | /* Branch displacements are from the address of the branch plus |
242 | four, thus all minimum and maximum values have 4 added to them. */ | |
243 | #define COND8_F 258 | |
244 | #define COND8_M -252 | |
245 | #define COND8_LENGTH 2 | |
246 | ||
247 | /* There is one extra instruction before the branch, so we must add | |
248 | two more bytes to account for it. */ | |
249 | #define COND12_F 4100 | |
250 | #define COND12_M -4090 | |
251 | #define COND12_LENGTH 6 | |
252 | ||
253 | #define COND12_DELAY_LENGTH 4 | |
254 | ||
255 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
256 | since this relocation type is not supported yet. */ | |
257 | #define COND32_F (1<<30) | |
258 | #define COND32_M -(1<<30) | |
259 | #define COND32_LENGTH 14 | |
260 | ||
261 | #define UNCOND12_F 4098 | |
262 | #define UNCOND12_M -4092 | |
263 | #define UNCOND12_LENGTH 2 | |
264 | ||
265 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
266 | since this relocation type is not supported yet. */ | |
267 | #define UNCOND32_F (1<<30) | |
268 | #define UNCOND32_M -(1<<30) | |
269 | #define UNCOND32_LENGTH 14 | |
270 | ||
324bfcf3 AO |
271 | #ifdef HAVE_SH64 |
272 | /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label, | |
273 | TRd" as is the current insn, so no extra length. Note that the "reach" | |
274 | is calculated from the address *after* that insn, but the offset in the | |
275 | insn is calculated from the beginning of the insn. We also need to | |
276 | take into account the implicit 1 coded as the "A" in PTA when counting | |
277 | forward. If PTB reaches an odd address, we trap that as an error | |
278 | elsewhere, so we don't have to have different relaxation entries. We | |
279 | don't add a one to the negative range, since PTB would then have the | |
280 | farthest backward-reaching value skipped, not generated at relaxation. */ | |
281 | #define SH64PCREL16_F (32767 * 4 - 4 + 1) | |
282 | #define SH64PCREL16_M (-32768 * 4 - 4) | |
283 | #define SH64PCREL16_LENGTH 0 | |
284 | ||
285 | /* The next step is to change that PT insn into | |
286 | MOVI ((label - datalabel Ln) >> 16) & 65535, R25 | |
287 | SHORI (label - datalabel Ln) & 65535, R25 | |
288 | Ln: | |
289 | PTREL R25,TRd | |
290 | which means two extra insns, 8 extra bytes. This is the limit for the | |
291 | 32-bit ABI. | |
292 | ||
293 | The expressions look a bit bad since we have to adjust this to avoid overflow on a | |
294 | 32-bit host. */ | |
295 | #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4) | |
296 | #define SH64PCREL32_LENGTH (2 * 4) | |
297 | ||
298 | /* Similarly, we just change the MOVI and add a SHORI for the 48-bit | |
299 | expansion. */ | |
300 | #if BFD_HOST_64BIT_LONG | |
301 | /* The "reach" type is long, so we can only do this for a 64-bit-long | |
302 | host. */ | |
303 | #define SH64PCREL32_M (((long) -1 << 30) * 2 - 4) | |
304 | #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4) | |
305 | #define SH64PCREL48_M (((long) -1 << 47) - 4) | |
306 | #define SH64PCREL48_LENGTH (3 * 4) | |
307 | #else | |
308 | /* If the host does not have 64-bit longs, just make this state identical | |
309 | in reach to the 32-bit state. Note that we have a slightly incorrect | |
310 | reach, but the correct one above will overflow a 32-bit number. */ | |
311 | #define SH64PCREL32_M (((long) -1 << 30) * 2) | |
312 | #define SH64PCREL48_F SH64PCREL32_F | |
313 | #define SH64PCREL48_M SH64PCREL32_M | |
314 | #define SH64PCREL48_LENGTH (3 * 4) | |
315 | #endif /* BFD_HOST_64BIT_LONG */ | |
316 | ||
317 | /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI | |
318 | + PTREL sequence. */ | |
319 | #define SH64PCREL64_LENGTH (4 * 4) | |
320 | ||
321 | /* For MOVI, we make the MOVI + SHORI... expansion you can see in the | |
322 | SH64PCREL expansions. The PCREL one is similar, but the other has no | |
323 | pc-relative reach; it must be fully expanded in | |
324 | shmedia_md_estimate_size_before_relax. */ | |
325 | #define MOVI_16_LENGTH 0 | |
326 | #define MOVI_16_F (32767 - 4) | |
327 | #define MOVI_16_M (-32768 - 4) | |
328 | #define MOVI_32_LENGTH 4 | |
329 | #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4) | |
330 | #define MOVI_48_LENGTH 8 | |
331 | ||
332 | #if BFD_HOST_64BIT_LONG | |
333 | /* The "reach" type is long, so we can only do this for a 64-bit-long | |
334 | host. */ | |
335 | #define MOVI_32_M (((long) -1 << 30) * 2 - 4) | |
336 | #define MOVI_48_F ((((long) 1 << 47) - 1) - 4) | |
337 | #define MOVI_48_M (((long) -1 << 47) - 4) | |
338 | #else | |
339 | /* If the host does not have 64-bit longs, just make this state identical | |
340 | in reach to the 32-bit state. Note that we have a slightly incorrect | |
341 | reach, but the correct one above will overflow a 32-bit number. */ | |
342 | #define MOVI_32_M (((long) -1 << 30) * 2) | |
343 | #define MOVI_48_F MOVI_32_F | |
344 | #define MOVI_48_M MOVI_32_M | |
345 | #endif /* BFD_HOST_64BIT_LONG */ | |
346 | ||
347 | #define MOVI_64_LENGTH 12 | |
348 | #endif /* HAVE_SH64 */ | |
349 | ||
43841e91 NC |
350 | #define EMPTY { 0, 0, 0, 0 } |
351 | ||
252b5132 | 352 | const relax_typeS md_relax_table[C (END, 0)] = { |
43841e91 NC |
353 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
354 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
252b5132 | 355 | |
43841e91 | 356 | EMPTY, |
252b5132 RH |
357 | /* C (COND_JUMP, COND8) */ |
358 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, | |
359 | /* C (COND_JUMP, COND12) */ | |
360 | { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, | |
361 | /* C (COND_JUMP, COND32) */ | |
362 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
e66457fb AM |
363 | /* C (COND_JUMP, UNDEF_WORD_DISP) */ |
364 | { 0, 0, COND32_LENGTH, 0, }, | |
365 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 366 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 | 367 | |
43841e91 | 368 | EMPTY, |
252b5132 RH |
369 | /* C (COND_JUMP_DELAY, COND8) */ |
370 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, | |
371 | /* C (COND_JUMP_DELAY, COND12) */ | |
372 | { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, | |
373 | /* C (COND_JUMP_DELAY, COND32) */ | |
374 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
e66457fb AM |
375 | /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */ |
376 | { 0, 0, COND32_LENGTH, 0, }, | |
377 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 378 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 | 379 | |
43841e91 | 380 | EMPTY, |
252b5132 RH |
381 | /* C (UNCOND_JUMP, UNCOND12) */ |
382 | { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, | |
383 | /* C (UNCOND_JUMP, UNCOND32) */ | |
384 | { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, | |
e66457fb AM |
385 | EMPTY, |
386 | /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */ | |
387 | { 0, 0, UNCOND32_LENGTH, 0, }, | |
388 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 389 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
324bfcf3 AO |
390 | |
391 | #ifdef HAVE_SH64 | |
392 | /* C (SH64PCREL16_32, SH64PCREL16) */ | |
393 | EMPTY, | |
394 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_32, SH64PCREL32) }, | |
395 | /* C (SH64PCREL16_32, SH64PCREL32) */ | |
396 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
397 | EMPTY, EMPTY, | |
398 | /* C (SH64PCREL16_32, SH64PCRELPLT) */ | |
399 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
400 | EMPTY, EMPTY, | |
401 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
402 | ||
403 | /* C (SH64PCREL16_64, SH64PCREL16) */ | |
404 | EMPTY, | |
405 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_64, SH64PCREL32) }, | |
406 | /* C (SH64PCREL16_64, SH64PCREL32) */ | |
407 | { SH64PCREL32_F, SH64PCREL32_M, SH64PCREL32_LENGTH, C (SH64PCREL16_64, SH64PCREL48) }, | |
408 | /* C (SH64PCREL16_64, SH64PCREL48) */ | |
409 | { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16_64, SH64PCREL64) }, | |
410 | /* C (SH64PCREL16_64, SH64PCREL64) */ | |
411 | { 0, 0, SH64PCREL64_LENGTH, 0 }, | |
412 | /* C (SH64PCREL16_64, SH64PCRELPLT) */ | |
413 | { 0, 0, SH64PCREL64_LENGTH, 0 }, | |
414 | EMPTY, EMPTY, | |
415 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
416 | ||
417 | /* C (SH64PCREL16PT_32, SH64PCREL16) */ | |
418 | EMPTY, | |
419 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_32, SH64PCREL32) }, | |
420 | /* C (SH64PCREL16PT_32, SH64PCREL32) */ | |
421 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
422 | EMPTY, EMPTY, | |
423 | /* C (SH64PCREL16PT_32, SH64PCRELPLT) */ | |
424 | { 0, 0, SH64PCREL32_LENGTH, 0 }, | |
425 | EMPTY, EMPTY, | |
426 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
427 | ||
428 | /* C (SH64PCREL16PT_64, SH64PCREL16) */ | |
429 | EMPTY, | |
430 | { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_64, SH64PCREL32) }, | |
431 | /* C (SH64PCREL16PT_64, SH64PCREL32) */ | |
432 | { SH64PCREL32_F, | |
5d6255fe | 433 | SH64PCREL32_M, |
324bfcf3 AO |
434 | SH64PCREL32_LENGTH, |
435 | C (SH64PCREL16PT_64, SH64PCREL48) }, | |
436 | /* C (SH64PCREL16PT_64, SH64PCREL48) */ | |
437 | { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16PT_64, SH64PCREL64) }, | |
438 | /* C (SH64PCREL16PT_64, SH64PCREL64) */ | |
439 | { 0, 0, SH64PCREL64_LENGTH, 0 }, | |
440 | /* C (SH64PCREL16PT_64, SH64PCRELPLT) */ | |
441 | { 0, 0, SH64PCREL64_LENGTH, 0}, | |
442 | EMPTY, EMPTY, | |
443 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
444 | ||
445 | /* C (MOVI_IMM_32, UNDEF_MOVI) */ | |
446 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
447 | /* C (MOVI_IMM_32, MOVI_16) */ | |
448 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32, MOVI_32) }, | |
449 | /* C (MOVI_IMM_32, MOVI_32) */ | |
450 | { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, 0 }, | |
451 | EMPTY, EMPTY, EMPTY, | |
452 | /* C (MOVI_IMM_32, MOVI_GOTOFF) */ | |
453 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
454 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
455 | ||
456 | /* C (MOVI_IMM_32_PCREL, MOVI_16) */ | |
457 | EMPTY, | |
458 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32_PCREL, MOVI_32) }, | |
459 | /* C (MOVI_IMM_32_PCREL, MOVI_32) */ | |
460 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
461 | EMPTY, EMPTY, | |
462 | /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */ | |
463 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
464 | EMPTY, | |
465 | /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */ | |
466 | { 0, 0, MOVI_32_LENGTH, 0 }, | |
467 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
468 | ||
469 | /* C (MOVI_IMM_64, UNDEF_MOVI) */ | |
470 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
471 | /* C (MOVI_IMM_64, MOVI_16) */ | |
472 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64, MOVI_32) }, | |
473 | /* C (MOVI_IMM_64, MOVI_32) */ | |
474 | { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64, MOVI_48) }, | |
475 | /* C (MOVI_IMM_64, MOVI_48) */ | |
476 | { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64, MOVI_64) }, | |
477 | /* C (MOVI_IMM_64, MOVI_64) */ | |
478 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
479 | EMPTY, | |
480 | /* C (MOVI_IMM_64, MOVI_GOTOFF) */ | |
481 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
482 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
483 | ||
484 | /* C (MOVI_IMM_64_PCREL, MOVI_16) */ | |
485 | EMPTY, | |
486 | { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_32) }, | |
487 | /* C (MOVI_IMM_64_PCREL, MOVI_32) */ | |
488 | { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_48) }, | |
489 | /* C (MOVI_IMM_64_PCREL, MOVI_48) */ | |
490 | { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_64) }, | |
491 | /* C (MOVI_IMM_64_PCREL, MOVI_64) */ | |
492 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
493 | /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */ | |
494 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
495 | EMPTY, | |
496 | /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */ | |
497 | { 0, 0, MOVI_64_LENGTH, 0 }, | |
498 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
499 | ||
500 | #endif /* HAVE_SH64 */ | |
501 | ||
252b5132 RH |
502 | }; |
503 | ||
43841e91 NC |
504 | #undef EMPTY |
505 | ||
252b5132 RH |
506 | static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ |
507 | ||
a1cc9221 AO |
508 | \f |
509 | #ifdef OBJ_ELF | |
538cd60f AO |
510 | /* Determinet whether the symbol needs any kind of PIC relocation. */ |
511 | ||
512 | inline static int | |
513 | sh_PIC_related_p (sym) | |
514 | symbolS *sym; | |
a1cc9221 | 515 | { |
538cd60f | 516 | expressionS *exp; |
a1cc9221 | 517 | |
538cd60f AO |
518 | if (! sym) |
519 | return 0; | |
520 | ||
521 | if (sym == GOT_symbol) | |
522 | return 1; | |
523 | ||
324bfcf3 AO |
524 | #ifdef HAVE_SH64 |
525 | if (sh_PIC_related_p (*symbol_get_tc (sym))) | |
526 | return 1; | |
527 | #endif | |
528 | ||
538cd60f AO |
529 | exp = symbol_get_value_expression (sym); |
530 | ||
531 | return (exp->X_op == O_PIC_reloc | |
532 | || sh_PIC_related_p (exp->X_add_symbol) | |
533 | || sh_PIC_related_p (exp->X_op_symbol)); | |
534 | } | |
535 | ||
536 | /* Determine the relocation type to be used to represent the | |
537 | expression, that may be rearranged. */ | |
538 | ||
539 | static int | |
540 | sh_check_fixup (main_exp, r_type_p) | |
541 | expressionS *main_exp; | |
542 | bfd_reloc_code_real_type *r_type_p; | |
543 | { | |
544 | expressionS *exp = main_exp; | |
545 | ||
546 | /* This is here for backward-compatibility only. GCC used to generated: | |
547 | ||
548 | f@PLT + . - (.LPCS# + 2) | |
549 | ||
550 | but we'd rather be able to handle this as a PIC-related reference | |
551 | plus/minus a symbol. However, gas' parser gives us: | |
552 | ||
553 | O_subtract (O_add (f@PLT, .), .LPCS#+2) | |
5d6255fe | 554 | |
538cd60f AO |
555 | so we attempt to transform this into: |
556 | ||
557 | O_subtract (f@PLT, O_subtract (.LPCS#+2, .)) | |
558 | ||
5d6255fe | 559 | which we can handle simply below. */ |
538cd60f AO |
560 | if (exp->X_op == O_subtract) |
561 | { | |
562 | if (sh_PIC_related_p (exp->X_op_symbol)) | |
563 | return 1; | |
564 | ||
565 | exp = symbol_get_value_expression (exp->X_add_symbol); | |
566 | ||
567 | if (exp && sh_PIC_related_p (exp->X_op_symbol)) | |
568 | return 1; | |
569 | ||
570 | if (exp && exp->X_op == O_add | |
571 | && sh_PIC_related_p (exp->X_add_symbol)) | |
572 | { | |
573 | symbolS *sym = exp->X_add_symbol; | |
574 | ||
575 | exp->X_op = O_subtract; | |
576 | exp->X_add_symbol = main_exp->X_op_symbol; | |
577 | ||
578 | main_exp->X_op_symbol = main_exp->X_add_symbol; | |
579 | main_exp->X_add_symbol = sym; | |
580 | ||
581 | main_exp->X_add_number += exp->X_add_number; | |
582 | exp->X_add_number = 0; | |
583 | } | |
584 | ||
585 | exp = main_exp; | |
586 | } | |
587 | else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol)) | |
588 | return 1; | |
589 | ||
590 | if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract) | |
591 | { | |
324bfcf3 AO |
592 | #ifdef HAVE_SH64 |
593 | if (exp->X_add_symbol | |
594 | && (exp->X_add_symbol == GOT_symbol | |
595 | || (GOT_symbol | |
596 | && *symbol_get_tc (exp->X_add_symbol) == GOT_symbol))) | |
597 | { | |
598 | switch (*r_type_p) | |
599 | { | |
600 | case BFD_RELOC_SH_IMM_LOW16: | |
601 | *r_type_p = BFD_RELOC_SH_GOTPC_LOW16; | |
602 | break; | |
603 | ||
604 | case BFD_RELOC_SH_IMM_MEDLOW16: | |
605 | *r_type_p = BFD_RELOC_SH_GOTPC_MEDLOW16; | |
606 | break; | |
607 | ||
608 | case BFD_RELOC_SH_IMM_MEDHI16: | |
609 | *r_type_p = BFD_RELOC_SH_GOTPC_MEDHI16; | |
610 | break; | |
611 | ||
612 | case BFD_RELOC_SH_IMM_HI16: | |
613 | *r_type_p = BFD_RELOC_SH_GOTPC_HI16; | |
614 | break; | |
615 | ||
616 | case BFD_RELOC_NONE: | |
617 | case BFD_RELOC_UNUSED: | |
618 | *r_type_p = BFD_RELOC_SH_GOTPC; | |
619 | break; | |
5d6255fe | 620 | |
324bfcf3 AO |
621 | default: |
622 | abort (); | |
623 | } | |
624 | return 0; | |
625 | } | |
626 | #else | |
538cd60f AO |
627 | if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) |
628 | { | |
629 | *r_type_p = BFD_RELOC_SH_GOTPC; | |
630 | return 0; | |
631 | } | |
324bfcf3 | 632 | #endif |
538cd60f AO |
633 | exp = symbol_get_value_expression (exp->X_add_symbol); |
634 | if (! exp) | |
635 | return 0; | |
636 | } | |
637 | ||
638 | if (exp->X_op == O_PIC_reloc) | |
639 | { | |
324bfcf3 AO |
640 | #ifdef HAVE_SH64 |
641 | switch (*r_type_p) | |
642 | { | |
643 | case BFD_RELOC_NONE: | |
644 | case BFD_RELOC_UNUSED: | |
645 | *r_type_p = exp->X_md; | |
646 | break; | |
647 | ||
648 | case BFD_RELOC_SH_IMM_LOW16: | |
649 | switch (exp->X_md) | |
650 | { | |
651 | case BFD_RELOC_32_GOTOFF: | |
652 | *r_type_p = BFD_RELOC_SH_GOTOFF_LOW16; | |
653 | break; | |
5d6255fe | 654 | |
324bfcf3 AO |
655 | case BFD_RELOC_SH_GOTPLT32: |
656 | *r_type_p = BFD_RELOC_SH_GOTPLT_LOW16; | |
657 | break; | |
5d6255fe | 658 | |
324bfcf3 AO |
659 | case BFD_RELOC_32_GOT_PCREL: |
660 | *r_type_p = BFD_RELOC_SH_GOT_LOW16; | |
661 | break; | |
5d6255fe | 662 | |
324bfcf3 AO |
663 | case BFD_RELOC_32_PLT_PCREL: |
664 | *r_type_p = BFD_RELOC_SH_PLT_LOW16; | |
665 | break; | |
666 | ||
667 | default: | |
668 | abort (); | |
669 | } | |
670 | break; | |
671 | ||
672 | case BFD_RELOC_SH_IMM_MEDLOW16: | |
673 | switch (exp->X_md) | |
674 | { | |
675 | case BFD_RELOC_32_GOTOFF: | |
676 | *r_type_p = BFD_RELOC_SH_GOTOFF_MEDLOW16; | |
677 | break; | |
5d6255fe | 678 | |
324bfcf3 AO |
679 | case BFD_RELOC_SH_GOTPLT32: |
680 | *r_type_p = BFD_RELOC_SH_GOTPLT_MEDLOW16; | |
681 | break; | |
5d6255fe | 682 | |
324bfcf3 AO |
683 | case BFD_RELOC_32_GOT_PCREL: |
684 | *r_type_p = BFD_RELOC_SH_GOT_MEDLOW16; | |
685 | break; | |
5d6255fe | 686 | |
324bfcf3 AO |
687 | case BFD_RELOC_32_PLT_PCREL: |
688 | *r_type_p = BFD_RELOC_SH_PLT_MEDLOW16; | |
689 | break; | |
690 | ||
691 | default: | |
692 | abort (); | |
693 | } | |
694 | break; | |
695 | ||
696 | case BFD_RELOC_SH_IMM_MEDHI16: | |
697 | switch (exp->X_md) | |
698 | { | |
699 | case BFD_RELOC_32_GOTOFF: | |
700 | *r_type_p = BFD_RELOC_SH_GOTOFF_MEDHI16; | |
701 | break; | |
5d6255fe | 702 | |
324bfcf3 AO |
703 | case BFD_RELOC_SH_GOTPLT32: |
704 | *r_type_p = BFD_RELOC_SH_GOTPLT_MEDHI16; | |
705 | break; | |
5d6255fe | 706 | |
324bfcf3 AO |
707 | case BFD_RELOC_32_GOT_PCREL: |
708 | *r_type_p = BFD_RELOC_SH_GOT_MEDHI16; | |
709 | break; | |
5d6255fe | 710 | |
324bfcf3 AO |
711 | case BFD_RELOC_32_PLT_PCREL: |
712 | *r_type_p = BFD_RELOC_SH_PLT_MEDHI16; | |
713 | break; | |
714 | ||
715 | default: | |
716 | abort (); | |
717 | } | |
718 | break; | |
719 | ||
720 | case BFD_RELOC_SH_IMM_HI16: | |
721 | switch (exp->X_md) | |
722 | { | |
723 | case BFD_RELOC_32_GOTOFF: | |
724 | *r_type_p = BFD_RELOC_SH_GOTOFF_HI16; | |
725 | break; | |
5d6255fe | 726 | |
324bfcf3 AO |
727 | case BFD_RELOC_SH_GOTPLT32: |
728 | *r_type_p = BFD_RELOC_SH_GOTPLT_HI16; | |
729 | break; | |
5d6255fe | 730 | |
324bfcf3 AO |
731 | case BFD_RELOC_32_GOT_PCREL: |
732 | *r_type_p = BFD_RELOC_SH_GOT_HI16; | |
733 | break; | |
5d6255fe | 734 | |
324bfcf3 AO |
735 | case BFD_RELOC_32_PLT_PCREL: |
736 | *r_type_p = BFD_RELOC_SH_PLT_HI16; | |
737 | break; | |
738 | ||
739 | default: | |
740 | abort (); | |
741 | } | |
742 | break; | |
743 | ||
744 | default: | |
745 | abort (); | |
746 | } | |
747 | #else | |
538cd60f | 748 | *r_type_p = exp->X_md; |
324bfcf3 | 749 | #endif |
538cd60f AO |
750 | if (exp == main_exp) |
751 | exp->X_op = O_symbol; | |
752 | else | |
753 | { | |
754 | main_exp->X_add_symbol = exp->X_add_symbol; | |
755 | main_exp->X_add_number += exp->X_add_number; | |
756 | } | |
757 | } | |
758 | else | |
759 | return (sh_PIC_related_p (exp->X_add_symbol) | |
760 | || sh_PIC_related_p (exp->X_op_symbol)); | |
761 | ||
762 | return 0; | |
763 | } | |
764 | ||
765 | /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */ | |
766 | ||
767 | void | |
768 | sh_cons_fix_new (frag, off, size, exp) | |
769 | fragS *frag; | |
770 | int off, size; | |
771 | expressionS *exp; | |
772 | { | |
773 | bfd_reloc_code_real_type r_type = BFD_RELOC_UNUSED; | |
774 | ||
775 | if (sh_check_fixup (exp, &r_type)) | |
776 | as_bad (_("Invalid PIC expression.")); | |
777 | ||
778 | if (r_type == BFD_RELOC_UNUSED) | |
779 | switch (size) | |
a1cc9221 | 780 | { |
538cd60f AO |
781 | case 1: |
782 | r_type = BFD_RELOC_8; | |
783 | break; | |
a1cc9221 | 784 | |
538cd60f AO |
785 | case 2: |
786 | r_type = BFD_RELOC_16; | |
787 | break; | |
788 | ||
789 | case 4: | |
790 | r_type = BFD_RELOC_32; | |
791 | break; | |
a1cc9221 | 792 | |
324bfcf3 AO |
793 | #ifdef HAVE_SH64 |
794 | case 8: | |
795 | r_type = BFD_RELOC_64; | |
796 | break; | |
797 | #endif | |
798 | ||
538cd60f AO |
799 | default: |
800 | goto error; | |
801 | } | |
802 | else if (size != 4) | |
803 | { | |
804 | error: | |
805 | as_bad (_("unsupported BFD relocation size %u"), size); | |
806 | r_type = BFD_RELOC_UNUSED; | |
807 | } | |
5d6255fe | 808 | |
538cd60f | 809 | fix_new_exp (frag, off, size, exp, 0, r_type); |
a1cc9221 AO |
810 | } |
811 | ||
812 | /* The regular cons() function, that reads constants, doesn't support | |
813 | suffixes such as @GOT, @GOTOFF and @PLT, that generate | |
814 | machine-specific relocation types. So we must define it here. */ | |
815 | /* Clobbers input_line_pointer, checks end-of-line. */ | |
816 | static void | |
817 | sh_elf_cons (nbytes) | |
818 | register int nbytes; /* 1=.byte, 2=.word, 4=.long */ | |
819 | { | |
538cd60f | 820 | expressionS exp; |
a1cc9221 | 821 | |
324bfcf3 AO |
822 | #ifdef HAVE_SH64 |
823 | ||
824 | /* Update existing range to include a previous insn, if there was one. */ | |
b34976b6 | 825 | sh64_update_contents_mark (TRUE); |
324bfcf3 AO |
826 | |
827 | /* We need to make sure the contents type is set to data. */ | |
828 | sh64_flag_output (); | |
829 | ||
830 | #endif /* HAVE_SH64 */ | |
831 | ||
a1cc9221 AO |
832 | if (is_it_end_of_statement ()) |
833 | { | |
834 | demand_empty_rest_of_line (); | |
835 | return; | |
836 | } | |
837 | ||
838 | do | |
839 | { | |
840 | expression (&exp); | |
538cd60f | 841 | emit_expr (&exp, (unsigned int) nbytes); |
a1cc9221 AO |
842 | } |
843 | while (*input_line_pointer++ == ','); | |
844 | ||
81d4177b | 845 | input_line_pointer--; /* Put terminator back into stream. */ |
a1cc9221 AO |
846 | if (*input_line_pointer == '#' || *input_line_pointer == '!') |
847 | { | |
dda5ecfc | 848 | while (! is_end_of_line[(unsigned char) *input_line_pointer++]); |
a1cc9221 AO |
849 | } |
850 | else | |
851 | demand_empty_rest_of_line (); | |
852 | } | |
853 | #endif /* OBJ_ELF */ | |
854 | ||
855 | \f | |
6b31947e NC |
856 | /* This function is called once, at assembler startup time. This should |
857 | set up all the tables, etc that the MD part of the assembler needs. */ | |
252b5132 RH |
858 | |
859 | void | |
860 | md_begin () | |
861 | { | |
5ff37431 | 862 | const sh_opcode_info *opcode; |
252b5132 | 863 | char *prev_name = ""; |
d4845d57 | 864 | int target_arch; |
252b5132 | 865 | |
bdfaef52 JR |
866 | target_arch |
867 | = preset_target_arch ? preset_target_arch : arch_sh1_up & ~arch_sh_dsp_up; | |
d4845d57 JR |
868 | valid_arch = target_arch; |
869 | ||
324bfcf3 AO |
870 | #ifdef HAVE_SH64 |
871 | shmedia_md_begin (); | |
872 | #endif | |
873 | ||
252b5132 RH |
874 | opcode_hash_control = hash_new (); |
875 | ||
6b31947e | 876 | /* Insert unique names into hash table. */ |
252b5132 RH |
877 | for (opcode = sh_table; opcode->name; opcode++) |
878 | { | |
5ff37431 | 879 | if (strcmp (prev_name, opcode->name) != 0) |
252b5132 | 880 | { |
a37c8f88 JR |
881 | if (! (opcode->arch & target_arch)) |
882 | continue; | |
252b5132 RH |
883 | prev_name = opcode->name; |
884 | hash_insert (opcode_hash_control, opcode->name, (char *) opcode); | |
885 | } | |
252b5132 RH |
886 | } |
887 | } | |
888 | ||
889 | static int reg_m; | |
890 | static int reg_n; | |
d4845d57 JR |
891 | static int reg_x, reg_y; |
892 | static int reg_efg; | |
252b5132 RH |
893 | static int reg_b; |
894 | ||
3882b010 | 895 | #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_') |
dead1419 | 896 | |
6b31947e NC |
897 | /* Try to parse a reg name. Return the number of chars consumed. */ |
898 | ||
252b5132 RH |
899 | static int |
900 | parse_reg (src, mode, reg) | |
901 | char *src; | |
902 | int *mode; | |
903 | int *reg; | |
904 | { | |
3882b010 L |
905 | char l0 = TOLOWER (src[0]); |
906 | char l1 = l0 ? TOLOWER (src[1]) : 0; | |
e46fee70 | 907 | |
dead1419 | 908 | /* We use ! IDENT_CHAR for the next character after the register name, to |
252b5132 | 909 | make sure that we won't accidentally recognize a symbol name such as |
dead1419 | 910 | 'sram' or sr_ram as being a reference to the register 'sr'. */ |
252b5132 | 911 | |
e46fee70 | 912 | if (l0 == 'r') |
252b5132 | 913 | { |
e46fee70 | 914 | if (l1 == '1') |
d4845d57 JR |
915 | { |
916 | if (src[2] >= '0' && src[2] <= '5' | |
dead1419 | 917 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
918 | { |
919 | *mode = A_REG_N; | |
920 | *reg = 10 + src[2] - '0'; | |
921 | return 3; | |
922 | } | |
923 | } | |
e46fee70 | 924 | if (l1 >= '0' && l1 <= '9' |
dead1419 | 925 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
926 | { |
927 | *mode = A_REG_N; | |
e46fee70 | 928 | *reg = (l1 - '0'); |
d4845d57 JR |
929 | return 2; |
930 | } | |
e46fee70 | 931 | if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0 |
dead1419 JR |
932 | && ! IDENT_CHAR ((unsigned char) src[7])) |
933 | { | |
934 | *mode = A_REG_B; | |
e46fee70 | 935 | *reg = (l1 - '0'); |
dead1419 JR |
936 | return 7; |
937 | } | |
d4845d57 | 938 | |
e46fee70 | 939 | if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
940 | { |
941 | *mode = A_RE; | |
942 | return 2; | |
943 | } | |
e46fee70 | 944 | if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
945 | { |
946 | *mode = A_RS; | |
947 | return 2; | |
948 | } | |
252b5132 RH |
949 | } |
950 | ||
e46fee70 | 951 | if (l0 == 'a') |
252b5132 | 952 | { |
e46fee70 | 953 | if (l1 == '0') |
d4845d57 | 954 | { |
dead1419 | 955 | if (! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
956 | { |
957 | *mode = DSP_REG_N; | |
958 | *reg = A_A0_NUM; | |
959 | return 2; | |
960 | } | |
3882b010 | 961 | if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
962 | { |
963 | *mode = DSP_REG_N; | |
964 | *reg = A_A0G_NUM; | |
965 | return 3; | |
966 | } | |
967 | } | |
e46fee70 | 968 | if (l1 == '1') |
252b5132 | 969 | { |
dead1419 | 970 | if (! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 971 | { |
d4845d57 JR |
972 | *mode = DSP_REG_N; |
973 | *reg = A_A1_NUM; | |
974 | return 2; | |
975 | } | |
3882b010 | 976 | if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
977 | { |
978 | *mode = DSP_REG_N; | |
979 | *reg = A_A1G_NUM; | |
252b5132 RH |
980 | return 3; |
981 | } | |
982 | } | |
d4845d57 | 983 | |
e46fee70 | 984 | if (l1 == 'x' && src[2] >= '0' && src[2] <= '1' |
dead1419 | 985 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
986 | { |
987 | *mode = A_REG_N; | |
e46fee70 | 988 | *reg = 4 + (l1 - '0'); |
d4845d57 JR |
989 | return 3; |
990 | } | |
e46fee70 | 991 | if (l1 == 'y' && src[2] >= '0' && src[2] <= '1' |
dead1419 | 992 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
993 | { |
994 | *mode = A_REG_N; | |
e46fee70 | 995 | *reg = 6 + (l1 - '0'); |
d4845d57 JR |
996 | return 3; |
997 | } | |
e46fee70 | 998 | if (l1 == 's' && src[2] >= '0' && src[2] <= '3' |
dead1419 | 999 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 | 1000 | { |
e46fee70 | 1001 | int n = l1 - '0'; |
d4845d57 JR |
1002 | |
1003 | *mode = A_REG_N; | |
1004 | *reg = n | ((~n & 2) << 1); | |
1005 | return 3; | |
1006 | } | |
1007 | } | |
1008 | ||
912a07db | 1009 | if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 | 1010 | { |
e46fee70 | 1011 | if (l1 == 's') |
d4845d57 JR |
1012 | { |
1013 | *mode = A_REG_N; | |
1014 | *reg = 8; | |
252b5132 RH |
1015 | return 2; |
1016 | } | |
e46fee70 | 1017 | if (l1 == 'x') |
d4845d57 JR |
1018 | { |
1019 | *mode = A_REG_N; | |
1020 | *reg = 8; | |
1021 | return 2; | |
1022 | } | |
e46fee70 | 1023 | if (l1 == 'y') |
d4845d57 JR |
1024 | { |
1025 | *mode = A_REG_N; | |
1026 | *reg = 9; | |
1027 | return 2; | |
1028 | } | |
1029 | } | |
1030 | ||
e46fee70 | 1031 | if (l0 == 'x' && l1 >= '0' && l1 <= '1' |
dead1419 | 1032 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1033 | { |
1034 | *mode = DSP_REG_N; | |
e46fee70 | 1035 | *reg = A_X0_NUM + l1 - '0'; |
d4845d57 JR |
1036 | return 2; |
1037 | } | |
1038 | ||
e46fee70 | 1039 | if (l0 == 'y' && l1 >= '0' && l1 <= '1' |
dead1419 | 1040 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1041 | { |
1042 | *mode = DSP_REG_N; | |
e46fee70 | 1043 | *reg = A_Y0_NUM + l1 - '0'; |
d4845d57 JR |
1044 | return 2; |
1045 | } | |
1046 | ||
e46fee70 | 1047 | if (l0 == 'm' && l1 >= '0' && l1 <= '1' |
dead1419 | 1048 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
1049 | { |
1050 | *mode = DSP_REG_N; | |
e46fee70 | 1051 | *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM; |
d4845d57 | 1052 | return 2; |
252b5132 RH |
1053 | } |
1054 | ||
e46fee70 HPN |
1055 | if (l0 == 's' |
1056 | && l1 == 's' | |
3882b010 | 1057 | && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1058 | { |
1059 | *mode = A_SSR; | |
1060 | return 3; | |
1061 | } | |
1062 | ||
3882b010 | 1063 | if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c' |
dead1419 | 1064 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1065 | { |
1066 | *mode = A_SPC; | |
1067 | return 3; | |
1068 | } | |
1069 | ||
3882b010 | 1070 | if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r' |
dead1419 | 1071 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1072 | { |
1073 | *mode = A_SGR; | |
1074 | return 3; | |
1075 | } | |
1076 | ||
3882b010 | 1077 | if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r' |
dead1419 | 1078 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
1079 | { |
1080 | *mode = A_DSR; | |
1081 | return 3; | |
1082 | } | |
1083 | ||
3882b010 | 1084 | if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 1085 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1086 | { |
1087 | *mode = A_DBR; | |
1088 | return 3; | |
1089 | } | |
1090 | ||
e46fee70 | 1091 | if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
1092 | { |
1093 | *mode = A_SR; | |
1094 | return 2; | |
1095 | } | |
1096 | ||
e46fee70 | 1097 | if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
1098 | { |
1099 | *mode = A_REG_N; | |
1100 | *reg = 15; | |
1101 | return 2; | |
1102 | } | |
1103 | ||
e46fee70 | 1104 | if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
1105 | { |
1106 | *mode = A_PR; | |
1107 | return 2; | |
1108 | } | |
e46fee70 | 1109 | if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 1110 | { |
015551fc JR |
1111 | /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0' |
1112 | and use an uninitialized immediate. */ | |
1113 | *mode = A_PC; | |
252b5132 RH |
1114 | return 2; |
1115 | } | |
3882b010 | 1116 | if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 1117 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1118 | { |
1119 | *mode = A_GBR; | |
1120 | return 3; | |
1121 | } | |
3882b010 | 1122 | if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 1123 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1124 | { |
1125 | *mode = A_VBR; | |
1126 | return 3; | |
1127 | } | |
1128 | ||
3882b010 | 1129 | if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c' |
dead1419 | 1130 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 | 1131 | { |
3882b010 | 1132 | if (TOLOWER (src[3]) == 'l') |
252b5132 RH |
1133 | { |
1134 | *mode = A_MACL; | |
1135 | return 4; | |
1136 | } | |
3882b010 | 1137 | if (TOLOWER (src[3]) == 'h') |
252b5132 RH |
1138 | { |
1139 | *mode = A_MACH; | |
1140 | return 4; | |
1141 | } | |
1142 | } | |
3882b010 | 1143 | if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd' |
912a07db | 1144 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
1145 | { |
1146 | *mode = A_MOD; | |
1147 | return 3; | |
1148 | } | |
e46fee70 | 1149 | if (l0 == 'f' && l1 == 'r') |
252b5132 RH |
1150 | { |
1151 | if (src[2] == '1') | |
1152 | { | |
1153 | if (src[3] >= '0' && src[3] <= '5' | |
dead1419 | 1154 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1155 | { |
1156 | *mode = F_REG_N; | |
1157 | *reg = 10 + src[3] - '0'; | |
1158 | return 4; | |
1159 | } | |
1160 | } | |
1161 | if (src[2] >= '0' && src[2] <= '9' | |
dead1419 | 1162 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1163 | { |
1164 | *mode = F_REG_N; | |
1165 | *reg = (src[2] - '0'); | |
1166 | return 3; | |
1167 | } | |
1168 | } | |
e46fee70 | 1169 | if (l0 == 'd' && l1 == 'r') |
252b5132 RH |
1170 | { |
1171 | if (src[2] == '1') | |
1172 | { | |
1173 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 1174 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1175 | { |
1176 | *mode = D_REG_N; | |
1177 | *reg = 10 + src[3] - '0'; | |
1178 | return 4; | |
1179 | } | |
1180 | } | |
1181 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 1182 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1183 | { |
1184 | *mode = D_REG_N; | |
1185 | *reg = (src[2] - '0'); | |
1186 | return 3; | |
1187 | } | |
1188 | } | |
e46fee70 | 1189 | if (l0 == 'x' && l1 == 'd') |
252b5132 RH |
1190 | { |
1191 | if (src[2] == '1') | |
1192 | { | |
1193 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 1194 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1195 | { |
1196 | *mode = X_REG_N; | |
1197 | *reg = 11 + src[3] - '0'; | |
1198 | return 4; | |
1199 | } | |
1200 | } | |
1201 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 1202 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1203 | { |
1204 | *mode = X_REG_N; | |
1205 | *reg = (src[2] - '0') + 1; | |
1206 | return 3; | |
1207 | } | |
1208 | } | |
e46fee70 | 1209 | if (l0 == 'f' && l1 == 'v') |
252b5132 | 1210 | { |
dead1419 | 1211 | if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1212 | { |
1213 | *mode = V_REG_N; | |
1214 | *reg = 12; | |
1215 | return 4; | |
1216 | } | |
1217 | if ((src[2] == '0' || src[2] == '4' || src[2] == '8') | |
dead1419 | 1218 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
1219 | { |
1220 | *mode = V_REG_N; | |
1221 | *reg = (src[2] - '0'); | |
1222 | return 3; | |
1223 | } | |
1224 | } | |
3882b010 L |
1225 | if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u' |
1226 | && TOLOWER (src[3]) == 'l' | |
dead1419 | 1227 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
1228 | { |
1229 | *mode = FPUL_N; | |
1230 | return 4; | |
1231 | } | |
1232 | ||
3882b010 L |
1233 | if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's' |
1234 | && TOLOWER (src[3]) == 'c' | |
1235 | && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5])) | |
252b5132 RH |
1236 | { |
1237 | *mode = FPSCR_N; | |
1238 | return 5; | |
1239 | } | |
1240 | ||
3882b010 L |
1241 | if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't' |
1242 | && TOLOWER (src[3]) == 'r' | |
1243 | && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5])) | |
252b5132 RH |
1244 | { |
1245 | *mode = XMTRX_M4; | |
1246 | return 5; | |
1247 | } | |
1248 | ||
1249 | return 0; | |
1250 | } | |
1251 | ||
c4aa876b | 1252 | static char * |
015551fc | 1253 | parse_exp (s, op) |
252b5132 | 1254 | char *s; |
015551fc | 1255 | sh_operand_info *op; |
252b5132 RH |
1256 | { |
1257 | char *save; | |
1258 | char *new; | |
1259 | ||
1260 | save = input_line_pointer; | |
1261 | input_line_pointer = s; | |
015551fc JR |
1262 | expression (&op->immediate); |
1263 | if (op->immediate.X_op == O_absent) | |
252b5132 | 1264 | as_bad (_("missing operand")); |
538cd60f AO |
1265 | #ifdef OBJ_ELF |
1266 | else if (op->immediate.X_op == O_PIC_reloc | |
1267 | || sh_PIC_related_p (op->immediate.X_add_symbol) | |
1268 | || sh_PIC_related_p (op->immediate.X_op_symbol)) | |
1269 | as_bad (_("misplaced PIC operand")); | |
1270 | #endif | |
252b5132 RH |
1271 | new = input_line_pointer; |
1272 | input_line_pointer = save; | |
1273 | return new; | |
1274 | } | |
1275 | ||
252b5132 RH |
1276 | /* The many forms of operand: |
1277 | ||
1278 | Rn Register direct | |
1279 | @Rn Register indirect | |
1280 | @Rn+ Autoincrement | |
1281 | @-Rn Autodecrement | |
1282 | @(disp:4,Rn) | |
1283 | @(disp:8,GBR) | |
1284 | @(disp:8,PC) | |
1285 | ||
1286 | @(R0,Rn) | |
1287 | @(R0,GBR) | |
1288 | ||
1289 | disp:8 | |
1290 | disp:12 | |
1291 | #imm8 | |
1292 | pr, gbr, vbr, macl, mach | |
252b5132 RH |
1293 | */ |
1294 | ||
c4aa876b | 1295 | static char * |
252b5132 RH |
1296 | parse_at (src, op) |
1297 | char *src; | |
1298 | sh_operand_info *op; | |
1299 | { | |
1300 | int len; | |
1301 | int mode; | |
1302 | src++; | |
1303 | if (src[0] == '-') | |
1304 | { | |
6b31947e | 1305 | /* Must be predecrement. */ |
252b5132 RH |
1306 | src++; |
1307 | ||
1308 | len = parse_reg (src, &mode, &(op->reg)); | |
1309 | if (mode != A_REG_N) | |
1310 | as_bad (_("illegal register after @-")); | |
1311 | ||
1312 | op->type = A_DEC_N; | |
1313 | src += len; | |
1314 | } | |
1315 | else if (src[0] == '(') | |
1316 | { | |
1317 | /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or | |
8d4d84c2 | 1318 | @(r0, rn). */ |
252b5132 RH |
1319 | src++; |
1320 | len = parse_reg (src, &mode, &(op->reg)); | |
1321 | if (len && mode == A_REG_N) | |
1322 | { | |
1323 | src += len; | |
1324 | if (op->reg != 0) | |
1325 | { | |
1326 | as_bad (_("must be @(r0,...)")); | |
1327 | } | |
1328 | if (src[0] == ',') | |
252b5132 | 1329 | { |
8d4d84c2 AO |
1330 | src++; |
1331 | /* Now can be rn or gbr. */ | |
1332 | len = parse_reg (src, &mode, &(op->reg)); | |
1333 | } | |
1334 | else | |
1335 | { | |
1336 | len = 0; | |
252b5132 | 1337 | } |
8d4d84c2 | 1338 | if (len) |
252b5132 | 1339 | { |
8d4d84c2 AO |
1340 | if (mode == A_GBR) |
1341 | { | |
1342 | op->type = A_R0_GBR; | |
1343 | } | |
1344 | else if (mode == A_REG_N) | |
1345 | { | |
1346 | op->type = A_IND_R0_REG_N; | |
1347 | } | |
1348 | else | |
1349 | { | |
1350 | as_bad (_("syntax error in @(r0,...)")); | |
1351 | } | |
252b5132 RH |
1352 | } |
1353 | else | |
1354 | { | |
8d4d84c2 | 1355 | as_bad (_("syntax error in @(r0...)")); |
252b5132 RH |
1356 | } |
1357 | } | |
1358 | else | |
1359 | { | |
8d4d84c2 | 1360 | /* Must be an @(disp,.. thing). */ |
015551fc | 1361 | src = parse_exp (src, op); |
252b5132 RH |
1362 | if (src[0] == ',') |
1363 | src++; | |
8d4d84c2 | 1364 | /* Now can be rn, gbr or pc. */ |
252b5132 RH |
1365 | len = parse_reg (src, &mode, &op->reg); |
1366 | if (len) | |
1367 | { | |
1368 | if (mode == A_REG_N) | |
1369 | { | |
1370 | op->type = A_DISP_REG_N; | |
1371 | } | |
1372 | else if (mode == A_GBR) | |
1373 | { | |
1374 | op->type = A_DISP_GBR; | |
1375 | } | |
015551fc | 1376 | else if (mode == A_PC) |
252b5132 | 1377 | { |
dbb4348d JR |
1378 | /* We want @(expr, pc) to uniformly address . + expr, |
1379 | no matter if expr is a constant, or a more complex | |
1380 | expression, e.g. sym-. or sym1-sym2. | |
1381 | However, we also used to accept @(sym,pc) | |
1382 | as adressing sym, i.e. meaning the same as plain sym. | |
1383 | Some existing code does use the @(sym,pc) syntax, so | |
1384 | we give it the old semantics for now, but warn about | |
1385 | its use, so that users have some time to fix their code. | |
1386 | ||
1387 | Note that due to this backward compatibility hack, | |
1388 | we'll get unexpected results when @(offset, pc) is used, | |
1389 | and offset is a symbol that is set later to an an address | |
1390 | difference, or an external symbol that is set to an | |
1391 | address difference in another source file, so we want to | |
1392 | eventually remove it. */ | |
9691d64f JR |
1393 | if (op->immediate.X_op == O_symbol) |
1394 | { | |
1395 | op->type = A_DISP_PC; | |
1396 | as_warn (_("Deprecated syntax.")); | |
1397 | } | |
1398 | else | |
1399 | { | |
1400 | op->type = A_DISP_PC_ABS; | |
1401 | /* Such operands don't get corrected for PC==.+4, so | |
1402 | make the correction here. */ | |
1403 | op->immediate.X_add_number -= 4; | |
1404 | } | |
252b5132 RH |
1405 | } |
1406 | else | |
1407 | { | |
1408 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
1409 | } | |
1410 | } | |
1411 | else | |
1412 | { | |
1413 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
1414 | } | |
1415 | } | |
1416 | src += len; | |
1417 | if (src[0] != ')') | |
1418 | as_bad (_("expecting )")); | |
1419 | else | |
1420 | src++; | |
1421 | } | |
1422 | else | |
1423 | { | |
1424 | src += parse_reg (src, &mode, &(op->reg)); | |
1425 | if (mode != A_REG_N) | |
006299d3 NC |
1426 | as_bad (_("illegal register after @")); |
1427 | ||
252b5132 RH |
1428 | if (src[0] == '+') |
1429 | { | |
1000a02a NC |
1430 | char l0, l1; |
1431 | ||
252b5132 | 1432 | src++; |
1000a02a NC |
1433 | l0 = TOLOWER (src[0]); |
1434 | l1 = TOLOWER (src[1]); | |
1435 | ||
1436 | if ((l0 == 'r' && l1 == '8') | |
1437 | || (l0 == 'i' && (l1 == 'x' || l1 == 's'))) | |
d4845d57 JR |
1438 | { |
1439 | src += 2; | |
1440 | op->type = A_PMOD_N; | |
1441 | } | |
006299d3 NC |
1442 | else if ( (l0 == 'r' && l1 == '9') |
1443 | || (l0 == 'i' && l1 == 'y')) | |
d4845d57 JR |
1444 | { |
1445 | src += 2; | |
1446 | op->type = A_PMODY_N; | |
1447 | } | |
1448 | else | |
1449 | op->type = A_INC_N; | |
252b5132 RH |
1450 | } |
1451 | else | |
006299d3 | 1452 | op->type = A_IND_N; |
252b5132 RH |
1453 | } |
1454 | return src; | |
1455 | } | |
1456 | ||
1457 | static void | |
1458 | get_operand (ptr, op) | |
1459 | char **ptr; | |
1460 | sh_operand_info *op; | |
1461 | { | |
1462 | char *src = *ptr; | |
1463 | int mode = -1; | |
1464 | unsigned int len; | |
1465 | ||
1466 | if (src[0] == '#') | |
1467 | { | |
1468 | src++; | |
015551fc | 1469 | *ptr = parse_exp (src, op); |
252b5132 RH |
1470 | op->type = A_IMM; |
1471 | return; | |
1472 | } | |
1473 | ||
1474 | else if (src[0] == '@') | |
1475 | { | |
1476 | *ptr = parse_at (src, op); | |
1477 | return; | |
1478 | } | |
1479 | len = parse_reg (src, &mode, &(op->reg)); | |
1480 | if (len) | |
1481 | { | |
1482 | *ptr = src + len; | |
1483 | op->type = mode; | |
1484 | return; | |
1485 | } | |
1486 | else | |
1487 | { | |
6b31947e | 1488 | /* Not a reg, the only thing left is a displacement. */ |
015551fc | 1489 | *ptr = parse_exp (src, op); |
252b5132 RH |
1490 | op->type = A_DISP_PC; |
1491 | return; | |
1492 | } | |
1493 | } | |
1494 | ||
c4aa876b | 1495 | static char * |
252b5132 RH |
1496 | get_operands (info, args, operand) |
1497 | sh_opcode_info *info; | |
1498 | char *args; | |
1499 | sh_operand_info *operand; | |
252b5132 RH |
1500 | { |
1501 | char *ptr = args; | |
1502 | if (info->arg[0]) | |
1503 | { | |
d4845d57 JR |
1504 | /* The pre-processor will eliminate whitespace in front of '@' |
1505 | after the first argument; we may be called multiple times | |
1506 | from assemble_ppi, so don't insist on finding whitespace here. */ | |
1507 | if (*ptr == ' ') | |
1508 | ptr++; | |
252b5132 RH |
1509 | |
1510 | get_operand (&ptr, operand + 0); | |
1511 | if (info->arg[1]) | |
1512 | { | |
1513 | if (*ptr == ',') | |
1514 | { | |
1515 | ptr++; | |
1516 | } | |
1517 | get_operand (&ptr, operand + 1); | |
52ccafd0 JR |
1518 | /* ??? Hack: psha/pshl have a varying operand number depending on |
1519 | the type of the first operand. We handle this by having the | |
1520 | three-operand version first and reducing the number of operands | |
1521 | parsed to two if we see that the first operand is an immediate. | |
1522 | This works because no insn with three operands has an immediate | |
1523 | as first operand. */ | |
1524 | if (info->arg[2] && operand[0].type != A_IMM) | |
252b5132 RH |
1525 | { |
1526 | if (*ptr == ',') | |
1527 | { | |
1528 | ptr++; | |
1529 | } | |
1530 | get_operand (&ptr, operand + 2); | |
1531 | } | |
1532 | else | |
1533 | { | |
1534 | operand[2].type = 0; | |
1535 | } | |
1536 | } | |
1537 | else | |
1538 | { | |
1539 | operand[1].type = 0; | |
1540 | operand[2].type = 0; | |
1541 | } | |
1542 | } | |
1543 | else | |
1544 | { | |
1545 | operand[0].type = 0; | |
1546 | operand[1].type = 0; | |
1547 | operand[2].type = 0; | |
1548 | } | |
1549 | return ptr; | |
1550 | } | |
1551 | ||
1552 | /* Passed a pointer to a list of opcodes which use different | |
1553 | addressing modes, return the opcode which matches the opcodes | |
6b31947e | 1554 | provided. */ |
252b5132 | 1555 | |
c4aa876b | 1556 | static sh_opcode_info * |
252b5132 RH |
1557 | get_specific (opcode, operands) |
1558 | sh_opcode_info *opcode; | |
1559 | sh_operand_info *operands; | |
1560 | { | |
1561 | sh_opcode_info *this_try = opcode; | |
1562 | char *name = opcode->name; | |
1563 | int n = 0; | |
c4aa876b | 1564 | |
252b5132 RH |
1565 | while (opcode->name) |
1566 | { | |
1567 | this_try = opcode++; | |
5ff37431 | 1568 | if ((this_try->name != name) && (strcmp (this_try->name, name) != 0)) |
252b5132 RH |
1569 | { |
1570 | /* We've looked so far down the table that we've run out of | |
6b31947e | 1571 | opcodes with the same name. */ |
252b5132 RH |
1572 | return 0; |
1573 | } | |
c4aa876b | 1574 | |
6b31947e | 1575 | /* Look at both operands needed by the opcodes and provided by |
252b5132 RH |
1576 | the user - since an arg test will often fail on the same arg |
1577 | again and again, we'll try and test the last failing arg the | |
6b31947e | 1578 | first on each opcode try. */ |
252b5132 RH |
1579 | for (n = 0; this_try->arg[n]; n++) |
1580 | { | |
1581 | sh_operand_info *user = operands + n; | |
1582 | sh_arg_type arg = this_try->arg[n]; | |
c4aa876b | 1583 | |
252b5132 RH |
1584 | switch (arg) |
1585 | { | |
7679ead9 AO |
1586 | case A_DISP_PC: |
1587 | if (user->type == A_DISP_PC_ABS) | |
1588 | break; | |
1589 | /* Fall through. */ | |
252b5132 RH |
1590 | case A_IMM: |
1591 | case A_BDISP12: | |
1592 | case A_BDISP8: | |
1593 | case A_DISP_GBR: | |
252b5132 RH |
1594 | case A_MACH: |
1595 | case A_PR: | |
1596 | case A_MACL: | |
1597 | if (user->type != arg) | |
1598 | goto fail; | |
1599 | break; | |
1600 | case A_R0: | |
1601 | /* opcode needs r0 */ | |
1602 | if (user->type != A_REG_N || user->reg != 0) | |
1603 | goto fail; | |
1604 | break; | |
1605 | case A_R0_GBR: | |
1606 | if (user->type != A_R0_GBR || user->reg != 0) | |
1607 | goto fail; | |
1608 | break; | |
1609 | case F_FR0: | |
1610 | if (user->type != F_REG_N || user->reg != 0) | |
1611 | goto fail; | |
1612 | break; | |
1613 | ||
1614 | case A_REG_N: | |
1615 | case A_INC_N: | |
1616 | case A_DEC_N: | |
1617 | case A_IND_N: | |
1618 | case A_IND_R0_REG_N: | |
1619 | case A_DISP_REG_N: | |
1620 | case F_REG_N: | |
1621 | case D_REG_N: | |
1622 | case X_REG_N: | |
1623 | case V_REG_N: | |
1624 | case FPUL_N: | |
1625 | case FPSCR_N: | |
d4845d57 JR |
1626 | case A_PMOD_N: |
1627 | case A_PMODY_N: | |
1628 | case DSP_REG_N: | |
252b5132 RH |
1629 | /* Opcode needs rn */ |
1630 | if (user->type != arg) | |
1631 | goto fail; | |
1632 | reg_n = user->reg; | |
1633 | break; | |
252b5132 RH |
1634 | case DX_REG_N: |
1635 | if (user->type != D_REG_N && user->type != X_REG_N) | |
1636 | goto fail; | |
1637 | reg_n = user->reg; | |
1638 | break; | |
1639 | case A_GBR: | |
1640 | case A_SR: | |
1641 | case A_VBR: | |
d4845d57 JR |
1642 | case A_DSR: |
1643 | case A_MOD: | |
1644 | case A_RE: | |
1645 | case A_RS: | |
252b5132 RH |
1646 | case A_SSR: |
1647 | case A_SPC: | |
1648 | case A_SGR: | |
1649 | case A_DBR: | |
1650 | if (user->type != arg) | |
1651 | goto fail; | |
1652 | break; | |
1653 | ||
c4aa876b | 1654 | case A_REG_B: |
252b5132 RH |
1655 | if (user->type != arg) |
1656 | goto fail; | |
1657 | reg_b = user->reg; | |
1658 | break; | |
1659 | ||
1660 | case A_REG_M: | |
1661 | case A_INC_M: | |
1662 | case A_DEC_M: | |
1663 | case A_IND_M: | |
1664 | case A_IND_R0_REG_M: | |
1665 | case A_DISP_REG_M: | |
d4845d57 | 1666 | case DSP_REG_M: |
252b5132 RH |
1667 | /* Opcode needs rn */ |
1668 | if (user->type != arg - A_REG_M + A_REG_N) | |
1669 | goto fail; | |
1670 | reg_m = user->reg; | |
1671 | break; | |
1672 | ||
d4845d57 JR |
1673 | case DSP_REG_X: |
1674 | if (user->type != DSP_REG_N) | |
1675 | goto fail; | |
1676 | switch (user->reg) | |
1677 | { | |
1678 | case A_X0_NUM: | |
1679 | reg_x = 0; | |
1680 | break; | |
1681 | case A_X1_NUM: | |
1682 | reg_x = 1; | |
1683 | break; | |
1684 | case A_A0_NUM: | |
1685 | reg_x = 2; | |
1686 | break; | |
1687 | case A_A1_NUM: | |
1688 | reg_x = 3; | |
1689 | break; | |
1690 | default: | |
1691 | goto fail; | |
1692 | } | |
1693 | break; | |
1694 | ||
1695 | case DSP_REG_Y: | |
1696 | if (user->type != DSP_REG_N) | |
1697 | goto fail; | |
1698 | switch (user->reg) | |
1699 | { | |
1700 | case A_Y0_NUM: | |
1701 | reg_y = 0; | |
1702 | break; | |
1703 | case A_Y1_NUM: | |
1704 | reg_y = 1; | |
1705 | break; | |
1706 | case A_M0_NUM: | |
1707 | reg_y = 2; | |
1708 | break; | |
1709 | case A_M1_NUM: | |
1710 | reg_y = 3; | |
1711 | break; | |
1712 | default: | |
1713 | goto fail; | |
1714 | } | |
1715 | break; | |
1716 | ||
1717 | case DSP_REG_E: | |
1718 | if (user->type != DSP_REG_N) | |
1719 | goto fail; | |
1720 | switch (user->reg) | |
1721 | { | |
1722 | case A_X0_NUM: | |
1723 | reg_efg = 0 << 10; | |
1724 | break; | |
1725 | case A_X1_NUM: | |
1726 | reg_efg = 1 << 10; | |
1727 | break; | |
1728 | case A_Y0_NUM: | |
1729 | reg_efg = 2 << 10; | |
1730 | break; | |
1731 | case A_A1_NUM: | |
1732 | reg_efg = 3 << 10; | |
1733 | break; | |
1734 | default: | |
1735 | goto fail; | |
1736 | } | |
1737 | break; | |
1738 | ||
1739 | case DSP_REG_F: | |
1740 | if (user->type != DSP_REG_N) | |
1741 | goto fail; | |
1742 | switch (user->reg) | |
1743 | { | |
1744 | case A_Y0_NUM: | |
1745 | reg_efg |= 0 << 8; | |
1746 | break; | |
1747 | case A_Y1_NUM: | |
1748 | reg_efg |= 1 << 8; | |
1749 | break; | |
1750 | case A_X0_NUM: | |
1751 | reg_efg |= 2 << 8; | |
1752 | break; | |
1753 | case A_A1_NUM: | |
1754 | reg_efg |= 3 << 8; | |
1755 | break; | |
1756 | default: | |
1757 | goto fail; | |
1758 | } | |
1759 | break; | |
1760 | ||
1761 | case DSP_REG_G: | |
1762 | if (user->type != DSP_REG_N) | |
1763 | goto fail; | |
1764 | switch (user->reg) | |
1765 | { | |
1766 | case A_M0_NUM: | |
1767 | reg_efg |= 0 << 2; | |
1768 | break; | |
1769 | case A_M1_NUM: | |
1770 | reg_efg |= 1 << 2; | |
1771 | break; | |
1772 | case A_A0_NUM: | |
1773 | reg_efg |= 2 << 2; | |
1774 | break; | |
1775 | case A_A1_NUM: | |
1776 | reg_efg |= 3 << 2; | |
1777 | break; | |
1778 | default: | |
1779 | goto fail; | |
1780 | } | |
1781 | break; | |
1782 | ||
1783 | case A_A0: | |
1784 | if (user->type != DSP_REG_N || user->reg != A_A0_NUM) | |
1785 | goto fail; | |
1786 | break; | |
1787 | case A_X0: | |
1788 | if (user->type != DSP_REG_N || user->reg != A_X0_NUM) | |
1789 | goto fail; | |
1790 | break; | |
1791 | case A_X1: | |
1792 | if (user->type != DSP_REG_N || user->reg != A_X1_NUM) | |
1793 | goto fail; | |
1794 | break; | |
1795 | case A_Y0: | |
1796 | if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) | |
1797 | goto fail; | |
1798 | break; | |
1799 | case A_Y1: | |
1800 | if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) | |
1801 | goto fail; | |
1802 | break; | |
1803 | ||
252b5132 RH |
1804 | case F_REG_M: |
1805 | case D_REG_M: | |
1806 | case X_REG_M: | |
1807 | case V_REG_M: | |
1808 | case FPUL_M: | |
1809 | case FPSCR_M: | |
1810 | /* Opcode needs rn */ | |
1811 | if (user->type != arg - F_REG_M + F_REG_N) | |
1812 | goto fail; | |
1813 | reg_m = user->reg; | |
1814 | break; | |
1815 | case DX_REG_M: | |
1816 | if (user->type != D_REG_N && user->type != X_REG_N) | |
1817 | goto fail; | |
1818 | reg_m = user->reg; | |
1819 | break; | |
1820 | case XMTRX_M4: | |
1821 | if (user->type != XMTRX_M4) | |
1822 | goto fail; | |
1823 | reg_m = 4; | |
1824 | break; | |
c4aa876b | 1825 | |
252b5132 RH |
1826 | default: |
1827 | printf (_("unhandled %d\n"), arg); | |
1828 | goto fail; | |
1829 | } | |
1830 | } | |
a37c8f88 JR |
1831 | if ( !(valid_arch & this_try->arch)) |
1832 | goto fail; | |
d4845d57 | 1833 | valid_arch &= this_try->arch; |
252b5132 | 1834 | return this_try; |
c4aa876b NC |
1835 | fail: |
1836 | ; | |
252b5132 RH |
1837 | } |
1838 | ||
1839 | return 0; | |
1840 | } | |
1841 | ||
252b5132 | 1842 | static void |
015551fc | 1843 | insert (where, how, pcrel, op) |
252b5132 RH |
1844 | char *where; |
1845 | int how; | |
1846 | int pcrel; | |
015551fc | 1847 | sh_operand_info *op; |
252b5132 RH |
1848 | { |
1849 | fix_new_exp (frag_now, | |
1850 | where - frag_now->fr_literal, | |
1851 | 2, | |
015551fc | 1852 | &op->immediate, |
252b5132 RH |
1853 | pcrel, |
1854 | how); | |
1855 | } | |
1856 | ||
1857 | static void | |
015551fc | 1858 | build_relax (opcode, op) |
252b5132 | 1859 | sh_opcode_info *opcode; |
015551fc | 1860 | sh_operand_info *op; |
252b5132 RH |
1861 | { |
1862 | int high_byte = target_big_endian ? 0 : 1; | |
1863 | char *p; | |
1864 | ||
1865 | if (opcode->arg[0] == A_BDISP8) | |
1866 | { | |
1867 | int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; | |
1868 | p = frag_var (rs_machine_dependent, | |
1869 | md_relax_table[C (what, COND32)].rlx_length, | |
1870 | md_relax_table[C (what, COND8)].rlx_length, | |
1871 | C (what, 0), | |
015551fc JR |
1872 | op->immediate.X_add_symbol, |
1873 | op->immediate.X_add_number, | |
252b5132 RH |
1874 | 0); |
1875 | p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); | |
1876 | } | |
1877 | else if (opcode->arg[0] == A_BDISP12) | |
1878 | { | |
1879 | p = frag_var (rs_machine_dependent, | |
1880 | md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, | |
1881 | md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, | |
1882 | C (UNCOND_JUMP, 0), | |
015551fc JR |
1883 | op->immediate.X_add_symbol, |
1884 | op->immediate.X_add_number, | |
252b5132 RH |
1885 | 0); |
1886 | p[high_byte] = (opcode->nibbles[0] << 4); | |
1887 | } | |
1888 | ||
1889 | } | |
1890 | ||
6b31947e | 1891 | /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */ |
d67b5d6d | 1892 | |
015551fc JR |
1893 | static char * |
1894 | insert_loop_bounds (output, operand) | |
1895 | char *output; | |
1896 | sh_operand_info *operand; | |
1897 | { | |
1898 | char *name; | |
1899 | symbolS *end_sym; | |
1900 | ||
1901 | /* Since the low byte of the opcode will be overwritten by the reloc, we | |
1902 | can just stash the high byte into both bytes and ignore endianness. */ | |
1903 | output[0] = 0x8c; | |
1904 | output[1] = 0x8c; | |
1905 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
1906 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
1907 | ||
1908 | if (sh_relax) | |
1909 | { | |
1910 | static int count = 0; | |
1911 | ||
1912 | /* If the last loop insn is a two-byte-insn, it is in danger of being | |
1913 | swapped with the insn after it. To prevent this, create a new | |
1914 | symbol - complete with SH_LABEL reloc - after the last loop insn. | |
1915 | If the last loop insn is four bytes long, the symbol will be | |
1916 | right in the middle, but four byte insns are not swapped anyways. */ | |
1917 | /* A REPEAT takes 6 bytes. The SH has a 32 bit address space. | |
1918 | Hence a 9 digit number should be enough to count all REPEATs. */ | |
1919 | name = alloca (11); | |
1920 | sprintf (name, "_R%x", count++ & 0x3fffffff); | |
c4aa876b | 1921 | end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag); |
015551fc JR |
1922 | /* Make this a local symbol. */ |
1923 | #ifdef OBJ_COFF | |
1924 | SF_SET_LOCAL (end_sym); | |
1925 | #endif /* OBJ_COFF */ | |
1926 | symbol_table_insert (end_sym); | |
1927 | end_sym->sy_value = operand[1].immediate; | |
1928 | end_sym->sy_value.X_add_number += 2; | |
1929 | fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL); | |
1930 | } | |
1931 | ||
1932 | output = frag_more (2); | |
1933 | output[0] = 0x8e; | |
1934 | output[1] = 0x8e; | |
1935 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
1936 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
1937 | ||
1938 | return frag_more (2); | |
1939 | } | |
1940 | ||
d67b5d6d | 1941 | /* Now we know what sort of opcodes it is, let's build the bytes. */ |
6b31947e | 1942 | |
0d10e182 | 1943 | static unsigned int |
252b5132 RH |
1944 | build_Mytes (opcode, operand) |
1945 | sh_opcode_info *opcode; | |
1946 | sh_operand_info *operand; | |
252b5132 RH |
1947 | { |
1948 | int index; | |
1949 | char nbuf[4]; | |
1950 | char *output = frag_more (2); | |
0d10e182 | 1951 | unsigned int size = 2; |
252b5132 RH |
1952 | int low_byte = target_big_endian ? 1 : 0; |
1953 | nbuf[0] = 0; | |
1954 | nbuf[1] = 0; | |
1955 | nbuf[2] = 0; | |
1956 | nbuf[3] = 0; | |
1957 | ||
1958 | for (index = 0; index < 4; index++) | |
1959 | { | |
1960 | sh_nibble_type i = opcode->nibbles[index]; | |
1961 | if (i < 16) | |
1962 | { | |
1963 | nbuf[index] = i; | |
1964 | } | |
1965 | else | |
1966 | { | |
1967 | switch (i) | |
1968 | { | |
1969 | case REG_N: | |
1970 | nbuf[index] = reg_n; | |
1971 | break; | |
1972 | case REG_M: | |
1973 | nbuf[index] = reg_m; | |
1974 | break; | |
d4845d57 JR |
1975 | case SDT_REG_N: |
1976 | if (reg_n < 2 || reg_n > 5) | |
1977 | as_bad (_("Invalid register: 'r%d'"), reg_n); | |
1978 | nbuf[index] = (reg_n & 3) | 4; | |
1979 | break; | |
252b5132 RH |
1980 | case REG_NM: |
1981 | nbuf[index] = reg_n | (reg_m >> 2); | |
1982 | break; | |
c4aa876b | 1983 | case REG_B: |
252b5132 RH |
1984 | nbuf[index] = reg_b | 0x08; |
1985 | break; | |
015551fc JR |
1986 | case IMM0_4BY4: |
1987 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); | |
1988 | break; | |
1989 | case IMM0_4BY2: | |
1990 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand); | |
1991 | break; | |
1992 | case IMM0_4: | |
1993 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand); | |
1994 | break; | |
1995 | case IMM1_4BY4: | |
1996 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1); | |
1997 | break; | |
1998 | case IMM1_4BY2: | |
1999 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1); | |
252b5132 | 2000 | break; |
015551fc JR |
2001 | case IMM1_4: |
2002 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1); | |
252b5132 | 2003 | break; |
015551fc JR |
2004 | case IMM0_8BY4: |
2005 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand); | |
252b5132 | 2006 | break; |
015551fc JR |
2007 | case IMM0_8BY2: |
2008 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand); | |
252b5132 | 2009 | break; |
015551fc JR |
2010 | case IMM0_8: |
2011 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand); | |
252b5132 | 2012 | break; |
015551fc JR |
2013 | case IMM1_8BY4: |
2014 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1); | |
252b5132 | 2015 | break; |
015551fc JR |
2016 | case IMM1_8BY2: |
2017 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1); | |
2018 | break; | |
2019 | case IMM1_8: | |
2020 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1); | |
252b5132 RH |
2021 | break; |
2022 | case PCRELIMM_8BY4: | |
7679ead9 AO |
2023 | insert (output, BFD_RELOC_SH_PCRELIMM8BY4, |
2024 | operand->type != A_DISP_PC_ABS, operand); | |
252b5132 RH |
2025 | break; |
2026 | case PCRELIMM_8BY2: | |
7679ead9 AO |
2027 | insert (output, BFD_RELOC_SH_PCRELIMM8BY2, |
2028 | operand->type != A_DISP_PC_ABS, operand); | |
015551fc JR |
2029 | break; |
2030 | case REPEAT: | |
2031 | output = insert_loop_bounds (output, operand); | |
2032 | nbuf[index] = opcode->nibbles[3]; | |
2033 | operand += 2; | |
252b5132 RH |
2034 | break; |
2035 | default: | |
2036 | printf (_("failed for %d\n"), i); | |
2037 | } | |
2038 | } | |
2039 | } | |
c4aa876b NC |
2040 | if (!target_big_endian) |
2041 | { | |
2042 | output[1] = (nbuf[0] << 4) | (nbuf[1]); | |
2043 | output[0] = (nbuf[2] << 4) | (nbuf[3]); | |
2044 | } | |
2045 | else | |
2046 | { | |
2047 | output[0] = (nbuf[0] << 4) | (nbuf[1]); | |
2048 | output[1] = (nbuf[2] << 4) | (nbuf[3]); | |
2049 | } | |
0d10e182 | 2050 | return size; |
252b5132 RH |
2051 | } |
2052 | ||
d4845d57 JR |
2053 | /* Find an opcode at the start of *STR_P in the hash table, and set |
2054 | *STR_P to the first character after the last one read. */ | |
252b5132 | 2055 | |
d4845d57 JR |
2056 | static sh_opcode_info * |
2057 | find_cooked_opcode (str_p) | |
2058 | char **str_p; | |
252b5132 | 2059 | { |
d4845d57 | 2060 | char *str = *str_p; |
252b5132 RH |
2061 | unsigned char *op_start; |
2062 | unsigned char *op_end; | |
252b5132 RH |
2063 | char name[20]; |
2064 | int nlen = 0; | |
c4aa876b | 2065 | |
6b31947e | 2066 | /* Drop leading whitespace. */ |
252b5132 RH |
2067 | while (*str == ' ') |
2068 | str++; | |
2069 | ||
d4845d57 JR |
2070 | /* Find the op code end. |
2071 | The pre-processor will eliminate whitespace in front of | |
2072 | any '@' after the first argument; we may be called from | |
2073 | assemble_ppi, so the opcode might be terminated by an '@'. */ | |
252b5132 RH |
2074 | for (op_start = op_end = (unsigned char *) (str); |
2075 | *op_end | |
2076 | && nlen < 20 | |
d4845d57 | 2077 | && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; |
252b5132 RH |
2078 | op_end++) |
2079 | { | |
2080 | unsigned char c = op_start[nlen]; | |
2081 | ||
2082 | /* The machine independent code will convert CMP/EQ into cmp/EQ | |
d4845d57 JR |
2083 | because it thinks the '/' is the end of the symbol. Moreover, |
2084 | all but the first sub-insn is a parallel processing insn won't | |
3882b010 | 2085 | be capitalized. Instead of hacking up the machine independent |
d4845d57 | 2086 | code, we just deal with it here. */ |
3882b010 | 2087 | c = TOLOWER (c); |
252b5132 RH |
2088 | name[nlen] = c; |
2089 | nlen++; | |
2090 | } | |
c4aa876b | 2091 | |
252b5132 | 2092 | name[nlen] = 0; |
d4845d57 | 2093 | *str_p = op_end; |
252b5132 RH |
2094 | |
2095 | if (nlen == 0) | |
6b31947e | 2096 | as_bad (_("can't find opcode ")); |
252b5132 | 2097 | |
d4845d57 JR |
2098 | return (sh_opcode_info *) hash_find (opcode_hash_control, name); |
2099 | } | |
2100 | ||
2101 | /* Assemble a parallel processing insn. */ | |
2102 | #define DDT_BASE 0xf000 /* Base value for double data transfer insns */ | |
6b31947e | 2103 | |
0d10e182 | 2104 | static unsigned int |
d4845d57 JR |
2105 | assemble_ppi (op_end, opcode) |
2106 | char *op_end; | |
2107 | sh_opcode_info *opcode; | |
2108 | { | |
2109 | int movx = 0; | |
2110 | int movy = 0; | |
2111 | int cond = 0; | |
2112 | int field_b = 0; | |
2113 | char *output; | |
2114 | int move_code; | |
0d10e182 | 2115 | unsigned int size; |
d4845d57 | 2116 | |
d4845d57 JR |
2117 | for (;;) |
2118 | { | |
2119 | sh_operand_info operand[3]; | |
2120 | ||
ac62e7a3 JR |
2121 | /* Some insn ignore one or more register fields, e.g. psts machl,a0. |
2122 | Make sure we encode a defined insn pattern. */ | |
2123 | reg_x = 0; | |
2124 | reg_y = 0; | |
2125 | reg_n = 0; | |
2126 | ||
d4845d57 JR |
2127 | if (opcode->arg[0] != A_END) |
2128 | op_end = get_operands (opcode, op_end, operand); | |
2129 | opcode = get_specific (opcode, operand); | |
2130 | if (opcode == 0) | |
2131 | { | |
6b31947e | 2132 | /* Couldn't find an opcode which matched the operands. */ |
d4845d57 | 2133 | char *where = frag_more (2); |
0d10e182 | 2134 | size = 2; |
d4845d57 JR |
2135 | |
2136 | where[0] = 0x0; | |
2137 | where[1] = 0x0; | |
2138 | as_bad (_("invalid operands for opcode")); | |
0d10e182 | 2139 | return size; |
d4845d57 | 2140 | } |
c4aa876b | 2141 | |
d4845d57 JR |
2142 | if (opcode->nibbles[0] != PPI) |
2143 | as_bad (_("insn can't be combined with parallel processing insn")); | |
2144 | ||
2145 | switch (opcode->nibbles[1]) | |
2146 | { | |
2147 | ||
2148 | case NOPX: | |
2149 | if (movx) | |
2150 | as_bad (_("multiple movx specifications")); | |
2151 | movx = DDT_BASE; | |
2152 | break; | |
2153 | case NOPY: | |
2154 | if (movy) | |
2155 | as_bad (_("multiple movy specifications")); | |
2156 | movy = DDT_BASE; | |
2157 | break; | |
2158 | ||
2159 | case MOVX: | |
2160 | if (movx) | |
2161 | as_bad (_("multiple movx specifications")); | |
2162 | if (reg_n < 4 || reg_n > 5) | |
2163 | as_bad (_("invalid movx address register")); | |
2164 | if (opcode->nibbles[2] & 8) | |
2165 | { | |
2166 | if (reg_m == A_A1_NUM) | |
2167 | movx = 1 << 7; | |
2168 | else if (reg_m != A_A0_NUM) | |
2169 | as_bad (_("invalid movx dsp register")); | |
2170 | } | |
2171 | else | |
2172 | { | |
2173 | if (reg_x > 1) | |
2174 | as_bad (_("invalid movx dsp register")); | |
2175 | movx = reg_x << 7; | |
2176 | } | |
2177 | movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; | |
2178 | break; | |
2179 | ||
2180 | case MOVY: | |
2181 | if (movy) | |
2182 | as_bad (_("multiple movy specifications")); | |
2183 | if (opcode->nibbles[2] & 8) | |
2184 | { | |
2185 | /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, | |
2186 | so add 8 more. */ | |
2187 | movy = 8; | |
2188 | if (reg_m == A_A1_NUM) | |
2189 | movy += 1 << 6; | |
2190 | else if (reg_m != A_A0_NUM) | |
2191 | as_bad (_("invalid movy dsp register")); | |
2192 | } | |
2193 | else | |
2194 | { | |
2195 | if (reg_y > 1) | |
2196 | as_bad (_("invalid movy dsp register")); | |
2197 | movy = reg_y << 6; | |
2198 | } | |
2199 | if (reg_n < 6 || reg_n > 7) | |
2200 | as_bad (_("invalid movy address register")); | |
2201 | movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; | |
2202 | break; | |
2203 | ||
2204 | case PSH: | |
015551fc | 2205 | if (operand[0].immediate.X_op != O_constant) |
d4845d57 JR |
2206 | as_bad (_("dsp immediate shift value not constant")); |
2207 | field_b = ((opcode->nibbles[2] << 12) | |
015551fc | 2208 | | (operand[0].immediate.X_add_number & 127) << 4 |
d4845d57 JR |
2209 | | reg_n); |
2210 | break; | |
2211 | case PPI3: | |
2212 | if (field_b) | |
2213 | as_bad (_("multiple parallel processing specifications")); | |
2214 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
2215 | + (reg_x << 6) + (reg_y << 4) + reg_n); | |
2216 | break; | |
2217 | case PDC: | |
2218 | if (cond) | |
2219 | as_bad (_("multiple condition specifications")); | |
2220 | cond = opcode->nibbles[2] << 8; | |
2221 | if (*op_end) | |
2222 | goto skip_cond_check; | |
2223 | break; | |
2224 | case PPIC: | |
2225 | if (field_b) | |
2226 | as_bad (_("multiple parallel processing specifications")); | |
2227 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
2228 | + cond + (reg_x << 6) + (reg_y << 4) + reg_n); | |
2229 | cond = 0; | |
2230 | break; | |
2231 | case PMUL: | |
2232 | if (field_b) | |
2233 | { | |
2234 | if ((field_b & 0xef00) != 0xa100) | |
2235 | as_bad (_("insn cannot be combined with pmuls")); | |
2236 | field_b -= 0x8100; | |
2237 | switch (field_b & 0xf) | |
2238 | { | |
2239 | case A_X0_NUM: | |
2240 | field_b += 0 - A_X0_NUM; | |
2241 | break; | |
2242 | case A_Y0_NUM: | |
2243 | field_b += 1 - A_Y0_NUM; | |
2244 | break; | |
2245 | case A_A0_NUM: | |
2246 | field_b += 2 - A_A0_NUM; | |
2247 | break; | |
2248 | case A_A1_NUM: | |
2249 | field_b += 3 - A_A1_NUM; | |
2250 | break; | |
2251 | default: | |
2252 | as_bad (_("bad padd / psub pmuls output operand")); | |
2253 | } | |
7dd04abd JR |
2254 | /* Generate warning if the destination register for padd / psub |
2255 | and pmuls is the same ( only for A0 or A1 ). | |
2256 | If the last nibble is 1010 then A0 is used in both | |
2257 | padd / psub and pmuls. If it is 1111 then A1 is used | |
2258 | as destination register in both padd / psub and pmuls. */ | |
5db33d76 JR |
2259 | |
2260 | if ((((field_b | reg_efg) & 0x000F) == 0x000A) | |
2261 | || (((field_b | reg_efg) & 0x000F) == 0x000F)) | |
2262 | as_warn (_("destination register is same for parallel insns")); | |
d4845d57 JR |
2263 | } |
2264 | field_b += 0x4000 + reg_efg; | |
2265 | break; | |
2266 | default: | |
2267 | abort (); | |
2268 | } | |
2269 | if (cond) | |
2270 | { | |
2271 | as_bad (_("condition not followed by conditionalizable insn")); | |
2272 | cond = 0; | |
2273 | } | |
2274 | if (! *op_end) | |
2275 | break; | |
2276 | skip_cond_check: | |
2277 | opcode = find_cooked_opcode (&op_end); | |
2278 | if (opcode == NULL) | |
2279 | { | |
2280 | (as_bad | |
2281 | (_("unrecognized characters at end of parallel processing insn"))); | |
2282 | break; | |
2283 | } | |
2284 | } | |
2285 | ||
2286 | move_code = movx | movy; | |
2287 | if (field_b) | |
2288 | { | |
2289 | /* Parallel processing insn. */ | |
2290 | unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b; | |
2291 | ||
2292 | output = frag_more (4); | |
0d10e182 | 2293 | size = 4; |
d4845d57 JR |
2294 | if (! target_big_endian) |
2295 | { | |
2296 | output[3] = ppi_code >> 8; | |
2297 | output[2] = ppi_code; | |
2298 | } | |
2299 | else | |
2300 | { | |
2301 | output[2] = ppi_code >> 8; | |
2302 | output[3] = ppi_code; | |
2303 | } | |
2304 | move_code |= 0xf800; | |
2305 | } | |
2306 | else | |
0d10e182 JL |
2307 | { |
2308 | /* Just a double data transfer. */ | |
2309 | output = frag_more (2); | |
2310 | size = 2; | |
2311 | } | |
d4845d57 JR |
2312 | if (! target_big_endian) |
2313 | { | |
2314 | output[1] = move_code >> 8; | |
2315 | output[0] = move_code; | |
2316 | } | |
2317 | else | |
2318 | { | |
2319 | output[0] = move_code >> 8; | |
2320 | output[1] = move_code; | |
2321 | } | |
0d10e182 | 2322 | return size; |
d4845d57 JR |
2323 | } |
2324 | ||
2325 | /* This is the guts of the machine-dependent assembler. STR points to a | |
2326 | machine dependent instruction. This function is supposed to emit | |
6b31947e | 2327 | the frags/bytes it assembles to. */ |
d4845d57 JR |
2328 | |
2329 | void | |
2330 | md_assemble (str) | |
2331 | char *str; | |
2332 | { | |
2333 | unsigned char *op_end; | |
2334 | sh_operand_info operand[3]; | |
2335 | sh_opcode_info *opcode; | |
dda5ecfc | 2336 | unsigned int size = 0; |
d4845d57 | 2337 | |
324bfcf3 AO |
2338 | #ifdef HAVE_SH64 |
2339 | if (sh64_isa_mode == sh64_isa_shmedia) | |
2340 | { | |
2341 | shmedia_md_assemble (str); | |
2342 | return; | |
2343 | } | |
2344 | else | |
2345 | { | |
2346 | /* If we've seen pseudo-directives, make sure any emitted data or | |
2347 | frags are marked as data. */ | |
b34976b6 | 2348 | if (!seen_insn) |
324bfcf3 | 2349 | { |
b34976b6 | 2350 | sh64_update_contents_mark (TRUE); |
324bfcf3 AO |
2351 | sh64_set_contents_type (CRT_SH5_ISA16); |
2352 | } | |
2353 | ||
b34976b6 | 2354 | seen_insn = TRUE; |
324bfcf3 AO |
2355 | } |
2356 | #endif /* HAVE_SH64 */ | |
2357 | ||
d4845d57 JR |
2358 | opcode = find_cooked_opcode (&str); |
2359 | op_end = str; | |
252b5132 RH |
2360 | |
2361 | if (opcode == NULL) | |
2362 | { | |
2363 | as_bad (_("unknown opcode")); | |
2364 | return; | |
2365 | } | |
2366 | ||
2367 | if (sh_relax | |
2368 | && ! seg_info (now_seg)->tc_segment_info_data.in_code) | |
2369 | { | |
2370 | /* Output a CODE reloc to tell the linker that the following | |
2371 | bytes are instructions, not data. */ | |
2372 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
2373 | BFD_RELOC_SH_CODE); | |
2374 | seg_info (now_seg)->tc_segment_info_data.in_code = 1; | |
2375 | } | |
2376 | ||
d4845d57 JR |
2377 | if (opcode->nibbles[0] == PPI) |
2378 | { | |
0d10e182 | 2379 | size = assemble_ppi (op_end, opcode); |
252b5132 RH |
2380 | } |
2381 | else | |
2382 | { | |
0d10e182 JL |
2383 | if (opcode->arg[0] == A_BDISP12 |
2384 | || opcode->arg[0] == A_BDISP8) | |
252b5132 | 2385 | { |
26c9b704 JR |
2386 | /* Since we skip get_specific here, we have to check & update |
2387 | valid_arch now. */ | |
2388 | if (valid_arch & opcode->arch) | |
2389 | valid_arch &= opcode->arch; | |
2390 | else | |
2391 | as_bad (_("Delayed branches not available on SH1")); | |
0d10e182 JL |
2392 | parse_exp (op_end + 1, &operand[0]); |
2393 | build_relax (opcode, &operand[0]); | |
5fc44b2d JR |
2394 | } |
2395 | else | |
2396 | { | |
0d10e182 JL |
2397 | if (opcode->arg[0] == A_END) |
2398 | { | |
2399 | /* Ignore trailing whitespace. If there is any, it has already | |
2400 | been compressed to a single space. */ | |
2401 | if (*op_end == ' ') | |
2402 | op_end++; | |
2403 | } | |
2404 | else | |
2405 | { | |
2406 | op_end = get_operands (opcode, op_end, operand); | |
2407 | } | |
2408 | opcode = get_specific (opcode, operand); | |
252b5132 | 2409 | |
0d10e182 JL |
2410 | if (opcode == 0) |
2411 | { | |
2412 | /* Couldn't find an opcode which matched the operands. */ | |
2413 | char *where = frag_more (2); | |
2414 | size = 2; | |
252b5132 | 2415 | |
0d10e182 JL |
2416 | where[0] = 0x0; |
2417 | where[1] = 0x0; | |
2418 | as_bad (_("invalid operands for opcode")); | |
2419 | } | |
2420 | else | |
2421 | { | |
2422 | if (*op_end) | |
2423 | as_bad (_("excess operands: '%s'"), op_end); | |
2424 | ||
2425 | size = build_Mytes (opcode, operand); | |
2426 | } | |
252b5132 | 2427 | } |
0d10e182 | 2428 | } |
252b5132 | 2429 | |
2bc0a128 | 2430 | #ifdef BFD_ASSEMBLER |
4dc7ead9 | 2431 | dwarf2_emit_insn (size); |
2bc0a128 | 2432 | #endif |
252b5132 RH |
2433 | } |
2434 | ||
2435 | /* This routine is called each time a label definition is seen. It | |
2436 | emits a BFD_RELOC_SH_LABEL reloc if necessary. */ | |
2437 | ||
2438 | void | |
2439 | sh_frob_label () | |
2440 | { | |
2441 | static fragS *last_label_frag; | |
2442 | static int last_label_offset; | |
2443 | ||
2444 | if (sh_relax | |
2445 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
2446 | { | |
2447 | int offset; | |
2448 | ||
2449 | offset = frag_now_fix (); | |
2450 | if (frag_now != last_label_frag | |
2451 | || offset != last_label_offset) | |
c4aa876b | 2452 | { |
252b5132 RH |
2453 | fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); |
2454 | last_label_frag = frag_now; | |
2455 | last_label_offset = offset; | |
2456 | } | |
2457 | } | |
2458 | } | |
2459 | ||
2460 | /* This routine is called when the assembler is about to output some | |
2461 | data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ | |
2462 | ||
2463 | void | |
2464 | sh_flush_pending_output () | |
2465 | { | |
2466 | if (sh_relax | |
2467 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
2468 | { | |
2469 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
2470 | BFD_RELOC_SH_DATA); | |
2471 | seg_info (now_seg)->tc_segment_info_data.in_code = 0; | |
2472 | } | |
2473 | } | |
2474 | ||
2475 | symbolS * | |
c0fecd35 | 2476 | md_undefined_symbol (name) |
538cd60f | 2477 | char *name ATTRIBUTE_UNUSED; |
252b5132 RH |
2478 | { |
2479 | return 0; | |
2480 | } | |
2481 | ||
2482 | #ifdef OBJ_COFF | |
056350c6 | 2483 | #ifndef BFD_ASSEMBLER |
252b5132 RH |
2484 | |
2485 | void | |
c0fecd35 | 2486 | tc_crawl_symbol_chain (headers) |
cce5a618 | 2487 | object_headers *headers ATTRIBUTE_UNUSED; |
252b5132 RH |
2488 | { |
2489 | printf (_("call to tc_crawl_symbol_chain \n")); | |
2490 | } | |
2491 | ||
2492 | void | |
c0fecd35 | 2493 | tc_headers_hook (headers) |
cce5a618 | 2494 | object_headers *headers ATTRIBUTE_UNUSED; |
252b5132 RH |
2495 | { |
2496 | printf (_("call to tc_headers_hook \n")); | |
2497 | } | |
2498 | ||
056350c6 | 2499 | #endif |
252b5132 RH |
2500 | #endif |
2501 | ||
6b31947e NC |
2502 | /* Various routines to kill one day. */ |
2503 | /* Equal to MAX_PRECISION in atof-ieee.c. */ | |
252b5132 RH |
2504 | #define MAX_LITTLENUMS 6 |
2505 | ||
6b31947e NC |
2506 | /* Turn a string in input_line_pointer into a floating point constant |
2507 | of type TYPE, and store the appropriate bytes in *LITP. The number | |
2508 | of LITTLENUMS emitted is stored in *SIZEP . An error message is | |
2509 | returned, or NULL on OK. */ | |
2510 | ||
252b5132 RH |
2511 | char * |
2512 | md_atof (type, litP, sizeP) | |
2513 | int type; | |
2514 | char *litP; | |
2515 | int *sizeP; | |
2516 | { | |
2517 | int prec; | |
2518 | LITTLENUM_TYPE words[4]; | |
2519 | char *t; | |
2520 | int i; | |
2521 | ||
2522 | switch (type) | |
2523 | { | |
2524 | case 'f': | |
2525 | prec = 2; | |
2526 | break; | |
2527 | ||
2528 | case 'd': | |
2529 | prec = 4; | |
2530 | break; | |
2531 | ||
2532 | default: | |
2533 | *sizeP = 0; | |
2534 | return _("bad call to md_atof"); | |
2535 | } | |
2536 | ||
2537 | t = atof_ieee (input_line_pointer, type, words); | |
2538 | if (t) | |
2539 | input_line_pointer = t; | |
2540 | ||
2541 | *sizeP = prec * 2; | |
2542 | ||
2543 | if (! target_big_endian) | |
2544 | { | |
2545 | for (i = prec - 1; i >= 0; i--) | |
2546 | { | |
2547 | md_number_to_chars (litP, (valueT) words[i], 2); | |
2548 | litP += 2; | |
2549 | } | |
2550 | } | |
2551 | else | |
2552 | { | |
2553 | for (i = 0; i < prec; i++) | |
2554 | { | |
2555 | md_number_to_chars (litP, (valueT) words[i], 2); | |
2556 | litP += 2; | |
2557 | } | |
2558 | } | |
c4aa876b | 2559 | |
252b5132 RH |
2560 | return NULL; |
2561 | } | |
2562 | ||
2563 | /* Handle the .uses pseudo-op. This pseudo-op is used just before a | |
2564 | call instruction. It refers to a label of the instruction which | |
2565 | loads the register which the call uses. We use it to generate a | |
2566 | special reloc for the linker. */ | |
2567 | ||
2568 | static void | |
2569 | s_uses (ignore) | |
43841e91 | 2570 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
2571 | { |
2572 | expressionS ex; | |
2573 | ||
2574 | if (! sh_relax) | |
2575 | as_warn (_(".uses pseudo-op seen when not relaxing")); | |
2576 | ||
2577 | expression (&ex); | |
2578 | ||
2579 | if (ex.X_op != O_symbol || ex.X_add_number != 0) | |
2580 | { | |
2581 | as_bad (_("bad .uses format")); | |
2582 | ignore_rest_of_line (); | |
2583 | return; | |
2584 | } | |
2585 | ||
2586 | fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); | |
2587 | ||
2588 | demand_empty_rest_of_line (); | |
2589 | } | |
2590 | \f | |
5a38dc70 | 2591 | const char *md_shortopts = ""; |
6b31947e NC |
2592 | struct option md_longopts[] = |
2593 | { | |
252b5132 | 2594 | #define OPTION_RELAX (OPTION_MD_BASE) |
05982cac HPN |
2595 | #define OPTION_BIG (OPTION_MD_BASE + 1) |
2596 | #define OPTION_LITTLE (OPTION_BIG + 1) | |
252b5132 | 2597 | #define OPTION_SMALL (OPTION_LITTLE + 1) |
d4845d57 | 2598 | #define OPTION_DSP (OPTION_SMALL + 1) |
bdfaef52 | 2599 | #define OPTION_ISA (OPTION_DSP + 1) |
252b5132 RH |
2600 | |
2601 | {"relax", no_argument, NULL, OPTION_RELAX}, | |
05982cac | 2602 | {"big", no_argument, NULL, OPTION_BIG}, |
252b5132 RH |
2603 | {"little", no_argument, NULL, OPTION_LITTLE}, |
2604 | {"small", no_argument, NULL, OPTION_SMALL}, | |
d4845d57 | 2605 | {"dsp", no_argument, NULL, OPTION_DSP}, |
bdfaef52 | 2606 | {"isa", required_argument, NULL, OPTION_ISA}, |
324bfcf3 | 2607 | #ifdef HAVE_SH64 |
324bfcf3 AO |
2608 | #define OPTION_ABI (OPTION_ISA + 1) |
2609 | #define OPTION_NO_MIX (OPTION_ABI + 1) | |
2610 | #define OPTION_SHCOMPACT_CONST_CRANGE (OPTION_NO_MIX + 1) | |
2611 | #define OPTION_NO_EXPAND (OPTION_SHCOMPACT_CONST_CRANGE + 1) | |
2612 | #define OPTION_PT32 (OPTION_NO_EXPAND + 1) | |
324bfcf3 AO |
2613 | {"abi", required_argument, NULL, OPTION_ABI}, |
2614 | {"no-mix", no_argument, NULL, OPTION_NO_MIX}, | |
2615 | {"shcompact-const-crange", no_argument, NULL, OPTION_SHCOMPACT_CONST_CRANGE}, | |
2616 | {"no-expand", no_argument, NULL, OPTION_NO_EXPAND}, | |
2617 | {"expand-pt32", no_argument, NULL, OPTION_PT32}, | |
2618 | #endif /* HAVE_SH64 */ | |
2619 | ||
252b5132 RH |
2620 | {NULL, no_argument, NULL, 0} |
2621 | }; | |
c4aa876b | 2622 | size_t md_longopts_size = sizeof (md_longopts); |
252b5132 RH |
2623 | |
2624 | int | |
2625 | md_parse_option (c, arg) | |
2626 | int c; | |
43841e91 | 2627 | char *arg ATTRIBUTE_UNUSED; |
252b5132 RH |
2628 | { |
2629 | switch (c) | |
2630 | { | |
2631 | case OPTION_RELAX: | |
2632 | sh_relax = 1; | |
2633 | break; | |
2634 | ||
05982cac HPN |
2635 | case OPTION_BIG: |
2636 | target_big_endian = 1; | |
2637 | break; | |
2638 | ||
252b5132 | 2639 | case OPTION_LITTLE: |
252b5132 RH |
2640 | target_big_endian = 0; |
2641 | break; | |
2642 | ||
2643 | case OPTION_SMALL: | |
2644 | sh_small = 1; | |
2645 | break; | |
2646 | ||
d4845d57 | 2647 | case OPTION_DSP: |
bdfaef52 | 2648 | preset_target_arch = arch_sh1_up & ~arch_sh3e_up; |
d4845d57 JR |
2649 | break; |
2650 | ||
324bfcf3 | 2651 | case OPTION_ISA: |
bdfaef52 JR |
2652 | if (strcasecmp (arg, "sh4") == 0) |
2653 | preset_target_arch = arch_sh4; | |
2654 | else if (strcasecmp (arg, "any") == 0) | |
2655 | preset_target_arch = arch_sh1_up; | |
2656 | #ifdef HAVE_SH64 | |
2657 | else if (strcasecmp (arg, "shmedia") == 0) | |
324bfcf3 AO |
2658 | { |
2659 | if (sh64_isa_mode == sh64_isa_shcompact) | |
2660 | as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia")); | |
2661 | sh64_isa_mode = sh64_isa_shmedia; | |
2662 | } | |
2663 | else if (strcasecmp (arg, "shcompact") == 0) | |
2664 | { | |
2665 | if (sh64_isa_mode == sh64_isa_shmedia) | |
2666 | as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact")); | |
2667 | if (sh64_abi == sh64_abi_64) | |
2668 | as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact")); | |
2669 | sh64_isa_mode = sh64_isa_shcompact; | |
2670 | } | |
bdfaef52 | 2671 | #endif /* HAVE_SH64 */ |
324bfcf3 AO |
2672 | else |
2673 | as_bad ("Invalid argument to --isa option: %s", arg); | |
2674 | break; | |
2675 | ||
bdfaef52 | 2676 | #ifdef HAVE_SH64 |
324bfcf3 AO |
2677 | case OPTION_ABI: |
2678 | if (strcmp (arg, "32") == 0) | |
2679 | { | |
2680 | if (sh64_abi == sh64_abi_64) | |
2681 | as_bad (_("Invalid combination: --abi=32 with --abi=64")); | |
2682 | sh64_abi = sh64_abi_32; | |
2683 | } | |
2684 | else if (strcmp (arg, "64") == 0) | |
2685 | { | |
2686 | if (sh64_abi == sh64_abi_32) | |
2687 | as_bad (_("Invalid combination: --abi=64 with --abi=32")); | |
2688 | if (sh64_isa_mode == sh64_isa_shcompact) | |
2689 | as_bad (_("Invalid combination: --isa=SHcompact with --abi=64")); | |
2690 | sh64_abi = sh64_abi_64; | |
2691 | } | |
2692 | else | |
2693 | as_bad ("Invalid argument to --abi option: %s", arg); | |
2694 | break; | |
2695 | ||
2696 | case OPTION_NO_MIX: | |
b34976b6 | 2697 | sh64_mix = FALSE; |
324bfcf3 AO |
2698 | break; |
2699 | ||
2700 | case OPTION_SHCOMPACT_CONST_CRANGE: | |
b34976b6 | 2701 | sh64_shcompact_const_crange = TRUE; |
324bfcf3 AO |
2702 | break; |
2703 | ||
2704 | case OPTION_NO_EXPAND: | |
b34976b6 | 2705 | sh64_expand = FALSE; |
324bfcf3 AO |
2706 | break; |
2707 | ||
2708 | case OPTION_PT32: | |
b34976b6 | 2709 | sh64_pt32 = TRUE; |
324bfcf3 AO |
2710 | break; |
2711 | #endif /* HAVE_SH64 */ | |
2712 | ||
252b5132 RH |
2713 | default: |
2714 | return 0; | |
2715 | } | |
2716 | ||
2717 | return 1; | |
2718 | } | |
2719 | ||
2720 | void | |
2721 | md_show_usage (stream) | |
2722 | FILE *stream; | |
2723 | { | |
c4aa876b | 2724 | fprintf (stream, _("\ |
252b5132 RH |
2725 | SH options:\n\ |
2726 | -little generate little endian code\n\ | |
05982cac | 2727 | -big generate big endian code\n\ |
252b5132 | 2728 | -relax alter jump instructions for long displacements\n\ |
5b8274e3 | 2729 | -small align sections to 4 byte boundaries, not 16\n\ |
5177500f | 2730 | -dsp enable sh-dsp insns, and disable sh2e/sh3e/sh4 insns.\n")); |
324bfcf3 AO |
2731 | #ifdef HAVE_SH64 |
2732 | fprintf (stream, _("\ | |
2733 | -isa=[shmedia set default instruction set for SH64\n\ | |
2734 | | SHmedia\n\ | |
2735 | | shcompact\n\ | |
2736 | | SHcompact]\n\ | |
2737 | -abi=[32|64] set size of expanded SHmedia operands and object\n\ | |
2738 | file type\n\ | |
2739 | -shcompact-const-crange emit code-range descriptors for constants in\n\ | |
2740 | SHcompact code sections\n\ | |
2741 | -no-mix disallow SHmedia code in the same section as\n\ | |
2742 | constants and SHcompact code\n\ | |
2743 | -no-expand do not expand MOVI, PT, PTA or PTB instructions\n\ | |
2744 | -expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\ | |
2745 | to 32 bits only")); | |
2746 | #endif /* HAVE_SH64 */ | |
252b5132 RH |
2747 | } |
2748 | \f | |
252b5132 RH |
2749 | /* This struct is used to pass arguments to sh_count_relocs through |
2750 | bfd_map_over_sections. */ | |
2751 | ||
2752 | struct sh_count_relocs | |
2753 | { | |
2754 | /* Symbol we are looking for. */ | |
2755 | symbolS *sym; | |
2756 | /* Count of relocs found. */ | |
2757 | int count; | |
2758 | }; | |
2759 | ||
2760 | /* Count the number of fixups in a section which refer to a particular | |
2761 | symbol. When using BFD_ASSEMBLER, this is called via | |
2762 | bfd_map_over_sections. */ | |
2763 | ||
252b5132 RH |
2764 | static void |
2765 | sh_count_relocs (abfd, sec, data) | |
43841e91 | 2766 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 RH |
2767 | segT sec; |
2768 | PTR data; | |
2769 | { | |
2770 | struct sh_count_relocs *info = (struct sh_count_relocs *) data; | |
2771 | segment_info_type *seginfo; | |
2772 | symbolS *sym; | |
2773 | fixS *fix; | |
2774 | ||
2775 | seginfo = seg_info (sec); | |
2776 | if (seginfo == NULL) | |
2777 | return; | |
2778 | ||
2779 | sym = info->sym; | |
2780 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
2781 | { | |
2782 | if (fix->fx_addsy == sym) | |
2783 | { | |
2784 | ++info->count; | |
2785 | fix->fx_tcbit = 1; | |
2786 | } | |
2787 | } | |
2788 | } | |
2789 | ||
2790 | /* Handle the count relocs for a particular section. When using | |
2791 | BFD_ASSEMBLER, this is called via bfd_map_over_sections. */ | |
2792 | ||
252b5132 RH |
2793 | static void |
2794 | sh_frob_section (abfd, sec, ignore) | |
43841e91 | 2795 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 | 2796 | segT sec; |
43841e91 | 2797 | PTR ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
2798 | { |
2799 | segment_info_type *seginfo; | |
2800 | fixS *fix; | |
2801 | ||
2802 | seginfo = seg_info (sec); | |
2803 | if (seginfo == NULL) | |
2804 | return; | |
2805 | ||
2806 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
2807 | { | |
2808 | symbolS *sym; | |
2809 | bfd_vma val; | |
2810 | fixS *fscan; | |
2811 | struct sh_count_relocs info; | |
2812 | ||
2813 | if (fix->fx_r_type != BFD_RELOC_SH_USES) | |
2814 | continue; | |
2815 | ||
2816 | /* The BFD_RELOC_SH_USES reloc should refer to a defined local | |
2817 | symbol in the same section. */ | |
2818 | sym = fix->fx_addsy; | |
2819 | if (sym == NULL | |
2820 | || fix->fx_subsy != NULL | |
2821 | || fix->fx_addnumber != 0 | |
2822 | || S_GET_SEGMENT (sym) != sec | |
2823 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) | |
2824 | || S_GET_STORAGE_CLASS (sym) == C_EXT | |
2825 | #endif | |
2826 | || S_IS_EXTERNAL (sym)) | |
2827 | { | |
2828 | as_warn_where (fix->fx_file, fix->fx_line, | |
2829 | _(".uses does not refer to a local symbol in the same section")); | |
2830 | continue; | |
2831 | } | |
2832 | ||
2833 | /* Look through the fixups again, this time looking for one | |
2834 | at the same location as sym. */ | |
2835 | val = S_GET_VALUE (sym); | |
2836 | for (fscan = seginfo->fix_root; | |
2837 | fscan != NULL; | |
2838 | fscan = fscan->fx_next) | |
2839 | if (val == fscan->fx_frag->fr_address + fscan->fx_where | |
2840 | && fscan->fx_r_type != BFD_RELOC_SH_ALIGN | |
2841 | && fscan->fx_r_type != BFD_RELOC_SH_CODE | |
2842 | && fscan->fx_r_type != BFD_RELOC_SH_DATA | |
2843 | && fscan->fx_r_type != BFD_RELOC_SH_LABEL) | |
2844 | break; | |
2845 | if (fscan == NULL) | |
2846 | { | |
2847 | as_warn_where (fix->fx_file, fix->fx_line, | |
2848 | _("can't find fixup pointed to by .uses")); | |
2849 | continue; | |
2850 | } | |
2851 | ||
2852 | if (fscan->fx_tcbit) | |
2853 | { | |
2854 | /* We've already done this one. */ | |
2855 | continue; | |
2856 | } | |
2857 | ||
6b31947e NC |
2858 | /* The variable fscan should also be a fixup to a local symbol |
2859 | in the same section. */ | |
252b5132 RH |
2860 | sym = fscan->fx_addsy; |
2861 | if (sym == NULL | |
2862 | || fscan->fx_subsy != NULL | |
2863 | || fscan->fx_addnumber != 0 | |
2864 | || S_GET_SEGMENT (sym) != sec | |
2865 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) | |
2866 | || S_GET_STORAGE_CLASS (sym) == C_EXT | |
2867 | #endif | |
2868 | || S_IS_EXTERNAL (sym)) | |
2869 | { | |
2870 | as_warn_where (fix->fx_file, fix->fx_line, | |
2871 | _(".uses target does not refer to a local symbol in the same section")); | |
2872 | continue; | |
2873 | } | |
2874 | ||
2875 | /* Now we look through all the fixups of all the sections, | |
2876 | counting the number of times we find a reference to sym. */ | |
2877 | info.sym = sym; | |
2878 | info.count = 0; | |
2879 | #ifdef BFD_ASSEMBLER | |
2880 | bfd_map_over_sections (stdoutput, sh_count_relocs, (PTR) &info); | |
2881 | #else | |
2882 | { | |
2883 | int iscan; | |
2884 | ||
2885 | for (iscan = SEG_E0; iscan < SEG_UNKNOWN; iscan++) | |
2886 | sh_count_relocs ((bfd *) NULL, iscan, (PTR) &info); | |
2887 | } | |
2888 | #endif | |
2889 | ||
2890 | if (info.count < 1) | |
2891 | abort (); | |
2892 | ||
2893 | /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. | |
2894 | We have already adjusted the value of sym to include the | |
2895 | fragment address, so we undo that adjustment here. */ | |
2896 | subseg_change (sec, 0); | |
7bcad3e5 NC |
2897 | fix_new (fscan->fx_frag, |
2898 | S_GET_VALUE (sym) - fscan->fx_frag->fr_address, | |
252b5132 RH |
2899 | 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); |
2900 | } | |
2901 | } | |
2902 | ||
2903 | /* This function is called after the symbol table has been completed, | |
2904 | but before the relocs or section contents have been written out. | |
2905 | If we have seen any .uses pseudo-ops, they point to an instruction | |
2906 | which loads a register with the address of a function. We look | |
2907 | through the fixups to find where the function address is being | |
2908 | loaded from. We then generate a COUNT reloc giving the number of | |
2909 | times that function address is referred to. The linker uses this | |
2910 | information when doing relaxing, to decide when it can eliminate | |
2911 | the stored function address entirely. */ | |
2912 | ||
2913 | void | |
2914 | sh_frob_file () | |
2915 | { | |
324bfcf3 AO |
2916 | #ifdef HAVE_SH64 |
2917 | shmedia_frob_file_before_adjust (); | |
2918 | #endif | |
2919 | ||
252b5132 RH |
2920 | if (! sh_relax) |
2921 | return; | |
2922 | ||
2923 | #ifdef BFD_ASSEMBLER | |
2924 | bfd_map_over_sections (stdoutput, sh_frob_section, (PTR) NULL); | |
2925 | #else | |
2926 | { | |
2927 | int iseg; | |
2928 | ||
2929 | for (iseg = SEG_E0; iseg < SEG_UNKNOWN; iseg++) | |
2930 | sh_frob_section ((bfd *) NULL, iseg, (PTR) NULL); | |
2931 | } | |
2932 | #endif | |
2933 | } | |
2934 | ||
2935 | /* Called after relaxing. Set the correct sizes of the fragments, and | |
94f592af | 2936 | create relocs so that md_apply_fix3 will fill in the correct values. */ |
252b5132 RH |
2937 | |
2938 | void | |
2939 | md_convert_frag (headers, seg, fragP) | |
2940 | #ifdef BFD_ASSEMBLER | |
43841e91 | 2941 | bfd *headers ATTRIBUTE_UNUSED; |
252b5132 | 2942 | #else |
cce5a618 | 2943 | object_headers *headers ATTRIBUTE_UNUSED; |
252b5132 RH |
2944 | #endif |
2945 | segT seg; | |
2946 | fragS *fragP; | |
2947 | { | |
2948 | int donerelax = 0; | |
2949 | ||
2950 | switch (fragP->fr_subtype) | |
2951 | { | |
2952 | case C (COND_JUMP, COND8): | |
2953 | case C (COND_JUMP_DELAY, COND8): | |
2954 | subseg_change (seg, 0); | |
2955 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
2956 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
2957 | fragP->fr_fix += 2; | |
2958 | fragP->fr_var = 0; | |
2959 | break; | |
2960 | ||
2961 | case C (UNCOND_JUMP, UNCOND12): | |
2962 | subseg_change (seg, 0); | |
2963 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
2964 | 1, BFD_RELOC_SH_PCDISP12BY2); | |
2965 | fragP->fr_fix += 2; | |
2966 | fragP->fr_var = 0; | |
2967 | break; | |
2968 | ||
2969 | case C (UNCOND_JUMP, UNCOND32): | |
2970 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): | |
2971 | if (fragP->fr_symbol == NULL) | |
99b222b4 HPN |
2972 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2973 | _("displacement overflows 12-bit field")); | |
252b5132 | 2974 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
99b222b4 HPN |
2975 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2976 | _("displacement to defined symbol %s overflows 12-bit field"), | |
2977 | S_GET_NAME (fragP->fr_symbol)); | |
252b5132 | 2978 | else |
99b222b4 HPN |
2979 | as_bad_where (fragP->fr_file, fragP->fr_line, |
2980 | _("displacement to undefined symbol %s overflows 12-bit field"), | |
2981 | S_GET_NAME (fragP->fr_symbol)); | |
2982 | /* Stabilize this frag, so we don't trip an assert. */ | |
2983 | fragP->fr_fix += fragP->fr_var; | |
2984 | fragP->fr_var = 0; | |
252b5132 RH |
2985 | break; |
2986 | ||
2987 | case C (COND_JUMP, COND12): | |
2988 | case C (COND_JUMP_DELAY, COND12): | |
6b31947e | 2989 | /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */ |
252b5132 RH |
2990 | /* I found that a relax failure for gcc.c-torture/execute/930628-1.c |
2991 | was due to gas incorrectly relaxing an out-of-range conditional | |
2992 | branch with delay slot. It turned: | |
2993 | bf.s L6 (slot mov.l r12,@(44,r0)) | |
2994 | into: | |
c4aa876b | 2995 | |
252b5132 RH |
2996 | 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) |
2997 | 30: 00 09 nop | |
2998 | 32: 10 cb mov.l r12,@(44,r0) | |
2999 | Therefore, branches with delay slots have to be handled | |
3000 | differently from ones without delay slots. */ | |
3001 | { | |
3002 | unsigned char *buffer = | |
3003 | (unsigned char *) (fragP->fr_fix + fragP->fr_literal); | |
3004 | int highbyte = target_big_endian ? 0 : 1; | |
3005 | int lowbyte = target_big_endian ? 1 : 0; | |
3006 | int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); | |
3007 | ||
3008 | /* Toggle the true/false bit of the bcond. */ | |
3009 | buffer[highbyte] ^= 0x2; | |
3010 | ||
d3ecfc59 | 3011 | /* If this is a delayed branch, we may not put the bra in the |
252b5132 RH |
3012 | slot. So we change it to a non-delayed branch, like that: |
3013 | b! cond slot_label; bra disp; slot_label: slot_insn | |
3014 | ??? We should try if swapping the conditional branch and | |
3015 | its delay-slot insn already makes the branch reach. */ | |
3016 | ||
3017 | /* Build a relocation to six / four bytes farther on. */ | |
3018 | subseg_change (seg, 0); | |
3019 | fix_new (fragP, fragP->fr_fix, 2, | |
3020 | #ifdef BFD_ASSEMBLER | |
3021 | section_symbol (seg), | |
3022 | #else | |
3023 | seg_info (seg)->dot, | |
3024 | #endif | |
3025 | fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), | |
3026 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
3027 | ||
3028 | /* Set up a jump instruction. */ | |
3029 | buffer[highbyte + 2] = 0xa0; | |
3030 | buffer[lowbyte + 2] = 0; | |
3031 | fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, | |
3032 | fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); | |
3033 | ||
3034 | if (delay) | |
3035 | { | |
3036 | buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ | |
3037 | fragP->fr_fix += 4; | |
3038 | } | |
3039 | else | |
3040 | { | |
3041 | /* Fill in a NOP instruction. */ | |
3042 | buffer[highbyte + 4] = 0x0; | |
3043 | buffer[lowbyte + 4] = 0x9; | |
3044 | ||
3045 | fragP->fr_fix += 6; | |
3046 | } | |
3047 | fragP->fr_var = 0; | |
3048 | donerelax = 1; | |
3049 | } | |
3050 | break; | |
3051 | ||
3052 | case C (COND_JUMP, COND32): | |
3053 | case C (COND_JUMP_DELAY, COND32): | |
3054 | case C (COND_JUMP, UNDEF_WORD_DISP): | |
3055 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): | |
3056 | if (fragP->fr_symbol == NULL) | |
99b222b4 HPN |
3057 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3058 | _("displacement overflows 8-bit field")); | |
252b5132 | 3059 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
99b222b4 HPN |
3060 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3061 | _("displacement to defined symbol %s overflows 8-bit field"), | |
3062 | S_GET_NAME (fragP->fr_symbol)); | |
252b5132 | 3063 | else |
99b222b4 HPN |
3064 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3065 | _("displacement to undefined symbol %s overflows 8-bit field "), | |
3066 | S_GET_NAME (fragP->fr_symbol)); | |
3067 | /* Stabilize this frag, so we don't trip an assert. */ | |
3068 | fragP->fr_fix += fragP->fr_var; | |
3069 | fragP->fr_var = 0; | |
252b5132 RH |
3070 | break; |
3071 | ||
3072 | default: | |
324bfcf3 | 3073 | #ifdef HAVE_SH64 |
b34976b6 | 3074 | shmedia_md_convert_frag (headers, seg, fragP, TRUE); |
324bfcf3 | 3075 | #else |
252b5132 | 3076 | abort (); |
324bfcf3 | 3077 | #endif |
252b5132 RH |
3078 | } |
3079 | ||
3080 | if (donerelax && !sh_relax) | |
3081 | as_warn_where (fragP->fr_file, fragP->fr_line, | |
3082 | _("overflow in branch to %s; converted into longer instruction sequence"), | |
3083 | (fragP->fr_symbol != NULL | |
3084 | ? S_GET_NAME (fragP->fr_symbol) | |
3085 | : "")); | |
3086 | } | |
3087 | ||
3088 | valueT | |
c0fecd35 | 3089 | md_section_align (seg, size) |
dda5ecfc | 3090 | segT seg ATTRIBUTE_UNUSED; |
c0fecd35 | 3091 | valueT size; |
252b5132 RH |
3092 | { |
3093 | #ifdef BFD_ASSEMBLER | |
3094 | #ifdef OBJ_ELF | |
3095 | return size; | |
3096 | #else /* ! OBJ_ELF */ | |
3097 | return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1) | |
3098 | & (-1 << bfd_get_section_alignment (stdoutput, seg))); | |
3099 | #endif /* ! OBJ_ELF */ | |
3100 | #else /* ! BFD_ASSEMBLER */ | |
3101 | return ((size + (1 << section_alignment[(int) seg]) - 1) | |
3102 | & (-1 << section_alignment[(int) seg])); | |
3103 | #endif /* ! BFD_ASSEMBLER */ | |
3104 | } | |
3105 | ||
3106 | /* This static variable is set by s_uacons to tell sh_cons_align that | |
3107 | the expession does not need to be aligned. */ | |
3108 | ||
3109 | static int sh_no_align_cons = 0; | |
3110 | ||
3111 | /* This handles the unaligned space allocation pseudo-ops, such as | |
3112 | .uaword. .uaword is just like .word, but the value does not need | |
3113 | to be aligned. */ | |
3114 | ||
3115 | static void | |
3116 | s_uacons (bytes) | |
3117 | int bytes; | |
3118 | { | |
3119 | /* Tell sh_cons_align not to align this value. */ | |
3120 | sh_no_align_cons = 1; | |
3121 | cons (bytes); | |
3122 | } | |
3123 | ||
3124 | /* If a .word, et. al., pseud-op is seen, warn if the value is not | |
3125 | aligned correctly. Note that this can cause warnings to be issued | |
3126 | when assembling initialized structured which were declared with the | |
3127 | packed attribute. FIXME: Perhaps we should require an option to | |
3128 | enable this warning? */ | |
3129 | ||
3130 | void | |
3131 | sh_cons_align (nbytes) | |
3132 | int nbytes; | |
3133 | { | |
3134 | int nalign; | |
3135 | char *p; | |
3136 | ||
3137 | if (sh_no_align_cons) | |
3138 | { | |
3139 | /* This is an unaligned pseudo-op. */ | |
3140 | sh_no_align_cons = 0; | |
3141 | return; | |
3142 | } | |
3143 | ||
3144 | nalign = 0; | |
3145 | while ((nbytes & 1) == 0) | |
3146 | { | |
3147 | ++nalign; | |
3148 | nbytes >>= 1; | |
3149 | } | |
3150 | ||
3151 | if (nalign == 0) | |
3152 | return; | |
3153 | ||
3154 | if (now_seg == absolute_section) | |
3155 | { | |
3156 | if ((abs_section_offset & ((1 << nalign) - 1)) != 0) | |
3157 | as_warn (_("misaligned data")); | |
3158 | return; | |
3159 | } | |
3160 | ||
0a9ef439 | 3161 | p = frag_var (rs_align_test, 1, 1, (relax_substateT) 0, |
252b5132 RH |
3162 | (symbolS *) NULL, (offsetT) nalign, (char *) NULL); |
3163 | ||
3164 | record_alignment (now_seg, nalign); | |
3165 | } | |
3166 | ||
3167 | /* When relaxing, we need to output a reloc for any .align directive | |
3168 | that requests alignment to a four byte boundary or larger. This is | |
3169 | also where we check for misaligned data. */ | |
3170 | ||
3171 | void | |
3172 | sh_handle_align (frag) | |
3173 | fragS *frag; | |
3174 | { | |
0a9ef439 RH |
3175 | int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix; |
3176 | ||
3177 | if (frag->fr_type == rs_align_code) | |
3178 | { | |
3179 | static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; | |
3180 | static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; | |
3181 | ||
3182 | char *p = frag->fr_literal + frag->fr_fix; | |
3183 | ||
3184 | if (bytes & 1) | |
3185 | { | |
3186 | *p++ = 0; | |
3187 | bytes--; | |
3188 | frag->fr_fix += 1; | |
3189 | } | |
3190 | ||
3191 | if (target_big_endian) | |
3192 | { | |
3193 | memcpy (p, big_nop_pattern, sizeof big_nop_pattern); | |
3194 | frag->fr_var = sizeof big_nop_pattern; | |
3195 | } | |
3196 | else | |
3197 | { | |
3198 | memcpy (p, little_nop_pattern, sizeof little_nop_pattern); | |
3199 | frag->fr_var = sizeof little_nop_pattern; | |
3200 | } | |
3201 | } | |
3202 | else if (frag->fr_type == rs_align_test) | |
3203 | { | |
3204 | if (bytes != 0) | |
3205 | as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data")); | |
3206 | } | |
3207 | ||
252b5132 | 3208 | if (sh_relax |
0a9ef439 RH |
3209 | && (frag->fr_type == rs_align |
3210 | || frag->fr_type == rs_align_code) | |
252b5132 RH |
3211 | && frag->fr_address + frag->fr_fix > 0 |
3212 | && frag->fr_offset > 1 | |
3213 | && now_seg != bss_section) | |
3214 | fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, | |
3215 | BFD_RELOC_SH_ALIGN); | |
252b5132 RH |
3216 | } |
3217 | ||
28602ebf KK |
3218 | /* See whether the relocation should be resolved locally. */ |
3219 | ||
b34976b6 | 3220 | static bfd_boolean |
28602ebf KK |
3221 | sh_local_pcrel (fix) |
3222 | fixS *fix; | |
3223 | { | |
b34976b6 AM |
3224 | return (! sh_relax |
3225 | && (fix->fx_r_type == BFD_RELOC_SH_PCDISP8BY2 | |
3226 | || fix->fx_r_type == BFD_RELOC_SH_PCDISP12BY2 | |
3227 | || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2 | |
3228 | || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4 | |
3229 | || fix->fx_r_type == BFD_RELOC_8_PCREL | |
3230 | || fix->fx_r_type == BFD_RELOC_SH_SWITCH16 | |
3231 | || fix->fx_r_type == BFD_RELOC_SH_SWITCH32)); | |
28602ebf KK |
3232 | } |
3233 | ||
252b5132 RH |
3234 | /* See whether we need to force a relocation into the output file. |
3235 | This is used to force out switch and PC relative relocations when | |
3236 | relaxing. */ | |
3237 | ||
3238 | int | |
3239 | sh_force_relocation (fix) | |
3240 | fixS *fix; | |
3241 | { | |
8ba4dac0 DJ |
3242 | /* These relocations can't make it into a DSO, so no use forcing |
3243 | them for global symbols. */ | |
28602ebf | 3244 | if (sh_local_pcrel (fix)) |
8ba4dac0 DJ |
3245 | return 0; |
3246 | ||
9efb3b7b | 3247 | /* Make sure some relocations get emitted. */ |
ae6063d4 | 3248 | if (fix->fx_r_type == BFD_RELOC_SH_LOOP_START |
a161fe53 | 3249 | || fix->fx_r_type == BFD_RELOC_SH_LOOP_END |
9efb3b7b KK |
3250 | || fix->fx_r_type == BFD_RELOC_SH_TLS_GD_32 |
3251 | || fix->fx_r_type == BFD_RELOC_SH_TLS_LD_32 | |
3252 | || fix->fx_r_type == BFD_RELOC_SH_TLS_IE_32 | |
3253 | || fix->fx_r_type == BFD_RELOC_SH_TLS_LDO_32 | |
3254 | || fix->fx_r_type == BFD_RELOC_SH_TLS_LE_32 | |
ae6063d4 | 3255 | || generic_force_reloc (fix)) |
252b5132 RH |
3256 | return 1; |
3257 | ||
3258 | if (! sh_relax) | |
3259 | return 0; | |
3260 | ||
3261 | return (fix->fx_pcrel | |
3262 | || SWITCH_TABLE (fix) | |
3263 | || fix->fx_r_type == BFD_RELOC_SH_COUNT | |
3264 | || fix->fx_r_type == BFD_RELOC_SH_ALIGN | |
3265 | || fix->fx_r_type == BFD_RELOC_SH_CODE | |
3266 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
324bfcf3 AO |
3267 | #ifdef HAVE_SH64 |
3268 | || fix->fx_r_type == BFD_RELOC_SH_SHMEDIA_CODE | |
3269 | #endif | |
252b5132 RH |
3270 | || fix->fx_r_type == BFD_RELOC_SH_LABEL); |
3271 | } | |
3272 | ||
3273 | #ifdef OBJ_ELF | |
b34976b6 | 3274 | bfd_boolean |
252b5132 RH |
3275 | sh_fix_adjustable (fixP) |
3276 | fixS *fixP; | |
3277 | { | |
a161fe53 AM |
3278 | if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL |
3279 | || fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL | |
3280 | || fixP->fx_r_type == BFD_RELOC_SH_GOTPC | |
a1cc9221 AO |
3281 | || fixP->fx_r_type == BFD_RELOC_RVA) |
3282 | return 0; | |
3283 | ||
252b5132 RH |
3284 | /* We need the symbol name for the VTABLE entries */ |
3285 | if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
3286 | || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
3287 | return 0; | |
3288 | ||
3289 | return 1; | |
3290 | } | |
d4845d57 | 3291 | |
6b31947e NC |
3292 | void |
3293 | sh_elf_final_processing () | |
d4845d57 JR |
3294 | { |
3295 | int val; | |
3296 | ||
3297 | /* Set file-specific flags to indicate if this code needs | |
3298 | a processor with the sh-dsp / sh3e ISA to execute. */ | |
324bfcf3 AO |
3299 | #ifdef HAVE_SH64 |
3300 | /* SH5 and above don't know about the valid_arch arch_sh* bits defined | |
3301 | in sh-opc.h, so check SH64 mode before checking valid_arch. */ | |
3302 | if (sh64_isa_mode != sh64_isa_unspecified) | |
3303 | val = EF_SH5; | |
3304 | else | |
3305 | #endif /* HAVE_SH64 */ | |
d4845d57 JR |
3306 | if (valid_arch & arch_sh1) |
3307 | val = EF_SH1; | |
3308 | else if (valid_arch & arch_sh2) | |
3309 | val = EF_SH2; | |
5177500f NC |
3310 | else if (valid_arch & arch_sh2e) |
3311 | val = EF_SH2E; | |
d4845d57 JR |
3312 | else if (valid_arch & arch_sh_dsp) |
3313 | val = EF_SH_DSP; | |
3314 | else if (valid_arch & arch_sh3) | |
3315 | val = EF_SH3; | |
3316 | else if (valid_arch & arch_sh3_dsp) | |
3317 | val = EF_SH_DSP; | |
3318 | else if (valid_arch & arch_sh3e) | |
3319 | val = EF_SH3E; | |
3320 | else if (valid_arch & arch_sh4) | |
3321 | val = EF_SH4; | |
3322 | else | |
3323 | abort (); | |
3324 | ||
3325 | elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; | |
3326 | elf_elfheader (stdoutput)->e_flags |= val; | |
3327 | } | |
252b5132 RH |
3328 | #endif |
3329 | ||
3330 | /* Apply a fixup to the object file. */ | |
3331 | ||
252b5132 | 3332 | void |
94f592af NC |
3333 | md_apply_fix3 (fixP, valP, seg) |
3334 | fixS * fixP; | |
3335 | valueT * valP; | |
3336 | segT seg ATTRIBUTE_UNUSED; | |
252b5132 RH |
3337 | { |
3338 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; | |
3339 | int lowbyte = target_big_endian ? 1 : 0; | |
3340 | int highbyte = target_big_endian ? 0 : 1; | |
2ed5f585 | 3341 | long val = (long) *valP; |
252b5132 RH |
3342 | long max, min; |
3343 | int shift; | |
3344 | ||
3345 | #ifdef BFD_ASSEMBLER | |
a1cc9221 AO |
3346 | /* A difference between two symbols, the second of which is in the |
3347 | current section, is transformed in a PC-relative relocation to | |
3348 | the other symbol. We have to adjust the relocation type here. */ | |
3349 | if (fixP->fx_pcrel) | |
3350 | { | |
3351 | switch (fixP->fx_r_type) | |
3352 | { | |
3353 | default: | |
3354 | break; | |
3355 | ||
3356 | case BFD_RELOC_32: | |
3357 | fixP->fx_r_type = BFD_RELOC_32_PCREL; | |
3358 | break; | |
3359 | ||
3360 | /* Currently, we only support 32-bit PCREL relocations. | |
3361 | We'd need a new reloc type to handle 16_PCREL, and | |
3362 | 8_PCREL is already taken for R_SH_SWITCH8, which | |
3363 | apparently does something completely different than what | |
3364 | we need. FIXME. */ | |
3365 | case BFD_RELOC_16: | |
3366 | bfd_set_error (bfd_error_bad_value); | |
94f592af | 3367 | return; |
81d4177b | 3368 | |
a1cc9221 AO |
3369 | case BFD_RELOC_8: |
3370 | bfd_set_error (bfd_error_bad_value); | |
94f592af | 3371 | return; |
a1cc9221 AO |
3372 | } |
3373 | } | |
3374 | ||
6b31947e NC |
3375 | /* The function adjust_reloc_syms won't convert a reloc against a weak |
3376 | symbol into a reloc against a section, but bfd_install_relocation | |
3377 | will screw up if the symbol is defined, so we have to adjust val here | |
1308f14c HPN |
3378 | to avoid the screw up later. |
3379 | ||
3380 | For ordinary relocs, this does not happen for ELF, since for ELF, | |
3381 | bfd_install_relocation uses the "special function" field of the | |
3382 | howto, and does not execute the code that needs to be undone, as long | |
3383 | as the special function does not return bfd_reloc_continue. | |
3384 | It can happen for GOT- and PLT-type relocs the way they are | |
3385 | described in elf32-sh.c as they use bfd_elf_generic_reloc, but it | |
3386 | doesn't matter here since those relocs don't use VAL; see below. */ | |
3387 | if (OUTPUT_FLAVOR != bfd_target_elf_flavour | |
3388 | && fixP->fx_addsy != NULL | |
252b5132 RH |
3389 | && S_IS_WEAK (fixP->fx_addsy)) |
3390 | val -= S_GET_VALUE (fixP->fx_addsy); | |
3391 | #endif | |
3392 | ||
bdfaef52 JR |
3393 | #ifdef BFD_ASSEMBLER |
3394 | if (SWITCH_TABLE (fixP)) | |
3395 | val -= S_GET_VALUE (fixP->fx_subsy); | |
3396 | #else | |
252b5132 RH |
3397 | if (fixP->fx_r_type == 0) |
3398 | { | |
3399 | if (fixP->fx_size == 2) | |
3400 | fixP->fx_r_type = BFD_RELOC_16; | |
3401 | else if (fixP->fx_size == 4) | |
3402 | fixP->fx_r_type = BFD_RELOC_32; | |
3403 | else if (fixP->fx_size == 1) | |
3404 | fixP->fx_r_type = BFD_RELOC_8; | |
3405 | else | |
3406 | abort (); | |
3407 | } | |
3408 | #endif | |
3409 | ||
3410 | max = min = 0; | |
3411 | shift = 0; | |
3412 | switch (fixP->fx_r_type) | |
3413 | { | |
3414 | case BFD_RELOC_SH_IMM4: | |
3415 | max = 0xf; | |
3416 | *buf = (*buf & 0xf0) | (val & 0xf); | |
3417 | break; | |
3418 | ||
3419 | case BFD_RELOC_SH_IMM4BY2: | |
3420 | max = 0xf; | |
3421 | shift = 1; | |
3422 | *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); | |
3423 | break; | |
3424 | ||
3425 | case BFD_RELOC_SH_IMM4BY4: | |
3426 | max = 0xf; | |
3427 | shift = 2; | |
3428 | *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); | |
3429 | break; | |
3430 | ||
3431 | case BFD_RELOC_SH_IMM8BY2: | |
3432 | max = 0xff; | |
3433 | shift = 1; | |
3434 | *buf = val >> 1; | |
3435 | break; | |
3436 | ||
3437 | case BFD_RELOC_SH_IMM8BY4: | |
3438 | max = 0xff; | |
3439 | shift = 2; | |
3440 | *buf = val >> 2; | |
3441 | break; | |
3442 | ||
3443 | case BFD_RELOC_8: | |
3444 | case BFD_RELOC_SH_IMM8: | |
3445 | /* Sometimes the 8 bit value is sign extended (e.g., add) and | |
3446 | sometimes it is not (e.g., and). We permit any 8 bit value. | |
3447 | Note that adding further restrictions may invalidate | |
3448 | reasonable looking assembly code, such as ``and -0x1,r0''. */ | |
3449 | max = 0xff; | |
c4aa876b | 3450 | min = -0xff; |
252b5132 RH |
3451 | *buf++ = val; |
3452 | break; | |
3453 | ||
3454 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
3455 | /* The lower two bits of the PC are cleared before the | |
3456 | displacement is added in. We can assume that the destination | |
3457 | is on a 4 byte bounday. If this instruction is also on a 4 | |
3458 | byte boundary, then we want | |
3459 | (target - here) / 4 | |
3460 | and target - here is a multiple of 4. | |
3461 | Otherwise, we are on a 2 byte boundary, and we want | |
3462 | (target - (here - 2)) / 4 | |
3463 | and target - here is not a multiple of 4. Computing | |
3464 | (target - (here - 2)) / 4 == (target - here + 2) / 4 | |
3465 | works for both cases, since in the first case the addition of | |
3466 | 2 will be removed by the division. target - here is in the | |
3467 | variable val. */ | |
3468 | val = (val + 2) / 4; | |
3469 | if (val & ~0xff) | |
3470 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
3471 | buf[lowbyte] = val; | |
3472 | break; | |
3473 | ||
3474 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
3475 | val /= 2; | |
3476 | if (val & ~0xff) | |
3477 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
3478 | buf[lowbyte] = val; | |
3479 | break; | |
3480 | ||
3481 | case BFD_RELOC_SH_PCDISP8BY2: | |
3482 | val /= 2; | |
3483 | if (val < -0x80 || val > 0x7f) | |
3484 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
3485 | buf[lowbyte] = val; | |
3486 | break; | |
3487 | ||
3488 | case BFD_RELOC_SH_PCDISP12BY2: | |
3489 | val /= 2; | |
8637c045 | 3490 | if (val < -0x800 || val > 0x7ff) |
252b5132 RH |
3491 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); |
3492 | buf[lowbyte] = val & 0xff; | |
3493 | buf[highbyte] |= (val >> 8) & 0xf; | |
3494 | break; | |
3495 | ||
3496 | case BFD_RELOC_32: | |
a1cc9221 | 3497 | case BFD_RELOC_32_PCREL: |
1db77c8e | 3498 | md_number_to_chars (buf, val, 4); |
252b5132 RH |
3499 | break; |
3500 | ||
3501 | case BFD_RELOC_16: | |
1db77c8e | 3502 | md_number_to_chars (buf, val, 2); |
252b5132 RH |
3503 | break; |
3504 | ||
3505 | case BFD_RELOC_SH_USES: | |
3506 | /* Pass the value into sh_coff_reloc_mangle. */ | |
3507 | fixP->fx_addnumber = val; | |
3508 | break; | |
3509 | ||
3510 | case BFD_RELOC_SH_COUNT: | |
3511 | case BFD_RELOC_SH_ALIGN: | |
3512 | case BFD_RELOC_SH_CODE: | |
3513 | case BFD_RELOC_SH_DATA: | |
3514 | case BFD_RELOC_SH_LABEL: | |
3515 | /* Nothing to do here. */ | |
3516 | break; | |
3517 | ||
015551fc JR |
3518 | case BFD_RELOC_SH_LOOP_START: |
3519 | case BFD_RELOC_SH_LOOP_END: | |
3520 | ||
252b5132 RH |
3521 | case BFD_RELOC_VTABLE_INHERIT: |
3522 | case BFD_RELOC_VTABLE_ENTRY: | |
3523 | fixP->fx_done = 0; | |
3524 | return; | |
3525 | ||
a1cc9221 AO |
3526 | #ifdef OBJ_ELF |
3527 | case BFD_RELOC_32_PLT_PCREL: | |
3528 | /* Make the jump instruction point to the address of the operand. At | |
81d4177b | 3529 | runtime we merely add the offset to the actual PLT entry. */ |
94f592af | 3530 | * valP = 0xfffffffc; |
0174e383 | 3531 | val = fixP->fx_offset; |
ac3f04d7 AO |
3532 | if (fixP->fx_subsy) |
3533 | val -= S_GET_VALUE (fixP->fx_subsy); | |
a161fe53 | 3534 | fixP->fx_addnumber = val; |
538cd60f | 3535 | md_number_to_chars (buf, val, 4); |
a1cc9221 AO |
3536 | break; |
3537 | ||
3538 | case BFD_RELOC_SH_GOTPC: | |
3539 | /* This is tough to explain. We end up with this one if we have | |
3540 | operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". | |
3541 | The goal here is to obtain the absolute address of the GOT, | |
3542 | and it is strongly preferable from a performance point of | |
3543 | view to avoid using a runtime relocation for this. There are | |
3544 | cases where you have something like: | |
81d4177b | 3545 | |
a1cc9221 | 3546 | .long _GLOBAL_OFFSET_TABLE_+[.-.L66] |
81d4177b | 3547 | |
a1cc9221 AO |
3548 | and here no correction would be required. Internally in the |
3549 | assembler we treat operands of this form as not being pcrel | |
3550 | since the '.' is explicitly mentioned, and I wonder whether | |
3551 | it would simplify matters to do it this way. Who knows. In | |
3552 | earlier versions of the PIC patches, the pcrel_adjust field | |
3553 | was used to store the correction, but since the expression is | |
3554 | not pcrel, I felt it would be confusing to do it this way. */ | |
94f592af | 3555 | * valP -= 1; |
a1cc9221 AO |
3556 | md_number_to_chars (buf, val, 4); |
3557 | break; | |
3558 | ||
9efb3b7b KK |
3559 | case BFD_RELOC_SH_TLS_GD_32: |
3560 | case BFD_RELOC_SH_TLS_LD_32: | |
3561 | case BFD_RELOC_SH_TLS_IE_32: | |
2bba4140 KK |
3562 | S_SET_THREAD_LOCAL (fixP->fx_addsy); |
3563 | /* Fallthrough */ | |
3564 | case BFD_RELOC_32_GOT_PCREL: | |
3565 | case BFD_RELOC_SH_GOTPLT32: | |
94f592af | 3566 | * valP = 0; /* Fully resolved at runtime. No addend. */ |
a1cc9221 AO |
3567 | md_number_to_chars (buf, 0, 4); |
3568 | break; | |
3569 | ||
9efb3b7b KK |
3570 | case BFD_RELOC_SH_TLS_LDO_32: |
3571 | case BFD_RELOC_SH_TLS_LE_32: | |
2bba4140 KK |
3572 | S_SET_THREAD_LOCAL (fixP->fx_addsy); |
3573 | /* Fallthrough */ | |
3574 | case BFD_RELOC_32_GOTOFF: | |
538cd60f | 3575 | md_number_to_chars (buf, val, 4); |
a1cc9221 AO |
3576 | break; |
3577 | #endif | |
3578 | ||
252b5132 | 3579 | default: |
324bfcf3 AO |
3580 | #ifdef HAVE_SH64 |
3581 | shmedia_md_apply_fix3 (fixP, valP); | |
3582 | return; | |
3583 | #else | |
252b5132 | 3584 | abort (); |
324bfcf3 | 3585 | #endif |
252b5132 RH |
3586 | } |
3587 | ||
3588 | if (shift != 0) | |
3589 | { | |
3590 | if ((val & ((1 << shift) - 1)) != 0) | |
3591 | as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); | |
3592 | if (val >= 0) | |
3593 | val >>= shift; | |
3594 | else | |
3595 | val = ((val >> shift) | |
3596 | | ((long) -1 & ~ ((long) -1 >> shift))); | |
3597 | } | |
3598 | if (max != 0 && (val < min || val > max)) | |
3599 | as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); | |
3600 | ||
94f592af NC |
3601 | if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) |
3602 | fixP->fx_done = 1; | |
252b5132 RH |
3603 | } |
3604 | ||
3605 | /* Called just before address relaxation. Return the length | |
3606 | by which a fragment must grow to reach it's destination. */ | |
3607 | ||
3608 | int | |
3609 | md_estimate_size_before_relax (fragP, segment_type) | |
3610 | register fragS *fragP; | |
3611 | register segT segment_type; | |
3612 | { | |
e66457fb AM |
3613 | int what; |
3614 | ||
252b5132 RH |
3615 | switch (fragP->fr_subtype) |
3616 | { | |
93c2a809 | 3617 | default: |
324bfcf3 AO |
3618 | #ifdef HAVE_SH64 |
3619 | return shmedia_md_estimate_size_before_relax (fragP, segment_type); | |
3620 | #else | |
93c2a809 | 3621 | abort (); |
324bfcf3 AO |
3622 | #endif |
3623 | ||
93c2a809 | 3624 | |
252b5132 | 3625 | case C (UNCOND_JUMP, UNDEF_DISP): |
6b31947e | 3626 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
3627 | if (!fragP->fr_symbol) |
3628 | { | |
3629 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
252b5132 RH |
3630 | } |
3631 | else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
3632 | { | |
3633 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
252b5132 RH |
3634 | } |
3635 | else | |
3636 | { | |
3637 | fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); | |
252b5132 RH |
3638 | } |
3639 | break; | |
3640 | ||
252b5132 RH |
3641 | case C (COND_JUMP, UNDEF_DISP): |
3642 | case C (COND_JUMP_DELAY, UNDEF_DISP): | |
e66457fb | 3643 | what = GET_WHAT (fragP->fr_subtype); |
6b31947e | 3644 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
3645 | if (fragP->fr_symbol |
3646 | && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
3647 | { | |
252b5132 | 3648 | /* Got a symbol and it's defined in this segment, become byte |
6b31947e | 3649 | sized - maybe it will fix up. */ |
252b5132 | 3650 | fragP->fr_subtype = C (what, COND8); |
252b5132 RH |
3651 | } |
3652 | else if (fragP->fr_symbol) | |
3653 | { | |
6b31947e | 3654 | /* Its got a segment, but its not ours, so it will always be long. */ |
252b5132 | 3655 | fragP->fr_subtype = C (what, UNDEF_WORD_DISP); |
252b5132 RH |
3656 | } |
3657 | else | |
3658 | { | |
6b31947e | 3659 | /* We know the abs value. */ |
252b5132 | 3660 | fragP->fr_subtype = C (what, COND8); |
252b5132 | 3661 | } |
93c2a809 | 3662 | break; |
252b5132 | 3663 | |
93c2a809 | 3664 | case C (UNCOND_JUMP, UNCOND12): |
e66457fb | 3665 | case C (UNCOND_JUMP, UNCOND32): |
93c2a809 AM |
3666 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): |
3667 | case C (COND_JUMP, COND8): | |
e66457fb AM |
3668 | case C (COND_JUMP, COND12): |
3669 | case C (COND_JUMP, COND32): | |
93c2a809 AM |
3670 | case C (COND_JUMP, UNDEF_WORD_DISP): |
3671 | case C (COND_JUMP_DELAY, COND8): | |
e66457fb AM |
3672 | case C (COND_JUMP_DELAY, COND12): |
3673 | case C (COND_JUMP_DELAY, COND32): | |
93c2a809 AM |
3674 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): |
3675 | /* When relaxing a section for the second time, we don't need to | |
e66457fb | 3676 | do anything besides return the current size. */ |
252b5132 RH |
3677 | break; |
3678 | } | |
e66457fb AM |
3679 | |
3680 | fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length; | |
252b5132 RH |
3681 | return fragP->fr_var; |
3682 | } | |
3683 | ||
6b31947e | 3684 | /* Put number into target byte order. */ |
252b5132 RH |
3685 | |
3686 | void | |
3687 | md_number_to_chars (ptr, use, nbytes) | |
3688 | char *ptr; | |
3689 | valueT use; | |
3690 | int nbytes; | |
3691 | { | |
324bfcf3 AO |
3692 | #ifdef HAVE_SH64 |
3693 | /* We might need to set the contents type to data. */ | |
3694 | sh64_flag_output (); | |
3695 | #endif | |
3696 | ||
252b5132 RH |
3697 | if (! target_big_endian) |
3698 | number_to_chars_littleendian (ptr, use, nbytes); | |
3699 | else | |
3700 | number_to_chars_bigendian (ptr, use, nbytes); | |
3701 | } | |
3702 | ||
cce5a618 NC |
3703 | /* This version is used in obj-coff.c when not using BFD_ASSEMBLER. |
3704 | eg for the sh-hms target. */ | |
3705 | ||
3706 | long | |
3707 | md_pcrel_from (fixP) | |
3708 | fixS *fixP; | |
3709 | { | |
3710 | return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; | |
3711 | } | |
3712 | ||
252b5132 | 3713 | long |
ef17112f | 3714 | md_pcrel_from_section (fixP, sec) |
252b5132 | 3715 | fixS *fixP; |
ef17112f | 3716 | segT sec; |
252b5132 | 3717 | { |
28602ebf KK |
3718 | if (! sh_local_pcrel (fixP) |
3719 | && fixP->fx_addsy != (symbolS *) NULL | |
ae6063d4 | 3720 | && (generic_force_reloc (fixP) |
ef17112f HPN |
3721 | || S_GET_SEGMENT (fixP->fx_addsy) != sec)) |
3722 | { | |
3723 | /* The symbol is undefined (or is defined but not in this section, | |
3724 | or we're not sure about it being the final definition). Let the | |
3725 | linker figure it out. We need to adjust the subtraction of a | |
3726 | symbol to the position of the relocated data, though. */ | |
3727 | return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0; | |
3728 | } | |
3729 | ||
cce5a618 | 3730 | return md_pcrel_from (fixP); |
252b5132 RH |
3731 | } |
3732 | ||
3733 | #ifdef OBJ_COFF | |
3734 | ||
3735 | int | |
3736 | tc_coff_sizemachdep (frag) | |
3737 | fragS *frag; | |
3738 | { | |
3739 | return md_relax_table[frag->fr_subtype].rlx_length; | |
3740 | } | |
3741 | ||
3742 | #endif /* OBJ_COFF */ | |
3743 | ||
252b5132 RH |
3744 | #ifndef BFD_ASSEMBLER |
3745 | #ifdef OBJ_COFF | |
3746 | ||
3747 | /* Map BFD relocs to SH COFF relocs. */ | |
3748 | ||
3749 | struct reloc_map | |
3750 | { | |
3751 | bfd_reloc_code_real_type bfd_reloc; | |
3752 | int sh_reloc; | |
3753 | }; | |
3754 | ||
3755 | static const struct reloc_map coff_reloc_map[] = | |
3756 | { | |
3757 | { BFD_RELOC_32, R_SH_IMM32 }, | |
3758 | { BFD_RELOC_16, R_SH_IMM16 }, | |
3759 | { BFD_RELOC_8, R_SH_IMM8 }, | |
3760 | { BFD_RELOC_SH_PCDISP8BY2, R_SH_PCDISP8BY2 }, | |
3761 | { BFD_RELOC_SH_PCDISP12BY2, R_SH_PCDISP }, | |
3762 | { BFD_RELOC_SH_IMM4, R_SH_IMM4 }, | |
3763 | { BFD_RELOC_SH_IMM4BY2, R_SH_IMM4BY2 }, | |
3764 | { BFD_RELOC_SH_IMM4BY4, R_SH_IMM4BY4 }, | |
3765 | { BFD_RELOC_SH_IMM8, R_SH_IMM8 }, | |
3766 | { BFD_RELOC_SH_IMM8BY2, R_SH_IMM8BY2 }, | |
3767 | { BFD_RELOC_SH_IMM8BY4, R_SH_IMM8BY4 }, | |
3768 | { BFD_RELOC_SH_PCRELIMM8BY2, R_SH_PCRELIMM8BY2 }, | |
3769 | { BFD_RELOC_SH_PCRELIMM8BY4, R_SH_PCRELIMM8BY4 }, | |
3770 | { BFD_RELOC_8_PCREL, R_SH_SWITCH8 }, | |
3771 | { BFD_RELOC_SH_SWITCH16, R_SH_SWITCH16 }, | |
3772 | { BFD_RELOC_SH_SWITCH32, R_SH_SWITCH32 }, | |
3773 | { BFD_RELOC_SH_USES, R_SH_USES }, | |
3774 | { BFD_RELOC_SH_COUNT, R_SH_COUNT }, | |
3775 | { BFD_RELOC_SH_ALIGN, R_SH_ALIGN }, | |
3776 | { BFD_RELOC_SH_CODE, R_SH_CODE }, | |
3777 | { BFD_RELOC_SH_DATA, R_SH_DATA }, | |
3778 | { BFD_RELOC_SH_LABEL, R_SH_LABEL }, | |
3779 | { BFD_RELOC_UNUSED, 0 } | |
3780 | }; | |
3781 | ||
3782 | /* Adjust a reloc for the SH. This is similar to the generic code, | |
3783 | but does some minor tweaking. */ | |
3784 | ||
3785 | void | |
3786 | sh_coff_reloc_mangle (seg, fix, intr, paddr) | |
3787 | segment_info_type *seg; | |
3788 | fixS *fix; | |
3789 | struct internal_reloc *intr; | |
3790 | unsigned int paddr; | |
3791 | { | |
3792 | symbolS *symbol_ptr = fix->fx_addsy; | |
3793 | symbolS *dot; | |
3794 | ||
3795 | intr->r_vaddr = paddr + fix->fx_frag->fr_address + fix->fx_where; | |
3796 | ||
3797 | if (! SWITCH_TABLE (fix)) | |
3798 | { | |
3799 | const struct reloc_map *rm; | |
3800 | ||
3801 | for (rm = coff_reloc_map; rm->bfd_reloc != BFD_RELOC_UNUSED; rm++) | |
3802 | if (rm->bfd_reloc == (bfd_reloc_code_real_type) fix->fx_r_type) | |
3803 | break; | |
3804 | if (rm->bfd_reloc == BFD_RELOC_UNUSED) | |
3805 | as_bad_where (fix->fx_file, fix->fx_line, | |
3806 | _("Can not represent %s relocation in this object file format"), | |
3807 | bfd_get_reloc_code_name (fix->fx_r_type)); | |
3808 | intr->r_type = rm->sh_reloc; | |
3809 | intr->r_offset = 0; | |
3810 | } | |
3811 | else | |
3812 | { | |
3813 | know (sh_relax); | |
3814 | ||
3815 | if (fix->fx_r_type == BFD_RELOC_16) | |
3816 | intr->r_type = R_SH_SWITCH16; | |
3817 | else if (fix->fx_r_type == BFD_RELOC_8) | |
3818 | intr->r_type = R_SH_SWITCH8; | |
3819 | else if (fix->fx_r_type == BFD_RELOC_32) | |
3820 | intr->r_type = R_SH_SWITCH32; | |
3821 | else | |
3822 | abort (); | |
3823 | ||
3824 | /* For a switch reloc, we set r_offset to the difference between | |
3825 | the reloc address and the subtrahend. When the linker is | |
3826 | doing relaxing, it can use the determine the starting and | |
3827 | ending points of the switch difference expression. */ | |
3828 | intr->r_offset = intr->r_vaddr - S_GET_VALUE (fix->fx_subsy); | |
3829 | } | |
3830 | ||
3831 | /* PC relative relocs are always against the current section. */ | |
3832 | if (symbol_ptr == NULL) | |
3833 | { | |
3834 | switch (fix->fx_r_type) | |
3835 | { | |
3836 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
3837 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
3838 | case BFD_RELOC_SH_PCDISP8BY2: | |
3839 | case BFD_RELOC_SH_PCDISP12BY2: | |
3840 | case BFD_RELOC_SH_USES: | |
3841 | symbol_ptr = seg->dot; | |
3842 | break; | |
3843 | default: | |
3844 | break; | |
3845 | } | |
3846 | } | |
3847 | ||
3848 | if (fix->fx_r_type == BFD_RELOC_SH_USES) | |
3849 | { | |
3850 | /* We can't store the offset in the object file, since this | |
3851 | reloc does not take up any space, so we store it in r_offset. | |
94f592af | 3852 | The fx_addnumber field was set in md_apply_fix3. */ |
252b5132 RH |
3853 | intr->r_offset = fix->fx_addnumber; |
3854 | } | |
3855 | else if (fix->fx_r_type == BFD_RELOC_SH_COUNT) | |
3856 | { | |
3857 | /* We can't store the count in the object file, since this reloc | |
3858 | does not take up any space, so we store it in r_offset. The | |
3859 | fx_offset field was set when the fixup was created in | |
3860 | sh_coff_frob_file. */ | |
3861 | intr->r_offset = fix->fx_offset; | |
3862 | /* This reloc is always absolute. */ | |
3863 | symbol_ptr = NULL; | |
3864 | } | |
3865 | else if (fix->fx_r_type == BFD_RELOC_SH_ALIGN) | |
3866 | { | |
3867 | /* Store the alignment in the r_offset field. */ | |
3868 | intr->r_offset = fix->fx_offset; | |
3869 | /* This reloc is always absolute. */ | |
3870 | symbol_ptr = NULL; | |
3871 | } | |
3872 | else if (fix->fx_r_type == BFD_RELOC_SH_CODE | |
3873 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
3874 | || fix->fx_r_type == BFD_RELOC_SH_LABEL) | |
3875 | { | |
3876 | /* These relocs are always absolute. */ | |
3877 | symbol_ptr = NULL; | |
3878 | } | |
3879 | ||
3880 | /* Turn the segment of the symbol into an offset. */ | |
3881 | if (symbol_ptr != NULL) | |
3882 | { | |
3883 | dot = segment_info[S_GET_SEGMENT (symbol_ptr)].dot; | |
3884 | if (dot != NULL) | |
3885 | intr->r_symndx = dot->sy_number; | |
3886 | else | |
3887 | intr->r_symndx = symbol_ptr->sy_number; | |
3888 | } | |
3889 | else | |
3890 | intr->r_symndx = -1; | |
3891 | } | |
3892 | ||
3893 | #endif /* OBJ_COFF */ | |
3894 | #endif /* ! BFD_ASSEMBLER */ | |
3895 | ||
3896 | #ifdef BFD_ASSEMBLER | |
3897 | ||
3898 | /* Create a reloc. */ | |
3899 | ||
3900 | arelent * | |
3901 | tc_gen_reloc (section, fixp) | |
43841e91 | 3902 | asection *section ATTRIBUTE_UNUSED; |
252b5132 RH |
3903 | fixS *fixp; |
3904 | { | |
3905 | arelent *rel; | |
3906 | bfd_reloc_code_real_type r_type; | |
3907 | ||
3908 | rel = (arelent *) xmalloc (sizeof (arelent)); | |
49309057 ILT |
3909 | rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
3910 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
252b5132 RH |
3911 | rel->address = fixp->fx_frag->fr_address + fixp->fx_where; |
3912 | ||
3913 | r_type = fixp->fx_r_type; | |
3914 | ||
3915 | if (SWITCH_TABLE (fixp)) | |
3916 | { | |
bdfaef52 JR |
3917 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy); |
3918 | rel->addend = 0; | |
252b5132 RH |
3919 | if (r_type == BFD_RELOC_16) |
3920 | r_type = BFD_RELOC_SH_SWITCH16; | |
3921 | else if (r_type == BFD_RELOC_8) | |
3922 | r_type = BFD_RELOC_8_PCREL; | |
3923 | else if (r_type == BFD_RELOC_32) | |
3924 | r_type = BFD_RELOC_SH_SWITCH32; | |
3925 | else | |
3926 | abort (); | |
3927 | } | |
3928 | else if (r_type == BFD_RELOC_SH_USES) | |
3929 | rel->addend = fixp->fx_addnumber; | |
3930 | else if (r_type == BFD_RELOC_SH_COUNT) | |
3931 | rel->addend = fixp->fx_offset; | |
3932 | else if (r_type == BFD_RELOC_SH_ALIGN) | |
3933 | rel->addend = fixp->fx_offset; | |
3934 | else if (r_type == BFD_RELOC_VTABLE_INHERIT | |
3935 | || r_type == BFD_RELOC_VTABLE_ENTRY) | |
3936 | rel->addend = fixp->fx_offset; | |
015551fc JR |
3937 | else if (r_type == BFD_RELOC_SH_LOOP_START |
3938 | || r_type == BFD_RELOC_SH_LOOP_END) | |
3939 | rel->addend = fixp->fx_offset; | |
3940 | else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel) | |
3941 | { | |
3942 | rel->addend = 0; | |
3943 | rel->address = rel->addend = fixp->fx_offset; | |
3944 | } | |
324bfcf3 AO |
3945 | #ifdef HAVE_SH64 |
3946 | else if (shmedia_init_reloc (rel, fixp)) | |
3947 | ; | |
3948 | #endif | |
252b5132 RH |
3949 | else if (fixp->fx_pcrel) |
3950 | rel->addend = fixp->fx_addnumber; | |
a1cc9221 AO |
3951 | else if (r_type == BFD_RELOC_32 || r_type == BFD_RELOC_32_GOTOFF) |
3952 | rel->addend = fixp->fx_addnumber; | |
252b5132 RH |
3953 | else |
3954 | rel->addend = 0; | |
3955 | ||
3956 | rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); | |
c861c80c | 3957 | #ifdef OBJ_ELF |
bdfaef52 JR |
3958 | if (rel->howto->type == R_SH_IND12W) |
3959 | rel->addend += fixp->fx_offset - 4; | |
c861c80c | 3960 | #endif |
a161fe53 | 3961 | if (rel->howto == NULL) |
252b5132 RH |
3962 | { |
3963 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
3964 | _("Cannot represent relocation type %s"), | |
3965 | bfd_get_reloc_code_name (r_type)); | |
3966 | /* Set howto to a garbage value so that we can keep going. */ | |
3967 | rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); | |
3968 | assert (rel->howto != NULL); | |
3969 | } | |
3970 | ||
3971 | return rel; | |
3972 | } | |
3973 | ||
538cd60f AO |
3974 | #ifdef OBJ_ELF |
3975 | inline static char * | |
3976 | sh_end_of_match (cont, what) | |
3977 | char *cont, *what; | |
3978 | { | |
3979 | int len = strlen (what); | |
3980 | ||
3981 | if (strncasecmp (cont, what, strlen (what)) == 0 | |
3982 | && ! is_part_of_name (cont[len])) | |
3983 | return cont + len; | |
3984 | ||
3985 | return NULL; | |
5d6255fe | 3986 | } |
538cd60f AO |
3987 | |
3988 | int | |
3989 | sh_parse_name (name, exprP, nextcharP) | |
3990 | char const *name; | |
3991 | expressionS *exprP; | |
3992 | char *nextcharP; | |
3993 | { | |
3994 | char *next = input_line_pointer; | |
3995 | char *next_end; | |
3996 | int reloc_type; | |
3997 | segT segment; | |
3998 | ||
3999 | exprP->X_op_symbol = NULL; | |
4000 | ||
4001 | if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) | |
4002 | { | |
4003 | if (! GOT_symbol) | |
4004 | GOT_symbol = symbol_find_or_make (name); | |
4005 | ||
4006 | exprP->X_add_symbol = GOT_symbol; | |
4007 | no_suffix: | |
4008 | /* If we have an absolute symbol or a reg, then we know its | |
4009 | value now. */ | |
4010 | segment = S_GET_SEGMENT (exprP->X_add_symbol); | |
4011 | if (segment == absolute_section) | |
4012 | { | |
4013 | exprP->X_op = O_constant; | |
4014 | exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); | |
4015 | exprP->X_add_symbol = NULL; | |
4016 | } | |
4017 | else if (segment == reg_section) | |
4018 | { | |
4019 | exprP->X_op = O_register; | |
4020 | exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); | |
4021 | exprP->X_add_symbol = NULL; | |
4022 | } | |
4023 | else | |
4024 | { | |
4025 | exprP->X_op = O_symbol; | |
4026 | exprP->X_add_number = 0; | |
4027 | } | |
4028 | ||
4029 | return 1; | |
4030 | } | |
4031 | ||
4032 | exprP->X_add_symbol = symbol_find_or_make (name); | |
5d6255fe | 4033 | |
538cd60f AO |
4034 | if (*nextcharP != '@') |
4035 | goto no_suffix; | |
4036 | else if ((next_end = sh_end_of_match (next + 1, "GOTOFF"))) | |
4037 | reloc_type = BFD_RELOC_32_GOTOFF; | |
324bfcf3 AO |
4038 | else if ((next_end = sh_end_of_match (next + 1, "GOTPLT"))) |
4039 | reloc_type = BFD_RELOC_SH_GOTPLT32; | |
538cd60f AO |
4040 | else if ((next_end = sh_end_of_match (next + 1, "GOT"))) |
4041 | reloc_type = BFD_RELOC_32_GOT_PCREL; | |
4042 | else if ((next_end = sh_end_of_match (next + 1, "PLT"))) | |
4043 | reloc_type = BFD_RELOC_32_PLT_PCREL; | |
9efb3b7b KK |
4044 | else if ((next_end = sh_end_of_match (next + 1, "TLSGD"))) |
4045 | reloc_type = BFD_RELOC_SH_TLS_GD_32; | |
4046 | else if ((next_end = sh_end_of_match (next + 1, "TLSLDM"))) | |
4047 | reloc_type = BFD_RELOC_SH_TLS_LD_32; | |
4048 | else if ((next_end = sh_end_of_match (next + 1, "GOTTPOFF"))) | |
4049 | reloc_type = BFD_RELOC_SH_TLS_IE_32; | |
4050 | else if ((next_end = sh_end_of_match (next + 1, "TPOFF"))) | |
4051 | reloc_type = BFD_RELOC_SH_TLS_LE_32; | |
4052 | else if ((next_end = sh_end_of_match (next + 1, "DTPOFF"))) | |
4053 | reloc_type = BFD_RELOC_SH_TLS_LDO_32; | |
538cd60f AO |
4054 | else |
4055 | goto no_suffix; | |
4056 | ||
4057 | *input_line_pointer = *nextcharP; | |
4058 | input_line_pointer = next_end; | |
4059 | *nextcharP = *input_line_pointer; | |
4060 | *input_line_pointer = '\0'; | |
4061 | ||
4062 | exprP->X_op = O_PIC_reloc; | |
4063 | exprP->X_add_number = 0; | |
4064 | exprP->X_md = reloc_type; | |
4065 | ||
4066 | return 1; | |
4067 | } | |
4068 | #endif | |
252b5132 | 4069 | #endif /* BFD_ASSEMBLER */ |