Commit | Line | Data |
---|---|---|
ef230218 | 1 | /* tc-sh.c -- Assemble code for the Renesas / SuperH SH |
b3adc24a | 2 | Copyright (C) 1993-2020 Free Software Foundation, Inc. |
252b5132 RH |
3 | |
4 | This file is part of GAS, the GNU Assembler. | |
5 | ||
6 | GAS is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
ec2655a6 | 8 | the Free Software Foundation; either version 3, or (at your option) |
252b5132 RH |
9 | any later version. |
10 | ||
11 | GAS is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GAS; see the file COPYING. If not, write to | |
4b4da160 NC |
18 | the Free Software Foundation, 51 Franklin Street - Fifth Floor, |
19 | Boston, MA 02110-1301, USA. */ | |
252b5132 | 20 | |
6b31947e | 21 | /* Written By Steve Chamberlain <sac@cygnus.com> */ |
252b5132 | 22 | |
252b5132 | 23 | #include "as.h" |
252b5132 RH |
24 | #include "subsegs.h" |
25 | #define DEFINE_TABLE | |
26 | #include "opcodes/sh-opc.h" | |
3882b010 | 27 | #include "safe-ctype.h" |
d4845d57 JR |
28 | |
29 | #ifdef OBJ_ELF | |
30 | #include "elf/sh.h" | |
31 | #endif | |
32 | ||
0d10e182 | 33 | #include "dwarf2dbg.h" |
2ce4cc60 | 34 | #include "dw2gencfi.h" |
0d10e182 | 35 | |
e08ae979 HPN |
36 | typedef struct |
37 | { | |
38 | sh_arg_type type; | |
39 | int reg; | |
40 | expressionS immediate; | |
41 | } | |
42 | sh_operand_info; | |
43 | ||
252b5132 RH |
44 | const char comment_chars[] = "!"; |
45 | const char line_separator_chars[] = ";"; | |
46 | const char line_comment_chars[] = "!#"; | |
47 | ||
8edc77b9 KK |
48 | static void s_uses (int); |
49 | static void s_uacons (int); | |
252b5132 | 50 | |
a1cc9221 | 51 | #ifdef OBJ_ELF |
8edc77b9 | 52 | static void sh_elf_cons (int); |
538cd60f | 53 | |
a1cc9221 AO |
54 | symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ |
55 | #endif | |
56 | ||
05982cac | 57 | static void |
8edc77b9 | 58 | big (int ignore ATTRIBUTE_UNUSED) |
05982cac HPN |
59 | { |
60 | if (! target_big_endian) | |
61 | as_bad (_("directive .big encountered when option -big required")); | |
62 | ||
63 | /* Stop further messages. */ | |
64 | target_big_endian = 1; | |
65 | } | |
252b5132 RH |
66 | |
67 | static void | |
8edc77b9 | 68 | little (int ignore ATTRIBUTE_UNUSED) |
252b5132 | 69 | { |
05982cac HPN |
70 | if (target_big_endian) |
71 | as_bad (_("directive .little encountered when option -little required")); | |
72 | ||
73 | /* Stop further messages. */ | |
252b5132 RH |
74 | target_big_endian = 0; |
75 | } | |
76 | ||
d4845d57 JR |
77 | /* This table describes all the machine specific pseudo-ops the assembler |
78 | has to support. The fields are: | |
79 | pseudo-op name without dot | |
80 | function to call to execute this pseudo-op | |
6b31947e | 81 | Integer arg to pass to the function. */ |
d4845d57 | 82 | |
252b5132 RH |
83 | const pseudo_typeS md_pseudo_table[] = |
84 | { | |
a1cc9221 AO |
85 | #ifdef OBJ_ELF |
86 | {"long", sh_elf_cons, 4}, | |
87 | {"int", sh_elf_cons, 4}, | |
88 | {"word", sh_elf_cons, 2}, | |
89 | {"short", sh_elf_cons, 2}, | |
90 | #else | |
252b5132 RH |
91 | {"int", cons, 4}, |
92 | {"word", cons, 2}, | |
a1cc9221 | 93 | #endif /* OBJ_ELF */ |
05982cac | 94 | {"big", big, 0}, |
252b5132 RH |
95 | {"form", listing_psize, 0}, |
96 | {"little", little, 0}, | |
97 | {"heading", listing_title, 0}, | |
98 | {"import", s_ignore, 0}, | |
99 | {"page", listing_eject, 0}, | |
100 | {"program", s_ignore, 0}, | |
101 | {"uses", s_uses, 0}, | |
102 | {"uaword", s_uacons, 2}, | |
103 | {"ualong", s_uacons, 4}, | |
de68de20 AO |
104 | {"uaquad", s_uacons, 8}, |
105 | {"2byte", s_uacons, 2}, | |
106 | {"4byte", s_uacons, 4}, | |
107 | {"8byte", s_uacons, 8}, | |
252b5132 RH |
108 | {0, 0, 0} |
109 | }; | |
110 | ||
252b5132 RH |
111 | int sh_relax; /* set if -relax seen */ |
112 | ||
113 | /* Whether -small was seen. */ | |
114 | ||
115 | int sh_small; | |
116 | ||
f55629b8 KK |
117 | /* Flag to generate relocations against symbol values for local symbols. */ |
118 | ||
119 | static int dont_adjust_reloc_32; | |
120 | ||
37dedf66 NC |
121 | /* Flag to indicate that '$' is allowed as a register prefix. */ |
122 | ||
123 | static int allow_dollar_register_prefix; | |
124 | ||
125 | /* Preset architecture set, if given; zero otherwise. */ | |
d4845d57 | 126 | |
f6f9408f | 127 | static unsigned int preset_target_arch; |
d4845d57 JR |
128 | |
129 | /* The bit mask of architectures that could | |
67c1ffbe | 130 | accommodate the insns seen so far. */ |
f6f9408f | 131 | static unsigned int valid_arch; |
d4845d57 | 132 | |
87975d2a | 133 | #ifdef OBJ_ELF |
8e45593f NC |
134 | /* Whether --fdpic was given. */ |
135 | static int sh_fdpic; | |
87975d2a | 136 | #endif |
8e45593f | 137 | |
252b5132 RH |
138 | const char EXP_CHARS[] = "eE"; |
139 | ||
6b31947e | 140 | /* Chars that mean this number is a floating point constant. */ |
252b5132 RH |
141 | /* As in 0f12.456 */ |
142 | /* or 0d1.2345e12 */ | |
143 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
144 | ||
145 | #define C(a,b) ENCODE_RELAX(a,b) | |
146 | ||
252b5132 RH |
147 | #define ENCODE_RELAX(what,length) (((what) << 4) + (length)) |
148 | #define GET_WHAT(x) ((x>>4)) | |
149 | ||
67c1ffbe | 150 | /* These are the three types of relaxable instruction. */ |
324bfcf3 AO |
151 | /* These are the types of relaxable instructions; except for END which is |
152 | a marker. */ | |
252b5132 RH |
153 | #define COND_JUMP 1 |
154 | #define COND_JUMP_DELAY 2 | |
155 | #define UNCOND_JUMP 3 | |
324bfcf3 | 156 | |
252b5132 RH |
157 | #define END 4 |
158 | ||
159 | #define UNDEF_DISP 0 | |
160 | #define COND8 1 | |
161 | #define COND12 2 | |
162 | #define COND32 3 | |
252b5132 RH |
163 | #define UNDEF_WORD_DISP 4 |
164 | ||
165 | #define UNCOND12 1 | |
166 | #define UNCOND32 2 | |
167 | ||
168 | /* Branch displacements are from the address of the branch plus | |
169 | four, thus all minimum and maximum values have 4 added to them. */ | |
170 | #define COND8_F 258 | |
171 | #define COND8_M -252 | |
172 | #define COND8_LENGTH 2 | |
173 | ||
174 | /* There is one extra instruction before the branch, so we must add | |
175 | two more bytes to account for it. */ | |
176 | #define COND12_F 4100 | |
177 | #define COND12_M -4090 | |
178 | #define COND12_LENGTH 6 | |
179 | ||
180 | #define COND12_DELAY_LENGTH 4 | |
181 | ||
182 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
183 | since this relocation type is not supported yet. */ | |
184 | #define COND32_F (1<<30) | |
185 | #define COND32_M -(1<<30) | |
186 | #define COND32_LENGTH 14 | |
187 | ||
188 | #define UNCOND12_F 4098 | |
189 | #define UNCOND12_M -4092 | |
190 | #define UNCOND12_LENGTH 2 | |
191 | ||
192 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
193 | since this relocation type is not supported yet. */ | |
194 | #define UNCOND32_F (1<<30) | |
195 | #define UNCOND32_M -(1<<30) | |
196 | #define UNCOND32_LENGTH 14 | |
197 | ||
43841e91 NC |
198 | #define EMPTY { 0, 0, 0, 0 } |
199 | ||
252b5132 | 200 | const relax_typeS md_relax_table[C (END, 0)] = { |
43841e91 NC |
201 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
202 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
252b5132 | 203 | |
43841e91 | 204 | EMPTY, |
252b5132 RH |
205 | /* C (COND_JUMP, COND8) */ |
206 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, | |
207 | /* C (COND_JUMP, COND12) */ | |
208 | { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, | |
209 | /* C (COND_JUMP, COND32) */ | |
210 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
e66457fb AM |
211 | /* C (COND_JUMP, UNDEF_WORD_DISP) */ |
212 | { 0, 0, COND32_LENGTH, 0, }, | |
213 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 214 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 | 215 | |
43841e91 | 216 | EMPTY, |
252b5132 RH |
217 | /* C (COND_JUMP_DELAY, COND8) */ |
218 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, | |
219 | /* C (COND_JUMP_DELAY, COND12) */ | |
220 | { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, | |
221 | /* C (COND_JUMP_DELAY, COND32) */ | |
222 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
e66457fb AM |
223 | /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */ |
224 | { 0, 0, COND32_LENGTH, 0, }, | |
225 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 226 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
252b5132 | 227 | |
43841e91 | 228 | EMPTY, |
252b5132 RH |
229 | /* C (UNCOND_JUMP, UNCOND12) */ |
230 | { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, | |
231 | /* C (UNCOND_JUMP, UNCOND32) */ | |
232 | { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, | |
e66457fb AM |
233 | EMPTY, |
234 | /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */ | |
235 | { 0, 0, UNCOND32_LENGTH, 0, }, | |
236 | EMPTY, EMPTY, EMPTY, | |
43841e91 | 237 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
324bfcf3 | 238 | |
252b5132 RH |
239 | }; |
240 | ||
43841e91 NC |
241 | #undef EMPTY |
242 | ||
252b5132 RH |
243 | static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ |
244 | ||
a1cc9221 AO |
245 | \f |
246 | #ifdef OBJ_ELF | |
33eaf5de | 247 | /* Determine whether the symbol needs any kind of PIC relocation. */ |
538cd60f AO |
248 | |
249 | inline static int | |
8edc77b9 | 250 | sh_PIC_related_p (symbolS *sym) |
a1cc9221 | 251 | { |
538cd60f | 252 | expressionS *exp; |
a1cc9221 | 253 | |
538cd60f AO |
254 | if (! sym) |
255 | return 0; | |
256 | ||
257 | if (sym == GOT_symbol) | |
258 | return 1; | |
259 | ||
260 | exp = symbol_get_value_expression (sym); | |
261 | ||
262 | return (exp->X_op == O_PIC_reloc | |
263 | || sh_PIC_related_p (exp->X_add_symbol) | |
264 | || sh_PIC_related_p (exp->X_op_symbol)); | |
265 | } | |
266 | ||
267 | /* Determine the relocation type to be used to represent the | |
268 | expression, that may be rearranged. */ | |
269 | ||
270 | static int | |
8edc77b9 | 271 | sh_check_fixup (expressionS *main_exp, bfd_reloc_code_real_type *r_type_p) |
538cd60f AO |
272 | { |
273 | expressionS *exp = main_exp; | |
274 | ||
275 | /* This is here for backward-compatibility only. GCC used to generated: | |
276 | ||
277 | f@PLT + . - (.LPCS# + 2) | |
278 | ||
279 | but we'd rather be able to handle this as a PIC-related reference | |
280 | plus/minus a symbol. However, gas' parser gives us: | |
281 | ||
282 | O_subtract (O_add (f@PLT, .), .LPCS#+2) | |
5d6255fe | 283 | |
538cd60f AO |
284 | so we attempt to transform this into: |
285 | ||
286 | O_subtract (f@PLT, O_subtract (.LPCS#+2, .)) | |
287 | ||
5d6255fe | 288 | which we can handle simply below. */ |
538cd60f AO |
289 | if (exp->X_op == O_subtract) |
290 | { | |
291 | if (sh_PIC_related_p (exp->X_op_symbol)) | |
292 | return 1; | |
293 | ||
294 | exp = symbol_get_value_expression (exp->X_add_symbol); | |
295 | ||
296 | if (exp && sh_PIC_related_p (exp->X_op_symbol)) | |
297 | return 1; | |
298 | ||
299 | if (exp && exp->X_op == O_add | |
300 | && sh_PIC_related_p (exp->X_add_symbol)) | |
301 | { | |
302 | symbolS *sym = exp->X_add_symbol; | |
303 | ||
304 | exp->X_op = O_subtract; | |
305 | exp->X_add_symbol = main_exp->X_op_symbol; | |
306 | ||
307 | main_exp->X_op_symbol = main_exp->X_add_symbol; | |
308 | main_exp->X_add_symbol = sym; | |
309 | ||
310 | main_exp->X_add_number += exp->X_add_number; | |
311 | exp->X_add_number = 0; | |
312 | } | |
313 | ||
314 | exp = main_exp; | |
315 | } | |
316 | else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol)) | |
317 | return 1; | |
318 | ||
319 | if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract) | |
320 | { | |
321 | if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) | |
322 | { | |
323 | *r_type_p = BFD_RELOC_SH_GOTPC; | |
324 | return 0; | |
325 | } | |
326 | exp = symbol_get_value_expression (exp->X_add_symbol); | |
327 | if (! exp) | |
328 | return 0; | |
329 | } | |
330 | ||
331 | if (exp->X_op == O_PIC_reloc) | |
332 | { | |
324bfcf3 AO |
333 | switch (*r_type_p) |
334 | { | |
335 | case BFD_RELOC_NONE: | |
336 | case BFD_RELOC_UNUSED: | |
337 | *r_type_p = exp->X_md; | |
338 | break; | |
339 | ||
8e45593f NC |
340 | case BFD_RELOC_SH_DISP20: |
341 | switch (exp->X_md) | |
342 | { | |
343 | case BFD_RELOC_32_GOT_PCREL: | |
344 | *r_type_p = BFD_RELOC_SH_GOT20; | |
345 | break; | |
346 | ||
347 | case BFD_RELOC_32_GOTOFF: | |
348 | *r_type_p = BFD_RELOC_SH_GOTOFF20; | |
349 | break; | |
350 | ||
351 | case BFD_RELOC_SH_GOTFUNCDESC: | |
352 | *r_type_p = BFD_RELOC_SH_GOTFUNCDESC20; | |
353 | break; | |
354 | ||
355 | case BFD_RELOC_SH_GOTOFFFUNCDESC: | |
356 | *r_type_p = BFD_RELOC_SH_GOTOFFFUNCDESC20; | |
357 | break; | |
358 | ||
359 | default: | |
360 | abort (); | |
361 | } | |
362 | break; | |
363 | ||
324bfcf3 AO |
364 | default: |
365 | abort (); | |
366 | } | |
538cd60f AO |
367 | if (exp == main_exp) |
368 | exp->X_op = O_symbol; | |
369 | else | |
370 | { | |
371 | main_exp->X_add_symbol = exp->X_add_symbol; | |
372 | main_exp->X_add_number += exp->X_add_number; | |
373 | } | |
374 | } | |
375 | else | |
376 | return (sh_PIC_related_p (exp->X_add_symbol) | |
377 | || sh_PIC_related_p (exp->X_op_symbol)); | |
378 | ||
379 | return 0; | |
380 | } | |
381 | ||
382 | /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */ | |
383 | ||
384 | void | |
62ebcb5c AM |
385 | sh_cons_fix_new (fragS *frag, int off, int size, expressionS *exp, |
386 | bfd_reloc_code_real_type r_type) | |
538cd60f | 387 | { |
62ebcb5c | 388 | r_type = BFD_RELOC_UNUSED; |
538cd60f AO |
389 | |
390 | if (sh_check_fixup (exp, &r_type)) | |
391 | as_bad (_("Invalid PIC expression.")); | |
392 | ||
393 | if (r_type == BFD_RELOC_UNUSED) | |
394 | switch (size) | |
a1cc9221 | 395 | { |
538cd60f AO |
396 | case 1: |
397 | r_type = BFD_RELOC_8; | |
398 | break; | |
a1cc9221 | 399 | |
538cd60f AO |
400 | case 2: |
401 | r_type = BFD_RELOC_16; | |
402 | break; | |
403 | ||
404 | case 4: | |
405 | r_type = BFD_RELOC_32; | |
406 | break; | |
a1cc9221 | 407 | |
324bfcf3 AO |
408 | case 8: |
409 | r_type = BFD_RELOC_64; | |
410 | break; | |
324bfcf3 | 411 | |
538cd60f AO |
412 | default: |
413 | goto error; | |
414 | } | |
415 | else if (size != 4) | |
416 | { | |
417 | error: | |
418 | as_bad (_("unsupported BFD relocation size %u"), size); | |
419 | r_type = BFD_RELOC_UNUSED; | |
420 | } | |
5d6255fe | 421 | |
538cd60f | 422 | fix_new_exp (frag, off, size, exp, 0, r_type); |
a1cc9221 AO |
423 | } |
424 | ||
425 | /* The regular cons() function, that reads constants, doesn't support | |
426 | suffixes such as @GOT, @GOTOFF and @PLT, that generate | |
427 | machine-specific relocation types. So we must define it here. */ | |
428 | /* Clobbers input_line_pointer, checks end-of-line. */ | |
8edc77b9 | 429 | /* NBYTES 1=.byte, 2=.word, 4=.long */ |
a1cc9221 | 430 | static void |
ed9e98c2 | 431 | sh_elf_cons (int nbytes) |
a1cc9221 | 432 | { |
538cd60f | 433 | expressionS exp; |
a1cc9221 AO |
434 | |
435 | if (is_it_end_of_statement ()) | |
436 | { | |
437 | demand_empty_rest_of_line (); | |
438 | return; | |
439 | } | |
440 | ||
028f09bd NC |
441 | #ifdef md_cons_align |
442 | md_cons_align (nbytes); | |
443 | #endif | |
444 | ||
a1cc9221 AO |
445 | do |
446 | { | |
447 | expression (&exp); | |
538cd60f | 448 | emit_expr (&exp, (unsigned int) nbytes); |
a1cc9221 AO |
449 | } |
450 | while (*input_line_pointer++ == ','); | |
451 | ||
81d4177b | 452 | input_line_pointer--; /* Put terminator back into stream. */ |
a1cc9221 AO |
453 | if (*input_line_pointer == '#' || *input_line_pointer == '!') |
454 | { | |
dda5ecfc | 455 | while (! is_end_of_line[(unsigned char) *input_line_pointer++]); |
a1cc9221 AO |
456 | } |
457 | else | |
458 | demand_empty_rest_of_line (); | |
459 | } | |
0cc34095 KK |
460 | |
461 | /* The regular frag_offset_fixed_p doesn't work for rs_align_test | |
462 | frags. */ | |
463 | ||
464 | static bfd_boolean | |
465 | align_test_frag_offset_fixed_p (const fragS *frag1, const fragS *frag2, | |
466 | bfd_vma *offset) | |
467 | { | |
468 | const fragS *frag; | |
469 | bfd_vma off; | |
470 | ||
471 | /* Start with offset initialised to difference between the two frags. | |
472 | Prior to assigning frag addresses this will be zero. */ | |
473 | off = frag1->fr_address - frag2->fr_address; | |
474 | if (frag1 == frag2) | |
475 | { | |
476 | *offset = off; | |
477 | return TRUE; | |
478 | } | |
479 | ||
480 | /* Maybe frag2 is after frag1. */ | |
481 | frag = frag1; | |
0838d2ac KK |
482 | while (frag->fr_type == rs_fill |
483 | || frag->fr_type == rs_align_test) | |
0cc34095 | 484 | { |
0838d2ac KK |
485 | if (frag->fr_type == rs_fill) |
486 | off += frag->fr_fix + frag->fr_offset * frag->fr_var; | |
487 | else | |
488 | off += frag->fr_fix; | |
0cc34095 KK |
489 | frag = frag->fr_next; |
490 | if (frag == NULL) | |
491 | break; | |
492 | if (frag == frag2) | |
493 | { | |
494 | *offset = off; | |
495 | return TRUE; | |
496 | } | |
497 | } | |
498 | ||
499 | /* Maybe frag1 is after frag2. */ | |
500 | off = frag1->fr_address - frag2->fr_address; | |
501 | frag = frag2; | |
0838d2ac KK |
502 | while (frag->fr_type == rs_fill |
503 | || frag->fr_type == rs_align_test) | |
0cc34095 | 504 | { |
0838d2ac KK |
505 | if (frag->fr_type == rs_fill) |
506 | off -= frag->fr_fix + frag->fr_offset * frag->fr_var; | |
507 | else | |
508 | off -= frag->fr_fix; | |
0cc34095 KK |
509 | frag = frag->fr_next; |
510 | if (frag == NULL) | |
511 | break; | |
512 | if (frag == frag1) | |
513 | { | |
514 | *offset = off; | |
515 | return TRUE; | |
516 | } | |
517 | } | |
518 | ||
519 | return FALSE; | |
520 | } | |
a1cc9221 | 521 | |
0cc34095 KK |
522 | /* Optimize a difference of symbols which have rs_align_test frag if |
523 | possible. */ | |
524 | ||
525 | int | |
526 | sh_optimize_expr (expressionS *l, operatorT op, expressionS *r) | |
527 | { | |
0cc34095 KK |
528 | bfd_vma frag_off; |
529 | ||
530 | if (op == O_subtract | |
531 | && l->X_op == O_symbol | |
532 | && r->X_op == O_symbol | |
533 | && S_GET_SEGMENT (l->X_add_symbol) == S_GET_SEGMENT (r->X_add_symbol) | |
534 | && (SEG_NORMAL (S_GET_SEGMENT (l->X_add_symbol)) | |
535 | || r->X_add_symbol == l->X_add_symbol) | |
536 | && align_test_frag_offset_fixed_p (symbol_get_frag (l->X_add_symbol), | |
537 | symbol_get_frag (r->X_add_symbol), | |
538 | &frag_off)) | |
539 | { | |
4455e9ad JB |
540 | offsetT symval_diff = S_GET_VALUE (l->X_add_symbol) |
541 | - S_GET_VALUE (r->X_add_symbol); | |
542 | subtract_from_result (l, r->X_add_number, r->X_extrabit); | |
543 | subtract_from_result (l, frag_off / OCTETS_PER_BYTE, 0); | |
544 | add_to_result (l, symval_diff, symval_diff < 0); | |
0cc34095 KK |
545 | l->X_op = O_constant; |
546 | l->X_add_symbol = 0; | |
547 | return 1; | |
548 | } | |
0cc34095 KK |
549 | return 0; |
550 | } | |
541d2ffd | 551 | #endif /* OBJ_ELF */ |
a1cc9221 | 552 | \f |
6b31947e NC |
553 | /* This function is called once, at assembler startup time. This should |
554 | set up all the tables, etc that the MD part of the assembler needs. */ | |
252b5132 RH |
555 | |
556 | void | |
8edc77b9 | 557 | md_begin (void) |
252b5132 | 558 | { |
5ff37431 | 559 | const sh_opcode_info *opcode; |
e0471c16 | 560 | const char *prev_name = ""; |
f6f9408f | 561 | unsigned int target_arch; |
252b5132 | 562 | |
bdfaef52 | 563 | target_arch |
e38bc3b5 | 564 | = preset_target_arch ? preset_target_arch : arch_sh_up & ~arch_sh_has_dsp; |
d4845d57 JR |
565 | valid_arch = target_arch; |
566 | ||
252b5132 RH |
567 | opcode_hash_control = hash_new (); |
568 | ||
6b31947e | 569 | /* Insert unique names into hash table. */ |
252b5132 RH |
570 | for (opcode = sh_table; opcode->name; opcode++) |
571 | { | |
5ff37431 | 572 | if (strcmp (prev_name, opcode->name) != 0) |
252b5132 | 573 | { |
f6f9408f | 574 | if (!SH_MERGE_ARCH_SET_VALID (opcode->arch, target_arch)) |
a37c8f88 | 575 | continue; |
252b5132 RH |
576 | prev_name = opcode->name; |
577 | hash_insert (opcode_hash_control, opcode->name, (char *) opcode); | |
578 | } | |
252b5132 RH |
579 | } |
580 | } | |
581 | ||
582 | static int reg_m; | |
583 | static int reg_n; | |
d4845d57 JR |
584 | static int reg_x, reg_y; |
585 | static int reg_efg; | |
252b5132 RH |
586 | static int reg_b; |
587 | ||
3882b010 | 588 | #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_') |
dead1419 | 589 | |
6b31947e NC |
590 | /* Try to parse a reg name. Return the number of chars consumed. */ |
591 | ||
37dedf66 | 592 | static unsigned int |
c4212e11 | 593 | parse_reg_without_prefix (char *src, sh_arg_type *mode, int *reg) |
252b5132 | 594 | { |
3882b010 L |
595 | char l0 = TOLOWER (src[0]); |
596 | char l1 = l0 ? TOLOWER (src[1]) : 0; | |
e46fee70 | 597 | |
dead1419 | 598 | /* We use ! IDENT_CHAR for the next character after the register name, to |
252b5132 | 599 | make sure that we won't accidentally recognize a symbol name such as |
dead1419 | 600 | 'sram' or sr_ram as being a reference to the register 'sr'. */ |
252b5132 | 601 | |
e46fee70 | 602 | if (l0 == 'r') |
252b5132 | 603 | { |
e46fee70 | 604 | if (l1 == '1') |
d4845d57 JR |
605 | { |
606 | if (src[2] >= '0' && src[2] <= '5' | |
dead1419 | 607 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
608 | { |
609 | *mode = A_REG_N; | |
610 | *reg = 10 + src[2] - '0'; | |
611 | return 3; | |
612 | } | |
613 | } | |
e46fee70 | 614 | if (l1 >= '0' && l1 <= '9' |
dead1419 | 615 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
616 | { |
617 | *mode = A_REG_N; | |
e46fee70 | 618 | *reg = (l1 - '0'); |
d4845d57 JR |
619 | return 2; |
620 | } | |
e46fee70 | 621 | if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0 |
dead1419 JR |
622 | && ! IDENT_CHAR ((unsigned char) src[7])) |
623 | { | |
624 | *mode = A_REG_B; | |
e46fee70 | 625 | *reg = (l1 - '0'); |
dead1419 JR |
626 | return 7; |
627 | } | |
d4845d57 | 628 | |
e46fee70 | 629 | if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
630 | { |
631 | *mode = A_RE; | |
632 | return 2; | |
633 | } | |
e46fee70 | 634 | if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
635 | { |
636 | *mode = A_RS; | |
637 | return 2; | |
638 | } | |
252b5132 RH |
639 | } |
640 | ||
e46fee70 | 641 | if (l0 == 'a') |
252b5132 | 642 | { |
e46fee70 | 643 | if (l1 == '0') |
d4845d57 | 644 | { |
dead1419 | 645 | if (! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
646 | { |
647 | *mode = DSP_REG_N; | |
648 | *reg = A_A0_NUM; | |
649 | return 2; | |
650 | } | |
3882b010 | 651 | if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
652 | { |
653 | *mode = DSP_REG_N; | |
654 | *reg = A_A0G_NUM; | |
655 | return 3; | |
656 | } | |
657 | } | |
e46fee70 | 658 | if (l1 == '1') |
252b5132 | 659 | { |
dead1419 | 660 | if (! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 661 | { |
d4845d57 JR |
662 | *mode = DSP_REG_N; |
663 | *reg = A_A1_NUM; | |
664 | return 2; | |
665 | } | |
3882b010 | 666 | if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
667 | { |
668 | *mode = DSP_REG_N; | |
669 | *reg = A_A1G_NUM; | |
252b5132 RH |
670 | return 3; |
671 | } | |
672 | } | |
d4845d57 | 673 | |
e46fee70 | 674 | if (l1 == 'x' && src[2] >= '0' && src[2] <= '1' |
dead1419 | 675 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
676 | { |
677 | *mode = A_REG_N; | |
e46fee70 | 678 | *reg = 4 + (l1 - '0'); |
d4845d57 JR |
679 | return 3; |
680 | } | |
e46fee70 | 681 | if (l1 == 'y' && src[2] >= '0' && src[2] <= '1' |
dead1419 | 682 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
683 | { |
684 | *mode = A_REG_N; | |
e46fee70 | 685 | *reg = 6 + (l1 - '0'); |
d4845d57 JR |
686 | return 3; |
687 | } | |
e46fee70 | 688 | if (l1 == 's' && src[2] >= '0' && src[2] <= '3' |
dead1419 | 689 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 | 690 | { |
e46fee70 | 691 | int n = l1 - '0'; |
d4845d57 JR |
692 | |
693 | *mode = A_REG_N; | |
694 | *reg = n | ((~n & 2) << 1); | |
695 | return 3; | |
696 | } | |
697 | } | |
698 | ||
912a07db | 699 | if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 | 700 | { |
e46fee70 | 701 | if (l1 == 's') |
d4845d57 JR |
702 | { |
703 | *mode = A_REG_N; | |
704 | *reg = 8; | |
252b5132 RH |
705 | return 2; |
706 | } | |
e46fee70 | 707 | if (l1 == 'x') |
d4845d57 JR |
708 | { |
709 | *mode = A_REG_N; | |
710 | *reg = 8; | |
711 | return 2; | |
712 | } | |
e46fee70 | 713 | if (l1 == 'y') |
d4845d57 JR |
714 | { |
715 | *mode = A_REG_N; | |
716 | *reg = 9; | |
717 | return 2; | |
718 | } | |
719 | } | |
720 | ||
e46fee70 | 721 | if (l0 == 'x' && l1 >= '0' && l1 <= '1' |
dead1419 | 722 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
723 | { |
724 | *mode = DSP_REG_N; | |
e46fee70 | 725 | *reg = A_X0_NUM + l1 - '0'; |
d4845d57 JR |
726 | return 2; |
727 | } | |
728 | ||
e46fee70 | 729 | if (l0 == 'y' && l1 >= '0' && l1 <= '1' |
dead1419 | 730 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
731 | { |
732 | *mode = DSP_REG_N; | |
e46fee70 | 733 | *reg = A_Y0_NUM + l1 - '0'; |
d4845d57 JR |
734 | return 2; |
735 | } | |
736 | ||
e46fee70 | 737 | if (l0 == 'm' && l1 >= '0' && l1 <= '1' |
dead1419 | 738 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
739 | { |
740 | *mode = DSP_REG_N; | |
e46fee70 | 741 | *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM; |
d4845d57 | 742 | return 2; |
252b5132 RH |
743 | } |
744 | ||
e46fee70 HPN |
745 | if (l0 == 's' |
746 | && l1 == 's' | |
3882b010 | 747 | && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
748 | { |
749 | *mode = A_SSR; | |
750 | return 3; | |
751 | } | |
752 | ||
3882b010 | 753 | if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c' |
dead1419 | 754 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
755 | { |
756 | *mode = A_SPC; | |
757 | return 3; | |
758 | } | |
759 | ||
3882b010 | 760 | if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r' |
dead1419 | 761 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
762 | { |
763 | *mode = A_SGR; | |
764 | return 3; | |
765 | } | |
766 | ||
3882b010 | 767 | if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r' |
dead1419 | 768 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
769 | { |
770 | *mode = A_DSR; | |
771 | return 3; | |
772 | } | |
773 | ||
3882b010 | 774 | if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 775 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
776 | { |
777 | *mode = A_DBR; | |
778 | return 3; | |
779 | } | |
780 | ||
e46fee70 | 781 | if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
782 | { |
783 | *mode = A_SR; | |
784 | return 2; | |
785 | } | |
786 | ||
e46fee70 | 787 | if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
788 | { |
789 | *mode = A_REG_N; | |
790 | *reg = 15; | |
791 | return 2; | |
792 | } | |
793 | ||
e46fee70 | 794 | if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
795 | { |
796 | *mode = A_PR; | |
797 | return 2; | |
798 | } | |
e46fee70 | 799 | if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 800 | { |
015551fc JR |
801 | /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0' |
802 | and use an uninitialized immediate. */ | |
803 | *mode = A_PC; | |
252b5132 RH |
804 | return 2; |
805 | } | |
3882b010 | 806 | if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 807 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
808 | { |
809 | *mode = A_GBR; | |
810 | return 3; | |
811 | } | |
3882b010 | 812 | if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
dead1419 | 813 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
814 | { |
815 | *mode = A_VBR; | |
816 | return 3; | |
817 | } | |
818 | ||
1d70c7fb AO |
819 | if (l0 == 't' && l1 == 'b' && TOLOWER (src[2]) == 'r' |
820 | && ! IDENT_CHAR ((unsigned char) src[3])) | |
821 | { | |
822 | *mode = A_TBR; | |
823 | return 3; | |
824 | } | |
3882b010 | 825 | if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c' |
dead1419 | 826 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 | 827 | { |
3882b010 | 828 | if (TOLOWER (src[3]) == 'l') |
252b5132 RH |
829 | { |
830 | *mode = A_MACL; | |
831 | return 4; | |
832 | } | |
3882b010 | 833 | if (TOLOWER (src[3]) == 'h') |
252b5132 RH |
834 | { |
835 | *mode = A_MACH; | |
836 | return 4; | |
837 | } | |
838 | } | |
3882b010 | 839 | if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd' |
912a07db | 840 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
841 | { |
842 | *mode = A_MOD; | |
843 | return 3; | |
844 | } | |
e46fee70 | 845 | if (l0 == 'f' && l1 == 'r') |
252b5132 RH |
846 | { |
847 | if (src[2] == '1') | |
848 | { | |
849 | if (src[3] >= '0' && src[3] <= '5' | |
dead1419 | 850 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
851 | { |
852 | *mode = F_REG_N; | |
853 | *reg = 10 + src[3] - '0'; | |
854 | return 4; | |
855 | } | |
856 | } | |
857 | if (src[2] >= '0' && src[2] <= '9' | |
dead1419 | 858 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
859 | { |
860 | *mode = F_REG_N; | |
861 | *reg = (src[2] - '0'); | |
862 | return 3; | |
863 | } | |
864 | } | |
e46fee70 | 865 | if (l0 == 'd' && l1 == 'r') |
252b5132 RH |
866 | { |
867 | if (src[2] == '1') | |
868 | { | |
869 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 870 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
871 | { |
872 | *mode = D_REG_N; | |
873 | *reg = 10 + src[3] - '0'; | |
874 | return 4; | |
875 | } | |
876 | } | |
877 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 878 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
879 | { |
880 | *mode = D_REG_N; | |
881 | *reg = (src[2] - '0'); | |
882 | return 3; | |
883 | } | |
884 | } | |
e46fee70 | 885 | if (l0 == 'x' && l1 == 'd') |
252b5132 RH |
886 | { |
887 | if (src[2] == '1') | |
888 | { | |
889 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 890 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
891 | { |
892 | *mode = X_REG_N; | |
893 | *reg = 11 + src[3] - '0'; | |
894 | return 4; | |
895 | } | |
896 | } | |
897 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 898 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
899 | { |
900 | *mode = X_REG_N; | |
901 | *reg = (src[2] - '0') + 1; | |
902 | return 3; | |
903 | } | |
904 | } | |
e46fee70 | 905 | if (l0 == 'f' && l1 == 'v') |
252b5132 | 906 | { |
dead1419 | 907 | if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
908 | { |
909 | *mode = V_REG_N; | |
910 | *reg = 12; | |
911 | return 4; | |
912 | } | |
913 | if ((src[2] == '0' || src[2] == '4' || src[2] == '8') | |
dead1419 | 914 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
915 | { |
916 | *mode = V_REG_N; | |
917 | *reg = (src[2] - '0'); | |
918 | return 3; | |
919 | } | |
920 | } | |
3882b010 L |
921 | if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u' |
922 | && TOLOWER (src[3]) == 'l' | |
dead1419 | 923 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
924 | { |
925 | *mode = FPUL_N; | |
926 | return 4; | |
927 | } | |
928 | ||
3882b010 L |
929 | if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's' |
930 | && TOLOWER (src[3]) == 'c' | |
931 | && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5])) | |
252b5132 RH |
932 | { |
933 | *mode = FPSCR_N; | |
934 | return 5; | |
935 | } | |
936 | ||
3882b010 L |
937 | if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't' |
938 | && TOLOWER (src[3]) == 'r' | |
939 | && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5])) | |
252b5132 RH |
940 | { |
941 | *mode = XMTRX_M4; | |
942 | return 5; | |
943 | } | |
944 | ||
945 | return 0; | |
946 | } | |
947 | ||
37dedf66 NC |
948 | /* Like parse_reg_without_prefix, but this version supports |
949 | $-prefixed register names if enabled by the user. */ | |
950 | ||
951 | static unsigned int | |
c4212e11 | 952 | parse_reg (char *src, sh_arg_type *mode, int *reg) |
37dedf66 NC |
953 | { |
954 | unsigned int prefix; | |
955 | unsigned int consumed; | |
956 | ||
957 | if (src[0] == '$') | |
958 | { | |
959 | if (allow_dollar_register_prefix) | |
960 | { | |
961 | src ++; | |
962 | prefix = 1; | |
963 | } | |
964 | else | |
965 | return 0; | |
966 | } | |
967 | else | |
968 | prefix = 0; | |
3739860c | 969 | |
37dedf66 NC |
970 | consumed = parse_reg_without_prefix (src, mode, reg); |
971 | ||
972 | if (consumed == 0) | |
973 | return 0; | |
974 | ||
975 | return consumed + prefix; | |
976 | } | |
977 | ||
c4aa876b | 978 | static char * |
8edc77b9 | 979 | parse_exp (char *s, sh_operand_info *op) |
252b5132 RH |
980 | { |
981 | char *save; | |
d3ce72d0 | 982 | char *new_pointer; |
252b5132 RH |
983 | |
984 | save = input_line_pointer; | |
985 | input_line_pointer = s; | |
015551fc JR |
986 | expression (&op->immediate); |
987 | if (op->immediate.X_op == O_absent) | |
252b5132 | 988 | as_bad (_("missing operand")); |
d3ce72d0 | 989 | new_pointer = input_line_pointer; |
252b5132 | 990 | input_line_pointer = save; |
d3ce72d0 | 991 | return new_pointer; |
252b5132 RH |
992 | } |
993 | ||
252b5132 RH |
994 | /* The many forms of operand: |
995 | ||
996 | Rn Register direct | |
997 | @Rn Register indirect | |
998 | @Rn+ Autoincrement | |
999 | @-Rn Autodecrement | |
1000 | @(disp:4,Rn) | |
1001 | @(disp:8,GBR) | |
1002 | @(disp:8,PC) | |
1003 | ||
1004 | @(R0,Rn) | |
1005 | @(R0,GBR) | |
1006 | ||
1007 | disp:8 | |
1008 | disp:12 | |
1009 | #imm8 | |
1010 | pr, gbr, vbr, macl, mach | |
252b5132 RH |
1011 | */ |
1012 | ||
c4aa876b | 1013 | static char * |
8edc77b9 | 1014 | parse_at (char *src, sh_operand_info *op) |
252b5132 RH |
1015 | { |
1016 | int len; | |
c4212e11 | 1017 | sh_arg_type mode; |
252b5132 | 1018 | src++; |
1d70c7fb AO |
1019 | if (src[0] == '@') |
1020 | { | |
1021 | src = parse_at (src, op); | |
1022 | if (op->type == A_DISP_TBR) | |
1023 | op->type = A_DISP2_TBR; | |
1024 | else | |
1025 | as_bad (_("illegal double indirection")); | |
1026 | } | |
1027 | else if (src[0] == '-') | |
252b5132 | 1028 | { |
6b31947e | 1029 | /* Must be predecrement. */ |
252b5132 RH |
1030 | src++; |
1031 | ||
1032 | len = parse_reg (src, &mode, &(op->reg)); | |
1033 | if (mode != A_REG_N) | |
1034 | as_bad (_("illegal register after @-")); | |
1035 | ||
1036 | op->type = A_DEC_N; | |
1037 | src += len; | |
1038 | } | |
1039 | else if (src[0] == '(') | |
1040 | { | |
1041 | /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or | |
8d4d84c2 | 1042 | @(r0, rn). */ |
252b5132 RH |
1043 | src++; |
1044 | len = parse_reg (src, &mode, &(op->reg)); | |
1045 | if (len && mode == A_REG_N) | |
1046 | { | |
1047 | src += len; | |
1048 | if (op->reg != 0) | |
1049 | { | |
1050 | as_bad (_("must be @(r0,...)")); | |
1051 | } | |
1052 | if (src[0] == ',') | |
252b5132 | 1053 | { |
8d4d84c2 AO |
1054 | src++; |
1055 | /* Now can be rn or gbr. */ | |
1056 | len = parse_reg (src, &mode, &(op->reg)); | |
1057 | } | |
1058 | else | |
1059 | { | |
1060 | len = 0; | |
252b5132 | 1061 | } |
8d4d84c2 | 1062 | if (len) |
252b5132 | 1063 | { |
8d4d84c2 AO |
1064 | if (mode == A_GBR) |
1065 | { | |
1066 | op->type = A_R0_GBR; | |
1067 | } | |
1068 | else if (mode == A_REG_N) | |
1069 | { | |
1070 | op->type = A_IND_R0_REG_N; | |
1071 | } | |
1072 | else | |
1073 | { | |
1074 | as_bad (_("syntax error in @(r0,...)")); | |
1075 | } | |
252b5132 RH |
1076 | } |
1077 | else | |
1078 | { | |
8d4d84c2 | 1079 | as_bad (_("syntax error in @(r0...)")); |
252b5132 RH |
1080 | } |
1081 | } | |
1082 | else | |
1083 | { | |
8d4d84c2 | 1084 | /* Must be an @(disp,.. thing). */ |
015551fc | 1085 | src = parse_exp (src, op); |
252b5132 RH |
1086 | if (src[0] == ',') |
1087 | src++; | |
8d4d84c2 | 1088 | /* Now can be rn, gbr or pc. */ |
252b5132 RH |
1089 | len = parse_reg (src, &mode, &op->reg); |
1090 | if (len) | |
1091 | { | |
1092 | if (mode == A_REG_N) | |
1093 | { | |
1094 | op->type = A_DISP_REG_N; | |
1095 | } | |
1096 | else if (mode == A_GBR) | |
1097 | { | |
1098 | op->type = A_DISP_GBR; | |
1099 | } | |
1d70c7fb AO |
1100 | else if (mode == A_TBR) |
1101 | { | |
1102 | op->type = A_DISP_TBR; | |
1103 | } | |
015551fc | 1104 | else if (mode == A_PC) |
252b5132 | 1105 | { |
dbb4348d JR |
1106 | /* We want @(expr, pc) to uniformly address . + expr, |
1107 | no matter if expr is a constant, or a more complex | |
1108 | expression, e.g. sym-. or sym1-sym2. | |
1109 | However, we also used to accept @(sym,pc) | |
67c1ffbe | 1110 | as addressing sym, i.e. meaning the same as plain sym. |
dbb4348d JR |
1111 | Some existing code does use the @(sym,pc) syntax, so |
1112 | we give it the old semantics for now, but warn about | |
1113 | its use, so that users have some time to fix their code. | |
1114 | ||
1115 | Note that due to this backward compatibility hack, | |
1116 | we'll get unexpected results when @(offset, pc) is used, | |
1117 | and offset is a symbol that is set later to an an address | |
1118 | difference, or an external symbol that is set to an | |
1119 | address difference in another source file, so we want to | |
1120 | eventually remove it. */ | |
9691d64f JR |
1121 | if (op->immediate.X_op == O_symbol) |
1122 | { | |
1123 | op->type = A_DISP_PC; | |
1124 | as_warn (_("Deprecated syntax.")); | |
1125 | } | |
1126 | else | |
1127 | { | |
1128 | op->type = A_DISP_PC_ABS; | |
1129 | /* Such operands don't get corrected for PC==.+4, so | |
1130 | make the correction here. */ | |
1131 | op->immediate.X_add_number -= 4; | |
1132 | } | |
252b5132 RH |
1133 | } |
1134 | else | |
1135 | { | |
1136 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
1137 | } | |
1138 | } | |
1139 | else | |
1140 | { | |
1141 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
1142 | } | |
1143 | } | |
1144 | src += len; | |
1145 | if (src[0] != ')') | |
1146 | as_bad (_("expecting )")); | |
1147 | else | |
1148 | src++; | |
1149 | } | |
1150 | else | |
1151 | { | |
1152 | src += parse_reg (src, &mode, &(op->reg)); | |
1153 | if (mode != A_REG_N) | |
006299d3 NC |
1154 | as_bad (_("illegal register after @")); |
1155 | ||
252b5132 RH |
1156 | if (src[0] == '+') |
1157 | { | |
1000a02a NC |
1158 | char l0, l1; |
1159 | ||
252b5132 | 1160 | src++; |
1000a02a NC |
1161 | l0 = TOLOWER (src[0]); |
1162 | l1 = TOLOWER (src[1]); | |
1163 | ||
1164 | if ((l0 == 'r' && l1 == '8') | |
1165 | || (l0 == 'i' && (l1 == 'x' || l1 == 's'))) | |
d4845d57 JR |
1166 | { |
1167 | src += 2; | |
88da98f3 | 1168 | op->type = AX_PMOD_N; |
d4845d57 | 1169 | } |
006299d3 NC |
1170 | else if ( (l0 == 'r' && l1 == '9') |
1171 | || (l0 == 'i' && l1 == 'y')) | |
d4845d57 JR |
1172 | { |
1173 | src += 2; | |
88da98f3 | 1174 | op->type = AY_PMOD_N; |
d4845d57 JR |
1175 | } |
1176 | else | |
1177 | op->type = A_INC_N; | |
252b5132 RH |
1178 | } |
1179 | else | |
006299d3 | 1180 | op->type = A_IND_N; |
252b5132 RH |
1181 | } |
1182 | return src; | |
1183 | } | |
1184 | ||
1185 | static void | |
8edc77b9 | 1186 | get_operand (char **ptr, sh_operand_info *op) |
252b5132 RH |
1187 | { |
1188 | char *src = *ptr; | |
c4212e11 | 1189 | sh_arg_type mode = (sh_arg_type) -1; |
252b5132 RH |
1190 | unsigned int len; |
1191 | ||
1192 | if (src[0] == '#') | |
1193 | { | |
1194 | src++; | |
015551fc | 1195 | *ptr = parse_exp (src, op); |
252b5132 RH |
1196 | op->type = A_IMM; |
1197 | return; | |
1198 | } | |
1199 | ||
1200 | else if (src[0] == '@') | |
1201 | { | |
1202 | *ptr = parse_at (src, op); | |
1203 | return; | |
1204 | } | |
1205 | len = parse_reg (src, &mode, &(op->reg)); | |
1206 | if (len) | |
1207 | { | |
1208 | *ptr = src + len; | |
1209 | op->type = mode; | |
1210 | return; | |
1211 | } | |
1212 | else | |
1213 | { | |
6b31947e | 1214 | /* Not a reg, the only thing left is a displacement. */ |
015551fc | 1215 | *ptr = parse_exp (src, op); |
252b5132 RH |
1216 | op->type = A_DISP_PC; |
1217 | return; | |
1218 | } | |
1219 | } | |
1220 | ||
c4aa876b | 1221 | static char * |
8edc77b9 | 1222 | get_operands (sh_opcode_info *info, char *args, sh_operand_info *operand) |
252b5132 RH |
1223 | { |
1224 | char *ptr = args; | |
1225 | if (info->arg[0]) | |
1226 | { | |
d4845d57 JR |
1227 | /* The pre-processor will eliminate whitespace in front of '@' |
1228 | after the first argument; we may be called multiple times | |
1229 | from assemble_ppi, so don't insist on finding whitespace here. */ | |
1230 | if (*ptr == ' ') | |
1231 | ptr++; | |
252b5132 RH |
1232 | |
1233 | get_operand (&ptr, operand + 0); | |
1234 | if (info->arg[1]) | |
1235 | { | |
1236 | if (*ptr == ',') | |
1237 | { | |
1238 | ptr++; | |
1239 | } | |
1240 | get_operand (&ptr, operand + 1); | |
52ccafd0 JR |
1241 | /* ??? Hack: psha/pshl have a varying operand number depending on |
1242 | the type of the first operand. We handle this by having the | |
1243 | three-operand version first and reducing the number of operands | |
1244 | parsed to two if we see that the first operand is an immediate. | |
1245 | This works because no insn with three operands has an immediate | |
1246 | as first operand. */ | |
1247 | if (info->arg[2] && operand[0].type != A_IMM) | |
252b5132 RH |
1248 | { |
1249 | if (*ptr == ',') | |
1250 | { | |
1251 | ptr++; | |
1252 | } | |
1253 | get_operand (&ptr, operand + 2); | |
1254 | } | |
1255 | else | |
1256 | { | |
1257 | operand[2].type = 0; | |
1258 | } | |
1259 | } | |
1260 | else | |
1261 | { | |
1262 | operand[1].type = 0; | |
1263 | operand[2].type = 0; | |
1264 | } | |
1265 | } | |
1266 | else | |
1267 | { | |
1268 | operand[0].type = 0; | |
1269 | operand[1].type = 0; | |
1270 | operand[2].type = 0; | |
1271 | } | |
1272 | return ptr; | |
1273 | } | |
1274 | ||
1275 | /* Passed a pointer to a list of opcodes which use different | |
1276 | addressing modes, return the opcode which matches the opcodes | |
6b31947e | 1277 | provided. */ |
252b5132 | 1278 | |
c4aa876b | 1279 | static sh_opcode_info * |
8edc77b9 | 1280 | get_specific (sh_opcode_info *opcode, sh_operand_info *operands) |
252b5132 RH |
1281 | { |
1282 | sh_opcode_info *this_try = opcode; | |
f86f5863 | 1283 | const char *name = opcode->name; |
252b5132 | 1284 | int n = 0; |
c4aa876b | 1285 | |
252b5132 RH |
1286 | while (opcode->name) |
1287 | { | |
1288 | this_try = opcode++; | |
5ff37431 | 1289 | if ((this_try->name != name) && (strcmp (this_try->name, name) != 0)) |
252b5132 RH |
1290 | { |
1291 | /* We've looked so far down the table that we've run out of | |
6b31947e | 1292 | opcodes with the same name. */ |
252b5132 RH |
1293 | return 0; |
1294 | } | |
c4aa876b | 1295 | |
6b31947e | 1296 | /* Look at both operands needed by the opcodes and provided by |
252b5132 RH |
1297 | the user - since an arg test will often fail on the same arg |
1298 | again and again, we'll try and test the last failing arg the | |
6b31947e | 1299 | first on each opcode try. */ |
252b5132 RH |
1300 | for (n = 0; this_try->arg[n]; n++) |
1301 | { | |
1302 | sh_operand_info *user = operands + n; | |
1303 | sh_arg_type arg = this_try->arg[n]; | |
c4aa876b | 1304 | |
252b5132 RH |
1305 | switch (arg) |
1306 | { | |
7679ead9 AO |
1307 | case A_DISP_PC: |
1308 | if (user->type == A_DISP_PC_ABS) | |
1309 | break; | |
1310 | /* Fall through. */ | |
252b5132 RH |
1311 | case A_IMM: |
1312 | case A_BDISP12: | |
1313 | case A_BDISP8: | |
1314 | case A_DISP_GBR: | |
1d70c7fb | 1315 | case A_DISP2_TBR: |
252b5132 RH |
1316 | case A_MACH: |
1317 | case A_PR: | |
1318 | case A_MACL: | |
1319 | if (user->type != arg) | |
1320 | goto fail; | |
1321 | break; | |
1322 | case A_R0: | |
1323 | /* opcode needs r0 */ | |
1324 | if (user->type != A_REG_N || user->reg != 0) | |
1325 | goto fail; | |
1326 | break; | |
1327 | case A_R0_GBR: | |
1328 | if (user->type != A_R0_GBR || user->reg != 0) | |
1329 | goto fail; | |
1330 | break; | |
1331 | case F_FR0: | |
1332 | if (user->type != F_REG_N || user->reg != 0) | |
1333 | goto fail; | |
1334 | break; | |
1335 | ||
1336 | case A_REG_N: | |
1337 | case A_INC_N: | |
1338 | case A_DEC_N: | |
1339 | case A_IND_N: | |
1340 | case A_IND_R0_REG_N: | |
1341 | case A_DISP_REG_N: | |
1342 | case F_REG_N: | |
1343 | case D_REG_N: | |
1344 | case X_REG_N: | |
1345 | case V_REG_N: | |
1346 | case FPUL_N: | |
1347 | case FPSCR_N: | |
d4845d57 | 1348 | case DSP_REG_N: |
252b5132 RH |
1349 | /* Opcode needs rn */ |
1350 | if (user->type != arg) | |
1351 | goto fail; | |
1352 | reg_n = user->reg; | |
1353 | break; | |
252b5132 RH |
1354 | case DX_REG_N: |
1355 | if (user->type != D_REG_N && user->type != X_REG_N) | |
1356 | goto fail; | |
1357 | reg_n = user->reg; | |
1358 | break; | |
1359 | case A_GBR: | |
1d70c7fb | 1360 | case A_TBR: |
252b5132 RH |
1361 | case A_SR: |
1362 | case A_VBR: | |
d4845d57 JR |
1363 | case A_DSR: |
1364 | case A_MOD: | |
1365 | case A_RE: | |
1366 | case A_RS: | |
252b5132 RH |
1367 | case A_SSR: |
1368 | case A_SPC: | |
1369 | case A_SGR: | |
1370 | case A_DBR: | |
1371 | if (user->type != arg) | |
1372 | goto fail; | |
1373 | break; | |
1374 | ||
c4aa876b | 1375 | case A_REG_B: |
252b5132 RH |
1376 | if (user->type != arg) |
1377 | goto fail; | |
1378 | reg_b = user->reg; | |
1379 | break; | |
1380 | ||
1d70c7fb AO |
1381 | case A_INC_R15: |
1382 | if (user->type != A_INC_N) | |
1383 | goto fail; | |
1384 | if (user->reg != 15) | |
1385 | goto fail; | |
1386 | reg_n = user->reg; | |
1387 | break; | |
1388 | ||
1389 | case A_DEC_R15: | |
1390 | if (user->type != A_DEC_N) | |
1391 | goto fail; | |
1392 | if (user->reg != 15) | |
1393 | goto fail; | |
1394 | reg_n = user->reg; | |
1395 | break; | |
1396 | ||
252b5132 RH |
1397 | case A_REG_M: |
1398 | case A_INC_M: | |
1399 | case A_DEC_M: | |
1400 | case A_IND_M: | |
1401 | case A_IND_R0_REG_M: | |
1402 | case A_DISP_REG_M: | |
d4845d57 | 1403 | case DSP_REG_M: |
252b5132 RH |
1404 | /* Opcode needs rn */ |
1405 | if (user->type != arg - A_REG_M + A_REG_N) | |
1406 | goto fail; | |
1407 | reg_m = user->reg; | |
1408 | break; | |
1409 | ||
88da98f3 MS |
1410 | case AS_DEC_N: |
1411 | if (user->type != A_DEC_N) | |
1412 | goto fail; | |
1413 | if (user->reg < 2 || user->reg > 5) | |
1414 | goto fail; | |
1415 | reg_n = user->reg; | |
1416 | break; | |
13ef8878 | 1417 | |
88da98f3 MS |
1418 | case AS_INC_N: |
1419 | if (user->type != A_INC_N) | |
1420 | goto fail; | |
1421 | if (user->reg < 2 || user->reg > 5) | |
1422 | goto fail; | |
1423 | reg_n = user->reg; | |
1424 | break; | |
13ef8878 | 1425 | |
88da98f3 MS |
1426 | case AS_IND_N: |
1427 | if (user->type != A_IND_N) | |
1428 | goto fail; | |
1429 | if (user->reg < 2 || user->reg > 5) | |
1430 | goto fail; | |
1431 | reg_n = user->reg; | |
1432 | break; | |
13ef8878 | 1433 | |
88da98f3 MS |
1434 | case AS_PMOD_N: |
1435 | if (user->type != AX_PMOD_N) | |
1436 | goto fail; | |
1437 | if (user->reg < 2 || user->reg > 5) | |
1438 | goto fail; | |
1439 | reg_n = user->reg; | |
1440 | break; | |
13ef8878 | 1441 | |
88da98f3 MS |
1442 | case AX_INC_N: |
1443 | if (user->type != A_INC_N) | |
1444 | goto fail; | |
1445 | if (user->reg < 4 || user->reg > 5) | |
1446 | goto fail; | |
1447 | reg_n = user->reg; | |
1448 | break; | |
13ef8878 | 1449 | |
88da98f3 MS |
1450 | case AX_IND_N: |
1451 | if (user->type != A_IND_N) | |
1452 | goto fail; | |
1453 | if (user->reg < 4 || user->reg > 5) | |
1454 | goto fail; | |
1455 | reg_n = user->reg; | |
1456 | break; | |
13ef8878 | 1457 | |
88da98f3 MS |
1458 | case AX_PMOD_N: |
1459 | if (user->type != AX_PMOD_N) | |
1460 | goto fail; | |
1461 | if (user->reg < 4 || user->reg > 5) | |
1462 | goto fail; | |
1463 | reg_n = user->reg; | |
1464 | break; | |
13ef8878 | 1465 | |
88da98f3 MS |
1466 | case AXY_INC_N: |
1467 | if (user->type != A_INC_N) | |
1468 | goto fail; | |
1469 | if ((user->reg < 4 || user->reg > 5) | |
1470 | && (user->reg < 0 || user->reg > 1)) | |
1471 | goto fail; | |
1472 | reg_n = user->reg; | |
1473 | break; | |
13ef8878 | 1474 | |
88da98f3 MS |
1475 | case AXY_IND_N: |
1476 | if (user->type != A_IND_N) | |
1477 | goto fail; | |
1478 | if ((user->reg < 4 || user->reg > 5) | |
1479 | && (user->reg < 0 || user->reg > 1)) | |
1480 | goto fail; | |
1481 | reg_n = user->reg; | |
1482 | break; | |
13ef8878 | 1483 | |
88da98f3 MS |
1484 | case AXY_PMOD_N: |
1485 | if (user->type != AX_PMOD_N) | |
1486 | goto fail; | |
1487 | if ((user->reg < 4 || user->reg > 5) | |
1488 | && (user->reg < 0 || user->reg > 1)) | |
1489 | goto fail; | |
1490 | reg_n = user->reg; | |
1491 | break; | |
13ef8878 | 1492 | |
88da98f3 MS |
1493 | case AY_INC_N: |
1494 | if (user->type != A_INC_N) | |
1495 | goto fail; | |
1496 | if (user->reg < 6 || user->reg > 7) | |
1497 | goto fail; | |
1498 | reg_n = user->reg; | |
1499 | break; | |
13ef8878 | 1500 | |
88da98f3 MS |
1501 | case AY_IND_N: |
1502 | if (user->type != A_IND_N) | |
1503 | goto fail; | |
1504 | if (user->reg < 6 || user->reg > 7) | |
1505 | goto fail; | |
1506 | reg_n = user->reg; | |
1507 | break; | |
13ef8878 | 1508 | |
88da98f3 MS |
1509 | case AY_PMOD_N: |
1510 | if (user->type != AY_PMOD_N) | |
1511 | goto fail; | |
1512 | if (user->reg < 6 || user->reg > 7) | |
1513 | goto fail; | |
1514 | reg_n = user->reg; | |
1515 | break; | |
1516 | ||
1517 | case AYX_INC_N: | |
1518 | if (user->type != A_INC_N) | |
1519 | goto fail; | |
1520 | if ((user->reg < 6 || user->reg > 7) | |
1521 | && (user->reg < 2 || user->reg > 3)) | |
1522 | goto fail; | |
1523 | reg_n = user->reg; | |
1524 | break; | |
13ef8878 | 1525 | |
88da98f3 MS |
1526 | case AYX_IND_N: |
1527 | if (user->type != A_IND_N) | |
1528 | goto fail; | |
1529 | if ((user->reg < 6 || user->reg > 7) | |
1530 | && (user->reg < 2 || user->reg > 3)) | |
1531 | goto fail; | |
1532 | reg_n = user->reg; | |
1533 | break; | |
13ef8878 | 1534 | |
88da98f3 MS |
1535 | case AYX_PMOD_N: |
1536 | if (user->type != AY_PMOD_N) | |
1537 | goto fail; | |
1538 | if ((user->reg < 6 || user->reg > 7) | |
1539 | && (user->reg < 2 || user->reg > 3)) | |
1540 | goto fail; | |
1541 | reg_n = user->reg; | |
1542 | break; | |
1543 | ||
1544 | case DSP_REG_A_M: | |
1545 | if (user->type != DSP_REG_N) | |
1546 | goto fail; | |
1547 | if (user->reg != A_A0_NUM | |
1548 | && user->reg != A_A1_NUM) | |
1549 | goto fail; | |
1550 | reg_m = user->reg; | |
1551 | break; | |
1552 | ||
1553 | case DSP_REG_AX: | |
1554 | if (user->type != DSP_REG_N) | |
1555 | goto fail; | |
1556 | switch (user->reg) | |
1557 | { | |
1558 | case A_A0_NUM: | |
1559 | reg_x = 0; | |
1560 | break; | |
1561 | case A_A1_NUM: | |
1562 | reg_x = 2; | |
1563 | break; | |
1564 | case A_X0_NUM: | |
1565 | reg_x = 1; | |
1566 | break; | |
1567 | case A_X1_NUM: | |
1568 | reg_x = 3; | |
1569 | break; | |
1570 | default: | |
1571 | goto fail; | |
1572 | } | |
1573 | break; | |
1574 | ||
1575 | case DSP_REG_XY: | |
1576 | if (user->type != DSP_REG_N) | |
1577 | goto fail; | |
1578 | switch (user->reg) | |
1579 | { | |
1580 | case A_X0_NUM: | |
1581 | reg_x = 0; | |
1582 | break; | |
1583 | case A_X1_NUM: | |
1584 | reg_x = 2; | |
1585 | break; | |
1586 | case A_Y0_NUM: | |
1587 | reg_x = 1; | |
1588 | break; | |
1589 | case A_Y1_NUM: | |
1590 | reg_x = 3; | |
1591 | break; | |
1592 | default: | |
1593 | goto fail; | |
1594 | } | |
1595 | break; | |
1596 | ||
1597 | case DSP_REG_AY: | |
1598 | if (user->type != DSP_REG_N) | |
1599 | goto fail; | |
1600 | switch (user->reg) | |
1601 | { | |
1602 | case A_A0_NUM: | |
1603 | reg_y = 0; | |
1604 | break; | |
1605 | case A_A1_NUM: | |
1606 | reg_y = 1; | |
1607 | break; | |
1608 | case A_Y0_NUM: | |
1609 | reg_y = 2; | |
1610 | break; | |
1611 | case A_Y1_NUM: | |
1612 | reg_y = 3; | |
1613 | break; | |
1614 | default: | |
1615 | goto fail; | |
1616 | } | |
1617 | break; | |
1618 | ||
1619 | case DSP_REG_YX: | |
1620 | if (user->type != DSP_REG_N) | |
1621 | goto fail; | |
1622 | switch (user->reg) | |
1623 | { | |
1624 | case A_Y0_NUM: | |
1625 | reg_y = 0; | |
1626 | break; | |
1627 | case A_Y1_NUM: | |
1628 | reg_y = 1; | |
1629 | break; | |
1630 | case A_X0_NUM: | |
1631 | reg_y = 2; | |
1632 | break; | |
1633 | case A_X1_NUM: | |
1634 | reg_y = 3; | |
1635 | break; | |
1636 | default: | |
1637 | goto fail; | |
1638 | } | |
1639 | break; | |
1640 | ||
d4845d57 JR |
1641 | case DSP_REG_X: |
1642 | if (user->type != DSP_REG_N) | |
1643 | goto fail; | |
1644 | switch (user->reg) | |
1645 | { | |
1646 | case A_X0_NUM: | |
1647 | reg_x = 0; | |
1648 | break; | |
1649 | case A_X1_NUM: | |
1650 | reg_x = 1; | |
1651 | break; | |
1652 | case A_A0_NUM: | |
1653 | reg_x = 2; | |
1654 | break; | |
1655 | case A_A1_NUM: | |
1656 | reg_x = 3; | |
1657 | break; | |
1658 | default: | |
1659 | goto fail; | |
1660 | } | |
1661 | break; | |
1662 | ||
1663 | case DSP_REG_Y: | |
1664 | if (user->type != DSP_REG_N) | |
1665 | goto fail; | |
1666 | switch (user->reg) | |
1667 | { | |
1668 | case A_Y0_NUM: | |
1669 | reg_y = 0; | |
1670 | break; | |
1671 | case A_Y1_NUM: | |
1672 | reg_y = 1; | |
1673 | break; | |
1674 | case A_M0_NUM: | |
1675 | reg_y = 2; | |
1676 | break; | |
1677 | case A_M1_NUM: | |
1678 | reg_y = 3; | |
1679 | break; | |
1680 | default: | |
1681 | goto fail; | |
1682 | } | |
1683 | break; | |
1684 | ||
1685 | case DSP_REG_E: | |
1686 | if (user->type != DSP_REG_N) | |
1687 | goto fail; | |
1688 | switch (user->reg) | |
1689 | { | |
1690 | case A_X0_NUM: | |
1691 | reg_efg = 0 << 10; | |
1692 | break; | |
1693 | case A_X1_NUM: | |
1694 | reg_efg = 1 << 10; | |
1695 | break; | |
1696 | case A_Y0_NUM: | |
1697 | reg_efg = 2 << 10; | |
1698 | break; | |
1699 | case A_A1_NUM: | |
1700 | reg_efg = 3 << 10; | |
1701 | break; | |
1702 | default: | |
1703 | goto fail; | |
1704 | } | |
1705 | break; | |
1706 | ||
1707 | case DSP_REG_F: | |
1708 | if (user->type != DSP_REG_N) | |
1709 | goto fail; | |
1710 | switch (user->reg) | |
1711 | { | |
1712 | case A_Y0_NUM: | |
1713 | reg_efg |= 0 << 8; | |
1714 | break; | |
1715 | case A_Y1_NUM: | |
1716 | reg_efg |= 1 << 8; | |
1717 | break; | |
1718 | case A_X0_NUM: | |
1719 | reg_efg |= 2 << 8; | |
1720 | break; | |
1721 | case A_A1_NUM: | |
1722 | reg_efg |= 3 << 8; | |
1723 | break; | |
1724 | default: | |
1725 | goto fail; | |
1726 | } | |
1727 | break; | |
1728 | ||
1729 | case DSP_REG_G: | |
1730 | if (user->type != DSP_REG_N) | |
1731 | goto fail; | |
1732 | switch (user->reg) | |
1733 | { | |
1734 | case A_M0_NUM: | |
1735 | reg_efg |= 0 << 2; | |
1736 | break; | |
1737 | case A_M1_NUM: | |
1738 | reg_efg |= 1 << 2; | |
1739 | break; | |
1740 | case A_A0_NUM: | |
1741 | reg_efg |= 2 << 2; | |
1742 | break; | |
1743 | case A_A1_NUM: | |
1744 | reg_efg |= 3 << 2; | |
1745 | break; | |
1746 | default: | |
1747 | goto fail; | |
1748 | } | |
1749 | break; | |
1750 | ||
1751 | case A_A0: | |
1752 | if (user->type != DSP_REG_N || user->reg != A_A0_NUM) | |
1753 | goto fail; | |
1754 | break; | |
1755 | case A_X0: | |
1756 | if (user->type != DSP_REG_N || user->reg != A_X0_NUM) | |
1757 | goto fail; | |
1758 | break; | |
1759 | case A_X1: | |
1760 | if (user->type != DSP_REG_N || user->reg != A_X1_NUM) | |
1761 | goto fail; | |
1762 | break; | |
1763 | case A_Y0: | |
1764 | if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) | |
1765 | goto fail; | |
1766 | break; | |
1767 | case A_Y1: | |
1768 | if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) | |
1769 | goto fail; | |
1770 | break; | |
1771 | ||
252b5132 RH |
1772 | case F_REG_M: |
1773 | case D_REG_M: | |
1774 | case X_REG_M: | |
1775 | case V_REG_M: | |
1776 | case FPUL_M: | |
1777 | case FPSCR_M: | |
1778 | /* Opcode needs rn */ | |
1779 | if (user->type != arg - F_REG_M + F_REG_N) | |
1780 | goto fail; | |
1781 | reg_m = user->reg; | |
1782 | break; | |
1783 | case DX_REG_M: | |
1784 | if (user->type != D_REG_N && user->type != X_REG_N) | |
1785 | goto fail; | |
1786 | reg_m = user->reg; | |
1787 | break; | |
1788 | case XMTRX_M4: | |
1789 | if (user->type != XMTRX_M4) | |
1790 | goto fail; | |
1791 | reg_m = 4; | |
1792 | break; | |
c4aa876b | 1793 | |
252b5132 RH |
1794 | default: |
1795 | printf (_("unhandled %d\n"), arg); | |
1796 | goto fail; | |
1797 | } | |
772657e9 AS |
1798 | if (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh2a_nofpu_up) |
1799 | && ( arg == A_DISP_REG_M | |
1800 | || arg == A_DISP_REG_N)) | |
1801 | { | |
1802 | /* Check a few key IMM* fields for overflow. */ | |
1803 | int opf; | |
1804 | long val = user->immediate.X_add_number; | |
1805 | ||
1806 | for (opf = 0; opf < 4; opf ++) | |
1807 | switch (this_try->nibbles[opf]) | |
1808 | { | |
1809 | case IMM0_4: | |
1810 | case IMM1_4: | |
1811 | if (val < 0 || val > 15) | |
1812 | goto fail; | |
1813 | break; | |
1814 | case IMM0_4BY2: | |
1815 | case IMM1_4BY2: | |
1816 | if (val < 0 || val > 15 * 2) | |
1817 | goto fail; | |
1818 | break; | |
1819 | case IMM0_4BY4: | |
1820 | case IMM1_4BY4: | |
1821 | if (val < 0 || val > 15 * 4) | |
1822 | goto fail; | |
1823 | break; | |
1824 | default: | |
1825 | break; | |
1826 | } | |
1827 | } | |
252b5132 | 1828 | } |
f6f9408f | 1829 | if ( !SH_MERGE_ARCH_SET_VALID (valid_arch, this_try->arch)) |
a37c8f88 | 1830 | goto fail; |
f6f9408f | 1831 | valid_arch = SH_MERGE_ARCH_SET (valid_arch, this_try->arch); |
252b5132 | 1832 | return this_try; |
c4aa876b NC |
1833 | fail: |
1834 | ; | |
252b5132 RH |
1835 | } |
1836 | ||
1837 | return 0; | |
1838 | } | |
1839 | ||
252b5132 | 1840 | static void |
c4212e11 TS |
1841 | insert (char *where, bfd_reloc_code_real_type how, int pcrel, |
1842 | sh_operand_info *op) | |
252b5132 RH |
1843 | { |
1844 | fix_new_exp (frag_now, | |
1845 | where - frag_now->fr_literal, | |
1846 | 2, | |
015551fc | 1847 | &op->immediate, |
252b5132 RH |
1848 | pcrel, |
1849 | how); | |
1850 | } | |
1851 | ||
1d70c7fb | 1852 | static void |
c4212e11 TS |
1853 | insert4 (char * where, bfd_reloc_code_real_type how, int pcrel, |
1854 | sh_operand_info * op) | |
1d70c7fb AO |
1855 | { |
1856 | fix_new_exp (frag_now, | |
1857 | where - frag_now->fr_literal, | |
1858 | 4, | |
1859 | & op->immediate, | |
1860 | pcrel, | |
1861 | how); | |
1862 | } | |
252b5132 | 1863 | static void |
8edc77b9 | 1864 | build_relax (sh_opcode_info *opcode, sh_operand_info *op) |
252b5132 RH |
1865 | { |
1866 | int high_byte = target_big_endian ? 0 : 1; | |
1867 | char *p; | |
1868 | ||
1869 | if (opcode->arg[0] == A_BDISP8) | |
1870 | { | |
1871 | int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; | |
1872 | p = frag_var (rs_machine_dependent, | |
1873 | md_relax_table[C (what, COND32)].rlx_length, | |
1874 | md_relax_table[C (what, COND8)].rlx_length, | |
1875 | C (what, 0), | |
015551fc JR |
1876 | op->immediate.X_add_symbol, |
1877 | op->immediate.X_add_number, | |
252b5132 RH |
1878 | 0); |
1879 | p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); | |
1880 | } | |
1881 | else if (opcode->arg[0] == A_BDISP12) | |
1882 | { | |
1883 | p = frag_var (rs_machine_dependent, | |
1884 | md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, | |
1885 | md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, | |
1886 | C (UNCOND_JUMP, 0), | |
015551fc JR |
1887 | op->immediate.X_add_symbol, |
1888 | op->immediate.X_add_number, | |
252b5132 RH |
1889 | 0); |
1890 | p[high_byte] = (opcode->nibbles[0] << 4); | |
1891 | } | |
1892 | ||
1893 | } | |
1894 | ||
6b31947e | 1895 | /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */ |
d67b5d6d | 1896 | |
015551fc | 1897 | static char * |
8edc77b9 | 1898 | insert_loop_bounds (char *output, sh_operand_info *operand) |
015551fc | 1899 | { |
015551fc JR |
1900 | symbolS *end_sym; |
1901 | ||
1902 | /* Since the low byte of the opcode will be overwritten by the reloc, we | |
1903 | can just stash the high byte into both bytes and ignore endianness. */ | |
1904 | output[0] = 0x8c; | |
1905 | output[1] = 0x8c; | |
1906 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
1907 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
1908 | ||
1909 | if (sh_relax) | |
1910 | { | |
1911 | static int count = 0; | |
e1fa0163 | 1912 | char name[11]; |
8d1015a8 | 1913 | expressionS *symval; |
015551fc JR |
1914 | |
1915 | /* If the last loop insn is a two-byte-insn, it is in danger of being | |
1916 | swapped with the insn after it. To prevent this, create a new | |
1917 | symbol - complete with SH_LABEL reloc - after the last loop insn. | |
1918 | If the last loop insn is four bytes long, the symbol will be | |
1919 | right in the middle, but four byte insns are not swapped anyways. */ | |
1920 | /* A REPEAT takes 6 bytes. The SH has a 32 bit address space. | |
1921 | Hence a 9 digit number should be enough to count all REPEATs. */ | |
015551fc | 1922 | sprintf (name, "_R%x", count++ & 0x3fffffff); |
c4aa876b | 1923 | end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag); |
015551fc JR |
1924 | /* Make this a local symbol. */ |
1925 | #ifdef OBJ_COFF | |
1926 | SF_SET_LOCAL (end_sym); | |
1927 | #endif /* OBJ_COFF */ | |
1928 | symbol_table_insert (end_sym); | |
8d1015a8 AM |
1929 | symval = symbol_get_value_expression (end_sym); |
1930 | *symval = operand[1].immediate; | |
1931 | symval->X_add_number += 2; | |
015551fc JR |
1932 | fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL); |
1933 | } | |
1934 | ||
1935 | output = frag_more (2); | |
1936 | output[0] = 0x8e; | |
1937 | output[1] = 0x8e; | |
1938 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
1939 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
1940 | ||
1941 | return frag_more (2); | |
1942 | } | |
1943 | ||
d67b5d6d | 1944 | /* Now we know what sort of opcodes it is, let's build the bytes. */ |
6b31947e | 1945 | |
0d10e182 | 1946 | static unsigned int |
8edc77b9 | 1947 | build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand) |
252b5132 | 1948 | { |
91d6fa6a | 1949 | int indx; |
1d70c7fb AO |
1950 | char nbuf[8]; |
1951 | char *output; | |
0d10e182 | 1952 | unsigned int size = 2; |
252b5132 | 1953 | int low_byte = target_big_endian ? 1 : 0; |
1d70c7fb | 1954 | int max_index = 4; |
8e45593f | 1955 | bfd_reloc_code_real_type r_type; |
87975d2a | 1956 | #ifdef OBJ_ELF |
8e45593f | 1957 | int unhandled_pic = 0; |
87975d2a | 1958 | #endif |
1d70c7fb | 1959 | |
252b5132 RH |
1960 | nbuf[0] = 0; |
1961 | nbuf[1] = 0; | |
1962 | nbuf[2] = 0; | |
1963 | nbuf[3] = 0; | |
1d70c7fb AO |
1964 | nbuf[4] = 0; |
1965 | nbuf[5] = 0; | |
1966 | nbuf[6] = 0; | |
1967 | nbuf[7] = 0; | |
1968 | ||
87975d2a | 1969 | #ifdef OBJ_ELF |
8e45593f NC |
1970 | for (indx = 0; indx < 3; indx++) |
1971 | if (opcode->arg[indx] == A_IMM | |
1972 | && operand[indx].type == A_IMM | |
1973 | && (operand[indx].immediate.X_op == O_PIC_reloc | |
1974 | || sh_PIC_related_p (operand[indx].immediate.X_add_symbol) | |
1975 | || sh_PIC_related_p (operand[indx].immediate.X_op_symbol))) | |
1976 | unhandled_pic = 1; | |
87975d2a | 1977 | #endif |
8e45593f | 1978 | |
1d70c7fb AO |
1979 | if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32)) |
1980 | { | |
1981 | output = frag_more (4); | |
1982 | size = 4; | |
1983 | max_index = 8; | |
1984 | } | |
1985 | else | |
1986 | output = frag_more (2); | |
252b5132 | 1987 | |
91d6fa6a | 1988 | for (indx = 0; indx < max_index; indx++) |
252b5132 | 1989 | { |
91d6fa6a | 1990 | sh_nibble_type i = opcode->nibbles[indx]; |
252b5132 RH |
1991 | if (i < 16) |
1992 | { | |
91d6fa6a | 1993 | nbuf[indx] = i; |
252b5132 RH |
1994 | } |
1995 | else | |
1996 | { | |
1997 | switch (i) | |
1998 | { | |
1999 | case REG_N: | |
6a5709a5 | 2000 | case REG_N_D: |
91d6fa6a | 2001 | nbuf[indx] = reg_n; |
252b5132 RH |
2002 | break; |
2003 | case REG_M: | |
91d6fa6a | 2004 | nbuf[indx] = reg_m; |
252b5132 | 2005 | break; |
d4845d57 JR |
2006 | case SDT_REG_N: |
2007 | if (reg_n < 2 || reg_n > 5) | |
2008 | as_bad (_("Invalid register: 'r%d'"), reg_n); | |
91d6fa6a | 2009 | nbuf[indx] = (reg_n & 3) | 4; |
d4845d57 | 2010 | break; |
252b5132 | 2011 | case REG_NM: |
91d6fa6a | 2012 | nbuf[indx] = reg_n | (reg_m >> 2); |
252b5132 | 2013 | break; |
c4aa876b | 2014 | case REG_B: |
91d6fa6a | 2015 | nbuf[indx] = reg_b | 0x08; |
252b5132 | 2016 | break; |
6a5709a5 | 2017 | case REG_N_B01: |
91d6fa6a | 2018 | nbuf[indx] = reg_n | 0x01; |
6a5709a5 | 2019 | break; |
1d70c7fb | 2020 | case IMM0_3s: |
91d6fa6a | 2021 | nbuf[indx] |= 0x08; |
1a0670f3 | 2022 | /* Fall through. */ |
1d70c7fb AO |
2023 | case IMM0_3c: |
2024 | insert (output + low_byte, BFD_RELOC_SH_IMM3, 0, operand); | |
2025 | break; | |
2026 | case IMM0_3Us: | |
91d6fa6a | 2027 | nbuf[indx] |= 0x80; |
1a0670f3 | 2028 | /* Fall through. */ |
1d70c7fb AO |
2029 | case IMM0_3Uc: |
2030 | insert (output + low_byte, BFD_RELOC_SH_IMM3U, 0, operand); | |
2031 | break; | |
2032 | case DISP0_12: | |
2033 | insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand); | |
2034 | break; | |
2035 | case DISP0_12BY2: | |
2036 | insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand); | |
2037 | break; | |
2038 | case DISP0_12BY4: | |
2039 | insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand); | |
2040 | break; | |
2041 | case DISP0_12BY8: | |
2042 | insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand); | |
2043 | break; | |
2044 | case DISP1_12: | |
2045 | insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand+1); | |
2046 | break; | |
2047 | case DISP1_12BY2: | |
2048 | insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand+1); | |
2049 | break; | |
2050 | case DISP1_12BY4: | |
2051 | insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand+1); | |
2052 | break; | |
2053 | case DISP1_12BY8: | |
2054 | insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand+1); | |
2055 | break; | |
2056 | case IMM0_20_4: | |
2057 | break; | |
2058 | case IMM0_20: | |
8e45593f | 2059 | r_type = BFD_RELOC_SH_DISP20; |
87975d2a | 2060 | #ifdef OBJ_ELF |
8e45593f NC |
2061 | if (sh_check_fixup (&operand->immediate, &r_type)) |
2062 | as_bad (_("Invalid PIC expression.")); | |
2063 | unhandled_pic = 0; | |
87975d2a | 2064 | #endif |
8e45593f | 2065 | insert4 (output, r_type, 0, operand); |
1d70c7fb AO |
2066 | break; |
2067 | case IMM0_20BY8: | |
2068 | insert4 (output, BFD_RELOC_SH_DISP20BY8, 0, operand); | |
2069 | break; | |
015551fc JR |
2070 | case IMM0_4BY4: |
2071 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); | |
2072 | break; | |
2073 | case IMM0_4BY2: | |
2074 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand); | |
2075 | break; | |
2076 | case IMM0_4: | |
2077 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand); | |
2078 | break; | |
2079 | case IMM1_4BY4: | |
2080 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1); | |
2081 | break; | |
2082 | case IMM1_4BY2: | |
2083 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1); | |
252b5132 | 2084 | break; |
015551fc JR |
2085 | case IMM1_4: |
2086 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1); | |
252b5132 | 2087 | break; |
015551fc JR |
2088 | case IMM0_8BY4: |
2089 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand); | |
252b5132 | 2090 | break; |
015551fc JR |
2091 | case IMM0_8BY2: |
2092 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand); | |
252b5132 | 2093 | break; |
015551fc JR |
2094 | case IMM0_8: |
2095 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand); | |
252b5132 | 2096 | break; |
015551fc JR |
2097 | case IMM1_8BY4: |
2098 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1); | |
252b5132 | 2099 | break; |
015551fc JR |
2100 | case IMM1_8BY2: |
2101 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1); | |
2102 | break; | |
2103 | case IMM1_8: | |
2104 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1); | |
252b5132 RH |
2105 | break; |
2106 | case PCRELIMM_8BY4: | |
7679ead9 AO |
2107 | insert (output, BFD_RELOC_SH_PCRELIMM8BY4, |
2108 | operand->type != A_DISP_PC_ABS, operand); | |
252b5132 RH |
2109 | break; |
2110 | case PCRELIMM_8BY2: | |
7679ead9 AO |
2111 | insert (output, BFD_RELOC_SH_PCRELIMM8BY2, |
2112 | operand->type != A_DISP_PC_ABS, operand); | |
015551fc JR |
2113 | break; |
2114 | case REPEAT: | |
2115 | output = insert_loop_bounds (output, operand); | |
91d6fa6a | 2116 | nbuf[indx] = opcode->nibbles[3]; |
015551fc | 2117 | operand += 2; |
252b5132 RH |
2118 | break; |
2119 | default: | |
2120 | printf (_("failed for %d\n"), i); | |
2121 | } | |
2122 | } | |
2123 | } | |
87975d2a | 2124 | #ifdef OBJ_ELF |
8e45593f NC |
2125 | if (unhandled_pic) |
2126 | as_bad (_("misplaced PIC operand")); | |
87975d2a | 2127 | #endif |
c4aa876b NC |
2128 | if (!target_big_endian) |
2129 | { | |
2130 | output[1] = (nbuf[0] << 4) | (nbuf[1]); | |
2131 | output[0] = (nbuf[2] << 4) | (nbuf[3]); | |
2132 | } | |
2133 | else | |
2134 | { | |
2135 | output[0] = (nbuf[0] << 4) | (nbuf[1]); | |
2136 | output[1] = (nbuf[2] << 4) | (nbuf[3]); | |
2137 | } | |
1d70c7fb AO |
2138 | if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32)) |
2139 | { | |
2140 | if (!target_big_endian) | |
2141 | { | |
2142 | output[3] = (nbuf[4] << 4) | (nbuf[5]); | |
2143 | output[2] = (nbuf[6] << 4) | (nbuf[7]); | |
2144 | } | |
2145 | else | |
2146 | { | |
2147 | output[2] = (nbuf[4] << 4) | (nbuf[5]); | |
2148 | output[3] = (nbuf[6] << 4) | (nbuf[7]); | |
2149 | } | |
2150 | } | |
0d10e182 | 2151 | return size; |
252b5132 RH |
2152 | } |
2153 | ||
d4845d57 JR |
2154 | /* Find an opcode at the start of *STR_P in the hash table, and set |
2155 | *STR_P to the first character after the last one read. */ | |
252b5132 | 2156 | |
d4845d57 | 2157 | static sh_opcode_info * |
8edc77b9 | 2158 | find_cooked_opcode (char **str_p) |
252b5132 | 2159 | { |
d4845d57 | 2160 | char *str = *str_p; |
252b5132 RH |
2161 | unsigned char *op_start; |
2162 | unsigned char *op_end; | |
252b5132 | 2163 | char name[20]; |
6d0cb78c | 2164 | unsigned int nlen = 0; |
c4aa876b | 2165 | |
6b31947e | 2166 | /* Drop leading whitespace. */ |
252b5132 RH |
2167 | while (*str == ' ') |
2168 | str++; | |
2169 | ||
d4845d57 JR |
2170 | /* Find the op code end. |
2171 | The pre-processor will eliminate whitespace in front of | |
2172 | any '@' after the first argument; we may be called from | |
2173 | assemble_ppi, so the opcode might be terminated by an '@'. */ | |
2132e3a3 | 2174 | for (op_start = op_end = (unsigned char *) str; |
252b5132 | 2175 | *op_end |
6d0cb78c | 2176 | && nlen < sizeof (name) - 1 |
d4845d57 | 2177 | && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; |
252b5132 RH |
2178 | op_end++) |
2179 | { | |
2180 | unsigned char c = op_start[nlen]; | |
2181 | ||
2182 | /* The machine independent code will convert CMP/EQ into cmp/EQ | |
d4845d57 JR |
2183 | because it thinks the '/' is the end of the symbol. Moreover, |
2184 | all but the first sub-insn is a parallel processing insn won't | |
3882b010 | 2185 | be capitalized. Instead of hacking up the machine independent |
d4845d57 | 2186 | code, we just deal with it here. */ |
3882b010 | 2187 | c = TOLOWER (c); |
252b5132 RH |
2188 | name[nlen] = c; |
2189 | nlen++; | |
2190 | } | |
c4aa876b | 2191 | |
252b5132 | 2192 | name[nlen] = 0; |
2132e3a3 | 2193 | *str_p = (char *) op_end; |
252b5132 RH |
2194 | |
2195 | if (nlen == 0) | |
6b31947e | 2196 | as_bad (_("can't find opcode ")); |
252b5132 | 2197 | |
d4845d57 JR |
2198 | return (sh_opcode_info *) hash_find (opcode_hash_control, name); |
2199 | } | |
2200 | ||
2201 | /* Assemble a parallel processing insn. */ | |
2202 | #define DDT_BASE 0xf000 /* Base value for double data transfer insns */ | |
6b31947e | 2203 | |
0d10e182 | 2204 | static unsigned int |
8edc77b9 | 2205 | assemble_ppi (char *op_end, sh_opcode_info *opcode) |
d4845d57 JR |
2206 | { |
2207 | int movx = 0; | |
2208 | int movy = 0; | |
2209 | int cond = 0; | |
2210 | int field_b = 0; | |
2211 | char *output; | |
2212 | int move_code; | |
0d10e182 | 2213 | unsigned int size; |
d4845d57 | 2214 | |
d4845d57 JR |
2215 | for (;;) |
2216 | { | |
2217 | sh_operand_info operand[3]; | |
2218 | ||
ac62e7a3 JR |
2219 | /* Some insn ignore one or more register fields, e.g. psts machl,a0. |
2220 | Make sure we encode a defined insn pattern. */ | |
2221 | reg_x = 0; | |
2222 | reg_y = 0; | |
2223 | reg_n = 0; | |
2224 | ||
d4845d57 JR |
2225 | if (opcode->arg[0] != A_END) |
2226 | op_end = get_operands (opcode, op_end, operand); | |
88da98f3 | 2227 | try_another_opcode: |
d4845d57 JR |
2228 | opcode = get_specific (opcode, operand); |
2229 | if (opcode == 0) | |
2230 | { | |
6b31947e | 2231 | /* Couldn't find an opcode which matched the operands. */ |
d4845d57 | 2232 | char *where = frag_more (2); |
0d10e182 | 2233 | size = 2; |
d4845d57 JR |
2234 | |
2235 | where[0] = 0x0; | |
2236 | where[1] = 0x0; | |
2237 | as_bad (_("invalid operands for opcode")); | |
0d10e182 | 2238 | return size; |
d4845d57 | 2239 | } |
c4aa876b | 2240 | |
d4845d57 JR |
2241 | if (opcode->nibbles[0] != PPI) |
2242 | as_bad (_("insn can't be combined with parallel processing insn")); | |
2243 | ||
2244 | switch (opcode->nibbles[1]) | |
2245 | { | |
2246 | ||
2247 | case NOPX: | |
2248 | if (movx) | |
2249 | as_bad (_("multiple movx specifications")); | |
2250 | movx = DDT_BASE; | |
2251 | break; | |
2252 | case NOPY: | |
2253 | if (movy) | |
2254 | as_bad (_("multiple movy specifications")); | |
2255 | movy = DDT_BASE; | |
2256 | break; | |
2257 | ||
88da98f3 MS |
2258 | case MOVX_NOPY: |
2259 | if (movx) | |
2260 | as_bad (_("multiple movx specifications")); | |
2261 | if ((reg_n < 4 || reg_n > 5) | |
2262 | && (reg_n < 0 || reg_n > 1)) | |
2263 | as_bad (_("invalid movx address register")); | |
2264 | if (movy && movy != DDT_BASE) | |
2265 | as_bad (_("insn cannot be combined with non-nopy")); | |
2266 | movx = ((((reg_n & 1) != 0) << 9) | |
2267 | + (((reg_n & 4) == 0) << 8) | |
2268 | + (reg_x << 6) | |
2269 | + (opcode->nibbles[2] << 4) | |
2270 | + opcode->nibbles[3] | |
2271 | + DDT_BASE); | |
2272 | break; | |
2273 | ||
2274 | case MOVY_NOPX: | |
2275 | if (movy) | |
2276 | as_bad (_("multiple movy specifications")); | |
2277 | if ((reg_n < 6 || reg_n > 7) | |
2278 | && (reg_n < 2 || reg_n > 3)) | |
2279 | as_bad (_("invalid movy address register")); | |
2280 | if (movx && movx != DDT_BASE) | |
2281 | as_bad (_("insn cannot be combined with non-nopx")); | |
2282 | movy = ((((reg_n & 1) != 0) << 8) | |
2283 | + (((reg_n & 4) == 0) << 9) | |
2284 | + (reg_y << 6) | |
2285 | + (opcode->nibbles[2] << 4) | |
2286 | + opcode->nibbles[3] | |
2287 | + DDT_BASE); | |
2288 | break; | |
2289 | ||
d4845d57 JR |
2290 | case MOVX: |
2291 | if (movx) | |
2292 | as_bad (_("multiple movx specifications")); | |
88da98f3 MS |
2293 | if (movy & 0x2ac) |
2294 | as_bad (_("previous movy requires nopx")); | |
d4845d57 JR |
2295 | if (reg_n < 4 || reg_n > 5) |
2296 | as_bad (_("invalid movx address register")); | |
2297 | if (opcode->nibbles[2] & 8) | |
2298 | { | |
2299 | if (reg_m == A_A1_NUM) | |
2300 | movx = 1 << 7; | |
2301 | else if (reg_m != A_A0_NUM) | |
2302 | as_bad (_("invalid movx dsp register")); | |
2303 | } | |
2304 | else | |
2305 | { | |
2306 | if (reg_x > 1) | |
2307 | as_bad (_("invalid movx dsp register")); | |
2308 | movx = reg_x << 7; | |
2309 | } | |
2310 | movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; | |
2311 | break; | |
2312 | ||
2313 | case MOVY: | |
2314 | if (movy) | |
2315 | as_bad (_("multiple movy specifications")); | |
88da98f3 MS |
2316 | if (movx & 0x153) |
2317 | as_bad (_("previous movx requires nopy")); | |
d4845d57 JR |
2318 | if (opcode->nibbles[2] & 8) |
2319 | { | |
2320 | /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, | |
2321 | so add 8 more. */ | |
2322 | movy = 8; | |
2323 | if (reg_m == A_A1_NUM) | |
2324 | movy += 1 << 6; | |
2325 | else if (reg_m != A_A0_NUM) | |
2326 | as_bad (_("invalid movy dsp register")); | |
2327 | } | |
2328 | else | |
2329 | { | |
2330 | if (reg_y > 1) | |
2331 | as_bad (_("invalid movy dsp register")); | |
2332 | movy = reg_y << 6; | |
2333 | } | |
2334 | if (reg_n < 6 || reg_n > 7) | |
2335 | as_bad (_("invalid movy address register")); | |
2336 | movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; | |
2337 | break; | |
2338 | ||
2339 | case PSH: | |
015551fc | 2340 | if (operand[0].immediate.X_op != O_constant) |
d4845d57 JR |
2341 | as_bad (_("dsp immediate shift value not constant")); |
2342 | field_b = ((opcode->nibbles[2] << 12) | |
015551fc | 2343 | | (operand[0].immediate.X_add_number & 127) << 4 |
d4845d57 JR |
2344 | | reg_n); |
2345 | break; | |
88da98f3 MS |
2346 | case PPI3NC: |
2347 | if (cond) | |
2348 | { | |
2349 | opcode++; | |
2350 | goto try_another_opcode; | |
2351 | } | |
2352 | /* Fall through. */ | |
d4845d57 JR |
2353 | case PPI3: |
2354 | if (field_b) | |
2355 | as_bad (_("multiple parallel processing specifications")); | |
2356 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
2357 | + (reg_x << 6) + (reg_y << 4) + reg_n); | |
88da98f3 MS |
2358 | switch (opcode->nibbles[4]) |
2359 | { | |
2360 | case HEX_0: | |
2361 | case HEX_XX00: | |
2362 | case HEX_00YY: | |
2363 | break; | |
2364 | case HEX_1: | |
2365 | case HEX_4: | |
2366 | field_b += opcode->nibbles[4] << 4; | |
2367 | break; | |
2368 | default: | |
2369 | abort (); | |
2370 | } | |
d4845d57 JR |
2371 | break; |
2372 | case PDC: | |
2373 | if (cond) | |
2374 | as_bad (_("multiple condition specifications")); | |
2375 | cond = opcode->nibbles[2] << 8; | |
2376 | if (*op_end) | |
2377 | goto skip_cond_check; | |
2378 | break; | |
2379 | case PPIC: | |
2380 | if (field_b) | |
2381 | as_bad (_("multiple parallel processing specifications")); | |
2382 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
2383 | + cond + (reg_x << 6) + (reg_y << 4) + reg_n); | |
2384 | cond = 0; | |
88da98f3 MS |
2385 | switch (opcode->nibbles[4]) |
2386 | { | |
2387 | case HEX_0: | |
2388 | case HEX_XX00: | |
2389 | case HEX_00YY: | |
2390 | break; | |
2391 | case HEX_1: | |
2392 | case HEX_4: | |
2393 | field_b += opcode->nibbles[4] << 4; | |
2394 | break; | |
2395 | default: | |
2396 | abort (); | |
2397 | } | |
d4845d57 JR |
2398 | break; |
2399 | case PMUL: | |
2400 | if (field_b) | |
2401 | { | |
88da98f3 MS |
2402 | if ((field_b & 0xef00) == 0xa100) |
2403 | field_b -= 0x8100; | |
2404 | /* pclr Dz pmuls Se,Sf,Dg */ | |
2405 | else if ((field_b & 0xff00) == 0x8d00 | |
f6f9408f | 2406 | && (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh4al_dsp_up))) |
88da98f3 | 2407 | { |
f6f9408f | 2408 | valid_arch = SH_MERGE_ARCH_SET (valid_arch, arch_sh4al_dsp_up); |
88da98f3 MS |
2409 | field_b -= 0x8cf0; |
2410 | } | |
2411 | else | |
d4845d57 | 2412 | as_bad (_("insn cannot be combined with pmuls")); |
d4845d57 JR |
2413 | switch (field_b & 0xf) |
2414 | { | |
2415 | case A_X0_NUM: | |
2416 | field_b += 0 - A_X0_NUM; | |
2417 | break; | |
2418 | case A_Y0_NUM: | |
2419 | field_b += 1 - A_Y0_NUM; | |
2420 | break; | |
2421 | case A_A0_NUM: | |
2422 | field_b += 2 - A_A0_NUM; | |
2423 | break; | |
2424 | case A_A1_NUM: | |
2425 | field_b += 3 - A_A1_NUM; | |
2426 | break; | |
2427 | default: | |
88da98f3 | 2428 | as_bad (_("bad combined pmuls output operand")); |
d4845d57 | 2429 | } |
7dd04abd JR |
2430 | /* Generate warning if the destination register for padd / psub |
2431 | and pmuls is the same ( only for A0 or A1 ). | |
2432 | If the last nibble is 1010 then A0 is used in both | |
2433 | padd / psub and pmuls. If it is 1111 then A1 is used | |
2434 | as destination register in both padd / psub and pmuls. */ | |
5db33d76 JR |
2435 | |
2436 | if ((((field_b | reg_efg) & 0x000F) == 0x000A) | |
2437 | || (((field_b | reg_efg) & 0x000F) == 0x000F)) | |
2438 | as_warn (_("destination register is same for parallel insns")); | |
d4845d57 JR |
2439 | } |
2440 | field_b += 0x4000 + reg_efg; | |
2441 | break; | |
2442 | default: | |
2443 | abort (); | |
2444 | } | |
2445 | if (cond) | |
2446 | { | |
2447 | as_bad (_("condition not followed by conditionalizable insn")); | |
2448 | cond = 0; | |
2449 | } | |
2450 | if (! *op_end) | |
2451 | break; | |
2452 | skip_cond_check: | |
2453 | opcode = find_cooked_opcode (&op_end); | |
2454 | if (opcode == NULL) | |
2455 | { | |
2456 | (as_bad | |
2457 | (_("unrecognized characters at end of parallel processing insn"))); | |
2458 | break; | |
2459 | } | |
2460 | } | |
2461 | ||
2462 | move_code = movx | movy; | |
2463 | if (field_b) | |
2464 | { | |
2465 | /* Parallel processing insn. */ | |
2466 | unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b; | |
2467 | ||
2468 | output = frag_more (4); | |
0d10e182 | 2469 | size = 4; |
d4845d57 JR |
2470 | if (! target_big_endian) |
2471 | { | |
2472 | output[3] = ppi_code >> 8; | |
2473 | output[2] = ppi_code; | |
2474 | } | |
2475 | else | |
2476 | { | |
2477 | output[2] = ppi_code >> 8; | |
2478 | output[3] = ppi_code; | |
2479 | } | |
2480 | move_code |= 0xf800; | |
2481 | } | |
2482 | else | |
0d10e182 JL |
2483 | { |
2484 | /* Just a double data transfer. */ | |
2485 | output = frag_more (2); | |
2486 | size = 2; | |
2487 | } | |
d4845d57 JR |
2488 | if (! target_big_endian) |
2489 | { | |
2490 | output[1] = move_code >> 8; | |
2491 | output[0] = move_code; | |
2492 | } | |
2493 | else | |
2494 | { | |
2495 | output[0] = move_code >> 8; | |
2496 | output[1] = move_code; | |
2497 | } | |
0d10e182 | 2498 | return size; |
d4845d57 JR |
2499 | } |
2500 | ||
2501 | /* This is the guts of the machine-dependent assembler. STR points to a | |
2502 | machine dependent instruction. This function is supposed to emit | |
6b31947e | 2503 | the frags/bytes it assembles to. */ |
d4845d57 JR |
2504 | |
2505 | void | |
8edc77b9 | 2506 | md_assemble (char *str) |
d4845d57 | 2507 | { |
2132e3a3 | 2508 | char *op_end; |
d4845d57 JR |
2509 | sh_operand_info operand[3]; |
2510 | sh_opcode_info *opcode; | |
dda5ecfc | 2511 | unsigned int size = 0; |
ae51a426 | 2512 | char *initial_str = str; |
d4845d57 JR |
2513 | |
2514 | opcode = find_cooked_opcode (&str); | |
2515 | op_end = str; | |
252b5132 RH |
2516 | |
2517 | if (opcode == NULL) | |
2518 | { | |
ae51a426 | 2519 | /* The opcode is not in the hash table. |
708587a4 | 2520 | This means we definitely have an assembly failure, |
ae51a426 JR |
2521 | but the instruction may be valid in another CPU variant. |
2522 | In this case emit something better than 'unknown opcode'. | |
2523 | Search the full table in sh-opc.h to check. */ | |
2524 | ||
2525 | char *name = initial_str; | |
2526 | int name_length = 0; | |
2527 | const sh_opcode_info *op; | |
3076e594 | 2528 | bfd_boolean found = FALSE; |
ae51a426 | 2529 | |
3076e594 | 2530 | /* Identify opcode in string. */ |
871ec896 | 2531 | while (ISSPACE (*name)) |
3076e594 NC |
2532 | name++; |
2533 | ||
2534 | while (name[name_length] != '\0' && !ISSPACE (name[name_length])) | |
2535 | name_length++; | |
ae51a426 | 2536 | |
3076e594 | 2537 | /* Search for opcode in full list. */ |
ae51a426 JR |
2538 | for (op = sh_table; op->name; op++) |
2539 | { | |
f6f9408f JR |
2540 | if (strncasecmp (op->name, name, name_length) == 0 |
2541 | && op->name[name_length] == '\0') | |
ae51a426 | 2542 | { |
3076e594 | 2543 | found = TRUE; |
ae51a426 JR |
2544 | break; |
2545 | } | |
2546 | } | |
2547 | ||
3076e594 NC |
2548 | if (found) |
2549 | as_bad (_("opcode not valid for this cpu variant")); | |
ae51a426 | 2550 | else |
3076e594 NC |
2551 | as_bad (_("unknown opcode")); |
2552 | ||
252b5132 RH |
2553 | return; |
2554 | } | |
2555 | ||
2556 | if (sh_relax | |
2557 | && ! seg_info (now_seg)->tc_segment_info_data.in_code) | |
2558 | { | |
2559 | /* Output a CODE reloc to tell the linker that the following | |
2560 | bytes are instructions, not data. */ | |
2561 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
2562 | BFD_RELOC_SH_CODE); | |
2563 | seg_info (now_seg)->tc_segment_info_data.in_code = 1; | |
2564 | } | |
2565 | ||
d4845d57 JR |
2566 | if (opcode->nibbles[0] == PPI) |
2567 | { | |
0d10e182 | 2568 | size = assemble_ppi (op_end, opcode); |
252b5132 RH |
2569 | } |
2570 | else | |
2571 | { | |
0d10e182 JL |
2572 | if (opcode->arg[0] == A_BDISP12 |
2573 | || opcode->arg[0] == A_BDISP8) | |
252b5132 | 2574 | { |
26c9b704 JR |
2575 | /* Since we skip get_specific here, we have to check & update |
2576 | valid_arch now. */ | |
f6f9408f JR |
2577 | if (SH_MERGE_ARCH_SET_VALID (valid_arch, opcode->arch)) |
2578 | valid_arch = SH_MERGE_ARCH_SET (valid_arch, opcode->arch); | |
26c9b704 JR |
2579 | else |
2580 | as_bad (_("Delayed branches not available on SH1")); | |
0d10e182 JL |
2581 | parse_exp (op_end + 1, &operand[0]); |
2582 | build_relax (opcode, &operand[0]); | |
86157c20 AS |
2583 | |
2584 | /* All branches are currently 16 bit. */ | |
2585 | size = 2; | |
5fc44b2d JR |
2586 | } |
2587 | else | |
2588 | { | |
0d10e182 JL |
2589 | if (opcode->arg[0] == A_END) |
2590 | { | |
2591 | /* Ignore trailing whitespace. If there is any, it has already | |
2592 | been compressed to a single space. */ | |
2593 | if (*op_end == ' ') | |
2594 | op_end++; | |
2595 | } | |
2596 | else | |
2597 | { | |
2598 | op_end = get_operands (opcode, op_end, operand); | |
2599 | } | |
2600 | opcode = get_specific (opcode, operand); | |
252b5132 | 2601 | |
0d10e182 JL |
2602 | if (opcode == 0) |
2603 | { | |
2604 | /* Couldn't find an opcode which matched the operands. */ | |
2605 | char *where = frag_more (2); | |
2606 | size = 2; | |
252b5132 | 2607 | |
0d10e182 JL |
2608 | where[0] = 0x0; |
2609 | where[1] = 0x0; | |
2610 | as_bad (_("invalid operands for opcode")); | |
2611 | } | |
2612 | else | |
2613 | { | |
2614 | if (*op_end) | |
2615 | as_bad (_("excess operands: '%s'"), op_end); | |
2616 | ||
2617 | size = build_Mytes (opcode, operand); | |
2618 | } | |
252b5132 | 2619 | } |
0d10e182 | 2620 | } |
252b5132 | 2621 | |
4dc7ead9 | 2622 | dwarf2_emit_insn (size); |
252b5132 RH |
2623 | } |
2624 | ||
2625 | /* This routine is called each time a label definition is seen. It | |
2626 | emits a BFD_RELOC_SH_LABEL reloc if necessary. */ | |
2627 | ||
2628 | void | |
07a53e5c | 2629 | sh_frob_label (symbolS *sym) |
252b5132 RH |
2630 | { |
2631 | static fragS *last_label_frag; | |
2632 | static int last_label_offset; | |
2633 | ||
2634 | if (sh_relax | |
2635 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
2636 | { | |
2637 | int offset; | |
2638 | ||
2639 | offset = frag_now_fix (); | |
2640 | if (frag_now != last_label_frag | |
2641 | || offset != last_label_offset) | |
c4aa876b | 2642 | { |
252b5132 RH |
2643 | fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); |
2644 | last_label_frag = frag_now; | |
2645 | last_label_offset = offset; | |
2646 | } | |
2647 | } | |
07a53e5c RH |
2648 | |
2649 | dwarf2_emit_label (sym); | |
252b5132 RH |
2650 | } |
2651 | ||
2652 | /* This routine is called when the assembler is about to output some | |
2653 | data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ | |
2654 | ||
2655 | void | |
8edc77b9 | 2656 | sh_flush_pending_output (void) |
252b5132 RH |
2657 | { |
2658 | if (sh_relax | |
2659 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
2660 | { | |
2661 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
2662 | BFD_RELOC_SH_DATA); | |
2663 | seg_info (now_seg)->tc_segment_info_data.in_code = 0; | |
2664 | } | |
2665 | } | |
2666 | ||
2667 | symbolS * | |
8edc77b9 | 2668 | md_undefined_symbol (char *name ATTRIBUTE_UNUSED) |
252b5132 RH |
2669 | { |
2670 | return 0; | |
2671 | } | |
2672 | ||
6b31947e | 2673 | /* Various routines to kill one day. */ |
6b31947e | 2674 | |
6d4af3c2 | 2675 | const char * |
8edc77b9 | 2676 | md_atof (int type, char *litP, int *sizeP) |
252b5132 | 2677 | { |
499ac353 | 2678 | return ieee_md_atof (type, litP, sizeP, target_big_endian); |
252b5132 RH |
2679 | } |
2680 | ||
2681 | /* Handle the .uses pseudo-op. This pseudo-op is used just before a | |
2682 | call instruction. It refers to a label of the instruction which | |
2683 | loads the register which the call uses. We use it to generate a | |
2684 | special reloc for the linker. */ | |
2685 | ||
2686 | static void | |
8edc77b9 | 2687 | s_uses (int ignore ATTRIBUTE_UNUSED) |
252b5132 RH |
2688 | { |
2689 | expressionS ex; | |
2690 | ||
2691 | if (! sh_relax) | |
2692 | as_warn (_(".uses pseudo-op seen when not relaxing")); | |
2693 | ||
2694 | expression (&ex); | |
2695 | ||
2696 | if (ex.X_op != O_symbol || ex.X_add_number != 0) | |
2697 | { | |
2698 | as_bad (_("bad .uses format")); | |
2699 | ignore_rest_of_line (); | |
2700 | return; | |
2701 | } | |
2702 | ||
2703 | fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); | |
2704 | ||
2705 | demand_empty_rest_of_line (); | |
2706 | } | |
2707 | \f | |
37dedf66 NC |
2708 | enum options |
2709 | { | |
2710 | OPTION_RELAX = OPTION_MD_BASE, | |
2711 | OPTION_BIG, | |
2712 | OPTION_LITTLE, | |
2713 | OPTION_SMALL, | |
2714 | OPTION_DSP, | |
2715 | OPTION_ISA, | |
2716 | OPTION_RENESAS, | |
2717 | OPTION_ALLOW_REG_PREFIX, | |
6fd4f6cc | 2718 | OPTION_H_TICK_HEX, |
8e45593f NC |
2719 | #ifdef OBJ_ELF |
2720 | OPTION_FDPIC, | |
2721 | #endif | |
37dedf66 NC |
2722 | OPTION_DUMMY /* Not used. This is just here to make it easy to add and subtract options from this enum. */ |
2723 | }; | |
2724 | ||
5a38dc70 | 2725 | const char *md_shortopts = ""; |
6b31947e NC |
2726 | struct option md_longopts[] = |
2727 | { | |
252b5132 | 2728 | {"relax", no_argument, NULL, OPTION_RELAX}, |
05982cac | 2729 | {"big", no_argument, NULL, OPTION_BIG}, |
252b5132 | 2730 | {"little", no_argument, NULL, OPTION_LITTLE}, |
784906c5 NC |
2731 | /* The next two switches are here because the |
2732 | generic parts of the linker testsuite uses them. */ | |
2733 | {"EB", no_argument, NULL, OPTION_BIG}, | |
2734 | {"EL", no_argument, NULL, OPTION_LITTLE}, | |
252b5132 | 2735 | {"small", no_argument, NULL, OPTION_SMALL}, |
d4845d57 | 2736 | {"dsp", no_argument, NULL, OPTION_DSP}, |
37dedf66 | 2737 | {"isa", required_argument, NULL, OPTION_ISA}, |
f55629b8 | 2738 | {"renesas", no_argument, NULL, OPTION_RENESAS}, |
37dedf66 | 2739 | {"allow-reg-prefix", no_argument, NULL, OPTION_ALLOW_REG_PREFIX}, |
f55629b8 | 2740 | |
6fd4f6cc | 2741 | { "h-tick-hex", no_argument, NULL, OPTION_H_TICK_HEX }, |
324bfcf3 | 2742 | |
8e45593f NC |
2743 | #ifdef OBJ_ELF |
2744 | {"fdpic", no_argument, NULL, OPTION_FDPIC}, | |
2745 | #endif | |
2746 | ||
252b5132 RH |
2747 | {NULL, no_argument, NULL, 0} |
2748 | }; | |
c4aa876b | 2749 | size_t md_longopts_size = sizeof (md_longopts); |
252b5132 RH |
2750 | |
2751 | int | |
17b9d67d | 2752 | md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED) |
252b5132 RH |
2753 | { |
2754 | switch (c) | |
2755 | { | |
2756 | case OPTION_RELAX: | |
2757 | sh_relax = 1; | |
2758 | break; | |
2759 | ||
05982cac HPN |
2760 | case OPTION_BIG: |
2761 | target_big_endian = 1; | |
2762 | break; | |
2763 | ||
252b5132 | 2764 | case OPTION_LITTLE: |
252b5132 RH |
2765 | target_big_endian = 0; |
2766 | break; | |
2767 | ||
2768 | case OPTION_SMALL: | |
2769 | sh_small = 1; | |
2770 | break; | |
2771 | ||
d4845d57 | 2772 | case OPTION_DSP: |
e38bc3b5 | 2773 | preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); |
d4845d57 JR |
2774 | break; |
2775 | ||
f55629b8 KK |
2776 | case OPTION_RENESAS: |
2777 | dont_adjust_reloc_32 = 1; | |
2778 | break; | |
2779 | ||
37dedf66 NC |
2780 | case OPTION_ALLOW_REG_PREFIX: |
2781 | allow_dollar_register_prefix = 1; | |
2782 | break; | |
2783 | ||
324bfcf3 | 2784 | case OPTION_ISA: |
871ec896 | 2785 | if (strcasecmp (arg, "dsp") == 0) |
e38bc3b5 | 2786 | preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); |
88da98f3 | 2787 | else if (strcasecmp (arg, "fp") == 0) |
e38bc3b5 | 2788 | preset_target_arch = arch_sh_up & ~arch_sh_has_dsp; |
bdfaef52 | 2789 | else if (strcasecmp (arg, "any") == 0) |
e38bc3b5 | 2790 | preset_target_arch = arch_sh_up; |
324bfcf3 | 2791 | else |
f6f9408f JR |
2792 | { |
2793 | extern const bfd_arch_info_type bfd_sh_arch; | |
871ec896 | 2794 | bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; |
37dedf66 | 2795 | |
f6f9408f JR |
2796 | preset_target_arch = 0; |
2797 | for (; bfd_arch; bfd_arch=bfd_arch->next) | |
2798 | { | |
2799 | int len = strlen(bfd_arch->printable_name); | |
3739860c | 2800 | |
f6f9408f JR |
2801 | if (strncasecmp (bfd_arch->printable_name, arg, len) != 0) |
2802 | continue; | |
2803 | ||
2804 | if (arg[len] == '\0') | |
2805 | preset_target_arch = | |
2806 | sh_get_arch_from_bfd_mach (bfd_arch->mach); | |
2807 | else if (strcasecmp(&arg[len], "-up") == 0) | |
2808 | preset_target_arch = | |
2809 | sh_get_arch_up_from_bfd_mach (bfd_arch->mach); | |
2810 | else | |
2811 | continue; | |
2812 | break; | |
2813 | } | |
3739860c | 2814 | |
f6f9408f | 2815 | if (!preset_target_arch) |
20203fb9 | 2816 | as_bad (_("Invalid argument to --isa option: %s"), arg); |
f6f9408f | 2817 | } |
324bfcf3 AO |
2818 | break; |
2819 | ||
6fd4f6cc DD |
2820 | case OPTION_H_TICK_HEX: |
2821 | enable_h_tick_hex = 1; | |
2822 | break; | |
2823 | ||
8e45593f NC |
2824 | #ifdef OBJ_ELF |
2825 | case OPTION_FDPIC: | |
2826 | sh_fdpic = TRUE; | |
2827 | break; | |
2828 | #endif /* OBJ_ELF */ | |
2829 | ||
252b5132 RH |
2830 | default: |
2831 | return 0; | |
2832 | } | |
2833 | ||
2834 | return 1; | |
2835 | } | |
2836 | ||
2837 | void | |
8edc77b9 | 2838 | md_show_usage (FILE *stream) |
252b5132 | 2839 | { |
c4aa876b | 2840 | fprintf (stream, _("\ |
252b5132 | 2841 | SH options:\n\ |
37dedf66 NC |
2842 | --little generate little endian code\n\ |
2843 | --big generate big endian code\n\ | |
2844 | --relax alter jump instructions for long displacements\n\ | |
2845 | --renesas disable optimization with section symbol for\n\ | |
f55629b8 | 2846 | compatibility with Renesas assembler.\n\ |
37dedf66 NC |
2847 | --small align sections to 4 byte boundaries, not 16\n\ |
2848 | --dsp enable sh-dsp insns, and disable floating-point ISAs.\n\ | |
2849 | --allow-reg-prefix allow '$' as a register name prefix.\n\ | |
2850 | --isa=[any use most appropriate isa\n\ | |
ae51a426 | 2851 | | dsp same as '-dsp'\n\ |
f6f9408f JR |
2852 | | fp")); |
2853 | { | |
2854 | extern const bfd_arch_info_type bfd_sh_arch; | |
871ec896 | 2855 | bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; |
37dedf66 | 2856 | |
f6f9408f | 2857 | for (; bfd_arch; bfd_arch=bfd_arch->next) |
211dc24b AM |
2858 | { |
2859 | fprintf (stream, "\n | %s", bfd_arch->printable_name); | |
2860 | fprintf (stream, "\n | %s-up", bfd_arch->printable_name); | |
2861 | } | |
f6f9408f JR |
2862 | } |
2863 | fprintf (stream, "]\n"); | |
8e45593f NC |
2864 | #ifdef OBJ_ELF |
2865 | fprintf (stream, _("\ | |
2866 | --fdpic generate an FDPIC object file\n")); | |
2867 | #endif /* OBJ_ELF */ | |
252b5132 RH |
2868 | } |
2869 | \f | |
252b5132 RH |
2870 | /* This struct is used to pass arguments to sh_count_relocs through |
2871 | bfd_map_over_sections. */ | |
2872 | ||
2873 | struct sh_count_relocs | |
2874 | { | |
2875 | /* Symbol we are looking for. */ | |
2876 | symbolS *sym; | |
2877 | /* Count of relocs found. */ | |
2878 | int count; | |
2879 | }; | |
2880 | ||
2881 | /* Count the number of fixups in a section which refer to a particular | |
7be1c489 | 2882 | symbol. This is called via bfd_map_over_sections. */ |
252b5132 | 2883 | |
252b5132 | 2884 | static void |
8edc77b9 | 2885 | sh_count_relocs (bfd *abfd ATTRIBUTE_UNUSED, segT sec, void *data) |
252b5132 RH |
2886 | { |
2887 | struct sh_count_relocs *info = (struct sh_count_relocs *) data; | |
2888 | segment_info_type *seginfo; | |
2889 | symbolS *sym; | |
2890 | fixS *fix; | |
2891 | ||
2892 | seginfo = seg_info (sec); | |
2893 | if (seginfo == NULL) | |
2894 | return; | |
2895 | ||
2896 | sym = info->sym; | |
2897 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
2898 | { | |
2899 | if (fix->fx_addsy == sym) | |
2900 | { | |
2901 | ++info->count; | |
2902 | fix->fx_tcbit = 1; | |
2903 | } | |
2904 | } | |
2905 | } | |
2906 | ||
7be1c489 AM |
2907 | /* Handle the count relocs for a particular section. |
2908 | This is called via bfd_map_over_sections. */ | |
252b5132 | 2909 | |
252b5132 | 2910 | static void |
8edc77b9 KK |
2911 | sh_frob_section (bfd *abfd ATTRIBUTE_UNUSED, segT sec, |
2912 | void *ignore ATTRIBUTE_UNUSED) | |
252b5132 RH |
2913 | { |
2914 | segment_info_type *seginfo; | |
2915 | fixS *fix; | |
2916 | ||
2917 | seginfo = seg_info (sec); | |
2918 | if (seginfo == NULL) | |
2919 | return; | |
2920 | ||
2921 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
2922 | { | |
2923 | symbolS *sym; | |
2924 | bfd_vma val; | |
2925 | fixS *fscan; | |
2926 | struct sh_count_relocs info; | |
2927 | ||
2928 | if (fix->fx_r_type != BFD_RELOC_SH_USES) | |
2929 | continue; | |
2930 | ||
2931 | /* The BFD_RELOC_SH_USES reloc should refer to a defined local | |
2932 | symbol in the same section. */ | |
2933 | sym = fix->fx_addsy; | |
2934 | if (sym == NULL | |
2935 | || fix->fx_subsy != NULL | |
2936 | || fix->fx_addnumber != 0 | |
2937 | || S_GET_SEGMENT (sym) != sec | |
252b5132 RH |
2938 | || S_IS_EXTERNAL (sym)) |
2939 | { | |
2940 | as_warn_where (fix->fx_file, fix->fx_line, | |
2941 | _(".uses does not refer to a local symbol in the same section")); | |
2942 | continue; | |
2943 | } | |
2944 | ||
2945 | /* Look through the fixups again, this time looking for one | |
2946 | at the same location as sym. */ | |
2947 | val = S_GET_VALUE (sym); | |
2948 | for (fscan = seginfo->fix_root; | |
2949 | fscan != NULL; | |
2950 | fscan = fscan->fx_next) | |
2951 | if (val == fscan->fx_frag->fr_address + fscan->fx_where | |
2952 | && fscan->fx_r_type != BFD_RELOC_SH_ALIGN | |
2953 | && fscan->fx_r_type != BFD_RELOC_SH_CODE | |
2954 | && fscan->fx_r_type != BFD_RELOC_SH_DATA | |
2955 | && fscan->fx_r_type != BFD_RELOC_SH_LABEL) | |
2956 | break; | |
2957 | if (fscan == NULL) | |
2958 | { | |
2959 | as_warn_where (fix->fx_file, fix->fx_line, | |
2960 | _("can't find fixup pointed to by .uses")); | |
2961 | continue; | |
2962 | } | |
2963 | ||
2964 | if (fscan->fx_tcbit) | |
2965 | { | |
2966 | /* We've already done this one. */ | |
2967 | continue; | |
2968 | } | |
2969 | ||
6b31947e NC |
2970 | /* The variable fscan should also be a fixup to a local symbol |
2971 | in the same section. */ | |
252b5132 RH |
2972 | sym = fscan->fx_addsy; |
2973 | if (sym == NULL | |
2974 | || fscan->fx_subsy != NULL | |
2975 | || fscan->fx_addnumber != 0 | |
2976 | || S_GET_SEGMENT (sym) != sec | |
252b5132 RH |
2977 | || S_IS_EXTERNAL (sym)) |
2978 | { | |
2979 | as_warn_where (fix->fx_file, fix->fx_line, | |
2980 | _(".uses target does not refer to a local symbol in the same section")); | |
2981 | continue; | |
2982 | } | |
2983 | ||
2984 | /* Now we look through all the fixups of all the sections, | |
2985 | counting the number of times we find a reference to sym. */ | |
2986 | info.sym = sym; | |
2987 | info.count = 0; | |
8edc77b9 | 2988 | bfd_map_over_sections (stdoutput, sh_count_relocs, &info); |
252b5132 RH |
2989 | |
2990 | if (info.count < 1) | |
2991 | abort (); | |
2992 | ||
2993 | /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. | |
2994 | We have already adjusted the value of sym to include the | |
2995 | fragment address, so we undo that adjustment here. */ | |
2996 | subseg_change (sec, 0); | |
7bcad3e5 NC |
2997 | fix_new (fscan->fx_frag, |
2998 | S_GET_VALUE (sym) - fscan->fx_frag->fr_address, | |
252b5132 RH |
2999 | 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); |
3000 | } | |
3001 | } | |
3002 | ||
3003 | /* This function is called after the symbol table has been completed, | |
3004 | but before the relocs or section contents have been written out. | |
3005 | If we have seen any .uses pseudo-ops, they point to an instruction | |
3006 | which loads a register with the address of a function. We look | |
3007 | through the fixups to find where the function address is being | |
3008 | loaded from. We then generate a COUNT reloc giving the number of | |
3009 | times that function address is referred to. The linker uses this | |
3010 | information when doing relaxing, to decide when it can eliminate | |
3011 | the stored function address entirely. */ | |
3012 | ||
3013 | void | |
8edc77b9 | 3014 | sh_frob_file (void) |
252b5132 RH |
3015 | { |
3016 | if (! sh_relax) | |
3017 | return; | |
3018 | ||
8edc77b9 | 3019 | bfd_map_over_sections (stdoutput, sh_frob_section, NULL); |
252b5132 RH |
3020 | } |
3021 | ||
3022 | /* Called after relaxing. Set the correct sizes of the fragments, and | |
55cf6793 | 3023 | create relocs so that md_apply_fix will fill in the correct values. */ |
252b5132 RH |
3024 | |
3025 | void | |
8edc77b9 | 3026 | md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT seg, fragS *fragP) |
252b5132 RH |
3027 | { |
3028 | int donerelax = 0; | |
3029 | ||
3030 | switch (fragP->fr_subtype) | |
3031 | { | |
3032 | case C (COND_JUMP, COND8): | |
3033 | case C (COND_JUMP_DELAY, COND8): | |
3034 | subseg_change (seg, 0); | |
3035 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
3036 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
3037 | fragP->fr_fix += 2; | |
3038 | fragP->fr_var = 0; | |
3039 | break; | |
3040 | ||
3041 | case C (UNCOND_JUMP, UNCOND12): | |
3042 | subseg_change (seg, 0); | |
3043 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
3044 | 1, BFD_RELOC_SH_PCDISP12BY2); | |
3045 | fragP->fr_fix += 2; | |
3046 | fragP->fr_var = 0; | |
3047 | break; | |
3048 | ||
3049 | case C (UNCOND_JUMP, UNCOND32): | |
3050 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): | |
3051 | if (fragP->fr_symbol == NULL) | |
99b222b4 HPN |
3052 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3053 | _("displacement overflows 12-bit field")); | |
252b5132 | 3054 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
99b222b4 HPN |
3055 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3056 | _("displacement to defined symbol %s overflows 12-bit field"), | |
3057 | S_GET_NAME (fragP->fr_symbol)); | |
252b5132 | 3058 | else |
99b222b4 HPN |
3059 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3060 | _("displacement to undefined symbol %s overflows 12-bit field"), | |
3061 | S_GET_NAME (fragP->fr_symbol)); | |
3062 | /* Stabilize this frag, so we don't trip an assert. */ | |
3063 | fragP->fr_fix += fragP->fr_var; | |
3064 | fragP->fr_var = 0; | |
252b5132 RH |
3065 | break; |
3066 | ||
3067 | case C (COND_JUMP, COND12): | |
3068 | case C (COND_JUMP_DELAY, COND12): | |
6b31947e | 3069 | /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */ |
252b5132 RH |
3070 | /* I found that a relax failure for gcc.c-torture/execute/930628-1.c |
3071 | was due to gas incorrectly relaxing an out-of-range conditional | |
3072 | branch with delay slot. It turned: | |
3073 | bf.s L6 (slot mov.l r12,@(44,r0)) | |
3074 | into: | |
c4aa876b | 3075 | |
252b5132 RH |
3076 | 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) |
3077 | 30: 00 09 nop | |
3078 | 32: 10 cb mov.l r12,@(44,r0) | |
3079 | Therefore, branches with delay slots have to be handled | |
3080 | differently from ones without delay slots. */ | |
3081 | { | |
3082 | unsigned char *buffer = | |
3083 | (unsigned char *) (fragP->fr_fix + fragP->fr_literal); | |
3084 | int highbyte = target_big_endian ? 0 : 1; | |
3085 | int lowbyte = target_big_endian ? 1 : 0; | |
3086 | int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); | |
3087 | ||
3088 | /* Toggle the true/false bit of the bcond. */ | |
3089 | buffer[highbyte] ^= 0x2; | |
3090 | ||
d3ecfc59 | 3091 | /* If this is a delayed branch, we may not put the bra in the |
252b5132 RH |
3092 | slot. So we change it to a non-delayed branch, like that: |
3093 | b! cond slot_label; bra disp; slot_label: slot_insn | |
3094 | ??? We should try if swapping the conditional branch and | |
3095 | its delay-slot insn already makes the branch reach. */ | |
3096 | ||
3097 | /* Build a relocation to six / four bytes farther on. */ | |
3098 | subseg_change (seg, 0); | |
7be1c489 | 3099 | fix_new (fragP, fragP->fr_fix, 2, section_symbol (seg), |
252b5132 RH |
3100 | fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), |
3101 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
3102 | ||
3103 | /* Set up a jump instruction. */ | |
3104 | buffer[highbyte + 2] = 0xa0; | |
3105 | buffer[lowbyte + 2] = 0; | |
3106 | fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, | |
3107 | fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); | |
3108 | ||
3109 | if (delay) | |
3110 | { | |
3111 | buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ | |
3112 | fragP->fr_fix += 4; | |
3113 | } | |
3114 | else | |
3115 | { | |
3116 | /* Fill in a NOP instruction. */ | |
3117 | buffer[highbyte + 4] = 0x0; | |
3118 | buffer[lowbyte + 4] = 0x9; | |
3119 | ||
3120 | fragP->fr_fix += 6; | |
3121 | } | |
3122 | fragP->fr_var = 0; | |
3123 | donerelax = 1; | |
3124 | } | |
3125 | break; | |
3126 | ||
3127 | case C (COND_JUMP, COND32): | |
3128 | case C (COND_JUMP_DELAY, COND32): | |
3129 | case C (COND_JUMP, UNDEF_WORD_DISP): | |
3130 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): | |
3131 | if (fragP->fr_symbol == NULL) | |
99b222b4 HPN |
3132 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3133 | _("displacement overflows 8-bit field")); | |
252b5132 | 3134 | else if (S_IS_DEFINED (fragP->fr_symbol)) |
99b222b4 HPN |
3135 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3136 | _("displacement to defined symbol %s overflows 8-bit field"), | |
3137 | S_GET_NAME (fragP->fr_symbol)); | |
252b5132 | 3138 | else |
99b222b4 HPN |
3139 | as_bad_where (fragP->fr_file, fragP->fr_line, |
3140 | _("displacement to undefined symbol %s overflows 8-bit field "), | |
3141 | S_GET_NAME (fragP->fr_symbol)); | |
3142 | /* Stabilize this frag, so we don't trip an assert. */ | |
3143 | fragP->fr_fix += fragP->fr_var; | |
3144 | fragP->fr_var = 0; | |
252b5132 RH |
3145 | break; |
3146 | ||
3147 | default: | |
3148 | abort (); | |
3149 | } | |
3150 | ||
3151 | if (donerelax && !sh_relax) | |
3152 | as_warn_where (fragP->fr_file, fragP->fr_line, | |
3153 | _("overflow in branch to %s; converted into longer instruction sequence"), | |
3154 | (fragP->fr_symbol != NULL | |
3155 | ? S_GET_NAME (fragP->fr_symbol) | |
3156 | : "")); | |
3157 | } | |
3158 | ||
3159 | valueT | |
8edc77b9 | 3160 | md_section_align (segT seg ATTRIBUTE_UNUSED, valueT size) |
252b5132 | 3161 | { |
252b5132 RH |
3162 | #ifdef OBJ_ELF |
3163 | return size; | |
3164 | #else /* ! OBJ_ELF */ | |
fd361982 AM |
3165 | return ((size + (1 << bfd_section_alignment (seg)) - 1) |
3166 | & -(1 << bfd_section_alignment (seg))); | |
252b5132 | 3167 | #endif /* ! OBJ_ELF */ |
252b5132 RH |
3168 | } |
3169 | ||
3170 | /* This static variable is set by s_uacons to tell sh_cons_align that | |
67c1ffbe | 3171 | the expression does not need to be aligned. */ |
252b5132 RH |
3172 | |
3173 | static int sh_no_align_cons = 0; | |
3174 | ||
3175 | /* This handles the unaligned space allocation pseudo-ops, such as | |
3176 | .uaword. .uaword is just like .word, but the value does not need | |
3177 | to be aligned. */ | |
3178 | ||
3179 | static void | |
8edc77b9 | 3180 | s_uacons (int bytes) |
252b5132 RH |
3181 | { |
3182 | /* Tell sh_cons_align not to align this value. */ | |
3183 | sh_no_align_cons = 1; | |
3184 | cons (bytes); | |
3185 | } | |
3186 | ||
3187 | /* If a .word, et. al., pseud-op is seen, warn if the value is not | |
3188 | aligned correctly. Note that this can cause warnings to be issued | |
3189 | when assembling initialized structured which were declared with the | |
3190 | packed attribute. FIXME: Perhaps we should require an option to | |
3191 | enable this warning? */ | |
3192 | ||
3193 | void | |
8edc77b9 | 3194 | sh_cons_align (int nbytes) |
252b5132 RH |
3195 | { |
3196 | int nalign; | |
252b5132 RH |
3197 | |
3198 | if (sh_no_align_cons) | |
3199 | { | |
3200 | /* This is an unaligned pseudo-op. */ | |
3201 | sh_no_align_cons = 0; | |
3202 | return; | |
3203 | } | |
3204 | ||
3205 | nalign = 0; | |
3206 | while ((nbytes & 1) == 0) | |
3207 | { | |
3208 | ++nalign; | |
3209 | nbytes >>= 1; | |
3210 | } | |
3211 | ||
3212 | if (nalign == 0) | |
3213 | return; | |
3214 | ||
3215 | if (now_seg == absolute_section) | |
3216 | { | |
3217 | if ((abs_section_offset & ((1 << nalign) - 1)) != 0) | |
3218 | as_warn (_("misaligned data")); | |
3219 | return; | |
3220 | } | |
3221 | ||
87975d2a AM |
3222 | frag_var (rs_align_test, 1, 1, (relax_substateT) 0, |
3223 | (symbolS *) NULL, (offsetT) nalign, (char *) NULL); | |
252b5132 RH |
3224 | |
3225 | record_alignment (now_seg, nalign); | |
3226 | } | |
3227 | ||
3228 | /* When relaxing, we need to output a reloc for any .align directive | |
3229 | that requests alignment to a four byte boundary or larger. This is | |
3230 | also where we check for misaligned data. */ | |
3231 | ||
3232 | void | |
8edc77b9 | 3233 | sh_handle_align (fragS *frag) |
252b5132 | 3234 | { |
0a9ef439 RH |
3235 | int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix; |
3236 | ||
3237 | if (frag->fr_type == rs_align_code) | |
3238 | { | |
3239 | static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; | |
3240 | static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; | |
3241 | ||
3242 | char *p = frag->fr_literal + frag->fr_fix; | |
3243 | ||
3244 | if (bytes & 1) | |
3245 | { | |
3246 | *p++ = 0; | |
3247 | bytes--; | |
3248 | frag->fr_fix += 1; | |
3249 | } | |
3250 | ||
3251 | if (target_big_endian) | |
3252 | { | |
3253 | memcpy (p, big_nop_pattern, sizeof big_nop_pattern); | |
3254 | frag->fr_var = sizeof big_nop_pattern; | |
3255 | } | |
3256 | else | |
3257 | { | |
3258 | memcpy (p, little_nop_pattern, sizeof little_nop_pattern); | |
3259 | frag->fr_var = sizeof little_nop_pattern; | |
3260 | } | |
3261 | } | |
3262 | else if (frag->fr_type == rs_align_test) | |
3263 | { | |
3264 | if (bytes != 0) | |
91382b56 | 3265 | as_bad_where (frag->fr_file, frag->fr_line, _("misaligned data")); |
0a9ef439 RH |
3266 | } |
3267 | ||
252b5132 | 3268 | if (sh_relax |
0a9ef439 RH |
3269 | && (frag->fr_type == rs_align |
3270 | || frag->fr_type == rs_align_code) | |
252b5132 RH |
3271 | && frag->fr_address + frag->fr_fix > 0 |
3272 | && frag->fr_offset > 1 | |
3273 | && now_seg != bss_section) | |
3274 | fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, | |
3275 | BFD_RELOC_SH_ALIGN); | |
252b5132 RH |
3276 | } |
3277 | ||
28602ebf KK |
3278 | /* See whether the relocation should be resolved locally. */ |
3279 | ||
b34976b6 | 3280 | static bfd_boolean |
8edc77b9 | 3281 | sh_local_pcrel (fixS *fix) |
28602ebf | 3282 | { |
b34976b6 AM |
3283 | return (! sh_relax |
3284 | && (fix->fx_r_type == BFD_RELOC_SH_PCDISP8BY2 | |
3285 | || fix->fx_r_type == BFD_RELOC_SH_PCDISP12BY2 | |
3286 | || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2 | |
3287 | || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4 | |
3288 | || fix->fx_r_type == BFD_RELOC_8_PCREL | |
3289 | || fix->fx_r_type == BFD_RELOC_SH_SWITCH16 | |
3290 | || fix->fx_r_type == BFD_RELOC_SH_SWITCH32)); | |
28602ebf KK |
3291 | } |
3292 | ||
252b5132 RH |
3293 | /* See whether we need to force a relocation into the output file. |
3294 | This is used to force out switch and PC relative relocations when | |
3295 | relaxing. */ | |
3296 | ||
3297 | int | |
8edc77b9 | 3298 | sh_force_relocation (fixS *fix) |
252b5132 | 3299 | { |
8ba4dac0 DJ |
3300 | /* These relocations can't make it into a DSO, so no use forcing |
3301 | them for global symbols. */ | |
28602ebf | 3302 | if (sh_local_pcrel (fix)) |
8ba4dac0 DJ |
3303 | return 0; |
3304 | ||
9efb3b7b | 3305 | /* Make sure some relocations get emitted. */ |
ae6063d4 | 3306 | if (fix->fx_r_type == BFD_RELOC_SH_LOOP_START |
a161fe53 | 3307 | || fix->fx_r_type == BFD_RELOC_SH_LOOP_END |
9efb3b7b KK |
3308 | || fix->fx_r_type == BFD_RELOC_SH_TLS_GD_32 |
3309 | || fix->fx_r_type == BFD_RELOC_SH_TLS_LD_32 | |
3310 | || fix->fx_r_type == BFD_RELOC_SH_TLS_IE_32 | |
3311 | || fix->fx_r_type == BFD_RELOC_SH_TLS_LDO_32 | |
3312 | || fix->fx_r_type == BFD_RELOC_SH_TLS_LE_32 | |
ae6063d4 | 3313 | || generic_force_reloc (fix)) |
252b5132 RH |
3314 | return 1; |
3315 | ||
3316 | if (! sh_relax) | |
3317 | return 0; | |
3318 | ||
3319 | return (fix->fx_pcrel | |
3320 | || SWITCH_TABLE (fix) | |
3321 | || fix->fx_r_type == BFD_RELOC_SH_COUNT | |
3322 | || fix->fx_r_type == BFD_RELOC_SH_ALIGN | |
3323 | || fix->fx_r_type == BFD_RELOC_SH_CODE | |
3324 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
3325 | || fix->fx_r_type == BFD_RELOC_SH_LABEL); | |
3326 | } | |
3327 | ||
3328 | #ifdef OBJ_ELF | |
b34976b6 | 3329 | bfd_boolean |
8edc77b9 | 3330 | sh_fix_adjustable (fixS *fixP) |
252b5132 | 3331 | { |
a161fe53 AM |
3332 | if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL |
3333 | || fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL | |
8e45593f | 3334 | || fixP->fx_r_type == BFD_RELOC_SH_GOT20 |
a161fe53 | 3335 | || fixP->fx_r_type == BFD_RELOC_SH_GOTPC |
8e45593f NC |
3336 | || fixP->fx_r_type == BFD_RELOC_SH_GOTFUNCDESC |
3337 | || fixP->fx_r_type == BFD_RELOC_SH_GOTFUNCDESC20 | |
3338 | || fixP->fx_r_type == BFD_RELOC_SH_GOTOFFFUNCDESC | |
3339 | || fixP->fx_r_type == BFD_RELOC_SH_GOTOFFFUNCDESC20 | |
3340 | || fixP->fx_r_type == BFD_RELOC_SH_FUNCDESC | |
f55629b8 | 3341 | || ((fixP->fx_r_type == BFD_RELOC_32) && dont_adjust_reloc_32) |
a1cc9221 AO |
3342 | || fixP->fx_r_type == BFD_RELOC_RVA) |
3343 | return 0; | |
3344 | ||
252b5132 RH |
3345 | /* We need the symbol name for the VTABLE entries */ |
3346 | if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
3347 | || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
3348 | return 0; | |
3349 | ||
3350 | return 1; | |
3351 | } | |
d4845d57 | 3352 | |
6b31947e | 3353 | void |
8edc77b9 | 3354 | sh_elf_final_processing (void) |
d4845d57 JR |
3355 | { |
3356 | int val; | |
3357 | ||
3358 | /* Set file-specific flags to indicate if this code needs | |
88da98f3 | 3359 | a processor with the sh-dsp / sh2e ISA to execute. */ |
211dc24b | 3360 | val = sh_find_elf_flags (valid_arch); |
d4845d57 JR |
3361 | |
3362 | elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; | |
3363 | elf_elfheader (stdoutput)->e_flags |= val; | |
8e45593f NC |
3364 | |
3365 | if (sh_fdpic) | |
3366 | elf_elfheader (stdoutput)->e_flags |= EF_SH_FDPIC; | |
3367 | } | |
3368 | #endif | |
3369 | ||
3370 | #ifdef TE_UCLINUX | |
3371 | /* Return the target format for uClinux. */ | |
3372 | ||
3373 | const char * | |
3374 | sh_uclinux_target_format (void) | |
3375 | { | |
3376 | if (sh_fdpic) | |
3377 | return (!target_big_endian ? "elf32-sh-fdpic" : "elf32-shbig-fdpic"); | |
3378 | else | |
3379 | return (!target_big_endian ? "elf32-shl" : "elf32-sh"); | |
d4845d57 | 3380 | } |
252b5132 RH |
3381 | #endif |
3382 | ||
55e6e397 RS |
3383 | /* Apply fixup FIXP to SIZE-byte field BUF given that VAL is its |
3384 | assembly-time value. If we're generating a reloc for FIXP, | |
3385 | see whether the addend should be stored in-place or whether | |
3386 | it should be in an ELF r_addend field. */ | |
3387 | ||
3388 | static void | |
3389 | apply_full_field_fix (fixS *fixP, char *buf, bfd_vma val, int size) | |
3390 | { | |
3391 | reloc_howto_type *howto; | |
3392 | ||
3393 | if (fixP->fx_addsy != NULL || fixP->fx_pcrel) | |
3394 | { | |
3395 | howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); | |
3396 | if (howto && !howto->partial_inplace) | |
3397 | { | |
3398 | fixP->fx_addnumber = val; | |
3399 | return; | |
3400 | } | |
3401 | } | |
3402 | md_number_to_chars (buf, val, size); | |
3403 | } | |
3404 | ||
252b5132 RH |
3405 | /* Apply a fixup to the object file. */ |
3406 | ||
252b5132 | 3407 | void |
55cf6793 | 3408 | md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) |
252b5132 RH |
3409 | { |
3410 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; | |
3411 | int lowbyte = target_big_endian ? 1 : 0; | |
3412 | int highbyte = target_big_endian ? 0 : 1; | |
2ed5f585 | 3413 | long val = (long) *valP; |
252b5132 RH |
3414 | long max, min; |
3415 | int shift; | |
3416 | ||
a1cc9221 AO |
3417 | /* A difference between two symbols, the second of which is in the |
3418 | current section, is transformed in a PC-relative relocation to | |
3419 | the other symbol. We have to adjust the relocation type here. */ | |
3420 | if (fixP->fx_pcrel) | |
3421 | { | |
3422 | switch (fixP->fx_r_type) | |
3423 | { | |
3424 | default: | |
3425 | break; | |
3426 | ||
3427 | case BFD_RELOC_32: | |
3428 | fixP->fx_r_type = BFD_RELOC_32_PCREL; | |
3429 | break; | |
3430 | ||
3431 | /* Currently, we only support 32-bit PCREL relocations. | |
3432 | We'd need a new reloc type to handle 16_PCREL, and | |
3433 | 8_PCREL is already taken for R_SH_SWITCH8, which | |
3434 | apparently does something completely different than what | |
3435 | we need. FIXME. */ | |
3436 | case BFD_RELOC_16: | |
3437 | bfd_set_error (bfd_error_bad_value); | |
94f592af | 3438 | return; |
81d4177b | 3439 | |
a1cc9221 AO |
3440 | case BFD_RELOC_8: |
3441 | bfd_set_error (bfd_error_bad_value); | |
94f592af | 3442 | return; |
a1cc9221 AO |
3443 | } |
3444 | } | |
3445 | ||
6b31947e NC |
3446 | /* The function adjust_reloc_syms won't convert a reloc against a weak |
3447 | symbol into a reloc against a section, but bfd_install_relocation | |
3448 | will screw up if the symbol is defined, so we have to adjust val here | |
1308f14c HPN |
3449 | to avoid the screw up later. |
3450 | ||
3451 | For ordinary relocs, this does not happen for ELF, since for ELF, | |
3452 | bfd_install_relocation uses the "special function" field of the | |
3453 | howto, and does not execute the code that needs to be undone, as long | |
3454 | as the special function does not return bfd_reloc_continue. | |
3455 | It can happen for GOT- and PLT-type relocs the way they are | |
3456 | described in elf32-sh.c as they use bfd_elf_generic_reloc, but it | |
3457 | doesn't matter here since those relocs don't use VAL; see below. */ | |
3458 | if (OUTPUT_FLAVOR != bfd_target_elf_flavour | |
3459 | && fixP->fx_addsy != NULL | |
252b5132 RH |
3460 | && S_IS_WEAK (fixP->fx_addsy)) |
3461 | val -= S_GET_VALUE (fixP->fx_addsy); | |
252b5132 | 3462 | |
bdfaef52 JR |
3463 | if (SWITCH_TABLE (fixP)) |
3464 | val -= S_GET_VALUE (fixP->fx_subsy); | |
252b5132 RH |
3465 | |
3466 | max = min = 0; | |
3467 | shift = 0; | |
3468 | switch (fixP->fx_r_type) | |
3469 | { | |
1d70c7fb AO |
3470 | case BFD_RELOC_SH_IMM3: |
3471 | max = 0x7; | |
3472 | * buf = (* buf & 0xf8) | (val & 0x7); | |
3473 | break; | |
3474 | case BFD_RELOC_SH_IMM3U: | |
3475 | max = 0x7; | |
3476 | * buf = (* buf & 0x8f) | ((val & 0x7) << 4); | |
3477 | break; | |
3478 | case BFD_RELOC_SH_DISP12: | |
3479 | max = 0xfff; | |
3480 | buf[lowbyte] = val & 0xff; | |
3481 | buf[highbyte] |= (val >> 8) & 0x0f; | |
3482 | break; | |
3483 | case BFD_RELOC_SH_DISP12BY2: | |
3484 | max = 0xfff; | |
3485 | shift = 1; | |
3486 | buf[lowbyte] = (val >> 1) & 0xff; | |
3487 | buf[highbyte] |= (val >> 9) & 0x0f; | |
3488 | break; | |
3489 | case BFD_RELOC_SH_DISP12BY4: | |
3490 | max = 0xfff; | |
3491 | shift = 2; | |
3492 | buf[lowbyte] = (val >> 2) & 0xff; | |
3493 | buf[highbyte] |= (val >> 10) & 0x0f; | |
3494 | break; | |
3495 | case BFD_RELOC_SH_DISP12BY8: | |
3496 | max = 0xfff; | |
3497 | shift = 3; | |
3498 | buf[lowbyte] = (val >> 3) & 0xff; | |
3499 | buf[highbyte] |= (val >> 11) & 0x0f; | |
3500 | break; | |
3501 | case BFD_RELOC_SH_DISP20: | |
3502 | if (! target_big_endian) | |
3503 | abort(); | |
3504 | max = 0x7ffff; | |
3505 | min = -0x80000; | |
28013b5c | 3506 | buf[1] = (buf[1] & 0x0f) | ((val >> 12) & 0xf0); |
1d70c7fb AO |
3507 | buf[2] = (val >> 8) & 0xff; |
3508 | buf[3] = val & 0xff; | |
3509 | break; | |
3510 | case BFD_RELOC_SH_DISP20BY8: | |
3511 | if (!target_big_endian) | |
3512 | abort(); | |
3513 | max = 0x7ffff; | |
3514 | min = -0x80000; | |
3515 | shift = 8; | |
28013b5c | 3516 | buf[1] = (buf[1] & 0x0f) | ((val >> 20) & 0xf0); |
1d70c7fb AO |
3517 | buf[2] = (val >> 16) & 0xff; |
3518 | buf[3] = (val >> 8) & 0xff; | |
3519 | break; | |
3520 | ||
252b5132 RH |
3521 | case BFD_RELOC_SH_IMM4: |
3522 | max = 0xf; | |
3523 | *buf = (*buf & 0xf0) | (val & 0xf); | |
3524 | break; | |
3525 | ||
3526 | case BFD_RELOC_SH_IMM4BY2: | |
3527 | max = 0xf; | |
3528 | shift = 1; | |
3529 | *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); | |
3530 | break; | |
3531 | ||
3532 | case BFD_RELOC_SH_IMM4BY4: | |
3533 | max = 0xf; | |
3534 | shift = 2; | |
3535 | *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); | |
3536 | break; | |
3537 | ||
3538 | case BFD_RELOC_SH_IMM8BY2: | |
3539 | max = 0xff; | |
3540 | shift = 1; | |
3541 | *buf = val >> 1; | |
3542 | break; | |
3543 | ||
3544 | case BFD_RELOC_SH_IMM8BY4: | |
3545 | max = 0xff; | |
3546 | shift = 2; | |
3547 | *buf = val >> 2; | |
3548 | break; | |
3549 | ||
3550 | case BFD_RELOC_8: | |
3551 | case BFD_RELOC_SH_IMM8: | |
3552 | /* Sometimes the 8 bit value is sign extended (e.g., add) and | |
3553 | sometimes it is not (e.g., and). We permit any 8 bit value. | |
3554 | Note that adding further restrictions may invalidate | |
3555 | reasonable looking assembly code, such as ``and -0x1,r0''. */ | |
3556 | max = 0xff; | |
c4aa876b | 3557 | min = -0xff; |
252b5132 RH |
3558 | *buf++ = val; |
3559 | break; | |
3560 | ||
3561 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
52b5ca5b AS |
3562 | /* If we are dealing with a known destination ... */ |
3563 | if ((fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) | |
3564 | && (fixP->fx_subsy == NULL || S_IS_DEFINED (fixP->fx_addsy))) | |
3565 | { | |
3566 | /* Don't silently move the destination due to misalignment. | |
3567 | The absolute address is the fragment base plus the offset into | |
3568 | the fragment plus the pc relative offset to the label. */ | |
3569 | if ((fixP->fx_frag->fr_address + fixP->fx_where + val) & 3) | |
3570 | as_bad_where (fixP->fx_file, fixP->fx_line, | |
3571 | _("offset to unaligned destination")); | |
3572 | ||
3573 | /* The displacement cannot be zero or backward even if aligned. | |
3574 | Allow -2 because val has already been adjusted somewhere. */ | |
3575 | if (val < -2) | |
3576 | as_bad_where (fixP->fx_file, fixP->fx_line, _("negative offset")); | |
3577 | } | |
3578 | ||
252b5132 RH |
3579 | /* The lower two bits of the PC are cleared before the |
3580 | displacement is added in. We can assume that the destination | |
67c1ffbe | 3581 | is on a 4 byte boundary. If this instruction is also on a 4 |
252b5132 RH |
3582 | byte boundary, then we want |
3583 | (target - here) / 4 | |
3584 | and target - here is a multiple of 4. | |
3585 | Otherwise, we are on a 2 byte boundary, and we want | |
3586 | (target - (here - 2)) / 4 | |
3587 | and target - here is not a multiple of 4. Computing | |
3588 | (target - (here - 2)) / 4 == (target - here + 2) / 4 | |
3589 | works for both cases, since in the first case the addition of | |
3590 | 2 will be removed by the division. target - here is in the | |
3591 | variable val. */ | |
3592 | val = (val + 2) / 4; | |
3593 | if (val & ~0xff) | |
3594 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
3595 | buf[lowbyte] = val; | |
3596 | break; | |
3597 | ||
3598 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
3599 | val /= 2; | |
3600 | if (val & ~0xff) | |
3601 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
3602 | buf[lowbyte] = val; | |
3603 | break; | |
3604 | ||
3605 | case BFD_RELOC_SH_PCDISP8BY2: | |
3606 | val /= 2; | |
3607 | if (val < -0x80 || val > 0x7f) | |
3608 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
3609 | buf[lowbyte] = val; | |
3610 | break; | |
3611 | ||
3612 | case BFD_RELOC_SH_PCDISP12BY2: | |
3613 | val /= 2; | |
8637c045 | 3614 | if (val < -0x800 || val > 0x7ff) |
252b5132 RH |
3615 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); |
3616 | buf[lowbyte] = val & 0xff; | |
3617 | buf[highbyte] |= (val >> 8) & 0xf; | |
3618 | break; | |
3619 | ||
3620 | case BFD_RELOC_32: | |
a1cc9221 | 3621 | case BFD_RELOC_32_PCREL: |
55e6e397 | 3622 | apply_full_field_fix (fixP, buf, val, 4); |
252b5132 RH |
3623 | break; |
3624 | ||
3625 | case BFD_RELOC_16: | |
55e6e397 | 3626 | apply_full_field_fix (fixP, buf, val, 2); |
252b5132 RH |
3627 | break; |
3628 | ||
3629 | case BFD_RELOC_SH_USES: | |
fefaa1aa | 3630 | /* Pass the value into sh_reloc(). */ |
252b5132 RH |
3631 | fixP->fx_addnumber = val; |
3632 | break; | |
3633 | ||
3634 | case BFD_RELOC_SH_COUNT: | |
3635 | case BFD_RELOC_SH_ALIGN: | |
3636 | case BFD_RELOC_SH_CODE: | |
3637 | case BFD_RELOC_SH_DATA: | |
3638 | case BFD_RELOC_SH_LABEL: | |
3639 | /* Nothing to do here. */ | |
3640 | break; | |
3641 | ||
015551fc JR |
3642 | case BFD_RELOC_SH_LOOP_START: |
3643 | case BFD_RELOC_SH_LOOP_END: | |
3644 | ||
252b5132 RH |
3645 | case BFD_RELOC_VTABLE_INHERIT: |
3646 | case BFD_RELOC_VTABLE_ENTRY: | |
3647 | fixP->fx_done = 0; | |
3648 | return; | |
3649 | ||
a1cc9221 AO |
3650 | #ifdef OBJ_ELF |
3651 | case BFD_RELOC_32_PLT_PCREL: | |
3652 | /* Make the jump instruction point to the address of the operand. At | |
81d4177b | 3653 | runtime we merely add the offset to the actual PLT entry. */ |
94f592af | 3654 | * valP = 0xfffffffc; |
0174e383 | 3655 | val = fixP->fx_offset; |
ac3f04d7 AO |
3656 | if (fixP->fx_subsy) |
3657 | val -= S_GET_VALUE (fixP->fx_subsy); | |
55e6e397 | 3658 | apply_full_field_fix (fixP, buf, val, 4); |
a1cc9221 AO |
3659 | break; |
3660 | ||
3661 | case BFD_RELOC_SH_GOTPC: | |
3662 | /* This is tough to explain. We end up with this one if we have | |
3663 | operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". | |
3664 | The goal here is to obtain the absolute address of the GOT, | |
3665 | and it is strongly preferable from a performance point of | |
3666 | view to avoid using a runtime relocation for this. There are | |
3667 | cases where you have something like: | |
81d4177b | 3668 | |
a1cc9221 | 3669 | .long _GLOBAL_OFFSET_TABLE_+[.-.L66] |
81d4177b | 3670 | |
a1cc9221 AO |
3671 | and here no correction would be required. Internally in the |
3672 | assembler we treat operands of this form as not being pcrel | |
3673 | since the '.' is explicitly mentioned, and I wonder whether | |
3674 | it would simplify matters to do it this way. Who knows. In | |
3675 | earlier versions of the PIC patches, the pcrel_adjust field | |
3676 | was used to store the correction, but since the expression is | |
3677 | not pcrel, I felt it would be confusing to do it this way. */ | |
94f592af | 3678 | * valP -= 1; |
55e6e397 | 3679 | apply_full_field_fix (fixP, buf, val, 4); |
a1cc9221 AO |
3680 | break; |
3681 | ||
9efb3b7b KK |
3682 | case BFD_RELOC_SH_TLS_GD_32: |
3683 | case BFD_RELOC_SH_TLS_LD_32: | |
3684 | case BFD_RELOC_SH_TLS_IE_32: | |
2bba4140 KK |
3685 | S_SET_THREAD_LOCAL (fixP->fx_addsy); |
3686 | /* Fallthrough */ | |
3687 | case BFD_RELOC_32_GOT_PCREL: | |
8e45593f | 3688 | case BFD_RELOC_SH_GOT20: |
2bba4140 | 3689 | case BFD_RELOC_SH_GOTPLT32: |
8e45593f NC |
3690 | case BFD_RELOC_SH_GOTFUNCDESC: |
3691 | case BFD_RELOC_SH_GOTFUNCDESC20: | |
3692 | case BFD_RELOC_SH_GOTOFFFUNCDESC: | |
3693 | case BFD_RELOC_SH_GOTOFFFUNCDESC20: | |
3694 | case BFD_RELOC_SH_FUNCDESC: | |
94f592af | 3695 | * valP = 0; /* Fully resolved at runtime. No addend. */ |
55e6e397 | 3696 | apply_full_field_fix (fixP, buf, 0, 4); |
a1cc9221 AO |
3697 | break; |
3698 | ||
9efb3b7b KK |
3699 | case BFD_RELOC_SH_TLS_LDO_32: |
3700 | case BFD_RELOC_SH_TLS_LE_32: | |
2bba4140 KK |
3701 | S_SET_THREAD_LOCAL (fixP->fx_addsy); |
3702 | /* Fallthrough */ | |
3703 | case BFD_RELOC_32_GOTOFF: | |
8e45593f | 3704 | case BFD_RELOC_SH_GOTOFF20: |
55e6e397 | 3705 | apply_full_field_fix (fixP, buf, val, 4); |
a1cc9221 AO |
3706 | break; |
3707 | #endif | |
3708 | ||
252b5132 RH |
3709 | default: |
3710 | abort (); | |
3711 | } | |
3712 | ||
3713 | if (shift != 0) | |
3714 | { | |
3715 | if ((val & ((1 << shift) - 1)) != 0) | |
3716 | as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); | |
3717 | if (val >= 0) | |
3718 | val >>= shift; | |
3719 | else | |
3720 | val = ((val >> shift) | |
3721 | | ((long) -1 & ~ ((long) -1 >> shift))); | |
3722 | } | |
0c9b4fd7 KK |
3723 | |
3724 | /* Extend sign for 64-bit host. */ | |
3725 | val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000; | |
252b5132 RH |
3726 | if (max != 0 && (val < min || val > max)) |
3727 | as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); | |
01eaea5a | 3728 | else if (max != 0) |
33eaf5de | 3729 | /* Stop the generic code from trying to overflow check the value as well. |
01eaea5a NC |
3730 | It may not have the correct value anyway, as we do not store val back |
3731 | into *valP. */ | |
3732 | fixP->fx_no_overflow = 1; | |
252b5132 | 3733 | |
94f592af NC |
3734 | if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) |
3735 | fixP->fx_done = 1; | |
252b5132 RH |
3736 | } |
3737 | ||
3738 | /* Called just before address relaxation. Return the length | |
3739 | by which a fragment must grow to reach it's destination. */ | |
3740 | ||
3741 | int | |
8edc77b9 | 3742 | md_estimate_size_before_relax (fragS *fragP, segT segment_type) |
252b5132 | 3743 | { |
e66457fb AM |
3744 | int what; |
3745 | ||
252b5132 RH |
3746 | switch (fragP->fr_subtype) |
3747 | { | |
93c2a809 AM |
3748 | default: |
3749 | abort (); | |
3750 | ||
252b5132 | 3751 | case C (UNCOND_JUMP, UNDEF_DISP): |
6b31947e | 3752 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
3753 | if (!fragP->fr_symbol) |
3754 | { | |
3755 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
252b5132 RH |
3756 | } |
3757 | else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
3758 | { | |
3759 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
252b5132 RH |
3760 | } |
3761 | else | |
3762 | { | |
3763 | fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); | |
252b5132 RH |
3764 | } |
3765 | break; | |
3766 | ||
252b5132 RH |
3767 | case C (COND_JUMP, UNDEF_DISP): |
3768 | case C (COND_JUMP_DELAY, UNDEF_DISP): | |
e66457fb | 3769 | what = GET_WHAT (fragP->fr_subtype); |
6b31947e | 3770 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
3771 | if (fragP->fr_symbol |
3772 | && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
3773 | { | |
252b5132 | 3774 | /* Got a symbol and it's defined in this segment, become byte |
6b31947e | 3775 | sized - maybe it will fix up. */ |
252b5132 | 3776 | fragP->fr_subtype = C (what, COND8); |
252b5132 RH |
3777 | } |
3778 | else if (fragP->fr_symbol) | |
3779 | { | |
33eaf5de | 3780 | /* It's got a segment, but it's not ours, so it will always be long. */ |
252b5132 | 3781 | fragP->fr_subtype = C (what, UNDEF_WORD_DISP); |
252b5132 RH |
3782 | } |
3783 | else | |
3784 | { | |
6b31947e | 3785 | /* We know the abs value. */ |
252b5132 | 3786 | fragP->fr_subtype = C (what, COND8); |
252b5132 | 3787 | } |
93c2a809 | 3788 | break; |
252b5132 | 3789 | |
93c2a809 | 3790 | case C (UNCOND_JUMP, UNCOND12): |
e66457fb | 3791 | case C (UNCOND_JUMP, UNCOND32): |
93c2a809 AM |
3792 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): |
3793 | case C (COND_JUMP, COND8): | |
e66457fb AM |
3794 | case C (COND_JUMP, COND12): |
3795 | case C (COND_JUMP, COND32): | |
93c2a809 AM |
3796 | case C (COND_JUMP, UNDEF_WORD_DISP): |
3797 | case C (COND_JUMP_DELAY, COND8): | |
e66457fb AM |
3798 | case C (COND_JUMP_DELAY, COND12): |
3799 | case C (COND_JUMP_DELAY, COND32): | |
93c2a809 AM |
3800 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): |
3801 | /* When relaxing a section for the second time, we don't need to | |
e66457fb | 3802 | do anything besides return the current size. */ |
252b5132 RH |
3803 | break; |
3804 | } | |
e66457fb AM |
3805 | |
3806 | fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length; | |
252b5132 RH |
3807 | return fragP->fr_var; |
3808 | } | |
3809 | ||
6b31947e | 3810 | /* Put number into target byte order. */ |
252b5132 RH |
3811 | |
3812 | void | |
8edc77b9 | 3813 | md_number_to_chars (char *ptr, valueT use, int nbytes) |
252b5132 RH |
3814 | { |
3815 | if (! target_big_endian) | |
3816 | number_to_chars_littleendian (ptr, use, nbytes); | |
3817 | else | |
3818 | number_to_chars_bigendian (ptr, use, nbytes); | |
3819 | } | |
3820 | ||
7be1c489 | 3821 | /* This version is used in obj-coff.c eg. for the sh-hms target. */ |
cce5a618 NC |
3822 | |
3823 | long | |
8edc77b9 | 3824 | md_pcrel_from (fixS *fixP) |
cce5a618 NC |
3825 | { |
3826 | return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; | |
3827 | } | |
3828 | ||
252b5132 | 3829 | long |
8edc77b9 | 3830 | md_pcrel_from_section (fixS *fixP, segT sec) |
252b5132 | 3831 | { |
28602ebf KK |
3832 | if (! sh_local_pcrel (fixP) |
3833 | && fixP->fx_addsy != (symbolS *) NULL | |
ae6063d4 | 3834 | && (generic_force_reloc (fixP) |
ef17112f HPN |
3835 | || S_GET_SEGMENT (fixP->fx_addsy) != sec)) |
3836 | { | |
3837 | /* The symbol is undefined (or is defined but not in this section, | |
3838 | or we're not sure about it being the final definition). Let the | |
3839 | linker figure it out. We need to adjust the subtraction of a | |
3840 | symbol to the position of the relocated data, though. */ | |
3841 | return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0; | |
3842 | } | |
3843 | ||
cce5a618 | 3844 | return md_pcrel_from (fixP); |
252b5132 RH |
3845 | } |
3846 | ||
252b5132 RH |
3847 | /* Create a reloc. */ |
3848 | ||
3849 | arelent * | |
8edc77b9 | 3850 | tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) |
252b5132 RH |
3851 | { |
3852 | arelent *rel; | |
3853 | bfd_reloc_code_real_type r_type; | |
3854 | ||
add39d23 TS |
3855 | rel = XNEW (arelent); |
3856 | rel->sym_ptr_ptr = XNEW (asymbol *); | |
49309057 | 3857 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); |
252b5132 RH |
3858 | rel->address = fixp->fx_frag->fr_address + fixp->fx_where; |
3859 | ||
3860 | r_type = fixp->fx_r_type; | |
3861 | ||
3862 | if (SWITCH_TABLE (fixp)) | |
3863 | { | |
bdfaef52 | 3864 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy); |
b131d1fc | 3865 | rel->addend = rel->address - S_GET_VALUE(fixp->fx_subsy); |
252b5132 RH |
3866 | if (r_type == BFD_RELOC_16) |
3867 | r_type = BFD_RELOC_SH_SWITCH16; | |
3868 | else if (r_type == BFD_RELOC_8) | |
3869 | r_type = BFD_RELOC_8_PCREL; | |
3870 | else if (r_type == BFD_RELOC_32) | |
3871 | r_type = BFD_RELOC_SH_SWITCH32; | |
3872 | else | |
3873 | abort (); | |
3874 | } | |
3875 | else if (r_type == BFD_RELOC_SH_USES) | |
3876 | rel->addend = fixp->fx_addnumber; | |
3877 | else if (r_type == BFD_RELOC_SH_COUNT) | |
3878 | rel->addend = fixp->fx_offset; | |
3879 | else if (r_type == BFD_RELOC_SH_ALIGN) | |
3880 | rel->addend = fixp->fx_offset; | |
3881 | else if (r_type == BFD_RELOC_VTABLE_INHERIT | |
3882 | || r_type == BFD_RELOC_VTABLE_ENTRY) | |
3883 | rel->addend = fixp->fx_offset; | |
015551fc JR |
3884 | else if (r_type == BFD_RELOC_SH_LOOP_START |
3885 | || r_type == BFD_RELOC_SH_LOOP_END) | |
3886 | rel->addend = fixp->fx_offset; | |
3887 | else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel) | |
3888 | { | |
3889 | rel->addend = 0; | |
3890 | rel->address = rel->addend = fixp->fx_offset; | |
3891 | } | |
252b5132 | 3892 | else |
55e6e397 | 3893 | rel->addend = fixp->fx_addnumber; |
252b5132 RH |
3894 | |
3895 | rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); | |
78878175 | 3896 | |
a161fe53 | 3897 | if (rel->howto == NULL) |
252b5132 RH |
3898 | { |
3899 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
3900 | _("Cannot represent relocation type %s"), | |
3901 | bfd_get_reloc_code_name (r_type)); | |
3902 | /* Set howto to a garbage value so that we can keep going. */ | |
3903 | rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); | |
9c2799c2 | 3904 | gas_assert (rel->howto != NULL); |
252b5132 | 3905 | } |
78878175 NC |
3906 | #ifdef OBJ_ELF |
3907 | else if (rel->howto->type == R_SH_IND12W) | |
3908 | rel->addend += fixp->fx_offset - 4; | |
3909 | #endif | |
252b5132 RH |
3910 | |
3911 | return rel; | |
3912 | } | |
3913 | ||
538cd60f AO |
3914 | #ifdef OBJ_ELF |
3915 | inline static char * | |
e0471c16 | 3916 | sh_end_of_match (char *cont, const char *what) |
538cd60f AO |
3917 | { |
3918 | int len = strlen (what); | |
3919 | ||
3920 | if (strncasecmp (cont, what, strlen (what)) == 0 | |
3921 | && ! is_part_of_name (cont[len])) | |
3922 | return cont + len; | |
3923 | ||
3924 | return NULL; | |
5d6255fe | 3925 | } |
538cd60f AO |
3926 | |
3927 | int | |
9497f5ac NC |
3928 | sh_parse_name (char const *name, |
3929 | expressionS *exprP, | |
3930 | enum expr_mode mode, | |
3931 | char *nextcharP) | |
538cd60f AO |
3932 | { |
3933 | char *next = input_line_pointer; | |
3934 | char *next_end; | |
3935 | int reloc_type; | |
3936 | segT segment; | |
3937 | ||
3938 | exprP->X_op_symbol = NULL; | |
3939 | ||
3940 | if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) | |
3941 | { | |
3942 | if (! GOT_symbol) | |
3943 | GOT_symbol = symbol_find_or_make (name); | |
3944 | ||
3945 | exprP->X_add_symbol = GOT_symbol; | |
3946 | no_suffix: | |
3947 | /* If we have an absolute symbol or a reg, then we know its | |
37dedf66 | 3948 | value now. */ |
538cd60f | 3949 | segment = S_GET_SEGMENT (exprP->X_add_symbol); |
9497f5ac | 3950 | if (mode != expr_defer && segment == absolute_section) |
538cd60f AO |
3951 | { |
3952 | exprP->X_op = O_constant; | |
3953 | exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); | |
3954 | exprP->X_add_symbol = NULL; | |
3955 | } | |
9497f5ac | 3956 | else if (mode != expr_defer && segment == reg_section) |
538cd60f AO |
3957 | { |
3958 | exprP->X_op = O_register; | |
3959 | exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); | |
3960 | exprP->X_add_symbol = NULL; | |
3961 | } | |
3962 | else | |
3963 | { | |
3964 | exprP->X_op = O_symbol; | |
3965 | exprP->X_add_number = 0; | |
3966 | } | |
3967 | ||
3968 | return 1; | |
3969 | } | |
3970 | ||
3971 | exprP->X_add_symbol = symbol_find_or_make (name); | |
5d6255fe | 3972 | |
538cd60f AO |
3973 | if (*nextcharP != '@') |
3974 | goto no_suffix; | |
3975 | else if ((next_end = sh_end_of_match (next + 1, "GOTOFF"))) | |
3976 | reloc_type = BFD_RELOC_32_GOTOFF; | |
324bfcf3 AO |
3977 | else if ((next_end = sh_end_of_match (next + 1, "GOTPLT"))) |
3978 | reloc_type = BFD_RELOC_SH_GOTPLT32; | |
538cd60f AO |
3979 | else if ((next_end = sh_end_of_match (next + 1, "GOT"))) |
3980 | reloc_type = BFD_RELOC_32_GOT_PCREL; | |
3981 | else if ((next_end = sh_end_of_match (next + 1, "PLT"))) | |
3982 | reloc_type = BFD_RELOC_32_PLT_PCREL; | |
9efb3b7b KK |
3983 | else if ((next_end = sh_end_of_match (next + 1, "TLSGD"))) |
3984 | reloc_type = BFD_RELOC_SH_TLS_GD_32; | |
3985 | else if ((next_end = sh_end_of_match (next + 1, "TLSLDM"))) | |
3986 | reloc_type = BFD_RELOC_SH_TLS_LD_32; | |
3987 | else if ((next_end = sh_end_of_match (next + 1, "GOTTPOFF"))) | |
3988 | reloc_type = BFD_RELOC_SH_TLS_IE_32; | |
3989 | else if ((next_end = sh_end_of_match (next + 1, "TPOFF"))) | |
3990 | reloc_type = BFD_RELOC_SH_TLS_LE_32; | |
3991 | else if ((next_end = sh_end_of_match (next + 1, "DTPOFF"))) | |
3992 | reloc_type = BFD_RELOC_SH_TLS_LDO_32; | |
8e45593f NC |
3993 | else if ((next_end = sh_end_of_match (next + 1, "PCREL"))) |
3994 | reloc_type = BFD_RELOC_32_PCREL; | |
3995 | else if ((next_end = sh_end_of_match (next + 1, "GOTFUNCDESC"))) | |
3996 | reloc_type = BFD_RELOC_SH_GOTFUNCDESC; | |
3997 | else if ((next_end = sh_end_of_match (next + 1, "GOTOFFFUNCDESC"))) | |
3998 | reloc_type = BFD_RELOC_SH_GOTOFFFUNCDESC; | |
3999 | else if ((next_end = sh_end_of_match (next + 1, "FUNCDESC"))) | |
4000 | reloc_type = BFD_RELOC_SH_FUNCDESC; | |
538cd60f AO |
4001 | else |
4002 | goto no_suffix; | |
4003 | ||
4004 | *input_line_pointer = *nextcharP; | |
4005 | input_line_pointer = next_end; | |
4006 | *nextcharP = *input_line_pointer; | |
4007 | *input_line_pointer = '\0'; | |
4008 | ||
4009 | exprP->X_op = O_PIC_reloc; | |
4010 | exprP->X_add_number = 0; | |
4011 | exprP->X_md = reloc_type; | |
4012 | ||
4013 | return 1; | |
4014 | } | |
2ce4cc60 KK |
4015 | |
4016 | void | |
4017 | sh_cfi_frame_initial_instructions (void) | |
4018 | { | |
4019 | cfi_add_CFA_def_cfa (15, 0); | |
4020 | } | |
4021 | ||
4022 | int | |
1df69f4f | 4023 | sh_regname_to_dw2regnum (char *regname) |
2ce4cc60 KK |
4024 | { |
4025 | unsigned int regnum = -1; | |
4026 | unsigned int i; | |
4027 | const char *p; | |
4028 | char *q; | |
e0471c16 | 4029 | static struct { const char *name; int dw2regnum; } regnames[] = |
2ce4cc60 KK |
4030 | { |
4031 | { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 }, | |
4032 | { "macl", 21 }, { "fpul", 23 } | |
4033 | }; | |
4034 | ||
4035 | for (i = 0; i < ARRAY_SIZE (regnames); ++i) | |
4036 | if (strcmp (regnames[i].name, regname) == 0) | |
4037 | return regnames[i].dw2regnum; | |
4038 | ||
4039 | if (regname[0] == 'r') | |
4040 | { | |
4041 | p = regname + 1; | |
4042 | regnum = strtoul (p, &q, 10); | |
4043 | if (p == q || *q || regnum >= 16) | |
4044 | return -1; | |
4045 | } | |
4046 | else if (regname[0] == 'f' && regname[1] == 'r') | |
4047 | { | |
4048 | p = regname + 2; | |
4049 | regnum = strtoul (p, &q, 10); | |
4050 | if (p == q || *q || regnum >= 16) | |
4051 | return -1; | |
4052 | regnum += 25; | |
4053 | } | |
4054 | else if (regname[0] == 'x' && regname[1] == 'd') | |
4055 | { | |
4056 | p = regname + 2; | |
4057 | regnum = strtoul (p, &q, 10); | |
4058 | if (p == q || *q || regnum >= 8) | |
4059 | return -1; | |
4060 | regnum += 87; | |
4061 | } | |
4062 | return regnum; | |
4063 | } | |
f17c130b | 4064 | #endif /* OBJ_ELF */ |