Commit | Line | Data |
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252b5132 | 1 | /* tc-sh.c -- Assemble code for the Hitachi Super-H |
5b8274e3 | 2 | Copyright (C) 1993, 94, 95, 96, 97, 98, 99, 2000 Free Software Foundation. |
252b5132 RH |
3 | |
4 | This file is part of GAS, the GNU Assembler. | |
5 | ||
6 | GAS is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GAS is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GAS; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
19 | Boston, MA 02111-1307, USA. */ | |
20 | ||
6b31947e | 21 | /* Written By Steve Chamberlain <sac@cygnus.com> */ |
252b5132 RH |
22 | |
23 | #include <stdio.h> | |
24 | #include "as.h" | |
25 | #include "bfd.h" | |
26 | #include "subsegs.h" | |
27 | #define DEFINE_TABLE | |
28 | #include "opcodes/sh-opc.h" | |
29 | #include <ctype.h> | |
43841e91 | 30 | #include "struc-symbol.h" |
d4845d57 JR |
31 | |
32 | #ifdef OBJ_ELF | |
33 | #include "elf/sh.h" | |
34 | #endif | |
35 | ||
0d10e182 | 36 | #include "dwarf2dbg.h" |
0d10e182 | 37 | |
252b5132 RH |
38 | const char comment_chars[] = "!"; |
39 | const char line_separator_chars[] = ";"; | |
40 | const char line_comment_chars[] = "!#"; | |
41 | ||
42 | static void s_uses PARAMS ((int)); | |
43 | ||
44 | static void sh_count_relocs PARAMS ((bfd *, segT, PTR)); | |
45 | static void sh_frob_section PARAMS ((bfd *, segT, PTR)); | |
46 | ||
252b5132 RH |
47 | void cons (); |
48 | void s_align_bytes (); | |
49 | static void s_uacons PARAMS ((int)); | |
d4845d57 | 50 | static sh_opcode_info *find_cooked_opcode PARAMS ((char **)); |
0d10e182 | 51 | static unsigned int assemble_ppi PARAMS ((char *, sh_opcode_info *)); |
252b5132 | 52 | |
a1cc9221 AO |
53 | #ifdef OBJ_ELF |
54 | static void sh_elf_cons PARAMS ((int)); | |
55 | ||
56 | symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ | |
57 | #endif | |
58 | ||
252b5132 RH |
59 | int shl = 0; |
60 | ||
61 | static void | |
62 | little (ignore) | |
43841e91 | 63 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
64 | { |
65 | shl = 1; | |
66 | target_big_endian = 0; | |
67 | } | |
68 | ||
d4845d57 JR |
69 | /* This table describes all the machine specific pseudo-ops the assembler |
70 | has to support. The fields are: | |
71 | pseudo-op name without dot | |
72 | function to call to execute this pseudo-op | |
6b31947e | 73 | Integer arg to pass to the function. */ |
d4845d57 | 74 | |
252b5132 RH |
75 | const pseudo_typeS md_pseudo_table[] = |
76 | { | |
a1cc9221 AO |
77 | #ifdef OBJ_ELF |
78 | {"long", sh_elf_cons, 4}, | |
79 | {"int", sh_elf_cons, 4}, | |
80 | {"word", sh_elf_cons, 2}, | |
81 | {"short", sh_elf_cons, 2}, | |
82 | #else | |
252b5132 RH |
83 | {"int", cons, 4}, |
84 | {"word", cons, 2}, | |
a1cc9221 | 85 | #endif /* OBJ_ELF */ |
252b5132 RH |
86 | {"form", listing_psize, 0}, |
87 | {"little", little, 0}, | |
88 | {"heading", listing_title, 0}, | |
89 | {"import", s_ignore, 0}, | |
90 | {"page", listing_eject, 0}, | |
91 | {"program", s_ignore, 0}, | |
92 | {"uses", s_uses, 0}, | |
93 | {"uaword", s_uacons, 2}, | |
94 | {"ualong", s_uacons, 4}, | |
0d10e182 JL |
95 | { "file", dwarf2_directive_file, 0 }, |
96 | { "loc", dwarf2_directive_loc, 0 }, | |
252b5132 RH |
97 | {0, 0, 0} |
98 | }; | |
99 | ||
100 | /*int md_reloc_size; */ | |
101 | ||
102 | int sh_relax; /* set if -relax seen */ | |
103 | ||
104 | /* Whether -small was seen. */ | |
105 | ||
106 | int sh_small; | |
107 | ||
d4845d57 JR |
108 | /* Whether -dsp was seen. */ |
109 | ||
110 | static int sh_dsp; | |
111 | ||
112 | /* The bit mask of architectures that could | |
113 | accomodate the insns seen so far. */ | |
114 | static int valid_arch; | |
115 | ||
252b5132 RH |
116 | const char EXP_CHARS[] = "eE"; |
117 | ||
6b31947e | 118 | /* Chars that mean this number is a floating point constant. */ |
252b5132 RH |
119 | /* As in 0f12.456 */ |
120 | /* or 0d1.2345e12 */ | |
121 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; | |
122 | ||
123 | #define C(a,b) ENCODE_RELAX(a,b) | |
124 | ||
252b5132 RH |
125 | #define ENCODE_RELAX(what,length) (((what) << 4) + (length)) |
126 | #define GET_WHAT(x) ((x>>4)) | |
127 | ||
6b31947e | 128 | /* These are the three types of relaxable instrction. */ |
252b5132 RH |
129 | #define COND_JUMP 1 |
130 | #define COND_JUMP_DELAY 2 | |
131 | #define UNCOND_JUMP 3 | |
132 | #define END 4 | |
133 | ||
134 | #define UNDEF_DISP 0 | |
135 | #define COND8 1 | |
136 | #define COND12 2 | |
137 | #define COND32 3 | |
138 | #define UNCOND12 1 | |
139 | #define UNCOND32 2 | |
140 | #define UNDEF_WORD_DISP 4 | |
141 | ||
142 | #define UNCOND12 1 | |
143 | #define UNCOND32 2 | |
144 | ||
145 | /* Branch displacements are from the address of the branch plus | |
146 | four, thus all minimum and maximum values have 4 added to them. */ | |
147 | #define COND8_F 258 | |
148 | #define COND8_M -252 | |
149 | #define COND8_LENGTH 2 | |
150 | ||
151 | /* There is one extra instruction before the branch, so we must add | |
152 | two more bytes to account for it. */ | |
153 | #define COND12_F 4100 | |
154 | #define COND12_M -4090 | |
155 | #define COND12_LENGTH 6 | |
156 | ||
157 | #define COND12_DELAY_LENGTH 4 | |
158 | ||
159 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
160 | since this relocation type is not supported yet. */ | |
161 | #define COND32_F (1<<30) | |
162 | #define COND32_M -(1<<30) | |
163 | #define COND32_LENGTH 14 | |
164 | ||
165 | #define UNCOND12_F 4098 | |
166 | #define UNCOND12_M -4092 | |
167 | #define UNCOND12_LENGTH 2 | |
168 | ||
169 | /* ??? The minimum and maximum values are wrong, but this does not matter | |
170 | since this relocation type is not supported yet. */ | |
171 | #define UNCOND32_F (1<<30) | |
172 | #define UNCOND32_M -(1<<30) | |
173 | #define UNCOND32_LENGTH 14 | |
174 | ||
43841e91 NC |
175 | #define EMPTY { 0, 0, 0, 0 } |
176 | ||
252b5132 | 177 | const relax_typeS md_relax_table[C (END, 0)] = { |
43841e91 NC |
178 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
179 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
252b5132 | 180 | |
43841e91 | 181 | EMPTY, |
252b5132 RH |
182 | /* C (COND_JUMP, COND8) */ |
183 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, | |
184 | /* C (COND_JUMP, COND12) */ | |
185 | { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, | |
186 | /* C (COND_JUMP, COND32) */ | |
187 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
43841e91 NC |
188 | EMPTY, EMPTY, EMPTY, EMPTY, |
189 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
252b5132 | 190 | |
43841e91 | 191 | EMPTY, |
252b5132 RH |
192 | /* C (COND_JUMP_DELAY, COND8) */ |
193 | { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, | |
194 | /* C (COND_JUMP_DELAY, COND12) */ | |
195 | { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, | |
196 | /* C (COND_JUMP_DELAY, COND32) */ | |
197 | { COND32_F, COND32_M, COND32_LENGTH, 0, }, | |
43841e91 NC |
198 | EMPTY, EMPTY, EMPTY, EMPTY, |
199 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
252b5132 | 200 | |
43841e91 | 201 | EMPTY, |
252b5132 RH |
202 | /* C (UNCOND_JUMP, UNCOND12) */ |
203 | { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, | |
204 | /* C (UNCOND_JUMP, UNCOND32) */ | |
205 | { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, | |
43841e91 NC |
206 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, |
207 | EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, | |
252b5132 RH |
208 | }; |
209 | ||
43841e91 NC |
210 | #undef EMPTY |
211 | ||
252b5132 RH |
212 | static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ |
213 | ||
a1cc9221 AO |
214 | \f |
215 | #ifdef OBJ_ELF | |
81d4177b | 216 | /* Parse @got, etc. and return the desired relocation. |
a1cc9221 AO |
217 | If we have additional arithmetic expression, then we fill in new_exp_p. */ |
218 | static bfd_reloc_code_real_type | |
219 | sh_elf_suffix (str_p, exp_p, new_exp_p) | |
220 | char **str_p; | |
221 | expressionS *exp_p, *new_exp_p; | |
222 | { | |
223 | struct map_bfd { | |
224 | char *string; | |
225 | int length; | |
226 | bfd_reloc_code_real_type reloc; | |
227 | }; | |
228 | ||
229 | char ident[20]; | |
230 | char *str = *str_p; | |
231 | char *str2; | |
232 | int ch; | |
233 | int len; | |
234 | struct map_bfd *ptr; | |
235 | ||
236 | #define MAP(str,reloc) { str, sizeof(str)-1, reloc } | |
237 | ||
238 | static struct map_bfd mapping[] = { | |
239 | MAP ("got", BFD_RELOC_32_GOT_PCREL), | |
240 | MAP ("plt", BFD_RELOC_32_PLT_PCREL), | |
241 | MAP ("gotoff", BFD_RELOC_32_GOTOFF), | |
242 | { (char *)0, 0, BFD_RELOC_UNUSED } | |
243 | }; | |
244 | ||
245 | if (*str++ != '@') | |
246 | return BFD_RELOC_UNUSED; | |
247 | ||
248 | for (ch = *str, str2 = ident; | |
249 | (str2 < ident + sizeof (ident) - 1 | |
250 | && (isalnum (ch) || ch == '@')); | |
251 | ch = *++str) | |
252 | { | |
253 | *str2++ = (islower (ch)) ? ch : tolower (ch); | |
254 | } | |
255 | ||
256 | *str2 = '\0'; | |
257 | len = str2 - ident; | |
258 | ||
259 | ch = ident[0]; | |
260 | for (ptr = &mapping[0]; ptr->length > 0; ptr++) | |
261 | if (ch == ptr->string[0] | |
262 | && len == ptr->length | |
263 | && memcmp (ident, ptr->string, ptr->length) == 0) | |
264 | { | |
265 | /* Now check for identifier@suffix+constant */ | |
266 | if (*str == '-' || *str == '+') | |
267 | { | |
268 | char *orig_line = input_line_pointer; | |
269 | ||
270 | input_line_pointer = str; | |
271 | expression (new_exp_p); | |
272 | if (new_exp_p->X_op == O_constant) | |
273 | { | |
274 | exp_p->X_add_number += new_exp_p->X_add_number; | |
275 | str = input_line_pointer; | |
276 | } | |
277 | if (new_exp_p->X_op == O_subtract) | |
278 | str = input_line_pointer; | |
279 | ||
280 | if (&input_line_pointer != str_p) | |
281 | input_line_pointer = orig_line; | |
282 | } | |
283 | ||
284 | *str_p = str; | |
285 | return ptr->reloc; | |
286 | } | |
287 | ||
288 | return BFD_RELOC_UNUSED; | |
289 | } | |
290 | ||
291 | /* The regular cons() function, that reads constants, doesn't support | |
292 | suffixes such as @GOT, @GOTOFF and @PLT, that generate | |
293 | machine-specific relocation types. So we must define it here. */ | |
294 | /* Clobbers input_line_pointer, checks end-of-line. */ | |
295 | static void | |
296 | sh_elf_cons (nbytes) | |
297 | register int nbytes; /* 1=.byte, 2=.word, 4=.long */ | |
298 | { | |
299 | expressionS exp, new_exp; | |
300 | bfd_reloc_code_real_type reloc; | |
301 | const char *name; | |
302 | ||
303 | if (is_it_end_of_statement ()) | |
304 | { | |
305 | demand_empty_rest_of_line (); | |
306 | return; | |
307 | } | |
308 | ||
309 | do | |
310 | { | |
311 | expression (&exp); | |
312 | new_exp.X_op = O_absent; | |
313 | new_exp.X_add_symbol = new_exp.X_op_symbol = NULL; | |
314 | /* If the _GLOBAL_OFFSET_TABLE_ symbol hasn't been found yet, | |
315 | use the name of the symbol to tell whether it's the | |
316 | _GLOBAL_OFFSET_TABLE_. If it has, comparing the symbols is | |
317 | sufficient. */ | |
318 | if (! GOT_symbol && exp.X_add_symbol) | |
319 | name = S_GET_NAME (exp.X_add_symbol); | |
320 | else | |
321 | name = NULL; | |
322 | /* Check whether this expression involves the | |
323 | _GLOBAL_OFFSET_TABLE_ symbol, by itself or added to a | |
324 | difference of two other symbols. */ | |
325 | if (((GOT_symbol && GOT_symbol == exp.X_add_symbol) | |
326 | || (! GOT_symbol && name | |
327 | && strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)) | |
328 | && (exp.X_op == O_symbol | |
329 | || (exp.X_op == O_add | |
330 | && ((symbol_get_value_expression (exp.X_op_symbol)->X_op) | |
331 | == O_subtract)))) | |
332 | { | |
333 | reloc_howto_type *reloc_howto = bfd_reloc_type_lookup (stdoutput, | |
334 | BFD_RELOC_32); | |
335 | int size = bfd_get_reloc_size (reloc_howto); | |
336 | ||
337 | if (GOT_symbol == NULL) | |
338 | GOT_symbol = symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME); | |
339 | ||
340 | if (size > nbytes) | |
341 | as_bad (_("%s relocations do not fit in %d bytes\n"), | |
342 | reloc_howto->name, nbytes); | |
343 | else | |
344 | { | |
345 | register char *p = frag_more ((int) nbytes); | |
346 | int offset = nbytes - size; | |
347 | ||
348 | fix_new_exp (frag_now, p - frag_now->fr_literal + offset, | |
349 | size, &exp, 0, TC_RELOC_GLOBAL_OFFSET_TABLE); | |
350 | } | |
351 | } | |
352 | /* Check if this symbol involves one of the magic suffixes, such | |
353 | as @GOT, @GOTOFF or @PLT, and determine which relocation type | |
354 | to use. */ | |
355 | else if ((exp.X_op == O_symbol || (exp.X_op == O_add && exp.X_op_symbol)) | |
356 | && *input_line_pointer == '@' | |
357 | && ((reloc = sh_elf_suffix (&input_line_pointer, &exp, &new_exp)) | |
358 | != BFD_RELOC_UNUSED)) | |
359 | { | |
360 | reloc_howto_type *reloc_howto = bfd_reloc_type_lookup (stdoutput, | |
361 | reloc); | |
362 | int size = bfd_get_reloc_size (reloc_howto); | |
363 | ||
364 | /* Force a GOT to be generated. */ | |
365 | if (GOT_symbol == NULL) | |
366 | GOT_symbol = symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME); | |
367 | ||
368 | if (size > nbytes) | |
369 | as_bad (_("%s relocations do not fit in %d bytes\n"), | |
370 | reloc_howto->name, nbytes); | |
371 | else | |
372 | { | |
373 | register char *p = frag_more ((int) nbytes); | |
374 | int offset = nbytes - size; | |
375 | ||
376 | fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size, | |
377 | &exp, 0, reloc); | |
81d4177b | 378 | if (new_exp.X_op != O_absent) |
a1cc9221 AO |
379 | fix_new_exp (frag_now, p - frag_now->fr_literal + offset, size, |
380 | &new_exp, 0, BFD_RELOC_32); | |
381 | } | |
382 | } | |
383 | else | |
384 | emit_expr (&exp, (unsigned int) nbytes); | |
385 | } | |
386 | while (*input_line_pointer++ == ','); | |
387 | ||
81d4177b | 388 | input_line_pointer--; /* Put terminator back into stream. */ |
a1cc9221 AO |
389 | if (*input_line_pointer == '#' || *input_line_pointer == '!') |
390 | { | |
391 | while (! is_end_of_line[*input_line_pointer++]); | |
392 | } | |
393 | else | |
394 | demand_empty_rest_of_line (); | |
395 | } | |
396 | #endif /* OBJ_ELF */ | |
397 | ||
398 | \f | |
6b31947e NC |
399 | /* This function is called once, at assembler startup time. This should |
400 | set up all the tables, etc that the MD part of the assembler needs. */ | |
252b5132 RH |
401 | |
402 | void | |
403 | md_begin () | |
404 | { | |
405 | sh_opcode_info *opcode; | |
406 | char *prev_name = ""; | |
d4845d57 | 407 | int target_arch; |
252b5132 | 408 | |
056350c6 NC |
409 | #ifdef TE_PE |
410 | /* The WinCE OS only supports little endian executables. */ | |
411 | target_big_endian = 0; | |
412 | #else | |
252b5132 RH |
413 | if (! shl) |
414 | target_big_endian = 1; | |
056350c6 | 415 | #endif |
252b5132 | 416 | |
d4845d57 JR |
417 | target_arch = arch_sh1_up & ~(sh_dsp ? arch_sh3e_up : arch_sh_dsp_up); |
418 | valid_arch = target_arch; | |
419 | ||
252b5132 RH |
420 | opcode_hash_control = hash_new (); |
421 | ||
6b31947e | 422 | /* Insert unique names into hash table. */ |
252b5132 RH |
423 | for (opcode = sh_table; opcode->name; opcode++) |
424 | { | |
a37c8f88 | 425 | if (strcmp (prev_name, opcode->name)) |
252b5132 | 426 | { |
a37c8f88 JR |
427 | if (! (opcode->arch & target_arch)) |
428 | continue; | |
252b5132 RH |
429 | prev_name = opcode->name; |
430 | hash_insert (opcode_hash_control, opcode->name, (char *) opcode); | |
431 | } | |
432 | else | |
433 | { | |
434 | /* Make all the opcodes with the same name point to the same | |
6b31947e | 435 | string. */ |
252b5132 RH |
436 | opcode->name = prev_name; |
437 | } | |
438 | } | |
439 | } | |
440 | ||
441 | static int reg_m; | |
442 | static int reg_n; | |
d4845d57 JR |
443 | static int reg_x, reg_y; |
444 | static int reg_efg; | |
252b5132 RH |
445 | static int reg_b; |
446 | ||
252b5132 RH |
447 | typedef struct |
448 | { | |
449 | sh_arg_type type; | |
450 | int reg; | |
015551fc | 451 | expressionS immediate; |
252b5132 | 452 | } |
252b5132 RH |
453 | sh_operand_info; |
454 | ||
dead1419 JR |
455 | #define IDENT_CHAR(c) (isalnum (c) || (c) == '_') |
456 | ||
6b31947e NC |
457 | /* Try to parse a reg name. Return the number of chars consumed. */ |
458 | ||
252b5132 RH |
459 | static int |
460 | parse_reg (src, mode, reg) | |
461 | char *src; | |
462 | int *mode; | |
463 | int *reg; | |
464 | { | |
dead1419 | 465 | /* We use ! IDENT_CHAR for the next character after the register name, to |
252b5132 | 466 | make sure that we won't accidentally recognize a symbol name such as |
dead1419 | 467 | 'sram' or sr_ram as being a reference to the register 'sr'. */ |
252b5132 RH |
468 | |
469 | if (src[0] == 'r') | |
470 | { | |
d4845d57 JR |
471 | if (src[1] == '1') |
472 | { | |
473 | if (src[2] >= '0' && src[2] <= '5' | |
dead1419 | 474 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
475 | { |
476 | *mode = A_REG_N; | |
477 | *reg = 10 + src[2] - '0'; | |
478 | return 3; | |
479 | } | |
480 | } | |
481 | if (src[1] >= '0' && src[1] <= '9' | |
dead1419 | 482 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
483 | { |
484 | *mode = A_REG_N; | |
485 | *reg = (src[1] - '0'); | |
486 | return 2; | |
487 | } | |
dead1419 JR |
488 | if (src[1] >= '0' && src[1] <= '7' && strncmp (&src[2], "_bank", 5) == 0 |
489 | && ! IDENT_CHAR ((unsigned char) src[7])) | |
490 | { | |
491 | *mode = A_REG_B; | |
492 | *reg = (src[1] - '0'); | |
493 | return 7; | |
494 | } | |
d4845d57 | 495 | |
dead1419 | 496 | if (src[1] == 'e' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
497 | { |
498 | *mode = A_RE; | |
499 | return 2; | |
500 | } | |
dead1419 | 501 | if (src[1] == 's' && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
502 | { |
503 | *mode = A_RS; | |
504 | return 2; | |
505 | } | |
252b5132 RH |
506 | } |
507 | ||
d4845d57 | 508 | if (src[0] == 'a') |
252b5132 | 509 | { |
d4845d57 JR |
510 | if (src[1] == '0') |
511 | { | |
dead1419 | 512 | if (! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
513 | { |
514 | *mode = DSP_REG_N; | |
515 | *reg = A_A0_NUM; | |
516 | return 2; | |
517 | } | |
dead1419 | 518 | if (src[2] == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
519 | { |
520 | *mode = DSP_REG_N; | |
521 | *reg = A_A0G_NUM; | |
522 | return 3; | |
523 | } | |
524 | } | |
252b5132 RH |
525 | if (src[1] == '1') |
526 | { | |
dead1419 | 527 | if (! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 528 | { |
d4845d57 JR |
529 | *mode = DSP_REG_N; |
530 | *reg = A_A1_NUM; | |
531 | return 2; | |
532 | } | |
dead1419 | 533 | if (src[2] == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
534 | { |
535 | *mode = DSP_REG_N; | |
536 | *reg = A_A1G_NUM; | |
252b5132 RH |
537 | return 3; |
538 | } | |
539 | } | |
d4845d57 JR |
540 | |
541 | if (src[1] == 'x' && src[2] >= '0' && src[2] <= '1' | |
dead1419 | 542 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
543 | { |
544 | *mode = A_REG_N; | |
d4845d57 JR |
545 | *reg = 4 + (src[1] - '0'); |
546 | return 3; | |
547 | } | |
548 | if (src[1] == 'y' && src[2] >= '0' && src[2] <= '1' | |
dead1419 | 549 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
550 | { |
551 | *mode = A_REG_N; | |
552 | *reg = 6 + (src[1] - '0'); | |
553 | return 3; | |
554 | } | |
555 | if (src[1] == 's' && src[2] >= '0' && src[2] <= '3' | |
dead1419 | 556 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
557 | { |
558 | int n = src[1] - '0'; | |
559 | ||
560 | *mode = A_REG_N; | |
561 | *reg = n | ((~n & 2) << 1); | |
562 | return 3; | |
563 | } | |
564 | } | |
565 | ||
dead1419 | 566 | if (src[0] == 'i' && src[1] && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
567 | { |
568 | if (src[1] == 's') | |
569 | { | |
570 | *mode = A_REG_N; | |
571 | *reg = 8; | |
252b5132 RH |
572 | return 2; |
573 | } | |
d4845d57 JR |
574 | if (src[1] == 'x') |
575 | { | |
576 | *mode = A_REG_N; | |
577 | *reg = 8; | |
578 | return 2; | |
579 | } | |
580 | if (src[1] == 'y') | |
581 | { | |
582 | *mode = A_REG_N; | |
583 | *reg = 9; | |
584 | return 2; | |
585 | } | |
586 | } | |
587 | ||
588 | if (src[0] == 'x' && src[1] >= '0' && src[1] <= '1' | |
dead1419 | 589 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
590 | { |
591 | *mode = DSP_REG_N; | |
592 | *reg = A_X0_NUM + src[1] - '0'; | |
593 | return 2; | |
594 | } | |
595 | ||
596 | if (src[0] == 'y' && src[1] >= '0' && src[1] <= '1' | |
dead1419 | 597 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
598 | { |
599 | *mode = DSP_REG_N; | |
600 | *reg = A_Y0_NUM + src[1] - '0'; | |
601 | return 2; | |
602 | } | |
603 | ||
604 | if (src[0] == 'm' && src[1] >= '0' && src[1] <= '1' | |
dead1419 | 605 | && ! IDENT_CHAR ((unsigned char) src[2])) |
d4845d57 JR |
606 | { |
607 | *mode = DSP_REG_N; | |
608 | *reg = src[1] == '0' ? A_M0_NUM : A_M1_NUM; | |
609 | return 2; | |
252b5132 RH |
610 | } |
611 | ||
612 | if (src[0] == 's' | |
613 | && src[1] == 's' | |
dead1419 | 614 | && src[2] == 'r' && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
615 | { |
616 | *mode = A_SSR; | |
617 | return 3; | |
618 | } | |
619 | ||
620 | if (src[0] == 's' && src[1] == 'p' && src[2] == 'c' | |
dead1419 | 621 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
622 | { |
623 | *mode = A_SPC; | |
624 | return 3; | |
625 | } | |
626 | ||
627 | if (src[0] == 's' && src[1] == 'g' && src[2] == 'r' | |
dead1419 | 628 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
629 | { |
630 | *mode = A_SGR; | |
631 | return 3; | |
632 | } | |
633 | ||
d4845d57 | 634 | if (src[0] == 'd' && src[1] == 's' && src[2] == 'r' |
dead1419 | 635 | && ! IDENT_CHAR ((unsigned char) src[3])) |
d4845d57 JR |
636 | { |
637 | *mode = A_DSR; | |
638 | return 3; | |
639 | } | |
640 | ||
252b5132 | 641 | if (src[0] == 'd' && src[1] == 'b' && src[2] == 'r' |
dead1419 | 642 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
643 | { |
644 | *mode = A_DBR; | |
645 | return 3; | |
646 | } | |
647 | ||
dead1419 | 648 | if (src[0] == 's' && src[1] == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
649 | { |
650 | *mode = A_SR; | |
651 | return 2; | |
652 | } | |
653 | ||
dead1419 | 654 | if (src[0] == 's' && src[1] == 'p' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
655 | { |
656 | *mode = A_REG_N; | |
657 | *reg = 15; | |
658 | return 2; | |
659 | } | |
660 | ||
dead1419 | 661 | if (src[0] == 'p' && src[1] == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 RH |
662 | { |
663 | *mode = A_PR; | |
664 | return 2; | |
665 | } | |
dead1419 | 666 | if (src[0] == 'p' && src[1] == 'c' && ! IDENT_CHAR ((unsigned char) src[2])) |
252b5132 | 667 | { |
015551fc JR |
668 | /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0' |
669 | and use an uninitialized immediate. */ | |
670 | *mode = A_PC; | |
252b5132 RH |
671 | return 2; |
672 | } | |
673 | if (src[0] == 'g' && src[1] == 'b' && src[2] == 'r' | |
dead1419 | 674 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
675 | { |
676 | *mode = A_GBR; | |
677 | return 3; | |
678 | } | |
679 | if (src[0] == 'v' && src[1] == 'b' && src[2] == 'r' | |
dead1419 | 680 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
681 | { |
682 | *mode = A_VBR; | |
683 | return 3; | |
684 | } | |
685 | ||
686 | if (src[0] == 'm' && src[1] == 'a' && src[2] == 'c' | |
dead1419 | 687 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
688 | { |
689 | if (src[3] == 'l') | |
690 | { | |
691 | *mode = A_MACL; | |
692 | return 4; | |
693 | } | |
694 | if (src[3] == 'h') | |
695 | { | |
696 | *mode = A_MACH; | |
697 | return 4; | |
698 | } | |
699 | } | |
d4845d57 | 700 | if (src[0] == 'm' && src[1] == 'o' && src[2] == 'd' |
dead1419 | 701 | && ! IDENT_CHAR ((unsigned char) src[4])) |
d4845d57 JR |
702 | { |
703 | *mode = A_MOD; | |
704 | return 3; | |
705 | } | |
252b5132 RH |
706 | if (src[0] == 'f' && src[1] == 'r') |
707 | { | |
708 | if (src[2] == '1') | |
709 | { | |
710 | if (src[3] >= '0' && src[3] <= '5' | |
dead1419 | 711 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
712 | { |
713 | *mode = F_REG_N; | |
714 | *reg = 10 + src[3] - '0'; | |
715 | return 4; | |
716 | } | |
717 | } | |
718 | if (src[2] >= '0' && src[2] <= '9' | |
dead1419 | 719 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
720 | { |
721 | *mode = F_REG_N; | |
722 | *reg = (src[2] - '0'); | |
723 | return 3; | |
724 | } | |
725 | } | |
726 | if (src[0] == 'd' && src[1] == 'r') | |
727 | { | |
728 | if (src[2] == '1') | |
729 | { | |
730 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 731 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
732 | { |
733 | *mode = D_REG_N; | |
734 | *reg = 10 + src[3] - '0'; | |
735 | return 4; | |
736 | } | |
737 | } | |
738 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 739 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
740 | { |
741 | *mode = D_REG_N; | |
742 | *reg = (src[2] - '0'); | |
743 | return 3; | |
744 | } | |
745 | } | |
746 | if (src[0] == 'x' && src[1] == 'd') | |
747 | { | |
748 | if (src[2] == '1') | |
749 | { | |
750 | if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) | |
dead1419 | 751 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
752 | { |
753 | *mode = X_REG_N; | |
754 | *reg = 11 + src[3] - '0'; | |
755 | return 4; | |
756 | } | |
757 | } | |
758 | if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) | |
dead1419 | 759 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
760 | { |
761 | *mode = X_REG_N; | |
762 | *reg = (src[2] - '0') + 1; | |
763 | return 3; | |
764 | } | |
765 | } | |
766 | if (src[0] == 'f' && src[1] == 'v') | |
767 | { | |
dead1419 | 768 | if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
769 | { |
770 | *mode = V_REG_N; | |
771 | *reg = 12; | |
772 | return 4; | |
773 | } | |
774 | if ((src[2] == '0' || src[2] == '4' || src[2] == '8') | |
dead1419 | 775 | && ! IDENT_CHAR ((unsigned char) src[3])) |
252b5132 RH |
776 | { |
777 | *mode = V_REG_N; | |
778 | *reg = (src[2] - '0'); | |
779 | return 3; | |
780 | } | |
781 | } | |
782 | if (src[0] == 'f' && src[1] == 'p' && src[2] == 'u' && src[3] == 'l' | |
dead1419 | 783 | && ! IDENT_CHAR ((unsigned char) src[4])) |
252b5132 RH |
784 | { |
785 | *mode = FPUL_N; | |
786 | return 4; | |
787 | } | |
788 | ||
789 | if (src[0] == 'f' && src[1] == 'p' && src[2] == 's' && src[3] == 'c' | |
dead1419 | 790 | && src[4] == 'r' && ! IDENT_CHAR ((unsigned char) src[5])) |
252b5132 RH |
791 | { |
792 | *mode = FPSCR_N; | |
793 | return 5; | |
794 | } | |
795 | ||
796 | if (src[0] == 'x' && src[1] == 'm' && src[2] == 't' && src[3] == 'r' | |
dead1419 | 797 | && src[4] == 'x' && ! IDENT_CHAR ((unsigned char) src[5])) |
252b5132 RH |
798 | { |
799 | *mode = XMTRX_M4; | |
800 | return 5; | |
801 | } | |
802 | ||
803 | return 0; | |
804 | } | |
805 | ||
c4aa876b NC |
806 | static symbolS * |
807 | dot () | |
252b5132 RH |
808 | { |
809 | const char *fake; | |
810 | ||
811 | /* JF: '.' is pseudo symbol with value of current location | |
812 | in current segment. */ | |
813 | fake = FAKE_LABEL_NAME; | |
814 | return symbol_new (fake, | |
815 | now_seg, | |
816 | (valueT) frag_now_fix (), | |
817 | frag_now); | |
252b5132 RH |
818 | } |
819 | ||
c4aa876b | 820 | static char * |
015551fc | 821 | parse_exp (s, op) |
252b5132 | 822 | char *s; |
015551fc | 823 | sh_operand_info *op; |
252b5132 RH |
824 | { |
825 | char *save; | |
826 | char *new; | |
827 | ||
828 | save = input_line_pointer; | |
829 | input_line_pointer = s; | |
015551fc JR |
830 | expression (&op->immediate); |
831 | if (op->immediate.X_op == O_absent) | |
252b5132 RH |
832 | as_bad (_("missing operand")); |
833 | new = input_line_pointer; | |
834 | input_line_pointer = save; | |
835 | return new; | |
836 | } | |
837 | ||
252b5132 RH |
838 | /* The many forms of operand: |
839 | ||
840 | Rn Register direct | |
841 | @Rn Register indirect | |
842 | @Rn+ Autoincrement | |
843 | @-Rn Autodecrement | |
844 | @(disp:4,Rn) | |
845 | @(disp:8,GBR) | |
846 | @(disp:8,PC) | |
847 | ||
848 | @(R0,Rn) | |
849 | @(R0,GBR) | |
850 | ||
851 | disp:8 | |
852 | disp:12 | |
853 | #imm8 | |
854 | pr, gbr, vbr, macl, mach | |
252b5132 RH |
855 | */ |
856 | ||
c4aa876b | 857 | static char * |
252b5132 RH |
858 | parse_at (src, op) |
859 | char *src; | |
860 | sh_operand_info *op; | |
861 | { | |
862 | int len; | |
863 | int mode; | |
864 | src++; | |
865 | if (src[0] == '-') | |
866 | { | |
6b31947e | 867 | /* Must be predecrement. */ |
252b5132 RH |
868 | src++; |
869 | ||
870 | len = parse_reg (src, &mode, &(op->reg)); | |
871 | if (mode != A_REG_N) | |
872 | as_bad (_("illegal register after @-")); | |
873 | ||
874 | op->type = A_DEC_N; | |
875 | src += len; | |
876 | } | |
877 | else if (src[0] == '(') | |
878 | { | |
879 | /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or | |
880 | @(r0, rn) */ | |
881 | src++; | |
882 | len = parse_reg (src, &mode, &(op->reg)); | |
883 | if (len && mode == A_REG_N) | |
884 | { | |
885 | src += len; | |
886 | if (op->reg != 0) | |
887 | { | |
888 | as_bad (_("must be @(r0,...)")); | |
889 | } | |
890 | if (src[0] == ',') | |
891 | src++; | |
892 | /* Now can be rn or gbr */ | |
893 | len = parse_reg (src, &mode, &(op->reg)); | |
894 | if (mode == A_GBR) | |
895 | { | |
896 | op->type = A_R0_GBR; | |
897 | } | |
898 | else if (mode == A_REG_N) | |
899 | { | |
900 | op->type = A_IND_R0_REG_N; | |
901 | } | |
902 | else | |
903 | { | |
904 | as_bad (_("syntax error in @(r0,...)")); | |
905 | } | |
906 | } | |
907 | else | |
908 | { | |
909 | /* Must be an @(disp,.. thing) */ | |
015551fc | 910 | src = parse_exp (src, op); |
252b5132 RH |
911 | if (src[0] == ',') |
912 | src++; | |
913 | /* Now can be rn, gbr or pc */ | |
914 | len = parse_reg (src, &mode, &op->reg); | |
915 | if (len) | |
916 | { | |
917 | if (mode == A_REG_N) | |
918 | { | |
919 | op->type = A_DISP_REG_N; | |
920 | } | |
921 | else if (mode == A_GBR) | |
922 | { | |
923 | op->type = A_DISP_GBR; | |
924 | } | |
015551fc | 925 | else if (mode == A_PC) |
252b5132 | 926 | { |
c4aa876b NC |
927 | /* Turn a plain @(4,pc) into @(.+4,pc). */ |
928 | if (op->immediate.X_op == O_constant) | |
929 | { | |
930 | op->immediate.X_add_symbol = dot(); | |
931 | op->immediate.X_op = O_symbol; | |
932 | } | |
252b5132 RH |
933 | op->type = A_DISP_PC; |
934 | } | |
935 | else | |
936 | { | |
937 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
938 | } | |
939 | } | |
940 | else | |
941 | { | |
942 | as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); | |
943 | } | |
944 | } | |
945 | src += len; | |
946 | if (src[0] != ')') | |
947 | as_bad (_("expecting )")); | |
948 | else | |
949 | src++; | |
950 | } | |
951 | else | |
952 | { | |
953 | src += parse_reg (src, &mode, &(op->reg)); | |
954 | if (mode != A_REG_N) | |
955 | { | |
956 | as_bad (_("illegal register after @")); | |
957 | } | |
958 | if (src[0] == '+') | |
959 | { | |
252b5132 | 960 | src++; |
d4845d57 JR |
961 | if ((src[0] == 'r' && src[1] == '8') |
962 | || (src[0] == 'i' && (src[1] == 'x' || src[1] == 's'))) | |
963 | { | |
964 | src += 2; | |
965 | op->type = A_PMOD_N; | |
966 | } | |
967 | if ((src[0] == 'r' && src[1] == '9') | |
968 | || (src[0] == 'i' && src[1] == 'y')) | |
969 | { | |
970 | src += 2; | |
971 | op->type = A_PMODY_N; | |
972 | } | |
973 | else | |
974 | op->type = A_INC_N; | |
252b5132 RH |
975 | } |
976 | else | |
977 | { | |
978 | op->type = A_IND_N; | |
979 | } | |
980 | } | |
981 | return src; | |
982 | } | |
983 | ||
984 | static void | |
985 | get_operand (ptr, op) | |
986 | char **ptr; | |
987 | sh_operand_info *op; | |
988 | { | |
989 | char *src = *ptr; | |
990 | int mode = -1; | |
991 | unsigned int len; | |
992 | ||
993 | if (src[0] == '#') | |
994 | { | |
995 | src++; | |
015551fc | 996 | *ptr = parse_exp (src, op); |
252b5132 RH |
997 | op->type = A_IMM; |
998 | return; | |
999 | } | |
1000 | ||
1001 | else if (src[0] == '@') | |
1002 | { | |
1003 | *ptr = parse_at (src, op); | |
1004 | return; | |
1005 | } | |
1006 | len = parse_reg (src, &mode, &(op->reg)); | |
1007 | if (len) | |
1008 | { | |
1009 | *ptr = src + len; | |
1010 | op->type = mode; | |
1011 | return; | |
1012 | } | |
1013 | else | |
1014 | { | |
6b31947e | 1015 | /* Not a reg, the only thing left is a displacement. */ |
015551fc | 1016 | *ptr = parse_exp (src, op); |
252b5132 RH |
1017 | op->type = A_DISP_PC; |
1018 | return; | |
1019 | } | |
1020 | } | |
1021 | ||
c4aa876b | 1022 | static char * |
252b5132 RH |
1023 | get_operands (info, args, operand) |
1024 | sh_opcode_info *info; | |
1025 | char *args; | |
1026 | sh_operand_info *operand; | |
252b5132 RH |
1027 | { |
1028 | char *ptr = args; | |
1029 | if (info->arg[0]) | |
1030 | { | |
d4845d57 JR |
1031 | /* The pre-processor will eliminate whitespace in front of '@' |
1032 | after the first argument; we may be called multiple times | |
1033 | from assemble_ppi, so don't insist on finding whitespace here. */ | |
1034 | if (*ptr == ' ') | |
1035 | ptr++; | |
252b5132 RH |
1036 | |
1037 | get_operand (&ptr, operand + 0); | |
1038 | if (info->arg[1]) | |
1039 | { | |
1040 | if (*ptr == ',') | |
1041 | { | |
1042 | ptr++; | |
1043 | } | |
1044 | get_operand (&ptr, operand + 1); | |
52ccafd0 JR |
1045 | /* ??? Hack: psha/pshl have a varying operand number depending on |
1046 | the type of the first operand. We handle this by having the | |
1047 | three-operand version first and reducing the number of operands | |
1048 | parsed to two if we see that the first operand is an immediate. | |
1049 | This works because no insn with three operands has an immediate | |
1050 | as first operand. */ | |
1051 | if (info->arg[2] && operand[0].type != A_IMM) | |
252b5132 RH |
1052 | { |
1053 | if (*ptr == ',') | |
1054 | { | |
1055 | ptr++; | |
1056 | } | |
1057 | get_operand (&ptr, operand + 2); | |
1058 | } | |
1059 | else | |
1060 | { | |
1061 | operand[2].type = 0; | |
1062 | } | |
1063 | } | |
1064 | else | |
1065 | { | |
1066 | operand[1].type = 0; | |
1067 | operand[2].type = 0; | |
1068 | } | |
1069 | } | |
1070 | else | |
1071 | { | |
1072 | operand[0].type = 0; | |
1073 | operand[1].type = 0; | |
1074 | operand[2].type = 0; | |
1075 | } | |
1076 | return ptr; | |
1077 | } | |
1078 | ||
1079 | /* Passed a pointer to a list of opcodes which use different | |
1080 | addressing modes, return the opcode which matches the opcodes | |
6b31947e | 1081 | provided. */ |
252b5132 | 1082 | |
c4aa876b | 1083 | static sh_opcode_info * |
252b5132 RH |
1084 | get_specific (opcode, operands) |
1085 | sh_opcode_info *opcode; | |
1086 | sh_operand_info *operands; | |
1087 | { | |
1088 | sh_opcode_info *this_try = opcode; | |
1089 | char *name = opcode->name; | |
1090 | int n = 0; | |
c4aa876b | 1091 | |
252b5132 RH |
1092 | while (opcode->name) |
1093 | { | |
1094 | this_try = opcode++; | |
1095 | if (this_try->name != name) | |
1096 | { | |
1097 | /* We've looked so far down the table that we've run out of | |
6b31947e | 1098 | opcodes with the same name. */ |
252b5132 RH |
1099 | return 0; |
1100 | } | |
c4aa876b | 1101 | |
6b31947e | 1102 | /* Look at both operands needed by the opcodes and provided by |
252b5132 RH |
1103 | the user - since an arg test will often fail on the same arg |
1104 | again and again, we'll try and test the last failing arg the | |
6b31947e | 1105 | first on each opcode try. */ |
252b5132 RH |
1106 | for (n = 0; this_try->arg[n]; n++) |
1107 | { | |
1108 | sh_operand_info *user = operands + n; | |
1109 | sh_arg_type arg = this_try->arg[n]; | |
c4aa876b | 1110 | |
252b5132 RH |
1111 | switch (arg) |
1112 | { | |
1113 | case A_IMM: | |
1114 | case A_BDISP12: | |
1115 | case A_BDISP8: | |
1116 | case A_DISP_GBR: | |
1117 | case A_DISP_PC: | |
1118 | case A_MACH: | |
1119 | case A_PR: | |
1120 | case A_MACL: | |
1121 | if (user->type != arg) | |
1122 | goto fail; | |
1123 | break; | |
1124 | case A_R0: | |
1125 | /* opcode needs r0 */ | |
1126 | if (user->type != A_REG_N || user->reg != 0) | |
1127 | goto fail; | |
1128 | break; | |
1129 | case A_R0_GBR: | |
1130 | if (user->type != A_R0_GBR || user->reg != 0) | |
1131 | goto fail; | |
1132 | break; | |
1133 | case F_FR0: | |
1134 | if (user->type != F_REG_N || user->reg != 0) | |
1135 | goto fail; | |
1136 | break; | |
1137 | ||
1138 | case A_REG_N: | |
1139 | case A_INC_N: | |
1140 | case A_DEC_N: | |
1141 | case A_IND_N: | |
1142 | case A_IND_R0_REG_N: | |
1143 | case A_DISP_REG_N: | |
1144 | case F_REG_N: | |
1145 | case D_REG_N: | |
1146 | case X_REG_N: | |
1147 | case V_REG_N: | |
1148 | case FPUL_N: | |
1149 | case FPSCR_N: | |
d4845d57 JR |
1150 | case A_PMOD_N: |
1151 | case A_PMODY_N: | |
1152 | case DSP_REG_N: | |
252b5132 RH |
1153 | /* Opcode needs rn */ |
1154 | if (user->type != arg) | |
1155 | goto fail; | |
1156 | reg_n = user->reg; | |
1157 | break; | |
252b5132 RH |
1158 | case DX_REG_N: |
1159 | if (user->type != D_REG_N && user->type != X_REG_N) | |
1160 | goto fail; | |
1161 | reg_n = user->reg; | |
1162 | break; | |
1163 | case A_GBR: | |
1164 | case A_SR: | |
1165 | case A_VBR: | |
d4845d57 JR |
1166 | case A_DSR: |
1167 | case A_MOD: | |
1168 | case A_RE: | |
1169 | case A_RS: | |
252b5132 RH |
1170 | case A_SSR: |
1171 | case A_SPC: | |
1172 | case A_SGR: | |
1173 | case A_DBR: | |
1174 | if (user->type != arg) | |
1175 | goto fail; | |
1176 | break; | |
1177 | ||
c4aa876b | 1178 | case A_REG_B: |
252b5132 RH |
1179 | if (user->type != arg) |
1180 | goto fail; | |
1181 | reg_b = user->reg; | |
1182 | break; | |
1183 | ||
1184 | case A_REG_M: | |
1185 | case A_INC_M: | |
1186 | case A_DEC_M: | |
1187 | case A_IND_M: | |
1188 | case A_IND_R0_REG_M: | |
1189 | case A_DISP_REG_M: | |
d4845d57 | 1190 | case DSP_REG_M: |
252b5132 RH |
1191 | /* Opcode needs rn */ |
1192 | if (user->type != arg - A_REG_M + A_REG_N) | |
1193 | goto fail; | |
1194 | reg_m = user->reg; | |
1195 | break; | |
1196 | ||
d4845d57 JR |
1197 | case DSP_REG_X: |
1198 | if (user->type != DSP_REG_N) | |
1199 | goto fail; | |
1200 | switch (user->reg) | |
1201 | { | |
1202 | case A_X0_NUM: | |
1203 | reg_x = 0; | |
1204 | break; | |
1205 | case A_X1_NUM: | |
1206 | reg_x = 1; | |
1207 | break; | |
1208 | case A_A0_NUM: | |
1209 | reg_x = 2; | |
1210 | break; | |
1211 | case A_A1_NUM: | |
1212 | reg_x = 3; | |
1213 | break; | |
1214 | default: | |
1215 | goto fail; | |
1216 | } | |
1217 | break; | |
1218 | ||
1219 | case DSP_REG_Y: | |
1220 | if (user->type != DSP_REG_N) | |
1221 | goto fail; | |
1222 | switch (user->reg) | |
1223 | { | |
1224 | case A_Y0_NUM: | |
1225 | reg_y = 0; | |
1226 | break; | |
1227 | case A_Y1_NUM: | |
1228 | reg_y = 1; | |
1229 | break; | |
1230 | case A_M0_NUM: | |
1231 | reg_y = 2; | |
1232 | break; | |
1233 | case A_M1_NUM: | |
1234 | reg_y = 3; | |
1235 | break; | |
1236 | default: | |
1237 | goto fail; | |
1238 | } | |
1239 | break; | |
1240 | ||
1241 | case DSP_REG_E: | |
1242 | if (user->type != DSP_REG_N) | |
1243 | goto fail; | |
1244 | switch (user->reg) | |
1245 | { | |
1246 | case A_X0_NUM: | |
1247 | reg_efg = 0 << 10; | |
1248 | break; | |
1249 | case A_X1_NUM: | |
1250 | reg_efg = 1 << 10; | |
1251 | break; | |
1252 | case A_Y0_NUM: | |
1253 | reg_efg = 2 << 10; | |
1254 | break; | |
1255 | case A_A1_NUM: | |
1256 | reg_efg = 3 << 10; | |
1257 | break; | |
1258 | default: | |
1259 | goto fail; | |
1260 | } | |
1261 | break; | |
1262 | ||
1263 | case DSP_REG_F: | |
1264 | if (user->type != DSP_REG_N) | |
1265 | goto fail; | |
1266 | switch (user->reg) | |
1267 | { | |
1268 | case A_Y0_NUM: | |
1269 | reg_efg |= 0 << 8; | |
1270 | break; | |
1271 | case A_Y1_NUM: | |
1272 | reg_efg |= 1 << 8; | |
1273 | break; | |
1274 | case A_X0_NUM: | |
1275 | reg_efg |= 2 << 8; | |
1276 | break; | |
1277 | case A_A1_NUM: | |
1278 | reg_efg |= 3 << 8; | |
1279 | break; | |
1280 | default: | |
1281 | goto fail; | |
1282 | } | |
1283 | break; | |
1284 | ||
1285 | case DSP_REG_G: | |
1286 | if (user->type != DSP_REG_N) | |
1287 | goto fail; | |
1288 | switch (user->reg) | |
1289 | { | |
1290 | case A_M0_NUM: | |
1291 | reg_efg |= 0 << 2; | |
1292 | break; | |
1293 | case A_M1_NUM: | |
1294 | reg_efg |= 1 << 2; | |
1295 | break; | |
1296 | case A_A0_NUM: | |
1297 | reg_efg |= 2 << 2; | |
1298 | break; | |
1299 | case A_A1_NUM: | |
1300 | reg_efg |= 3 << 2; | |
1301 | break; | |
1302 | default: | |
1303 | goto fail; | |
1304 | } | |
1305 | break; | |
1306 | ||
1307 | case A_A0: | |
1308 | if (user->type != DSP_REG_N || user->reg != A_A0_NUM) | |
1309 | goto fail; | |
1310 | break; | |
1311 | case A_X0: | |
1312 | if (user->type != DSP_REG_N || user->reg != A_X0_NUM) | |
1313 | goto fail; | |
1314 | break; | |
1315 | case A_X1: | |
1316 | if (user->type != DSP_REG_N || user->reg != A_X1_NUM) | |
1317 | goto fail; | |
1318 | break; | |
1319 | case A_Y0: | |
1320 | if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) | |
1321 | goto fail; | |
1322 | break; | |
1323 | case A_Y1: | |
1324 | if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) | |
1325 | goto fail; | |
1326 | break; | |
1327 | ||
252b5132 RH |
1328 | case F_REG_M: |
1329 | case D_REG_M: | |
1330 | case X_REG_M: | |
1331 | case V_REG_M: | |
1332 | case FPUL_M: | |
1333 | case FPSCR_M: | |
1334 | /* Opcode needs rn */ | |
1335 | if (user->type != arg - F_REG_M + F_REG_N) | |
1336 | goto fail; | |
1337 | reg_m = user->reg; | |
1338 | break; | |
1339 | case DX_REG_M: | |
1340 | if (user->type != D_REG_N && user->type != X_REG_N) | |
1341 | goto fail; | |
1342 | reg_m = user->reg; | |
1343 | break; | |
1344 | case XMTRX_M4: | |
1345 | if (user->type != XMTRX_M4) | |
1346 | goto fail; | |
1347 | reg_m = 4; | |
1348 | break; | |
c4aa876b | 1349 | |
252b5132 RH |
1350 | default: |
1351 | printf (_("unhandled %d\n"), arg); | |
1352 | goto fail; | |
1353 | } | |
1354 | } | |
a37c8f88 JR |
1355 | if ( !(valid_arch & this_try->arch)) |
1356 | goto fail; | |
d4845d57 | 1357 | valid_arch &= this_try->arch; |
252b5132 | 1358 | return this_try; |
c4aa876b NC |
1359 | fail: |
1360 | ; | |
252b5132 RH |
1361 | } |
1362 | ||
1363 | return 0; | |
1364 | } | |
1365 | ||
1366 | int | |
1367 | check (operand, low, high) | |
1368 | expressionS *operand; | |
1369 | int low; | |
1370 | int high; | |
1371 | { | |
1372 | if (operand->X_op != O_constant | |
1373 | || operand->X_add_number < low | |
1374 | || operand->X_add_number > high) | |
1375 | { | |
1376 | as_bad (_("operand must be absolute in range %d..%d"), low, high); | |
1377 | } | |
1378 | return operand->X_add_number; | |
1379 | } | |
1380 | ||
252b5132 | 1381 | static void |
015551fc | 1382 | insert (where, how, pcrel, op) |
252b5132 RH |
1383 | char *where; |
1384 | int how; | |
1385 | int pcrel; | |
015551fc | 1386 | sh_operand_info *op; |
252b5132 RH |
1387 | { |
1388 | fix_new_exp (frag_now, | |
1389 | where - frag_now->fr_literal, | |
1390 | 2, | |
015551fc | 1391 | &op->immediate, |
252b5132 RH |
1392 | pcrel, |
1393 | how); | |
1394 | } | |
1395 | ||
1396 | static void | |
015551fc | 1397 | build_relax (opcode, op) |
252b5132 | 1398 | sh_opcode_info *opcode; |
015551fc | 1399 | sh_operand_info *op; |
252b5132 RH |
1400 | { |
1401 | int high_byte = target_big_endian ? 0 : 1; | |
1402 | char *p; | |
1403 | ||
1404 | if (opcode->arg[0] == A_BDISP8) | |
1405 | { | |
1406 | int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; | |
1407 | p = frag_var (rs_machine_dependent, | |
1408 | md_relax_table[C (what, COND32)].rlx_length, | |
1409 | md_relax_table[C (what, COND8)].rlx_length, | |
1410 | C (what, 0), | |
015551fc JR |
1411 | op->immediate.X_add_symbol, |
1412 | op->immediate.X_add_number, | |
252b5132 RH |
1413 | 0); |
1414 | p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); | |
1415 | } | |
1416 | else if (opcode->arg[0] == A_BDISP12) | |
1417 | { | |
1418 | p = frag_var (rs_machine_dependent, | |
1419 | md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, | |
1420 | md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, | |
1421 | C (UNCOND_JUMP, 0), | |
015551fc JR |
1422 | op->immediate.X_add_symbol, |
1423 | op->immediate.X_add_number, | |
252b5132 RH |
1424 | 0); |
1425 | p[high_byte] = (opcode->nibbles[0] << 4); | |
1426 | } | |
1427 | ||
1428 | } | |
1429 | ||
6b31947e | 1430 | /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */ |
d67b5d6d | 1431 | |
015551fc JR |
1432 | static char * |
1433 | insert_loop_bounds (output, operand) | |
1434 | char *output; | |
1435 | sh_operand_info *operand; | |
1436 | { | |
1437 | char *name; | |
1438 | symbolS *end_sym; | |
1439 | ||
1440 | /* Since the low byte of the opcode will be overwritten by the reloc, we | |
1441 | can just stash the high byte into both bytes and ignore endianness. */ | |
1442 | output[0] = 0x8c; | |
1443 | output[1] = 0x8c; | |
1444 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
1445 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
1446 | ||
1447 | if (sh_relax) | |
1448 | { | |
1449 | static int count = 0; | |
1450 | ||
1451 | /* If the last loop insn is a two-byte-insn, it is in danger of being | |
1452 | swapped with the insn after it. To prevent this, create a new | |
1453 | symbol - complete with SH_LABEL reloc - after the last loop insn. | |
1454 | If the last loop insn is four bytes long, the symbol will be | |
1455 | right in the middle, but four byte insns are not swapped anyways. */ | |
1456 | /* A REPEAT takes 6 bytes. The SH has a 32 bit address space. | |
1457 | Hence a 9 digit number should be enough to count all REPEATs. */ | |
1458 | name = alloca (11); | |
1459 | sprintf (name, "_R%x", count++ & 0x3fffffff); | |
c4aa876b | 1460 | end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag); |
015551fc JR |
1461 | /* Make this a local symbol. */ |
1462 | #ifdef OBJ_COFF | |
1463 | SF_SET_LOCAL (end_sym); | |
1464 | #endif /* OBJ_COFF */ | |
1465 | symbol_table_insert (end_sym); | |
1466 | end_sym->sy_value = operand[1].immediate; | |
1467 | end_sym->sy_value.X_add_number += 2; | |
1468 | fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL); | |
1469 | } | |
1470 | ||
1471 | output = frag_more (2); | |
1472 | output[0] = 0x8e; | |
1473 | output[1] = 0x8e; | |
1474 | insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); | |
1475 | insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); | |
1476 | ||
1477 | return frag_more (2); | |
1478 | } | |
1479 | ||
d67b5d6d | 1480 | /* Now we know what sort of opcodes it is, let's build the bytes. */ |
6b31947e | 1481 | |
0d10e182 | 1482 | static unsigned int |
252b5132 RH |
1483 | build_Mytes (opcode, operand) |
1484 | sh_opcode_info *opcode; | |
1485 | sh_operand_info *operand; | |
1486 | ||
1487 | { | |
1488 | int index; | |
1489 | char nbuf[4]; | |
1490 | char *output = frag_more (2); | |
0d10e182 | 1491 | unsigned int size = 2; |
252b5132 RH |
1492 | int low_byte = target_big_endian ? 1 : 0; |
1493 | nbuf[0] = 0; | |
1494 | nbuf[1] = 0; | |
1495 | nbuf[2] = 0; | |
1496 | nbuf[3] = 0; | |
1497 | ||
1498 | for (index = 0; index < 4; index++) | |
1499 | { | |
1500 | sh_nibble_type i = opcode->nibbles[index]; | |
1501 | if (i < 16) | |
1502 | { | |
1503 | nbuf[index] = i; | |
1504 | } | |
1505 | else | |
1506 | { | |
1507 | switch (i) | |
1508 | { | |
1509 | case REG_N: | |
1510 | nbuf[index] = reg_n; | |
1511 | break; | |
1512 | case REG_M: | |
1513 | nbuf[index] = reg_m; | |
1514 | break; | |
d4845d57 JR |
1515 | case SDT_REG_N: |
1516 | if (reg_n < 2 || reg_n > 5) | |
1517 | as_bad (_("Invalid register: 'r%d'"), reg_n); | |
1518 | nbuf[index] = (reg_n & 3) | 4; | |
1519 | break; | |
252b5132 RH |
1520 | case REG_NM: |
1521 | nbuf[index] = reg_n | (reg_m >> 2); | |
1522 | break; | |
c4aa876b | 1523 | case REG_B: |
252b5132 RH |
1524 | nbuf[index] = reg_b | 0x08; |
1525 | break; | |
015551fc JR |
1526 | case IMM0_4BY4: |
1527 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); | |
1528 | break; | |
1529 | case IMM0_4BY2: | |
1530 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand); | |
1531 | break; | |
1532 | case IMM0_4: | |
1533 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand); | |
1534 | break; | |
1535 | case IMM1_4BY4: | |
1536 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1); | |
1537 | break; | |
1538 | case IMM1_4BY2: | |
1539 | insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1); | |
252b5132 | 1540 | break; |
015551fc JR |
1541 | case IMM1_4: |
1542 | insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1); | |
252b5132 | 1543 | break; |
015551fc JR |
1544 | case IMM0_8BY4: |
1545 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand); | |
252b5132 | 1546 | break; |
015551fc JR |
1547 | case IMM0_8BY2: |
1548 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand); | |
252b5132 | 1549 | break; |
015551fc JR |
1550 | case IMM0_8: |
1551 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand); | |
252b5132 | 1552 | break; |
015551fc JR |
1553 | case IMM1_8BY4: |
1554 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1); | |
252b5132 | 1555 | break; |
015551fc JR |
1556 | case IMM1_8BY2: |
1557 | insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1); | |
1558 | break; | |
1559 | case IMM1_8: | |
1560 | insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1); | |
252b5132 RH |
1561 | break; |
1562 | case PCRELIMM_8BY4: | |
015551fc | 1563 | insert (output, BFD_RELOC_SH_PCRELIMM8BY4, 1, operand); |
252b5132 RH |
1564 | break; |
1565 | case PCRELIMM_8BY2: | |
015551fc JR |
1566 | insert (output, BFD_RELOC_SH_PCRELIMM8BY2, 1, operand); |
1567 | break; | |
1568 | case REPEAT: | |
1569 | output = insert_loop_bounds (output, operand); | |
1570 | nbuf[index] = opcode->nibbles[3]; | |
1571 | operand += 2; | |
252b5132 RH |
1572 | break; |
1573 | default: | |
1574 | printf (_("failed for %d\n"), i); | |
1575 | } | |
1576 | } | |
1577 | } | |
c4aa876b NC |
1578 | if (!target_big_endian) |
1579 | { | |
1580 | output[1] = (nbuf[0] << 4) | (nbuf[1]); | |
1581 | output[0] = (nbuf[2] << 4) | (nbuf[3]); | |
1582 | } | |
1583 | else | |
1584 | { | |
1585 | output[0] = (nbuf[0] << 4) | (nbuf[1]); | |
1586 | output[1] = (nbuf[2] << 4) | (nbuf[3]); | |
1587 | } | |
0d10e182 | 1588 | return size; |
252b5132 RH |
1589 | } |
1590 | ||
d4845d57 JR |
1591 | /* Find an opcode at the start of *STR_P in the hash table, and set |
1592 | *STR_P to the first character after the last one read. */ | |
252b5132 | 1593 | |
d4845d57 JR |
1594 | static sh_opcode_info * |
1595 | find_cooked_opcode (str_p) | |
1596 | char **str_p; | |
252b5132 | 1597 | { |
d4845d57 | 1598 | char *str = *str_p; |
252b5132 RH |
1599 | unsigned char *op_start; |
1600 | unsigned char *op_end; | |
252b5132 RH |
1601 | char name[20]; |
1602 | int nlen = 0; | |
c4aa876b | 1603 | |
6b31947e | 1604 | /* Drop leading whitespace. */ |
252b5132 RH |
1605 | while (*str == ' ') |
1606 | str++; | |
1607 | ||
d4845d57 JR |
1608 | /* Find the op code end. |
1609 | The pre-processor will eliminate whitespace in front of | |
1610 | any '@' after the first argument; we may be called from | |
1611 | assemble_ppi, so the opcode might be terminated by an '@'. */ | |
252b5132 RH |
1612 | for (op_start = op_end = (unsigned char *) (str); |
1613 | *op_end | |
1614 | && nlen < 20 | |
d4845d57 | 1615 | && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; |
252b5132 RH |
1616 | op_end++) |
1617 | { | |
1618 | unsigned char c = op_start[nlen]; | |
1619 | ||
1620 | /* The machine independent code will convert CMP/EQ into cmp/EQ | |
d4845d57 JR |
1621 | because it thinks the '/' is the end of the symbol. Moreover, |
1622 | all but the first sub-insn is a parallel processing insn won't | |
1623 | be capitailzed. Instead of hacking up the machine independent | |
1624 | code, we just deal with it here. */ | |
252b5132 RH |
1625 | c = isupper (c) ? tolower (c) : c; |
1626 | name[nlen] = c; | |
1627 | nlen++; | |
1628 | } | |
c4aa876b | 1629 | |
252b5132 | 1630 | name[nlen] = 0; |
d4845d57 | 1631 | *str_p = op_end; |
252b5132 RH |
1632 | |
1633 | if (nlen == 0) | |
6b31947e | 1634 | as_bad (_("can't find opcode ")); |
252b5132 | 1635 | |
d4845d57 JR |
1636 | return (sh_opcode_info *) hash_find (opcode_hash_control, name); |
1637 | } | |
1638 | ||
1639 | /* Assemble a parallel processing insn. */ | |
1640 | #define DDT_BASE 0xf000 /* Base value for double data transfer insns */ | |
6b31947e | 1641 | |
0d10e182 | 1642 | static unsigned int |
d4845d57 JR |
1643 | assemble_ppi (op_end, opcode) |
1644 | char *op_end; | |
1645 | sh_opcode_info *opcode; | |
1646 | { | |
1647 | int movx = 0; | |
1648 | int movy = 0; | |
1649 | int cond = 0; | |
1650 | int field_b = 0; | |
1651 | char *output; | |
1652 | int move_code; | |
0d10e182 | 1653 | unsigned int size; |
d4845d57 JR |
1654 | |
1655 | /* Some insn ignore one or more register fields, e.g. psts machl,a0. | |
1656 | Make sure we encode a defined insn pattern. */ | |
1657 | reg_x = 0; | |
1658 | reg_y = 0; | |
1659 | ||
1660 | for (;;) | |
1661 | { | |
1662 | sh_operand_info operand[3]; | |
1663 | ||
1664 | if (opcode->arg[0] != A_END) | |
1665 | op_end = get_operands (opcode, op_end, operand); | |
1666 | opcode = get_specific (opcode, operand); | |
1667 | if (opcode == 0) | |
1668 | { | |
6b31947e | 1669 | /* Couldn't find an opcode which matched the operands. */ |
d4845d57 | 1670 | char *where = frag_more (2); |
0d10e182 | 1671 | size = 2; |
d4845d57 JR |
1672 | |
1673 | where[0] = 0x0; | |
1674 | where[1] = 0x0; | |
1675 | as_bad (_("invalid operands for opcode")); | |
0d10e182 | 1676 | return size; |
d4845d57 | 1677 | } |
c4aa876b | 1678 | |
d4845d57 JR |
1679 | if (opcode->nibbles[0] != PPI) |
1680 | as_bad (_("insn can't be combined with parallel processing insn")); | |
1681 | ||
1682 | switch (opcode->nibbles[1]) | |
1683 | { | |
1684 | ||
1685 | case NOPX: | |
1686 | if (movx) | |
1687 | as_bad (_("multiple movx specifications")); | |
1688 | movx = DDT_BASE; | |
1689 | break; | |
1690 | case NOPY: | |
1691 | if (movy) | |
1692 | as_bad (_("multiple movy specifications")); | |
1693 | movy = DDT_BASE; | |
1694 | break; | |
1695 | ||
1696 | case MOVX: | |
1697 | if (movx) | |
1698 | as_bad (_("multiple movx specifications")); | |
1699 | if (reg_n < 4 || reg_n > 5) | |
1700 | as_bad (_("invalid movx address register")); | |
1701 | if (opcode->nibbles[2] & 8) | |
1702 | { | |
1703 | if (reg_m == A_A1_NUM) | |
1704 | movx = 1 << 7; | |
1705 | else if (reg_m != A_A0_NUM) | |
1706 | as_bad (_("invalid movx dsp register")); | |
1707 | } | |
1708 | else | |
1709 | { | |
1710 | if (reg_x > 1) | |
1711 | as_bad (_("invalid movx dsp register")); | |
1712 | movx = reg_x << 7; | |
1713 | } | |
1714 | movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; | |
1715 | break; | |
1716 | ||
1717 | case MOVY: | |
1718 | if (movy) | |
1719 | as_bad (_("multiple movy specifications")); | |
1720 | if (opcode->nibbles[2] & 8) | |
1721 | { | |
1722 | /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, | |
1723 | so add 8 more. */ | |
1724 | movy = 8; | |
1725 | if (reg_m == A_A1_NUM) | |
1726 | movy += 1 << 6; | |
1727 | else if (reg_m != A_A0_NUM) | |
1728 | as_bad (_("invalid movy dsp register")); | |
1729 | } | |
1730 | else | |
1731 | { | |
1732 | if (reg_y > 1) | |
1733 | as_bad (_("invalid movy dsp register")); | |
1734 | movy = reg_y << 6; | |
1735 | } | |
1736 | if (reg_n < 6 || reg_n > 7) | |
1737 | as_bad (_("invalid movy address register")); | |
1738 | movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; | |
1739 | break; | |
1740 | ||
1741 | case PSH: | |
015551fc | 1742 | if (operand[0].immediate.X_op != O_constant) |
d4845d57 JR |
1743 | as_bad (_("dsp immediate shift value not constant")); |
1744 | field_b = ((opcode->nibbles[2] << 12) | |
015551fc | 1745 | | (operand[0].immediate.X_add_number & 127) << 4 |
d4845d57 JR |
1746 | | reg_n); |
1747 | break; | |
1748 | case PPI3: | |
1749 | if (field_b) | |
1750 | as_bad (_("multiple parallel processing specifications")); | |
1751 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
1752 | + (reg_x << 6) + (reg_y << 4) + reg_n); | |
1753 | break; | |
1754 | case PDC: | |
1755 | if (cond) | |
1756 | as_bad (_("multiple condition specifications")); | |
1757 | cond = opcode->nibbles[2] << 8; | |
1758 | if (*op_end) | |
1759 | goto skip_cond_check; | |
1760 | break; | |
1761 | case PPIC: | |
1762 | if (field_b) | |
1763 | as_bad (_("multiple parallel processing specifications")); | |
1764 | field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) | |
1765 | + cond + (reg_x << 6) + (reg_y << 4) + reg_n); | |
1766 | cond = 0; | |
1767 | break; | |
1768 | case PMUL: | |
1769 | if (field_b) | |
1770 | { | |
1771 | if ((field_b & 0xef00) != 0xa100) | |
1772 | as_bad (_("insn cannot be combined with pmuls")); | |
1773 | field_b -= 0x8100; | |
1774 | switch (field_b & 0xf) | |
1775 | { | |
1776 | case A_X0_NUM: | |
1777 | field_b += 0 - A_X0_NUM; | |
1778 | break; | |
1779 | case A_Y0_NUM: | |
1780 | field_b += 1 - A_Y0_NUM; | |
1781 | break; | |
1782 | case A_A0_NUM: | |
1783 | field_b += 2 - A_A0_NUM; | |
1784 | break; | |
1785 | case A_A1_NUM: | |
1786 | field_b += 3 - A_A1_NUM; | |
1787 | break; | |
1788 | default: | |
1789 | as_bad (_("bad padd / psub pmuls output operand")); | |
1790 | } | |
1791 | } | |
1792 | field_b += 0x4000 + reg_efg; | |
1793 | break; | |
1794 | default: | |
1795 | abort (); | |
1796 | } | |
1797 | if (cond) | |
1798 | { | |
1799 | as_bad (_("condition not followed by conditionalizable insn")); | |
1800 | cond = 0; | |
1801 | } | |
1802 | if (! *op_end) | |
1803 | break; | |
1804 | skip_cond_check: | |
1805 | opcode = find_cooked_opcode (&op_end); | |
1806 | if (opcode == NULL) | |
1807 | { | |
1808 | (as_bad | |
1809 | (_("unrecognized characters at end of parallel processing insn"))); | |
1810 | break; | |
1811 | } | |
1812 | } | |
1813 | ||
1814 | move_code = movx | movy; | |
1815 | if (field_b) | |
1816 | { | |
1817 | /* Parallel processing insn. */ | |
1818 | unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b; | |
1819 | ||
1820 | output = frag_more (4); | |
0d10e182 | 1821 | size = 4; |
d4845d57 JR |
1822 | if (! target_big_endian) |
1823 | { | |
1824 | output[3] = ppi_code >> 8; | |
1825 | output[2] = ppi_code; | |
1826 | } | |
1827 | else | |
1828 | { | |
1829 | output[2] = ppi_code >> 8; | |
1830 | output[3] = ppi_code; | |
1831 | } | |
1832 | move_code |= 0xf800; | |
1833 | } | |
1834 | else | |
0d10e182 JL |
1835 | { |
1836 | /* Just a double data transfer. */ | |
1837 | output = frag_more (2); | |
1838 | size = 2; | |
1839 | } | |
d4845d57 JR |
1840 | if (! target_big_endian) |
1841 | { | |
1842 | output[1] = move_code >> 8; | |
1843 | output[0] = move_code; | |
1844 | } | |
1845 | else | |
1846 | { | |
1847 | output[0] = move_code >> 8; | |
1848 | output[1] = move_code; | |
1849 | } | |
0d10e182 | 1850 | return size; |
d4845d57 JR |
1851 | } |
1852 | ||
1853 | /* This is the guts of the machine-dependent assembler. STR points to a | |
1854 | machine dependent instruction. This function is supposed to emit | |
6b31947e | 1855 | the frags/bytes it assembles to. */ |
d4845d57 JR |
1856 | |
1857 | void | |
1858 | md_assemble (str) | |
1859 | char *str; | |
1860 | { | |
1861 | unsigned char *op_end; | |
1862 | sh_operand_info operand[3]; | |
1863 | sh_opcode_info *opcode; | |
0d10e182 | 1864 | unsigned int size; |
d4845d57 JR |
1865 | |
1866 | opcode = find_cooked_opcode (&str); | |
1867 | op_end = str; | |
252b5132 RH |
1868 | |
1869 | if (opcode == NULL) | |
1870 | { | |
1871 | as_bad (_("unknown opcode")); | |
1872 | return; | |
1873 | } | |
1874 | ||
1875 | if (sh_relax | |
1876 | && ! seg_info (now_seg)->tc_segment_info_data.in_code) | |
1877 | { | |
1878 | /* Output a CODE reloc to tell the linker that the following | |
1879 | bytes are instructions, not data. */ | |
1880 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
1881 | BFD_RELOC_SH_CODE); | |
1882 | seg_info (now_seg)->tc_segment_info_data.in_code = 1; | |
1883 | } | |
1884 | ||
d4845d57 JR |
1885 | if (opcode->nibbles[0] == PPI) |
1886 | { | |
0d10e182 | 1887 | size = assemble_ppi (op_end, opcode); |
252b5132 RH |
1888 | } |
1889 | else | |
1890 | { | |
0d10e182 JL |
1891 | if (opcode->arg[0] == A_BDISP12 |
1892 | || opcode->arg[0] == A_BDISP8) | |
252b5132 | 1893 | { |
0d10e182 JL |
1894 | parse_exp (op_end + 1, &operand[0]); |
1895 | build_relax (opcode, &operand[0]); | |
5fc44b2d JR |
1896 | } |
1897 | else | |
1898 | { | |
0d10e182 JL |
1899 | if (opcode->arg[0] == A_END) |
1900 | { | |
1901 | /* Ignore trailing whitespace. If there is any, it has already | |
1902 | been compressed to a single space. */ | |
1903 | if (*op_end == ' ') | |
1904 | op_end++; | |
1905 | } | |
1906 | else | |
1907 | { | |
1908 | op_end = get_operands (opcode, op_end, operand); | |
1909 | } | |
1910 | opcode = get_specific (opcode, operand); | |
252b5132 | 1911 | |
0d10e182 JL |
1912 | if (opcode == 0) |
1913 | { | |
1914 | /* Couldn't find an opcode which matched the operands. */ | |
1915 | char *where = frag_more (2); | |
1916 | size = 2; | |
252b5132 | 1917 | |
0d10e182 JL |
1918 | where[0] = 0x0; |
1919 | where[1] = 0x0; | |
1920 | as_bad (_("invalid operands for opcode")); | |
1921 | } | |
1922 | else | |
1923 | { | |
1924 | if (*op_end) | |
1925 | as_bad (_("excess operands: '%s'"), op_end); | |
1926 | ||
1927 | size = build_Mytes (opcode, operand); | |
1928 | } | |
252b5132 | 1929 | } |
0d10e182 | 1930 | } |
252b5132 | 1931 | |
0d10e182 | 1932 | if (debug_type == DEBUG_DWARF2) |
85a39694 | 1933 | dwarf2_generate_asm_lineno (size); |
252b5132 RH |
1934 | } |
1935 | ||
1936 | /* This routine is called each time a label definition is seen. It | |
1937 | emits a BFD_RELOC_SH_LABEL reloc if necessary. */ | |
1938 | ||
1939 | void | |
1940 | sh_frob_label () | |
1941 | { | |
1942 | static fragS *last_label_frag; | |
1943 | static int last_label_offset; | |
1944 | ||
1945 | if (sh_relax | |
1946 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
1947 | { | |
1948 | int offset; | |
1949 | ||
1950 | offset = frag_now_fix (); | |
1951 | if (frag_now != last_label_frag | |
1952 | || offset != last_label_offset) | |
c4aa876b | 1953 | { |
252b5132 RH |
1954 | fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); |
1955 | last_label_frag = frag_now; | |
1956 | last_label_offset = offset; | |
1957 | } | |
1958 | } | |
1959 | } | |
1960 | ||
1961 | /* This routine is called when the assembler is about to output some | |
1962 | data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ | |
1963 | ||
1964 | void | |
1965 | sh_flush_pending_output () | |
1966 | { | |
1967 | if (sh_relax | |
1968 | && seg_info (now_seg)->tc_segment_info_data.in_code) | |
1969 | { | |
1970 | fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, | |
1971 | BFD_RELOC_SH_DATA); | |
1972 | seg_info (now_seg)->tc_segment_info_data.in_code = 0; | |
1973 | } | |
1974 | } | |
1975 | ||
1976 | symbolS * | |
c0fecd35 AM |
1977 | md_undefined_symbol (name) |
1978 | char *name; | |
252b5132 | 1979 | { |
a1cc9221 AO |
1980 | #ifdef OBJ_ELF |
1981 | /* Under ELF we need to default _GLOBAL_OFFSET_TABLE. Otherwise we | |
1982 | have no need to default values of symbols. */ | |
1983 | if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) | |
1984 | { | |
1985 | if (!GOT_symbol) | |
1986 | { | |
1987 | if (symbol_find (name)) | |
1988 | as_bad ("GOT already in the symbol table"); | |
81d4177b | 1989 | |
a1cc9221 AO |
1990 | GOT_symbol = symbol_new (name, undefined_section, |
1991 | (valueT)0, & zero_address_frag); | |
1992 | } | |
81d4177b | 1993 | |
a1cc9221 AO |
1994 | return GOT_symbol; |
1995 | } | |
1996 | #endif /* OBJ_ELF */ | |
81d4177b | 1997 | |
252b5132 RH |
1998 | return 0; |
1999 | } | |
2000 | ||
2001 | #ifdef OBJ_COFF | |
056350c6 | 2002 | #ifndef BFD_ASSEMBLER |
252b5132 RH |
2003 | |
2004 | void | |
c0fecd35 AM |
2005 | tc_crawl_symbol_chain (headers) |
2006 | object_headers *headers; | |
252b5132 RH |
2007 | { |
2008 | printf (_("call to tc_crawl_symbol_chain \n")); | |
2009 | } | |
2010 | ||
2011 | void | |
c0fecd35 AM |
2012 | tc_headers_hook (headers) |
2013 | object_headers *headers; | |
252b5132 RH |
2014 | { |
2015 | printf (_("call to tc_headers_hook \n")); | |
2016 | } | |
2017 | ||
056350c6 | 2018 | #endif |
252b5132 RH |
2019 | #endif |
2020 | ||
6b31947e NC |
2021 | /* Various routines to kill one day. */ |
2022 | /* Equal to MAX_PRECISION in atof-ieee.c. */ | |
252b5132 RH |
2023 | #define MAX_LITTLENUMS 6 |
2024 | ||
6b31947e NC |
2025 | /* Turn a string in input_line_pointer into a floating point constant |
2026 | of type TYPE, and store the appropriate bytes in *LITP. The number | |
2027 | of LITTLENUMS emitted is stored in *SIZEP . An error message is | |
2028 | returned, or NULL on OK. */ | |
2029 | ||
252b5132 RH |
2030 | char * |
2031 | md_atof (type, litP, sizeP) | |
2032 | int type; | |
2033 | char *litP; | |
2034 | int *sizeP; | |
2035 | { | |
2036 | int prec; | |
2037 | LITTLENUM_TYPE words[4]; | |
2038 | char *t; | |
2039 | int i; | |
2040 | ||
2041 | switch (type) | |
2042 | { | |
2043 | case 'f': | |
2044 | prec = 2; | |
2045 | break; | |
2046 | ||
2047 | case 'd': | |
2048 | prec = 4; | |
2049 | break; | |
2050 | ||
2051 | default: | |
2052 | *sizeP = 0; | |
2053 | return _("bad call to md_atof"); | |
2054 | } | |
2055 | ||
2056 | t = atof_ieee (input_line_pointer, type, words); | |
2057 | if (t) | |
2058 | input_line_pointer = t; | |
2059 | ||
2060 | *sizeP = prec * 2; | |
2061 | ||
2062 | if (! target_big_endian) | |
2063 | { | |
2064 | for (i = prec - 1; i >= 0; i--) | |
2065 | { | |
2066 | md_number_to_chars (litP, (valueT) words[i], 2); | |
2067 | litP += 2; | |
2068 | } | |
2069 | } | |
2070 | else | |
2071 | { | |
2072 | for (i = 0; i < prec; i++) | |
2073 | { | |
2074 | md_number_to_chars (litP, (valueT) words[i], 2); | |
2075 | litP += 2; | |
2076 | } | |
2077 | } | |
c4aa876b | 2078 | |
252b5132 RH |
2079 | return NULL; |
2080 | } | |
2081 | ||
2082 | /* Handle the .uses pseudo-op. This pseudo-op is used just before a | |
2083 | call instruction. It refers to a label of the instruction which | |
2084 | loads the register which the call uses. We use it to generate a | |
2085 | special reloc for the linker. */ | |
2086 | ||
2087 | static void | |
2088 | s_uses (ignore) | |
43841e91 | 2089 | int ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
2090 | { |
2091 | expressionS ex; | |
2092 | ||
2093 | if (! sh_relax) | |
2094 | as_warn (_(".uses pseudo-op seen when not relaxing")); | |
2095 | ||
2096 | expression (&ex); | |
2097 | ||
2098 | if (ex.X_op != O_symbol || ex.X_add_number != 0) | |
2099 | { | |
2100 | as_bad (_("bad .uses format")); | |
2101 | ignore_rest_of_line (); | |
2102 | return; | |
2103 | } | |
2104 | ||
2105 | fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); | |
2106 | ||
2107 | demand_empty_rest_of_line (); | |
2108 | } | |
2109 | \f | |
2110 | CONST char *md_shortopts = ""; | |
6b31947e NC |
2111 | struct option md_longopts[] = |
2112 | { | |
252b5132 RH |
2113 | #define OPTION_RELAX (OPTION_MD_BASE) |
2114 | #define OPTION_LITTLE (OPTION_MD_BASE + 1) | |
2115 | #define OPTION_SMALL (OPTION_LITTLE + 1) | |
d4845d57 | 2116 | #define OPTION_DSP (OPTION_SMALL + 1) |
252b5132 RH |
2117 | |
2118 | {"relax", no_argument, NULL, OPTION_RELAX}, | |
2119 | {"little", no_argument, NULL, OPTION_LITTLE}, | |
2120 | {"small", no_argument, NULL, OPTION_SMALL}, | |
d4845d57 | 2121 | {"dsp", no_argument, NULL, OPTION_DSP}, |
252b5132 RH |
2122 | {NULL, no_argument, NULL, 0} |
2123 | }; | |
c4aa876b | 2124 | size_t md_longopts_size = sizeof (md_longopts); |
252b5132 RH |
2125 | |
2126 | int | |
2127 | md_parse_option (c, arg) | |
2128 | int c; | |
43841e91 | 2129 | char *arg ATTRIBUTE_UNUSED; |
252b5132 RH |
2130 | { |
2131 | switch (c) | |
2132 | { | |
2133 | case OPTION_RELAX: | |
2134 | sh_relax = 1; | |
2135 | break; | |
2136 | ||
2137 | case OPTION_LITTLE: | |
2138 | shl = 1; | |
2139 | target_big_endian = 0; | |
2140 | break; | |
2141 | ||
2142 | case OPTION_SMALL: | |
2143 | sh_small = 1; | |
2144 | break; | |
2145 | ||
d4845d57 JR |
2146 | case OPTION_DSP: |
2147 | sh_dsp = 1; | |
2148 | break; | |
2149 | ||
252b5132 RH |
2150 | default: |
2151 | return 0; | |
2152 | } | |
2153 | ||
2154 | return 1; | |
2155 | } | |
2156 | ||
2157 | void | |
2158 | md_show_usage (stream) | |
2159 | FILE *stream; | |
2160 | { | |
c4aa876b | 2161 | fprintf (stream, _("\ |
252b5132 RH |
2162 | SH options:\n\ |
2163 | -little generate little endian code\n\ | |
2164 | -relax alter jump instructions for long displacements\n\ | |
5b8274e3 | 2165 | -small align sections to 4 byte boundaries, not 16\n\ |
182e89d3 | 2166 | -dsp enable sh-dsp insns, and disable sh3e / sh4 insns.\n")); |
252b5132 RH |
2167 | } |
2168 | \f | |
2169 | void | |
2170 | tc_Nout_fix_to_chars () | |
2171 | { | |
2172 | printf (_("call to tc_Nout_fix_to_chars \n")); | |
2173 | abort (); | |
2174 | } | |
2175 | ||
2176 | /* This struct is used to pass arguments to sh_count_relocs through | |
2177 | bfd_map_over_sections. */ | |
2178 | ||
2179 | struct sh_count_relocs | |
2180 | { | |
2181 | /* Symbol we are looking for. */ | |
2182 | symbolS *sym; | |
2183 | /* Count of relocs found. */ | |
2184 | int count; | |
2185 | }; | |
2186 | ||
2187 | /* Count the number of fixups in a section which refer to a particular | |
2188 | symbol. When using BFD_ASSEMBLER, this is called via | |
2189 | bfd_map_over_sections. */ | |
2190 | ||
252b5132 RH |
2191 | static void |
2192 | sh_count_relocs (abfd, sec, data) | |
43841e91 | 2193 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 RH |
2194 | segT sec; |
2195 | PTR data; | |
2196 | { | |
2197 | struct sh_count_relocs *info = (struct sh_count_relocs *) data; | |
2198 | segment_info_type *seginfo; | |
2199 | symbolS *sym; | |
2200 | fixS *fix; | |
2201 | ||
2202 | seginfo = seg_info (sec); | |
2203 | if (seginfo == NULL) | |
2204 | return; | |
2205 | ||
2206 | sym = info->sym; | |
2207 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
2208 | { | |
2209 | if (fix->fx_addsy == sym) | |
2210 | { | |
2211 | ++info->count; | |
2212 | fix->fx_tcbit = 1; | |
2213 | } | |
2214 | } | |
2215 | } | |
2216 | ||
2217 | /* Handle the count relocs for a particular section. When using | |
2218 | BFD_ASSEMBLER, this is called via bfd_map_over_sections. */ | |
2219 | ||
252b5132 RH |
2220 | static void |
2221 | sh_frob_section (abfd, sec, ignore) | |
43841e91 | 2222 | bfd *abfd ATTRIBUTE_UNUSED; |
252b5132 | 2223 | segT sec; |
43841e91 | 2224 | PTR ignore ATTRIBUTE_UNUSED; |
252b5132 RH |
2225 | { |
2226 | segment_info_type *seginfo; | |
2227 | fixS *fix; | |
2228 | ||
2229 | seginfo = seg_info (sec); | |
2230 | if (seginfo == NULL) | |
2231 | return; | |
2232 | ||
2233 | for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) | |
2234 | { | |
2235 | symbolS *sym; | |
2236 | bfd_vma val; | |
2237 | fixS *fscan; | |
2238 | struct sh_count_relocs info; | |
2239 | ||
2240 | if (fix->fx_r_type != BFD_RELOC_SH_USES) | |
2241 | continue; | |
2242 | ||
2243 | /* The BFD_RELOC_SH_USES reloc should refer to a defined local | |
2244 | symbol in the same section. */ | |
2245 | sym = fix->fx_addsy; | |
2246 | if (sym == NULL | |
2247 | || fix->fx_subsy != NULL | |
2248 | || fix->fx_addnumber != 0 | |
2249 | || S_GET_SEGMENT (sym) != sec | |
2250 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) | |
2251 | || S_GET_STORAGE_CLASS (sym) == C_EXT | |
2252 | #endif | |
2253 | || S_IS_EXTERNAL (sym)) | |
2254 | { | |
2255 | as_warn_where (fix->fx_file, fix->fx_line, | |
2256 | _(".uses does not refer to a local symbol in the same section")); | |
2257 | continue; | |
2258 | } | |
2259 | ||
2260 | /* Look through the fixups again, this time looking for one | |
2261 | at the same location as sym. */ | |
2262 | val = S_GET_VALUE (sym); | |
2263 | for (fscan = seginfo->fix_root; | |
2264 | fscan != NULL; | |
2265 | fscan = fscan->fx_next) | |
2266 | if (val == fscan->fx_frag->fr_address + fscan->fx_where | |
2267 | && fscan->fx_r_type != BFD_RELOC_SH_ALIGN | |
2268 | && fscan->fx_r_type != BFD_RELOC_SH_CODE | |
2269 | && fscan->fx_r_type != BFD_RELOC_SH_DATA | |
2270 | && fscan->fx_r_type != BFD_RELOC_SH_LABEL) | |
2271 | break; | |
2272 | if (fscan == NULL) | |
2273 | { | |
2274 | as_warn_where (fix->fx_file, fix->fx_line, | |
2275 | _("can't find fixup pointed to by .uses")); | |
2276 | continue; | |
2277 | } | |
2278 | ||
2279 | if (fscan->fx_tcbit) | |
2280 | { | |
2281 | /* We've already done this one. */ | |
2282 | continue; | |
2283 | } | |
2284 | ||
6b31947e NC |
2285 | /* The variable fscan should also be a fixup to a local symbol |
2286 | in the same section. */ | |
252b5132 RH |
2287 | sym = fscan->fx_addsy; |
2288 | if (sym == NULL | |
2289 | || fscan->fx_subsy != NULL | |
2290 | || fscan->fx_addnumber != 0 | |
2291 | || S_GET_SEGMENT (sym) != sec | |
2292 | #if ! defined (BFD_ASSEMBLER) && defined (OBJ_COFF) | |
2293 | || S_GET_STORAGE_CLASS (sym) == C_EXT | |
2294 | #endif | |
2295 | || S_IS_EXTERNAL (sym)) | |
2296 | { | |
2297 | as_warn_where (fix->fx_file, fix->fx_line, | |
2298 | _(".uses target does not refer to a local symbol in the same section")); | |
2299 | continue; | |
2300 | } | |
2301 | ||
2302 | /* Now we look through all the fixups of all the sections, | |
2303 | counting the number of times we find a reference to sym. */ | |
2304 | info.sym = sym; | |
2305 | info.count = 0; | |
2306 | #ifdef BFD_ASSEMBLER | |
2307 | bfd_map_over_sections (stdoutput, sh_count_relocs, (PTR) &info); | |
2308 | #else | |
2309 | { | |
2310 | int iscan; | |
2311 | ||
2312 | for (iscan = SEG_E0; iscan < SEG_UNKNOWN; iscan++) | |
2313 | sh_count_relocs ((bfd *) NULL, iscan, (PTR) &info); | |
2314 | } | |
2315 | #endif | |
2316 | ||
2317 | if (info.count < 1) | |
2318 | abort (); | |
2319 | ||
2320 | /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. | |
2321 | We have already adjusted the value of sym to include the | |
2322 | fragment address, so we undo that adjustment here. */ | |
2323 | subseg_change (sec, 0); | |
49309057 ILT |
2324 | fix_new (symbol_get_frag (sym), |
2325 | S_GET_VALUE (sym) - symbol_get_frag (sym)->fr_address, | |
252b5132 RH |
2326 | 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); |
2327 | } | |
2328 | } | |
2329 | ||
2330 | /* This function is called after the symbol table has been completed, | |
2331 | but before the relocs or section contents have been written out. | |
2332 | If we have seen any .uses pseudo-ops, they point to an instruction | |
2333 | which loads a register with the address of a function. We look | |
2334 | through the fixups to find where the function address is being | |
2335 | loaded from. We then generate a COUNT reloc giving the number of | |
2336 | times that function address is referred to. The linker uses this | |
2337 | information when doing relaxing, to decide when it can eliminate | |
2338 | the stored function address entirely. */ | |
2339 | ||
2340 | void | |
2341 | sh_frob_file () | |
2342 | { | |
2343 | if (! sh_relax) | |
2344 | return; | |
2345 | ||
2346 | #ifdef BFD_ASSEMBLER | |
2347 | bfd_map_over_sections (stdoutput, sh_frob_section, (PTR) NULL); | |
2348 | #else | |
2349 | { | |
2350 | int iseg; | |
2351 | ||
2352 | for (iseg = SEG_E0; iseg < SEG_UNKNOWN; iseg++) | |
2353 | sh_frob_section ((bfd *) NULL, iseg, (PTR) NULL); | |
2354 | } | |
2355 | #endif | |
2356 | } | |
2357 | ||
2358 | /* Called after relaxing. Set the correct sizes of the fragments, and | |
2359 | create relocs so that md_apply_fix will fill in the correct values. */ | |
2360 | ||
2361 | void | |
2362 | md_convert_frag (headers, seg, fragP) | |
2363 | #ifdef BFD_ASSEMBLER | |
43841e91 | 2364 | bfd *headers ATTRIBUTE_UNUSED; |
252b5132 RH |
2365 | #else |
2366 | object_headers *headers; | |
2367 | #endif | |
2368 | segT seg; | |
2369 | fragS *fragP; | |
2370 | { | |
2371 | int donerelax = 0; | |
2372 | ||
2373 | switch (fragP->fr_subtype) | |
2374 | { | |
2375 | case C (COND_JUMP, COND8): | |
2376 | case C (COND_JUMP_DELAY, COND8): | |
2377 | subseg_change (seg, 0); | |
2378 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
2379 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
2380 | fragP->fr_fix += 2; | |
2381 | fragP->fr_var = 0; | |
2382 | break; | |
2383 | ||
2384 | case C (UNCOND_JUMP, UNCOND12): | |
2385 | subseg_change (seg, 0); | |
2386 | fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, | |
2387 | 1, BFD_RELOC_SH_PCDISP12BY2); | |
2388 | fragP->fr_fix += 2; | |
2389 | fragP->fr_var = 0; | |
2390 | break; | |
2391 | ||
2392 | case C (UNCOND_JUMP, UNCOND32): | |
2393 | case C (UNCOND_JUMP, UNDEF_WORD_DISP): | |
2394 | if (fragP->fr_symbol == NULL) | |
2395 | as_bad (_("at 0x%lx, displacement overflows 12-bit field"), | |
2396 | (unsigned long) fragP->fr_address); | |
2397 | else if (S_IS_DEFINED (fragP->fr_symbol)) | |
2398 | as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 12-bit field"), | |
c4aa876b | 2399 | (unsigned long) fragP->fr_address, |
252b5132 RH |
2400 | S_GET_NAME (fragP->fr_symbol)); |
2401 | else | |
2402 | as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 12-bit field"), | |
c4aa876b | 2403 | (unsigned long) fragP->fr_address, |
252b5132 RH |
2404 | S_GET_NAME (fragP->fr_symbol)); |
2405 | ||
252b5132 RH |
2406 | break; |
2407 | ||
2408 | case C (COND_JUMP, COND12): | |
2409 | case C (COND_JUMP_DELAY, COND12): | |
6b31947e | 2410 | /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */ |
252b5132 RH |
2411 | /* I found that a relax failure for gcc.c-torture/execute/930628-1.c |
2412 | was due to gas incorrectly relaxing an out-of-range conditional | |
2413 | branch with delay slot. It turned: | |
2414 | bf.s L6 (slot mov.l r12,@(44,r0)) | |
2415 | into: | |
c4aa876b | 2416 | |
252b5132 RH |
2417 | 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) |
2418 | 30: 00 09 nop | |
2419 | 32: 10 cb mov.l r12,@(44,r0) | |
2420 | Therefore, branches with delay slots have to be handled | |
2421 | differently from ones without delay slots. */ | |
2422 | { | |
2423 | unsigned char *buffer = | |
2424 | (unsigned char *) (fragP->fr_fix + fragP->fr_literal); | |
2425 | int highbyte = target_big_endian ? 0 : 1; | |
2426 | int lowbyte = target_big_endian ? 1 : 0; | |
2427 | int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); | |
2428 | ||
2429 | /* Toggle the true/false bit of the bcond. */ | |
2430 | buffer[highbyte] ^= 0x2; | |
2431 | ||
2432 | /* If this is a dalayed branch, we may not put the the bra in the | |
2433 | slot. So we change it to a non-delayed branch, like that: | |
2434 | b! cond slot_label; bra disp; slot_label: slot_insn | |
2435 | ??? We should try if swapping the conditional branch and | |
2436 | its delay-slot insn already makes the branch reach. */ | |
2437 | ||
2438 | /* Build a relocation to six / four bytes farther on. */ | |
2439 | subseg_change (seg, 0); | |
2440 | fix_new (fragP, fragP->fr_fix, 2, | |
2441 | #ifdef BFD_ASSEMBLER | |
2442 | section_symbol (seg), | |
2443 | #else | |
2444 | seg_info (seg)->dot, | |
2445 | #endif | |
2446 | fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), | |
2447 | 1, BFD_RELOC_SH_PCDISP8BY2); | |
2448 | ||
2449 | /* Set up a jump instruction. */ | |
2450 | buffer[highbyte + 2] = 0xa0; | |
2451 | buffer[lowbyte + 2] = 0; | |
2452 | fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, | |
2453 | fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); | |
2454 | ||
2455 | if (delay) | |
2456 | { | |
2457 | buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ | |
2458 | fragP->fr_fix += 4; | |
2459 | } | |
2460 | else | |
2461 | { | |
2462 | /* Fill in a NOP instruction. */ | |
2463 | buffer[highbyte + 4] = 0x0; | |
2464 | buffer[lowbyte + 4] = 0x9; | |
2465 | ||
2466 | fragP->fr_fix += 6; | |
2467 | } | |
2468 | fragP->fr_var = 0; | |
2469 | donerelax = 1; | |
2470 | } | |
2471 | break; | |
2472 | ||
2473 | case C (COND_JUMP, COND32): | |
2474 | case C (COND_JUMP_DELAY, COND32): | |
2475 | case C (COND_JUMP, UNDEF_WORD_DISP): | |
2476 | case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): | |
2477 | if (fragP->fr_symbol == NULL) | |
c4aa876b | 2478 | as_bad (_("at 0x%lx, displacement overflows 8-bit field"), |
252b5132 RH |
2479 | (unsigned long) fragP->fr_address); |
2480 | else if (S_IS_DEFINED (fragP->fr_symbol)) | |
2481 | as_bad (_("at 0x%lx, displacement to defined symbol %s overflows 8-bit field "), | |
c4aa876b | 2482 | (unsigned long) fragP->fr_address, |
252b5132 RH |
2483 | S_GET_NAME (fragP->fr_symbol)); |
2484 | else | |
2485 | as_bad (_("at 0x%lx, displacement to undefined symbol %s overflows 8-bit field "), | |
c4aa876b | 2486 | (unsigned long) fragP->fr_address, |
252b5132 | 2487 | S_GET_NAME (fragP->fr_symbol)); |
252b5132 RH |
2488 | break; |
2489 | ||
2490 | default: | |
2491 | abort (); | |
2492 | } | |
2493 | ||
2494 | if (donerelax && !sh_relax) | |
2495 | as_warn_where (fragP->fr_file, fragP->fr_line, | |
2496 | _("overflow in branch to %s; converted into longer instruction sequence"), | |
2497 | (fragP->fr_symbol != NULL | |
2498 | ? S_GET_NAME (fragP->fr_symbol) | |
2499 | : "")); | |
2500 | } | |
2501 | ||
2502 | valueT | |
c0fecd35 AM |
2503 | md_section_align (seg, size) |
2504 | segT seg; | |
2505 | valueT size; | |
252b5132 RH |
2506 | { |
2507 | #ifdef BFD_ASSEMBLER | |
2508 | #ifdef OBJ_ELF | |
2509 | return size; | |
2510 | #else /* ! OBJ_ELF */ | |
2511 | return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1) | |
2512 | & (-1 << bfd_get_section_alignment (stdoutput, seg))); | |
2513 | #endif /* ! OBJ_ELF */ | |
2514 | #else /* ! BFD_ASSEMBLER */ | |
2515 | return ((size + (1 << section_alignment[(int) seg]) - 1) | |
2516 | & (-1 << section_alignment[(int) seg])); | |
2517 | #endif /* ! BFD_ASSEMBLER */ | |
2518 | } | |
2519 | ||
2520 | /* This static variable is set by s_uacons to tell sh_cons_align that | |
2521 | the expession does not need to be aligned. */ | |
2522 | ||
2523 | static int sh_no_align_cons = 0; | |
2524 | ||
2525 | /* This handles the unaligned space allocation pseudo-ops, such as | |
2526 | .uaword. .uaword is just like .word, but the value does not need | |
2527 | to be aligned. */ | |
2528 | ||
2529 | static void | |
2530 | s_uacons (bytes) | |
2531 | int bytes; | |
2532 | { | |
2533 | /* Tell sh_cons_align not to align this value. */ | |
2534 | sh_no_align_cons = 1; | |
2535 | cons (bytes); | |
2536 | } | |
2537 | ||
2538 | /* If a .word, et. al., pseud-op is seen, warn if the value is not | |
2539 | aligned correctly. Note that this can cause warnings to be issued | |
2540 | when assembling initialized structured which were declared with the | |
2541 | packed attribute. FIXME: Perhaps we should require an option to | |
2542 | enable this warning? */ | |
2543 | ||
2544 | void | |
2545 | sh_cons_align (nbytes) | |
2546 | int nbytes; | |
2547 | { | |
2548 | int nalign; | |
2549 | char *p; | |
2550 | ||
2551 | if (sh_no_align_cons) | |
2552 | { | |
2553 | /* This is an unaligned pseudo-op. */ | |
2554 | sh_no_align_cons = 0; | |
2555 | return; | |
2556 | } | |
2557 | ||
2558 | nalign = 0; | |
2559 | while ((nbytes & 1) == 0) | |
2560 | { | |
2561 | ++nalign; | |
2562 | nbytes >>= 1; | |
2563 | } | |
2564 | ||
2565 | if (nalign == 0) | |
2566 | return; | |
2567 | ||
2568 | if (now_seg == absolute_section) | |
2569 | { | |
2570 | if ((abs_section_offset & ((1 << nalign) - 1)) != 0) | |
2571 | as_warn (_("misaligned data")); | |
2572 | return; | |
2573 | } | |
2574 | ||
2575 | p = frag_var (rs_align_code, 1, 1, (relax_substateT) 0, | |
2576 | (symbolS *) NULL, (offsetT) nalign, (char *) NULL); | |
2577 | ||
2578 | record_alignment (now_seg, nalign); | |
2579 | } | |
2580 | ||
2581 | /* When relaxing, we need to output a reloc for any .align directive | |
2582 | that requests alignment to a four byte boundary or larger. This is | |
2583 | also where we check for misaligned data. */ | |
2584 | ||
2585 | void | |
2586 | sh_handle_align (frag) | |
2587 | fragS *frag; | |
2588 | { | |
2589 | if (sh_relax | |
2590 | && frag->fr_type == rs_align | |
2591 | && frag->fr_address + frag->fr_fix > 0 | |
2592 | && frag->fr_offset > 1 | |
2593 | && now_seg != bss_section) | |
2594 | fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, | |
2595 | BFD_RELOC_SH_ALIGN); | |
2596 | ||
2597 | if (frag->fr_type == rs_align_code | |
2598 | && frag->fr_next->fr_address - frag->fr_address - frag->fr_fix != 0) | |
2599 | as_warn_where (frag->fr_file, frag->fr_line, _("misaligned data")); | |
2600 | } | |
2601 | ||
2602 | /* This macro decides whether a particular reloc is an entry in a | |
2603 | switch table. It is used when relaxing, because the linker needs | |
2604 | to know about all such entries so that it can adjust them if | |
2605 | necessary. */ | |
2606 | ||
2607 | #ifdef BFD_ASSEMBLER | |
2608 | #define SWITCH_TABLE_CONS(fix) (0) | |
2609 | #else | |
2610 | #define SWITCH_TABLE_CONS(fix) \ | |
2611 | ((fix)->fx_r_type == 0 \ | |
2612 | && ((fix)->fx_size == 2 \ | |
2613 | || (fix)->fx_size == 1 \ | |
2614 | || (fix)->fx_size == 4)) | |
2615 | #endif | |
2616 | ||
2617 | #define SWITCH_TABLE(fix) \ | |
2618 | ((fix)->fx_addsy != NULL \ | |
2619 | && (fix)->fx_subsy != NULL \ | |
2620 | && S_GET_SEGMENT ((fix)->fx_addsy) == text_section \ | |
2621 | && S_GET_SEGMENT ((fix)->fx_subsy) == text_section \ | |
2622 | && ((fix)->fx_r_type == BFD_RELOC_32 \ | |
2623 | || (fix)->fx_r_type == BFD_RELOC_16 \ | |
2624 | || (fix)->fx_r_type == BFD_RELOC_8 \ | |
2625 | || SWITCH_TABLE_CONS (fix))) | |
2626 | ||
2627 | /* See whether we need to force a relocation into the output file. | |
2628 | This is used to force out switch and PC relative relocations when | |
2629 | relaxing. */ | |
2630 | ||
2631 | int | |
2632 | sh_force_relocation (fix) | |
2633 | fixS *fix; | |
2634 | { | |
2635 | ||
2636 | if (fix->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
015551fc JR |
2637 | || fix->fx_r_type == BFD_RELOC_VTABLE_ENTRY |
2638 | || fix->fx_r_type == BFD_RELOC_SH_LOOP_START | |
2639 | || fix->fx_r_type == BFD_RELOC_SH_LOOP_END) | |
252b5132 RH |
2640 | return 1; |
2641 | ||
2642 | if (! sh_relax) | |
2643 | return 0; | |
2644 | ||
2645 | return (fix->fx_pcrel | |
2646 | || SWITCH_TABLE (fix) | |
2647 | || fix->fx_r_type == BFD_RELOC_SH_COUNT | |
2648 | || fix->fx_r_type == BFD_RELOC_SH_ALIGN | |
2649 | || fix->fx_r_type == BFD_RELOC_SH_CODE | |
2650 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
2651 | || fix->fx_r_type == BFD_RELOC_SH_LABEL); | |
2652 | } | |
2653 | ||
2654 | #ifdef OBJ_ELF | |
2655 | boolean | |
2656 | sh_fix_adjustable (fixP) | |
2657 | fixS *fixP; | |
2658 | { | |
2659 | ||
2660 | if (fixP->fx_addsy == NULL) | |
2661 | return 1; | |
c4aa876b | 2662 | |
a1cc9221 AO |
2663 | if (fixP->fx_r_type == BFD_RELOC_SH_PCDISP8BY2 |
2664 | || fixP->fx_r_type == BFD_RELOC_SH_PCDISP12BY2 | |
2665 | || fixP->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2 | |
2666 | || fixP->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4 | |
2667 | || fixP->fx_r_type == BFD_RELOC_8_PCREL | |
2668 | || fixP->fx_r_type == BFD_RELOC_SH_SWITCH16 | |
2669 | || fixP->fx_r_type == BFD_RELOC_SH_SWITCH32) | |
2670 | return 1; | |
2671 | ||
2672 | if (! TC_RELOC_RTSYM_LOC_FIXUP (fixP) | |
2673 | || fixP->fx_r_type == BFD_RELOC_32_GOTOFF | |
2674 | || fixP->fx_r_type == BFD_RELOC_RVA) | |
2675 | return 0; | |
2676 | ||
252b5132 RH |
2677 | /* We need the symbol name for the VTABLE entries */ |
2678 | if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT | |
2679 | || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) | |
2680 | return 0; | |
2681 | ||
2682 | return 1; | |
2683 | } | |
d4845d57 | 2684 | |
6b31947e NC |
2685 | void |
2686 | sh_elf_final_processing () | |
d4845d57 JR |
2687 | { |
2688 | int val; | |
2689 | ||
2690 | /* Set file-specific flags to indicate if this code needs | |
2691 | a processor with the sh-dsp / sh3e ISA to execute. */ | |
2692 | if (valid_arch & arch_sh1) | |
2693 | val = EF_SH1; | |
2694 | else if (valid_arch & arch_sh2) | |
2695 | val = EF_SH2; | |
2696 | else if (valid_arch & arch_sh_dsp) | |
2697 | val = EF_SH_DSP; | |
2698 | else if (valid_arch & arch_sh3) | |
2699 | val = EF_SH3; | |
2700 | else if (valid_arch & arch_sh3_dsp) | |
2701 | val = EF_SH_DSP; | |
2702 | else if (valid_arch & arch_sh3e) | |
2703 | val = EF_SH3E; | |
2704 | else if (valid_arch & arch_sh4) | |
2705 | val = EF_SH4; | |
2706 | else | |
2707 | abort (); | |
2708 | ||
2709 | elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; | |
2710 | elf_elfheader (stdoutput)->e_flags |= val; | |
2711 | } | |
252b5132 RH |
2712 | #endif |
2713 | ||
2714 | /* Apply a fixup to the object file. */ | |
2715 | ||
2716 | #ifdef BFD_ASSEMBLER | |
2717 | int | |
2718 | md_apply_fix (fixP, valp) | |
2719 | fixS *fixP; | |
2720 | valueT *valp; | |
2721 | #else | |
2722 | void | |
2723 | md_apply_fix (fixP, val) | |
2724 | fixS *fixP; | |
2725 | long val; | |
2726 | #endif | |
2727 | { | |
2728 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; | |
2729 | int lowbyte = target_big_endian ? 1 : 0; | |
2730 | int highbyte = target_big_endian ? 0 : 1; | |
2731 | #ifdef BFD_ASSEMBLER | |
2732 | long val = *valp; | |
2733 | #endif | |
2734 | long max, min; | |
2735 | int shift; | |
2736 | ||
2737 | #ifdef BFD_ASSEMBLER | |
a1cc9221 AO |
2738 | /* A difference between two symbols, the second of which is in the |
2739 | current section, is transformed in a PC-relative relocation to | |
2740 | the other symbol. We have to adjust the relocation type here. */ | |
2741 | if (fixP->fx_pcrel) | |
2742 | { | |
2743 | switch (fixP->fx_r_type) | |
2744 | { | |
2745 | default: | |
2746 | break; | |
2747 | ||
2748 | case BFD_RELOC_32: | |
2749 | fixP->fx_r_type = BFD_RELOC_32_PCREL; | |
2750 | break; | |
2751 | ||
2752 | /* Currently, we only support 32-bit PCREL relocations. | |
2753 | We'd need a new reloc type to handle 16_PCREL, and | |
2754 | 8_PCREL is already taken for R_SH_SWITCH8, which | |
2755 | apparently does something completely different than what | |
2756 | we need. FIXME. */ | |
2757 | case BFD_RELOC_16: | |
2758 | bfd_set_error (bfd_error_bad_value); | |
2759 | return false; | |
81d4177b | 2760 | |
a1cc9221 AO |
2761 | case BFD_RELOC_8: |
2762 | bfd_set_error (bfd_error_bad_value); | |
2763 | return false; | |
2764 | } | |
2765 | } | |
2766 | ||
6b31947e NC |
2767 | /* The function adjust_reloc_syms won't convert a reloc against a weak |
2768 | symbol into a reloc against a section, but bfd_install_relocation | |
2769 | will screw up if the symbol is defined, so we have to adjust val here | |
1308f14c HPN |
2770 | to avoid the screw up later. |
2771 | ||
2772 | For ordinary relocs, this does not happen for ELF, since for ELF, | |
2773 | bfd_install_relocation uses the "special function" field of the | |
2774 | howto, and does not execute the code that needs to be undone, as long | |
2775 | as the special function does not return bfd_reloc_continue. | |
2776 | It can happen for GOT- and PLT-type relocs the way they are | |
2777 | described in elf32-sh.c as they use bfd_elf_generic_reloc, but it | |
2778 | doesn't matter here since those relocs don't use VAL; see below. */ | |
2779 | if (OUTPUT_FLAVOR != bfd_target_elf_flavour | |
2780 | && fixP->fx_addsy != NULL | |
252b5132 RH |
2781 | && S_IS_WEAK (fixP->fx_addsy)) |
2782 | val -= S_GET_VALUE (fixP->fx_addsy); | |
2783 | #endif | |
2784 | ||
2785 | #ifndef BFD_ASSEMBLER | |
2786 | if (fixP->fx_r_type == 0) | |
2787 | { | |
2788 | if (fixP->fx_size == 2) | |
2789 | fixP->fx_r_type = BFD_RELOC_16; | |
2790 | else if (fixP->fx_size == 4) | |
2791 | fixP->fx_r_type = BFD_RELOC_32; | |
2792 | else if (fixP->fx_size == 1) | |
2793 | fixP->fx_r_type = BFD_RELOC_8; | |
2794 | else | |
2795 | abort (); | |
2796 | } | |
2797 | #endif | |
2798 | ||
2799 | max = min = 0; | |
2800 | shift = 0; | |
2801 | switch (fixP->fx_r_type) | |
2802 | { | |
2803 | case BFD_RELOC_SH_IMM4: | |
2804 | max = 0xf; | |
2805 | *buf = (*buf & 0xf0) | (val & 0xf); | |
2806 | break; | |
2807 | ||
2808 | case BFD_RELOC_SH_IMM4BY2: | |
2809 | max = 0xf; | |
2810 | shift = 1; | |
2811 | *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); | |
2812 | break; | |
2813 | ||
2814 | case BFD_RELOC_SH_IMM4BY4: | |
2815 | max = 0xf; | |
2816 | shift = 2; | |
2817 | *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); | |
2818 | break; | |
2819 | ||
2820 | case BFD_RELOC_SH_IMM8BY2: | |
2821 | max = 0xff; | |
2822 | shift = 1; | |
2823 | *buf = val >> 1; | |
2824 | break; | |
2825 | ||
2826 | case BFD_RELOC_SH_IMM8BY4: | |
2827 | max = 0xff; | |
2828 | shift = 2; | |
2829 | *buf = val >> 2; | |
2830 | break; | |
2831 | ||
2832 | case BFD_RELOC_8: | |
2833 | case BFD_RELOC_SH_IMM8: | |
2834 | /* Sometimes the 8 bit value is sign extended (e.g., add) and | |
2835 | sometimes it is not (e.g., and). We permit any 8 bit value. | |
2836 | Note that adding further restrictions may invalidate | |
2837 | reasonable looking assembly code, such as ``and -0x1,r0''. */ | |
2838 | max = 0xff; | |
c4aa876b | 2839 | min = -0xff; |
252b5132 RH |
2840 | *buf++ = val; |
2841 | break; | |
2842 | ||
2843 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
2844 | /* The lower two bits of the PC are cleared before the | |
2845 | displacement is added in. We can assume that the destination | |
2846 | is on a 4 byte bounday. If this instruction is also on a 4 | |
2847 | byte boundary, then we want | |
2848 | (target - here) / 4 | |
2849 | and target - here is a multiple of 4. | |
2850 | Otherwise, we are on a 2 byte boundary, and we want | |
2851 | (target - (here - 2)) / 4 | |
2852 | and target - here is not a multiple of 4. Computing | |
2853 | (target - (here - 2)) / 4 == (target - here + 2) / 4 | |
2854 | works for both cases, since in the first case the addition of | |
2855 | 2 will be removed by the division. target - here is in the | |
2856 | variable val. */ | |
2857 | val = (val + 2) / 4; | |
2858 | if (val & ~0xff) | |
2859 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2860 | buf[lowbyte] = val; | |
2861 | break; | |
2862 | ||
2863 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
2864 | val /= 2; | |
2865 | if (val & ~0xff) | |
2866 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2867 | buf[lowbyte] = val; | |
2868 | break; | |
2869 | ||
2870 | case BFD_RELOC_SH_PCDISP8BY2: | |
2871 | val /= 2; | |
2872 | if (val < -0x80 || val > 0x7f) | |
2873 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2874 | buf[lowbyte] = val; | |
2875 | break; | |
2876 | ||
2877 | case BFD_RELOC_SH_PCDISP12BY2: | |
2878 | val /= 2; | |
2879 | if (val < -0x800 || val >= 0x7ff) | |
2880 | as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); | |
2881 | buf[lowbyte] = val & 0xff; | |
2882 | buf[highbyte] |= (val >> 8) & 0xf; | |
2883 | break; | |
2884 | ||
2885 | case BFD_RELOC_32: | |
a1cc9221 | 2886 | case BFD_RELOC_32_PCREL: |
1db77c8e | 2887 | md_number_to_chars (buf, val, 4); |
252b5132 RH |
2888 | break; |
2889 | ||
2890 | case BFD_RELOC_16: | |
1db77c8e | 2891 | md_number_to_chars (buf, val, 2); |
252b5132 RH |
2892 | break; |
2893 | ||
2894 | case BFD_RELOC_SH_USES: | |
2895 | /* Pass the value into sh_coff_reloc_mangle. */ | |
2896 | fixP->fx_addnumber = val; | |
2897 | break; | |
2898 | ||
2899 | case BFD_RELOC_SH_COUNT: | |
2900 | case BFD_RELOC_SH_ALIGN: | |
2901 | case BFD_RELOC_SH_CODE: | |
2902 | case BFD_RELOC_SH_DATA: | |
2903 | case BFD_RELOC_SH_LABEL: | |
2904 | /* Nothing to do here. */ | |
2905 | break; | |
2906 | ||
015551fc JR |
2907 | case BFD_RELOC_SH_LOOP_START: |
2908 | case BFD_RELOC_SH_LOOP_END: | |
2909 | ||
252b5132 RH |
2910 | case BFD_RELOC_VTABLE_INHERIT: |
2911 | case BFD_RELOC_VTABLE_ENTRY: | |
2912 | fixP->fx_done = 0; | |
49309057 ILT |
2913 | #ifdef BFD_ASSEMBLER |
2914 | return 0; | |
2915 | #else | |
252b5132 | 2916 | return; |
49309057 | 2917 | #endif |
252b5132 | 2918 | |
a1cc9221 AO |
2919 | #ifdef OBJ_ELF |
2920 | case BFD_RELOC_32_PLT_PCREL: | |
2921 | /* Make the jump instruction point to the address of the operand. At | |
81d4177b | 2922 | runtime we merely add the offset to the actual PLT entry. */ |
a1cc9221 AO |
2923 | *valp = 0xfffffffc; |
2924 | break; | |
2925 | ||
2926 | case BFD_RELOC_SH_GOTPC: | |
2927 | /* This is tough to explain. We end up with this one if we have | |
2928 | operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". | |
2929 | The goal here is to obtain the absolute address of the GOT, | |
2930 | and it is strongly preferable from a performance point of | |
2931 | view to avoid using a runtime relocation for this. There are | |
2932 | cases where you have something like: | |
81d4177b | 2933 | |
a1cc9221 | 2934 | .long _GLOBAL_OFFSET_TABLE_+[.-.L66] |
81d4177b | 2935 | |
a1cc9221 AO |
2936 | and here no correction would be required. Internally in the |
2937 | assembler we treat operands of this form as not being pcrel | |
2938 | since the '.' is explicitly mentioned, and I wonder whether | |
2939 | it would simplify matters to do it this way. Who knows. In | |
2940 | earlier versions of the PIC patches, the pcrel_adjust field | |
2941 | was used to store the correction, but since the expression is | |
2942 | not pcrel, I felt it would be confusing to do it this way. */ | |
2943 | *valp -= 1; | |
2944 | md_number_to_chars (buf, val, 4); | |
2945 | break; | |
2946 | ||
2947 | case BFD_RELOC_32_GOT_PCREL: | |
2948 | *valp = 0; /* Fully resolved at runtime. No addend. */ | |
2949 | md_number_to_chars (buf, 0, 4); | |
2950 | break; | |
2951 | ||
2952 | case BFD_RELOC_32_GOTOFF: | |
2953 | break; | |
2954 | #endif | |
2955 | ||
252b5132 RH |
2956 | default: |
2957 | abort (); | |
2958 | } | |
2959 | ||
2960 | if (shift != 0) | |
2961 | { | |
2962 | if ((val & ((1 << shift) - 1)) != 0) | |
2963 | as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); | |
2964 | if (val >= 0) | |
2965 | val >>= shift; | |
2966 | else | |
2967 | val = ((val >> shift) | |
2968 | | ((long) -1 & ~ ((long) -1 >> shift))); | |
2969 | } | |
2970 | if (max != 0 && (val < min || val > max)) | |
2971 | as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); | |
2972 | ||
2973 | #ifdef BFD_ASSEMBLER | |
2974 | return 0; | |
2975 | #endif | |
2976 | } | |
2977 | ||
2978 | /* Called just before address relaxation. Return the length | |
2979 | by which a fragment must grow to reach it's destination. */ | |
2980 | ||
2981 | int | |
2982 | md_estimate_size_before_relax (fragP, segment_type) | |
2983 | register fragS *fragP; | |
2984 | register segT segment_type; | |
2985 | { | |
2986 | switch (fragP->fr_subtype) | |
2987 | { | |
2988 | case C (UNCOND_JUMP, UNDEF_DISP): | |
6b31947e | 2989 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
2990 | if (!fragP->fr_symbol) |
2991 | { | |
2992 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
2993 | fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length; | |
2994 | } | |
2995 | else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
2996 | { | |
2997 | fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); | |
2998 | fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length; | |
2999 | } | |
3000 | else | |
3001 | { | |
3002 | fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); | |
3003 | fragP->fr_var = md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length; | |
3004 | return md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length; | |
3005 | } | |
3006 | break; | |
3007 | ||
3008 | default: | |
3009 | abort (); | |
3010 | case C (COND_JUMP, UNDEF_DISP): | |
3011 | case C (COND_JUMP_DELAY, UNDEF_DISP): | |
6b31947e | 3012 | /* Used to be a branch to somewhere which was unknown. */ |
252b5132 RH |
3013 | if (fragP->fr_symbol |
3014 | && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) | |
3015 | { | |
3016 | int what = GET_WHAT (fragP->fr_subtype); | |
3017 | /* Got a symbol and it's defined in this segment, become byte | |
6b31947e | 3018 | sized - maybe it will fix up. */ |
252b5132 RH |
3019 | fragP->fr_subtype = C (what, COND8); |
3020 | fragP->fr_var = md_relax_table[C (what, COND8)].rlx_length; | |
3021 | } | |
3022 | else if (fragP->fr_symbol) | |
3023 | { | |
3024 | int what = GET_WHAT (fragP->fr_subtype); | |
6b31947e | 3025 | /* Its got a segment, but its not ours, so it will always be long. */ |
252b5132 RH |
3026 | fragP->fr_subtype = C (what, UNDEF_WORD_DISP); |
3027 | fragP->fr_var = md_relax_table[C (what, COND32)].rlx_length; | |
3028 | return md_relax_table[C (what, COND32)].rlx_length; | |
3029 | } | |
3030 | else | |
3031 | { | |
3032 | int what = GET_WHAT (fragP->fr_subtype); | |
6b31947e | 3033 | /* We know the abs value. */ |
252b5132 RH |
3034 | fragP->fr_subtype = C (what, COND8); |
3035 | fragP->fr_var = md_relax_table[C (what, COND8)].rlx_length; | |
3036 | } | |
3037 | ||
3038 | break; | |
3039 | } | |
3040 | return fragP->fr_var; | |
3041 | } | |
3042 | ||
6b31947e | 3043 | /* Put number into target byte order. */ |
252b5132 RH |
3044 | |
3045 | void | |
3046 | md_number_to_chars (ptr, use, nbytes) | |
3047 | char *ptr; | |
3048 | valueT use; | |
3049 | int nbytes; | |
3050 | { | |
3051 | if (! target_big_endian) | |
3052 | number_to_chars_littleendian (ptr, use, nbytes); | |
3053 | else | |
3054 | number_to_chars_bigendian (ptr, use, nbytes); | |
3055 | } | |
3056 | ||
3057 | long | |
3058 | md_pcrel_from (fixP) | |
3059 | fixS *fixP; | |
3060 | { | |
3061 | return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; | |
3062 | } | |
3063 | ||
3064 | #ifdef OBJ_COFF | |
3065 | ||
3066 | int | |
3067 | tc_coff_sizemachdep (frag) | |
3068 | fragS *frag; | |
3069 | { | |
3070 | return md_relax_table[frag->fr_subtype].rlx_length; | |
3071 | } | |
3072 | ||
3073 | #endif /* OBJ_COFF */ | |
3074 | ||
3075 | /* When we align the .text section, insert the correct NOP pattern. */ | |
3076 | ||
3077 | int | |
3078 | sh_do_align (n, fill, len, max) | |
3079 | int n; | |
3080 | const char *fill; | |
43841e91 | 3081 | int len ATTRIBUTE_UNUSED; |
252b5132 RH |
3082 | int max; |
3083 | { | |
3084 | if (fill == NULL | |
b9e57a38 | 3085 | && subseg_text_p (now_seg) |
252b5132 RH |
3086 | && n > 1) |
3087 | { | |
3088 | static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; | |
3089 | static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; | |
3090 | ||
3091 | /* First align to a 2 byte boundary, in case there is an odd | |
3092 | .byte. */ | |
3093 | frag_align (1, 0, 0); | |
3094 | if (target_big_endian) | |
3095 | frag_align_pattern (n, big_nop_pattern, sizeof big_nop_pattern, max); | |
3096 | else | |
3097 | frag_align_pattern (n, little_nop_pattern, sizeof little_nop_pattern, | |
3098 | max); | |
3099 | return 1; | |
3100 | } | |
3101 | ||
3102 | return 0; | |
3103 | } | |
3104 | ||
3105 | #ifndef BFD_ASSEMBLER | |
3106 | #ifdef OBJ_COFF | |
3107 | ||
3108 | /* Map BFD relocs to SH COFF relocs. */ | |
3109 | ||
3110 | struct reloc_map | |
3111 | { | |
3112 | bfd_reloc_code_real_type bfd_reloc; | |
3113 | int sh_reloc; | |
3114 | }; | |
3115 | ||
3116 | static const struct reloc_map coff_reloc_map[] = | |
3117 | { | |
3118 | { BFD_RELOC_32, R_SH_IMM32 }, | |
3119 | { BFD_RELOC_16, R_SH_IMM16 }, | |
3120 | { BFD_RELOC_8, R_SH_IMM8 }, | |
3121 | { BFD_RELOC_SH_PCDISP8BY2, R_SH_PCDISP8BY2 }, | |
3122 | { BFD_RELOC_SH_PCDISP12BY2, R_SH_PCDISP }, | |
3123 | { BFD_RELOC_SH_IMM4, R_SH_IMM4 }, | |
3124 | { BFD_RELOC_SH_IMM4BY2, R_SH_IMM4BY2 }, | |
3125 | { BFD_RELOC_SH_IMM4BY4, R_SH_IMM4BY4 }, | |
3126 | { BFD_RELOC_SH_IMM8, R_SH_IMM8 }, | |
3127 | { BFD_RELOC_SH_IMM8BY2, R_SH_IMM8BY2 }, | |
3128 | { BFD_RELOC_SH_IMM8BY4, R_SH_IMM8BY4 }, | |
3129 | { BFD_RELOC_SH_PCRELIMM8BY2, R_SH_PCRELIMM8BY2 }, | |
3130 | { BFD_RELOC_SH_PCRELIMM8BY4, R_SH_PCRELIMM8BY4 }, | |
3131 | { BFD_RELOC_8_PCREL, R_SH_SWITCH8 }, | |
3132 | { BFD_RELOC_SH_SWITCH16, R_SH_SWITCH16 }, | |
3133 | { BFD_RELOC_SH_SWITCH32, R_SH_SWITCH32 }, | |
3134 | { BFD_RELOC_SH_USES, R_SH_USES }, | |
3135 | { BFD_RELOC_SH_COUNT, R_SH_COUNT }, | |
3136 | { BFD_RELOC_SH_ALIGN, R_SH_ALIGN }, | |
3137 | { BFD_RELOC_SH_CODE, R_SH_CODE }, | |
3138 | { BFD_RELOC_SH_DATA, R_SH_DATA }, | |
3139 | { BFD_RELOC_SH_LABEL, R_SH_LABEL }, | |
3140 | { BFD_RELOC_UNUSED, 0 } | |
3141 | }; | |
3142 | ||
3143 | /* Adjust a reloc for the SH. This is similar to the generic code, | |
3144 | but does some minor tweaking. */ | |
3145 | ||
3146 | void | |
3147 | sh_coff_reloc_mangle (seg, fix, intr, paddr) | |
3148 | segment_info_type *seg; | |
3149 | fixS *fix; | |
3150 | struct internal_reloc *intr; | |
3151 | unsigned int paddr; | |
3152 | { | |
3153 | symbolS *symbol_ptr = fix->fx_addsy; | |
3154 | symbolS *dot; | |
3155 | ||
3156 | intr->r_vaddr = paddr + fix->fx_frag->fr_address + fix->fx_where; | |
3157 | ||
3158 | if (! SWITCH_TABLE (fix)) | |
3159 | { | |
3160 | const struct reloc_map *rm; | |
3161 | ||
3162 | for (rm = coff_reloc_map; rm->bfd_reloc != BFD_RELOC_UNUSED; rm++) | |
3163 | if (rm->bfd_reloc == (bfd_reloc_code_real_type) fix->fx_r_type) | |
3164 | break; | |
3165 | if (rm->bfd_reloc == BFD_RELOC_UNUSED) | |
3166 | as_bad_where (fix->fx_file, fix->fx_line, | |
3167 | _("Can not represent %s relocation in this object file format"), | |
3168 | bfd_get_reloc_code_name (fix->fx_r_type)); | |
3169 | intr->r_type = rm->sh_reloc; | |
3170 | intr->r_offset = 0; | |
3171 | } | |
3172 | else | |
3173 | { | |
3174 | know (sh_relax); | |
3175 | ||
3176 | if (fix->fx_r_type == BFD_RELOC_16) | |
3177 | intr->r_type = R_SH_SWITCH16; | |
3178 | else if (fix->fx_r_type == BFD_RELOC_8) | |
3179 | intr->r_type = R_SH_SWITCH8; | |
3180 | else if (fix->fx_r_type == BFD_RELOC_32) | |
3181 | intr->r_type = R_SH_SWITCH32; | |
3182 | else | |
3183 | abort (); | |
3184 | ||
3185 | /* For a switch reloc, we set r_offset to the difference between | |
3186 | the reloc address and the subtrahend. When the linker is | |
3187 | doing relaxing, it can use the determine the starting and | |
3188 | ending points of the switch difference expression. */ | |
3189 | intr->r_offset = intr->r_vaddr - S_GET_VALUE (fix->fx_subsy); | |
3190 | } | |
3191 | ||
3192 | /* PC relative relocs are always against the current section. */ | |
3193 | if (symbol_ptr == NULL) | |
3194 | { | |
3195 | switch (fix->fx_r_type) | |
3196 | { | |
3197 | case BFD_RELOC_SH_PCRELIMM8BY2: | |
3198 | case BFD_RELOC_SH_PCRELIMM8BY4: | |
3199 | case BFD_RELOC_SH_PCDISP8BY2: | |
3200 | case BFD_RELOC_SH_PCDISP12BY2: | |
3201 | case BFD_RELOC_SH_USES: | |
3202 | symbol_ptr = seg->dot; | |
3203 | break; | |
3204 | default: | |
3205 | break; | |
3206 | } | |
3207 | } | |
3208 | ||
3209 | if (fix->fx_r_type == BFD_RELOC_SH_USES) | |
3210 | { | |
3211 | /* We can't store the offset in the object file, since this | |
3212 | reloc does not take up any space, so we store it in r_offset. | |
3213 | The fx_addnumber field was set in md_apply_fix. */ | |
3214 | intr->r_offset = fix->fx_addnumber; | |
3215 | } | |
3216 | else if (fix->fx_r_type == BFD_RELOC_SH_COUNT) | |
3217 | { | |
3218 | /* We can't store the count in the object file, since this reloc | |
3219 | does not take up any space, so we store it in r_offset. The | |
3220 | fx_offset field was set when the fixup was created in | |
3221 | sh_coff_frob_file. */ | |
3222 | intr->r_offset = fix->fx_offset; | |
3223 | /* This reloc is always absolute. */ | |
3224 | symbol_ptr = NULL; | |
3225 | } | |
3226 | else if (fix->fx_r_type == BFD_RELOC_SH_ALIGN) | |
3227 | { | |
3228 | /* Store the alignment in the r_offset field. */ | |
3229 | intr->r_offset = fix->fx_offset; | |
3230 | /* This reloc is always absolute. */ | |
3231 | symbol_ptr = NULL; | |
3232 | } | |
3233 | else if (fix->fx_r_type == BFD_RELOC_SH_CODE | |
3234 | || fix->fx_r_type == BFD_RELOC_SH_DATA | |
3235 | || fix->fx_r_type == BFD_RELOC_SH_LABEL) | |
3236 | { | |
3237 | /* These relocs are always absolute. */ | |
3238 | symbol_ptr = NULL; | |
3239 | } | |
3240 | ||
3241 | /* Turn the segment of the symbol into an offset. */ | |
3242 | if (symbol_ptr != NULL) | |
3243 | { | |
3244 | dot = segment_info[S_GET_SEGMENT (symbol_ptr)].dot; | |
3245 | if (dot != NULL) | |
3246 | intr->r_symndx = dot->sy_number; | |
3247 | else | |
3248 | intr->r_symndx = symbol_ptr->sy_number; | |
3249 | } | |
3250 | else | |
3251 | intr->r_symndx = -1; | |
3252 | } | |
3253 | ||
3254 | #endif /* OBJ_COFF */ | |
3255 | #endif /* ! BFD_ASSEMBLER */ | |
3256 | ||
3257 | #ifdef BFD_ASSEMBLER | |
3258 | ||
3259 | /* Create a reloc. */ | |
3260 | ||
3261 | arelent * | |
3262 | tc_gen_reloc (section, fixp) | |
43841e91 | 3263 | asection *section ATTRIBUTE_UNUSED; |
252b5132 RH |
3264 | fixS *fixp; |
3265 | { | |
3266 | arelent *rel; | |
3267 | bfd_reloc_code_real_type r_type; | |
3268 | ||
3269 | rel = (arelent *) xmalloc (sizeof (arelent)); | |
49309057 ILT |
3270 | rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); |
3271 | *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); | |
252b5132 RH |
3272 | rel->address = fixp->fx_frag->fr_address + fixp->fx_where; |
3273 | ||
3274 | r_type = fixp->fx_r_type; | |
3275 | ||
3276 | if (SWITCH_TABLE (fixp)) | |
3277 | { | |
3278 | rel->addend = rel->address - S_GET_VALUE (fixp->fx_subsy); | |
3279 | if (r_type == BFD_RELOC_16) | |
3280 | r_type = BFD_RELOC_SH_SWITCH16; | |
3281 | else if (r_type == BFD_RELOC_8) | |
3282 | r_type = BFD_RELOC_8_PCREL; | |
3283 | else if (r_type == BFD_RELOC_32) | |
3284 | r_type = BFD_RELOC_SH_SWITCH32; | |
3285 | else | |
3286 | abort (); | |
3287 | } | |
3288 | else if (r_type == BFD_RELOC_SH_USES) | |
3289 | rel->addend = fixp->fx_addnumber; | |
3290 | else if (r_type == BFD_RELOC_SH_COUNT) | |
3291 | rel->addend = fixp->fx_offset; | |
3292 | else if (r_type == BFD_RELOC_SH_ALIGN) | |
3293 | rel->addend = fixp->fx_offset; | |
3294 | else if (r_type == BFD_RELOC_VTABLE_INHERIT | |
3295 | || r_type == BFD_RELOC_VTABLE_ENTRY) | |
3296 | rel->addend = fixp->fx_offset; | |
015551fc JR |
3297 | else if (r_type == BFD_RELOC_SH_LOOP_START |
3298 | || r_type == BFD_RELOC_SH_LOOP_END) | |
3299 | rel->addend = fixp->fx_offset; | |
3300 | else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel) | |
3301 | { | |
3302 | rel->addend = 0; | |
3303 | rel->address = rel->addend = fixp->fx_offset; | |
3304 | } | |
252b5132 RH |
3305 | else if (fixp->fx_pcrel) |
3306 | rel->addend = fixp->fx_addnumber; | |
a1cc9221 AO |
3307 | else if (r_type == BFD_RELOC_32 || r_type == BFD_RELOC_32_GOTOFF) |
3308 | rel->addend = fixp->fx_addnumber; | |
252b5132 RH |
3309 | else |
3310 | rel->addend = 0; | |
3311 | ||
3312 | rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); | |
3313 | if (rel->howto == NULL) | |
3314 | { | |
3315 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
3316 | _("Cannot represent relocation type %s"), | |
3317 | bfd_get_reloc_code_name (r_type)); | |
3318 | /* Set howto to a garbage value so that we can keep going. */ | |
3319 | rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); | |
3320 | assert (rel->howto != NULL); | |
3321 | } | |
3322 | ||
3323 | return rel; | |
3324 | } | |
3325 | ||
3326 | #endif /* BFD_ASSEMBLER */ | |
0d10e182 JL |
3327 | |
3328 | void | |
3329 | sh_finalize () | |
3330 | { | |
3331 | if (debug_type == DEBUG_DWARF2) | |
3332 | dwarf2_finish (); | |
3333 | } |