Commit | Line | Data |
---|---|---|
fecd2382 | 1 | /* tc-sparc.c -- Assemble for the SPARC |
6df07e7f | 2 | Copyright (C) 1989, 90-95, 1996 Free Software Foundation, Inc. |
355afbcd | 3 | |
fecd2382 | 4 | This file is part of GAS, the GNU Assembler. |
355afbcd | 5 | |
fecd2382 RP |
6 | GAS is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
6321e9ea | 8 | the Free Software Foundation; either version 2, or (at your option) |
fecd2382 | 9 | any later version. |
355afbcd | 10 | |
fecd2382 RP |
11 | GAS is distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
355afbcd | 15 | |
8dd07a84 ILT |
16 | You should have received a copy of the GNU General Public |
17 | License along with GAS; see the file COPYING. If not, write | |
18 | to the Free Software Foundation, 59 Temple Place - Suite 330, | |
19 | Boston, MA 02111-1307, USA. */ | |
fecd2382 | 20 | |
fecd2382 RP |
21 | #include <stdio.h> |
22 | #include <ctype.h> | |
23 | ||
24 | #include "as.h" | |
7ab2e983 | 25 | #include "subsegs.h" |
fecd2382 RP |
26 | |
27 | /* careful, this file includes data *declarations* */ | |
584a0f78 | 28 | #include "opcode/sparc.h" |
fecd2382 | 29 | |
ed94c2b8 | 30 | static void sparc_ip PARAMS ((char *, const struct sparc_opcode **)); |
fecd2382 | 31 | |
e70ad5d5 DE |
32 | /* Current architecture. We don't bump up unless necessary. */ |
33 | static enum sparc_opcode_arch_val current_architecture = SPARC_OPCODE_ARCH_V6; | |
34 | ||
35 | /* The maximum architecture level we can bump up to. | |
36 | In a 32 bit environment, don't allow bumping up to v9 by default. | |
37 | The native assembler works this way. The user is required to pass | |
38 | an explicit argument before we'll create v9 object files. However, if | |
39 | we don't see any v9 insns, a v9 object file is not created. */ | |
6df07e7f | 40 | #ifdef SPARC_ARCH64 |
e70ad5d5 | 41 | static enum sparc_opcode_arch_val max_architecture = SPARC_OPCODE_ARCH_V9; |
5e0a90a8 | 42 | #else |
d8b42b96 DE |
43 | /* ??? This should be V8, but sparclite support was added by making it the |
44 | default. GCC now passes -Asparclite, so maybe sometime in the future | |
45 | we can set this to V8. */ | |
46 | static enum sparc_opcode_arch_val max_architecture = SPARC_OPCODE_ARCH_SPARCLITE; | |
6df07e7f DE |
47 | #endif |
48 | ||
428d312b KR |
49 | static int architecture_requested; |
50 | static int warn_on_bump; | |
839df5c3 | 51 | |
e70ad5d5 DE |
52 | /* If warn_on_bump and the needed architecture is higher than this |
53 | architecture, issue a warning. */ | |
54 | static enum sparc_opcode_arch_val warn_after_architecture; | |
55 | ||
4c67b523 ILT |
56 | /* Non-zero if we are generating PIC code. */ |
57 | int sparc_pic_code; | |
58 | ||
ed9638af KR |
59 | extern int target_big_endian; |
60 | ||
fecd2382 | 61 | /* handle of the OPCODE hash table */ |
5e0a90a8 | 62 | static struct hash_control *op_hash; |
fecd2382 | 63 | |
7766838e ILT |
64 | static void s_data1 PARAMS ((void)); |
65 | static void s_seg PARAMS ((int)); | |
66 | static void s_proc PARAMS ((int)); | |
67 | static void s_reserve PARAMS ((int)); | |
68 | static void s_common PARAMS ((int)); | |
8dd07a84 ILT |
69 | static void s_empty PARAMS ((int)); |
70 | static void s_uacons PARAMS ((int)); | |
428d312b | 71 | |
355afbcd KR |
72 | const pseudo_typeS md_pseudo_table[] = |
73 | { | |
74 | {"align", s_align_bytes, 0}, /* Defaulting is invalid (0) */ | |
75 | {"common", s_common, 0}, | |
8dd07a84 | 76 | {"empty", s_empty, 0}, |
355afbcd KR |
77 | {"global", s_globl, 0}, |
78 | {"half", cons, 2}, | |
79 | {"optim", s_ignore, 0}, | |
80 | {"proc", s_proc, 0}, | |
81 | {"reserve", s_reserve, 0}, | |
82 | {"seg", s_seg, 0}, | |
83 | {"skip", s_space, 0}, | |
84 | {"word", cons, 4}, | |
7766838e | 85 | {"xword", cons, 8}, |
693b21e7 | 86 | #ifdef OBJ_ELF |
693b21e7 KR |
87 | /* these are specific to sparc/svr4 */ |
88 | {"pushsection", obj_elf_section, 0}, | |
89 | {"popsection", obj_elf_previous, 0}, | |
8dd07a84 ILT |
90 | {"uahalf", s_uacons, 2}, |
91 | {"uaword", s_uacons, 4}, | |
92 | {"uaxword", s_uacons, 8}, | |
693b21e7 | 93 | #endif |
355afbcd | 94 | {NULL, 0, 0}, |
fecd2382 RP |
95 | }; |
96 | ||
355afbcd | 97 | const int md_reloc_size = 12; /* Size of relocation record */ |
fecd2382 RP |
98 | |
99 | /* This array holds the chars that always start a comment. If the | |
100 | pre-processor is disabled, these aren't very useful */ | |
839df5c3 | 101 | const char comment_chars[] = "!"; /* JF removed '|' from comment_chars */ |
fecd2382 RP |
102 | |
103 | /* This array holds the chars that only start a comment at the beginning of | |
104 | a line. If the line seems to have the form '# 123 filename' | |
105 | .line and .file directives will appear in the pre-processed output */ | |
106 | /* Note that input_file.c hand checks for '#' at the beginning of the | |
107 | first line of the input file. This is because the compiler outputs | |
108 | #NO_APP at the beginning of its output. */ | |
839df5c3 RP |
109 | /* Also note that comments started like this one will always |
110 | work if '/' isn't otherwise defined. */ | |
111 | const char line_comment_chars[] = "#"; | |
fecd2382 | 112 | |
355afbcd KR |
113 | const char line_separator_chars[] = ""; |
114 | ||
fecd2382 | 115 | /* Chars that can be used to separate mant from exp in floating point nums */ |
839df5c3 | 116 | const char EXP_CHARS[] = "eE"; |
fecd2382 RP |
117 | |
118 | /* Chars that mean this number is a floating point constant */ | |
119 | /* As in 0f12.456 */ | |
120 | /* or 0d1.2345e12 */ | |
839df5c3 | 121 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; |
fecd2382 RP |
122 | |
123 | /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be | |
9b6a882e KR |
124 | changed in read.c. Ideally it shouldn't have to know about it at all, |
125 | but nothing is ideal around here. */ | |
fecd2382 RP |
126 | |
127 | static unsigned char octal[256]; | |
58d4951d | 128 | #define isoctal(c) octal[(unsigned char) (c)] |
355afbcd KR |
129 | static unsigned char toHex[256]; |
130 | ||
131 | struct sparc_it | |
132 | { | |
133 | char *error; | |
134 | unsigned long opcode; | |
135 | struct nlist *nlistp; | |
136 | expressionS exp; | |
137 | int pcrel; | |
428d312b | 138 | bfd_reloc_code_real_type reloc; |
428d312b KR |
139 | }; |
140 | ||
141 | struct sparc_it the_insn, set_insn; | |
142 | ||
8dd07a84 ILT |
143 | /* Return non-zero if VAL is in the range -(MAX+1) to MAX. */ |
144 | ||
7ab2e983 ILT |
145 | static INLINE int |
146 | in_signed_range (val, max) | |
147 | bfd_signed_vma val, max; | |
148 | { | |
149 | if (max <= 0) | |
150 | abort (); | |
151 | if (val > max) | |
152 | return 0; | |
153 | if (val < ~max) | |
154 | return 0; | |
155 | return 1; | |
156 | } | |
157 | ||
8dd07a84 ILT |
158 | /* Return non-zero if VAL is in the range -(MAX/2+1) to MAX. |
159 | (e.g. -15 to +31). */ | |
160 | ||
161 | static INLINE int | |
162 | in_bitfield_range (val, max) | |
163 | bfd_signed_vma val, max; | |
164 | { | |
165 | if (max <= 0) | |
166 | abort (); | |
167 | if (val > max) | |
168 | return 0; | |
169 | if (val < ~(max >> 1)) | |
170 | return 0; | |
171 | return 1; | |
172 | } | |
173 | ||
d8b42b96 DE |
174 | static int |
175 | sparc_ffs (mask) | |
176 | unsigned int mask; | |
177 | { | |
178 | int i; | |
179 | ||
180 | if (mask == 0) | |
181 | return -1; | |
182 | ||
183 | for (i = 0; (mask & 1) == 0; ++i) | |
184 | mask >>= 1; | |
185 | return i; | |
186 | } | |
187 | ||
fecd2382 | 188 | #if 0 |
428d312b | 189 | static void print_insn PARAMS ((struct sparc_it *insn)); |
fecd2382 | 190 | #endif |
428d312b | 191 | static int getExpression PARAMS ((char *str)); |
a87b3269 | 192 | |
fecd2382 RP |
193 | static char *expr_end; |
194 | static int special_case; | |
195 | ||
196 | /* | |
197 | * Instructions that require wierd handling because they're longer than | |
198 | * 4 bytes. | |
199 | */ | |
200 | #define SPECIAL_CASE_SET 1 | |
201 | #define SPECIAL_CASE_FDIV 2 | |
202 | ||
ed94c2b8 ILT |
203 | /* The last instruction to be assembled. */ |
204 | static const struct sparc_opcode *last_insn; | |
205 | ||
fecd2382 RP |
206 | /* |
207 | * sort of like s_lcomm | |
208 | * | |
209 | */ | |
58d4951d | 210 | #ifndef OBJ_ELF |
584a0f78 | 211 | static int max_alignment = 15; |
58d4951d | 212 | #endif |
584a0f78 | 213 | |
355afbcd | 214 | static void |
7766838e ILT |
215 | s_reserve (ignore) |
216 | int ignore; | |
355afbcd KR |
217 | { |
218 | char *name; | |
219 | char *p; | |
220 | char c; | |
221 | int align; | |
222 | int size; | |
223 | int temp; | |
224 | symbolS *symbolP; | |
225 | ||
226 | name = input_line_pointer; | |
227 | c = get_symbol_end (); | |
228 | p = input_line_pointer; | |
229 | *p = c; | |
230 | SKIP_WHITESPACE (); | |
231 | ||
232 | if (*input_line_pointer != ',') | |
233 | { | |
234 | as_bad ("Expected comma after name"); | |
235 | ignore_rest_of_line (); | |
236 | return; | |
237 | } | |
238 | ||
239 | ++input_line_pointer; | |
240 | ||
241 | if ((size = get_absolute_expression ()) < 0) | |
242 | { | |
243 | as_bad ("BSS length (%d.) <0! Ignored.", size); | |
244 | ignore_rest_of_line (); | |
245 | return; | |
246 | } /* bad length */ | |
247 | ||
248 | *p = 0; | |
249 | symbolP = symbol_find_or_make (name); | |
250 | *p = c; | |
251 | ||
125f0b0d KR |
252 | if (strncmp (input_line_pointer, ",\"bss\"", 6) != 0 |
253 | && strncmp (input_line_pointer, ",\".bss\"", 7) != 0) | |
355afbcd | 254 | { |
5e0a90a8 | 255 | as_bad ("bad .reserve segment -- expected BSS segment"); |
355afbcd | 256 | return; |
9b6a882e | 257 | } |
355afbcd | 258 | |
125f0b0d KR |
259 | if (input_line_pointer[2] == '.') |
260 | input_line_pointer += 7; | |
261 | else | |
262 | input_line_pointer += 6; | |
355afbcd KR |
263 | SKIP_WHITESPACE (); |
264 | ||
265 | if (*input_line_pointer == ',') | |
266 | { | |
267 | ++input_line_pointer; | |
268 | ||
269 | SKIP_WHITESPACE (); | |
270 | if (*input_line_pointer == '\n') | |
271 | { | |
272 | as_bad ("Missing alignment"); | |
273 | return; | |
274 | } | |
275 | ||
276 | align = get_absolute_expression (); | |
58d4951d | 277 | #ifndef OBJ_ELF |
355afbcd KR |
278 | if (align > max_alignment) |
279 | { | |
280 | align = max_alignment; | |
281 | as_warn ("Alignment too large: %d. assumed.", align); | |
282 | } | |
58d4951d ILT |
283 | #endif |
284 | if (align < 0) | |
355afbcd KR |
285 | { |
286 | align = 0; | |
287 | as_warn ("Alignment negative. 0 assumed."); | |
fecd2382 | 288 | } |
428d312b KR |
289 | |
290 | record_alignment (bss_section, align); | |
355afbcd KR |
291 | |
292 | /* convert to a power of 2 alignment */ | |
293 | for (temp = 0; (align & 1) == 0; align >>= 1, ++temp);; | |
294 | ||
295 | if (align != 1) | |
296 | { | |
297 | as_bad ("Alignment not a power of 2"); | |
298 | ignore_rest_of_line (); | |
299 | return; | |
300 | } /* not a power of two */ | |
301 | ||
302 | align = temp; | |
355afbcd | 303 | } /* if has optional alignment */ |
428d312b KR |
304 | else |
305 | align = 0; | |
355afbcd | 306 | |
a0eb1c2c | 307 | if (!S_IS_DEFINED (symbolP) |
125f0b0d KR |
308 | #ifdef OBJ_AOUT |
309 | && S_GET_OTHER (symbolP) == 0 | |
355afbcd | 310 | && S_GET_DESC (symbolP) == 0 |
125f0b0d KR |
311 | #endif |
312 | ) | |
355afbcd | 313 | { |
428d312b KR |
314 | if (! need_pass_2) |
315 | { | |
7766838e | 316 | char *pfrag; |
428d312b KR |
317 | segT current_seg = now_seg; |
318 | subsegT current_subseg = now_subseg; | |
319 | ||
320 | subseg_set (bss_section, 1); /* switch to bss */ | |
321 | ||
322 | if (align) | |
323 | frag_align (align, 0); /* do alignment */ | |
324 | ||
325 | /* detach from old frag */ | |
326 | if (S_GET_SEGMENT(symbolP) == bss_section) | |
327 | symbolP->sy_frag->fr_symbol = NULL; | |
328 | ||
329 | symbolP->sy_frag = frag_now; | |
7766838e ILT |
330 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, symbolP, |
331 | size, (char *)0); | |
332 | *pfrag = 0; | |
428d312b KR |
333 | |
334 | S_SET_SEGMENT (symbolP, bss_section); | |
335 | ||
336 | subseg_set (current_seg, current_subseg); | |
337 | } | |
355afbcd KR |
338 | } |
339 | else | |
340 | { | |
a0eb1c2c ILT |
341 | as_warn("Ignoring attempt to re-define symbol %s", |
342 | S_GET_NAME (symbolP)); | |
355afbcd KR |
343 | } /* if not redefining */ |
344 | ||
345 | demand_empty_rest_of_line (); | |
428d312b | 346 | } |
355afbcd KR |
347 | |
348 | static void | |
7766838e ILT |
349 | s_common (ignore) |
350 | int ignore; | |
355afbcd | 351 | { |
ed9638af KR |
352 | char *name; |
353 | char c; | |
354 | char *p; | |
355 | int temp, size; | |
356 | symbolS *symbolP; | |
355afbcd KR |
357 | |
358 | name = input_line_pointer; | |
359 | c = get_symbol_end (); | |
360 | /* just after name is now '\0' */ | |
361 | p = input_line_pointer; | |
362 | *p = c; | |
363 | SKIP_WHITESPACE (); | |
364 | if (*input_line_pointer != ',') | |
365 | { | |
366 | as_bad ("Expected comma after symbol-name"); | |
367 | ignore_rest_of_line (); | |
368 | return; | |
369 | } | |
370 | input_line_pointer++; /* skip ',' */ | |
371 | if ((temp = get_absolute_expression ()) < 0) | |
372 | { | |
373 | as_bad (".COMMon length (%d.) <0! Ignored.", temp); | |
374 | ignore_rest_of_line (); | |
375 | return; | |
376 | } | |
ed9638af | 377 | size = temp; |
355afbcd KR |
378 | *p = 0; |
379 | symbolP = symbol_find_or_make (name); | |
380 | *p = c; | |
381 | if (S_IS_DEFINED (symbolP)) | |
382 | { | |
383 | as_bad ("Ignoring attempt to re-define symbol"); | |
384 | ignore_rest_of_line (); | |
385 | return; | |
386 | } | |
387 | if (S_GET_VALUE (symbolP) != 0) | |
388 | { | |
ed9638af | 389 | if (S_GET_VALUE (symbolP) != size) |
355afbcd | 390 | { |
125f0b0d KR |
391 | as_warn ("Length of .comm \"%s\" is already %ld. Not changed to %d.", |
392 | S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size); | |
680227f3 | 393 | } |
355afbcd KR |
394 | } |
395 | else | |
396 | { | |
ed9638af | 397 | #ifndef OBJ_ELF |
7766838e | 398 | S_SET_VALUE (symbolP, (valueT) size); |
355afbcd | 399 | S_SET_EXTERNAL (symbolP); |
428d312b | 400 | #endif |
355afbcd KR |
401 | } |
402 | know (symbolP->sy_frag == &zero_address_frag); | |
428d312b KR |
403 | if (*input_line_pointer != ',') |
404 | { | |
125f0b0d | 405 | as_bad ("Expected comma after common length"); |
428d312b KR |
406 | ignore_rest_of_line (); |
407 | return; | |
408 | } | |
409 | input_line_pointer++; | |
125f0b0d KR |
410 | SKIP_WHITESPACE (); |
411 | if (*input_line_pointer != '"') | |
ed9638af | 412 | { |
125f0b0d | 413 | temp = get_absolute_expression (); |
58d4951d | 414 | #ifndef OBJ_ELF |
125f0b0d KR |
415 | if (temp > max_alignment) |
416 | { | |
417 | temp = max_alignment; | |
418 | as_warn ("Common alignment too large: %d. assumed", temp); | |
419 | } | |
58d4951d ILT |
420 | #endif |
421 | if (temp < 0) | |
125f0b0d KR |
422 | { |
423 | temp = 0; | |
424 | as_warn ("Common alignment negative; 0 assumed"); | |
425 | } | |
b2565433 | 426 | #ifdef OBJ_ELF |
125f0b0d KR |
427 | if (symbolP->local) |
428 | { | |
ff4cac38 KR |
429 | segT old_sec; |
430 | int old_subsec; | |
125f0b0d | 431 | char *p; |
ff4cac38 | 432 | int align; |
ed9638af | 433 | |
ff4cac38 KR |
434 | old_sec = now_seg; |
435 | old_subsec = now_subseg; | |
436 | align = temp; | |
125f0b0d KR |
437 | record_alignment (bss_section, align); |
438 | subseg_set (bss_section, 0); | |
439 | if (align) | |
440 | frag_align (align, 0); | |
441 | if (S_GET_SEGMENT (symbolP) == bss_section) | |
442 | symbolP->sy_frag->fr_symbol = 0; | |
443 | symbolP->sy_frag = frag_now; | |
444 | p = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size, | |
445 | (char *) 0); | |
446 | *p = 0; | |
447 | S_SET_SEGMENT (symbolP, bss_section); | |
448 | S_CLEAR_EXTERNAL (symbolP); | |
449 | subseg_set (old_sec, old_subsec); | |
450 | } | |
451 | else | |
b2565433 | 452 | #endif |
125f0b0d | 453 | { |
ff4cac38 | 454 | allocate_common: |
7766838e | 455 | S_SET_VALUE (symbolP, (valueT) size); |
5e0a90a8 KR |
456 | #ifdef OBJ_ELF |
457 | S_SET_ALIGN (symbolP, temp); | |
458 | #endif | |
125f0b0d KR |
459 | S_SET_EXTERNAL (symbolP); |
460 | /* should be common, but this is how gas does it for now */ | |
5e0a90a8 | 461 | S_SET_SEGMENT (symbolP, bfd_und_section_ptr); |
125f0b0d | 462 | } |
ed9638af KR |
463 | } |
464 | else | |
465 | { | |
125f0b0d | 466 | input_line_pointer++; |
ff4cac38 KR |
467 | /* @@ Some use the dot, some don't. Can we get some consistency?? */ |
468 | if (*input_line_pointer == '.') | |
469 | input_line_pointer++; | |
470 | /* @@ Some say data, some say bss. */ | |
125f0b0d | 471 | if (strncmp (input_line_pointer, "bss\"", 4) |
ff4cac38 | 472 | && strncmp (input_line_pointer, "data\"", 5)) |
125f0b0d | 473 | { |
ff4cac38 KR |
474 | while (*--input_line_pointer != '"') |
475 | ; | |
476 | input_line_pointer--; | |
125f0b0d KR |
477 | goto bad_common_segment; |
478 | } | |
479 | while (*input_line_pointer++ != '"') | |
480 | ; | |
ff4cac38 | 481 | goto allocate_common; |
355afbcd | 482 | } |
355afbcd KR |
483 | demand_empty_rest_of_line (); |
484 | return; | |
ff4cac38 KR |
485 | |
486 | { | |
487 | bad_common_segment: | |
488 | p = input_line_pointer; | |
489 | while (*p && *p != '\n') | |
490 | p++; | |
491 | c = *p; | |
492 | *p = '\0'; | |
493 | as_bad ("bad .common segment %s", input_line_pointer + 1); | |
494 | *p = c; | |
495 | input_line_pointer = p; | |
496 | ignore_rest_of_line (); | |
497 | return; | |
498 | } | |
499 | } | |
355afbcd | 500 | |
8dd07a84 ILT |
501 | /* Handle the .empty pseudo-op. This supresses the warnings about |
502 | invalid delay slot usage. */ | |
503 | ||
504 | static void | |
505 | s_empty (ignore) | |
506 | int ignore; | |
507 | { | |
508 | /* The easy way to implement is to just forget about the last | |
509 | instruction. */ | |
510 | last_insn = NULL; | |
511 | } | |
512 | ||
355afbcd | 513 | static void |
7766838e ILT |
514 | s_seg (ignore) |
515 | int ignore; | |
355afbcd KR |
516 | { |
517 | ||
518 | if (strncmp (input_line_pointer, "\"text\"", 6) == 0) | |
519 | { | |
520 | input_line_pointer += 6; | |
7766838e | 521 | s_text (0); |
355afbcd KR |
522 | return; |
523 | } | |
524 | if (strncmp (input_line_pointer, "\"data\"", 6) == 0) | |
525 | { | |
526 | input_line_pointer += 6; | |
7766838e | 527 | s_data (0); |
355afbcd KR |
528 | return; |
529 | } | |
530 | if (strncmp (input_line_pointer, "\"data1\"", 7) == 0) | |
531 | { | |
532 | input_line_pointer += 7; | |
533 | s_data1 (); | |
534 | return; | |
535 | } | |
536 | if (strncmp (input_line_pointer, "\"bss\"", 5) == 0) | |
537 | { | |
538 | input_line_pointer += 5; | |
539 | /* We only support 2 segments -- text and data -- for now, so | |
428d312b KR |
540 | things in the "bss segment" will have to go into data for now. |
541 | You can still allocate SEG_BSS stuff with .lcomm or .reserve. */ | |
542 | subseg_set (data_section, 255); /* FIXME-SOMEDAY */ | |
355afbcd KR |
543 | return; |
544 | } | |
545 | as_bad ("Unknown segment type"); | |
546 | demand_empty_rest_of_line (); | |
c999fd9f | 547 | } |
355afbcd KR |
548 | |
549 | static void | |
550 | s_data1 () | |
551 | { | |
428d312b | 552 | subseg_set (data_section, 1); |
355afbcd | 553 | demand_empty_rest_of_line (); |
c999fd9f | 554 | } |
fecd2382 | 555 | |
355afbcd | 556 | static void |
7766838e ILT |
557 | s_proc (ignore) |
558 | int ignore; | |
355afbcd | 559 | { |
58d4951d | 560 | while (!is_end_of_line[(unsigned char) *input_line_pointer]) |
355afbcd KR |
561 | { |
562 | ++input_line_pointer; | |
563 | } | |
564 | ++input_line_pointer; | |
c999fd9f | 565 | } |
fecd2382 | 566 | |
8dd07a84 ILT |
567 | /* This static variable is set by s_uacons to tell sparc_cons_align |
568 | that the expession does not need to be aligned. */ | |
569 | ||
570 | static int sparc_no_align_cons = 0; | |
571 | ||
572 | /* This handles the unaligned space allocation pseudo-ops, such as | |
573 | .uaword. .uaword is just like .word, but the value does not need | |
574 | to be aligned. */ | |
575 | ||
576 | static void | |
577 | s_uacons (bytes) | |
578 | int bytes; | |
579 | { | |
580 | /* Tell sparc_cons_align not to align this value. */ | |
581 | sparc_no_align_cons = 1; | |
582 | cons (bytes); | |
583 | } | |
584 | ||
585 | /* We require .word, et. al., to be aligned correctly. We do it by | |
586 | setting up an rs_align_code frag, and checking in HANDLE_ALIGN to | |
587 | make sure that no unexpected alignment was introduced. */ | |
588 | ||
589 | void | |
590 | sparc_cons_align (nbytes) | |
591 | int nbytes; | |
592 | { | |
593 | int nalign; | |
594 | char *p; | |
595 | ||
596 | if (sparc_no_align_cons) | |
597 | { | |
598 | /* This is an unaligned pseudo-op. */ | |
599 | sparc_no_align_cons = 0; | |
600 | return; | |
601 | } | |
602 | ||
603 | nalign = 0; | |
604 | while ((nbytes & 1) == 0) | |
605 | { | |
606 | ++nalign; | |
607 | nbytes >>= 1; | |
608 | } | |
609 | ||
610 | if (nalign == 0) | |
611 | return; | |
612 | ||
613 | if (now_seg == absolute_section) | |
614 | { | |
615 | if ((abs_section_offset & ((1 << nalign) - 1)) != 0) | |
616 | as_bad ("misaligned data"); | |
617 | return; | |
618 | } | |
619 | ||
620 | p = frag_var (rs_align_code, 1, 1, (relax_substateT) 0, | |
621 | (symbolS *) NULL, (long) nalign, (char *) NULL); | |
622 | ||
623 | record_alignment (now_seg, nalign); | |
624 | } | |
625 | ||
626 | /* This is where we do the unexpected alignment check. */ | |
627 | ||
628 | void | |
629 | sparc_handle_align (fragp) | |
630 | fragS *fragp; | |
631 | { | |
632 | if (fragp->fr_type == rs_align_code | |
633 | && fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix != 0) | |
634 | as_bad_where (fragp->fr_file, fragp->fr_line, "misaligned data"); | |
635 | } | |
636 | ||
6df07e7f | 637 | /* sparc64 priviledged registers */ |
428d312b | 638 | |
355afbcd KR |
639 | struct priv_reg_entry |
640 | { | |
641 | char *name; | |
642 | int regnum; | |
643 | }; | |
428d312b | 644 | |
680227f3 KR |
645 | struct priv_reg_entry priv_reg_table[] = |
646 | { | |
355afbcd KR |
647 | {"tpc", 0}, |
648 | {"tnpc", 1}, | |
649 | {"tstate", 2}, | |
650 | {"tt", 3}, | |
651 | {"tick", 4}, | |
652 | {"tba", 5}, | |
653 | {"pstate", 6}, | |
654 | {"tl", 7}, | |
655 | {"pil", 8}, | |
656 | {"cwp", 9}, | |
657 | {"cansave", 10}, | |
658 | {"canrestore", 11}, | |
659 | {"cleanwin", 12}, | |
660 | {"otherwin", 13}, | |
661 | {"wstate", 14}, | |
125f0b0d | 662 | {"fq", 15}, |
355afbcd KR |
663 | {"ver", 31}, |
664 | {"", -1}, /* end marker */ | |
680227f3 KR |
665 | }; |
666 | ||
355afbcd KR |
667 | static int |
668 | cmp_reg_entry (p, q) | |
680227f3 KR |
669 | struct priv_reg_entry *p, *q; |
670 | { | |
671 | return strcmp (q->name, p->name); | |
672 | } | |
355afbcd | 673 | |
fecd2382 RP |
674 | /* This function is called once, at assembler startup time. It should |
675 | set up all the tables, etc. that the MD part of the assembler will need. */ | |
6df07e7f | 676 | |
355afbcd KR |
677 | void |
678 | md_begin () | |
679 | { | |
7766838e | 680 | register const char *retval = NULL; |
355afbcd KR |
681 | int lose = 0; |
682 | register unsigned int i = 0; | |
683 | ||
684 | op_hash = hash_new (); | |
355afbcd | 685 | |
e70ad5d5 | 686 | while (i < sparc_num_opcodes) |
355afbcd KR |
687 | { |
688 | const char *name = sparc_opcodes[i].name; | |
689 | retval = hash_insert (op_hash, name, &sparc_opcodes[i]); | |
7766838e | 690 | if (retval != NULL) |
355afbcd KR |
691 | { |
692 | fprintf (stderr, "internal error: can't hash `%s': %s\n", | |
693 | sparc_opcodes[i].name, retval); | |
694 | lose = 1; | |
fecd2382 | 695 | } |
355afbcd KR |
696 | do |
697 | { | |
698 | if (sparc_opcodes[i].match & sparc_opcodes[i].lose) | |
699 | { | |
700 | fprintf (stderr, "internal error: losing opcode: `%s' \"%s\"\n", | |
701 | sparc_opcodes[i].name, sparc_opcodes[i].args); | |
702 | lose = 1; | |
703 | } | |
704 | ++i; | |
705 | } | |
e70ad5d5 | 706 | while (i < sparc_num_opcodes |
355afbcd KR |
707 | && !strcmp (sparc_opcodes[i].name, name)); |
708 | } | |
709 | ||
710 | if (lose) | |
711 | as_fatal ("Broken assembler. No assembly attempted."); | |
712 | ||
713 | for (i = '0'; i < '8'; ++i) | |
714 | octal[i] = 1; | |
715 | for (i = '0'; i <= '9'; ++i) | |
716 | toHex[i] = i - '0'; | |
717 | for (i = 'a'; i <= 'f'; ++i) | |
718 | toHex[i] = i + 10 - 'a'; | |
719 | for (i = 'A'; i <= 'F'; ++i) | |
720 | toHex[i] = i + 10 - 'A'; | |
721 | ||
355afbcd KR |
722 | qsort (priv_reg_table, sizeof (priv_reg_table) / sizeof (priv_reg_table[0]), |
723 | sizeof (priv_reg_table[0]), cmp_reg_entry); | |
ed9638af KR |
724 | |
725 | target_big_endian = 1; | |
e70ad5d5 | 726 | |
d8b42b96 DE |
727 | /* If -bump, record the architecture level at which we start issuing |
728 | warnings. The behaviour is different depending upon whether an | |
729 | architecture was explicitly specified. If it wasn't, we issue warnings | |
730 | for all upwards bumps. If it was, we don't start issuing warnings until | |
731 | we need to bump beyond the requested architecture or when we bump between | |
732 | conflicting architectures. */ | |
733 | ||
734 | if (warn_on_bump | |
735 | && architecture_requested) | |
736 | { | |
737 | /* `max_architecture' records the requested architecture. | |
738 | Issue warnings if we go above it. */ | |
739 | warn_after_architecture = max_architecture; | |
740 | ||
741 | /* Find the highest architecture level that doesn't conflict with | |
742 | the requested one. */ | |
743 | for (max_architecture = SPARC_OPCODE_ARCH_MAX; | |
744 | max_architecture > warn_after_architecture; | |
745 | --max_architecture) | |
746 | if (! SPARC_OPCODE_CONFLICT_P (max_architecture, | |
747 | warn_after_architecture)) | |
748 | break; | |
749 | } | |
6df07e7f DE |
750 | } |
751 | ||
752 | /* Called after all assembly has been done. */ | |
753 | ||
754 | void | |
755 | sparc_md_end () | |
756 | { | |
60abd849 | 757 | #ifdef SPARC_ARCH64 |
e70ad5d5 DE |
758 | if (current_architecture == SPARC_OPCODE_ARCH_V9A) |
759 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v9a); | |
760 | else | |
761 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v9); | |
6df07e7f | 762 | #else |
e70ad5d5 DE |
763 | if (current_architecture == SPARC_OPCODE_ARCH_V9) |
764 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v8plus); | |
765 | else if (current_architecture == SPARC_OPCODE_ARCH_V9A) | |
766 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v8plusa); | |
ed94c2b8 ILT |
767 | else if (current_architecture == SPARC_OPCODE_ARCH_SPARCLET) |
768 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_sparclet); | |
e70ad5d5 | 769 | else |
ed94c2b8 ILT |
770 | { |
771 | /* The sparclite is treated like a normal sparc. Perhaps it shouldn't | |
772 | be but for now it is (since that's the way it's always been | |
773 | treated). */ | |
774 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc); | |
775 | } | |
6df07e7f | 776 | #endif |
9b6a882e | 777 | } |
fecd2382 | 778 | |
355afbcd KR |
779 | void |
780 | md_assemble (str) | |
781 | char *str; | |
fecd2382 | 782 | { |
ed94c2b8 | 783 | const struct sparc_opcode *insn; |
355afbcd KR |
784 | char *toP; |
785 | int rsd; | |
786 | ||
787 | know (str); | |
ed94c2b8 ILT |
788 | sparc_ip (str, &insn); |
789 | ||
790 | /* We warn about attempts to put a floating point branch in a delay | |
791 | slot. */ | |
792 | if (insn != NULL | |
793 | && last_insn != NULL | |
794 | && (insn->flags & F_FBR) != 0 | |
795 | && (last_insn->flags & F_DELAYED) != 0) | |
796 | as_warn ("FP branch in delay slot"); | |
797 | ||
798 | /* SPARC before v9 requires a nop instruction between a floating | |
799 | point instruction and a floating point branch. We insert one | |
800 | automatically, with a warning. */ | |
801 | if (max_architecture < SPARC_OPCODE_ARCH_V9 | |
802 | && insn != NULL | |
803 | && last_insn != NULL | |
804 | && (insn->flags & F_FBR) != 0 | |
805 | && (last_insn->flags & F_FLOAT) != 0) | |
806 | { | |
807 | as_warn ("FP branch preceded by FP instruction; NOP inserted"); | |
808 | toP = frag_more (4); | |
809 | md_number_to_chars (toP, (valueT) 0x01000000, 4); | |
810 | } | |
355afbcd KR |
811 | |
812 | /* See if "set" operand is absolute and small; skip sethi if so. */ | |
428d312b | 813 | if (special_case == SPECIAL_CASE_SET |
5ac34ac3 | 814 | && the_insn.exp.X_op == O_constant) |
355afbcd KR |
815 | { |
816 | if (the_insn.exp.X_add_number >= -(1 << 12) | |
817 | && the_insn.exp.X_add_number < (1 << 12)) | |
818 | { | |
819 | the_insn.opcode = 0x80102000 /* or %g0,imm,... */ | |
820 | | (the_insn.opcode & 0x3E000000) /* dest reg */ | |
821 | | (the_insn.exp.X_add_number & 0x1FFF); /* imm */ | |
822 | special_case = 0; /* No longer special */ | |
428d312b | 823 | the_insn.reloc = BFD_RELOC_NONE; /* No longer relocated */ |
680227f3 | 824 | } |
355afbcd KR |
825 | } |
826 | ||
827 | toP = frag_more (4); | |
828 | /* put out the opcode */ | |
125f0b0d | 829 | md_number_to_chars (toP, (valueT) the_insn.opcode, 4); |
355afbcd KR |
830 | |
831 | /* put out the symbol-dependent stuff */ | |
428d312b | 832 | if (the_insn.reloc != BFD_RELOC_NONE) |
355afbcd | 833 | { |
5ac34ac3 ILT |
834 | fix_new_exp (frag_now, /* which frag */ |
835 | (toP - frag_now->fr_literal), /* where */ | |
836 | 4, /* size */ | |
837 | &the_insn.exp, | |
838 | the_insn.pcrel, | |
839 | the_insn.reloc); | |
355afbcd | 840 | } |
428d312b | 841 | |
ed94c2b8 ILT |
842 | last_insn = insn; |
843 | ||
355afbcd KR |
844 | switch (special_case) |
845 | { | |
355afbcd KR |
846 | case SPECIAL_CASE_SET: |
847 | special_case = 0; | |
428d312b | 848 | assert (the_insn.reloc == BFD_RELOC_HI22); |
355afbcd | 849 | /* See if "set" operand has no low-order bits; skip OR if so. */ |
5ac34ac3 | 850 | if (the_insn.exp.X_op == O_constant |
355afbcd KR |
851 | && ((the_insn.exp.X_add_number & 0x3FF) == 0)) |
852 | return; | |
853 | toP = frag_more (4); | |
854 | rsd = (the_insn.opcode >> 25) & 0x1f; | |
855 | the_insn.opcode = 0x80102000 | (rsd << 25) | (rsd << 14); | |
125f0b0d | 856 | md_number_to_chars (toP, (valueT) the_insn.opcode, 4); |
5ac34ac3 ILT |
857 | fix_new_exp (frag_now, /* which frag */ |
858 | (toP - frag_now->fr_literal), /* where */ | |
859 | 4, /* size */ | |
860 | &the_insn.exp, | |
861 | the_insn.pcrel, | |
862 | BFD_RELOC_LO10); | |
355afbcd KR |
863 | return; |
864 | ||
865 | case SPECIAL_CASE_FDIV: | |
866 | /* According to information leaked from Sun, the "fdiv" instructions | |
8fc0776d JW |
867 | on early SPARC machines would produce incorrect results sometimes. |
868 | The workaround is to add an fmovs of the destination register to | |
869 | itself just after the instruction. This was true on machines | |
870 | with Weitek 1165 float chips, such as the Sun-4/260 and /280. */ | |
355afbcd | 871 | special_case = 0; |
428d312b | 872 | assert (the_insn.reloc == BFD_RELOC_NONE); |
355afbcd KR |
873 | toP = frag_more (4); |
874 | rsd = (the_insn.opcode >> 25) & 0x1f; | |
875 | the_insn.opcode = 0x81A00020 | (rsd << 25) | rsd; /* fmovs dest,dest */ | |
125f0b0d | 876 | md_number_to_chars (toP, (valueT) the_insn.opcode, 4); |
355afbcd KR |
877 | return; |
878 | ||
879 | case 0: | |
880 | return; | |
881 | ||
882 | default: | |
883 | as_fatal ("failed sanity check."); | |
884 | } | |
9b6a882e | 885 | } |
355afbcd | 886 | |
5e0a90a8 KR |
887 | /* Implement big shift right. */ |
888 | static bfd_vma | |
889 | BSR (val, amount) | |
890 | bfd_vma val; | |
891 | int amount; | |
892 | { | |
893 | if (sizeof (bfd_vma) <= 4 && amount >= 32) | |
894 | as_fatal ("Support for 64-bit arithmetic not compiled in."); | |
895 | return val >> amount; | |
896 | } | |
897 | ||
6df07e7f | 898 | /* Parse an argument that can be expressed as a keyword. |
e86d5cf3 | 899 | (eg: #StoreStore or %ccfr). |
6df07e7f DE |
900 | The result is a boolean indicating success. |
901 | If successful, INPUT_POINTER is updated. */ | |
902 | ||
903 | static int | |
904 | parse_keyword_arg (lookup_fn, input_pointerP, valueP) | |
905 | int (*lookup_fn) (); | |
906 | char **input_pointerP; | |
907 | int *valueP; | |
908 | { | |
909 | int value; | |
910 | char c, *p, *q; | |
911 | ||
912 | p = *input_pointerP; | |
e86d5cf3 | 913 | for (q = p + (*p == '#' || *p == '%'); isalpha (*q) || *q == '_'; ++q) |
6df07e7f DE |
914 | continue; |
915 | c = *q; | |
916 | *q = 0; | |
917 | value = (*lookup_fn) (p); | |
918 | *q = c; | |
919 | if (value == -1) | |
920 | return 0; | |
921 | *valueP = value; | |
922 | *input_pointerP = q; | |
923 | return 1; | |
924 | } | |
925 | ||
926 | /* Parse an argument that is a constant expression. | |
927 | The result is a boolean indicating success. */ | |
928 | ||
929 | static int | |
930 | parse_const_expr_arg (input_pointerP, valueP) | |
931 | char **input_pointerP; | |
932 | int *valueP; | |
933 | { | |
934 | char *save = input_line_pointer; | |
935 | expressionS exp; | |
936 | ||
937 | input_line_pointer = *input_pointerP; | |
938 | /* The next expression may be something other than a constant | |
939 | (say if we're not processing the right variant of the insn). | |
940 | Don't call expression unless we're sure it will succeed as it will | |
941 | signal an error (which we want to defer until later). */ | |
942 | /* FIXME: It might be better to define md_operand and have it recognize | |
943 | things like %asi, etc. but continuing that route through to the end | |
944 | is a lot of work. */ | |
945 | if (*input_line_pointer == '%') | |
946 | { | |
947 | input_line_pointer = save; | |
948 | return 0; | |
949 | } | |
950 | expression (&exp); | |
951 | *input_pointerP = input_line_pointer; | |
952 | input_line_pointer = save; | |
953 | if (exp.X_op != O_constant) | |
954 | return 0; | |
955 | *valueP = exp.X_add_number; | |
956 | return 1; | |
957 | } | |
958 | ||
355afbcd | 959 | static void |
ed94c2b8 | 960 | sparc_ip (str, pinsn) |
355afbcd | 961 | char *str; |
ed94c2b8 | 962 | const struct sparc_opcode **pinsn; |
fecd2382 | 963 | { |
355afbcd KR |
964 | char *error_message = ""; |
965 | char *s; | |
966 | const char *args; | |
967 | char c; | |
a7aa7a2b | 968 | const struct sparc_opcode *insn; |
355afbcd KR |
969 | char *argsStart; |
970 | unsigned long opcode; | |
971 | unsigned int mask = 0; | |
972 | int match = 0; | |
973 | int comma = 0; | |
974 | long immediate_max = 0; | |
6df07e7f | 975 | int v9_arg_p; |
355afbcd KR |
976 | |
977 | for (s = str; islower (*s) || (*s >= '0' && *s <= '3'); ++s) | |
978 | ; | |
6df07e7f | 979 | |
355afbcd KR |
980 | switch (*s) |
981 | { | |
355afbcd KR |
982 | case '\0': |
983 | break; | |
984 | ||
985 | case ',': | |
986 | comma = 1; | |
987 | ||
988 | /*FALLTHROUGH */ | |
989 | ||
990 | case ' ': | |
991 | *s++ = '\0'; | |
992 | break; | |
993 | ||
994 | default: | |
a7aa7a2b | 995 | as_fatal ("Unknown opcode: `%s'", str); |
355afbcd | 996 | } |
a7aa7a2b | 997 | insn = (struct sparc_opcode *) hash_find (op_hash, str); |
ed94c2b8 | 998 | *pinsn = insn; |
a7aa7a2b | 999 | if (insn == NULL) |
355afbcd KR |
1000 | { |
1001 | as_bad ("Unknown opcode: `%s'", str); | |
1002 | return; | |
1003 | } | |
1004 | if (comma) | |
1005 | { | |
1006 | *--s = ','; | |
1007 | } | |
6df07e7f | 1008 | |
355afbcd KR |
1009 | argsStart = s; |
1010 | for (;;) | |
1011 | { | |
1012 | opcode = insn->match; | |
1013 | memset (&the_insn, '\0', sizeof (the_insn)); | |
428d312b | 1014 | the_insn.reloc = BFD_RELOC_NONE; |
6df07e7f | 1015 | v9_arg_p = 0; |
355afbcd KR |
1016 | |
1017 | /* | |
8fc0776d JW |
1018 | * Build the opcode, checking as we go to make |
1019 | * sure that the operands match | |
1020 | */ | |
355afbcd KR |
1021 | for (args = insn->args;; ++args) |
1022 | { | |
1023 | switch (*args) | |
1024 | { | |
355afbcd KR |
1025 | case 'K': |
1026 | { | |
7766838e | 1027 | int kmask = 0; |
ed9638af KR |
1028 | |
1029 | /* Parse a series of masks. */ | |
1030 | if (*s == '#') | |
355afbcd | 1031 | { |
ed9638af | 1032 | while (*s == '#') |
355afbcd | 1033 | { |
6df07e7f DE |
1034 | int mask; |
1035 | ||
1036 | if (! parse_keyword_arg (sparc_encode_membar, &s, | |
1037 | &mask)) | |
ed9638af KR |
1038 | { |
1039 | error_message = ": invalid membar mask name"; | |
1040 | goto error; | |
1041 | } | |
6df07e7f DE |
1042 | kmask |= mask; |
1043 | while (*s == ' ') { ++s; continue; } | |
1044 | if (*s == '|' || *s == '+') | |
ed9638af | 1045 | ++s; |
6df07e7f | 1046 | while (*s == ' ') { ++s; continue; } |
355afbcd | 1047 | } |
ed9638af | 1048 | } |
c999fd9f | 1049 | else |
ed9638af | 1050 | { |
6df07e7f DE |
1051 | if (! parse_const_expr_arg (&s, &kmask)) |
1052 | { | |
1053 | error_message = ": invalid membar mask expression"; | |
1054 | goto error; | |
1055 | } | |
1056 | if (kmask < 0 || kmask > 127) | |
ed9638af KR |
1057 | { |
1058 | error_message = ": invalid membar mask number"; | |
1059 | goto error; | |
355afbcd | 1060 | } |
355afbcd | 1061 | } |
c999fd9f | 1062 | |
6df07e7f | 1063 | opcode |= MEMBAR (kmask); |
355afbcd KR |
1064 | continue; |
1065 | } | |
1066 | ||
1067 | case '*': | |
ed9638af | 1068 | { |
6df07e7f | 1069 | int fcn = 0; |
355afbcd | 1070 | |
ed9638af KR |
1071 | /* Parse a prefetch function. */ |
1072 | if (*s == '#') | |
1073 | { | |
6df07e7f | 1074 | if (! parse_keyword_arg (sparc_encode_prefetch, &s, &fcn)) |
ed9638af KR |
1075 | { |
1076 | error_message = ": invalid prefetch function name"; | |
1077 | goto error; | |
1078 | } | |
1079 | } | |
6df07e7f | 1080 | else |
ed9638af | 1081 | { |
6df07e7f | 1082 | if (! parse_const_expr_arg (&s, &fcn)) |
ed9638af | 1083 | { |
6df07e7f DE |
1084 | error_message = ": invalid prefetch function expression"; |
1085 | goto error; | |
ed9638af | 1086 | } |
6df07e7f | 1087 | if (fcn < 0 || fcn > 31) |
ed9638af KR |
1088 | { |
1089 | error_message = ": invalid prefetch function number"; | |
1090 | goto error; | |
1091 | } | |
1092 | } | |
6df07e7f | 1093 | opcode |= RD (fcn); |
ed9638af KR |
1094 | continue; |
1095 | } | |
355afbcd KR |
1096 | |
1097 | case '!': | |
1098 | case '?': | |
6df07e7f | 1099 | /* Parse a sparc64 privileged register. */ |
355afbcd KR |
1100 | if (*s == '%') |
1101 | { | |
1102 | struct priv_reg_entry *p = priv_reg_table; | |
7766838e | 1103 | unsigned int len = 9999999; /* init to make gcc happy */ |
355afbcd KR |
1104 | |
1105 | s += 1; | |
1106 | while (p->name[0] > s[0]) | |
1107 | p++; | |
1108 | while (p->name[0] == s[0]) | |
1109 | { | |
1110 | len = strlen (p->name); | |
1111 | if (strncmp (p->name, s, len) == 0) | |
1112 | break; | |
1113 | p++; | |
1114 | } | |
1115 | if (p->name[0] != s[0]) | |
1116 | { | |
ed9638af | 1117 | error_message = ": unrecognizable privileged register"; |
355afbcd KR |
1118 | goto error; |
1119 | } | |
1120 | if (*args == '?') | |
1121 | opcode |= (p->regnum << 14); | |
1122 | else | |
1123 | opcode |= (p->regnum << 25); | |
1124 | s += len; | |
1125 | continue; | |
1126 | } | |
1127 | else | |
1128 | { | |
ed9638af | 1129 | error_message = ": unrecognizable privileged register"; |
355afbcd KR |
1130 | goto error; |
1131 | } | |
680227f3 | 1132 | |
355afbcd KR |
1133 | case 'M': |
1134 | case 'm': | |
1135 | if (strncmp (s, "%asr", 4) == 0) | |
1136 | { | |
1137 | s += 4; | |
680227f3 | 1138 | |
355afbcd KR |
1139 | if (isdigit (*s)) |
1140 | { | |
1141 | long num = 0; | |
1142 | ||
1143 | while (isdigit (*s)) | |
1144 | { | |
1145 | num = num * 10 + *s - '0'; | |
1146 | ++s; | |
1147 | } | |
1148 | ||
e86d5cf3 | 1149 | if (current_architecture >= SPARC_OPCODE_ARCH_V9) |
355afbcd | 1150 | { |
e86d5cf3 DE |
1151 | if (num < 16 || 31 < num) |
1152 | { | |
1153 | error_message = ": asr number must be between 16 and 31"; | |
1154 | goto error; | |
1155 | } | |
1156 | } | |
1157 | else | |
1158 | { | |
2cb1807e | 1159 | if (num < 0 || 31 < num) |
e86d5cf3 | 1160 | { |
2cb1807e | 1161 | error_message = ": asr number must be between 0 and 31"; |
e86d5cf3 DE |
1162 | goto error; |
1163 | } | |
1164 | } | |
355afbcd KR |
1165 | |
1166 | opcode |= (*args == 'M' ? RS1 (num) : RD (num)); | |
1167 | continue; | |
1168 | } | |
1169 | else | |
1170 | { | |
1171 | error_message = ": expecting %asrN"; | |
1172 | goto error; | |
e86d5cf3 DE |
1173 | } |
1174 | } /* if %asr */ | |
355afbcd KR |
1175 | break; |
1176 | ||
355afbcd | 1177 | case 'I': |
125f0b0d | 1178 | the_insn.reloc = BFD_RELOC_SPARC_11; |
355afbcd KR |
1179 | immediate_max = 0x03FF; |
1180 | goto immediate; | |
1181 | ||
1182 | case 'j': | |
125f0b0d | 1183 | the_insn.reloc = BFD_RELOC_SPARC_10; |
355afbcd KR |
1184 | immediate_max = 0x01FF; |
1185 | goto immediate; | |
1186 | ||
8dd07a84 ILT |
1187 | case 'X': |
1188 | /* V8 systems don't understand BFD_RELOC_SPARC_5. */ | |
1189 | if (SPARC_OPCODE_ARCH_V9_P (max_architecture)) | |
1190 | the_insn.reloc = BFD_RELOC_SPARC_5; | |
1191 | else | |
1192 | the_insn.reloc = BFD_RELOC_SPARC13; | |
1193 | /* These fields are unsigned, but for upward compatibility, | |
1194 | allow negative values as well. */ | |
1195 | immediate_max = 0x1f; | |
1196 | goto immediate; | |
1197 | ||
1198 | case 'Y': | |
1199 | /* V8 systems don't understand BFD_RELOC_SPARC_6. */ | |
1200 | if (SPARC_OPCODE_ARCH_V9_P (max_architecture)) | |
1201 | the_insn.reloc = BFD_RELOC_SPARC_6; | |
1202 | else | |
1203 | the_insn.reloc = BFD_RELOC_SPARC13; | |
1204 | /* These fields are unsigned, but for upward compatibility, | |
1205 | allow negative values as well. */ | |
1206 | immediate_max = 0x3f; | |
1207 | goto immediate; | |
1208 | ||
355afbcd | 1209 | case 'k': |
125f0b0d | 1210 | the_insn.reloc = /* RELOC_WDISP2_14 */ BFD_RELOC_SPARC_WDISP16; |
355afbcd KR |
1211 | the_insn.pcrel = 1; |
1212 | goto immediate; | |
1213 | ||
1214 | case 'G': | |
125f0b0d | 1215 | the_insn.reloc = BFD_RELOC_SPARC_WDISP19; |
355afbcd KR |
1216 | the_insn.pcrel = 1; |
1217 | goto immediate; | |
1218 | ||
1219 | case 'N': | |
1220 | if (*s == 'p' && s[1] == 'n') | |
1221 | { | |
1222 | s += 2; | |
1223 | continue; | |
1224 | } | |
1225 | break; | |
1226 | ||
1227 | case 'T': | |
1228 | if (*s == 'p' && s[1] == 't') | |
1229 | { | |
1230 | s += 2; | |
1231 | continue; | |
1232 | } | |
1233 | break; | |
1234 | ||
1235 | case 'z': | |
1236 | if (*s == ' ') | |
1237 | { | |
1238 | ++s; | |
1239 | } | |
0d44b3d1 | 1240 | if (strncmp (s, "%icc", 4) == 0) |
355afbcd | 1241 | { |
0d44b3d1 | 1242 | s += 4; |
355afbcd KR |
1243 | continue; |
1244 | } | |
1245 | break; | |
1246 | ||
1247 | case 'Z': | |
1248 | if (*s == ' ') | |
1249 | { | |
1250 | ++s; | |
1251 | } | |
0d44b3d1 | 1252 | if (strncmp (s, "%xcc", 4) == 0) |
355afbcd | 1253 | { |
0d44b3d1 | 1254 | s += 4; |
355afbcd KR |
1255 | continue; |
1256 | } | |
1257 | break; | |
1258 | ||
1259 | case '6': | |
1260 | if (*s == ' ') | |
1261 | { | |
1262 | ++s; | |
1263 | } | |
0d44b3d1 | 1264 | if (strncmp (s, "%fcc0", 5) == 0) |
355afbcd | 1265 | { |
0d44b3d1 | 1266 | s += 5; |
355afbcd KR |
1267 | continue; |
1268 | } | |
1269 | break; | |
1270 | ||
1271 | case '7': | |
1272 | if (*s == ' ') | |
1273 | { | |
1274 | ++s; | |
1275 | } | |
0d44b3d1 | 1276 | if (strncmp (s, "%fcc1", 5) == 0) |
355afbcd | 1277 | { |
0d44b3d1 | 1278 | s += 5; |
355afbcd KR |
1279 | continue; |
1280 | } | |
1281 | break; | |
1282 | ||
1283 | case '8': | |
1284 | if (*s == ' ') | |
1285 | { | |
1286 | ++s; | |
1287 | } | |
0d44b3d1 | 1288 | if (strncmp (s, "%fcc2", 5) == 0) |
355afbcd | 1289 | { |
0d44b3d1 | 1290 | s += 5; |
355afbcd KR |
1291 | continue; |
1292 | } | |
1293 | break; | |
1294 | ||
1295 | case '9': | |
1296 | if (*s == ' ') | |
1297 | { | |
1298 | ++s; | |
1299 | } | |
0d44b3d1 | 1300 | if (strncmp (s, "%fcc3", 5) == 0) |
355afbcd | 1301 | { |
0d44b3d1 | 1302 | s += 5; |
355afbcd KR |
1303 | continue; |
1304 | } | |
1305 | break; | |
1306 | ||
1307 | case 'P': | |
1308 | if (strncmp (s, "%pc", 3) == 0) | |
1309 | { | |
1310 | s += 3; | |
1311 | continue; | |
1312 | } | |
1313 | break; | |
1314 | ||
1315 | case 'W': | |
1316 | if (strncmp (s, "%tick", 5) == 0) | |
1317 | { | |
1318 | s += 5; | |
1319 | continue; | |
1320 | } | |
1321 | break; | |
355afbcd KR |
1322 | |
1323 | case '\0': /* end of args */ | |
1324 | if (*s == '\0') | |
1325 | { | |
1326 | match = 1; | |
1327 | } | |
1328 | break; | |
1329 | ||
1330 | case '+': | |
1331 | if (*s == '+') | |
1332 | { | |
1333 | ++s; | |
1334 | continue; | |
1335 | } | |
1336 | if (*s == '-') | |
1337 | { | |
1338 | continue; | |
1339 | } | |
1340 | break; | |
1341 | ||
1342 | case '[': /* these must match exactly */ | |
1343 | case ']': | |
1344 | case ',': | |
1345 | case ' ': | |
1346 | if (*s++ == *args) | |
1347 | continue; | |
1348 | break; | |
1349 | ||
1350 | case '#': /* must be at least one digit */ | |
1351 | if (isdigit (*s++)) | |
1352 | { | |
1353 | while (isdigit (*s)) | |
1354 | { | |
1355 | ++s; | |
1356 | } | |
1357 | continue; | |
1358 | } | |
1359 | break; | |
1360 | ||
1361 | case 'C': /* coprocessor state register */ | |
1362 | if (strncmp (s, "%csr", 4) == 0) | |
1363 | { | |
1364 | s += 4; | |
1365 | continue; | |
1366 | } | |
1367 | break; | |
1368 | ||
1369 | case 'b': /* next operand is a coprocessor register */ | |
1370 | case 'c': | |
1371 | case 'D': | |
1372 | if (*s++ == '%' && *s++ == 'c' && isdigit (*s)) | |
1373 | { | |
1374 | mask = *s++; | |
1375 | if (isdigit (*s)) | |
1376 | { | |
1377 | mask = 10 * (mask - '0') + (*s++ - '0'); | |
1378 | if (mask >= 32) | |
1379 | { | |
1380 | break; | |
1381 | } | |
1382 | } | |
1383 | else | |
1384 | { | |
1385 | mask -= '0'; | |
1386 | } | |
1387 | switch (*args) | |
1388 | { | |
1389 | ||
1390 | case 'b': | |
1391 | opcode |= mask << 14; | |
1392 | continue; | |
1393 | ||
1394 | case 'c': | |
1395 | opcode |= mask; | |
1396 | continue; | |
1397 | ||
1398 | case 'D': | |
1399 | opcode |= mask << 25; | |
1400 | continue; | |
1401 | } | |
1402 | } | |
1403 | break; | |
1404 | ||
1405 | case 'r': /* next operand must be a register */ | |
ed94c2b8 | 1406 | case 'O': |
355afbcd KR |
1407 | case '1': |
1408 | case '2': | |
1409 | case 'd': | |
1410 | if (*s++ == '%') | |
1411 | { | |
1412 | switch (c = *s++) | |
1413 | { | |
1414 | ||
1415 | case 'f': /* frame pointer */ | |
1416 | if (*s++ == 'p') | |
1417 | { | |
1418 | mask = 0x1e; | |
1419 | break; | |
1420 | } | |
1421 | goto error; | |
1422 | ||
1423 | case 'g': /* global register */ | |
1424 | if (isoctal (c = *s++)) | |
1425 | { | |
1426 | mask = c - '0'; | |
1427 | break; | |
1428 | } | |
1429 | goto error; | |
1430 | ||
1431 | case 'i': /* in register */ | |
1432 | if (isoctal (c = *s++)) | |
1433 | { | |
1434 | mask = c - '0' + 24; | |
1435 | break; | |
1436 | } | |
1437 | goto error; | |
1438 | ||
1439 | case 'l': /* local register */ | |
1440 | if (isoctal (c = *s++)) | |
1441 | { | |
1442 | mask = (c - '0' + 16); | |
1443 | break; | |
1444 | } | |
1445 | goto error; | |
1446 | ||
1447 | case 'o': /* out register */ | |
1448 | if (isoctal (c = *s++)) | |
1449 | { | |
1450 | mask = (c - '0' + 8); | |
1451 | break; | |
1452 | } | |
1453 | goto error; | |
1454 | ||
1455 | case 's': /* stack pointer */ | |
1456 | if (*s++ == 'p') | |
1457 | { | |
1458 | mask = 0xe; | |
1459 | break; | |
1460 | } | |
1461 | goto error; | |
1462 | ||
1463 | case 'r': /* any register */ | |
1464 | if (!isdigit (c = *s++)) | |
1465 | { | |
1466 | goto error; | |
1467 | } | |
1468 | /* FALLTHROUGH */ | |
1469 | case '0': | |
1470 | case '1': | |
1471 | case '2': | |
1472 | case '3': | |
1473 | case '4': | |
1474 | case '5': | |
1475 | case '6': | |
1476 | case '7': | |
1477 | case '8': | |
1478 | case '9': | |
1479 | if (isdigit (*s)) | |
1480 | { | |
1481 | if ((c = 10 * (c - '0') + (*s++ - '0')) >= 32) | |
680227f3 | 1482 | { |
680227f3 KR |
1483 | goto error; |
1484 | } | |
355afbcd KR |
1485 | } |
1486 | else | |
1487 | { | |
1488 | c -= '0'; | |
1489 | } | |
1490 | mask = c; | |
1491 | break; | |
1492 | ||
1493 | default: | |
1494 | goto error; | |
1495 | } | |
6df07e7f DE |
1496 | |
1497 | /* Got the register, now figure out where | |
1498 | it goes in the opcode. */ | |
355afbcd KR |
1499 | switch (*args) |
1500 | { | |
355afbcd KR |
1501 | case '1': |
1502 | opcode |= mask << 14; | |
1503 | continue; | |
1504 | ||
1505 | case '2': | |
1506 | opcode |= mask; | |
1507 | continue; | |
1508 | ||
1509 | case 'd': | |
1510 | opcode |= mask << 25; | |
1511 | continue; | |
1512 | ||
1513 | case 'r': | |
1514 | opcode |= (mask << 25) | (mask << 14); | |
1515 | continue; | |
ed94c2b8 ILT |
1516 | |
1517 | case 'O': | |
1518 | opcode |= (mask << 25) | (mask << 0); | |
1519 | continue; | |
355afbcd KR |
1520 | } |
1521 | } | |
1522 | break; | |
1523 | ||
1524 | case 'e': /* next operand is a floating point register */ | |
1525 | case 'v': | |
1526 | case 'V': | |
1527 | ||
1528 | case 'f': | |
1529 | case 'B': | |
1530 | case 'R': | |
1531 | ||
1532 | case 'g': | |
1533 | case 'H': | |
1534 | case 'J': | |
1535 | { | |
1536 | char format; | |
1537 | ||
1538 | if (*s++ == '%' | |
355afbcd | 1539 | && ((format = *s) == 'f') |
355afbcd KR |
1540 | && isdigit (*++s)) |
1541 | { | |
355afbcd KR |
1542 | for (mask = 0; isdigit (*s); ++s) |
1543 | { | |
1544 | mask = 10 * mask + (*s - '0'); | |
1545 | } /* read the number */ | |
1546 | ||
1547 | if ((*args == 'v' | |
1548 | || *args == 'B' | |
1549 | || *args == 'H') | |
1550 | && (mask & 1)) | |
1551 | { | |
1552 | break; | |
1553 | } /* register must be even numbered */ | |
1554 | ||
1555 | if ((*args == 'V' | |
1556 | || *args == 'R' | |
1557 | || *args == 'J') | |
1558 | && (mask & 3)) | |
1559 | { | |
1560 | break; | |
1561 | } /* register must be multiple of 4 */ | |
1562 | ||
125f0b0d | 1563 | if (mask >= 64) |
355afbcd | 1564 | { |
8dd07a84 | 1565 | if (SPARC_OPCODE_ARCH_V9_P (max_architecture)) |
6df07e7f DE |
1566 | error_message = ": There are only 64 f registers; [0-63]"; |
1567 | else | |
1568 | error_message = ": There are only 32 f registers; [0-31]"; | |
125f0b0d KR |
1569 | goto error; |
1570 | } /* on error */ | |
6df07e7f | 1571 | else if (mask >= 32) |
125f0b0d | 1572 | { |
8dd07a84 | 1573 | if (SPARC_OPCODE_ARCH_V9_P (max_architecture)) |
6df07e7f DE |
1574 | { |
1575 | v9_arg_p = 1; | |
1576 | mask -= 31; /* wrap high bit */ | |
1577 | } | |
1578 | else | |
1579 | { | |
1580 | error_message = ": There are only 32 f registers; [0-31]"; | |
1581 | goto error; | |
1582 | } | |
1583 | } | |
125f0b0d KR |
1584 | } |
1585 | else | |
1586 | { | |
1587 | break; | |
1588 | } /* if not an 'f' register. */ | |
355afbcd KR |
1589 | |
1590 | switch (*args) | |
1591 | { | |
355afbcd KR |
1592 | case 'v': |
1593 | case 'V': | |
1594 | case 'e': | |
1595 | opcode |= RS1 (mask); | |
1596 | continue; | |
1597 | ||
1598 | ||
1599 | case 'f': | |
1600 | case 'B': | |
1601 | case 'R': | |
1602 | opcode |= RS2 (mask); | |
1603 | continue; | |
1604 | ||
1605 | case 'g': | |
1606 | case 'H': | |
1607 | case 'J': | |
1608 | opcode |= RD (mask); | |
1609 | continue; | |
1610 | } /* pack it in. */ | |
1611 | ||
1612 | know (0); | |
1613 | break; | |
1614 | } /* float arg */ | |
1615 | ||
1616 | case 'F': | |
1617 | if (strncmp (s, "%fsr", 4) == 0) | |
1618 | { | |
1619 | s += 4; | |
1620 | continue; | |
1621 | } | |
1622 | break; | |
1623 | ||
1624 | case 'h': /* high 22 bits */ | |
428d312b | 1625 | the_insn.reloc = BFD_RELOC_HI22; |
355afbcd KR |
1626 | goto immediate; |
1627 | ||
1628 | case 'l': /* 22 bit PC relative immediate */ | |
428d312b | 1629 | the_insn.reloc = BFD_RELOC_SPARC_WDISP22; |
355afbcd KR |
1630 | the_insn.pcrel = 1; |
1631 | goto immediate; | |
1632 | ||
1633 | case 'L': /* 30 bit immediate */ | |
428d312b | 1634 | the_insn.reloc = BFD_RELOC_32_PCREL_S2; |
355afbcd KR |
1635 | the_insn.pcrel = 1; |
1636 | goto immediate; | |
1637 | ||
1638 | case 'n': /* 22 bit immediate */ | |
428d312b | 1639 | the_insn.reloc = BFD_RELOC_SPARC22; |
355afbcd KR |
1640 | goto immediate; |
1641 | ||
1642 | case 'i': /* 13 bit immediate */ | |
7ab2e983 | 1643 | the_insn.reloc = BFD_RELOC_SPARC13; |
355afbcd KR |
1644 | immediate_max = 0x0FFF; |
1645 | ||
1646 | /*FALLTHROUGH */ | |
1647 | ||
1648 | immediate: | |
1649 | if (*s == ' ') | |
1650 | s++; | |
1651 | if (*s == '%') | |
1652 | { | |
1653 | if ((c = s[1]) == 'h' && s[2] == 'i') | |
1654 | { | |
428d312b | 1655 | the_insn.reloc = BFD_RELOC_HI22; |
355afbcd KR |
1656 | s += 3; |
1657 | } | |
1658 | else if (c == 'l' && s[2] == 'o') | |
1659 | { | |
428d312b | 1660 | the_insn.reloc = BFD_RELOC_LO10; |
355afbcd | 1661 | s += 3; |
355afbcd KR |
1662 | } |
1663 | else if (c == 'u' | |
1664 | && s[2] == 'h' | |
1665 | && s[3] == 'i') | |
1666 | { | |
125f0b0d | 1667 | the_insn.reloc = BFD_RELOC_SPARC_HH22; |
355afbcd | 1668 | s += 4; |
6df07e7f | 1669 | v9_arg_p = 1; |
355afbcd KR |
1670 | } |
1671 | else if (c == 'u' | |
1672 | && s[2] == 'l' | |
1673 | && s[3] == 'o') | |
1674 | { | |
125f0b0d | 1675 | the_insn.reloc = BFD_RELOC_SPARC_HM10; |
355afbcd | 1676 | s += 4; |
6df07e7f | 1677 | v9_arg_p = 1; |
355afbcd KR |
1678 | } |
1679 | else | |
1680 | break; | |
1681 | } | |
9b6a882e KR |
1682 | /* Note that if the getExpression() fails, we will still |
1683 | have created U entries in the symbol table for the | |
1684 | 'symbols' in the input string. Try not to create U | |
1685 | symbols for registers, etc. */ | |
355afbcd | 1686 | { |
9b6a882e KR |
1687 | /* This stuff checks to see if the expression ends in |
1688 | +%reg. If it does, it removes the register from | |
1689 | the expression, and re-sets 's' to point to the | |
1690 | right place. */ | |
355afbcd KR |
1691 | |
1692 | char *s1; | |
1693 | ||
1694 | for (s1 = s; *s1 && *s1 != ',' && *s1 != ']'; s1++);; | |
1695 | ||
1696 | if (s1 != s && isdigit (s1[-1])) | |
1697 | { | |
1698 | if (s1[-2] == '%' && s1[-3] == '+') | |
1699 | { | |
1700 | s1 -= 3; | |
1701 | *s1 = '\0'; | |
1702 | (void) getExpression (s); | |
1703 | *s1 = '+'; | |
1704 | s = s1; | |
1705 | continue; | |
1706 | } | |
1707 | else if (strchr ("goli0123456789", s1[-2]) && s1[-3] == '%' && s1[-4] == '+') | |
1708 | { | |
1709 | s1 -= 4; | |
1710 | *s1 = '\0'; | |
1711 | (void) getExpression (s); | |
1712 | *s1 = '+'; | |
1713 | s = s1; | |
1714 | continue; | |
1715 | } | |
1716 | } | |
1717 | } | |
1718 | (void) getExpression (s); | |
1719 | s = expr_end; | |
1720 | ||
9b6a882e KR |
1721 | if (the_insn.exp.X_op == O_constant |
1722 | && the_insn.exp.X_add_symbol == 0 | |
1723 | && the_insn.exp.X_op_symbol == 0) | |
1724 | { | |
7ab2e983 ILT |
1725 | /* Handle %uhi/%ulo by moving the upper word to the lower |
1726 | one and pretending it's %hi/%lo. We also need to watch | |
1727 | for %hi/%lo: the top word needs to be zeroed otherwise | |
1728 | fixup_segment will complain the value is too big. */ | |
9b6a882e KR |
1729 | switch (the_insn.reloc) |
1730 | { | |
1731 | case BFD_RELOC_SPARC_HH22: | |
1732 | the_insn.reloc = BFD_RELOC_HI22; | |
5e0a90a8 | 1733 | the_insn.exp.X_add_number = BSR (the_insn.exp.X_add_number, 32); |
9b6a882e KR |
1734 | break; |
1735 | case BFD_RELOC_SPARC_HM10: | |
1736 | the_insn.reloc = BFD_RELOC_LO10; | |
5e0a90a8 | 1737 | the_insn.exp.X_add_number = BSR (the_insn.exp.X_add_number, 32); |
9b6a882e | 1738 | break; |
7ab2e983 ILT |
1739 | case BFD_RELOC_HI22: |
1740 | case BFD_RELOC_LO10: | |
1741 | the_insn.exp.X_add_number &= 0xffffffff; | |
1742 | break; | |
6df07e7f DE |
1743 | default: |
1744 | break; | |
9b6a882e | 1745 | } |
6df07e7f | 1746 | |
7ab2e983 ILT |
1747 | /* For pc-relative call instructions, we reject |
1748 | constants to get better code. */ | |
1749 | if (the_insn.pcrel | |
1750 | && the_insn.reloc == BFD_RELOC_32_PCREL_S2 | |
1751 | && in_signed_range (the_insn.exp.X_add_number, 0x3fff) | |
1752 | ) | |
1753 | { | |
1754 | error_message = ": PC-relative operand can't be a constant"; | |
1755 | goto error; | |
1756 | } | |
9b6a882e KR |
1757 | /* Check for invalid constant values. Don't warn if |
1758 | constant was inside %hi or %lo, since these | |
1759 | truncate the constant to fit. */ | |
1760 | if (immediate_max != 0 | |
1761 | && the_insn.reloc != BFD_RELOC_LO10 | |
1762 | && the_insn.reloc != BFD_RELOC_HI22 | |
7ab2e983 ILT |
1763 | && !in_signed_range (the_insn.exp.X_add_number, |
1764 | immediate_max) | |
1765 | ) | |
1766 | { | |
1767 | if (the_insn.pcrel) | |
1768 | /* Who knows? After relocation, we may be within | |
1769 | range. Let the linker figure it out. */ | |
1770 | { | |
1771 | the_insn.exp.X_op = O_symbol; | |
1772 | the_insn.exp.X_add_symbol = section_symbol (absolute_section); | |
1773 | } | |
1774 | else | |
1775 | /* Immediate value is non-pcrel, and out of | |
1776 | range. */ | |
1777 | as_bad ("constant value %ld out of range (%ld .. %ld)", | |
1778 | the_insn.exp.X_add_number, | |
1779 | ~immediate_max, immediate_max); | |
1780 | } | |
9b6a882e KR |
1781 | } |
1782 | ||
355afbcd KR |
1783 | /* Reset to prevent extraneous range check. */ |
1784 | immediate_max = 0; | |
1785 | ||
1786 | continue; | |
1787 | ||
1788 | case 'a': | |
1789 | if (*s++ == 'a') | |
1790 | { | |
1791 | opcode |= ANNUL; | |
1792 | continue; | |
1793 | } | |
1794 | break; | |
1795 | ||
1796 | case 'A': | |
1797 | { | |
ed9638af KR |
1798 | int asi = 0; |
1799 | ||
1800 | /* Parse an asi. */ | |
1801 | if (*s == '#') | |
1802 | { | |
6df07e7f | 1803 | if (! parse_keyword_arg (sparc_encode_asi, &s, &asi)) |
ed9638af | 1804 | { |
6df07e7f | 1805 | error_message = ": invalid ASI name"; |
ed9638af KR |
1806 | goto error; |
1807 | } | |
1808 | } | |
a7aa7a2b | 1809 | else |
ed9638af | 1810 | { |
6df07e7f | 1811 | if (! parse_const_expr_arg (&s, &asi)) |
a7aa7a2b | 1812 | { |
6df07e7f | 1813 | error_message = ": invalid ASI expression"; |
a7aa7a2b ILT |
1814 | goto error; |
1815 | } | |
ed9638af KR |
1816 | if (asi < 0 || asi > 255) |
1817 | { | |
6df07e7f | 1818 | error_message = ": invalid ASI number"; |
ed9638af KR |
1819 | goto error; |
1820 | } | |
1821 | } | |
ed9638af KR |
1822 | opcode |= ASI (asi); |
1823 | continue; | |
355afbcd KR |
1824 | } /* alternate space */ |
1825 | ||
1826 | case 'p': | |
1827 | if (strncmp (s, "%psr", 4) == 0) | |
1828 | { | |
1829 | s += 4; | |
1830 | continue; | |
1831 | } | |
1832 | break; | |
1833 | ||
1834 | case 'q': /* floating point queue */ | |
1835 | if (strncmp (s, "%fq", 3) == 0) | |
1836 | { | |
1837 | s += 3; | |
1838 | continue; | |
1839 | } | |
1840 | break; | |
1841 | ||
1842 | case 'Q': /* coprocessor queue */ | |
1843 | if (strncmp (s, "%cq", 3) == 0) | |
1844 | { | |
1845 | s += 3; | |
1846 | continue; | |
1847 | } | |
1848 | break; | |
1849 | ||
1850 | case 'S': | |
1851 | if (strcmp (str, "set") == 0) | |
1852 | { | |
1853 | special_case = SPECIAL_CASE_SET; | |
1854 | continue; | |
1855 | } | |
1856 | else if (strncmp (str, "fdiv", 4) == 0) | |
1857 | { | |
1858 | special_case = SPECIAL_CASE_FDIV; | |
1859 | continue; | |
1860 | } | |
1861 | break; | |
1862 | ||
355afbcd KR |
1863 | case 'o': |
1864 | if (strncmp (s, "%asi", 4) != 0) | |
1865 | break; | |
1866 | s += 4; | |
1867 | continue; | |
1868 | ||
1869 | case 's': | |
1870 | if (strncmp (s, "%fprs", 5) != 0) | |
1871 | break; | |
1872 | s += 5; | |
1873 | continue; | |
1874 | ||
1875 | case 'E': | |
1876 | if (strncmp (s, "%ccr", 4) != 0) | |
1877 | break; | |
1878 | s += 4; | |
1879 | continue; | |
680227f3 | 1880 | |
355afbcd KR |
1881 | case 't': |
1882 | if (strncmp (s, "%tbr", 4) != 0) | |
1883 | break; | |
1884 | s += 4; | |
1885 | continue; | |
1886 | ||
1887 | case 'w': | |
1888 | if (strncmp (s, "%wim", 4) != 0) | |
1889 | break; | |
1890 | s += 4; | |
1891 | continue; | |
1892 | ||
5e0a90a8 KR |
1893 | case 'x': |
1894 | { | |
1895 | char *push = input_line_pointer; | |
1896 | expressionS e; | |
1897 | ||
1898 | input_line_pointer = s; | |
1899 | expression (&e); | |
1900 | if (e.X_op == O_constant) | |
1901 | { | |
1902 | int n = e.X_add_number; | |
1903 | if (n != e.X_add_number || (n & ~0x1ff) != 0) | |
1904 | as_bad ("OPF immediate operand out of range (0-0x1ff)"); | |
1905 | else | |
1906 | opcode |= e.X_add_number << 5; | |
1907 | } | |
1908 | else | |
1909 | as_bad ("non-immediate OPF operand, ignored"); | |
1910 | s = input_line_pointer; | |
1911 | input_line_pointer = push; | |
1912 | continue; | |
1913 | } | |
5e0a90a8 | 1914 | |
355afbcd KR |
1915 | case 'y': |
1916 | if (strncmp (s, "%y", 2) != 0) | |
1917 | break; | |
1918 | s += 2; | |
1919 | continue; | |
1920 | ||
e86d5cf3 DE |
1921 | case 'u': |
1922 | case 'U': | |
1923 | { | |
1924 | /* Parse a sparclet cpreg. */ | |
1925 | int cpreg; | |
1926 | if (! parse_keyword_arg (sparc_encode_sparclet_cpreg, &s, &cpreg)) | |
1927 | { | |
1928 | error_message = ": invalid cpreg name"; | |
1929 | goto error; | |
1930 | } | |
1931 | opcode |= (*args == 'U' ? RS1 (cpreg) : RD (cpreg)); | |
1932 | continue; | |
1933 | } | |
1934 | ||
355afbcd KR |
1935 | default: |
1936 | as_fatal ("failed sanity check."); | |
1937 | } /* switch on arg code */ | |
6df07e7f DE |
1938 | |
1939 | /* Break out of for() loop. */ | |
355afbcd KR |
1940 | break; |
1941 | } /* for each arg that we expect */ | |
6df07e7f | 1942 | |
355afbcd KR |
1943 | error: |
1944 | if (match == 0) | |
1945 | { | |
1946 | /* Args don't match. */ | |
e70ad5d5 | 1947 | if (((unsigned) (&insn[1] - sparc_opcodes)) < sparc_num_opcodes |
a7aa7a2b ILT |
1948 | && (insn->name == insn[1].name |
1949 | || !strcmp (insn->name, insn[1].name))) | |
355afbcd KR |
1950 | { |
1951 | ++insn; | |
1952 | s = argsStart; | |
1953 | continue; | |
1954 | } | |
1955 | else | |
1956 | { | |
1957 | as_bad ("Illegal operands%s", error_message); | |
1958 | return; | |
1959 | } | |
1960 | } | |
1961 | else | |
1962 | { | |
e70ad5d5 | 1963 | /* We have a match. Now see if the architecture is ok. */ |
d8b42b96 | 1964 | int needed_arch_mask = insn->architecture; |
e70ad5d5 | 1965 | |
d8b42b96 | 1966 | if (v9_arg_p) |
355afbcd | 1967 | { |
d8b42b96 DE |
1968 | needed_arch_mask &= ~ ((1 << SPARC_OPCODE_ARCH_V9) |
1969 | | (1 << SPARC_OPCODE_ARCH_V9A)); | |
1970 | needed_arch_mask |= (1 << SPARC_OPCODE_ARCH_V9); | |
e70ad5d5 | 1971 | } |
d8b42b96 DE |
1972 | |
1973 | if (needed_arch_mask & SPARC_OPCODE_SUPPORTED (current_architecture)) | |
1974 | ; /* ok */ | |
1975 | /* Can we bump up the architecture? */ | |
1976 | else if (needed_arch_mask & SPARC_OPCODE_SUPPORTED (max_architecture)) | |
e70ad5d5 | 1977 | { |
d8b42b96 DE |
1978 | enum sparc_opcode_arch_val needed_architecture = |
1979 | sparc_ffs (SPARC_OPCODE_SUPPORTED (max_architecture) | |
1980 | & needed_arch_mask); | |
1981 | ||
1982 | assert (needed_architecture <= SPARC_OPCODE_ARCH_MAX); | |
e70ad5d5 DE |
1983 | if (warn_on_bump |
1984 | && needed_architecture > warn_after_architecture) | |
355afbcd | 1985 | { |
e70ad5d5 DE |
1986 | as_warn ("architecture bumped from \"%s\" to \"%s\" on \"%s\"", |
1987 | sparc_opcode_archs[current_architecture].name, | |
1988 | sparc_opcode_archs[needed_architecture].name, | |
1989 | str); | |
d8b42b96 | 1990 | warn_after_architecture = needed_architecture; |
355afbcd | 1991 | } |
e70ad5d5 DE |
1992 | current_architecture = needed_architecture; |
1993 | } | |
d8b42b96 | 1994 | /* Conflict. */ |
110b814d DE |
1995 | /* ??? This seems to be a bit fragile. What if the next entry in |
1996 | the opcode table is the one we want and it is supported? | |
1997 | It is possible to arrange the table today so that this can't | |
1998 | happen but what about tomorrow? */ | |
d8b42b96 DE |
1999 | else |
2000 | { | |
110b814d DE |
2001 | int arch,printed_one_p = 0; |
2002 | char *p; | |
2003 | char required_archs[SPARC_OPCODE_ARCH_MAX * 16]; | |
2004 | ||
2005 | /* Create a list of the architectures that support the insn. */ | |
2006 | needed_arch_mask &= ~ SPARC_OPCODE_SUPPORTED (max_architecture); | |
2007 | p = required_archs; | |
2008 | arch = sparc_ffs (needed_arch_mask); | |
2009 | while ((1 << arch) <= needed_arch_mask) | |
2010 | { | |
2011 | if ((1 << arch) & needed_arch_mask) | |
2012 | { | |
2013 | if (printed_one_p) | |
2014 | *p++ = '|'; | |
2015 | strcpy (p, sparc_opcode_archs[arch].name); | |
2016 | p += strlen (p); | |
2017 | printed_one_p = 1; | |
2018 | } | |
2019 | ++arch; | |
2020 | } | |
d8b42b96 | 2021 | |
d8b42b96 DE |
2022 | as_bad ("Architecture mismatch on \"%s\".", str); |
2023 | as_tsktsk (" (Requires %s; requested architecture is %s.)", | |
110b814d | 2024 | required_archs, |
d8b42b96 DE |
2025 | sparc_opcode_archs[max_architecture].name); |
2026 | return; | |
2027 | } | |
e70ad5d5 | 2028 | } /* if no match */ |
355afbcd KR |
2029 | |
2030 | break; | |
e70ad5d5 | 2031 | } /* forever looking for a match */ |
355afbcd KR |
2032 | |
2033 | the_insn.opcode = opcode; | |
c999fd9f | 2034 | } |
355afbcd KR |
2035 | |
2036 | static int | |
2037 | getExpression (str) | |
2038 | char *str; | |
fecd2382 | 2039 | { |
355afbcd KR |
2040 | char *save_in; |
2041 | segT seg; | |
2042 | ||
2043 | save_in = input_line_pointer; | |
2044 | input_line_pointer = str; | |
428d312b | 2045 | seg = expression (&the_insn.exp); |
58d4951d ILT |
2046 | if (seg != absolute_section |
2047 | && seg != text_section | |
2048 | && seg != data_section | |
2049 | && seg != bss_section | |
2050 | && seg != undefined_section) | |
355afbcd | 2051 | { |
355afbcd KR |
2052 | the_insn.error = "bad segment"; |
2053 | expr_end = input_line_pointer; | |
2054 | input_line_pointer = save_in; | |
2055 | return 1; | |
2056 | } | |
2057 | expr_end = input_line_pointer; | |
2058 | input_line_pointer = save_in; | |
2059 | return 0; | |
2060 | } /* getExpression() */ | |
fecd2382 RP |
2061 | |
2062 | ||
2063 | /* | |
2064 | This is identical to the md_atof in m68k.c. I think this is right, | |
2065 | but I'm not sure. | |
355afbcd | 2066 | |
fecd2382 RP |
2067 | Turn a string in input_line_pointer into a floating point constant of type |
2068 | type, and store the appropriate bytes in *litP. The number of LITTLENUMS | |
2069 | emitted is stored in *sizeP . An error message is returned, or NULL on OK. | |
2070 | */ | |
2071 | ||
2072 | /* Equal to MAX_PRECISION in atof-ieee.c */ | |
2073 | #define MAX_LITTLENUMS 6 | |
2074 | ||
355afbcd KR |
2075 | char * |
2076 | md_atof (type, litP, sizeP) | |
2077 | char type; | |
2078 | char *litP; | |
2079 | int *sizeP; | |
fecd2382 | 2080 | { |
355afbcd KR |
2081 | int prec; |
2082 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
2083 | LITTLENUM_TYPE *wordP; | |
2084 | char *t; | |
2085 | char *atof_ieee (); | |
2086 | ||
2087 | switch (type) | |
2088 | { | |
2089 | ||
2090 | case 'f': | |
2091 | case 'F': | |
2092 | case 's': | |
2093 | case 'S': | |
2094 | prec = 2; | |
2095 | break; | |
2096 | ||
2097 | case 'd': | |
2098 | case 'D': | |
2099 | case 'r': | |
2100 | case 'R': | |
2101 | prec = 4; | |
2102 | break; | |
2103 | ||
2104 | case 'x': | |
2105 | case 'X': | |
2106 | prec = 6; | |
2107 | break; | |
2108 | ||
2109 | case 'p': | |
2110 | case 'P': | |
2111 | prec = 6; | |
2112 | break; | |
2113 | ||
2114 | default: | |
2115 | *sizeP = 0; | |
2116 | return "Bad call to MD_ATOF()"; | |
2117 | } | |
2118 | t = atof_ieee (input_line_pointer, type, words); | |
2119 | if (t) | |
2120 | input_line_pointer = t; | |
2121 | *sizeP = prec * sizeof (LITTLENUM_TYPE); | |
2122 | for (wordP = words; prec--;) | |
2123 | { | |
125f0b0d | 2124 | md_number_to_chars (litP, (valueT) (*wordP++), sizeof (LITTLENUM_TYPE)); |
355afbcd KR |
2125 | litP += sizeof (LITTLENUM_TYPE); |
2126 | } | |
ed9638af KR |
2127 | return 0; |
2128 | } | |
fecd2382 RP |
2129 | |
2130 | /* | |
2131 | * Write out big-endian. | |
2132 | */ | |
355afbcd KR |
2133 | void |
2134 | md_number_to_chars (buf, val, n) | |
2135 | char *buf; | |
125f0b0d | 2136 | valueT val; |
355afbcd | 2137 | int n; |
fecd2382 | 2138 | { |
c999fd9f KR |
2139 | number_to_chars_bigendian (buf, val, n); |
2140 | } | |
fecd2382 RP |
2141 | |
2142 | /* Apply a fixS to the frags, now that we know the value it ought to | |
2143 | hold. */ | |
2144 | ||
428d312b | 2145 | int |
428d312b | 2146 | md_apply_fix (fixP, value) |
355afbcd | 2147 | fixS *fixP; |
125f0b0d | 2148 | valueT *value; |
fecd2382 | 2149 | { |
355afbcd | 2150 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; |
125f0b0d | 2151 | offsetT val; |
428d312b | 2152 | |
428d312b | 2153 | val = *value; |
355afbcd | 2154 | |
428d312b | 2155 | assert (fixP->fx_r_type < BFD_RELOC_UNUSED); |
355afbcd KR |
2156 | |
2157 | fixP->fx_addnumber = val; /* Remember value for emit_reloc */ | |
2158 | ||
7766838e ILT |
2159 | #ifdef OBJ_ELF |
2160 | /* FIXME: SPARC ELF relocations don't use an addend in the data | |
2161 | field itself. This whole approach should be somehow combined | |
a7aa7a2b ILT |
2162 | with the calls to bfd_perform_relocation. Also, the value passed |
2163 | in by fixup_segment includes the value of a defined symbol. We | |
2164 | don't want to include the value of an externally visible symbol. */ | |
7766838e | 2165 | if (fixP->fx_addsy != NULL) |
a7aa7a2b | 2166 | { |
21965655 ILT |
2167 | if ((S_IS_EXTERNAL (fixP->fx_addsy) |
2168 | || S_IS_WEAK (fixP->fx_addsy) | |
4c67b523 | 2169 | || (sparc_pic_code && ! fixP->fx_pcrel)) |
a7aa7a2b ILT |
2170 | && S_GET_SEGMENT (fixP->fx_addsy) != absolute_section |
2171 | && S_GET_SEGMENT (fixP->fx_addsy) != undefined_section | |
2172 | && ! bfd_is_com_section (S_GET_SEGMENT (fixP->fx_addsy))) | |
2173 | fixP->fx_addnumber -= S_GET_VALUE (fixP->fx_addsy); | |
2174 | return 1; | |
2175 | } | |
7766838e ILT |
2176 | #endif |
2177 | ||
c999fd9f KR |
2178 | /* This is a hack. There should be a better way to |
2179 | handle this. Probably in terms of howto fields, once | |
2180 | we can look at these fixups in terms of howtos. */ | |
428d312b | 2181 | if (fixP->fx_r_type == BFD_RELOC_32_PCREL_S2 && fixP->fx_addsy) |
c999fd9f | 2182 | val += fixP->fx_where + fixP->fx_frag->fr_address; |
355afbcd | 2183 | |
ade614d5 KR |
2184 | #ifdef OBJ_AOUT |
2185 | /* FIXME: More ridiculous gas reloc hacking. If we are going to | |
2186 | generate a reloc, then we just want to let the reloc addend set | |
2187 | the value. We do not want to also stuff the addend into the | |
2188 | object file. Including the addend in the object file works when | |
2189 | doing a static link, because the linker will ignore the object | |
2190 | file contents. However, the dynamic linker does not ignore the | |
2191 | object file contents. */ | |
2192 | if (fixP->fx_addsy != NULL | |
2193 | && fixP->fx_r_type != BFD_RELOC_32_PCREL_S2) | |
2194 | val = 0; | |
4c67b523 ILT |
2195 | |
2196 | /* When generating PIC code, we do not want an addend for a reloc | |
2197 | against a local symbol. We adjust fx_addnumber to cancel out the | |
2198 | value already included in val, and to also cancel out the | |
2199 | adjustment which bfd_install_relocation will create. */ | |
2200 | if (sparc_pic_code | |
2201 | && fixP->fx_r_type != BFD_RELOC_32_PCREL_S2 | |
2202 | && fixP->fx_addsy != NULL | |
2203 | && ! S_IS_COMMON (fixP->fx_addsy) | |
2204 | && (fixP->fx_addsy->bsym->flags & BSF_SECTION_SYM) == 0) | |
2205 | fixP->fx_addnumber -= 2 * S_GET_VALUE (fixP->fx_addsy); | |
ade614d5 KR |
2206 | #endif |
2207 | ||
355afbcd KR |
2208 | switch (fixP->fx_r_type) |
2209 | { | |
58d4951d ILT |
2210 | case BFD_RELOC_16: |
2211 | buf[0] = val >> 8; | |
2212 | buf[1] = val; | |
2213 | break; | |
2214 | ||
428d312b | 2215 | case BFD_RELOC_32: |
92421122 KR |
2216 | buf[0] = val >> 24; |
2217 | buf[1] = val >> 16; | |
2218 | buf[2] = val >> 8; | |
2219 | buf[3] = val; | |
355afbcd KR |
2220 | break; |
2221 | ||
428d312b | 2222 | case BFD_RELOC_32_PCREL_S2: |
8dd07a84 ILT |
2223 | val = val >> 2; |
2224 | /* FIXME: This increment-by-one deserves a comment of why it's | |
2225 | being done! */ | |
4c67b523 ILT |
2226 | if (! sparc_pic_code |
2227 | || fixP->fx_addsy == NULL | |
2228 | || (fixP->fx_addsy->bsym->flags & BSF_SECTION_SYM) != 0) | |
2229 | ++val; | |
355afbcd | 2230 | buf[0] |= (val >> 24) & 0x3f; |
8dd07a84 | 2231 | buf[1] = val >> 16; |
355afbcd KR |
2232 | buf[2] = val >> 8; |
2233 | buf[3] = val; | |
2234 | break; | |
2235 | ||
693b21e7 | 2236 | case BFD_RELOC_64: |
5e0a90a8 KR |
2237 | { |
2238 | bfd_vma valh = BSR (val, 32); | |
2239 | buf[0] = valh >> 24; | |
2240 | buf[1] = valh >> 16; | |
2241 | buf[2] = valh >> 8; | |
2242 | buf[3] = valh; | |
2243 | buf[4] = val >> 24; | |
2244 | buf[5] = val >> 16; | |
2245 | buf[6] = val >> 8; | |
2246 | buf[7] = val; | |
2247 | } | |
693b21e7 KR |
2248 | break; |
2249 | ||
125f0b0d | 2250 | case BFD_RELOC_SPARC_11: |
8dd07a84 ILT |
2251 | if (! in_signed_range (val, 0x7ff)) |
2252 | as_bad ("relocation overflow."); | |
355afbcd KR |
2253 | |
2254 | buf[2] |= (val >> 8) & 0x7; | |
8dd07a84 | 2255 | buf[3] = val; |
355afbcd KR |
2256 | break; |
2257 | ||
125f0b0d | 2258 | case BFD_RELOC_SPARC_10: |
8dd07a84 ILT |
2259 | if (! in_signed_range (val, 0x3ff)) |
2260 | as_bad ("relocation overflow."); | |
355afbcd KR |
2261 | |
2262 | buf[2] |= (val >> 8) & 0x3; | |
8dd07a84 ILT |
2263 | buf[3] = val; |
2264 | break; | |
2265 | ||
2266 | case BFD_RELOC_SPARC_6: | |
2267 | if (! in_bitfield_range (val, 0x3f)) | |
2268 | as_bad ("relocation overflow."); | |
2269 | ||
2270 | buf[3] |= val & 0x3f; | |
2271 | break; | |
2272 | ||
2273 | case BFD_RELOC_SPARC_5: | |
2274 | if (! in_bitfield_range (val, 0x1f)) | |
2275 | as_bad ("relocation overflow."); | |
2276 | ||
2277 | buf[3] |= val & 0x1f; | |
355afbcd KR |
2278 | break; |
2279 | ||
125f0b0d | 2280 | case BFD_RELOC_SPARC_WDISP16: |
8dd07a84 | 2281 | /* FIXME: simplify */ |
355afbcd KR |
2282 | if (((val > 0) && (val & ~0x3fffc)) |
2283 | || ((val < 0) && (~(val - 1) & ~0x3fffc))) | |
2284 | { | |
2285 | as_bad ("relocation overflow."); | |
8dd07a84 | 2286 | } |
355afbcd | 2287 | |
8dd07a84 ILT |
2288 | /* FIXME: The +1 deserves a comment. */ |
2289 | val = (val >> 2) + 1; | |
8fc0776d | 2290 | buf[1] |= ((val >> 14) & 0x3) << 4; |
355afbcd | 2291 | buf[2] |= (val >> 8) & 0x3f; |
8dd07a84 | 2292 | buf[3] = val; |
355afbcd KR |
2293 | break; |
2294 | ||
125f0b0d | 2295 | case BFD_RELOC_SPARC_WDISP19: |
8dd07a84 | 2296 | /* FIXME: simplify */ |
355afbcd KR |
2297 | if (((val > 0) && (val & ~0x1ffffc)) |
2298 | || ((val < 0) && (~(val - 1) & ~0x1ffffc))) | |
2299 | { | |
2300 | as_bad ("relocation overflow."); | |
8dd07a84 | 2301 | } |
355afbcd | 2302 | |
8dd07a84 ILT |
2303 | /* FIXME: The +1 deserves a comment. */ |
2304 | val = (val >> 2) + 1; | |
355afbcd KR |
2305 | buf[1] |= (val >> 16) & 0x7; |
2306 | buf[2] = (val >> 8) & 0xff; | |
8dd07a84 | 2307 | buf[3] = val; |
355afbcd KR |
2308 | break; |
2309 | ||
125f0b0d | 2310 | case BFD_RELOC_SPARC_HH22: |
5e0a90a8 | 2311 | val = BSR (val, 32); |
355afbcd | 2312 | /* intentional fallthrough */ |
355afbcd | 2313 | |
125f0b0d | 2314 | case BFD_RELOC_SPARC_LM22: |
428d312b | 2315 | case BFD_RELOC_HI22: |
355afbcd KR |
2316 | if (!fixP->fx_addsy) |
2317 | { | |
2318 | buf[1] |= (val >> 26) & 0x3f; | |
2319 | buf[2] = val >> 18; | |
2320 | buf[3] = val >> 10; | |
2321 | } | |
2322 | else | |
2323 | { | |
2324 | buf[2] = 0; | |
2325 | buf[3] = 0; | |
2326 | } | |
2327 | break; | |
2328 | ||
428d312b | 2329 | case BFD_RELOC_SPARC22: |
355afbcd KR |
2330 | if (val & ~0x003fffff) |
2331 | { | |
2332 | as_bad ("relocation overflow"); | |
2333 | } /* on overflow */ | |
2334 | buf[1] |= (val >> 16) & 0x3f; | |
2335 | buf[2] = val >> 8; | |
8dd07a84 | 2336 | buf[3] = val; |
355afbcd KR |
2337 | break; |
2338 | ||
125f0b0d | 2339 | case BFD_RELOC_SPARC_HM10: |
5e0a90a8 | 2340 | val = BSR (val, 32); |
355afbcd | 2341 | /* intentional fallthrough */ |
355afbcd | 2342 | |
428d312b | 2343 | case BFD_RELOC_LO10: |
355afbcd KR |
2344 | if (!fixP->fx_addsy) |
2345 | { | |
2346 | buf[2] |= (val >> 8) & 0x03; | |
2347 | buf[3] = val; | |
2348 | } | |
2349 | else | |
2350 | buf[3] = 0; | |
2351 | break; | |
7ab2e983 ILT |
2352 | |
2353 | case BFD_RELOC_SPARC13: | |
2354 | if (! in_signed_range (val, 0x1fff)) | |
2355 | as_bad ("relocation overflow"); | |
2356 | ||
355afbcd KR |
2357 | buf[2] |= (val >> 8) & 0x1f; |
2358 | buf[3] = val; | |
2359 | break; | |
2360 | ||
428d312b | 2361 | case BFD_RELOC_SPARC_WDISP22: |
5e0a90a8 | 2362 | val = (val >> 2) + 1; |
355afbcd | 2363 | /* FALLTHROUGH */ |
428d312b | 2364 | case BFD_RELOC_SPARC_BASE22: |
355afbcd KR |
2365 | buf[1] |= (val >> 16) & 0x3f; |
2366 | buf[2] = val >> 8; | |
2367 | buf[3] = val; | |
2368 | break; | |
2369 | ||
428d312b | 2370 | case BFD_RELOC_NONE: |
355afbcd | 2371 | default: |
428d312b | 2372 | as_bad ("bad or unhandled relocation type: 0x%02x", fixP->fx_r_type); |
355afbcd KR |
2373 | break; |
2374 | } | |
428d312b | 2375 | |
7ab2e983 ILT |
2376 | /* Are we finished with this relocation now? */ |
2377 | if (fixP->fx_addsy == 0 && !fixP->fx_pcrel) | |
2378 | fixP->fx_done = 1; | |
2379 | ||
428d312b | 2380 | return 1; |
428d312b | 2381 | } |
fecd2382 | 2382 | |
428d312b KR |
2383 | /* Translate internal representation of relocation info to BFD target |
2384 | format. */ | |
2385 | arelent * | |
2386 | tc_gen_reloc (section, fixp) | |
2387 | asection *section; | |
2388 | fixS *fixp; | |
2389 | { | |
2390 | arelent *reloc; | |
2391 | bfd_reloc_code_real_type code; | |
2392 | ||
2393 | reloc = (arelent *) bfd_alloc_by_size_t (stdoutput, sizeof (arelent)); | |
2394 | assert (reloc != 0); | |
2395 | ||
2396 | reloc->sym_ptr_ptr = &fixp->fx_addsy->bsym; | |
2397 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
428d312b | 2398 | |
428d312b KR |
2399 | switch (fixp->fx_r_type) |
2400 | { | |
58d4951d | 2401 | case BFD_RELOC_16: |
428d312b KR |
2402 | case BFD_RELOC_32: |
2403 | case BFD_RELOC_HI22: | |
2404 | case BFD_RELOC_LO10: | |
2405 | case BFD_RELOC_32_PCREL_S2: | |
7ab2e983 | 2406 | case BFD_RELOC_SPARC13: |
428d312b | 2407 | case BFD_RELOC_SPARC_BASE13: |
a7aa7a2b ILT |
2408 | case BFD_RELOC_SPARC_WDISP16: |
2409 | case BFD_RELOC_SPARC_WDISP19: | |
ed9638af | 2410 | case BFD_RELOC_SPARC_WDISP22: |
693b21e7 | 2411 | case BFD_RELOC_64: |
8dd07a84 ILT |
2412 | case BFD_RELOC_SPARC_5: |
2413 | case BFD_RELOC_SPARC_6: | |
125f0b0d KR |
2414 | case BFD_RELOC_SPARC_10: |
2415 | case BFD_RELOC_SPARC_11: | |
2416 | case BFD_RELOC_SPARC_HH22: | |
2417 | case BFD_RELOC_SPARC_HM10: | |
2418 | case BFD_RELOC_SPARC_LM22: | |
2419 | case BFD_RELOC_SPARC_PC_HH22: | |
2420 | case BFD_RELOC_SPARC_PC_HM10: | |
2421 | case BFD_RELOC_SPARC_PC_LM22: | |
428d312b KR |
2422 | code = fixp->fx_r_type; |
2423 | break; | |
2424 | default: | |
2425 | abort (); | |
2426 | } | |
4c67b523 ILT |
2427 | |
2428 | #if defined (OBJ_ELF) || defined (OBJ_AOUT) | |
2429 | /* If we are generating PIC code, we need to generate a different | |
2430 | set of relocs. */ | |
2431 | ||
2432 | #ifdef OBJ_ELF | |
2433 | #define GOT_NAME "_GLOBAL_OFFSET_TABLE_" | |
2434 | #else | |
2435 | #define GOT_NAME "__GLOBAL_OFFSET_TABLE_" | |
2436 | #endif | |
2437 | ||
2438 | if (sparc_pic_code) | |
2439 | { | |
2440 | switch (code) | |
2441 | { | |
2442 | case BFD_RELOC_32_PCREL_S2: | |
2443 | if (! S_IS_DEFINED (fixp->fx_addsy) | |
21965655 ILT |
2444 | || S_IS_EXTERNAL (fixp->fx_addsy) |
2445 | || S_IS_WEAK (fixp->fx_addsy)) | |
4c67b523 ILT |
2446 | code = BFD_RELOC_SPARC_WPLT30; |
2447 | break; | |
2448 | case BFD_RELOC_HI22: | |
2449 | if (fixp->fx_addsy != NULL | |
2450 | && strcmp (S_GET_NAME (fixp->fx_addsy), GOT_NAME) == 0) | |
2451 | code = BFD_RELOC_SPARC_PC22; | |
2452 | else | |
2453 | code = BFD_RELOC_SPARC_GOT22; | |
2454 | break; | |
2455 | case BFD_RELOC_LO10: | |
2456 | if (fixp->fx_addsy != NULL | |
2457 | && strcmp (S_GET_NAME (fixp->fx_addsy), GOT_NAME) == 0) | |
2458 | code = BFD_RELOC_SPARC_PC10; | |
2459 | else | |
2460 | code = BFD_RELOC_SPARC_GOT10; | |
2461 | break; | |
2462 | case BFD_RELOC_SPARC13: | |
2463 | code = BFD_RELOC_SPARC_GOT13; | |
2464 | break; | |
2465 | default: | |
2466 | break; | |
2467 | } | |
2468 | } | |
2469 | #endif /* defined (OBJ_ELF) || defined (OBJ_AOUT) */ | |
2470 | ||
428d312b | 2471 | reloc->howto = bfd_reloc_type_lookup (stdoutput, code); |
a7129c48 KR |
2472 | if (reloc->howto == 0) |
2473 | { | |
2474 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
ade614d5 KR |
2475 | "internal error: can't export reloc type %d (`%s')", |
2476 | fixp->fx_r_type, bfd_get_reloc_code_name (code)); | |
a7129c48 KR |
2477 | return 0; |
2478 | } | |
c999fd9f KR |
2479 | |
2480 | /* @@ Why fx_addnumber sometimes and fx_offset other times? */ | |
a7aa7a2b ILT |
2481 | #ifdef OBJ_AOUT |
2482 | ||
4c67b523 ILT |
2483 | if (reloc->howto->pc_relative == 0 |
2484 | || code == BFD_RELOC_SPARC_PC10 | |
2485 | || code == BFD_RELOC_SPARC_PC22) | |
a7aa7a2b ILT |
2486 | reloc->addend = fixp->fx_addnumber; |
2487 | else | |
2488 | reloc->addend = fixp->fx_offset - reloc->address; | |
2489 | ||
2490 | #else /* elf or coff */ | |
2491 | ||
4c67b523 ILT |
2492 | if (reloc->howto->pc_relative == 0 |
2493 | || code == BFD_RELOC_SPARC_PC10 | |
2494 | || code == BFD_RELOC_SPARC_PC22) | |
c999fd9f | 2495 | reloc->addend = fixp->fx_addnumber; |
7ab2e983 ILT |
2496 | else if ((fixp->fx_addsy->bsym->flags & BSF_SECTION_SYM) != 0) |
2497 | reloc->addend = (section->vma | |
2498 | + fixp->fx_addnumber | |
2499 | + md_pcrel_from (fixp)); | |
c999fd9f | 2500 | else |
a7aa7a2b | 2501 | reloc->addend = fixp->fx_offset; |
a7aa7a2b | 2502 | #endif |
428d312b KR |
2503 | |
2504 | return reloc; | |
2505 | } | |
2506 | ||
fecd2382 RP |
2507 | |
2508 | #if 0 | |
2509 | /* for debugging only */ | |
355afbcd KR |
2510 | static void |
2511 | print_insn (insn) | |
2512 | struct sparc_it *insn; | |
fecd2382 | 2513 | { |
c999fd9f | 2514 | const char *const Reloc[] = { |
355afbcd KR |
2515 | "RELOC_8", |
2516 | "RELOC_16", | |
2517 | "RELOC_32", | |
2518 | "RELOC_DISP8", | |
2519 | "RELOC_DISP16", | |
2520 | "RELOC_DISP32", | |
2521 | "RELOC_WDISP30", | |
2522 | "RELOC_WDISP22", | |
2523 | "RELOC_HI22", | |
2524 | "RELOC_22", | |
2525 | "RELOC_13", | |
2526 | "RELOC_LO10", | |
2527 | "RELOC_SFA_BASE", | |
2528 | "RELOC_SFA_OFF13", | |
2529 | "RELOC_BASE10", | |
2530 | "RELOC_BASE13", | |
2531 | "RELOC_BASE22", | |
2532 | "RELOC_PC10", | |
2533 | "RELOC_PC22", | |
2534 | "RELOC_JMP_TBL", | |
2535 | "RELOC_SEGOFF16", | |
2536 | "RELOC_GLOB_DAT", | |
2537 | "RELOC_JMP_SLOT", | |
2538 | "RELOC_RELATIVE", | |
2539 | "NO_RELOC" | |
2540 | }; | |
2541 | ||
2542 | if (insn->error) | |
c999fd9f | 2543 | fprintf (stderr, "ERROR: %s\n"); |
355afbcd KR |
2544 | fprintf (stderr, "opcode=0x%08x\n", insn->opcode); |
2545 | fprintf (stderr, "reloc = %s\n", Reloc[insn->reloc]); | |
2546 | fprintf (stderr, "exp = {\n"); | |
2547 | fprintf (stderr, "\t\tX_add_symbol = %s\n", | |
2548 | ((insn->exp.X_add_symbol != NULL) | |
2549 | ? ((S_GET_NAME (insn->exp.X_add_symbol) != NULL) | |
2550 | ? S_GET_NAME (insn->exp.X_add_symbol) | |
2551 | : "???") | |
2552 | : "0")); | |
2553 | fprintf (stderr, "\t\tX_sub_symbol = %s\n", | |
5ac34ac3 ILT |
2554 | ((insn->exp.X_op_symbol != NULL) |
2555 | ? (S_GET_NAME (insn->exp.X_op_symbol) | |
2556 | ? S_GET_NAME (insn->exp.X_op_symbol) | |
355afbcd KR |
2557 | : "???") |
2558 | : "0")); | |
2559 | fprintf (stderr, "\t\tX_add_number = %d\n", | |
2560 | insn->exp.X_add_number); | |
2561 | fprintf (stderr, "}\n"); | |
c999fd9f | 2562 | } |
fecd2382 | 2563 | #endif |
f3d817d8 | 2564 | \f |
839df5c3 RP |
2565 | /* |
2566 | * md_parse_option | |
2567 | * Invocation line includes a switch not recognized by the base assembler. | |
2568 | * See if it's a processor-specific option. These are: | |
2569 | * | |
2570 | * -bump | |
2571 | * Warn on architecture bumps. See also -A. | |
2572 | * | |
e70ad5d5 DE |
2573 | * -Av6, -Av7, -Av8, -Av9, -Av9a, -Asparclite |
2574 | * -xarch=v8plus, -xarch=v8plusa | |
839df5c3 RP |
2575 | * Select the architecture. Instructions or features not |
2576 | * supported by the selected architecture cause fatal errors. | |
2577 | * | |
2578 | * The default is to start at v6, and bump the architecture up | |
e70ad5d5 DE |
2579 | * whenever an instruction is seen at a higher level. If 32 bit |
2580 | * environments, v9 is not bumped up to, the user must pass -Av9. | |
2581 | * | |
2582 | * -xarch=v8plus{,a} is for compatibility with the Sun assembler. | |
839df5c3 RP |
2583 | * |
2584 | * If -bump is specified, a warning is printing when bumping to | |
2585 | * higher levels. | |
2586 | * | |
2587 | * If an architecture is specified, all instructions must match | |
2588 | * that architecture. Any higher level instructions are flagged | |
e70ad5d5 DE |
2589 | * as errors. Note that in the 32 bit environment specifying |
2590 | * -Av9 does not automatically create a v9 object file, a v9 | |
2591 | * insn must be seen. | |
839df5c3 | 2592 | * |
6df07e7f | 2593 | * If both an architecture and -bump are specified, the |
839df5c3 | 2594 | * architecture starts at the specified level, but bumps are |
e70ad5d5 DE |
2595 | * warnings. Note that we can't set `current_architecture' to |
2596 | * the requested level in this case: in the 32 bit environment, | |
2597 | * we still must avoid creating v9 object files unless v9 insns | |
2598 | * are seen. | |
839df5c3 | 2599 | * |
162e3485 | 2600 | * Note: |
680227f3 KR |
2601 | * Bumping between incompatible architectures is always an |
2602 | * error. For example, from sparclite to v9. | |
839df5c3 | 2603 | */ |
162e3485 | 2604 | |
f3d817d8 | 2605 | #ifdef OBJ_ELF |
a7aa7a2b | 2606 | CONST char *md_shortopts = "A:K:VQ:sq"; |
f3d817d8 | 2607 | #else |
4c67b523 ILT |
2608 | #ifdef OBJ_AOUT |
2609 | CONST char *md_shortopts = "A:k"; | |
2610 | #else | |
f3d817d8 DM |
2611 | CONST char *md_shortopts = "A:"; |
2612 | #endif | |
4c67b523 | 2613 | #endif |
f3d817d8 DM |
2614 | struct option md_longopts[] = { |
2615 | #define OPTION_BUMP (OPTION_MD_BASE) | |
2616 | {"bump", no_argument, NULL, OPTION_BUMP}, | |
2617 | #define OPTION_SPARC (OPTION_MD_BASE + 1) | |
2618 | {"sparc", no_argument, NULL, OPTION_SPARC}, | |
e70ad5d5 DE |
2619 | #define OPTION_XARCH (OPTION_MD_BASE + 2) |
2620 | {"xarch", required_argument, NULL, OPTION_XARCH}, | |
f3d817d8 DM |
2621 | {NULL, no_argument, NULL, 0} |
2622 | }; | |
2623 | size_t md_longopts_size = sizeof(md_longopts); | |
355afbcd | 2624 | |
f3d817d8 DM |
2625 | int |
2626 | md_parse_option (c, arg) | |
2627 | int c; | |
2628 | char *arg; | |
2629 | { | |
2630 | switch (c) | |
355afbcd | 2631 | { |
f3d817d8 | 2632 | case OPTION_BUMP: |
355afbcd | 2633 | warn_on_bump = 1; |
e70ad5d5 | 2634 | warn_after_architecture = SPARC_OPCODE_ARCH_V6; |
f3d817d8 | 2635 | break; |
355afbcd | 2636 | |
e70ad5d5 DE |
2637 | case OPTION_XARCH: |
2638 | /* ??? We could add v8plus and v8plusa to sparc_opcode_archs. | |
2639 | But we might want v8plus to mean something different than v9 | |
2640 | someday, and we'd recognize more -xarch options than Sun's | |
2641 | assembler does (which may lead to a conflict someday). */ | |
2642 | if (strcmp (arg, "v8plus") == 0) | |
2643 | arg = "v9"; | |
2644 | else if (strcmp (arg, "v8plusa") == 0) | |
2645 | arg = "v9a"; | |
2646 | else | |
2647 | { | |
2648 | as_bad ("invalid architecture -xarch=%s", arg); | |
2649 | return 0; | |
2650 | } | |
2651 | ||
2652 | /* fall through */ | |
2653 | ||
f3d817d8 DM |
2654 | case 'A': |
2655 | { | |
e70ad5d5 | 2656 | enum sparc_opcode_arch_val new_arch = sparc_opcode_lookup_arch (arg); |
f3d817d8 | 2657 | |
e70ad5d5 | 2658 | if (new_arch == SPARC_OPCODE_ARCH_BAD) |
f3d817d8 | 2659 | { |
e70ad5d5 | 2660 | as_bad ("invalid architecture -A%s", arg); |
f3d817d8 DM |
2661 | return 0; |
2662 | } | |
2663 | else | |
2664 | { | |
e70ad5d5 | 2665 | max_architecture = new_arch; |
f3d817d8 DM |
2666 | architecture_requested = 1; |
2667 | } | |
2668 | } | |
2669 | break; | |
2670 | ||
2671 | case OPTION_SPARC: | |
2672 | /* Ignore -sparc, used by SunOS make default .s.o rule. */ | |
2673 | break; | |
355afbcd | 2674 | |
4c67b523 ILT |
2675 | #ifdef OBJ_AOUT |
2676 | case 'k': | |
2677 | sparc_pic_code = 1; | |
2678 | break; | |
2679 | #endif | |
2680 | ||
ed9638af | 2681 | #ifdef OBJ_ELF |
f3d817d8 | 2682 | case 'V': |
ed9638af | 2683 | print_version_id (); |
f3d817d8 DM |
2684 | break; |
2685 | ||
2686 | case 'Q': | |
ed9638af KR |
2687 | /* Qy - do emit .comment |
2688 | Qn - do not emit .comment */ | |
f3d817d8 DM |
2689 | break; |
2690 | ||
2691 | case 's': | |
ed9638af | 2692 | /* use .stab instead of .stab.excl */ |
f3d817d8 DM |
2693 | break; |
2694 | ||
2695 | case 'q': | |
c06e55d9 | 2696 | /* quick -- native assembler does fewer checks */ |
f3d817d8 | 2697 | break; |
a7aa7a2b ILT |
2698 | |
2699 | case 'K': | |
2700 | if (strcmp (arg, "PIC") != 0) | |
2701 | as_warn ("Unrecognized option following -K"); | |
2702 | else | |
4c67b523 ILT |
2703 | sparc_pic_code = 1; |
2704 | break; | |
ed9638af | 2705 | #endif |
f3d817d8 DM |
2706 | |
2707 | default: | |
355afbcd KR |
2708 | return 0; |
2709 | } | |
fecd2382 | 2710 | |
e70ad5d5 | 2711 | return 1; |
f3d817d8 DM |
2712 | } |
2713 | ||
2714 | void | |
2715 | md_show_usage (stream) | |
2716 | FILE *stream; | |
2717 | { | |
e70ad5d5 DE |
2718 | const struct sparc_opcode_arch *arch; |
2719 | ||
5e0a90a8 | 2720 | fprintf(stream, "SPARC options:\n"); |
e70ad5d5 | 2721 | for (arch = &sparc_opcode_archs[0]; arch->name; arch++) |
5e0a90a8 | 2722 | { |
e70ad5d5 | 2723 | if (arch != &sparc_opcode_archs[0]) |
5e0a90a8 | 2724 | fprintf (stream, " | "); |
e70ad5d5 | 2725 | fprintf (stream, "-A%s", arch->name); |
5e0a90a8 | 2726 | } |
e70ad5d5 DE |
2727 | fprintf (stream, "\n-xarch=v8plus | -xarch=v8plusa\n"); |
2728 | fprintf (stream, "\ | |
f3d817d8 DM |
2729 | specify variant of SPARC architecture\n\ |
2730 | -bump warn when assembler switches architectures\n\ | |
2731 | -sparc ignored\n"); | |
4c67b523 ILT |
2732 | #ifdef OBJ_AOUT |
2733 | fprintf (stream, "\ | |
2734 | -k generate PIC\n"); | |
2735 | #endif | |
f3d817d8 | 2736 | #ifdef OBJ_ELF |
4c67b523 ILT |
2737 | fprintf (stream, "\ |
2738 | -KPIC generate PIC\n\ | |
f3d817d8 DM |
2739 | -V print assembler version number\n\ |
2740 | -q ignored\n\ | |
2741 | -Qy, -Qn ignored\n\ | |
2742 | -s ignored\n"); | |
2743 | #endif | |
2744 | } | |
2745 | \f | |
fecd2382 RP |
2746 | /* We have no need to default values of symbols. */ |
2747 | ||
2748 | /* ARGSUSED */ | |
355afbcd KR |
2749 | symbolS * |
2750 | md_undefined_symbol (name) | |
2751 | char *name; | |
fecd2382 | 2752 | { |
355afbcd KR |
2753 | return 0; |
2754 | } /* md_undefined_symbol() */ | |
fecd2382 | 2755 | |
fecd2382 | 2756 | /* Round up a section size to the appropriate boundary. */ |
125f0b0d | 2757 | valueT |
355afbcd KR |
2758 | md_section_align (segment, size) |
2759 | segT segment; | |
125f0b0d | 2760 | valueT size; |
fecd2382 | 2761 | { |
f9c57637 ILT |
2762 | #ifndef OBJ_ELF |
2763 | /* This is not right for ELF; a.out wants it, and COFF will force | |
2764 | the alignment anyways. */ | |
a7aa7a2b ILT |
2765 | valueT align = ((valueT) 1 |
2766 | << (valueT) bfd_get_section_alignment (stdoutput, segment)); | |
f9c57637 ILT |
2767 | valueT newsize; |
2768 | /* turn alignment value into a mask */ | |
2769 | align--; | |
2770 | newsize = (size + align) & ~align; | |
2771 | return newsize; | |
2772 | #else | |
693b21e7 | 2773 | return size; |
f9c57637 | 2774 | #endif |
428d312b | 2775 | } |
fecd2382 RP |
2776 | |
2777 | /* Exactly what point is a PC-relative offset relative TO? | |
2778 | On the sparc, they're relative to the address of the offset, plus | |
2779 | its size. This gets us to the following instruction. | |
2780 | (??? Is this right? FIXME-SOON) */ | |
355afbcd KR |
2781 | long |
2782 | md_pcrel_from (fixP) | |
2783 | fixS *fixP; | |
fecd2382 | 2784 | { |
4c67b523 ILT |
2785 | long ret; |
2786 | ||
2787 | ret = fixP->fx_where + fixP->fx_frag->fr_address; | |
2788 | if (! sparc_pic_code | |
2789 | || fixP->fx_addsy == NULL | |
2790 | || (fixP->fx_addsy->bsym->flags & BSF_SECTION_SYM) != 0) | |
2791 | ret += fixP->fx_size; | |
2792 | return ret; | |
428d312b | 2793 | } |
fecd2382 | 2794 | |
8b228fe9 | 2795 | /* end of tc-sparc.c */ |