Commit | Line | Data |
---|---|---|
fecd2382 | 1 | /* tc-sparc.c -- Assemble for the SPARC |
6df07e7f | 2 | Copyright (C) 1989, 90-95, 1996 Free Software Foundation, Inc. |
355afbcd | 3 | |
fecd2382 | 4 | This file is part of GAS, the GNU Assembler. |
355afbcd | 5 | |
fecd2382 RP |
6 | GAS is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
6321e9ea | 8 | the Free Software Foundation; either version 2, or (at your option) |
fecd2382 | 9 | any later version. |
355afbcd | 10 | |
fecd2382 RP |
11 | GAS is distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
355afbcd | 15 | |
8dd07a84 ILT |
16 | You should have received a copy of the GNU General Public |
17 | License along with GAS; see the file COPYING. If not, write | |
18 | to the Free Software Foundation, 59 Temple Place - Suite 330, | |
19 | Boston, MA 02111-1307, USA. */ | |
fecd2382 | 20 | |
fecd2382 RP |
21 | #include <stdio.h> |
22 | #include <ctype.h> | |
23 | ||
24 | #include "as.h" | |
7ab2e983 | 25 | #include "subsegs.h" |
fecd2382 RP |
26 | |
27 | /* careful, this file includes data *declarations* */ | |
584a0f78 | 28 | #include "opcode/sparc.h" |
fecd2382 | 29 | |
ed94c2b8 | 30 | static void sparc_ip PARAMS ((char *, const struct sparc_opcode **)); |
fecd2382 | 31 | |
e70ad5d5 DE |
32 | /* Current architecture. We don't bump up unless necessary. */ |
33 | static enum sparc_opcode_arch_val current_architecture = SPARC_OPCODE_ARCH_V6; | |
34 | ||
35 | /* The maximum architecture level we can bump up to. | |
36 | In a 32 bit environment, don't allow bumping up to v9 by default. | |
2b063e6d | 37 | The native assembler works this way. The user is required to pass |
e70ad5d5 DE |
38 | an explicit argument before we'll create v9 object files. However, if |
39 | we don't see any v9 insns, a v9 object file is not created. */ | |
6df07e7f | 40 | #ifdef SPARC_ARCH64 |
e70ad5d5 | 41 | static enum sparc_opcode_arch_val max_architecture = SPARC_OPCODE_ARCH_V9; |
5e0a90a8 | 42 | #else |
d8b42b96 DE |
43 | /* ??? This should be V8, but sparclite support was added by making it the |
44 | default. GCC now passes -Asparclite, so maybe sometime in the future | |
45 | we can set this to V8. */ | |
46 | static enum sparc_opcode_arch_val max_architecture = SPARC_OPCODE_ARCH_SPARCLITE; | |
6df07e7f DE |
47 | #endif |
48 | ||
428d312b KR |
49 | static int architecture_requested; |
50 | static int warn_on_bump; | |
839df5c3 | 51 | |
e70ad5d5 DE |
52 | /* If warn_on_bump and the needed architecture is higher than this |
53 | architecture, issue a warning. */ | |
54 | static enum sparc_opcode_arch_val warn_after_architecture; | |
55 | ||
4c67b523 ILT |
56 | /* Non-zero if we are generating PIC code. */ |
57 | int sparc_pic_code; | |
58 | ||
2b063e6d ILT |
59 | /* Non-zero if we should give an error when misaligned data is seen. */ |
60 | static int enforce_aligned_data; | |
61 | ||
ed9638af KR |
62 | extern int target_big_endian; |
63 | ||
2b063e6d ILT |
64 | /* V9 has big and little endian data, but instructions are always big endian. |
65 | The sparclet has bi-endian support but both data and insns have the same | |
66 | endianness. Global `target_big_endian' is used for data. The following | |
67 | macro is used for instructions. */ | |
68 | #define INSN_BIG_ENDIAN (target_big_endian \ | |
69 | || SPARC_OPCODE_ARCH_V9_P (max_architecture)) | |
70 | ||
fecd2382 | 71 | /* handle of the OPCODE hash table */ |
5e0a90a8 | 72 | static struct hash_control *op_hash; |
fecd2382 | 73 | |
7766838e ILT |
74 | static void s_data1 PARAMS ((void)); |
75 | static void s_seg PARAMS ((int)); | |
76 | static void s_proc PARAMS ((int)); | |
77 | static void s_reserve PARAMS ((int)); | |
78 | static void s_common PARAMS ((int)); | |
8dd07a84 ILT |
79 | static void s_empty PARAMS ((int)); |
80 | static void s_uacons PARAMS ((int)); | |
428d312b | 81 | |
355afbcd KR |
82 | const pseudo_typeS md_pseudo_table[] = |
83 | { | |
84 | {"align", s_align_bytes, 0}, /* Defaulting is invalid (0) */ | |
85 | {"common", s_common, 0}, | |
8dd07a84 | 86 | {"empty", s_empty, 0}, |
355afbcd KR |
87 | {"global", s_globl, 0}, |
88 | {"half", cons, 2}, | |
89 | {"optim", s_ignore, 0}, | |
90 | {"proc", s_proc, 0}, | |
91 | {"reserve", s_reserve, 0}, | |
92 | {"seg", s_seg, 0}, | |
93 | {"skip", s_space, 0}, | |
94 | {"word", cons, 4}, | |
7766838e | 95 | {"xword", cons, 8}, |
2b063e6d ILT |
96 | {"uahalf", s_uacons, 2}, |
97 | {"uaword", s_uacons, 4}, | |
98 | {"uaxword", s_uacons, 8}, | |
693b21e7 | 99 | #ifdef OBJ_ELF |
693b21e7 KR |
100 | /* these are specific to sparc/svr4 */ |
101 | {"pushsection", obj_elf_section, 0}, | |
102 | {"popsection", obj_elf_previous, 0}, | |
2b063e6d ILT |
103 | {"2byte", s_uacons, 2}, |
104 | {"4byte", s_uacons, 4}, | |
105 | {"8byte", s_uacons, 8}, | |
693b21e7 | 106 | #endif |
355afbcd | 107 | {NULL, 0, 0}, |
fecd2382 RP |
108 | }; |
109 | ||
355afbcd | 110 | const int md_reloc_size = 12; /* Size of relocation record */ |
fecd2382 RP |
111 | |
112 | /* This array holds the chars that always start a comment. If the | |
113 | pre-processor is disabled, these aren't very useful */ | |
839df5c3 | 114 | const char comment_chars[] = "!"; /* JF removed '|' from comment_chars */ |
fecd2382 RP |
115 | |
116 | /* This array holds the chars that only start a comment at the beginning of | |
117 | a line. If the line seems to have the form '# 123 filename' | |
118 | .line and .file directives will appear in the pre-processed output */ | |
119 | /* Note that input_file.c hand checks for '#' at the beginning of the | |
120 | first line of the input file. This is because the compiler outputs | |
121 | #NO_APP at the beginning of its output. */ | |
839df5c3 RP |
122 | /* Also note that comments started like this one will always |
123 | work if '/' isn't otherwise defined. */ | |
124 | const char line_comment_chars[] = "#"; | |
fecd2382 | 125 | |
355afbcd KR |
126 | const char line_separator_chars[] = ""; |
127 | ||
fecd2382 | 128 | /* Chars that can be used to separate mant from exp in floating point nums */ |
839df5c3 | 129 | const char EXP_CHARS[] = "eE"; |
fecd2382 RP |
130 | |
131 | /* Chars that mean this number is a floating point constant */ | |
132 | /* As in 0f12.456 */ | |
133 | /* or 0d1.2345e12 */ | |
839df5c3 | 134 | const char FLT_CHARS[] = "rRsSfFdDxXpP"; |
fecd2382 RP |
135 | |
136 | /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be | |
9b6a882e KR |
137 | changed in read.c. Ideally it shouldn't have to know about it at all, |
138 | but nothing is ideal around here. */ | |
fecd2382 RP |
139 | |
140 | static unsigned char octal[256]; | |
58d4951d | 141 | #define isoctal(c) octal[(unsigned char) (c)] |
355afbcd KR |
142 | static unsigned char toHex[256]; |
143 | ||
144 | struct sparc_it | |
145 | { | |
146 | char *error; | |
147 | unsigned long opcode; | |
148 | struct nlist *nlistp; | |
149 | expressionS exp; | |
150 | int pcrel; | |
428d312b | 151 | bfd_reloc_code_real_type reloc; |
428d312b KR |
152 | }; |
153 | ||
154 | struct sparc_it the_insn, set_insn; | |
155 | ||
8dd07a84 ILT |
156 | /* Return non-zero if VAL is in the range -(MAX+1) to MAX. */ |
157 | ||
7ab2e983 ILT |
158 | static INLINE int |
159 | in_signed_range (val, max) | |
160 | bfd_signed_vma val, max; | |
161 | { | |
162 | if (max <= 0) | |
163 | abort (); | |
164 | if (val > max) | |
165 | return 0; | |
166 | if (val < ~max) | |
167 | return 0; | |
168 | return 1; | |
169 | } | |
170 | ||
8dd07a84 ILT |
171 | /* Return non-zero if VAL is in the range -(MAX/2+1) to MAX. |
172 | (e.g. -15 to +31). */ | |
173 | ||
174 | static INLINE int | |
175 | in_bitfield_range (val, max) | |
176 | bfd_signed_vma val, max; | |
177 | { | |
178 | if (max <= 0) | |
179 | abort (); | |
180 | if (val > max) | |
181 | return 0; | |
182 | if (val < ~(max >> 1)) | |
183 | return 0; | |
184 | return 1; | |
185 | } | |
186 | ||
d8b42b96 DE |
187 | static int |
188 | sparc_ffs (mask) | |
189 | unsigned int mask; | |
190 | { | |
191 | int i; | |
192 | ||
193 | if (mask == 0) | |
194 | return -1; | |
195 | ||
196 | for (i = 0; (mask & 1) == 0; ++i) | |
197 | mask >>= 1; | |
198 | return i; | |
199 | } | |
200 | ||
2b063e6d ILT |
201 | /* Implement big shift right. */ |
202 | static bfd_vma | |
203 | BSR (val, amount) | |
204 | bfd_vma val; | |
205 | int amount; | |
206 | { | |
207 | if (sizeof (bfd_vma) <= 4 && amount >= 32) | |
208 | as_fatal ("Support for 64-bit arithmetic not compiled in."); | |
209 | return val >> amount; | |
210 | } | |
211 | ||
fecd2382 | 212 | #if 0 |
428d312b | 213 | static void print_insn PARAMS ((struct sparc_it *insn)); |
fecd2382 | 214 | #endif |
428d312b | 215 | static int getExpression PARAMS ((char *str)); |
a87b3269 | 216 | |
fecd2382 RP |
217 | static char *expr_end; |
218 | static int special_case; | |
219 | ||
220 | /* | |
221 | * Instructions that require wierd handling because they're longer than | |
222 | * 4 bytes. | |
223 | */ | |
224 | #define SPECIAL_CASE_SET 1 | |
2b063e6d ILT |
225 | #define SPECIAL_CASE_SETSW 2 |
226 | #define SPECIAL_CASE_SETX 3 | |
227 | /* FIXME: sparc-opc.c doesn't have necessary "S" trigger to enable this. */ | |
228 | #define SPECIAL_CASE_FDIV 4 | |
229 | ||
230 | /* Bit masks of various insns. */ | |
231 | #define NOP_INSN 0x01000000 | |
232 | #define OR_INSN 0x80100000 | |
233 | #define FMOVS_INSN 0x81A00020 | |
234 | #define SETHI_INSN 0x01000000 | |
235 | #define SLLX_INSN 0x81281000 | |
236 | #define SRA_INSN 0x81380000 | |
fecd2382 | 237 | |
ed94c2b8 ILT |
238 | /* The last instruction to be assembled. */ |
239 | static const struct sparc_opcode *last_insn; | |
240 | ||
fecd2382 RP |
241 | /* |
242 | * sort of like s_lcomm | |
243 | * | |
244 | */ | |
58d4951d | 245 | #ifndef OBJ_ELF |
584a0f78 | 246 | static int max_alignment = 15; |
58d4951d | 247 | #endif |
584a0f78 | 248 | |
355afbcd | 249 | static void |
7766838e ILT |
250 | s_reserve (ignore) |
251 | int ignore; | |
355afbcd KR |
252 | { |
253 | char *name; | |
254 | char *p; | |
255 | char c; | |
256 | int align; | |
257 | int size; | |
258 | int temp; | |
259 | symbolS *symbolP; | |
260 | ||
261 | name = input_line_pointer; | |
262 | c = get_symbol_end (); | |
263 | p = input_line_pointer; | |
264 | *p = c; | |
265 | SKIP_WHITESPACE (); | |
266 | ||
267 | if (*input_line_pointer != ',') | |
268 | { | |
269 | as_bad ("Expected comma after name"); | |
270 | ignore_rest_of_line (); | |
271 | return; | |
272 | } | |
273 | ||
274 | ++input_line_pointer; | |
275 | ||
276 | if ((size = get_absolute_expression ()) < 0) | |
277 | { | |
278 | as_bad ("BSS length (%d.) <0! Ignored.", size); | |
279 | ignore_rest_of_line (); | |
280 | return; | |
281 | } /* bad length */ | |
282 | ||
283 | *p = 0; | |
284 | symbolP = symbol_find_or_make (name); | |
285 | *p = c; | |
286 | ||
125f0b0d KR |
287 | if (strncmp (input_line_pointer, ",\"bss\"", 6) != 0 |
288 | && strncmp (input_line_pointer, ",\".bss\"", 7) != 0) | |
355afbcd | 289 | { |
5e0a90a8 | 290 | as_bad ("bad .reserve segment -- expected BSS segment"); |
355afbcd | 291 | return; |
9b6a882e | 292 | } |
355afbcd | 293 | |
125f0b0d KR |
294 | if (input_line_pointer[2] == '.') |
295 | input_line_pointer += 7; | |
296 | else | |
297 | input_line_pointer += 6; | |
355afbcd KR |
298 | SKIP_WHITESPACE (); |
299 | ||
300 | if (*input_line_pointer == ',') | |
301 | { | |
302 | ++input_line_pointer; | |
303 | ||
304 | SKIP_WHITESPACE (); | |
305 | if (*input_line_pointer == '\n') | |
306 | { | |
307 | as_bad ("Missing alignment"); | |
308 | return; | |
309 | } | |
310 | ||
311 | align = get_absolute_expression (); | |
58d4951d | 312 | #ifndef OBJ_ELF |
355afbcd KR |
313 | if (align > max_alignment) |
314 | { | |
315 | align = max_alignment; | |
316 | as_warn ("Alignment too large: %d. assumed.", align); | |
317 | } | |
58d4951d ILT |
318 | #endif |
319 | if (align < 0) | |
355afbcd KR |
320 | { |
321 | align = 0; | |
322 | as_warn ("Alignment negative. 0 assumed."); | |
fecd2382 | 323 | } |
428d312b KR |
324 | |
325 | record_alignment (bss_section, align); | |
355afbcd KR |
326 | |
327 | /* convert to a power of 2 alignment */ | |
328 | for (temp = 0; (align & 1) == 0; align >>= 1, ++temp);; | |
329 | ||
330 | if (align != 1) | |
331 | { | |
332 | as_bad ("Alignment not a power of 2"); | |
333 | ignore_rest_of_line (); | |
334 | return; | |
335 | } /* not a power of two */ | |
336 | ||
337 | align = temp; | |
355afbcd | 338 | } /* if has optional alignment */ |
428d312b KR |
339 | else |
340 | align = 0; | |
355afbcd | 341 | |
a0eb1c2c | 342 | if (!S_IS_DEFINED (symbolP) |
125f0b0d KR |
343 | #ifdef OBJ_AOUT |
344 | && S_GET_OTHER (symbolP) == 0 | |
355afbcd | 345 | && S_GET_DESC (symbolP) == 0 |
125f0b0d KR |
346 | #endif |
347 | ) | |
355afbcd | 348 | { |
428d312b KR |
349 | if (! need_pass_2) |
350 | { | |
7766838e | 351 | char *pfrag; |
428d312b KR |
352 | segT current_seg = now_seg; |
353 | subsegT current_subseg = now_subseg; | |
354 | ||
355 | subseg_set (bss_section, 1); /* switch to bss */ | |
356 | ||
357 | if (align) | |
358 | frag_align (align, 0); /* do alignment */ | |
359 | ||
360 | /* detach from old frag */ | |
361 | if (S_GET_SEGMENT(symbolP) == bss_section) | |
362 | symbolP->sy_frag->fr_symbol = NULL; | |
363 | ||
364 | symbolP->sy_frag = frag_now; | |
7766838e ILT |
365 | pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, symbolP, |
366 | size, (char *)0); | |
367 | *pfrag = 0; | |
428d312b KR |
368 | |
369 | S_SET_SEGMENT (symbolP, bss_section); | |
370 | ||
371 | subseg_set (current_seg, current_subseg); | |
372 | } | |
355afbcd KR |
373 | } |
374 | else | |
375 | { | |
a0eb1c2c ILT |
376 | as_warn("Ignoring attempt to re-define symbol %s", |
377 | S_GET_NAME (symbolP)); | |
355afbcd KR |
378 | } /* if not redefining */ |
379 | ||
380 | demand_empty_rest_of_line (); | |
428d312b | 381 | } |
355afbcd KR |
382 | |
383 | static void | |
7766838e ILT |
384 | s_common (ignore) |
385 | int ignore; | |
355afbcd | 386 | { |
ed9638af KR |
387 | char *name; |
388 | char c; | |
389 | char *p; | |
390 | int temp, size; | |
391 | symbolS *symbolP; | |
355afbcd KR |
392 | |
393 | name = input_line_pointer; | |
394 | c = get_symbol_end (); | |
395 | /* just after name is now '\0' */ | |
396 | p = input_line_pointer; | |
397 | *p = c; | |
398 | SKIP_WHITESPACE (); | |
399 | if (*input_line_pointer != ',') | |
400 | { | |
401 | as_bad ("Expected comma after symbol-name"); | |
402 | ignore_rest_of_line (); | |
403 | return; | |
404 | } | |
405 | input_line_pointer++; /* skip ',' */ | |
406 | if ((temp = get_absolute_expression ()) < 0) | |
407 | { | |
408 | as_bad (".COMMon length (%d.) <0! Ignored.", temp); | |
409 | ignore_rest_of_line (); | |
410 | return; | |
411 | } | |
ed9638af | 412 | size = temp; |
355afbcd KR |
413 | *p = 0; |
414 | symbolP = symbol_find_or_make (name); | |
415 | *p = c; | |
416 | if (S_IS_DEFINED (symbolP)) | |
417 | { | |
418 | as_bad ("Ignoring attempt to re-define symbol"); | |
419 | ignore_rest_of_line (); | |
420 | return; | |
421 | } | |
422 | if (S_GET_VALUE (symbolP) != 0) | |
423 | { | |
ed9638af | 424 | if (S_GET_VALUE (symbolP) != size) |
355afbcd | 425 | { |
125f0b0d KR |
426 | as_warn ("Length of .comm \"%s\" is already %ld. Not changed to %d.", |
427 | S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size); | |
680227f3 | 428 | } |
355afbcd KR |
429 | } |
430 | else | |
431 | { | |
ed9638af | 432 | #ifndef OBJ_ELF |
7766838e | 433 | S_SET_VALUE (symbolP, (valueT) size); |
355afbcd | 434 | S_SET_EXTERNAL (symbolP); |
428d312b | 435 | #endif |
355afbcd KR |
436 | } |
437 | know (symbolP->sy_frag == &zero_address_frag); | |
428d312b KR |
438 | if (*input_line_pointer != ',') |
439 | { | |
125f0b0d | 440 | as_bad ("Expected comma after common length"); |
428d312b KR |
441 | ignore_rest_of_line (); |
442 | return; | |
443 | } | |
444 | input_line_pointer++; | |
125f0b0d KR |
445 | SKIP_WHITESPACE (); |
446 | if (*input_line_pointer != '"') | |
ed9638af | 447 | { |
125f0b0d | 448 | temp = get_absolute_expression (); |
58d4951d | 449 | #ifndef OBJ_ELF |
125f0b0d KR |
450 | if (temp > max_alignment) |
451 | { | |
452 | temp = max_alignment; | |
453 | as_warn ("Common alignment too large: %d. assumed", temp); | |
454 | } | |
58d4951d ILT |
455 | #endif |
456 | if (temp < 0) | |
125f0b0d KR |
457 | { |
458 | temp = 0; | |
459 | as_warn ("Common alignment negative; 0 assumed"); | |
460 | } | |
b2565433 | 461 | #ifdef OBJ_ELF |
125f0b0d KR |
462 | if (symbolP->local) |
463 | { | |
ff4cac38 KR |
464 | segT old_sec; |
465 | int old_subsec; | |
125f0b0d | 466 | char *p; |
ff4cac38 | 467 | int align; |
ed9638af | 468 | |
ff4cac38 KR |
469 | old_sec = now_seg; |
470 | old_subsec = now_subseg; | |
471 | align = temp; | |
125f0b0d KR |
472 | record_alignment (bss_section, align); |
473 | subseg_set (bss_section, 0); | |
474 | if (align) | |
475 | frag_align (align, 0); | |
476 | if (S_GET_SEGMENT (symbolP) == bss_section) | |
477 | symbolP->sy_frag->fr_symbol = 0; | |
478 | symbolP->sy_frag = frag_now; | |
479 | p = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size, | |
480 | (char *) 0); | |
481 | *p = 0; | |
482 | S_SET_SEGMENT (symbolP, bss_section); | |
483 | S_CLEAR_EXTERNAL (symbolP); | |
484 | subseg_set (old_sec, old_subsec); | |
485 | } | |
486 | else | |
b2565433 | 487 | #endif |
125f0b0d | 488 | { |
ff4cac38 | 489 | allocate_common: |
7766838e | 490 | S_SET_VALUE (symbolP, (valueT) size); |
5e0a90a8 KR |
491 | #ifdef OBJ_ELF |
492 | S_SET_ALIGN (symbolP, temp); | |
493 | #endif | |
125f0b0d KR |
494 | S_SET_EXTERNAL (symbolP); |
495 | /* should be common, but this is how gas does it for now */ | |
5e0a90a8 | 496 | S_SET_SEGMENT (symbolP, bfd_und_section_ptr); |
125f0b0d | 497 | } |
ed9638af KR |
498 | } |
499 | else | |
500 | { | |
125f0b0d | 501 | input_line_pointer++; |
ff4cac38 KR |
502 | /* @@ Some use the dot, some don't. Can we get some consistency?? */ |
503 | if (*input_line_pointer == '.') | |
504 | input_line_pointer++; | |
505 | /* @@ Some say data, some say bss. */ | |
125f0b0d | 506 | if (strncmp (input_line_pointer, "bss\"", 4) |
ff4cac38 | 507 | && strncmp (input_line_pointer, "data\"", 5)) |
125f0b0d | 508 | { |
ff4cac38 KR |
509 | while (*--input_line_pointer != '"') |
510 | ; | |
511 | input_line_pointer--; | |
125f0b0d KR |
512 | goto bad_common_segment; |
513 | } | |
514 | while (*input_line_pointer++ != '"') | |
515 | ; | |
ff4cac38 | 516 | goto allocate_common; |
355afbcd | 517 | } |
355afbcd KR |
518 | demand_empty_rest_of_line (); |
519 | return; | |
ff4cac38 KR |
520 | |
521 | { | |
522 | bad_common_segment: | |
523 | p = input_line_pointer; | |
524 | while (*p && *p != '\n') | |
525 | p++; | |
526 | c = *p; | |
527 | *p = '\0'; | |
528 | as_bad ("bad .common segment %s", input_line_pointer + 1); | |
529 | *p = c; | |
530 | input_line_pointer = p; | |
531 | ignore_rest_of_line (); | |
532 | return; | |
533 | } | |
534 | } | |
355afbcd | 535 | |
8dd07a84 ILT |
536 | /* Handle the .empty pseudo-op. This supresses the warnings about |
537 | invalid delay slot usage. */ | |
538 | ||
539 | static void | |
540 | s_empty (ignore) | |
541 | int ignore; | |
542 | { | |
543 | /* The easy way to implement is to just forget about the last | |
544 | instruction. */ | |
545 | last_insn = NULL; | |
546 | } | |
547 | ||
355afbcd | 548 | static void |
7766838e ILT |
549 | s_seg (ignore) |
550 | int ignore; | |
355afbcd KR |
551 | { |
552 | ||
553 | if (strncmp (input_line_pointer, "\"text\"", 6) == 0) | |
554 | { | |
555 | input_line_pointer += 6; | |
7766838e | 556 | s_text (0); |
355afbcd KR |
557 | return; |
558 | } | |
559 | if (strncmp (input_line_pointer, "\"data\"", 6) == 0) | |
560 | { | |
561 | input_line_pointer += 6; | |
7766838e | 562 | s_data (0); |
355afbcd KR |
563 | return; |
564 | } | |
565 | if (strncmp (input_line_pointer, "\"data1\"", 7) == 0) | |
566 | { | |
567 | input_line_pointer += 7; | |
568 | s_data1 (); | |
569 | return; | |
570 | } | |
571 | if (strncmp (input_line_pointer, "\"bss\"", 5) == 0) | |
572 | { | |
573 | input_line_pointer += 5; | |
574 | /* We only support 2 segments -- text and data -- for now, so | |
428d312b KR |
575 | things in the "bss segment" will have to go into data for now. |
576 | You can still allocate SEG_BSS stuff with .lcomm or .reserve. */ | |
577 | subseg_set (data_section, 255); /* FIXME-SOMEDAY */ | |
355afbcd KR |
578 | return; |
579 | } | |
580 | as_bad ("Unknown segment type"); | |
581 | demand_empty_rest_of_line (); | |
c999fd9f | 582 | } |
355afbcd KR |
583 | |
584 | static void | |
585 | s_data1 () | |
586 | { | |
428d312b | 587 | subseg_set (data_section, 1); |
355afbcd | 588 | demand_empty_rest_of_line (); |
c999fd9f | 589 | } |
fecd2382 | 590 | |
355afbcd | 591 | static void |
7766838e ILT |
592 | s_proc (ignore) |
593 | int ignore; | |
355afbcd | 594 | { |
58d4951d | 595 | while (!is_end_of_line[(unsigned char) *input_line_pointer]) |
355afbcd KR |
596 | { |
597 | ++input_line_pointer; | |
598 | } | |
599 | ++input_line_pointer; | |
c999fd9f | 600 | } |
fecd2382 | 601 | |
8dd07a84 ILT |
602 | /* This static variable is set by s_uacons to tell sparc_cons_align |
603 | that the expession does not need to be aligned. */ | |
604 | ||
605 | static int sparc_no_align_cons = 0; | |
606 | ||
607 | /* This handles the unaligned space allocation pseudo-ops, such as | |
608 | .uaword. .uaword is just like .word, but the value does not need | |
609 | to be aligned. */ | |
610 | ||
611 | static void | |
612 | s_uacons (bytes) | |
613 | int bytes; | |
614 | { | |
615 | /* Tell sparc_cons_align not to align this value. */ | |
616 | sparc_no_align_cons = 1; | |
617 | cons (bytes); | |
618 | } | |
619 | ||
2b063e6d ILT |
620 | /* If the --enforce-aligned-data option is used, we require .word, |
621 | et. al., to be aligned correctly. We do it by setting up an | |
622 | rs_align_code frag, and checking in HANDLE_ALIGN to make sure that | |
623 | no unexpected alignment was introduced. | |
624 | ||
625 | The SunOS and Solaris native assemblers enforce aligned data by | |
626 | default. We don't want to do that, because gcc can deliberately | |
627 | generate misaligned data if the packed attribute is used. Instead, | |
628 | we permit misaligned data by default, and permit the user to set an | |
629 | option to check for it. */ | |
8dd07a84 ILT |
630 | |
631 | void | |
632 | sparc_cons_align (nbytes) | |
633 | int nbytes; | |
634 | { | |
635 | int nalign; | |
636 | char *p; | |
637 | ||
2b063e6d ILT |
638 | /* Only do this if we are enforcing aligned data. */ |
639 | if (! enforce_aligned_data) | |
640 | return; | |
641 | ||
8dd07a84 ILT |
642 | if (sparc_no_align_cons) |
643 | { | |
644 | /* This is an unaligned pseudo-op. */ | |
645 | sparc_no_align_cons = 0; | |
646 | return; | |
647 | } | |
648 | ||
649 | nalign = 0; | |
650 | while ((nbytes & 1) == 0) | |
651 | { | |
652 | ++nalign; | |
653 | nbytes >>= 1; | |
654 | } | |
655 | ||
656 | if (nalign == 0) | |
657 | return; | |
658 | ||
659 | if (now_seg == absolute_section) | |
660 | { | |
661 | if ((abs_section_offset & ((1 << nalign) - 1)) != 0) | |
662 | as_bad ("misaligned data"); | |
663 | return; | |
664 | } | |
665 | ||
666 | p = frag_var (rs_align_code, 1, 1, (relax_substateT) 0, | |
667 | (symbolS *) NULL, (long) nalign, (char *) NULL); | |
668 | ||
669 | record_alignment (now_seg, nalign); | |
670 | } | |
671 | ||
672 | /* This is where we do the unexpected alignment check. */ | |
673 | ||
674 | void | |
675 | sparc_handle_align (fragp) | |
676 | fragS *fragp; | |
677 | { | |
678 | if (fragp->fr_type == rs_align_code | |
679 | && fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix != 0) | |
680 | as_bad_where (fragp->fr_file, fragp->fr_line, "misaligned data"); | |
681 | } | |
682 | ||
6df07e7f | 683 | /* sparc64 priviledged registers */ |
428d312b | 684 | |
355afbcd KR |
685 | struct priv_reg_entry |
686 | { | |
687 | char *name; | |
688 | int regnum; | |
689 | }; | |
428d312b | 690 | |
680227f3 KR |
691 | struct priv_reg_entry priv_reg_table[] = |
692 | { | |
355afbcd KR |
693 | {"tpc", 0}, |
694 | {"tnpc", 1}, | |
695 | {"tstate", 2}, | |
696 | {"tt", 3}, | |
697 | {"tick", 4}, | |
698 | {"tba", 5}, | |
699 | {"pstate", 6}, | |
700 | {"tl", 7}, | |
701 | {"pil", 8}, | |
702 | {"cwp", 9}, | |
703 | {"cansave", 10}, | |
704 | {"canrestore", 11}, | |
705 | {"cleanwin", 12}, | |
706 | {"otherwin", 13}, | |
707 | {"wstate", 14}, | |
125f0b0d | 708 | {"fq", 15}, |
355afbcd KR |
709 | {"ver", 31}, |
710 | {"", -1}, /* end marker */ | |
680227f3 KR |
711 | }; |
712 | ||
355afbcd KR |
713 | static int |
714 | cmp_reg_entry (p, q) | |
680227f3 KR |
715 | struct priv_reg_entry *p, *q; |
716 | { | |
717 | return strcmp (q->name, p->name); | |
718 | } | |
355afbcd | 719 | |
fecd2382 RP |
720 | /* This function is called once, at assembler startup time. It should |
721 | set up all the tables, etc. that the MD part of the assembler will need. */ | |
6df07e7f | 722 | |
355afbcd KR |
723 | void |
724 | md_begin () | |
725 | { | |
7766838e | 726 | register const char *retval = NULL; |
355afbcd KR |
727 | int lose = 0; |
728 | register unsigned int i = 0; | |
729 | ||
730 | op_hash = hash_new (); | |
355afbcd | 731 | |
e70ad5d5 | 732 | while (i < sparc_num_opcodes) |
355afbcd KR |
733 | { |
734 | const char *name = sparc_opcodes[i].name; | |
735 | retval = hash_insert (op_hash, name, &sparc_opcodes[i]); | |
7766838e | 736 | if (retval != NULL) |
355afbcd KR |
737 | { |
738 | fprintf (stderr, "internal error: can't hash `%s': %s\n", | |
739 | sparc_opcodes[i].name, retval); | |
740 | lose = 1; | |
fecd2382 | 741 | } |
355afbcd KR |
742 | do |
743 | { | |
744 | if (sparc_opcodes[i].match & sparc_opcodes[i].lose) | |
745 | { | |
746 | fprintf (stderr, "internal error: losing opcode: `%s' \"%s\"\n", | |
747 | sparc_opcodes[i].name, sparc_opcodes[i].args); | |
748 | lose = 1; | |
749 | } | |
750 | ++i; | |
751 | } | |
e70ad5d5 | 752 | while (i < sparc_num_opcodes |
355afbcd KR |
753 | && !strcmp (sparc_opcodes[i].name, name)); |
754 | } | |
755 | ||
756 | if (lose) | |
757 | as_fatal ("Broken assembler. No assembly attempted."); | |
758 | ||
759 | for (i = '0'; i < '8'; ++i) | |
760 | octal[i] = 1; | |
761 | for (i = '0'; i <= '9'; ++i) | |
762 | toHex[i] = i - '0'; | |
763 | for (i = 'a'; i <= 'f'; ++i) | |
764 | toHex[i] = i + 10 - 'a'; | |
765 | for (i = 'A'; i <= 'F'; ++i) | |
766 | toHex[i] = i + 10 - 'A'; | |
767 | ||
355afbcd KR |
768 | qsort (priv_reg_table, sizeof (priv_reg_table) / sizeof (priv_reg_table[0]), |
769 | sizeof (priv_reg_table[0]), cmp_reg_entry); | |
ed9638af | 770 | |
d8b42b96 DE |
771 | /* If -bump, record the architecture level at which we start issuing |
772 | warnings. The behaviour is different depending upon whether an | |
773 | architecture was explicitly specified. If it wasn't, we issue warnings | |
774 | for all upwards bumps. If it was, we don't start issuing warnings until | |
775 | we need to bump beyond the requested architecture or when we bump between | |
776 | conflicting architectures. */ | |
777 | ||
778 | if (warn_on_bump | |
779 | && architecture_requested) | |
780 | { | |
781 | /* `max_architecture' records the requested architecture. | |
782 | Issue warnings if we go above it. */ | |
783 | warn_after_architecture = max_architecture; | |
784 | ||
785 | /* Find the highest architecture level that doesn't conflict with | |
786 | the requested one. */ | |
787 | for (max_architecture = SPARC_OPCODE_ARCH_MAX; | |
788 | max_architecture > warn_after_architecture; | |
789 | --max_architecture) | |
790 | if (! SPARC_OPCODE_CONFLICT_P (max_architecture, | |
791 | warn_after_architecture)) | |
792 | break; | |
793 | } | |
6df07e7f DE |
794 | } |
795 | ||
796 | /* Called after all assembly has been done. */ | |
797 | ||
798 | void | |
799 | sparc_md_end () | |
800 | { | |
60abd849 | 801 | #ifdef SPARC_ARCH64 |
e70ad5d5 DE |
802 | if (current_architecture == SPARC_OPCODE_ARCH_V9A) |
803 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v9a); | |
804 | else | |
805 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v9); | |
6df07e7f | 806 | #else |
e70ad5d5 DE |
807 | if (current_architecture == SPARC_OPCODE_ARCH_V9) |
808 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v8plus); | |
809 | else if (current_architecture == SPARC_OPCODE_ARCH_V9A) | |
810 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_v8plusa); | |
ed94c2b8 ILT |
811 | else if (current_architecture == SPARC_OPCODE_ARCH_SPARCLET) |
812 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc_sparclet); | |
e70ad5d5 | 813 | else |
ed94c2b8 ILT |
814 | { |
815 | /* The sparclite is treated like a normal sparc. Perhaps it shouldn't | |
816 | be but for now it is (since that's the way it's always been | |
817 | treated). */ | |
818 | bfd_set_arch_mach (stdoutput, bfd_arch_sparc, bfd_mach_sparc); | |
819 | } | |
6df07e7f | 820 | #endif |
9b6a882e | 821 | } |
fecd2382 | 822 | |
2b063e6d ILT |
823 | /* Utility to output one insn. */ |
824 | ||
825 | static void | |
826 | output_insn (insn, the_insn) | |
827 | const struct sparc_opcode *insn; | |
828 | struct sparc_it *the_insn; | |
829 | { | |
830 | char *toP = frag_more (4); | |
831 | ||
832 | /* put out the opcode */ | |
833 | if (INSN_BIG_ENDIAN) | |
834 | number_to_chars_bigendian (toP, (valueT) the_insn->opcode, 4); | |
835 | else | |
836 | number_to_chars_littleendian (toP, (valueT) the_insn->opcode, 4); | |
837 | ||
838 | /* put out the symbol-dependent stuff */ | |
839 | if (the_insn->reloc != BFD_RELOC_NONE) | |
840 | { | |
841 | fix_new_exp (frag_now, /* which frag */ | |
842 | (toP - frag_now->fr_literal), /* where */ | |
843 | 4, /* size */ | |
844 | &the_insn->exp, | |
845 | the_insn->pcrel, | |
846 | the_insn->reloc); | |
847 | } | |
848 | ||
849 | last_insn = insn; | |
850 | } | |
851 | ||
355afbcd KR |
852 | void |
853 | md_assemble (str) | |
854 | char *str; | |
fecd2382 | 855 | { |
ed94c2b8 | 856 | const struct sparc_opcode *insn; |
355afbcd KR |
857 | |
858 | know (str); | |
2b063e6d | 859 | special_case = 0; |
ed94c2b8 ILT |
860 | sparc_ip (str, &insn); |
861 | ||
2b063e6d | 862 | /* We warn about attempts to put a floating point branch in a delay slot. */ |
ed94c2b8 ILT |
863 | if (insn != NULL |
864 | && last_insn != NULL | |
865 | && (insn->flags & F_FBR) != 0 | |
866 | && (last_insn->flags & F_DELAYED) != 0) | |
867 | as_warn ("FP branch in delay slot"); | |
868 | ||
869 | /* SPARC before v9 requires a nop instruction between a floating | |
870 | point instruction and a floating point branch. We insert one | |
871 | automatically, with a warning. */ | |
872 | if (max_architecture < SPARC_OPCODE_ARCH_V9 | |
873 | && insn != NULL | |
874 | && last_insn != NULL | |
875 | && (insn->flags & F_FBR) != 0 | |
876 | && (last_insn->flags & F_FLOAT) != 0) | |
877 | { | |
2b063e6d ILT |
878 | struct sparc_it nop_insn; |
879 | ||
880 | nop_insn.opcode = NOP_INSN; | |
881 | nop_insn.reloc = BFD_RELOC_NONE; | |
882 | output_insn (insn, &nop_insn); | |
ed94c2b8 | 883 | as_warn ("FP branch preceded by FP instruction; NOP inserted"); |
ed94c2b8 | 884 | } |
355afbcd | 885 | |
2b063e6d | 886 | switch (special_case) |
355afbcd | 887 | { |
2b063e6d ILT |
888 | case 0: |
889 | /* normal insn */ | |
890 | output_insn (insn, &the_insn); | |
891 | break; | |
355afbcd | 892 | |
2b063e6d ILT |
893 | case SPECIAL_CASE_SET: |
894 | { | |
895 | int need_hi22_p = 0; | |
355afbcd | 896 | |
2b063e6d ILT |
897 | /* "set" is not defined for negative numbers in v9: it doesn't yield |
898 | what you expect it to. */ | |
899 | if (SPARC_OPCODE_ARCH_V9_P (max_architecture) | |
900 | && the_insn.exp.X_op == O_constant) | |
901 | { | |
902 | if (the_insn.exp.X_add_number < 0) | |
903 | as_warn ("set: used with negative number"); | |
904 | else if (the_insn.exp.X_add_number > 0xffffffff) | |
905 | as_warn ("set: number larger than 4294967295"); | |
906 | } | |
428d312b | 907 | |
2b063e6d ILT |
908 | /* See if operand is absolute and small; skip sethi if so. */ |
909 | if (the_insn.exp.X_op != O_constant | |
910 | || the_insn.exp.X_add_number >= (1 << 12) | |
911 | || the_insn.exp.X_add_number < -(1 << 12)) | |
912 | { | |
913 | output_insn (insn, &the_insn); | |
914 | need_hi22_p = 1; | |
915 | } | |
916 | /* See if operand has no low-order bits; skip OR if so. */ | |
917 | if (the_insn.exp.X_op != O_constant | |
918 | || (need_hi22_p && (the_insn.exp.X_add_number & 0x3FF) != 0) | |
919 | || ! need_hi22_p) | |
920 | { | |
921 | int rd = (the_insn.opcode & RD (~0)) >> 25; | |
922 | the_insn.opcode = (OR_INSN | (need_hi22_p ? RS1 (rd) : 0) | |
923 | | RD (rd) | |
924 | | IMMED | |
925 | | (the_insn.exp.X_add_number | |
926 | & (need_hi22_p ? 0x3ff : 0x1fff))); | |
927 | the_insn.reloc = (the_insn.exp.X_op != O_constant | |
928 | ? BFD_RELOC_LO10 | |
929 | : BFD_RELOC_NONE); | |
930 | output_insn (insn, &the_insn); | |
931 | } | |
932 | break; | |
933 | } | |
ed94c2b8 | 934 | |
2b063e6d ILT |
935 | case SPECIAL_CASE_SETSW: |
936 | { | |
937 | /* FIXME: Not finished. */ | |
938 | break; | |
939 | } | |
355afbcd | 940 | |
2b063e6d ILT |
941 | case SPECIAL_CASE_SETX: |
942 | { | |
943 | #define SIGNEXT32(x) ((((x) & 0xffffffff) ^ 0x80000000) - 0x80000000) | |
944 | int upper32 = SIGNEXT32 (BSR (the_insn.exp.X_add_number, 32)); | |
945 | int lower32 = SIGNEXT32 (the_insn.exp.X_add_number); | |
946 | #undef SIGNEXT32 | |
947 | int tmpreg = (the_insn.opcode & RS1 (~0)) >> 14; | |
948 | int dstreg = (the_insn.opcode & RD (~0)) >> 25; | |
949 | /* Output directly to dst reg if lower 32 bits are all zero. */ | |
950 | int upper_dstreg = (the_insn.exp.X_op == O_constant | |
951 | && lower32 == 0) ? dstreg : tmpreg; | |
952 | int need_hh22_p = 0, need_hm10_p = 0, need_hi22_p = 0, need_lo10_p = 0; | |
953 | ||
954 | /* The tmp reg should not be the dst reg. */ | |
955 | if (tmpreg == dstreg) | |
956 | as_warn ("setx: temporary register same as destination register"); | |
957 | ||
958 | /* Reset X_add_number, we've extracted it as upper32/lower32. | |
959 | Otherwise fixup_segment will complain about not being able to | |
960 | write an 8 byte number in a 4 byte field. */ | |
961 | the_insn.exp.X_add_number = 0; | |
962 | ||
963 | /* ??? Obviously there are other optimizations we can do | |
964 | (e.g. sethi+shift for 0x1f0000000) and perhaps we shouldn't be | |
965 | doing some of these. Later. If you do change things, try to | |
966 | change all of this to be table driven as well. */ | |
967 | ||
968 | /* What to output depends on the number if it's constant. | |
969 | Compute that first, then output what we've decided upon. */ | |
970 | if (the_insn.exp.X_op != O_constant) | |
971 | need_hh22_p = need_hm10_p = need_hi22_p = need_lo10_p = 1; | |
972 | else | |
973 | { | |
974 | /* Only need hh22 if `or' insn can't handle constant. */ | |
975 | if (upper32 < -(1 << 12) || upper32 >= (1 << 12)) | |
976 | need_hh22_p = 1; | |
977 | ||
978 | /* Does bottom part (after sethi) have bits? */ | |
979 | if ((need_hh22_p && (upper32 & 0x3ff) != 0) | |
980 | /* No hh22, but does upper32 still have bits we can't set | |
981 | from lower32? */ | |
982 | || (! need_hh22_p | |
983 | && upper32 != 0 | |
984 | && (upper32 != -1 || lower32 >= 0))) | |
985 | need_hm10_p = 1; | |
986 | ||
987 | /* If the lower half is all zero, we build the upper half directly | |
988 | into the dst reg. */ | |
989 | if (lower32 != 0 | |
990 | /* Need lower half if number is zero. */ | |
991 | || (! need_hh22_p && ! need_hm10_p)) | |
992 | { | |
993 | /* No need for sethi if `or' insn can handle constant. */ | |
994 | if (lower32 < -(1 << 12) || lower32 >= (1 << 12) | |
995 | /* Note that we can't use a negative constant in the `or' | |
996 | insn unless the upper 32 bits are all ones. */ | |
997 | || (lower32 < 0 && upper32 != -1)) | |
998 | need_hi22_p = 1; | |
999 | ||
1000 | /* Does bottom part (after sethi) have bits? */ | |
1001 | if ((need_hi22_p && (lower32 & 0x3ff) != 0) | |
1002 | /* No sethi. */ | |
1003 | || (! need_hi22_p && (lower32 & 0x1fff) != 0) | |
1004 | /* Need `or' if we didn't set anything else. */ | |
1005 | || (! need_hi22_p && ! need_hh22_p && ! need_hm10_p)) | |
1006 | need_lo10_p = 1; | |
1007 | } | |
1008 | } | |
355afbcd | 1009 | |
2b063e6d ILT |
1010 | if (need_hh22_p) |
1011 | { | |
1012 | the_insn.opcode = (SETHI_INSN | RD (upper_dstreg) | |
1013 | | ((upper32 >> 10) & 0x3fffff)); | |
1014 | the_insn.reloc = (the_insn.exp.X_op != O_constant | |
1015 | ? BFD_RELOC_SPARC_HH22 : BFD_RELOC_NONE); | |
1016 | output_insn (insn, &the_insn); | |
1017 | } | |
1018 | ||
1019 | if (need_hm10_p) | |
1020 | { | |
1021 | the_insn.opcode = (OR_INSN | |
1022 | | (need_hh22_p ? RS1 (upper_dstreg) : 0) | |
1023 | | RD (upper_dstreg) | |
1024 | | IMMED | |
1025 | | (upper32 | |
1026 | & (need_hh22_p ? 0x3ff : 0x1fff))); | |
1027 | the_insn.reloc = (the_insn.exp.X_op != O_constant | |
1028 | ? BFD_RELOC_SPARC_HM10 : BFD_RELOC_NONE); | |
1029 | output_insn (insn, &the_insn); | |
1030 | } | |
1031 | ||
1032 | if (need_hi22_p) | |
1033 | { | |
1034 | the_insn.opcode = (SETHI_INSN | RD (dstreg) | |
1035 | | ((lower32 >> 10) & 0x3fffff)); | |
1036 | the_insn.reloc = BFD_RELOC_HI22; | |
1037 | output_insn (insn, &the_insn); | |
1038 | } | |
1039 | ||
1040 | if (need_lo10_p) | |
1041 | { | |
1042 | /* FIXME: One nice optimization to do here is to OR the low part | |
1043 | with the highpart if hi22 isn't needed and the low part is | |
1044 | positive. */ | |
1045 | the_insn.opcode = (OR_INSN | (need_hi22_p ? RS1 (dstreg) : 0) | |
1046 | | RD (dstreg) | |
1047 | | IMMED | |
1048 | | (lower32 | |
1049 | & (need_hi22_p ? 0x3ff : 0x1fff))); | |
1050 | the_insn.reloc = BFD_RELOC_LO10; | |
1051 | output_insn (insn, &the_insn); | |
1052 | } | |
1053 | ||
1054 | /* If we needed to build the upper part, shift it into place. */ | |
1055 | if (need_hh22_p || need_hm10_p) | |
1056 | { | |
1057 | the_insn.opcode = (SLLX_INSN | RS1 (upper_dstreg) | RD (upper_dstreg) | |
1058 | | IMMED | 32); | |
1059 | the_insn.reloc = BFD_RELOC_NONE; | |
1060 | output_insn (insn, &the_insn); | |
1061 | } | |
1062 | ||
1063 | /* If we needed to build both upper and lower parts, OR them together. */ | |
1064 | if ((need_hh22_p || need_hm10_p) | |
1065 | && (need_hi22_p || need_lo10_p)) | |
1066 | { | |
1067 | the_insn.opcode = (OR_INSN | RS1 (dstreg) | RS2 (upper_dstreg) | |
1068 | | RD (dstreg)); | |
1069 | the_insn.reloc = BFD_RELOC_NONE; | |
1070 | output_insn (insn, &the_insn); | |
1071 | } | |
1072 | /* We didn't need both regs, but we may have to sign extend lower32. */ | |
1073 | else if (need_hi22_p && upper32 == -1) | |
1074 | { | |
1075 | the_insn.opcode = (SRA_INSN | RS1 (dstreg) | RD (dstreg) | |
1076 | | IMMED | 0); | |
1077 | the_insn.reloc = BFD_RELOC_NONE; | |
1078 | output_insn (insn, &the_insn); | |
1079 | } | |
1080 | break; | |
1081 | } | |
1082 | ||
1083 | case SPECIAL_CASE_FDIV: | |
1084 | { | |
1085 | int rd = (the_insn.opcode >> 25) & 0x1f; | |
1086 | ||
1087 | output_insn (insn, &the_insn); | |
1088 | ||
1089 | /* According to information leaked from Sun, the "fdiv" instructions | |
1090 | on early SPARC machines would produce incorrect results sometimes. | |
1091 | The workaround is to add an fmovs of the destination register to | |
1092 | itself just after the instruction. This was true on machines | |
1093 | with Weitek 1165 float chips, such as the Sun-4/260 and /280. */ | |
1094 | assert (the_insn.reloc == BFD_RELOC_NONE); | |
1095 | the_insn.opcode = FMOVS_INSN | rd | RD (rd); | |
1096 | output_insn (insn, &the_insn); | |
1097 | break; | |
1098 | } | |
355afbcd KR |
1099 | |
1100 | default: | |
2b063e6d | 1101 | as_fatal ("failed special case insn sanity check"); |
355afbcd | 1102 | } |
9b6a882e | 1103 | } |
355afbcd | 1104 | |
6df07e7f | 1105 | /* Parse an argument that can be expressed as a keyword. |
e86d5cf3 | 1106 | (eg: #StoreStore or %ccfr). |
6df07e7f DE |
1107 | The result is a boolean indicating success. |
1108 | If successful, INPUT_POINTER is updated. */ | |
1109 | ||
1110 | static int | |
1111 | parse_keyword_arg (lookup_fn, input_pointerP, valueP) | |
1112 | int (*lookup_fn) (); | |
1113 | char **input_pointerP; | |
1114 | int *valueP; | |
1115 | { | |
1116 | int value; | |
1117 | char c, *p, *q; | |
1118 | ||
1119 | p = *input_pointerP; | |
e86d5cf3 | 1120 | for (q = p + (*p == '#' || *p == '%'); isalpha (*q) || *q == '_'; ++q) |
6df07e7f DE |
1121 | continue; |
1122 | c = *q; | |
1123 | *q = 0; | |
1124 | value = (*lookup_fn) (p); | |
1125 | *q = c; | |
1126 | if (value == -1) | |
1127 | return 0; | |
1128 | *valueP = value; | |
1129 | *input_pointerP = q; | |
1130 | return 1; | |
1131 | } | |
1132 | ||
1133 | /* Parse an argument that is a constant expression. | |
1134 | The result is a boolean indicating success. */ | |
1135 | ||
1136 | static int | |
1137 | parse_const_expr_arg (input_pointerP, valueP) | |
1138 | char **input_pointerP; | |
1139 | int *valueP; | |
1140 | { | |
1141 | char *save = input_line_pointer; | |
1142 | expressionS exp; | |
1143 | ||
1144 | input_line_pointer = *input_pointerP; | |
1145 | /* The next expression may be something other than a constant | |
1146 | (say if we're not processing the right variant of the insn). | |
1147 | Don't call expression unless we're sure it will succeed as it will | |
1148 | signal an error (which we want to defer until later). */ | |
1149 | /* FIXME: It might be better to define md_operand and have it recognize | |
1150 | things like %asi, etc. but continuing that route through to the end | |
1151 | is a lot of work. */ | |
1152 | if (*input_line_pointer == '%') | |
1153 | { | |
1154 | input_line_pointer = save; | |
1155 | return 0; | |
1156 | } | |
1157 | expression (&exp); | |
1158 | *input_pointerP = input_line_pointer; | |
1159 | input_line_pointer = save; | |
1160 | if (exp.X_op != O_constant) | |
1161 | return 0; | |
1162 | *valueP = exp.X_add_number; | |
1163 | return 1; | |
1164 | } | |
1165 | ||
355afbcd | 1166 | static void |
ed94c2b8 | 1167 | sparc_ip (str, pinsn) |
355afbcd | 1168 | char *str; |
ed94c2b8 | 1169 | const struct sparc_opcode **pinsn; |
fecd2382 | 1170 | { |
355afbcd KR |
1171 | char *error_message = ""; |
1172 | char *s; | |
1173 | const char *args; | |
1174 | char c; | |
a7aa7a2b | 1175 | const struct sparc_opcode *insn; |
355afbcd KR |
1176 | char *argsStart; |
1177 | unsigned long opcode; | |
1178 | unsigned int mask = 0; | |
1179 | int match = 0; | |
1180 | int comma = 0; | |
1181 | long immediate_max = 0; | |
6df07e7f | 1182 | int v9_arg_p; |
355afbcd KR |
1183 | |
1184 | for (s = str; islower (*s) || (*s >= '0' && *s <= '3'); ++s) | |
1185 | ; | |
6df07e7f | 1186 | |
355afbcd KR |
1187 | switch (*s) |
1188 | { | |
355afbcd KR |
1189 | case '\0': |
1190 | break; | |
1191 | ||
1192 | case ',': | |
1193 | comma = 1; | |
1194 | ||
1195 | /*FALLTHROUGH */ | |
1196 | ||
1197 | case ' ': | |
1198 | *s++ = '\0'; | |
1199 | break; | |
1200 | ||
1201 | default: | |
a7aa7a2b | 1202 | as_fatal ("Unknown opcode: `%s'", str); |
355afbcd | 1203 | } |
a7aa7a2b | 1204 | insn = (struct sparc_opcode *) hash_find (op_hash, str); |
ed94c2b8 | 1205 | *pinsn = insn; |
a7aa7a2b | 1206 | if (insn == NULL) |
355afbcd KR |
1207 | { |
1208 | as_bad ("Unknown opcode: `%s'", str); | |
1209 | return; | |
1210 | } | |
1211 | if (comma) | |
1212 | { | |
1213 | *--s = ','; | |
1214 | } | |
6df07e7f | 1215 | |
355afbcd KR |
1216 | argsStart = s; |
1217 | for (;;) | |
1218 | { | |
1219 | opcode = insn->match; | |
1220 | memset (&the_insn, '\0', sizeof (the_insn)); | |
428d312b | 1221 | the_insn.reloc = BFD_RELOC_NONE; |
6df07e7f | 1222 | v9_arg_p = 0; |
355afbcd KR |
1223 | |
1224 | /* | |
8fc0776d JW |
1225 | * Build the opcode, checking as we go to make |
1226 | * sure that the operands match | |
1227 | */ | |
355afbcd KR |
1228 | for (args = insn->args;; ++args) |
1229 | { | |
1230 | switch (*args) | |
1231 | { | |
355afbcd KR |
1232 | case 'K': |
1233 | { | |
7766838e | 1234 | int kmask = 0; |
ed9638af KR |
1235 | |
1236 | /* Parse a series of masks. */ | |
1237 | if (*s == '#') | |
355afbcd | 1238 | { |
ed9638af | 1239 | while (*s == '#') |
355afbcd | 1240 | { |
6df07e7f DE |
1241 | int mask; |
1242 | ||
1243 | if (! parse_keyword_arg (sparc_encode_membar, &s, | |
1244 | &mask)) | |
ed9638af KR |
1245 | { |
1246 | error_message = ": invalid membar mask name"; | |
1247 | goto error; | |
1248 | } | |
6df07e7f DE |
1249 | kmask |= mask; |
1250 | while (*s == ' ') { ++s; continue; } | |
1251 | if (*s == '|' || *s == '+') | |
ed9638af | 1252 | ++s; |
6df07e7f | 1253 | while (*s == ' ') { ++s; continue; } |
355afbcd | 1254 | } |
ed9638af | 1255 | } |
c999fd9f | 1256 | else |
ed9638af | 1257 | { |
6df07e7f DE |
1258 | if (! parse_const_expr_arg (&s, &kmask)) |
1259 | { | |
1260 | error_message = ": invalid membar mask expression"; | |
1261 | goto error; | |
1262 | } | |
1263 | if (kmask < 0 || kmask > 127) | |
ed9638af KR |
1264 | { |
1265 | error_message = ": invalid membar mask number"; | |
1266 | goto error; | |
355afbcd | 1267 | } |
355afbcd | 1268 | } |
c999fd9f | 1269 | |
6df07e7f | 1270 | opcode |= MEMBAR (kmask); |
355afbcd KR |
1271 | continue; |
1272 | } | |
1273 | ||
1274 | case '*': | |
ed9638af | 1275 | { |
6df07e7f | 1276 | int fcn = 0; |
355afbcd | 1277 | |
ed9638af KR |
1278 | /* Parse a prefetch function. */ |
1279 | if (*s == '#') | |
1280 | { | |
6df07e7f | 1281 | if (! parse_keyword_arg (sparc_encode_prefetch, &s, &fcn)) |
ed9638af KR |
1282 | { |
1283 | error_message = ": invalid prefetch function name"; | |
1284 | goto error; | |
1285 | } | |
1286 | } | |
6df07e7f | 1287 | else |
ed9638af | 1288 | { |
6df07e7f | 1289 | if (! parse_const_expr_arg (&s, &fcn)) |
ed9638af | 1290 | { |
6df07e7f DE |
1291 | error_message = ": invalid prefetch function expression"; |
1292 | goto error; | |
ed9638af | 1293 | } |
6df07e7f | 1294 | if (fcn < 0 || fcn > 31) |
ed9638af KR |
1295 | { |
1296 | error_message = ": invalid prefetch function number"; | |
1297 | goto error; | |
1298 | } | |
1299 | } | |
6df07e7f | 1300 | opcode |= RD (fcn); |
ed9638af KR |
1301 | continue; |
1302 | } | |
355afbcd KR |
1303 | |
1304 | case '!': | |
1305 | case '?': | |
6df07e7f | 1306 | /* Parse a sparc64 privileged register. */ |
355afbcd KR |
1307 | if (*s == '%') |
1308 | { | |
1309 | struct priv_reg_entry *p = priv_reg_table; | |
7766838e | 1310 | unsigned int len = 9999999; /* init to make gcc happy */ |
355afbcd KR |
1311 | |
1312 | s += 1; | |
1313 | while (p->name[0] > s[0]) | |
1314 | p++; | |
1315 | while (p->name[0] == s[0]) | |
1316 | { | |
1317 | len = strlen (p->name); | |
1318 | if (strncmp (p->name, s, len) == 0) | |
1319 | break; | |
1320 | p++; | |
1321 | } | |
1322 | if (p->name[0] != s[0]) | |
1323 | { | |
ed9638af | 1324 | error_message = ": unrecognizable privileged register"; |
355afbcd KR |
1325 | goto error; |
1326 | } | |
1327 | if (*args == '?') | |
1328 | opcode |= (p->regnum << 14); | |
1329 | else | |
1330 | opcode |= (p->regnum << 25); | |
1331 | s += len; | |
1332 | continue; | |
1333 | } | |
1334 | else | |
1335 | { | |
ed9638af | 1336 | error_message = ": unrecognizable privileged register"; |
355afbcd KR |
1337 | goto error; |
1338 | } | |
680227f3 | 1339 | |
355afbcd KR |
1340 | case 'M': |
1341 | case 'm': | |
1342 | if (strncmp (s, "%asr", 4) == 0) | |
1343 | { | |
1344 | s += 4; | |
680227f3 | 1345 | |
355afbcd KR |
1346 | if (isdigit (*s)) |
1347 | { | |
1348 | long num = 0; | |
1349 | ||
1350 | while (isdigit (*s)) | |
1351 | { | |
1352 | num = num * 10 + *s - '0'; | |
1353 | ++s; | |
1354 | } | |
1355 | ||
e86d5cf3 | 1356 | if (current_architecture >= SPARC_OPCODE_ARCH_V9) |
355afbcd | 1357 | { |
e86d5cf3 DE |
1358 | if (num < 16 || 31 < num) |
1359 | { | |
1360 | error_message = ": asr number must be between 16 and 31"; | |
1361 | goto error; | |
1362 | } | |
1363 | } | |
1364 | else | |
1365 | { | |
2cb1807e | 1366 | if (num < 0 || 31 < num) |
e86d5cf3 | 1367 | { |
2cb1807e | 1368 | error_message = ": asr number must be between 0 and 31"; |
e86d5cf3 DE |
1369 | goto error; |
1370 | } | |
1371 | } | |
355afbcd KR |
1372 | |
1373 | opcode |= (*args == 'M' ? RS1 (num) : RD (num)); | |
1374 | continue; | |
1375 | } | |
1376 | else | |
1377 | { | |
1378 | error_message = ": expecting %asrN"; | |
1379 | goto error; | |
e86d5cf3 DE |
1380 | } |
1381 | } /* if %asr */ | |
355afbcd KR |
1382 | break; |
1383 | ||
355afbcd | 1384 | case 'I': |
125f0b0d | 1385 | the_insn.reloc = BFD_RELOC_SPARC_11; |
355afbcd KR |
1386 | immediate_max = 0x03FF; |
1387 | goto immediate; | |
1388 | ||
1389 | case 'j': | |
125f0b0d | 1390 | the_insn.reloc = BFD_RELOC_SPARC_10; |
355afbcd KR |
1391 | immediate_max = 0x01FF; |
1392 | goto immediate; | |
1393 | ||
8dd07a84 ILT |
1394 | case 'X': |
1395 | /* V8 systems don't understand BFD_RELOC_SPARC_5. */ | |
1396 | if (SPARC_OPCODE_ARCH_V9_P (max_architecture)) | |
1397 | the_insn.reloc = BFD_RELOC_SPARC_5; | |
1398 | else | |
1399 | the_insn.reloc = BFD_RELOC_SPARC13; | |
1400 | /* These fields are unsigned, but for upward compatibility, | |
1401 | allow negative values as well. */ | |
1402 | immediate_max = 0x1f; | |
1403 | goto immediate; | |
1404 | ||
1405 | case 'Y': | |
1406 | /* V8 systems don't understand BFD_RELOC_SPARC_6. */ | |
1407 | if (SPARC_OPCODE_ARCH_V9_P (max_architecture)) | |
1408 | the_insn.reloc = BFD_RELOC_SPARC_6; | |
1409 | else | |
1410 | the_insn.reloc = BFD_RELOC_SPARC13; | |
1411 | /* These fields are unsigned, but for upward compatibility, | |
1412 | allow negative values as well. */ | |
1413 | immediate_max = 0x3f; | |
1414 | goto immediate; | |
1415 | ||
355afbcd | 1416 | case 'k': |
125f0b0d | 1417 | the_insn.reloc = /* RELOC_WDISP2_14 */ BFD_RELOC_SPARC_WDISP16; |
355afbcd KR |
1418 | the_insn.pcrel = 1; |
1419 | goto immediate; | |
1420 | ||
1421 | case 'G': | |
125f0b0d | 1422 | the_insn.reloc = BFD_RELOC_SPARC_WDISP19; |
355afbcd KR |
1423 | the_insn.pcrel = 1; |
1424 | goto immediate; | |
1425 | ||
1426 | case 'N': | |
1427 | if (*s == 'p' && s[1] == 'n') | |
1428 | { | |
1429 | s += 2; | |
1430 | continue; | |
1431 | } | |
1432 | break; | |
1433 | ||
1434 | case 'T': | |
1435 | if (*s == 'p' && s[1] == 't') | |
1436 | { | |
1437 | s += 2; | |
1438 | continue; | |
1439 | } | |
1440 | break; | |
1441 | ||
1442 | case 'z': | |
1443 | if (*s == ' ') | |
1444 | { | |
1445 | ++s; | |
1446 | } | |
0d44b3d1 | 1447 | if (strncmp (s, "%icc", 4) == 0) |
355afbcd | 1448 | { |
0d44b3d1 | 1449 | s += 4; |
355afbcd KR |
1450 | continue; |
1451 | } | |
1452 | break; | |
1453 | ||
1454 | case 'Z': | |
1455 | if (*s == ' ') | |
1456 | { | |
1457 | ++s; | |
1458 | } | |
0d44b3d1 | 1459 | if (strncmp (s, "%xcc", 4) == 0) |
355afbcd | 1460 | { |
0d44b3d1 | 1461 | s += 4; |
355afbcd KR |
1462 | continue; |
1463 | } | |
1464 | break; | |
1465 | ||
1466 | case '6': | |
1467 | if (*s == ' ') | |
1468 | { | |
1469 | ++s; | |
1470 | } | |
0d44b3d1 | 1471 | if (strncmp (s, "%fcc0", 5) == 0) |
355afbcd | 1472 | { |
0d44b3d1 | 1473 | s += 5; |
355afbcd KR |
1474 | continue; |
1475 | } | |
1476 | break; | |
1477 | ||
1478 | case '7': | |
1479 | if (*s == ' ') | |
1480 | { | |
1481 | ++s; | |
1482 | } | |
0d44b3d1 | 1483 | if (strncmp (s, "%fcc1", 5) == 0) |
355afbcd | 1484 | { |
0d44b3d1 | 1485 | s += 5; |
355afbcd KR |
1486 | continue; |
1487 | } | |
1488 | break; | |
1489 | ||
1490 | case '8': | |
1491 | if (*s == ' ') | |
1492 | { | |
1493 | ++s; | |
1494 | } | |
0d44b3d1 | 1495 | if (strncmp (s, "%fcc2", 5) == 0) |
355afbcd | 1496 | { |
0d44b3d1 | 1497 | s += 5; |
355afbcd KR |
1498 | continue; |
1499 | } | |
1500 | break; | |
1501 | ||
1502 | case '9': | |
1503 | if (*s == ' ') | |
1504 | { | |
1505 | ++s; | |
1506 | } | |
0d44b3d1 | 1507 | if (strncmp (s, "%fcc3", 5) == 0) |
355afbcd | 1508 | { |
0d44b3d1 | 1509 | s += 5; |
355afbcd KR |
1510 | continue; |
1511 | } | |
1512 | break; | |
1513 | ||
1514 | case 'P': | |
1515 | if (strncmp (s, "%pc", 3) == 0) | |
1516 | { | |
1517 | s += 3; | |
1518 | continue; | |
1519 | } | |
1520 | break; | |
1521 | ||
1522 | case 'W': | |
1523 | if (strncmp (s, "%tick", 5) == 0) | |
1524 | { | |
1525 | s += 5; | |
1526 | continue; | |
1527 | } | |
1528 | break; | |
355afbcd KR |
1529 | |
1530 | case '\0': /* end of args */ | |
1531 | if (*s == '\0') | |
1532 | { | |
1533 | match = 1; | |
1534 | } | |
1535 | break; | |
1536 | ||
1537 | case '+': | |
1538 | if (*s == '+') | |
1539 | { | |
1540 | ++s; | |
1541 | continue; | |
1542 | } | |
1543 | if (*s == '-') | |
1544 | { | |
1545 | continue; | |
1546 | } | |
1547 | break; | |
1548 | ||
1549 | case '[': /* these must match exactly */ | |
1550 | case ']': | |
1551 | case ',': | |
1552 | case ' ': | |
1553 | if (*s++ == *args) | |
1554 | continue; | |
1555 | break; | |
1556 | ||
1557 | case '#': /* must be at least one digit */ | |
1558 | if (isdigit (*s++)) | |
1559 | { | |
1560 | while (isdigit (*s)) | |
1561 | { | |
1562 | ++s; | |
1563 | } | |
1564 | continue; | |
1565 | } | |
1566 | break; | |
1567 | ||
1568 | case 'C': /* coprocessor state register */ | |
1569 | if (strncmp (s, "%csr", 4) == 0) | |
1570 | { | |
1571 | s += 4; | |
1572 | continue; | |
1573 | } | |
1574 | break; | |
1575 | ||
1576 | case 'b': /* next operand is a coprocessor register */ | |
1577 | case 'c': | |
1578 | case 'D': | |
1579 | if (*s++ == '%' && *s++ == 'c' && isdigit (*s)) | |
1580 | { | |
1581 | mask = *s++; | |
1582 | if (isdigit (*s)) | |
1583 | { | |
1584 | mask = 10 * (mask - '0') + (*s++ - '0'); | |
1585 | if (mask >= 32) | |
1586 | { | |
1587 | break; | |
1588 | } | |
1589 | } | |
1590 | else | |
1591 | { | |
1592 | mask -= '0'; | |
1593 | } | |
1594 | switch (*args) | |
1595 | { | |
1596 | ||
1597 | case 'b': | |
1598 | opcode |= mask << 14; | |
1599 | continue; | |
1600 | ||
1601 | case 'c': | |
1602 | opcode |= mask; | |
1603 | continue; | |
1604 | ||
1605 | case 'D': | |
1606 | opcode |= mask << 25; | |
1607 | continue; | |
1608 | } | |
1609 | } | |
1610 | break; | |
1611 | ||
1612 | case 'r': /* next operand must be a register */ | |
ed94c2b8 | 1613 | case 'O': |
355afbcd KR |
1614 | case '1': |
1615 | case '2': | |
1616 | case 'd': | |
1617 | if (*s++ == '%') | |
1618 | { | |
1619 | switch (c = *s++) | |
1620 | { | |
1621 | ||
1622 | case 'f': /* frame pointer */ | |
1623 | if (*s++ == 'p') | |
1624 | { | |
1625 | mask = 0x1e; | |
1626 | break; | |
1627 | } | |
1628 | goto error; | |
1629 | ||
1630 | case 'g': /* global register */ | |
1631 | if (isoctal (c = *s++)) | |
1632 | { | |
1633 | mask = c - '0'; | |
1634 | break; | |
1635 | } | |
1636 | goto error; | |
1637 | ||
1638 | case 'i': /* in register */ | |
1639 | if (isoctal (c = *s++)) | |
1640 | { | |
1641 | mask = c - '0' + 24; | |
1642 | break; | |
1643 | } | |
1644 | goto error; | |
1645 | ||
1646 | case 'l': /* local register */ | |
1647 | if (isoctal (c = *s++)) | |
1648 | { | |
1649 | mask = (c - '0' + 16); | |
1650 | break; | |
1651 | } | |
1652 | goto error; | |
1653 | ||
1654 | case 'o': /* out register */ | |
1655 | if (isoctal (c = *s++)) | |
1656 | { | |
1657 | mask = (c - '0' + 8); | |
1658 | break; | |
1659 | } | |
1660 | goto error; | |
1661 | ||
1662 | case 's': /* stack pointer */ | |
1663 | if (*s++ == 'p') | |
1664 | { | |
1665 | mask = 0xe; | |
1666 | break; | |
1667 | } | |
1668 | goto error; | |
1669 | ||
1670 | case 'r': /* any register */ | |
1671 | if (!isdigit (c = *s++)) | |
1672 | { | |
1673 | goto error; | |
1674 | } | |
1675 | /* FALLTHROUGH */ | |
1676 | case '0': | |
1677 | case '1': | |
1678 | case '2': | |
1679 | case '3': | |
1680 | case '4': | |
1681 | case '5': | |
1682 | case '6': | |
1683 | case '7': | |
1684 | case '8': | |
1685 | case '9': | |
1686 | if (isdigit (*s)) | |
1687 | { | |
1688 | if ((c = 10 * (c - '0') + (*s++ - '0')) >= 32) | |
680227f3 | 1689 | { |
680227f3 KR |
1690 | goto error; |
1691 | } | |
355afbcd KR |
1692 | } |
1693 | else | |
1694 | { | |
1695 | c -= '0'; | |
1696 | } | |
1697 | mask = c; | |
1698 | break; | |
1699 | ||
1700 | default: | |
1701 | goto error; | |
1702 | } | |
6df07e7f DE |
1703 | |
1704 | /* Got the register, now figure out where | |
1705 | it goes in the opcode. */ | |
355afbcd KR |
1706 | switch (*args) |
1707 | { | |
355afbcd KR |
1708 | case '1': |
1709 | opcode |= mask << 14; | |
1710 | continue; | |
1711 | ||
1712 | case '2': | |
1713 | opcode |= mask; | |
1714 | continue; | |
1715 | ||
1716 | case 'd': | |
1717 | opcode |= mask << 25; | |
1718 | continue; | |
1719 | ||
1720 | case 'r': | |
1721 | opcode |= (mask << 25) | (mask << 14); | |
1722 | continue; | |
ed94c2b8 ILT |
1723 | |
1724 | case 'O': | |
1725 | opcode |= (mask << 25) | (mask << 0); | |
1726 | continue; | |
355afbcd KR |
1727 | } |
1728 | } | |
1729 | break; | |
1730 | ||
1731 | case 'e': /* next operand is a floating point register */ | |
1732 | case 'v': | |
1733 | case 'V': | |
1734 | ||
1735 | case 'f': | |
1736 | case 'B': | |
1737 | case 'R': | |
1738 | ||
1739 | case 'g': | |
1740 | case 'H': | |
1741 | case 'J': | |
1742 | { | |
1743 | char format; | |
1744 | ||
1745 | if (*s++ == '%' | |
355afbcd | 1746 | && ((format = *s) == 'f') |
355afbcd KR |
1747 | && isdigit (*++s)) |
1748 | { | |
355afbcd KR |
1749 | for (mask = 0; isdigit (*s); ++s) |
1750 | { | |
1751 | mask = 10 * mask + (*s - '0'); | |
1752 | } /* read the number */ | |
1753 | ||
1754 | if ((*args == 'v' | |
1755 | || *args == 'B' | |
1756 | || *args == 'H') | |
1757 | && (mask & 1)) | |
1758 | { | |
1759 | break; | |
1760 | } /* register must be even numbered */ | |
1761 | ||
1762 | if ((*args == 'V' | |
1763 | || *args == 'R' | |
1764 | || *args == 'J') | |
1765 | && (mask & 3)) | |
1766 | { | |
1767 | break; | |
1768 | } /* register must be multiple of 4 */ | |
1769 | ||
125f0b0d | 1770 | if (mask >= 64) |
355afbcd | 1771 | { |
8dd07a84 | 1772 | if (SPARC_OPCODE_ARCH_V9_P (max_architecture)) |
6df07e7f DE |
1773 | error_message = ": There are only 64 f registers; [0-63]"; |
1774 | else | |
1775 | error_message = ": There are only 32 f registers; [0-31]"; | |
125f0b0d KR |
1776 | goto error; |
1777 | } /* on error */ | |
6df07e7f | 1778 | else if (mask >= 32) |
125f0b0d | 1779 | { |
8dd07a84 | 1780 | if (SPARC_OPCODE_ARCH_V9_P (max_architecture)) |
6df07e7f DE |
1781 | { |
1782 | v9_arg_p = 1; | |
1783 | mask -= 31; /* wrap high bit */ | |
1784 | } | |
1785 | else | |
1786 | { | |
1787 | error_message = ": There are only 32 f registers; [0-31]"; | |
1788 | goto error; | |
1789 | } | |
1790 | } | |
125f0b0d KR |
1791 | } |
1792 | else | |
1793 | { | |
1794 | break; | |
1795 | } /* if not an 'f' register. */ | |
355afbcd KR |
1796 | |
1797 | switch (*args) | |
1798 | { | |
355afbcd KR |
1799 | case 'v': |
1800 | case 'V': | |
1801 | case 'e': | |
1802 | opcode |= RS1 (mask); | |
1803 | continue; | |
1804 | ||
1805 | ||
1806 | case 'f': | |
1807 | case 'B': | |
1808 | case 'R': | |
1809 | opcode |= RS2 (mask); | |
1810 | continue; | |
1811 | ||
1812 | case 'g': | |
1813 | case 'H': | |
1814 | case 'J': | |
1815 | opcode |= RD (mask); | |
1816 | continue; | |
1817 | } /* pack it in. */ | |
1818 | ||
1819 | know (0); | |
1820 | break; | |
1821 | } /* float arg */ | |
1822 | ||
1823 | case 'F': | |
1824 | if (strncmp (s, "%fsr", 4) == 0) | |
1825 | { | |
1826 | s += 4; | |
1827 | continue; | |
1828 | } | |
1829 | break; | |
1830 | ||
2b063e6d ILT |
1831 | case '0': /* 64 bit immediate (setx insn) */ |
1832 | the_insn.reloc = BFD_RELOC_NONE; /* reloc handled elsewhere */ | |
1833 | goto immediate; | |
1834 | ||
355afbcd | 1835 | case 'h': /* high 22 bits */ |
428d312b | 1836 | the_insn.reloc = BFD_RELOC_HI22; |
355afbcd KR |
1837 | goto immediate; |
1838 | ||
1839 | case 'l': /* 22 bit PC relative immediate */ | |
428d312b | 1840 | the_insn.reloc = BFD_RELOC_SPARC_WDISP22; |
355afbcd KR |
1841 | the_insn.pcrel = 1; |
1842 | goto immediate; | |
1843 | ||
1844 | case 'L': /* 30 bit immediate */ | |
428d312b | 1845 | the_insn.reloc = BFD_RELOC_32_PCREL_S2; |
355afbcd KR |
1846 | the_insn.pcrel = 1; |
1847 | goto immediate; | |
1848 | ||
1849 | case 'n': /* 22 bit immediate */ | |
428d312b | 1850 | the_insn.reloc = BFD_RELOC_SPARC22; |
355afbcd KR |
1851 | goto immediate; |
1852 | ||
1853 | case 'i': /* 13 bit immediate */ | |
7ab2e983 | 1854 | the_insn.reloc = BFD_RELOC_SPARC13; |
355afbcd KR |
1855 | immediate_max = 0x0FFF; |
1856 | ||
1857 | /*FALLTHROUGH */ | |
1858 | ||
1859 | immediate: | |
1860 | if (*s == ' ') | |
1861 | s++; | |
1862 | if (*s == '%') | |
1863 | { | |
1864 | if ((c = s[1]) == 'h' && s[2] == 'i') | |
1865 | { | |
428d312b | 1866 | the_insn.reloc = BFD_RELOC_HI22; |
355afbcd KR |
1867 | s += 3; |
1868 | } | |
1869 | else if (c == 'l' && s[2] == 'o') | |
1870 | { | |
428d312b | 1871 | the_insn.reloc = BFD_RELOC_LO10; |
355afbcd | 1872 | s += 3; |
355afbcd KR |
1873 | } |
1874 | else if (c == 'u' | |
1875 | && s[2] == 'h' | |
1876 | && s[3] == 'i') | |
1877 | { | |
125f0b0d | 1878 | the_insn.reloc = BFD_RELOC_SPARC_HH22; |
355afbcd | 1879 | s += 4; |
6df07e7f | 1880 | v9_arg_p = 1; |
355afbcd KR |
1881 | } |
1882 | else if (c == 'u' | |
1883 | && s[2] == 'l' | |
1884 | && s[3] == 'o') | |
1885 | { | |
125f0b0d | 1886 | the_insn.reloc = BFD_RELOC_SPARC_HM10; |
355afbcd | 1887 | s += 4; |
6df07e7f | 1888 | v9_arg_p = 1; |
355afbcd KR |
1889 | } |
1890 | else | |
1891 | break; | |
1892 | } | |
9b6a882e KR |
1893 | /* Note that if the getExpression() fails, we will still |
1894 | have created U entries in the symbol table for the | |
1895 | 'symbols' in the input string. Try not to create U | |
1896 | symbols for registers, etc. */ | |
355afbcd | 1897 | { |
9b6a882e KR |
1898 | /* This stuff checks to see if the expression ends in |
1899 | +%reg. If it does, it removes the register from | |
1900 | the expression, and re-sets 's' to point to the | |
1901 | right place. */ | |
355afbcd KR |
1902 | |
1903 | char *s1; | |
1904 | ||
2b063e6d | 1905 | for (s1 = s; *s1 && *s1 != ',' && *s1 != ']'; s1++) ; |
355afbcd KR |
1906 | |
1907 | if (s1 != s && isdigit (s1[-1])) | |
1908 | { | |
1909 | if (s1[-2] == '%' && s1[-3] == '+') | |
1910 | { | |
1911 | s1 -= 3; | |
1912 | *s1 = '\0'; | |
1913 | (void) getExpression (s); | |
1914 | *s1 = '+'; | |
1915 | s = s1; | |
1916 | continue; | |
1917 | } | |
1918 | else if (strchr ("goli0123456789", s1[-2]) && s1[-3] == '%' && s1[-4] == '+') | |
1919 | { | |
1920 | s1 -= 4; | |
1921 | *s1 = '\0'; | |
1922 | (void) getExpression (s); | |
1923 | *s1 = '+'; | |
1924 | s = s1; | |
1925 | continue; | |
1926 | } | |
1927 | } | |
1928 | } | |
1929 | (void) getExpression (s); | |
1930 | s = expr_end; | |
1931 | ||
9b6a882e KR |
1932 | if (the_insn.exp.X_op == O_constant |
1933 | && the_insn.exp.X_add_symbol == 0 | |
1934 | && the_insn.exp.X_op_symbol == 0) | |
1935 | { | |
7ab2e983 ILT |
1936 | /* Handle %uhi/%ulo by moving the upper word to the lower |
1937 | one and pretending it's %hi/%lo. We also need to watch | |
1938 | for %hi/%lo: the top word needs to be zeroed otherwise | |
1939 | fixup_segment will complain the value is too big. */ | |
9b6a882e KR |
1940 | switch (the_insn.reloc) |
1941 | { | |
1942 | case BFD_RELOC_SPARC_HH22: | |
1943 | the_insn.reloc = BFD_RELOC_HI22; | |
5e0a90a8 | 1944 | the_insn.exp.X_add_number = BSR (the_insn.exp.X_add_number, 32); |
9b6a882e KR |
1945 | break; |
1946 | case BFD_RELOC_SPARC_HM10: | |
1947 | the_insn.reloc = BFD_RELOC_LO10; | |
5e0a90a8 | 1948 | the_insn.exp.X_add_number = BSR (the_insn.exp.X_add_number, 32); |
9b6a882e | 1949 | break; |
7ab2e983 ILT |
1950 | case BFD_RELOC_HI22: |
1951 | case BFD_RELOC_LO10: | |
1952 | the_insn.exp.X_add_number &= 0xffffffff; | |
1953 | break; | |
6df07e7f DE |
1954 | default: |
1955 | break; | |
9b6a882e | 1956 | } |
6df07e7f | 1957 | |
7ab2e983 ILT |
1958 | /* For pc-relative call instructions, we reject |
1959 | constants to get better code. */ | |
1960 | if (the_insn.pcrel | |
1961 | && the_insn.reloc == BFD_RELOC_32_PCREL_S2 | |
1962 | && in_signed_range (the_insn.exp.X_add_number, 0x3fff) | |
1963 | ) | |
1964 | { | |
1965 | error_message = ": PC-relative operand can't be a constant"; | |
1966 | goto error; | |
1967 | } | |
9b6a882e KR |
1968 | /* Check for invalid constant values. Don't warn if |
1969 | constant was inside %hi or %lo, since these | |
1970 | truncate the constant to fit. */ | |
1971 | if (immediate_max != 0 | |
1972 | && the_insn.reloc != BFD_RELOC_LO10 | |
1973 | && the_insn.reloc != BFD_RELOC_HI22 | |
7ab2e983 ILT |
1974 | && !in_signed_range (the_insn.exp.X_add_number, |
1975 | immediate_max) | |
1976 | ) | |
1977 | { | |
1978 | if (the_insn.pcrel) | |
1979 | /* Who knows? After relocation, we may be within | |
1980 | range. Let the linker figure it out. */ | |
1981 | { | |
1982 | the_insn.exp.X_op = O_symbol; | |
1983 | the_insn.exp.X_add_symbol = section_symbol (absolute_section); | |
1984 | } | |
1985 | else | |
1986 | /* Immediate value is non-pcrel, and out of | |
1987 | range. */ | |
1988 | as_bad ("constant value %ld out of range (%ld .. %ld)", | |
1989 | the_insn.exp.X_add_number, | |
1990 | ~immediate_max, immediate_max); | |
1991 | } | |
9b6a882e KR |
1992 | } |
1993 | ||
355afbcd KR |
1994 | /* Reset to prevent extraneous range check. */ |
1995 | immediate_max = 0; | |
1996 | ||
1997 | continue; | |
1998 | ||
1999 | case 'a': | |
2000 | if (*s++ == 'a') | |
2001 | { | |
2002 | opcode |= ANNUL; | |
2003 | continue; | |
2004 | } | |
2005 | break; | |
2006 | ||
2007 | case 'A': | |
2008 | { | |
ed9638af KR |
2009 | int asi = 0; |
2010 | ||
2011 | /* Parse an asi. */ | |
2012 | if (*s == '#') | |
2013 | { | |
6df07e7f | 2014 | if (! parse_keyword_arg (sparc_encode_asi, &s, &asi)) |
ed9638af | 2015 | { |
6df07e7f | 2016 | error_message = ": invalid ASI name"; |
ed9638af KR |
2017 | goto error; |
2018 | } | |
2019 | } | |
a7aa7a2b | 2020 | else |
ed9638af | 2021 | { |
6df07e7f | 2022 | if (! parse_const_expr_arg (&s, &asi)) |
a7aa7a2b | 2023 | { |
6df07e7f | 2024 | error_message = ": invalid ASI expression"; |
a7aa7a2b ILT |
2025 | goto error; |
2026 | } | |
ed9638af KR |
2027 | if (asi < 0 || asi > 255) |
2028 | { | |
6df07e7f | 2029 | error_message = ": invalid ASI number"; |
ed9638af KR |
2030 | goto error; |
2031 | } | |
2032 | } | |
ed9638af KR |
2033 | opcode |= ASI (asi); |
2034 | continue; | |
355afbcd KR |
2035 | } /* alternate space */ |
2036 | ||
2037 | case 'p': | |
2038 | if (strncmp (s, "%psr", 4) == 0) | |
2039 | { | |
2040 | s += 4; | |
2041 | continue; | |
2042 | } | |
2043 | break; | |
2044 | ||
2045 | case 'q': /* floating point queue */ | |
2046 | if (strncmp (s, "%fq", 3) == 0) | |
2047 | { | |
2048 | s += 3; | |
2049 | continue; | |
2050 | } | |
2051 | break; | |
2052 | ||
2053 | case 'Q': /* coprocessor queue */ | |
2054 | if (strncmp (s, "%cq", 3) == 0) | |
2055 | { | |
2056 | s += 3; | |
2057 | continue; | |
2058 | } | |
2059 | break; | |
2060 | ||
2061 | case 'S': | |
2b063e6d ILT |
2062 | if (strcmp (str, "set") == 0 |
2063 | || strcmp (str, "setuw") == 0) | |
355afbcd KR |
2064 | { |
2065 | special_case = SPECIAL_CASE_SET; | |
2066 | continue; | |
2067 | } | |
2b063e6d ILT |
2068 | else if (strcmp (str, "setsw") == 0) |
2069 | { | |
2070 | special_case = SPECIAL_CASE_SETSW; | |
2071 | continue; | |
2072 | } | |
2073 | else if (strcmp (str, "setx") == 0) | |
2074 | { | |
2075 | special_case = SPECIAL_CASE_SETX; | |
2076 | continue; | |
2077 | } | |
355afbcd KR |
2078 | else if (strncmp (str, "fdiv", 4) == 0) |
2079 | { | |
2080 | special_case = SPECIAL_CASE_FDIV; | |
2081 | continue; | |
2082 | } | |
2083 | break; | |
2084 | ||
355afbcd KR |
2085 | case 'o': |
2086 | if (strncmp (s, "%asi", 4) != 0) | |
2087 | break; | |
2088 | s += 4; | |
2089 | continue; | |
2090 | ||
2091 | case 's': | |
2092 | if (strncmp (s, "%fprs", 5) != 0) | |
2093 | break; | |
2094 | s += 5; | |
2095 | continue; | |
2096 | ||
2097 | case 'E': | |
2098 | if (strncmp (s, "%ccr", 4) != 0) | |
2099 | break; | |
2100 | s += 4; | |
2101 | continue; | |
680227f3 | 2102 | |
355afbcd KR |
2103 | case 't': |
2104 | if (strncmp (s, "%tbr", 4) != 0) | |
2105 | break; | |
2106 | s += 4; | |
2107 | continue; | |
2108 | ||
2109 | case 'w': | |
2110 | if (strncmp (s, "%wim", 4) != 0) | |
2111 | break; | |
2112 | s += 4; | |
2113 | continue; | |
2114 | ||
5e0a90a8 KR |
2115 | case 'x': |
2116 | { | |
2117 | char *push = input_line_pointer; | |
2118 | expressionS e; | |
2119 | ||
2120 | input_line_pointer = s; | |
2121 | expression (&e); | |
2122 | if (e.X_op == O_constant) | |
2123 | { | |
2124 | int n = e.X_add_number; | |
2125 | if (n != e.X_add_number || (n & ~0x1ff) != 0) | |
2126 | as_bad ("OPF immediate operand out of range (0-0x1ff)"); | |
2127 | else | |
2128 | opcode |= e.X_add_number << 5; | |
2129 | } | |
2130 | else | |
2131 | as_bad ("non-immediate OPF operand, ignored"); | |
2132 | s = input_line_pointer; | |
2133 | input_line_pointer = push; | |
2134 | continue; | |
2135 | } | |
5e0a90a8 | 2136 | |
355afbcd KR |
2137 | case 'y': |
2138 | if (strncmp (s, "%y", 2) != 0) | |
2139 | break; | |
2140 | s += 2; | |
2141 | continue; | |
2142 | ||
e86d5cf3 DE |
2143 | case 'u': |
2144 | case 'U': | |
2145 | { | |
2146 | /* Parse a sparclet cpreg. */ | |
2147 | int cpreg; | |
2148 | if (! parse_keyword_arg (sparc_encode_sparclet_cpreg, &s, &cpreg)) | |
2149 | { | |
2150 | error_message = ": invalid cpreg name"; | |
2151 | goto error; | |
2152 | } | |
2153 | opcode |= (*args == 'U' ? RS1 (cpreg) : RD (cpreg)); | |
2154 | continue; | |
2155 | } | |
2156 | ||
355afbcd KR |
2157 | default: |
2158 | as_fatal ("failed sanity check."); | |
2159 | } /* switch on arg code */ | |
6df07e7f DE |
2160 | |
2161 | /* Break out of for() loop. */ | |
355afbcd KR |
2162 | break; |
2163 | } /* for each arg that we expect */ | |
6df07e7f | 2164 | |
355afbcd KR |
2165 | error: |
2166 | if (match == 0) | |
2167 | { | |
2168 | /* Args don't match. */ | |
e70ad5d5 | 2169 | if (((unsigned) (&insn[1] - sparc_opcodes)) < sparc_num_opcodes |
a7aa7a2b ILT |
2170 | && (insn->name == insn[1].name |
2171 | || !strcmp (insn->name, insn[1].name))) | |
355afbcd KR |
2172 | { |
2173 | ++insn; | |
2174 | s = argsStart; | |
2175 | continue; | |
2176 | } | |
2177 | else | |
2178 | { | |
2179 | as_bad ("Illegal operands%s", error_message); | |
2180 | return; | |
2181 | } | |
2182 | } | |
2183 | else | |
2184 | { | |
e70ad5d5 | 2185 | /* We have a match. Now see if the architecture is ok. */ |
d8b42b96 | 2186 | int needed_arch_mask = insn->architecture; |
e70ad5d5 | 2187 | |
d8b42b96 | 2188 | if (v9_arg_p) |
355afbcd | 2189 | { |
d8b42b96 DE |
2190 | needed_arch_mask &= ~ ((1 << SPARC_OPCODE_ARCH_V9) |
2191 | | (1 << SPARC_OPCODE_ARCH_V9A)); | |
2192 | needed_arch_mask |= (1 << SPARC_OPCODE_ARCH_V9); | |
e70ad5d5 | 2193 | } |
d8b42b96 DE |
2194 | |
2195 | if (needed_arch_mask & SPARC_OPCODE_SUPPORTED (current_architecture)) | |
2196 | ; /* ok */ | |
2197 | /* Can we bump up the architecture? */ | |
2198 | else if (needed_arch_mask & SPARC_OPCODE_SUPPORTED (max_architecture)) | |
e70ad5d5 | 2199 | { |
d8b42b96 DE |
2200 | enum sparc_opcode_arch_val needed_architecture = |
2201 | sparc_ffs (SPARC_OPCODE_SUPPORTED (max_architecture) | |
2202 | & needed_arch_mask); | |
2203 | ||
2204 | assert (needed_architecture <= SPARC_OPCODE_ARCH_MAX); | |
e70ad5d5 DE |
2205 | if (warn_on_bump |
2206 | && needed_architecture > warn_after_architecture) | |
355afbcd | 2207 | { |
e70ad5d5 DE |
2208 | as_warn ("architecture bumped from \"%s\" to \"%s\" on \"%s\"", |
2209 | sparc_opcode_archs[current_architecture].name, | |
2210 | sparc_opcode_archs[needed_architecture].name, | |
2211 | str); | |
d8b42b96 | 2212 | warn_after_architecture = needed_architecture; |
355afbcd | 2213 | } |
e70ad5d5 DE |
2214 | current_architecture = needed_architecture; |
2215 | } | |
d8b42b96 | 2216 | /* Conflict. */ |
110b814d DE |
2217 | /* ??? This seems to be a bit fragile. What if the next entry in |
2218 | the opcode table is the one we want and it is supported? | |
2219 | It is possible to arrange the table today so that this can't | |
2220 | happen but what about tomorrow? */ | |
d8b42b96 DE |
2221 | else |
2222 | { | |
110b814d DE |
2223 | int arch,printed_one_p = 0; |
2224 | char *p; | |
2225 | char required_archs[SPARC_OPCODE_ARCH_MAX * 16]; | |
2226 | ||
2227 | /* Create a list of the architectures that support the insn. */ | |
2228 | needed_arch_mask &= ~ SPARC_OPCODE_SUPPORTED (max_architecture); | |
2229 | p = required_archs; | |
2230 | arch = sparc_ffs (needed_arch_mask); | |
2231 | while ((1 << arch) <= needed_arch_mask) | |
2232 | { | |
2233 | if ((1 << arch) & needed_arch_mask) | |
2234 | { | |
2235 | if (printed_one_p) | |
2236 | *p++ = '|'; | |
2237 | strcpy (p, sparc_opcode_archs[arch].name); | |
2238 | p += strlen (p); | |
2239 | printed_one_p = 1; | |
2240 | } | |
2241 | ++arch; | |
2242 | } | |
d8b42b96 | 2243 | |
d8b42b96 DE |
2244 | as_bad ("Architecture mismatch on \"%s\".", str); |
2245 | as_tsktsk (" (Requires %s; requested architecture is %s.)", | |
110b814d | 2246 | required_archs, |
d8b42b96 DE |
2247 | sparc_opcode_archs[max_architecture].name); |
2248 | return; | |
2249 | } | |
e70ad5d5 | 2250 | } /* if no match */ |
355afbcd KR |
2251 | |
2252 | break; | |
e70ad5d5 | 2253 | } /* forever looking for a match */ |
355afbcd KR |
2254 | |
2255 | the_insn.opcode = opcode; | |
c999fd9f | 2256 | } |
355afbcd KR |
2257 | |
2258 | static int | |
2259 | getExpression (str) | |
2260 | char *str; | |
fecd2382 | 2261 | { |
355afbcd KR |
2262 | char *save_in; |
2263 | segT seg; | |
2264 | ||
2265 | save_in = input_line_pointer; | |
2266 | input_line_pointer = str; | |
428d312b | 2267 | seg = expression (&the_insn.exp); |
58d4951d ILT |
2268 | if (seg != absolute_section |
2269 | && seg != text_section | |
2270 | && seg != data_section | |
2271 | && seg != bss_section | |
2272 | && seg != undefined_section) | |
355afbcd | 2273 | { |
355afbcd KR |
2274 | the_insn.error = "bad segment"; |
2275 | expr_end = input_line_pointer; | |
2276 | input_line_pointer = save_in; | |
2277 | return 1; | |
2278 | } | |
2279 | expr_end = input_line_pointer; | |
2280 | input_line_pointer = save_in; | |
2281 | return 0; | |
2282 | } /* getExpression() */ | |
fecd2382 RP |
2283 | |
2284 | ||
2285 | /* | |
2286 | This is identical to the md_atof in m68k.c. I think this is right, | |
2287 | but I'm not sure. | |
355afbcd | 2288 | |
fecd2382 RP |
2289 | Turn a string in input_line_pointer into a floating point constant of type |
2290 | type, and store the appropriate bytes in *litP. The number of LITTLENUMS | |
2291 | emitted is stored in *sizeP . An error message is returned, or NULL on OK. | |
2292 | */ | |
2293 | ||
2294 | /* Equal to MAX_PRECISION in atof-ieee.c */ | |
2295 | #define MAX_LITTLENUMS 6 | |
2296 | ||
355afbcd KR |
2297 | char * |
2298 | md_atof (type, litP, sizeP) | |
2299 | char type; | |
2300 | char *litP; | |
2301 | int *sizeP; | |
fecd2382 | 2302 | { |
2b063e6d | 2303 | int i,prec; |
355afbcd | 2304 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; |
355afbcd KR |
2305 | char *t; |
2306 | char *atof_ieee (); | |
2307 | ||
2308 | switch (type) | |
2309 | { | |
355afbcd KR |
2310 | case 'f': |
2311 | case 'F': | |
2312 | case 's': | |
2313 | case 'S': | |
2314 | prec = 2; | |
2315 | break; | |
2316 | ||
2317 | case 'd': | |
2318 | case 'D': | |
2319 | case 'r': | |
2320 | case 'R': | |
2321 | prec = 4; | |
2322 | break; | |
2323 | ||
2324 | case 'x': | |
2325 | case 'X': | |
2326 | prec = 6; | |
2327 | break; | |
2328 | ||
2329 | case 'p': | |
2330 | case 'P': | |
2331 | prec = 6; | |
2332 | break; | |
2333 | ||
2334 | default: | |
2335 | *sizeP = 0; | |
2336 | return "Bad call to MD_ATOF()"; | |
2337 | } | |
2b063e6d | 2338 | |
355afbcd KR |
2339 | t = atof_ieee (input_line_pointer, type, words); |
2340 | if (t) | |
2341 | input_line_pointer = t; | |
2342 | *sizeP = prec * sizeof (LITTLENUM_TYPE); | |
2b063e6d ILT |
2343 | |
2344 | if (target_big_endian) | |
355afbcd | 2345 | { |
2b063e6d ILT |
2346 | for (i = 0; i < prec; i++) |
2347 | { | |
2348 | md_number_to_chars (litP, (valueT) words[i], sizeof (LITTLENUM_TYPE)); | |
2349 | litP += sizeof (LITTLENUM_TYPE); | |
2350 | } | |
2351 | } | |
2352 | else | |
2353 | { | |
2354 | for (i = prec - 1; i >= 0; i--) | |
2355 | { | |
2356 | md_number_to_chars (litP, (valueT) words[i], sizeof (LITTLENUM_TYPE)); | |
2357 | litP += sizeof (LITTLENUM_TYPE); | |
2358 | } | |
355afbcd | 2359 | } |
2b063e6d | 2360 | |
ed9638af KR |
2361 | return 0; |
2362 | } | |
fecd2382 | 2363 | |
2b063e6d ILT |
2364 | /* Write a value out to the object file, using the appropriate |
2365 | endianness. */ | |
2366 | ||
355afbcd KR |
2367 | void |
2368 | md_number_to_chars (buf, val, n) | |
2369 | char *buf; | |
125f0b0d | 2370 | valueT val; |
355afbcd | 2371 | int n; |
fecd2382 | 2372 | { |
2b063e6d ILT |
2373 | if (target_big_endian) |
2374 | number_to_chars_bigendian (buf, val, n); | |
2375 | else | |
2376 | number_to_chars_littleendian (buf, val, n); | |
c999fd9f | 2377 | } |
fecd2382 RP |
2378 | |
2379 | /* Apply a fixS to the frags, now that we know the value it ought to | |
2380 | hold. */ | |
2381 | ||
428d312b | 2382 | int |
2b063e6d | 2383 | md_apply_fix3 (fixP, value, segment) |
355afbcd | 2384 | fixS *fixP; |
125f0b0d | 2385 | valueT *value; |
2b063e6d | 2386 | segT segment; |
fecd2382 | 2387 | { |
355afbcd | 2388 | char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; |
125f0b0d | 2389 | offsetT val; |
2b063e6d | 2390 | long insn; |
428d312b | 2391 | |
428d312b | 2392 | val = *value; |
355afbcd | 2393 | |
428d312b | 2394 | assert (fixP->fx_r_type < BFD_RELOC_UNUSED); |
355afbcd KR |
2395 | |
2396 | fixP->fx_addnumber = val; /* Remember value for emit_reloc */ | |
2397 | ||
7766838e ILT |
2398 | #ifdef OBJ_ELF |
2399 | /* FIXME: SPARC ELF relocations don't use an addend in the data | |
2400 | field itself. This whole approach should be somehow combined | |
a7aa7a2b ILT |
2401 | with the calls to bfd_perform_relocation. Also, the value passed |
2402 | in by fixup_segment includes the value of a defined symbol. We | |
2403 | don't want to include the value of an externally visible symbol. */ | |
7766838e | 2404 | if (fixP->fx_addsy != NULL) |
a7aa7a2b | 2405 | { |
2b063e6d ILT |
2406 | if (fixP->fx_addsy->sy_used_in_reloc |
2407 | && (S_IS_EXTERNAL (fixP->fx_addsy) | |
2408 | || S_IS_WEAK (fixP->fx_addsy) | |
2409 | || (sparc_pic_code && ! fixP->fx_pcrel) | |
2410 | || (S_GET_SEGMENT (fixP->fx_addsy) != segment | |
2411 | && ((bfd_get_section_flags (stdoutput, | |
2412 | S_GET_SEGMENT (fixP->fx_addsy)) | |
2413 | & SEC_LINK_ONCE) != 0 | |
2414 | || strncmp (segment_name (S_GET_SEGMENT (fixP->fx_addsy)), | |
2415 | ".gnu.linkonce", | |
2416 | sizeof ".gnu.linkonce" - 1) == 0))) | |
a7aa7a2b ILT |
2417 | && S_GET_SEGMENT (fixP->fx_addsy) != absolute_section |
2418 | && S_GET_SEGMENT (fixP->fx_addsy) != undefined_section | |
2419 | && ! bfd_is_com_section (S_GET_SEGMENT (fixP->fx_addsy))) | |
2420 | fixP->fx_addnumber -= S_GET_VALUE (fixP->fx_addsy); | |
2421 | return 1; | |
2422 | } | |
7766838e ILT |
2423 | #endif |
2424 | ||
c999fd9f KR |
2425 | /* This is a hack. There should be a better way to |
2426 | handle this. Probably in terms of howto fields, once | |
2427 | we can look at these fixups in terms of howtos. */ | |
428d312b | 2428 | if (fixP->fx_r_type == BFD_RELOC_32_PCREL_S2 && fixP->fx_addsy) |
c999fd9f | 2429 | val += fixP->fx_where + fixP->fx_frag->fr_address; |
355afbcd | 2430 | |
ade614d5 KR |
2431 | #ifdef OBJ_AOUT |
2432 | /* FIXME: More ridiculous gas reloc hacking. If we are going to | |
2433 | generate a reloc, then we just want to let the reloc addend set | |
2434 | the value. We do not want to also stuff the addend into the | |
2435 | object file. Including the addend in the object file works when | |
2436 | doing a static link, because the linker will ignore the object | |
2437 | file contents. However, the dynamic linker does not ignore the | |
2438 | object file contents. */ | |
2439 | if (fixP->fx_addsy != NULL | |
2440 | && fixP->fx_r_type != BFD_RELOC_32_PCREL_S2) | |
2441 | val = 0; | |
4c67b523 ILT |
2442 | |
2443 | /* When generating PIC code, we do not want an addend for a reloc | |
2444 | against a local symbol. We adjust fx_addnumber to cancel out the | |
2445 | value already included in val, and to also cancel out the | |
2446 | adjustment which bfd_install_relocation will create. */ | |
2447 | if (sparc_pic_code | |
2448 | && fixP->fx_r_type != BFD_RELOC_32_PCREL_S2 | |
2449 | && fixP->fx_addsy != NULL | |
2450 | && ! S_IS_COMMON (fixP->fx_addsy) | |
2451 | && (fixP->fx_addsy->bsym->flags & BSF_SECTION_SYM) == 0) | |
2452 | fixP->fx_addnumber -= 2 * S_GET_VALUE (fixP->fx_addsy); | |
ade614d5 KR |
2453 | #endif |
2454 | ||
2b063e6d | 2455 | /* If this is a data relocation, just output VAL. */ |
58d4951d | 2456 | |
2b063e6d ILT |
2457 | if (fixP->fx_r_type == BFD_RELOC_16) |
2458 | { | |
2459 | md_number_to_chars (buf, val, 2); | |
2460 | } | |
2461 | else if (fixP->fx_r_type == BFD_RELOC_32) | |
2462 | { | |
2463 | md_number_to_chars (buf, val, 4); | |
2464 | } | |
2465 | else if (fixP->fx_r_type == BFD_RELOC_64) | |
2466 | { | |
2467 | md_number_to_chars (buf, val, 8); | |
2468 | } | |
2469 | else | |
2470 | { | |
2471 | /* It's a relocation against an instruction. */ | |
355afbcd | 2472 | |
2b063e6d ILT |
2473 | if (INSN_BIG_ENDIAN) |
2474 | insn = bfd_getb32 ((unsigned char *) buf); | |
2475 | else | |
2476 | insn = bfd_getl32 ((unsigned char *) buf); | |
2477 | ||
2478 | switch (fixP->fx_r_type) | |
2479 | { | |
2480 | case BFD_RELOC_32_PCREL_S2: | |
2481 | val = val >> 2; | |
2482 | /* FIXME: This increment-by-one deserves a comment of why it's | |
2483 | being done! */ | |
2484 | if (! sparc_pic_code | |
2485 | || fixP->fx_addsy == NULL | |
2486 | || (fixP->fx_addsy->bsym->flags & BSF_SECTION_SYM) != 0) | |
2487 | ++val; | |
2488 | insn |= val & 0x3fffffff; | |
2489 | break; | |
693b21e7 | 2490 | |
2b063e6d ILT |
2491 | case BFD_RELOC_SPARC_11: |
2492 | if (! in_signed_range (val, 0x7ff)) | |
2493 | as_bad ("relocation overflow."); | |
2494 | insn |= val & 0x7ff; | |
2495 | break; | |
355afbcd | 2496 | |
2b063e6d ILT |
2497 | case BFD_RELOC_SPARC_10: |
2498 | if (! in_signed_range (val, 0x3ff)) | |
2499 | as_bad ("relocation overflow."); | |
2500 | insn |= val & 0x3ff; | |
2501 | break; | |
355afbcd | 2502 | |
2b063e6d ILT |
2503 | case BFD_RELOC_SPARC_6: |
2504 | if (! in_bitfield_range (val, 0x3f)) | |
2505 | as_bad ("relocation overflow."); | |
2506 | insn |= val & 0x3f; | |
2507 | break; | |
355afbcd | 2508 | |
2b063e6d ILT |
2509 | case BFD_RELOC_SPARC_5: |
2510 | if (! in_bitfield_range (val, 0x1f)) | |
2511 | as_bad ("relocation overflow."); | |
2512 | insn |= val & 0x1f; | |
2513 | break; | |
8dd07a84 | 2514 | |
2b063e6d ILT |
2515 | case BFD_RELOC_SPARC_WDISP16: |
2516 | /* FIXME: simplify */ | |
2517 | if (((val > 0) && (val & ~0x3fffc)) | |
2518 | || ((val < 0) && (~(val - 1) & ~0x3fffc))) | |
2519 | as_bad ("relocation overflow."); | |
2520 | /* FIXME: The +1 deserves a comment. */ | |
2521 | val = (val >> 2) + 1; | |
2522 | insn |= ((val & 0xc000) << 6) | (val & 0x3fff); | |
2523 | break; | |
8dd07a84 | 2524 | |
2b063e6d ILT |
2525 | case BFD_RELOC_SPARC_WDISP19: |
2526 | /* FIXME: simplify */ | |
2527 | if (((val > 0) && (val & ~0x1ffffc)) | |
2528 | || ((val < 0) && (~(val - 1) & ~0x1ffffc))) | |
2529 | as_bad ("relocation overflow."); | |
2530 | /* FIXME: The +1 deserves a comment. */ | |
2531 | val = (val >> 2) + 1; | |
2532 | insn |= val & 0x7ffff; | |
2533 | break; | |
8dd07a84 | 2534 | |
2b063e6d ILT |
2535 | case BFD_RELOC_SPARC_HH22: |
2536 | val = BSR (val, 32); | |
2537 | /* intentional fallthrough */ | |
8dd07a84 | 2538 | |
2b063e6d ILT |
2539 | case BFD_RELOC_SPARC_LM22: |
2540 | case BFD_RELOC_HI22: | |
2541 | if (!fixP->fx_addsy) | |
2542 | { | |
2543 | insn |= (val >> 10) & 0x3fffff; | |
2544 | } | |
2545 | else | |
2546 | { | |
2547 | /* FIXME: Need comment explaining why we do this. */ | |
2548 | insn &= ~0xffff; | |
2549 | } | |
2550 | break; | |
355afbcd | 2551 | |
2b063e6d ILT |
2552 | case BFD_RELOC_SPARC22: |
2553 | if (val & ~0x003fffff) | |
2554 | as_bad ("relocation overflow"); | |
2555 | insn |= (val & 0x3fffff); | |
2556 | break; | |
355afbcd | 2557 | |
2b063e6d ILT |
2558 | case BFD_RELOC_SPARC_HM10: |
2559 | val = BSR (val, 32); | |
2560 | /* intentional fallthrough */ | |
355afbcd | 2561 | |
2b063e6d ILT |
2562 | case BFD_RELOC_LO10: |
2563 | if (!fixP->fx_addsy) | |
2564 | { | |
2565 | insn |= val & 0x3ff; | |
2566 | } | |
2567 | else | |
2568 | { | |
2569 | /* FIXME: Need comment explaining why we do this. */ | |
2570 | insn &= ~0xff; | |
2571 | } | |
2572 | break; | |
355afbcd | 2573 | |
2b063e6d ILT |
2574 | case BFD_RELOC_SPARC13: |
2575 | if (! in_signed_range (val, 0x1fff)) | |
2576 | as_bad ("relocation overflow"); | |
2577 | insn |= val & 0x1fff; | |
2578 | break; | |
355afbcd | 2579 | |
2b063e6d ILT |
2580 | case BFD_RELOC_SPARC_WDISP22: |
2581 | val = (val >> 2) + 1; | |
2582 | /* FALLTHROUGH */ | |
2583 | case BFD_RELOC_SPARC_BASE22: | |
2584 | insn |= val & 0x3fffff; | |
2585 | break; | |
355afbcd | 2586 | |
2b063e6d ILT |
2587 | case BFD_RELOC_NONE: |
2588 | default: | |
2589 | as_bad ("bad or unhandled relocation type: 0x%02x", fixP->fx_r_type); | |
2590 | break; | |
355afbcd | 2591 | } |
355afbcd | 2592 | |
2b063e6d ILT |
2593 | if (INSN_BIG_ENDIAN) |
2594 | bfd_putb32 (insn, (unsigned char *) buf); | |
355afbcd | 2595 | else |
2b063e6d | 2596 | bfd_putl32 (insn, (unsigned char *) buf); |
355afbcd | 2597 | } |
428d312b | 2598 | |
7ab2e983 ILT |
2599 | /* Are we finished with this relocation now? */ |
2600 | if (fixP->fx_addsy == 0 && !fixP->fx_pcrel) | |
2601 | fixP->fx_done = 1; | |
2602 | ||
428d312b | 2603 | return 1; |
428d312b | 2604 | } |
fecd2382 | 2605 | |
428d312b KR |
2606 | /* Translate internal representation of relocation info to BFD target |
2607 | format. */ | |
2608 | arelent * | |
2609 | tc_gen_reloc (section, fixp) | |
2610 | asection *section; | |
2611 | fixS *fixp; | |
2612 | { | |
2613 | arelent *reloc; | |
2614 | bfd_reloc_code_real_type code; | |
2615 | ||
2616 | reloc = (arelent *) bfd_alloc_by_size_t (stdoutput, sizeof (arelent)); | |
2617 | assert (reloc != 0); | |
2618 | ||
2619 | reloc->sym_ptr_ptr = &fixp->fx_addsy->bsym; | |
2620 | reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; | |
428d312b | 2621 | |
428d312b KR |
2622 | switch (fixp->fx_r_type) |
2623 | { | |
58d4951d | 2624 | case BFD_RELOC_16: |
428d312b KR |
2625 | case BFD_RELOC_32: |
2626 | case BFD_RELOC_HI22: | |
2627 | case BFD_RELOC_LO10: | |
2628 | case BFD_RELOC_32_PCREL_S2: | |
7ab2e983 | 2629 | case BFD_RELOC_SPARC13: |
428d312b | 2630 | case BFD_RELOC_SPARC_BASE13: |
a7aa7a2b ILT |
2631 | case BFD_RELOC_SPARC_WDISP16: |
2632 | case BFD_RELOC_SPARC_WDISP19: | |
ed9638af | 2633 | case BFD_RELOC_SPARC_WDISP22: |
693b21e7 | 2634 | case BFD_RELOC_64: |
8dd07a84 ILT |
2635 | case BFD_RELOC_SPARC_5: |
2636 | case BFD_RELOC_SPARC_6: | |
125f0b0d KR |
2637 | case BFD_RELOC_SPARC_10: |
2638 | case BFD_RELOC_SPARC_11: | |
2639 | case BFD_RELOC_SPARC_HH22: | |
2640 | case BFD_RELOC_SPARC_HM10: | |
2641 | case BFD_RELOC_SPARC_LM22: | |
2642 | case BFD_RELOC_SPARC_PC_HH22: | |
2643 | case BFD_RELOC_SPARC_PC_HM10: | |
2644 | case BFD_RELOC_SPARC_PC_LM22: | |
428d312b KR |
2645 | code = fixp->fx_r_type; |
2646 | break; | |
2647 | default: | |
2648 | abort (); | |
2649 | } | |
4c67b523 ILT |
2650 | |
2651 | #if defined (OBJ_ELF) || defined (OBJ_AOUT) | |
2652 | /* If we are generating PIC code, we need to generate a different | |
2653 | set of relocs. */ | |
2654 | ||
2655 | #ifdef OBJ_ELF | |
2656 | #define GOT_NAME "_GLOBAL_OFFSET_TABLE_" | |
2657 | #else | |
2658 | #define GOT_NAME "__GLOBAL_OFFSET_TABLE_" | |
2659 | #endif | |
2660 | ||
2661 | if (sparc_pic_code) | |
2662 | { | |
2663 | switch (code) | |
2664 | { | |
2665 | case BFD_RELOC_32_PCREL_S2: | |
2666 | if (! S_IS_DEFINED (fixp->fx_addsy) | |
21965655 ILT |
2667 | || S_IS_EXTERNAL (fixp->fx_addsy) |
2668 | || S_IS_WEAK (fixp->fx_addsy)) | |
4c67b523 ILT |
2669 | code = BFD_RELOC_SPARC_WPLT30; |
2670 | break; | |
2671 | case BFD_RELOC_HI22: | |
2672 | if (fixp->fx_addsy != NULL | |
2673 | && strcmp (S_GET_NAME (fixp->fx_addsy), GOT_NAME) == 0) | |
2674 | code = BFD_RELOC_SPARC_PC22; | |
2675 | else | |
2676 | code = BFD_RELOC_SPARC_GOT22; | |
2677 | break; | |
2678 | case BFD_RELOC_LO10: | |
2679 | if (fixp->fx_addsy != NULL | |
2680 | && strcmp (S_GET_NAME (fixp->fx_addsy), GOT_NAME) == 0) | |
2681 | code = BFD_RELOC_SPARC_PC10; | |
2682 | else | |
2683 | code = BFD_RELOC_SPARC_GOT10; | |
2684 | break; | |
2685 | case BFD_RELOC_SPARC13: | |
2686 | code = BFD_RELOC_SPARC_GOT13; | |
2687 | break; | |
2688 | default: | |
2689 | break; | |
2690 | } | |
2691 | } | |
2692 | #endif /* defined (OBJ_ELF) || defined (OBJ_AOUT) */ | |
2693 | ||
428d312b | 2694 | reloc->howto = bfd_reloc_type_lookup (stdoutput, code); |
a7129c48 KR |
2695 | if (reloc->howto == 0) |
2696 | { | |
2697 | as_bad_where (fixp->fx_file, fixp->fx_line, | |
ade614d5 KR |
2698 | "internal error: can't export reloc type %d (`%s')", |
2699 | fixp->fx_r_type, bfd_get_reloc_code_name (code)); | |
a7129c48 KR |
2700 | return 0; |
2701 | } | |
c999fd9f KR |
2702 | |
2703 | /* @@ Why fx_addnumber sometimes and fx_offset other times? */ | |
a7aa7a2b ILT |
2704 | #ifdef OBJ_AOUT |
2705 | ||
4c67b523 ILT |
2706 | if (reloc->howto->pc_relative == 0 |
2707 | || code == BFD_RELOC_SPARC_PC10 | |
2708 | || code == BFD_RELOC_SPARC_PC22) | |
a7aa7a2b ILT |
2709 | reloc->addend = fixp->fx_addnumber; |
2710 | else | |
2711 | reloc->addend = fixp->fx_offset - reloc->address; | |
2712 | ||
2713 | #else /* elf or coff */ | |
2714 | ||
4c67b523 ILT |
2715 | if (reloc->howto->pc_relative == 0 |
2716 | || code == BFD_RELOC_SPARC_PC10 | |
2717 | || code == BFD_RELOC_SPARC_PC22) | |
c999fd9f | 2718 | reloc->addend = fixp->fx_addnumber; |
7ab2e983 ILT |
2719 | else if ((fixp->fx_addsy->bsym->flags & BSF_SECTION_SYM) != 0) |
2720 | reloc->addend = (section->vma | |
2721 | + fixp->fx_addnumber | |
2722 | + md_pcrel_from (fixp)); | |
c999fd9f | 2723 | else |
a7aa7a2b | 2724 | reloc->addend = fixp->fx_offset; |
a7aa7a2b | 2725 | #endif |
428d312b KR |
2726 | |
2727 | return reloc; | |
2728 | } | |
2729 | ||
fecd2382 RP |
2730 | |
2731 | #if 0 | |
2732 | /* for debugging only */ | |
355afbcd KR |
2733 | static void |
2734 | print_insn (insn) | |
2735 | struct sparc_it *insn; | |
fecd2382 | 2736 | { |
c999fd9f | 2737 | const char *const Reloc[] = { |
355afbcd KR |
2738 | "RELOC_8", |
2739 | "RELOC_16", | |
2740 | "RELOC_32", | |
2741 | "RELOC_DISP8", | |
2742 | "RELOC_DISP16", | |
2743 | "RELOC_DISP32", | |
2744 | "RELOC_WDISP30", | |
2745 | "RELOC_WDISP22", | |
2746 | "RELOC_HI22", | |
2747 | "RELOC_22", | |
2748 | "RELOC_13", | |
2749 | "RELOC_LO10", | |
2750 | "RELOC_SFA_BASE", | |
2751 | "RELOC_SFA_OFF13", | |
2752 | "RELOC_BASE10", | |
2753 | "RELOC_BASE13", | |
2754 | "RELOC_BASE22", | |
2755 | "RELOC_PC10", | |
2756 | "RELOC_PC22", | |
2757 | "RELOC_JMP_TBL", | |
2758 | "RELOC_SEGOFF16", | |
2759 | "RELOC_GLOB_DAT", | |
2760 | "RELOC_JMP_SLOT", | |
2761 | "RELOC_RELATIVE", | |
2762 | "NO_RELOC" | |
2763 | }; | |
2764 | ||
2765 | if (insn->error) | |
c999fd9f | 2766 | fprintf (stderr, "ERROR: %s\n"); |
355afbcd KR |
2767 | fprintf (stderr, "opcode=0x%08x\n", insn->opcode); |
2768 | fprintf (stderr, "reloc = %s\n", Reloc[insn->reloc]); | |
2769 | fprintf (stderr, "exp = {\n"); | |
2770 | fprintf (stderr, "\t\tX_add_symbol = %s\n", | |
2771 | ((insn->exp.X_add_symbol != NULL) | |
2772 | ? ((S_GET_NAME (insn->exp.X_add_symbol) != NULL) | |
2773 | ? S_GET_NAME (insn->exp.X_add_symbol) | |
2774 | : "???") | |
2775 | : "0")); | |
2776 | fprintf (stderr, "\t\tX_sub_symbol = %s\n", | |
5ac34ac3 ILT |
2777 | ((insn->exp.X_op_symbol != NULL) |
2778 | ? (S_GET_NAME (insn->exp.X_op_symbol) | |
2779 | ? S_GET_NAME (insn->exp.X_op_symbol) | |
355afbcd KR |
2780 | : "???") |
2781 | : "0")); | |
2782 | fprintf (stderr, "\t\tX_add_number = %d\n", | |
2783 | insn->exp.X_add_number); | |
2784 | fprintf (stderr, "}\n"); | |
c999fd9f | 2785 | } |
fecd2382 | 2786 | #endif |
f3d817d8 | 2787 | \f |
839df5c3 RP |
2788 | /* |
2789 | * md_parse_option | |
2790 | * Invocation line includes a switch not recognized by the base assembler. | |
2791 | * See if it's a processor-specific option. These are: | |
2792 | * | |
2793 | * -bump | |
2794 | * Warn on architecture bumps. See also -A. | |
2795 | * | |
e70ad5d5 DE |
2796 | * -Av6, -Av7, -Av8, -Av9, -Av9a, -Asparclite |
2797 | * -xarch=v8plus, -xarch=v8plusa | |
839df5c3 RP |
2798 | * Select the architecture. Instructions or features not |
2799 | * supported by the selected architecture cause fatal errors. | |
2800 | * | |
2801 | * The default is to start at v6, and bump the architecture up | |
e70ad5d5 DE |
2802 | * whenever an instruction is seen at a higher level. If 32 bit |
2803 | * environments, v9 is not bumped up to, the user must pass -Av9. | |
2804 | * | |
2805 | * -xarch=v8plus{,a} is for compatibility with the Sun assembler. | |
839df5c3 RP |
2806 | * |
2807 | * If -bump is specified, a warning is printing when bumping to | |
2808 | * higher levels. | |
2809 | * | |
2810 | * If an architecture is specified, all instructions must match | |
2811 | * that architecture. Any higher level instructions are flagged | |
e70ad5d5 DE |
2812 | * as errors. Note that in the 32 bit environment specifying |
2813 | * -Av9 does not automatically create a v9 object file, a v9 | |
2814 | * insn must be seen. | |
839df5c3 | 2815 | * |
6df07e7f | 2816 | * If both an architecture and -bump are specified, the |
839df5c3 | 2817 | * architecture starts at the specified level, but bumps are |
e70ad5d5 DE |
2818 | * warnings. Note that we can't set `current_architecture' to |
2819 | * the requested level in this case: in the 32 bit environment, | |
2820 | * we still must avoid creating v9 object files unless v9 insns | |
2821 | * are seen. | |
839df5c3 | 2822 | * |
162e3485 | 2823 | * Note: |
680227f3 KR |
2824 | * Bumping between incompatible architectures is always an |
2825 | * error. For example, from sparclite to v9. | |
839df5c3 | 2826 | */ |
162e3485 | 2827 | |
f3d817d8 | 2828 | #ifdef OBJ_ELF |
a7aa7a2b | 2829 | CONST char *md_shortopts = "A:K:VQ:sq"; |
f3d817d8 | 2830 | #else |
4c67b523 ILT |
2831 | #ifdef OBJ_AOUT |
2832 | CONST char *md_shortopts = "A:k"; | |
2833 | #else | |
f3d817d8 DM |
2834 | CONST char *md_shortopts = "A:"; |
2835 | #endif | |
4c67b523 | 2836 | #endif |
f3d817d8 DM |
2837 | struct option md_longopts[] = { |
2838 | #define OPTION_BUMP (OPTION_MD_BASE) | |
2839 | {"bump", no_argument, NULL, OPTION_BUMP}, | |
2840 | #define OPTION_SPARC (OPTION_MD_BASE + 1) | |
2841 | {"sparc", no_argument, NULL, OPTION_SPARC}, | |
e70ad5d5 DE |
2842 | #define OPTION_XARCH (OPTION_MD_BASE + 2) |
2843 | {"xarch", required_argument, NULL, OPTION_XARCH}, | |
2b063e6d ILT |
2844 | #ifdef SPARC_BIENDIAN |
2845 | #define OPTION_LITTLE_ENDIAN (OPTION_MD_BASE + 3) | |
2846 | {"EL", no_argument, NULL, OPTION_LITTLE_ENDIAN}, | |
2847 | #define OPTION_BIG_ENDIAN (OPTION_MD_BASE + 4) | |
2848 | {"EB", no_argument, NULL, OPTION_BIG_ENDIAN}, | |
2849 | #endif | |
2850 | #define OPTION_ENFORCE_ALIGNED_DATA (OPTION_MD_BASE + 5) | |
2851 | {"enforce-aligned-data", no_argument, NULL, OPTION_ENFORCE_ALIGNED_DATA}, | |
f3d817d8 DM |
2852 | {NULL, no_argument, NULL, 0} |
2853 | }; | |
2854 | size_t md_longopts_size = sizeof(md_longopts); | |
355afbcd | 2855 | |
f3d817d8 DM |
2856 | int |
2857 | md_parse_option (c, arg) | |
2858 | int c; | |
2859 | char *arg; | |
2860 | { | |
2861 | switch (c) | |
355afbcd | 2862 | { |
f3d817d8 | 2863 | case OPTION_BUMP: |
355afbcd | 2864 | warn_on_bump = 1; |
e70ad5d5 | 2865 | warn_after_architecture = SPARC_OPCODE_ARCH_V6; |
f3d817d8 | 2866 | break; |
355afbcd | 2867 | |
e70ad5d5 DE |
2868 | case OPTION_XARCH: |
2869 | /* ??? We could add v8plus and v8plusa to sparc_opcode_archs. | |
2870 | But we might want v8plus to mean something different than v9 | |
2871 | someday, and we'd recognize more -xarch options than Sun's | |
2872 | assembler does (which may lead to a conflict someday). */ | |
2873 | if (strcmp (arg, "v8plus") == 0) | |
2874 | arg = "v9"; | |
2875 | else if (strcmp (arg, "v8plusa") == 0) | |
2876 | arg = "v9a"; | |
2877 | else | |
2878 | { | |
2879 | as_bad ("invalid architecture -xarch=%s", arg); | |
2880 | return 0; | |
2881 | } | |
2882 | ||
2883 | /* fall through */ | |
2884 | ||
f3d817d8 DM |
2885 | case 'A': |
2886 | { | |
e70ad5d5 | 2887 | enum sparc_opcode_arch_val new_arch = sparc_opcode_lookup_arch (arg); |
f3d817d8 | 2888 | |
e70ad5d5 | 2889 | if (new_arch == SPARC_OPCODE_ARCH_BAD) |
f3d817d8 | 2890 | { |
e70ad5d5 | 2891 | as_bad ("invalid architecture -A%s", arg); |
f3d817d8 DM |
2892 | return 0; |
2893 | } | |
2894 | else | |
2895 | { | |
e70ad5d5 | 2896 | max_architecture = new_arch; |
f3d817d8 DM |
2897 | architecture_requested = 1; |
2898 | } | |
2899 | } | |
2900 | break; | |
2901 | ||
2902 | case OPTION_SPARC: | |
2903 | /* Ignore -sparc, used by SunOS make default .s.o rule. */ | |
2904 | break; | |
355afbcd | 2905 | |
2b063e6d ILT |
2906 | case OPTION_ENFORCE_ALIGNED_DATA: |
2907 | enforce_aligned_data = 1; | |
2908 | break; | |
2909 | ||
2910 | #ifdef SPARC_BIENDIAN | |
2911 | case OPTION_LITTLE_ENDIAN: | |
2912 | target_big_endian = 0; | |
2913 | break; | |
2914 | case OPTION_BIG_ENDIAN: | |
2915 | target_big_endian = 1; | |
2916 | break; | |
2917 | #endif | |
2918 | ||
4c67b523 ILT |
2919 | #ifdef OBJ_AOUT |
2920 | case 'k': | |
2921 | sparc_pic_code = 1; | |
2922 | break; | |
2923 | #endif | |
2924 | ||
ed9638af | 2925 | #ifdef OBJ_ELF |
f3d817d8 | 2926 | case 'V': |
ed9638af | 2927 | print_version_id (); |
f3d817d8 DM |
2928 | break; |
2929 | ||
2930 | case 'Q': | |
ed9638af KR |
2931 | /* Qy - do emit .comment |
2932 | Qn - do not emit .comment */ | |
f3d817d8 DM |
2933 | break; |
2934 | ||
2935 | case 's': | |
ed9638af | 2936 | /* use .stab instead of .stab.excl */ |
f3d817d8 DM |
2937 | break; |
2938 | ||
2939 | case 'q': | |
c06e55d9 | 2940 | /* quick -- native assembler does fewer checks */ |
f3d817d8 | 2941 | break; |
a7aa7a2b ILT |
2942 | |
2943 | case 'K': | |
2944 | if (strcmp (arg, "PIC") != 0) | |
2945 | as_warn ("Unrecognized option following -K"); | |
2946 | else | |
4c67b523 ILT |
2947 | sparc_pic_code = 1; |
2948 | break; | |
ed9638af | 2949 | #endif |
f3d817d8 DM |
2950 | |
2951 | default: | |
355afbcd KR |
2952 | return 0; |
2953 | } | |
fecd2382 | 2954 | |
e70ad5d5 | 2955 | return 1; |
f3d817d8 DM |
2956 | } |
2957 | ||
2958 | void | |
2959 | md_show_usage (stream) | |
2960 | FILE *stream; | |
2961 | { | |
e70ad5d5 DE |
2962 | const struct sparc_opcode_arch *arch; |
2963 | ||
5e0a90a8 | 2964 | fprintf(stream, "SPARC options:\n"); |
e70ad5d5 | 2965 | for (arch = &sparc_opcode_archs[0]; arch->name; arch++) |
5e0a90a8 | 2966 | { |
e70ad5d5 | 2967 | if (arch != &sparc_opcode_archs[0]) |
5e0a90a8 | 2968 | fprintf (stream, " | "); |
e70ad5d5 | 2969 | fprintf (stream, "-A%s", arch->name); |
5e0a90a8 | 2970 | } |
e70ad5d5 DE |
2971 | fprintf (stream, "\n-xarch=v8plus | -xarch=v8plusa\n"); |
2972 | fprintf (stream, "\ | |
f3d817d8 DM |
2973 | specify variant of SPARC architecture\n\ |
2974 | -bump warn when assembler switches architectures\n\ | |
2b063e6d ILT |
2975 | -sparc ignored\n |
2976 | --enforce-aligned-data force .long, etc., to be aligned correctly\n"); | |
4c67b523 ILT |
2977 | #ifdef OBJ_AOUT |
2978 | fprintf (stream, "\ | |
2979 | -k generate PIC\n"); | |
2980 | #endif | |
f3d817d8 | 2981 | #ifdef OBJ_ELF |
4c67b523 ILT |
2982 | fprintf (stream, "\ |
2983 | -KPIC generate PIC\n\ | |
f3d817d8 DM |
2984 | -V print assembler version number\n\ |
2985 | -q ignored\n\ | |
2986 | -Qy, -Qn ignored\n\ | |
2987 | -s ignored\n"); | |
2988 | #endif | |
2b063e6d ILT |
2989 | #ifdef SPARC_BIENDIAN |
2990 | fprintf (stream, "\ | |
2991 | -EL generate code for a little endian machine\n\ | |
2992 | -EB generate code for a big endian machine\n"); | |
2993 | #endif | |
f3d817d8 DM |
2994 | } |
2995 | \f | |
fecd2382 RP |
2996 | /* We have no need to default values of symbols. */ |
2997 | ||
2998 | /* ARGSUSED */ | |
355afbcd KR |
2999 | symbolS * |
3000 | md_undefined_symbol (name) | |
3001 | char *name; | |
fecd2382 | 3002 | { |
355afbcd KR |
3003 | return 0; |
3004 | } /* md_undefined_symbol() */ | |
fecd2382 | 3005 | |
fecd2382 | 3006 | /* Round up a section size to the appropriate boundary. */ |
125f0b0d | 3007 | valueT |
355afbcd KR |
3008 | md_section_align (segment, size) |
3009 | segT segment; | |
125f0b0d | 3010 | valueT size; |
fecd2382 | 3011 | { |
f9c57637 ILT |
3012 | #ifndef OBJ_ELF |
3013 | /* This is not right for ELF; a.out wants it, and COFF will force | |
3014 | the alignment anyways. */ | |
a7aa7a2b ILT |
3015 | valueT align = ((valueT) 1 |
3016 | << (valueT) bfd_get_section_alignment (stdoutput, segment)); | |
f9c57637 ILT |
3017 | valueT newsize; |
3018 | /* turn alignment value into a mask */ | |
3019 | align--; | |
3020 | newsize = (size + align) & ~align; | |
3021 | return newsize; | |
3022 | #else | |
693b21e7 | 3023 | return size; |
f9c57637 | 3024 | #endif |
428d312b | 3025 | } |
fecd2382 RP |
3026 | |
3027 | /* Exactly what point is a PC-relative offset relative TO? | |
3028 | On the sparc, they're relative to the address of the offset, plus | |
3029 | its size. This gets us to the following instruction. | |
3030 | (??? Is this right? FIXME-SOON) */ | |
355afbcd KR |
3031 | long |
3032 | md_pcrel_from (fixP) | |
3033 | fixS *fixP; | |
fecd2382 | 3034 | { |
4c67b523 ILT |
3035 | long ret; |
3036 | ||
3037 | ret = fixP->fx_where + fixP->fx_frag->fr_address; | |
3038 | if (! sparc_pic_code | |
3039 | || fixP->fx_addsy == NULL | |
3040 | || (fixP->fx_addsy->bsym->flags & BSF_SECTION_SYM) != 0) | |
3041 | ret += fixP->fx_size; | |
3042 | return ret; | |
428d312b | 3043 | } |
fecd2382 | 3044 | |
8b228fe9 | 3045 | /* end of tc-sparc.c */ |