Don't merge if the storage class of the non-debug symbol is C_NULL.
[deliverable/binutils-gdb.git] / gas / config / tc-tahoe.c
CommitLineData
f7e42eb4 1/* This file is tc-tahoe.c
252b5132 2
f7e42eb4
NC
3 Copyright 1987, 1988, 1989, 1990, 1991, 1992, 1995, 2000
4 Free Software Foundation, Inc.
5
6 This file is part of GAS, the GNU Assembler.
7
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
21 02111-1307, USA. */
252b5132
RH
22#include "as.h"
23#include "obstack.h"
24
f7e42eb4 25/* This bit glommed from tahoe-inst.h. */
252b5132
RH
26
27typedef unsigned char byte;
28typedef byte tahoe_opcodeT;
29
f7e42eb4
NC
30/* This is part of tahoe-ins-parse.c & friends.
31 We want to parse a tahoe instruction text into a tree defined here. */
252b5132
RH
32
33#define TIT_MAX_OPERANDS (4) /* maximum number of operands in one
34 single tahoe instruction */
35
36struct top /* tahoe instruction operand */
f7e42eb4
NC
37 {
38 int top_ndx; /* -1, or index register. eg 7=[R7] */
39 int top_reg; /* -1, or register number. eg 7 = R7 or (R7) */
40 byte top_mode; /* Addressing mode byte. This byte, defines
a4d24084 41 which of the 11 modes opcode is. */
252b5132 42
f7e42eb4 43 char top_access; /* Access type wanted for this opperand
252b5132 44 'b'branch ' 'no-instruction 'amrvw' */
f7e42eb4 45 char top_width; /* Operand width expected, one of "bwlq?-:!" */
252b5132 46
f7e42eb4 47 char * top_error; /* Say if operand is inappropriate */
252b5132 48
f7e42eb4 49 segT seg_of_operand; /* segment as returned by expression()*/
252b5132 50
f7e42eb4 51 expressionS exp_of_operand; /* The expression as parsed by expression()*/
252b5132 52
f7e42eb4 53 byte top_dispsize; /* Number of bytes in the displacement if we
252b5132 54 can figure it out */
f7e42eb4 55 };
252b5132
RH
56
57/* The addressing modes for an operand. These numbers are the acutal values
a4d24084 58 for certain modes, so be carefull if you screw with them. */
252b5132
RH
59#define TAHOE_DIRECT_REG (0x50)
60#define TAHOE_REG_DEFERRED (0x60)
61
62#define TAHOE_REG_DISP (0xE0)
63#define TAHOE_REG_DISP_DEFERRED (0xF0)
64
65#define TAHOE_IMMEDIATE (0x8F)
66#define TAHOE_IMMEDIATE_BYTE (0x88)
67#define TAHOE_IMMEDIATE_WORD (0x89)
68#define TAHOE_IMMEDIATE_LONGWORD (0x8F)
69#define TAHOE_ABSOLUTE_ADDR (0x9F)
70
71#define TAHOE_DISPLACED_RELATIVE (0xEF)
72#define TAHOE_DISP_REL_DEFERRED (0xFF)
73
74#define TAHOE_AUTO_DEC (0x7E)
75#define TAHOE_AUTO_INC (0x8E)
76#define TAHOE_AUTO_INC_DEFERRED (0x9E)
f7e42eb4 77/* INDEXED_REG is decided by the existance or lack of a [reg]. */
252b5132
RH
78
79/* These are encoded into top_width when top_access=='b'
f7e42eb4 80 and it's a psuedo op. */
252b5132
RH
81#define TAHOE_WIDTH_ALWAYS_JUMP '-'
82#define TAHOE_WIDTH_CONDITIONAL_JUMP '?'
83#define TAHOE_WIDTH_BIG_REV_JUMP '!'
84#define TAHOE_WIDTH_BIG_NON_REV_JUMP ':'
85
86/* The hex code for certain tahoe commands and modes.
a4d24084 87 This is just for readability. */
252b5132
RH
88#define TAHOE_JMP (0x71)
89#define TAHOE_PC_REL_LONG (0xEF)
90#define TAHOE_BRB (0x11)
91#define TAHOE_BRW (0x13)
92/* These, when 'ored' with, or added to, a register number,
a4d24084 93 set up the number for the displacement mode. */
252b5132
RH
94#define TAHOE_PC_OR_BYTE (0xA0)
95#define TAHOE_PC_OR_WORD (0xC0)
96#define TAHOE_PC_OR_LONG (0xE0)
97
f7e42eb4
NC
98struct tit /* Get it out of the sewer, it stands for
99 tahoe instruction tree (Geeze!). */
252b5132 100{
a4d24084
KH
101 tahoe_opcodeT tit_opcode; /* The opcode. */
102 byte tit_operands; /* How many operands are here. */
252b5132
RH
103 struct top tit_operand[TIT_MAX_OPERANDS]; /* Operands */
104 char *tit_error; /* "" or fatal error text */
105};
106
107/* end: tahoe-inst.h */
108
109/* tahoe.c - tahoe-specific -
110 Not part of gas yet.
111 */
112
113#include "opcode/tahoe.h"
114
115/* This is the number to put at the beginning of the a.out file */
116long omagic = OMAGIC;
117
118/* These chars start a comment anywhere in a source file (except inside
a4d24084 119 another comment or a quoted string. */
252b5132
RH
120const char comment_chars[] = "#;";
121
a4d24084 122/* These chars only start a comment at the beginning of a line. */
252b5132
RH
123const char line_comment_chars[] = "#";
124
125/* Chars that can be used to separate mant from exp in floating point nums */
126const char EXP_CHARS[] = "eE";
127
128/* Chars that mean this number is a floating point constant
129 as in 0f123.456
130 or 0d1.234E-12 (see exp chars above)
131 Note: The Tahoe port doesn't support floating point constants. This is
a4d24084 132 consistant with 'as' If it's needed, I can always add it later. */
252b5132
RH
133const char FLT_CHARS[] = "df";
134
135/* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
136 changed in read.c . Ideally it shouldn't have to know about it at all,
137 but nothing is ideal around here.
138 (The tahoe has plenty of room, so the change currently isn't needed.)
139 */
140
a4d24084 141static struct tit t; /* A tahoe instruction after decoding. */
252b5132
RH
142
143void float_cons ();
144/* A table of pseudo ops (sans .), the function called, and an integer op
a4d24084 145 that the function is called with. */
252b5132
RH
146
147const pseudo_typeS md_pseudo_table[] =
148{
149 {"dfloat", float_cons, 'd'},
150 {"ffloat", float_cons, 'f'},
151 {0}
152};
153\f
154/*
155 * For Tahoe, relative addresses of "just the right length" are pretty easy.
156 * The branch displacement is always the last operand, even in
157 * synthetic instructions.
158 * For Tahoe, we encode the relax_substateTs (in e.g. fr_substate) as:
159 *
160 * 4 3 2 1 0 bit number
161 * ---/ /--+-------+-------+-------+-------+-------+
162 * | what state ? | how long ? |
163 * ---/ /--+-------+-------+-------+-------+-------+
164 *
165 * The "how long" bits are 00=byte, 01=word, 10=long.
166 * This is a Un*x convention.
167 * Not all lengths are legit for a given value of (what state).
168 * The four states are listed below.
169 * The "how long" refers merely to the displacement length.
170 * The address usually has some constant bytes in it as well.
171 *
172
173States for Tahoe address relaxing.
1741. TAHOE_WIDTH_ALWAYS_JUMP (-)
175 Format: "b-"
176 Tahoe opcodes are: (Hex)
177 jr 11
178 jbr 11
179 Simple branch.
180 Always, 1 byte opcode, then displacement/absolute.
181 If word or longword, change opcode to brw or jmp.
182
252b5132
RH
1832. TAHOE_WIDTH_CONDITIONAL_JUMP (?)
184 J<cond> where <cond> is a simple flag test.
185 Format: "b?"
186 Tahoe opcodes are: (Hex)
187 jneq/jnequ 21
188 jeql/jeqlu 31
189 jgtr 41
190 jleq 51
191 jgeq 81
192 jlss 91
193 jgtru a1
194 jlequ b1
195 jvc c1
196 jvs d1
197 jlssu/jcs e1
198 jgequ/jcc f1
199 Always, you complement 4th bit to reverse the condition.
200 Always, 1-byte opcode, then 1-byte displacement.
201
2023. TAHOE_WIDTH_BIG_REV_JUMP (!)
203 Jbc/Jbs where cond tests a memory bit.
204 Format: "rlvlb!"
205 Tahoe opcodes are: (Hex)
206 jbs 0e
207 jbc 1e
208 Always, you complement 4th bit to reverse the condition.
209 Always, 1-byte opcde, longword, longword-address, 1-word-displacement
210
2114. TAHOE_WIDTH_BIG_NON_REV_JUMP (:)
212 JaoblXX/Jbssi
213 Format: "rlmlb:"
214 Tahoe opcodes are: (Hex)
215 aojlss 2f
216 jaoblss 2f
217 aojleq 3f
218 jaobleq 3f
219 jbssi 5f
220 Always, we cannot reverse the sense of the branch; we have a word
221 displacement.
222
223We need to modify the opcode is for class 1, 2 and 3 instructions.
224After relax() we may complement the 4th bit of 2 or 3 to reverse sense of
225branch.
226
227We sometimes store context in the operand literal. This way we can figure out
228after relax() what the original addressing mode was. (Was is pc_rel, or
229pc_rel_disp? That sort of thing.) */
230\f
231/* These displacements are relative to the START address of the
232 displacement which is at the start of the displacement, not the end of
233 the instruction. The hardware pc_rel is at the end of the instructions.
234 That's why all the displacements have the length of the displacement added
235 to them. (WF + length(word))
236
237 The first letter is Byte, Word.
a4d24084 238 2nd letter is Forward, Backward. */
252b5132
RH
239#define BF (1+ 127)
240#define BB (1+-128)
241#define WF (2+ 32767)
242#define WB (2+-32768)
243/* Dont need LF, LB because they always reach. [They are coded as 0.] */
244
245#define C(a,b) ENCODE_RELAX(a,b)
a4d24084 246/* This macro has no side-effects. */
252b5132 247#define ENCODE_RELAX(what,length) (((what) << 2) + (length))
606ab118
AM
248#define RELAX_STATE(s) ((s) >> 2)
249#define RELAX_LENGTH(s) ((s) & 3)
252b5132
RH
250
251#define STATE_ALWAYS_BRANCH (1)
252#define STATE_CONDITIONAL_BRANCH (2)
253#define STATE_BIG_REV_BRANCH (3)
254#define STATE_BIG_NON_REV_BRANCH (4)
255#define STATE_PC_RELATIVE (5)
256
257#define STATE_BYTE (0)
258#define STATE_WORD (1)
259#define STATE_LONG (2)
260#define STATE_UNDF (3) /* Symbol undefined in pass1 */
261
262/* This is the table used by gas to figure out relaxing modes. The fields are
263 forward_branch reach, backward_branch reach, number of bytes it would take,
a4d24084 264 where the next biggest branch is. */
252b5132
RH
265const relax_typeS md_relax_table[] =
266{
267 {
268 1, 1, 0, 0
269 }, /* error sentinel 0,0 */
270 {
271 1, 1, 0, 0
272 }, /* unused 0,1 */
273 {
274 1, 1, 0, 0
275 }, /* unused 0,2 */
276 {
277 1, 1, 0, 0
278 }, /* unused 0,3 */
279/* Unconditional branch cases "jrb"
280 The relax part is the actual displacement */
281 {
282 BF, BB, 1, C (1, 1)
283 }, /* brb B`foo 1,0 */
284 {
285 WF, WB, 2, C (1, 2)
286 }, /* brw W`foo 1,1 */
287 {
288 0, 0, 5, 0
289 }, /* Jmp L`foo 1,2 */
290 {
291 1, 1, 0, 0
292 }, /* unused 1,3 */
293/* Reversible Conditional Branch. If the branch won't reach, reverse
294 it, and jump over a brw or a jmp that will reach. The relax part is the
a4d24084 295 actual address. */
252b5132
RH
296 {
297 BF, BB, 1, C (2, 1)
298 }, /* b<cond> B`foo 2,0 */
299 {
300 WF + 2, WB + 2, 4, C (2, 2)
301 }, /* brev over, brw W`foo, over: 2,1 */
302 {
303 0, 0, 7, 0
304 }, /* brev over, jmp L`foo, over: 2,2 */
305 {
306 1, 1, 0, 0
307 }, /* unused 2,3 */
308/* Another type of reversable branch. But this only has a word
a4d24084 309 displacement. */
252b5132
RH
310 {
311 1, 1, 0, 0
312 }, /* unused 3,0 */
313 {
314 WF, WB, 2, C (3, 2)
315 }, /* jbX W`foo 3,1 */
316 {
317 0, 0, 8, 0
318 }, /* jrevX over, jmp L`foo, over: 3,2 */
319 {
320 1, 1, 0, 0
321 }, /* unused 3,3 */
322/* These are the non reversable branches, all of which have a word
323 displacement. If I can't reach, branch over a byte branch, to a
324 jump that will reach. The jumped branch jumps over the reaching
325 branch, to continue with the flow of the program. It's like playing
a4d24084 326 leap frog. */
252b5132
RH
327 {
328 1, 1, 0, 0
329 }, /* unused 4,0 */
330 {
331 WF, WB, 2, C (4, 2)
332 }, /* aobl_ W`foo 4,1 */
333 {
334 0, 0, 10, 0
335 }, /*aobl_ W`hop,br over,hop: jmp L^foo,over 4,2*/
336 {
337 1, 1, 0, 0
338 }, /* unused 4,3 */
339/* Normal displacement mode, no jumping or anything like that.
340 The relax points to one byte before the address, thats why all
a4d24084 341 the numbers are up by one. */
252b5132
RH
342 {
343 BF + 1, BB + 1, 2, C (5, 1)
344 }, /* B^"foo" 5,0 */
345 {
346 WF + 1, WB + 1, 3, C (5, 2)
347 }, /* W^"foo" 5,1 */
348 {
349 0, 0, 5, 0
350 }, /* L^"foo" 5,2 */
351 {
352 1, 1, 0, 0
353 }, /* unused 5,3 */
354};
355
356#undef C
357#undef BF
358#undef BB
359#undef WF
360#undef WB
361/* End relax stuff */
362\f
363/* Handle of the OPCODE hash table. NULL means any use before
364 md_begin() will crash. */
365static struct hash_control *op_hash;
366
a4d24084 367/* Init function. Build the hash table. */
252b5132
RH
368void
369md_begin ()
370{
371 struct tot *tP;
372 char *errorval = 0;
a4d24084 373 int synthetic_too = 1; /* If 0, just use real opcodes. */
252b5132
RH
374
375 op_hash = hash_new ();
376
377 for (tP = totstrs; *tP->name && !errorval; tP++)
378 errorval = hash_insert (op_hash, tP->name, &tP->detail);
379
380 if (synthetic_too)
381 for (tP = synthetic_totstrs; *tP->name && !errorval; tP++)
382 errorval = hash_insert (op_hash, tP->name, &tP->detail);
383
384 if (errorval)
385 as_fatal (errorval);
386}
387\f
388CONST char *md_shortopts = "ad:STt:V";
389struct option md_longopts[] = {
390 {NULL, no_argument, NULL, 0}
391};
bc805888 392size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
393
394int
395md_parse_option (c, arg)
396 int c;
397 char *arg;
398{
399 switch (c)
400 {
401 case 'a':
402 as_warn (_("The -a option doesn't exist. (Despite what the man page says!"));
403 break;
404
405 case 'd':
406 as_warn (_("Displacement length %s ignored!"), arg);
407 break;
408
409 case 'S':
410 as_warn (_("SYMBOL TABLE not implemented"));
411 break;
412
413 case 'T':
414 as_warn (_("TOKEN TRACE not implemented"));
415 break;
416
417 case 't':
418 as_warn (_("I don't need or use temp. file \"%s\"."), arg);
419 break;
420
421 case 'V':
422 as_warn (_("I don't use an interpass file! -V ignored"));
423 break;
424
425 default:
426 return 0;
427 }
428
429 return 1;
430}
431
432void
433md_show_usage (stream)
434 FILE *stream;
435{
bc805888 436 fprintf (stream, _("\
252b5132
RH
437Tahoe options:\n\
438-a ignored\n\
439-d LENGTH ignored\n\
440-J ignored\n\
441-S ignored\n\
442-t FILE ignored\n\
443-T ignored\n\
444-V ignored\n"));
445}
446\f
447/* The functions in this section take numbers in the machine format, and
448 munges them into Tahoe byte order.
a4d24084
KH
449 They exist primarily for cross assembly purpose. */
450void /* Knows about order of bytes in address. */
252b5132 451md_number_to_chars (con, value, nbytes)
a4d24084
KH
452 char con[]; /* Return 'nbytes' of chars here. */
453 valueT value; /* The value of the bits. */
454 int nbytes; /* Number of bytes in the output. */
252b5132
RH
455{
456 number_to_chars_bigendian (con, value, nbytes);
457}
458
459#ifdef comment
a4d24084 460void /* Knows about order of bytes in address. */
252b5132 461md_number_to_imm (con, value, nbytes)
a4d24084
KH
462 char con[]; /* Return 'nbytes' of chars here. */
463 long int value; /* The value of the bits. */
464 int nbytes; /* Number of bytes in the output. */
252b5132
RH
465{
466 md_number_to_chars (con, value, nbytes);
467}
468
469#endif /* comment */
470
471void
472tc_apply_fix (fixP, val)
473 fixS *fixP;
474 long val;
475{
476 /* should never be called */
477 know (0);
478}
479
a4d24084 480void /* Knows about order of bytes in address. */
252b5132 481md_number_to_disp (con, value, nbytes)
a4d24084
KH
482 char con[]; /* Return 'nbytes' of chars here. */
483 long int value; /* The value of the bits. */
484 int nbytes; /* Number of bytes in the output. */
252b5132
RH
485{
486 md_number_to_chars (con, value, nbytes);
487}
488
a4d24084 489void /* Knows about order of bytes in address. */
252b5132 490md_number_to_field (con, value, nbytes)
a4d24084
KH
491 char con[]; /* Return 'nbytes' of chars here. */
492 long int value; /* The value of the bits. */
493 int nbytes; /* Number of bytes in the output. */
252b5132
RH
494{
495 md_number_to_chars (con, value, nbytes);
496}
497
498/* Put the bits in an order that a tahoe will understand, despite the ordering
499 of the native machine.
500 On Tahoe: first 4 bytes are normal unsigned big endian long,
501 next three bytes are symbolnum, in kind of 3 byte big endian (least sig. byte last).
502 The last byte is broken up with bit 7 as pcrel,
503 bits 6 & 5 as length,
a4d24084 504 bit 4 as extern and the last nibble as 'undefined'. */
252b5132
RH
505
506#if comment
507void
508md_ri_to_chars (ri_p, ri)
509 struct relocation_info *ri_p, ri;
510{
511 byte the_bytes[sizeof (struct relocation_info)];
512 /* The reason I can't just encode these directly into ri_p is that
a4d24084 513 ri_p may point to ri. */
252b5132
RH
514
515 /* This is easy */
516 md_number_to_chars (the_bytes, ri.r_address, sizeof (ri.r_address));
517
518 /* now the fun stuff */
519 the_bytes[4] = (ri.r_symbolnum >> 16) & 0x0ff;
520 the_bytes[5] = (ri.r_symbolnum >> 8) & 0x0ff;
521 the_bytes[6] = ri.r_symbolnum & 0x0ff;
522 the_bytes[7] = (((ri.r_extern << 4) & 0x10) | ((ri.r_length << 5) & 0x60) |
523 ((ri.r_pcrel << 7) & 0x80)) & 0xf0;
524
525 bcopy (the_bytes, (char *) ri_p, sizeof (struct relocation_info));
526}
527
528#endif /* comment */
529
530/* Put the bits in an order that a tahoe will understand, despite the ordering
531 of the native machine.
532 On Tahoe: first 4 bytes are normal unsigned big endian long,
533 next three bytes are symbolnum, in kind of 3 byte big endian (least sig. byte last).
534 The last byte is broken up with bit 7 as pcrel,
535 bits 6 & 5 as length,
a4d24084 536 bit 4 as extern and the last nibble as 'undefined'. */
252b5132 537
a4d24084 538void
252b5132
RH
539tc_aout_fix_to_chars (where, fixP, segment_address_in_file)
540 char *where;
541 fixS *fixP;
542 relax_addressT segment_address_in_file;
543{
544 long r_symbolnum;
545
546 know (fixP->fx_addsy != NULL);
547
548 md_number_to_chars (where,
549 fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file,
550 4);
551
552 r_symbolnum = (S_IS_DEFINED (fixP->fx_addsy)
553 ? S_GET_TYPE (fixP->fx_addsy)
554 : fixP->fx_addsy->sy_number);
555
556 where[4] = (r_symbolnum >> 16) & 0x0ff;
557 where[5] = (r_symbolnum >> 8) & 0x0ff;
558 where[6] = r_symbolnum & 0x0ff;
559 where[7] = (((is_pcrel (fixP) << 7) & 0x80)
560 | ((((fixP->fx_type == FX_8 || fixP->fx_type == FX_PCREL8
561 ? 0
562 : (fixP->fx_type == FX_16 || fixP->fx_type == FX_PCREL16
563 ? 1
564 : (fixP->fx_type == FX_32 || fixP->fx_type == FX_PCREL32
565 ? 2
566 : 42)))) << 5) & 0x60)
567 | ((!S_IS_DEFINED (fixP->fx_addsy) << 4) & 0x10));
568}
569
570/* Relocate byte stuff */
571\f
a4d24084 572/* This is for broken word. */
252b5132
RH
573const int md_short_jump_size = 3;
574
575void
576md_create_short_jump (ptr, from_addr, to_addr, frag, to_symbol)
577 char *ptr;
578 addressT from_addr, to_addr;
579 fragS *frag;
580 symbolS *to_symbol;
581{
582 valueT offset;
583
584 offset = to_addr - (from_addr + 1);
585 *ptr++ = TAHOE_BRW;
586 md_number_to_chars (ptr, offset, 2);
587}
588
589const int md_long_jump_size = 6;
590const int md_reloc_size = 8; /* Size of relocation record */
591
592void
593md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol)
594 char *ptr;
595 addressT from_addr, to_addr;
596 fragS *frag;
597 symbolS *to_symbol;
598{
599 valueT offset;
600
601 offset = to_addr - (from_addr + 4);
602 *ptr++ = TAHOE_JMP;
603 *ptr++ = TAHOE_PC_REL_LONG;
604 md_number_to_chars (ptr, offset, 4);
605}
606\f
606ab118
AM
607/* md_estimate_size_before_relax(), called just before relax().
608 Any symbol that is now undefined will not become defined.
609 Return the correct fr_subtype in the frag and the growth beyond
610 fr_fix. */
252b5132
RH
611int
612md_estimate_size_before_relax (fragP, segment_type)
613 register fragS *fragP;
a4d24084 614 segT segment_type; /* N_DATA or N_TEXT. */
252b5132 615{
606ab118 616 if (RELAX_LENGTH (fragP->fr_subtype) == STATE_UNDF)
252b5132 617 {
606ab118 618 if (S_GET_SEGMENT (fragP->fr_symbol) != segment)
252b5132 619 {
606ab118
AM
620 /* Non-relaxable cases. */
621 char *p;
622 int old_fr_fix;
252b5132 623
606ab118 624 old_fr_fix = fragP->fr_fix;
252b5132 625 p = fragP->fr_literal + old_fr_fix;
606ab118
AM
626 switch (RELAX_STATE (fragP->fr_subtype))
627 {
628 case STATE_PC_RELATIVE:
629 *p |= TAHOE_PC_OR_LONG;
630 /* We now know how big it will be, one long word. */
631 fragP->fr_fix += 1 + 4;
632 fix_new (fragP, old_fr_fix + 1, fragP->fr_symbol,
633 fragP->fr_offset, FX_PCREL32, NULL);
634 break;
635
636 case STATE_CONDITIONAL_BRANCH:
637 *fragP->fr_opcode ^= 0x10; /* Reverse sense of branch. */
638 *p++ = 6;
639 *p++ = TAHOE_JMP;
640 *p++ = TAHOE_PC_REL_LONG;
641 fragP->fr_fix += 1 + 1 + 1 + 4;
642 fix_new (fragP, old_fr_fix + 3, fragP->fr_symbol,
643 fragP->fr_offset, FX_PCREL32, NULL);
644 break;
645
646 case STATE_BIG_REV_BRANCH:
647 *fragP->fr_opcode ^= 0x10; /* Reverse sense of branch. */
648 *p++ = 0;
649 *p++ = 6;
650 *p++ = TAHOE_JMP;
651 *p++ = TAHOE_PC_REL_LONG;
652 fragP->fr_fix += 2 + 2 + 4;
653 fix_new (fragP, old_fr_fix + 4, fragP->fr_symbol,
654 fragP->fr_offset, FX_PCREL32, NULL);
655 break;
656
657 case STATE_BIG_NON_REV_BRANCH:
658 *p++ = 2;
659 *p++ = 0;
660 *p++ = TAHOE_BRB;
661 *p++ = 6;
662 *p++ = TAHOE_JMP;
663 *p++ = TAHOE_PC_REL_LONG;
664 fragP->fr_fix += 2 + 2 + 2 + 4;
665 fix_new (fragP, old_fr_fix + 6, fragP->fr_symbol,
666 fragP->fr_offset, FX_PCREL32, NULL);
667 break;
668
669 case STATE_ALWAYS_BRANCH:
670 *fragP->fr_opcode = TAHOE_JMP;
671 *p++ = TAHOE_PC_REL_LONG;
672 fragP->fr_fix += 1 + 4;
673 fix_new (fragP, old_fr_fix + 1, fragP->fr_symbol,
674 fragP->fr_offset, FX_PCREL32, NULL);
675 break;
676
677 default:
678 abort ();
679 }
252b5132 680 frag_wane (fragP);
252b5132 681
606ab118
AM
682 /* Return the growth in the fixed part of the frag. */
683 return fragP->fr_fix - old_fr_fix;
252b5132 684 }
252b5132 685
606ab118
AM
686 /* Relaxable cases. Set up the initial guess for the variable
687 part of the frag. */
688 switch (RELAX_STATE (fragP->fr_subtype))
252b5132 689 {
606ab118
AM
690 case STATE_PC_RELATIVE:
691 fragP->fr_subtype = ENCODE_RELAX (STATE_PC_RELATIVE, STATE_BYTE);
692 break;
693 case STATE_CONDITIONAL_BRANCH:
694 fragP->fr_subtype = ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE);
695 break;
696 case STATE_BIG_REV_BRANCH:
697 fragP->fr_subtype = ENCODE_RELAX (STATE_BIG_REV_BRANCH, STATE_WORD);
698 break;
699 case STATE_BIG_NON_REV_BRANCH:
252b5132 700 fragP->fr_subtype = ENCODE_RELAX (STATE_BIG_NON_REV_BRANCH, STATE_WORD);
606ab118
AM
701 break;
702 case STATE_ALWAYS_BRANCH:
252b5132 703 fragP->fr_subtype = ENCODE_RELAX (STATE_ALWAYS_BRANCH, STATE_BYTE);
606ab118 704 break;
252b5132 705 }
252b5132 706 }
606ab118
AM
707
708 if (fragP->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
709 abort ();
710
711 /* Return the size of the variable part of the frag. */
712 return md_relax_table[fragP->fr_subtype].rlx_length;
713}
252b5132
RH
714\f
715/*
716 * md_convert_frag();
717 *
718 * Called after relax() is finished.
719 * In: Address of frag.
720 * fr_type == rs_machine_dependent.
721 * fr_subtype is what the address relaxed to.
722 *
723 * Out: Any fixSs and constants are set up.
724 * Caller will turn frag into a ".space 0".
725 */
726void
727md_convert_frag (headers, seg, fragP)
728 object_headers *headers;
729 segT seg;
730 register fragS *fragP;
731{
a4d24084
KH
732 register char *addressP; /* -> _var to change. */
733 register char *opcodeP; /* -> opcode char(s) to change. */
252b5132 734 register short int extension = 0; /* Size of relaxed address.
a4d24084 735 Added to fr_fix: incl. ALL var chars. */
252b5132
RH
736 register symbolS *symbolP;
737 register long int where;
738 register long int address_of_var;
739 /* Where, in file space, is _var of *fragP? */
740 register long int target_address;
741 /* Where, in file space, does addr point? */
742
743 know (fragP->fr_type == rs_machine_dependent);
252b5132
RH
744 where = fragP->fr_fix;
745 addressP = fragP->fr_literal + where;
746 opcodeP = fragP->fr_opcode;
747 symbolP = fragP->fr_symbol;
748 know (symbolP);
749 target_address = S_GET_VALUE (symbolP) + fragP->fr_offset;
750 address_of_var = fragP->fr_address + where;
751 switch (fragP->fr_subtype)
752 {
753 case ENCODE_RELAX (STATE_PC_RELATIVE, STATE_BYTE):
754 /* *addressP holds the registers number, plus 0x10, if it's deferred
755 mode. To set up the right mode, just OR the size of this displacement */
a4d24084 756 /* Byte displacement. */
252b5132
RH
757 *addressP++ |= TAHOE_PC_OR_BYTE;
758 *addressP = target_address - (address_of_var + 2);
759 extension = 2;
760 break;
761
762 case ENCODE_RELAX (STATE_PC_RELATIVE, STATE_WORD):
a4d24084 763 /* Word displacement. */
252b5132
RH
764 *addressP++ |= TAHOE_PC_OR_WORD;
765 md_number_to_chars (addressP, target_address - (address_of_var + 3), 2);
766 extension = 3;
767 break;
768
769 case ENCODE_RELAX (STATE_PC_RELATIVE, STATE_LONG):
a4d24084 770 /* Long word displacement. */
252b5132
RH
771 *addressP++ |= TAHOE_PC_OR_LONG;
772 md_number_to_chars (addressP, target_address - (address_of_var + 5), 4);
773 extension = 5;
774 break;
775
776 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE):
777 *addressP = target_address - (address_of_var + 1);
778 extension = 1;
779 break;
780
781 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_WORD):
a4d24084 782 *opcodeP ^= 0x10; /* Reverse sense of test. */
252b5132
RH
783 *addressP++ = 3; /* Jump over word branch */
784 *addressP++ = TAHOE_BRW;
785 md_number_to_chars (addressP, target_address - (address_of_var + 4), 2);
786 extension = 4;
787 break;
788
789 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_LONG):
a4d24084 790 *opcodeP ^= 0x10; /* Reverse sense of test. */
252b5132
RH
791 *addressP++ = 6;
792 *addressP++ = TAHOE_JMP;
793 *addressP++ = TAHOE_PC_REL_LONG;
794 md_number_to_chars (addressP, target_address, 4);
795 extension = 7;
796 break;
797
798 case ENCODE_RELAX (STATE_ALWAYS_BRANCH, STATE_BYTE):
799 *addressP = target_address - (address_of_var + 1);
800 extension = 1;
801 break;
802
803 case ENCODE_RELAX (STATE_ALWAYS_BRANCH, STATE_WORD):
804 *opcodeP = TAHOE_BRW;
805 md_number_to_chars (addressP, target_address - (address_of_var + 2), 2);
806 extension = 2;
807 break;
808
809 case ENCODE_RELAX (STATE_ALWAYS_BRANCH, STATE_LONG):
810 *opcodeP = TAHOE_JMP;
811 *addressP++ = TAHOE_PC_REL_LONG;
812 md_number_to_chars (addressP, target_address - (address_of_var + 5), 4);
813 extension = 5;
814 break;
815
816 case ENCODE_RELAX (STATE_BIG_REV_BRANCH, STATE_WORD):
817 md_number_to_chars (addressP, target_address - (address_of_var + 2), 2);
818 extension = 2;
819 break;
820
821 case ENCODE_RELAX (STATE_BIG_REV_BRANCH, STATE_LONG):
822 *opcodeP ^= 0x10;
823 *addressP++ = 0;
824 *addressP++ = 6;
825 *addressP++ = TAHOE_JMP;
826 *addressP++ = TAHOE_PC_REL_LONG;
827 md_number_to_chars (addressP, target_address, 4);
828 extension = 8;
829 break;
830
831 case ENCODE_RELAX (STATE_BIG_NON_REV_BRANCH, STATE_WORD):
832 md_number_to_chars (addressP, target_address - (address_of_var + 2), 2);
833 extension = 2;
834 break;
835
836 case ENCODE_RELAX (STATE_BIG_NON_REV_BRANCH, STATE_LONG):
837 *addressP++ = 0;
838 *addressP++ = 2;
839 *addressP++ = TAHOE_BRB;
840 *addressP++ = 6;
841 *addressP++ = TAHOE_JMP;
842 *addressP++ = TAHOE_PC_REL_LONG;
843 md_number_to_chars (addressP, target_address, 4);
844 extension = 10;
845 break;
846
847 default:
848 BAD_CASE (fragP->fr_subtype);
849 break;
850 }
851 fragP->fr_fix += extension;
852} /* md_convert_frag */
853\f
854
a4d24084 855/* This is the stuff for md_assemble. */
252b5132
RH
856#define FP_REG 13
857#define SP_REG 14
858#define PC_REG 15
859#define BIGGESTREG PC_REG
860
861/*
862 * Parse the string pointed to by START
863 * If it represents a valid register, point START to the character after
864 * the last valid register char, and return the register number (0-15).
865 * If invalid, leave START alone, return -1.
866 * The format has to be exact. I don't do things like eat leading zeros
867 * or the like.
868 * Note: This doesn't check for the next character in the string making
869 * this invalid. Ex: R123 would return 12, it's the callers job to check
870 * what start is point to apon return.
871 *
872 * Valid registers are R1-R15, %1-%15, FP (13), SP (14), PC (15)
873 * Case doesn't matter.
874 */
875int
876tahoe_reg_parse (start)
a4d24084 877 char **start; /* A pointer to the string to parse. */
252b5132
RH
878{
879 register char *regpoint = *start;
880 register int regnum = -1;
881
882 switch (*regpoint++)
883 {
884 case '%': /* Registers can start with a %,
a4d24084 885 R or r, and then a number. */
252b5132
RH
886 case 'R':
887 case 'r':
888 if (isdigit (*regpoint))
889 {
a4d24084 890 /* Got the first digit. */
252b5132
RH
891 regnum = *regpoint++ - '0';
892 if ((regnum == 1) && isdigit (*regpoint))
893 {
a4d24084 894 /* Its a two digit number. */
252b5132
RH
895 regnum = 10 + (*regpoint++ - '0');
896 if (regnum > BIGGESTREG)
897 { /* Number too big? */
898 regnum = -1;
899 }
900 }
901 }
902 break;
903 case 'F': /* Is it the FP */
904 case 'f':
905 switch (*regpoint++)
906 {
907 case 'p':
908 case 'P':
909 regnum = FP_REG;
910 }
911 break;
912 case 's': /* How about the SP */
913 case 'S':
914 switch (*regpoint++)
915 {
916 case 'p':
917 case 'P':
918 regnum = SP_REG;
919 }
920 break;
921 case 'p': /* OR the PC even */
922 case 'P':
923 switch (*regpoint++)
924 {
925 case 'c':
926 case 'C':
927 regnum = PC_REG;
928 }
929 break;
930 }
931
932 if (regnum != -1)
933 { /* No error, so move string pointer */
934 *start = regpoint;
935 }
936 return regnum; /* Return results */
937} /* tahoe_reg_parse */
938\f
939/*
940 * This chops up an operand and figures out its modes and stuff.
941 * It's a little touchy about extra characters.
942 * Optex to start with one extra character so it can be overwritten for
943 * the backward part of the parsing.
944 * You can't put a bunch of extra characters in side to
945 * make the command look cute. ie: * foo ( r1 ) [ r0 ]
946 * If you like doing a lot of typing, try COBOL!
947 * Actually, this parser is a little weak all around. It's designed to be
948 * used with compliers, so I emphisise correct decoding of valid code quickly
949 * rather that catching every possable error.
950 * Note: This uses the expression function, so save input_line_pointer before
951 * calling.
952 *
953 * Sperry defines the semantics of address modes (and values)
954 * by a two-letter code, explained here.
955 *
956 * letter 1: access type
957 *
958 * a address calculation - no data access, registers forbidden
959 * b branch displacement
960 * m read - let go of bus - write back "modify"
961 * r read
962 * w write
963 * v bit field address: like 'a' but registers are OK
964 *
965 * letter 2: data type (i.e. width, alignment)
966 *
967 * b byte
968 * w word
969 * l longword
970 * q quadword (Even regs < 14 allowed) (if 12, you get a warning)
971 * - unconditional synthetic jbr operand
972 * ? simple synthetic reversable branch operand
973 * ! complex synthetic reversable branch operand
974 * : complex synthetic non-reversable branch operand
975 *
976 * The '-?!:' letter 2's are not for external consumption. They are used
977 * by GAS for psuedo ops relaxing code.
978 *
979 * After parsing topP has:
980 *
981 * top_ndx: -1, or the index register. eg 7=[R7]
982 * top_reg: -1, or register number. eg 7 = R7 or (R7)
983 * top_mode: The addressing mode byte. This byte, defines which of
984 * the 11 modes opcode is.
985 * top_access: Access type wanted for this opperand 'b'branch ' '
986 * no-instruction 'amrvw'
987 * top_width: Operand width expected, one of "bwlq?-:!"
988 * exp_of_operand: The expression as parsed by expression()
989 * top_dispsize: Number of bytes in the displacement if we can figure it
990 * out and it's relavent.
991 *
992 * Need syntax checks built.
993 */
994
995void
996tip_op (optex, topP)
997 char *optex; /* The users text input, with one leading character */
998 struct top *topP; /* The tahoe instruction with some fields already set:
999 in: access, width
1000 out: ndx, reg, mode, error, dispsize */
1001
1002{
a4d24084
KH
1003 int mode = 0; /* This operand's mode. */
1004 char segfault = *optex; /* To keep the back parsing from freaking. */
1005 char *point = optex + 1; /* Parsing from front to back. */
1006 char *end; /* Parsing from back to front. */
252b5132
RH
1007 int reg = -1; /* major register, -1 means absent */
1008 int imreg = -1; /* Major register in immediate mode */
1009 int ndx = -1; /* index register number, -1 means absent */
1010 char dec_inc = ' '; /* Is the SP auto-incremented '+' or
a4d24084 1011 auto-decremented '-' or neither ' '. */
252b5132
RH
1012 int immediate = 0; /* 1 if '$' immediate mode */
1013 int call_width = 0; /* If the caller casts the displacement */
1014 int abs_width = 0; /* The width of the absolute displacment */
1015 int com_width = 0; /* Displacement width required by branch */
1016 int deferred = 0; /* 1 if '*' deferral is used */
1017 byte disp_size = 0; /* How big is this operand. 0 == don't know */
1018 char *op_bad = ""; /* Bad operand error */
1019
1020 char *tp, *temp, c; /* Temporary holders */
1021
a4d24084 1022 char access = topP->top_access; /* Save on a deref. */
252b5132
RH
1023 char width = topP->top_width;
1024
1025 int really_none = 0; /* Empty expressions evaluate to 0
1026 but I need to know if it's there or not */
1027 expressionS *expP; /* -> expression values for this operand */
1028
a4d24084 1029 /* Does this command restrict the displacement size. */
252b5132
RH
1030 if (access == 'b')
1031 com_width = (width == 'b' ? 1 :
1032 (width == 'w' ? 2 :
1033 (width == 'l' ? 4 : 0)));
1034
1035 *optex = '\0'; /* This is kind of a back stop for all
1036 the searches to fail on if needed.*/
1037 if (*point == '*')
1038 { /* A dereference? */
1039 deferred = 1;
1040 point++;
1041 }
1042
1043 /* Force words into a certain mode */
1044 /* Bitch, Bitch, Bitch! */
1045 /*
1046 * Using the ^ operator is ambigous. If I have an absolute label
1047 * called 'w' set to, say 2, and I have the expression 'w^1', do I get
1048 * 1, forced to be in word displacement mode, or do I get the value of
1049 * 'w' or'ed with 1 (3 in this case).
1050 * The default is 'w' as an offset, so that's what I use.
1051 * Stick with `, it does the same, and isn't ambig.
1052 */
1053
1054 if (*point != '\0' && ((point[1] == '^') || (point[1] == '`')))
1055 switch (*point)
1056 {
1057 case 'b':
1058 case 'B':
1059 case 'w':
1060 case 'W':
1061 case 'l':
1062 case 'L':
1063 if (com_width)
1064 as_warn (_("Casting a branch displacement is bad form, and is ignored."));
1065 else
1066 {
1067 c = (isupper (*point) ? tolower (*point) : *point);
1068 call_width = ((c == 'b') ? 1 :
1069 ((c == 'w') ? 2 : 4));
1070 }
1071 point += 2;
1072 break;
1073 }
1074
1075 /* Setting immediate mode */
1076 if (*point == '$')
1077 {
1078 immediate = 1;
1079 point++;
1080 }
1081
1082 /*
1083 * I've pulled off all the easy stuff off the front, move to the end and
1084 * yank.
1085 */
1086
a4d24084 1087 for (end = point; *end != '\0'; end++) /* Move to the end. */
252b5132
RH
1088 ;
1089
1090 if (end != point) /* Null string? */
1091 end--;
1092
1093 if (end > point && *end == ' ' && end[-1] != '\'')
1094 end--; /* Hop white space */
1095
a4d24084 1096 /* Is this an index reg. */
252b5132
RH
1097 if ((*end == ']') && (end[-1] != '\''))
1098 {
1099 temp = end;
1100
a4d24084 1101 /* Find opening brace. */
252b5132
RH
1102 for (--end; (*end != '[' && end != point); end--)
1103 ;
1104
a4d24084 1105 /* If I found the opening brace, get the index register number. */
252b5132
RH
1106 if (*end == '[')
1107 {
a4d24084 1108 tp = end + 1; /* tp should point to the start of a reg. */
252b5132
RH
1109 ndx = tahoe_reg_parse (&tp);
1110 if (tp != temp)
a4d24084 1111 { /* Reg. parse error. */
252b5132
RH
1112 ndx = -1;
1113 }
1114 else
1115 {
a4d24084 1116 end--; /* Found it, move past brace. */
252b5132
RH
1117 }
1118 if (ndx == -1)
1119 {
1120 op_bad = _("Couldn't parse the [index] in this operand.");
a4d24084 1121 end = point; /* Force all the rest of the tests to fail. */
252b5132
RH
1122 }
1123 }
1124 else
1125 {
1126 op_bad = _("Couldn't find the opening '[' for the index of this operand.");
a4d24084 1127 end = point; /* Force all the rest of the tests to fail. */
252b5132
RH
1128 }
1129 }
1130
1131 /* Post increment? */
1132 if (*end == '+')
1133 {
1134 dec_inc = '+';
1135 /* was: *end--; */
1136 end--;
1137 }
1138
1139 /* register in parens? */
1140 if ((*end == ')') && (end[-1] != '\''))
1141 {
1142 temp = end;
1143
a4d24084 1144 /* Find opening paren. */
252b5132
RH
1145 for (--end; (*end != '(' && end != point); end--)
1146 ;
1147
a4d24084 1148 /* If I found the opening paren, get the register number. */
252b5132
RH
1149 if (*end == '(')
1150 {
1151 tp = end + 1;
1152 reg = tahoe_reg_parse (&tp);
1153 if (tp != temp)
1154 {
a4d24084 1155 /* Not a register, but could be part of the expression. */
252b5132
RH
1156 reg = -1;
1157 end = temp; /* Rest the pointer back */
1158 }
1159 else
1160 {
a4d24084 1161 end--; /* Found the reg. move before opening paren. */
252b5132
RH
1162 }
1163 }
1164 else
1165 {
1166 op_bad = _("Couldn't find the opening '(' for the deref of this operand.");
a4d24084 1167 end = point; /* Force all the rest of the tests to fail. */
252b5132
RH
1168 }
1169 }
1170
1171 /* Pre decrement? */
1172 if (*end == '-')
1173 {
1174 if (dec_inc != ' ')
1175 {
1176 op_bad = _("Operand can't be both pre-inc and post-dec.");
1177 end = point;
1178 }
1179 else
1180 {
1181 dec_inc = '-';
1182 /* was: *end--; */
1183 end--;
1184 }
1185 }
1186
1187 /*
1188 * Everything between point and end is the 'expression', unless it's
1189 * a register name.
1190 */
1191
1192 c = end[1];
1193 end[1] = '\0';
1194
1195 tp = point;
1196 imreg = tahoe_reg_parse (&point); /* Get the immediate register
1197 if it is there.*/
1198 if (*point != '\0')
1199 {
a4d24084 1200 /* If there is junk after point, then the it's not immediate reg. */
252b5132
RH
1201 point = tp;
1202 imreg = -1;
1203 }
1204
1205 if (imreg != -1 && reg != -1)
1206 op_bad = _("I parsed 2 registers in this operand.");
1207
1208 /*
1209 * Evaluate whats left of the expression to see if it's valid.
1210 * Note again: This assumes that the calling expression has saved
1211 * input_line_pointer. (Nag, nag, nag!)
1212 */
1213
1214 if (*op_bad == '\0')
1215 {
1994a7c7 1216 /* Statement has no syntax goofs yet: let's sniff the expression. */
252b5132
RH
1217 input_line_pointer = point;
1218 expP = &(topP->exp_of_operand);
1219 topP->seg_of_operand = expression (expP);
1220 switch (expP->X_op)
1221 {
1222 case O_absent:
1223 /* No expression. For BSD4.2 compatibility, missing expression is
1224 absolute 0 */
1225 expP->X_op = O_constant;
1226 expP->X_add_number = 0;
1227 really_none = 1;
1228 case O_constant:
1229 /* for SEG_ABSOLUTE, we shouldnt need to set X_op_symbol,
a4d24084 1230 X_add_symbol to any particular value. */
252b5132 1231 /* But, we will program defensively. Since this situation occurs
a4d24084 1232 rarely so it costs us little to do so. */
252b5132
RH
1233 expP->X_add_symbol = NULL;
1234 expP->X_op_symbol = NULL;
1235 /* How many bytes are needed to express this abs value? */
1236 abs_width =
1237 ((((expP->X_add_number & 0xFFFFFF80) == 0) ||
1238 ((expP->X_add_number & 0xFFFFFF80) == 0xFFFFFF80)) ? 1 :
1239 (((expP->X_add_number & 0xFFFF8000) == 0) ||
1240 ((expP->X_add_number & 0xFFFF8000) == 0xFFFF8000)) ? 2 : 4);
1241
1242 case O_symbol:
1243 break;
1244
1245 default:
1246 /*
1247 * Major bug. We can't handle the case of a operator
1248 * expression in a synthetic opcode variable-length
1249 * instruction. We don't have a frag type that is smart
1250 * enough to relax a operator, and so we just force all
1251 * operators to behave like SEG_PASS1s. Clearly, if there is
1252 * a demand we can invent a new or modified frag type and
1253 * then coding up a frag for this case will be easy.
1254 */
1255 need_pass_2 = 1;
1256 op_bad = _("Can't relocate expression error.");
1257 break;
1258
1259 case O_big:
1260 /* This is an error. Tahoe doesn't allow any expressions
1261 bigger that a 32 bit long word. Any bigger has to be referenced
a4d24084 1262 by address. */
252b5132
RH
1263 op_bad = _("Expression is too large for a 32 bits.");
1264 break;
1265 }
1266 if (*input_line_pointer != '\0')
1267 {
1268 op_bad = _("Junk at end of expression.");
1269 }
1270 }
1271
1272 end[1] = c;
1273
1274 /* I'm done, so restore optex */
1275 *optex = segfault;
1276
252b5132
RH
1277 /*
1278 * At this point in the game, we (in theory) have all the components of
1279 * the operand at least parsed. Now it's time to check for syntax/semantic
1280 * errors, and build the mode.
1281 * This is what I have:
1282 * deferred = 1 if '*'
1283 * call_width = 0,1,2,4
1284 * abs_width = 0,1,2,4
1285 * com_width = 0,1,2,4
1286 * immediate = 1 if '$'
1287 * ndx = -1 or reg num
1288 * dec_inc = '-' or '+' or ' '
1289 * reg = -1 or reg num
1290 * imreg = -1 or reg num
1291 * topP->exp_of_operand
1292 * really_none
1293 */
1294 /* Is there a displacement size? */
1295 disp_size = (call_width ? call_width :
1296 (com_width ? com_width :
1297 abs_width ? abs_width : 0));
1298
1299 if (*op_bad == '\0')
1300 {
1301 if (imreg != -1)
1302 {
1303 /* Rn */
1304 mode = TAHOE_DIRECT_REG;
1305 if (deferred || immediate || (dec_inc != ' ') ||
1306 (reg != -1) || !really_none)
1307 op_bad = _("Syntax error in direct register mode.");
1308 else if (ndx != -1)
1309 op_bad = _("You can't index a register in direct register mode.");
1310 else if (imreg == SP_REG && access == 'r')
1311 op_bad =
1312 _("SP can't be the source operand with direct register addressing.");
1313 else if (access == 'a')
1314 op_bad = _("Can't take the address of a register.");
1315 else if (access == 'b')
1316 op_bad = _("Direct Register can't be used in a branch.");
1317 else if (width == 'q' && ((imreg % 2) || (imreg > 13)))
1318 op_bad = _("For quad access, the register must be even and < 14.");
1319 else if (call_width)
1320 op_bad = _("You can't cast a direct register.");
1321
1322 if (*op_bad == '\0')
1323 {
1324 /* No errors, check for warnings */
1325 if (width == 'q' && imreg == 12)
1326 as_warn (_("Using reg 14 for quadwords can tromp the FP register."));
1327
1328 reg = imreg;
1329 }
1330
1331 /* We know: imm = -1 */
1332 }
1333 else if (dec_inc == '-')
1334 {
1335 /* -(SP) */
1336 mode = TAHOE_AUTO_DEC;
1337 if (deferred || immediate || !really_none)
1338 op_bad = _("Syntax error in auto-dec mode.");
1339 else if (ndx != -1)
1340 op_bad = _("You can't have an index auto dec mode.");
1341 else if (access == 'r')
1342 op_bad = _("Auto dec mode cant be used for reading.");
1343 else if (reg != SP_REG)
1344 op_bad = _("Auto dec only works of the SP register.");
1345 else if (access == 'b')
1346 op_bad = _("Auto dec can't be used in a branch.");
1347 else if (width == 'q')
1348 op_bad = _("Auto dec won't work with quadwords.");
1349
1350 /* We know: imm = -1, dec_inc != '-' */
1351 }
1352 else if (dec_inc == '+')
1353 {
1354 if (immediate || !really_none)
1355 op_bad = _("Syntax error in one of the auto-inc modes.");
1356 else if (deferred)
1357 {
1358 /* *(SP)+ */
1359 mode = TAHOE_AUTO_INC_DEFERRED;
1360 if (reg != SP_REG)
1361 op_bad = _("Auto inc deferred only works of the SP register.");
1362 else if (ndx != -1)
1363 op_bad = _("You can't have an index auto inc deferred mode.");
1364 else if (access == 'b')
1365 op_bad = _("Auto inc can't be used in a branch.");
1366 }
1367 else
1368 {
1369 /* (SP)+ */
1370 mode = TAHOE_AUTO_INC;
1371 if (access == 'm' || access == 'w')
1372 op_bad = _("You can't write to an auto inc register.");
1373 else if (reg != SP_REG)
1374 op_bad = _("Auto inc only works of the SP register.");
1375 else if (access == 'b')
1376 op_bad = _("Auto inc can't be used in a branch.");
1377 else if (width == 'q')
1378 op_bad = _("Auto inc won't work with quadwords.");
1379 else if (ndx != -1)
1380 op_bad = _("You can't have an index in auto inc mode.");
1381 }
1382
1383 /* We know: imm = -1, dec_inc == ' ' */
1384 }
1385 else if (reg != -1)
1386 {
1387 if ((ndx != -1) && (reg == SP_REG))
1388 op_bad = _("You can't index the sp register.");
1389 if (deferred)
1390 {
1391 /* *<disp>(Rn) */
1392 mode = TAHOE_REG_DISP_DEFERRED;
1393 if (immediate)
1394 op_bad = _("Syntax error in register displaced mode.");
1395 }
1396 else if (really_none)
1397 {
1398 /* (Rn) */
1399 mode = TAHOE_REG_DEFERRED;
1400 /* if reg = SP then cant be indexed */
1401 }
1402 else
1403 {
1404 /* <disp>(Rn) */
1405 mode = TAHOE_REG_DISP;
1406 }
1407
1408 /* We know: imm = -1, dec_inc == ' ', Reg = -1 */
1409 }
1410 else
1411 {
1412 if (really_none)
1413 op_bad = _("An offest is needed for this operand.");
1414 if (deferred && immediate)
1415 {
1416 /* *$<ADDR> */
1417 mode = TAHOE_ABSOLUTE_ADDR;
1418 disp_size = 4;
1419 }
1420 else if (immediate)
1421 {
1422 /* $<disp> */
1423 mode = TAHOE_IMMEDIATE;
1424 if (ndx != -1)
1425 op_bad = _("You can't index a register in immediate mode.");
1426 if (access == 'a')
1427 op_bad = _("Immediate access can't be used as an address.");
a4d24084 1428 /* ponder the wisdom of a cast because it doesn't do any good. */
252b5132
RH
1429 }
1430 else if (deferred)
1431 {
1432 /* *<disp> */
1433 mode = TAHOE_DISP_REL_DEFERRED;
1434 }
1435 else
1436 {
1437 /* <disp> */
1438 mode = TAHOE_DISPLACED_RELATIVE;
1439 }
1440 }
1441 }
1442
1443 /*
1444 * At this point, all the errors we can do have be checked for.
a4d24084 1445 * We can build the 'top'. */
252b5132
RH
1446
1447 topP->top_ndx = ndx;
1448 topP->top_reg = reg;
1449 topP->top_mode = mode;
1450 topP->top_error = op_bad;
1451 topP->top_dispsize = disp_size;
1452} /* tip_op */
1453\f
1454/*
1455 * t i p ( )
1456 *
1457 * This converts a string into a tahoe instruction.
1458 * The string must be a bare single instruction in tahoe (with BSD4 frobs)
1459 * format.
1460 * It provides at most one fatal error message (which stops the scan)
1461 * some warning messages as it finds them.
1462 * The tahoe instruction is returned in exploded form.
1463 *
1464 * The exploded instruction is returned to a struct tit of your choice.
1465 * #include "tahoe-inst.h" to know what a struct tit is.
1466 *
1467 */
1468
1469static void
1470tip (titP, instring)
a4d24084
KH
1471 struct tit *titP; /* We build an exploded instruction here. */
1472 char *instring; /* Text of a vax instruction: we modify. */
252b5132 1473{
a4d24084 1474 register struct tot_wot *twP = NULL; /* How to bit-encode this opcode. */
252b5132
RH
1475 register char *p; /* 1/skip whitespace.2/scan vot_how */
1476 register char *q; /* */
1477 register unsigned char count; /* counts number of operands seen */
1478 register struct top *operandp;/* scan operands in struct tit */
1479 register char *alloperr = ""; /* error over all operands */
1480 register char c; /* Remember char, (we clobber it
a4d24084 1481 with '\0' temporarily). */
252b5132
RH
1482 char *save_input_line_pointer;
1483
1484 if (*instring == ' ')
a4d24084 1485 ++instring; /* Skip leading whitespace. */
252b5132
RH
1486 for (p = instring; *p && *p != ' '; p++)
1487 ; /* MUST end in end-of-string or
a4d24084
KH
1488 exactly 1 space. */
1489 /* Scanned up to end of operation-code. */
1490 /* Operation-code is ended with whitespace. */
252b5132
RH
1491 if (p == instring)
1492 {
1493 titP->tit_error = _("No operator");
1494 count = 0;
1495 titP->tit_opcode = 0;
1496 }
1497 else
1498 {
1499 c = *p;
1500 *p = '\0';
1501 /*
1502 * Here with instring pointing to what better be an op-name, and p
1503 * pointing to character just past that.
1504 * We trust instring points to an op-name, with no whitespace.
1505 */
1506 twP = (struct tot_wot *) hash_find (op_hash, instring);
a4d24084 1507 *p = c; /* Restore char after op-code. */
252b5132
RH
1508 if (twP == 0)
1509 {
1510 titP->tit_error = _("Unknown operator");
1511 count = 0;
1512 titP->tit_opcode = 0;
1513 }
1514 else
1515 {
1516 /*
1994a7c7 1517 * We found a match! So let's pick up as many operands as the
252b5132
RH
1518 * instruction wants, and even gripe if there are too many.
1519 * We expect comma to seperate each operand.
1520 * We let instring track the text, while p tracks a part of the
1521 * struct tot.
1522 */
1523
1524 count = 0; /* no operands seen yet */
1525 instring = p + (*p != '\0'); /* point past the operation code */
1526 /* tip_op() screws with the input_line_pointer, so save it before
1527 I jump in */
1528 save_input_line_pointer = input_line_pointer;
1529 for (p = twP->args, operandp = titP->tit_operand;
1530 !*alloperr && *p;
1531 operandp++, p += 2)
1532 {
1533 /*
1534 * Here to parse one operand. Leave instring pointing just
1535 * past any one ',' that marks the end of this operand.
1536 */
1537 if (!p[1])
1538 as_fatal (_("Compiler bug: ODD number of bytes in arg structure %s."),
1539 twP->args);
1540 else if (*instring)
1541 {
1542 for (q = instring; (*q != ',' && *q != '\0'); q++)
1543 {
1544 if (*q == '\'' && q[1] != '\0') /* Jump quoted characters */
1545 q++;
1546 }
1547 c = *q;
1548 /*
1549 * Q points to ',' or '\0' that ends argument. C is that
1550 * character.
1551 */
1552 *q = '\0';
1553 operandp->top_access = p[0];
1554 operandp->top_width = p[1];
1555 tip_op (instring - 1, operandp);
a4d24084 1556 *q = c; /* Restore input text. */
252b5132
RH
1557 if (*(operandp->top_error))
1558 {
1559 alloperr = operandp->top_error;
1560 }
1561 instring = q + (c ? 1 : 0); /* next operand (if any) */
1562 count++; /* won another argument, may have an operr */
1563 }
1564 else
1565 alloperr = _("Not enough operands");
1566 }
a4d24084 1567 /* Restore the pointer. */
252b5132
RH
1568 input_line_pointer = save_input_line_pointer;
1569
1570 if (!*alloperr)
1571 {
1572 if (*instring == ' ')
a4d24084 1573 instring++; /* Skip whitespace. */
252b5132
RH
1574 if (*instring)
1575 alloperr = _("Too many operands");
1576 }
1577 titP->tit_error = alloperr;
1578 }
1579 }
1580
a4d24084 1581 titP->tit_opcode = twP->code; /* The op-code. */
252b5132
RH
1582 titP->tit_operands = count;
1583} /* tip */
1584\f
1585/* md_assemble() emit frags for 1 instruction */
1586void
1587md_assemble (instruction_string)
a4d24084 1588 char *instruction_string; /* A string: assemble 1 instruction. */
252b5132
RH
1589{
1590 char *p;
a4d24084
KH
1591 register struct top *operandP;/* An operand. Scans all operands. */
1592 /* char c_save; fixme: remove this line *//* What used to live after an expression. */
1593 /* struct frag *fragP; fixme: remove this line *//* Fragment of code we just made. */
252b5132 1594 /* register struct top *end_operandP; fixme: remove this line *//* -> slot just after last operand
a4d24084 1595 Limit of the for (each operand). */
252b5132
RH
1596 register expressionS *expP; /* -> expression values for this operand */
1597
a4d24084 1598 /* These refer to an instruction operand expression. */
252b5132
RH
1599 segT to_seg; /* Target segment of the address. */
1600
1601 register valueT this_add_number;
a4d24084 1602 register symbolS *this_add_symbol; /* +ve (minuend) symbol. */
252b5132 1603
a4d24084
KH
1604 /* tahoe_opcodeT opcode_as_number; fixme: remove this line *//* The opcode as a number. */
1605 char *opcodeP; /* Where it is in a frag. */
1606 /* char *opmodeP; fixme: remove this line *//* Where opcode type is, in a frag. */
252b5132
RH
1607
1608 int dispsize; /* From top_dispsize: tahoe_operand_width
1609 (in bytes) */
1610 int is_undefined; /* 1 if operand expression's
a4d24084 1611 segment not known yet. */
252b5132
RH
1612 int pc_rel; /* Is this operand pc relative? */
1613
a4d24084 1614 /* Decode the operand. */
252b5132
RH
1615 tip (&t, instruction_string);
1616
1617 /*
1618 * Check to see if this operand decode properly.
1619 * Notice that we haven't made any frags yet.
1620 * If it goofed, then this instruction will wedge in any pass,
1621 * and we can safely flush it, without causing interpass symbol phase
1622 * errors. That is, without changing label values in different passes.
1623 */
1624 if (*t.tit_error)
1625 {
1626 as_warn (_("Ignoring statement due to \"%s\""), t.tit_error);
1627 }
1628 else
1629 {
1630 /* We saw no errors in any operands - try to make frag(s) */
a4d24084
KH
1631 /* Emit op-code. */
1632 /* Remember where it is, in case we want to modify the op-code later. */
252b5132
RH
1633 opcodeP = frag_more (1);
1634 *opcodeP = t.tit_opcode;
a4d24084 1635 /* Now do each operand. */
252b5132
RH
1636 for (operandP = t.tit_operand;
1637 operandP < t.tit_operand + t.tit_operands;
1638 operandP++)
1639 { /* for each operand */
1640 expP = &(operandP->exp_of_operand);
1641 if (operandP->top_ndx >= 0)
1642 {
1643 /* Indexed addressing byte
1644 Legality of indexed mode already checked: it is OK */
1645 FRAG_APPEND_1_CHAR (0x40 + operandP->top_ndx);
1646 } /* if(top_ndx>=0) */
1647
a4d24084 1648 /* Here to make main operand frag(s). */
252b5132
RH
1649 this_add_number = expP->X_add_number;
1650 this_add_symbol = expP->X_add_symbol;
1651 to_seg = operandP->seg_of_operand;
1652 know (to_seg == SEG_UNKNOWN || \
1653 to_seg == SEG_ABSOLUTE || \
1654 to_seg == SEG_DATA || \
1655 to_seg == SEG_TEXT || \
1656 to_seg == SEG_BSS);
1657 is_undefined = (to_seg == SEG_UNKNOWN);
1658 /* Do we know how big this opperand is? */
1659 dispsize = operandP->top_dispsize;
1660 pc_rel = 0;
1661 /* Deal with the branch possabilities. (Note, this doesn't include
1662 jumps.)*/
1663 if (operandP->top_access == 'b')
1664 {
1665 /* Branches must be expressions. A psuedo branch can also jump to
a4d24084 1666 an absolute address. */
252b5132
RH
1667 if (to_seg == now_seg || is_undefined)
1668 {
a4d24084 1669 /* If is_undefined, then it might BECOME now_seg by relax time. */
252b5132
RH
1670 if (dispsize)
1671 {
1672 /* I know how big the branch is supposed to be (it's a normal
a4d24084 1673 branch), so I set up the frag, and let GAS do the rest. */
252b5132
RH
1674 p = frag_more (dispsize);
1675 fix_new (frag_now, p - frag_now->fr_literal,
1676 this_add_symbol, this_add_number,
1677 size_to_fx (dispsize, 1),
1678 NULL);
1679 }
1680 else
1681 {
1682 /* (to_seg==now_seg || to_seg == SEG_UNKNOWN) && dispsize==0 */
1683 /* If we don't know how big it is, then its a synthetic branch,
a4d24084 1684 so we set up a simple relax state. */
252b5132
RH
1685 switch (operandP->top_width)
1686 {
1687 case TAHOE_WIDTH_CONDITIONAL_JUMP:
1688 /* Simple (conditional) jump. I may have to reverse the
1689 condition of opcodeP, and then jump to my destination.
1690 I set 1 byte aside for the branch off set, and could need 6
1691 more bytes for the pc_rel jump */
1692 frag_var (rs_machine_dependent, 7, 1,
1693 ENCODE_RELAX (STATE_CONDITIONAL_BRANCH,
1694 is_undefined ? STATE_UNDF : STATE_BYTE),
1695 this_add_symbol, this_add_number, opcodeP);
1696 break;
1697 case TAHOE_WIDTH_ALWAYS_JUMP:
1698 /* Simple (unconditional) jump. I may have to convert this to
a4d24084 1699 a word branch, or an absolute jump. */
252b5132
RH
1700 frag_var (rs_machine_dependent, 5, 1,
1701 ENCODE_RELAX (STATE_ALWAYS_BRANCH,
1702 is_undefined ? STATE_UNDF : STATE_BYTE),
1703 this_add_symbol, this_add_number, opcodeP);
1704 break;
a4d24084 1705 /* The smallest size for the next 2 cases is word. */
252b5132
RH
1706 case TAHOE_WIDTH_BIG_REV_JUMP:
1707 frag_var (rs_machine_dependent, 8, 2,
1708 ENCODE_RELAX (STATE_BIG_REV_BRANCH,
1709 is_undefined ? STATE_UNDF : STATE_WORD),
1710 this_add_symbol, this_add_number,
1711 opcodeP);
1712 break;
1713 case TAHOE_WIDTH_BIG_NON_REV_JUMP:
1714 frag_var (rs_machine_dependent, 10, 2,
1715 ENCODE_RELAX (STATE_BIG_NON_REV_BRANCH,
1716 is_undefined ? STATE_UNDF : STATE_WORD),
1717 this_add_symbol, this_add_number,
1718 opcodeP);
1719 break;
1720 default:
1721 as_fatal (_("Compliler bug: Got a case (%d) I wasn't expecting."),
1722 operandP->top_width);
1723 }
1724 }
1725 }
1726 else
1727 {
1728 /* to_seg != now_seg && to_seg != seg_unknown (still in branch)
1729 In other words, I'm jumping out of my segment so extend the
a4d24084 1730 branches to jumps, and let GAS fix them. */
252b5132
RH
1731
1732 /* These are "branches" what will always be branches around a jump
1733 to the correct addresss in real life.
1734 If to_seg is SEG_ABSOLUTE, just encode the branch in,
a4d24084 1735 else let GAS fix the address. */
252b5132
RH
1736
1737 switch (operandP->top_width)
1738 {
1739 /* The theory:
1740 For SEG_ABSOLUTE, then mode is ABSOLUTE_ADDR, jump
1741 to that addresss (not pc_rel).
a4d24084 1742 For other segs, address is a long word PC rel jump. */
252b5132
RH
1743 case TAHOE_WIDTH_CONDITIONAL_JUMP:
1744 /* b<cond> */
1745 /* To reverse the condition in a TAHOE branch,
1746 complement bit 4 */
1747 *opcodeP ^= 0x10;
1748 p = frag_more (7);
1749 *p++ = 6;
1750 *p++ = TAHOE_JMP;
1751 *p++ = (operandP->top_mode ==
1752 TAHOE_ABSOLUTE_ADDR ? TAHOE_ABSOLUTE_ADDR :
1753 TAHOE_PC_REL_LONG);
1754 fix_new (frag_now, p - frag_now->fr_literal,
1755 this_add_symbol, this_add_number,
1756 (to_seg != SEG_ABSOLUTE) ? FX_PCREL32 : FX_32, NULL);
1757 /*
1758 * Now (eg) BLEQ 1f
1759 * JMP foo
1760 * 1:
1761 */
1762 break;
1763 case TAHOE_WIDTH_ALWAYS_JUMP:
1764 /* br, just turn it into a jump */
1765 *opcodeP = TAHOE_JMP;
1766 p = frag_more (5);
1767 *p++ = (operandP->top_mode ==
1768 TAHOE_ABSOLUTE_ADDR ? TAHOE_ABSOLUTE_ADDR :
1769 TAHOE_PC_REL_LONG);
1770 fix_new (frag_now, p - frag_now->fr_literal,
1771 this_add_symbol, this_add_number,
1772 (to_seg != SEG_ABSOLUTE) ? FX_PCREL32 : FX_32, NULL);
1773 /* Now (eg) JMP foo */
1774 break;
1775 case TAHOE_WIDTH_BIG_REV_JUMP:
1776 p = frag_more (8);
1777 *opcodeP ^= 0x10;
1778 *p++ = 0;
1779 *p++ = 6;
1780 *p++ = TAHOE_JMP;
1781 *p++ = (operandP->top_mode ==
1782 TAHOE_ABSOLUTE_ADDR ? TAHOE_ABSOLUTE_ADDR :
1783 TAHOE_PC_REL_LONG);
1784 fix_new (frag_now, p - frag_now->fr_literal,
1785 this_add_symbol, this_add_number,
1786 (to_seg != SEG_ABSOLUTE) ? FX_PCREL32 : FX_32, NULL);
1787 /*
1788 * Now (eg) ACBx 1f
1789 * JMP foo
1790 * 1:
1791 */
1792 break;
1793 case TAHOE_WIDTH_BIG_NON_REV_JUMP:
1794 p = frag_more (10);
1795 *p++ = 0;
1796 *p++ = 2;
1797 *p++ = TAHOE_BRB;
1798 *p++ = 6;
1799 *p++ = TAHOE_JMP;
1800 *p++ = (operandP->top_mode ==
1801 TAHOE_ABSOLUTE_ADDR ? TAHOE_ABSOLUTE_ADDR :
1802 TAHOE_PC_REL_LONG);
1803 fix_new (frag_now, p - frag_now->fr_literal,
1804 this_add_symbol, this_add_number,
1805 (to_seg != SEG_ABSOLUTE) ? FX_PCREL32 : FX_32, NULL);
1806 /*
1807 * Now (eg) xOBxxx 1f
1808 * BRB 2f
1809 * 1: JMP @#foo
1810 * 2:
1811 */
1812 break;
1813 case 'b':
1814 case 'w':
1815 as_warn (_("Real branch displacements must be expressions."));
1816 break;
1817 default:
1818 as_fatal (_("Complier error: I got an unknown synthetic branch :%c"),
1819 operandP->top_width);
1820 break;
1821 }
1822 }
1823 }
1824 else
1825 {
a4d24084 1826 /* It ain't a branch operand. */
252b5132
RH
1827 switch (operandP->top_mode)
1828 {
1829 /* Auto-foo access, only works for one reg (SP)
a4d24084 1830 so the only thing needed is the mode. */
252b5132
RH
1831 case TAHOE_AUTO_DEC:
1832 case TAHOE_AUTO_INC:
1833 case TAHOE_AUTO_INC_DEFERRED:
1834 FRAG_APPEND_1_CHAR (operandP->top_mode);
1835 break;
1836
1837 /* Numbered Register only access. Only thing needed is the
1838 mode + Register number */
1839 case TAHOE_DIRECT_REG:
1840 case TAHOE_REG_DEFERRED:
1841 FRAG_APPEND_1_CHAR (operandP->top_mode + operandP->top_reg);
1842 break;
1843
1844 /* An absolute address. It's size is always 5 bytes.
a4d24084 1845 (mode_type + 4 byte address). */
252b5132
RH
1846 case TAHOE_ABSOLUTE_ADDR:
1847 know ((this_add_symbol == NULL));
1848 p = frag_more (5);
1849 *p = TAHOE_ABSOLUTE_ADDR;
1850 md_number_to_chars (p + 1, this_add_number, 4);
1851 break;
1852
1853 /* Immediate data. If the size isn't known, then it's an address
a4d24084 1854 + and offset, which is 4 bytes big. */
252b5132
RH
1855 case TAHOE_IMMEDIATE:
1856 if (this_add_symbol != NULL)
1857 {
1858 p = frag_more (5);
1859 *p++ = TAHOE_IMMEDIATE_LONGWORD;
1860 fix_new (frag_now, p - frag_now->fr_literal,
1861 this_add_symbol, this_add_number,
1862 FX_32, NULL);
1863 }
1864 else
1865 {
a4d24084 1866 /* It's a integer, and I know it's size. */
252b5132
RH
1867 if ((unsigned) this_add_number < 0x40)
1868 {
1869 /* Will it fit in a literal? */
1870 FRAG_APPEND_1_CHAR ((byte) this_add_number);
1871 }
1872 else
1873 {
1874 p = frag_more (dispsize + 1);
1875 switch (dispsize)
1876 {
1877 case 1:
1878 *p++ = TAHOE_IMMEDIATE_BYTE;
1879 *p = (byte) this_add_number;
1880 break;
1881 case 2:
1882 *p++ = TAHOE_IMMEDIATE_WORD;
1883 md_number_to_chars (p, this_add_number, 2);
1884 break;
1885 case 4:
1886 *p++ = TAHOE_IMMEDIATE_LONGWORD;
1887 md_number_to_chars (p, this_add_number, 4);
1888 break;
1889 }
1890 }
1891 }
1892 break;
1893
1894 /* Distance from the PC. If the size isn't known, we have to relax
1895 into it. The difference between this and disp(sp) is that
1896 this offset is pc_rel, and disp(sp) isn't.
a4d24084 1897 Note the drop through code. */
252b5132
RH
1898
1899 case TAHOE_DISPLACED_RELATIVE:
1900 case TAHOE_DISP_REL_DEFERRED:
1901 operandP->top_reg = PC_REG;
1902 pc_rel = 1;
1903
1904 /* Register, plus a displacement mode. Save the register number,
1905 and weather its deffered or not, and relax the size if it isn't
a4d24084 1906 known. */
252b5132
RH
1907 case TAHOE_REG_DISP:
1908 case TAHOE_REG_DISP_DEFERRED:
1909 if (operandP->top_mode == TAHOE_DISP_REL_DEFERRED ||
1910 operandP->top_mode == TAHOE_REG_DISP_DEFERRED)
1911 operandP->top_reg += 0x10; /* deffered mode is always 0x10 higher
a4d24084 1912 than it's non-deffered sibling. */
252b5132
RH
1913
1914 /* Is this a value out of this segment?
1915 The first part of this conditional is a cludge to make gas
1916 produce the same output as 'as' when there is a lable, in
1917 the current segment, displaceing a register. It's strange,
1918 and no one in their right mind would do it, but it's easy
a4d24084 1919 to cludge. */
252b5132
RH
1920 if ((dispsize == 0 && !pc_rel) ||
1921 (to_seg != now_seg && !is_undefined && to_seg != SEG_ABSOLUTE))
1922 dispsize = 4;
1923
1924 if (dispsize == 0)
1925 {
1926 /*
1927 * We have a SEG_UNKNOWN symbol, or the size isn't cast.
1928 * It might turn out to be in the same segment as
1929 * the instruction, permitting relaxation.
1930 */
1931 p = frag_var (rs_machine_dependent, 5, 2,
1932 ENCODE_RELAX (STATE_PC_RELATIVE,
1933 is_undefined ? STATE_UNDF : STATE_BYTE),
1934 this_add_symbol, this_add_number, 0);
1935 *p = operandP->top_reg;
1936 }
1937 else
1938 {
a4d24084 1939 /* Either this is an abs, or a cast. */
252b5132
RH
1940 p = frag_more (dispsize + 1);
1941 switch (dispsize)
1942 {
1943 case 1:
1944 *p = TAHOE_PC_OR_BYTE + operandP->top_reg;
1945 break;
1946 case 2:
1947 *p = TAHOE_PC_OR_WORD + operandP->top_reg;
1948 break;
1949 case 4:
1950 *p = TAHOE_PC_OR_LONG + operandP->top_reg;
1951 break;
1952 };
1953 fix_new (frag_now, p + 1 - frag_now->fr_literal,
1954 this_add_symbol, this_add_number,
1955 size_to_fx (dispsize, pc_rel), NULL);
1956 }
1957 break;
1958 default:
1959 as_fatal (_("Barf, bad mode %x\n"), operandP->top_mode);
1960 }
1961 }
1962 } /* for(operandP) */
1963 } /* if(!need_pass_2 && !goofed) */
1964} /* tahoe_assemble() */
1965
a4d24084 1966/* We have no need to default values of symbols. */
252b5132 1967
252b5132
RH
1968symbolS *
1969md_undefined_symbol (name)
1970 char *name;
1971{
1972 return 0;
1973} /* md_undefined_symbol() */
1974
a4d24084 1975/* Round up a section size to the appropriate boundary. */
252b5132
RH
1976valueT
1977md_section_align (segment, size)
1978 segT segment;
1979 valueT size;
1980{
1981 return ((size + 7) & ~7); /* Round all sects to multiple of 8 */
1982} /* md_section_align() */
1983
1984/* Exactly what point is a PC-relative offset relative TO?
1985 On the sparc, they're relative to the address of the offset, plus
1986 its size. This gets us to the following instruction.
1987 (??? Is this right? FIXME-SOON) */
a4d24084 1988long
252b5132
RH
1989md_pcrel_from (fixP)
1990 fixS *fixP;
1991{
1992 return (((fixP->fx_type == FX_8
1993 || fixP->fx_type == FX_PCREL8)
1994 ? 1
1995 : ((fixP->fx_type == FX_16
1996 || fixP->fx_type == FX_PCREL16)
1997 ? 2
1998 : ((fixP->fx_type == FX_32
1999 || fixP->fx_type == FX_PCREL32)
2000 ? 4
2001 : 0))) + fixP->fx_where + fixP->fx_frag->fr_address);
2002} /* md_pcrel_from() */
2003
a4d24084 2004int
252b5132
RH
2005tc_is_pcrel (fixP)
2006 fixS *fixP;
2007{
2008 /* should never be called */
2009 know (0);
2010 return (0);
2011} /* tc_is_pcrel() */
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