Commit | Line | Data |
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64556643 | 1 | /* tc-tic80.c -- Assemble for the TI TMS320C80 (MV) |
414a1069 | 2 | Copyright (C) 1996, 1997 Free Software Foundation, Inc. |
64556643 FF |
3 | |
4 | This file is part of GAS, the GNU Assembler. | |
5 | ||
6 | GAS is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GAS is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GAS; see the file COPYING. If not, write to the Free | |
18 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
19 | 02111-1307, USA. */ | |
20 | ||
21 | #include "as.h" | |
22 | #include "opcode/tic80.h" | |
23 | ||
11e08196 FF |
24 | #define internal_error(what) \ |
25 | as_fatal("internal error:%s:%d: %s\n",__FILE__,__LINE__,what) | |
26 | #define internal_error_a(what,arg) \ | |
27 | as_fatal("internal error:%s:%d: %s %d\n",__FILE__,__LINE__,what,arg) | |
28 | ||
64556643 FF |
29 | \f |
30 | /* Generic assembler global variables which must be defined by all targets. */ | |
31 | ||
32 | /* Characters which always start a comment. */ | |
33 | const char comment_chars[] = ";"; | |
34 | ||
35 | /* Characters which start a comment at the beginning of a line. */ | |
36 | const char line_comment_chars[] = ";*"; | |
37 | ||
16171d71 FF |
38 | /* Characters which may be used to separate multiple commands on a single |
39 | line. The semicolon is such a character by default and should not be | |
40 | explicitly listed. */ | |
11e08196 | 41 | const char line_separator_chars[] = ""; |
64556643 FF |
42 | |
43 | /* Characters which are used to indicate an exponent in a floating | |
44 | point number. */ | |
45 | const char EXP_CHARS[] = "eE"; | |
46 | ||
47 | /* Characters which mean that a number is a floating point constant, | |
48 | as in 0d1.0. */ | |
49 | const char FLT_CHARS[] = "dD"; | |
50 | ||
f1ce6af4 FF |
51 | /* This table describes all the machine specific pseudo-ops the assembler |
52 | has to support. The fields are: | |
16171d71 | 53 | |
f1ce6af4 FF |
54 | pseudo-op name without dot |
55 | function to call to execute this pseudo-op | |
16171d71 | 56 | integer arg to pass to the function */ |
f1ce6af4 FF |
57 | |
58 | const pseudo_typeS md_pseudo_table[] = | |
59 | { | |
ec72a266 FF |
60 | { "word", cons, 4 }, /* FIXME: Should this be machine independent? */ |
61 | { "bss", s_lcomm, 1 }, | |
62 | { NULL, NULL, 0 } | |
f1ce6af4 FF |
63 | }; |
64 | ||
65 | /* Opcode hash table. */ | |
66 | static struct hash_control *tic80_hash; | |
67 | ||
68 | static struct tic80_opcode * find_opcode PARAMS ((struct tic80_opcode *, expressionS [])); | |
11e08196 | 69 | static void build_insn PARAMS ((struct tic80_opcode *, expressionS *)); |
f1ce6af4 | 70 | static int get_operands PARAMS ((expressionS exp[])); |
11e08196 | 71 | static int const_overflow PARAMS ((unsigned long num, int bits, int flags)); |
f1ce6af4 | 72 | |
64556643 | 73 | \f |
f1ce6af4 FF |
74 | int |
75 | md_estimate_size_before_relax (fragP, segment_type) | |
76 | fragS *fragP; | |
77 | segT segment_type; | |
78 | { | |
11e08196 | 79 | internal_error ("Relaxation is a luxury we can't afford"); |
f1ce6af4 FF |
80 | return (-1); |
81 | } | |
82 | ||
83 | /* We have no need to default values of symbols. */ | |
84 | ||
85 | /* ARGSUSED */ | |
86 | symbolS * | |
87 | md_undefined_symbol (name) | |
88 | char *name; | |
89 | { | |
90 | return 0; | |
91 | } | |
92 | ||
93 | /* Turn a string in input_line_pointer into a floating point constant of type | |
94 | type, and store the appropriate bytes in *litP. The number of LITTLENUMS | |
95 | emitted is stored in *sizeP . An error message is returned, or NULL on OK. | |
96 | */ | |
97 | ||
98 | #define MAX_LITTLENUMS 4 | |
99 | ||
100 | char * | |
101 | md_atof (type, litP, sizeP) | |
102 | int type; | |
103 | char *litP; | |
104 | int *sizeP; | |
105 | { | |
106 | int prec; | |
107 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
108 | LITTLENUM_TYPE *wordP; | |
109 | char *t; | |
110 | char *atof_ieee (); | |
111 | ||
112 | switch (type) | |
113 | { | |
114 | case 'f': | |
115 | case 'F': | |
116 | case 's': | |
117 | case 'S': | |
118 | prec = 2; | |
119 | break; | |
120 | ||
121 | case 'd': | |
122 | case 'D': | |
123 | case 'r': | |
124 | case 'R': | |
125 | prec = 4; | |
126 | break; | |
127 | ||
128 | default: | |
129 | *sizeP = 0; | |
130 | return "bad call to md_atof ()"; | |
131 | } | |
132 | ||
133 | t = atof_ieee (input_line_pointer, type, words); | |
134 | if (t) | |
135 | { | |
136 | input_line_pointer = t; | |
137 | } | |
138 | ||
139 | *sizeP = prec * sizeof (LITTLENUM_TYPE); | |
140 | ||
141 | for (wordP = words; prec--;) | |
142 | { | |
143 | md_number_to_chars (litP, (valueT) (*wordP++), sizeof (LITTLENUM_TYPE)); | |
144 | litP += sizeof (LITTLENUM_TYPE); | |
145 | } | |
146 | return (NULL); | |
147 | } | |
148 | ||
11e08196 FF |
149 | /* Check to see if the constant value in NUM will fit in a field of |
150 | width BITS if it has flags FLAGS. */ | |
151 | ||
152 | static int | |
153 | const_overflow (num, bits, flags) | |
154 | unsigned long num; | |
155 | int bits; | |
156 | int flags; | |
157 | { | |
158 | long min, max; | |
159 | int retval = 0; | |
160 | ||
161 | /* Only need to check fields less than 32 bits wide */ | |
162 | if (bits < 32) | |
163 | if (flags & TIC80_OPERAND_SIGNED) | |
164 | { | |
165 | max = (1 << (bits - 1)) - 1; | |
166 | min = - (1 << (bits - 1)); | |
167 | retval = ((long) num > max) || ((long) num < min); | |
168 | } | |
169 | else | |
170 | { | |
171 | max = (1 << bits) - 1; | |
172 | min = 0; | |
173 | retval = (num > max) || (num < min); | |
174 | } | |
175 | return (retval); | |
176 | } | |
177 | ||
f1ce6af4 FF |
178 | /* get_operands() parses a string of operands and fills in a passed array of |
179 | expressions in EXP. | |
180 | ||
181 | Note that we use O_absent expressions to record additional information | |
182 | about the previous non-O_absent expression, such as ":m" or ":s" | |
183 | modifiers or register numbers enclosed in parens like "(r10)". | |
184 | ||
185 | Returns the number of expressions that were placed in EXP. | |
186 | ||
187 | */ | |
188 | ||
189 | static int | |
190 | get_operands (exp) | |
191 | expressionS exp[]; | |
192 | { | |
193 | char *p = input_line_pointer; | |
194 | int numexp = 0; | |
195 | int mflag = 0; | |
196 | int sflag = 0; | |
197 | int parens = 0; | |
198 | ||
199 | while (*p) | |
200 | { | |
201 | /* Skip leading whitespace */ | |
202 | while (*p == ' ' || *p == '\t' || *p == ',') | |
203 | { | |
204 | p++; | |
205 | } | |
206 | ||
207 | /* Check to see if we have any operands left to parse */ | |
208 | if (*p == 0 || *p == '\n' || *p == '\r') | |
209 | { | |
210 | break; | |
211 | } | |
212 | ||
213 | /* Notice scaling or direct memory operand modifiers and save them in | |
214 | an O_absent expression after the expression that they modify. */ | |
215 | ||
216 | if (*p == ':') | |
217 | { | |
218 | p++; | |
219 | exp[numexp].X_op = O_absent; | |
220 | if (*p == 'm') | |
221 | { | |
222 | p++; | |
223 | exp[numexp].X_add_number = TIC80_OPERAND_M_SI | TIC80_OPERAND_M_LI; | |
224 | } | |
225 | else if (*p == 's') | |
226 | { | |
227 | p++; | |
228 | exp[numexp].X_add_number = TIC80_OPERAND_SCALED; | |
229 | } | |
230 | else | |
231 | { | |
232 | as_bad ("':' not followed by 'm' or 's'"); | |
233 | } | |
234 | numexp++; | |
235 | continue; | |
236 | } | |
237 | ||
238 | /* Handle leading '(' on operands that use them, by recording that we | |
239 | have entered a paren nesting level and then continuing. We complain | |
240 | about multiple nesting. */ | |
241 | ||
242 | if (*p == '(') | |
243 | { | |
244 | if (++parens != 1) | |
245 | { | |
246 | as_bad ("paren nesting"); | |
247 | } | |
248 | p++; | |
249 | continue; | |
250 | } | |
251 | ||
252 | /* Handle trailing ')' on operands that use them, by reducing the | |
253 | nesting level and then continuing. We complain if there were too | |
254 | many closures. */ | |
255 | ||
256 | if (*p == ')') | |
257 | { | |
258 | /* Record that we have left a paren group and continue */ | |
259 | if (--parens < 0) | |
260 | { | |
261 | as_bad ("mismatched parenthesis"); | |
262 | } | |
263 | p++; | |
264 | continue; | |
265 | } | |
266 | ||
267 | /* Begin operand parsing at the current scan point. */ | |
268 | ||
269 | input_line_pointer = p; | |
16171d71 | 270 | expression (&exp[numexp]); |
f1ce6af4 FF |
271 | |
272 | if (exp[numexp].X_op == O_illegal) | |
273 | { | |
274 | as_bad ("illegal operand"); | |
275 | } | |
276 | else if (exp[numexp].X_op == O_absent) | |
277 | { | |
278 | as_bad ("missing operand"); | |
279 | } | |
280 | ||
281 | numexp++; | |
282 | p = input_line_pointer; | |
283 | } | |
284 | ||
285 | if (parens) | |
286 | { | |
287 | exp[numexp].X_op = O_absent; | |
288 | exp[numexp++].X_add_number = TIC80_OPERAND_PARENS; | |
289 | } | |
290 | ||
11e08196 FF |
291 | /* Mark the end of the valid operands with an illegal expression. */ |
292 | exp[numexp].X_op = O_illegal; | |
293 | ||
f1ce6af4 FF |
294 | return (numexp); |
295 | } | |
296 | ||
297 | /* find_opcode() gets a pointer to the entry in the opcode table that | |
298 | matches the instruction being assembled, or returns NULL if no such match | |
299 | is found. | |
300 | ||
301 | First it parses all the operands and save them as expressions. Note that | |
302 | we use O_absent expressions to record additional information about the | |
303 | previous non-O_absent expression, such as ":m" or ":s" modifiers or | |
304 | register numbers enclosed in parens like "(r10)". | |
305 | ||
11e08196 | 306 | It then looks at all opcodes with the same name and uses the operands to |
f1ce6af4 FF |
307 | choose the correct opcode. */ |
308 | ||
f1ce6af4 FF |
309 | static struct tic80_opcode * |
310 | find_opcode (opcode, myops) | |
311 | struct tic80_opcode *opcode; | |
312 | expressionS myops[]; | |
313 | { | |
11e08196 FF |
314 | int numexp; /* Number of expressions from parsing operands */ |
315 | int expi; /* Index of current expression to match */ | |
316 | int opi; /* Index of current operand to match */ | |
317 | int match = 0; /* Set to 1 when an operand match is found */ | |
318 | struct tic80_opcode *opc = opcode; /* Pointer to current opcode table entry */ | |
319 | const struct tic80_opcode *end; /* Pointer to end of opcode table */ | |
320 | ||
321 | /* First parse all the operands so we only have to do it once. There may | |
322 | be more expressions generated than there are operands. */ | |
323 | ||
324 | numexp = get_operands (myops); | |
325 | ||
326 | /* For each opcode with the same name, try to match it against the parsed | |
327 | operands. */ | |
328 | ||
329 | end = tic80_opcodes + tic80_num_opcodes; | |
330 | while (!match && (opc < end) && (strcmp (opc -> name, opcode -> name) == 0)) | |
331 | { | |
332 | /* Start off assuming a match. If we find a mismatch, then this is | |
333 | reset and the operand/expr matching loop terminates with match | |
334 | equal to zero, which allows us to try the next opcode. */ | |
335 | ||
336 | match = 1; | |
337 | ||
338 | /* For each expression, try to match it against the current operand | |
339 | for the current opcode. Upon any mismatch, we abandon further | |
340 | matching for the current opcode table entry. */ | |
f1ce6af4 | 341 | |
11e08196 FF |
342 | for (expi = 0, opi = -1; (expi < numexp) && match; expi++) |
343 | { | |
344 | int bits, flags, X_op, num; | |
f1ce6af4 | 345 | |
11e08196 FF |
346 | X_op = myops[expi].X_op; |
347 | num = myops[expi].X_add_number; | |
348 | if (X_op != O_absent) | |
349 | { | |
350 | /* The O_absent expressions apply to the previously seen | |
351 | operand, so only increment the operand index when the | |
352 | current expression needs to be matched against the next | |
353 | operand. */ | |
354 | opi++; | |
355 | } | |
356 | flags = tic80_operands[opc -> operands[opi]].flags; | |
357 | bits = tic80_operands[opc -> operands[opi]].bits; | |
f1ce6af4 | 358 | |
11e08196 FF |
359 | switch (X_op) |
360 | { | |
361 | case O_register: | |
362 | /* Also check that registers that are supposed to be even actually | |
363 | are even. */ | |
364 | if (((flags & TIC80_OPERAND_GPR) != (num & TIC80_OPERAND_GPR)) || | |
365 | ((flags & TIC80_OPERAND_FPA) != (num & TIC80_OPERAND_FPA)) || | |
366 | ((flags & TIC80_OPERAND_CR) != (num & TIC80_OPERAND_CR)) || | |
367 | ((flags & TIC80_OPERAND_EVEN) && (num & 1)) || | |
368 | const_overflow (num & ~TIC80_OPERAND_MASK, bits, flags)) | |
369 | { | |
370 | match = 0; | |
371 | } | |
372 | break; | |
373 | case O_constant: | |
374 | if ((flags & TIC80_OPERAND_ENDMASK) && (num == 32)) | |
375 | { | |
376 | /* Endmask values of 0 and 32 give identical results */ | |
377 | num = 0; | |
378 | } | |
379 | if ((flags & (TIC80_OPERAND_FPA | TIC80_OPERAND_GPR)) || | |
380 | const_overflow (num, bits, flags)) | |
381 | { | |
382 | match = 0; | |
383 | } | |
384 | break; | |
d160b69e FF |
385 | case O_symbol: |
386 | if ((bits < 32) && (flags & TIC80_OPERAND_PCREL)) | |
387 | { | |
388 | /* For now we only allow PC relative relocations in the | |
389 | short immediate fields, like the TI assembler. | |
390 | FIXME: Should be able to choose "best-fit". */ | |
391 | } | |
ec72a266 | 392 | else if ((bits == 32) /* && (flags & TIC80_OPERAND_BASEREL) */) |
d160b69e FF |
393 | { |
394 | /* For now we only allow base relative relocations in | |
395 | the long immediate fields, like the TI assembler. | |
396 | FIXME: Should be able to choose "best-fit". */ | |
397 | } | |
398 | else | |
399 | { | |
400 | /* Symbols that don't match one of the above cases are | |
401 | rejected as an operand. */ | |
402 | match = 0; | |
403 | } | |
404 | break; | |
11e08196 FF |
405 | case O_illegal: |
406 | case O_absent: | |
11e08196 FF |
407 | case O_symbol_rva: |
408 | case O_big: | |
409 | case O_uminus: | |
410 | case O_bit_not: | |
411 | case O_logical_not: | |
412 | case O_multiply: | |
413 | case O_divide: | |
414 | case O_modulus: | |
415 | case O_left_shift: | |
416 | case O_right_shift: | |
417 | case O_bit_inclusive_or: | |
418 | case O_bit_or_not: | |
419 | case O_bit_exclusive_or: | |
420 | case O_bit_and: | |
421 | case O_add: | |
422 | case O_subtract: | |
423 | case O_eq: | |
424 | case O_ne: | |
425 | case O_lt: | |
426 | case O_le: | |
427 | case O_ge: | |
428 | case O_gt: | |
429 | case O_logical_and: | |
430 | case O_logical_or: | |
431 | case O_max: | |
432 | default: | |
433 | internal_error_a ("unhandled expression type", X_op); | |
434 | } | |
435 | } | |
436 | if (!match) | |
437 | { | |
438 | opc++; | |
439 | } | |
440 | } | |
441 | ||
442 | return (match ? opc : NULL); | |
443 | ||
444 | #if 0 | |
f1ce6af4 FF |
445 | |
446 | /* Now search the opcode table table for one with operands that | |
447 | matches what we've got. */ | |
448 | ||
449 | while (!match) | |
450 | { | |
451 | match = 1; | |
452 | for (i = 0; opcode -> operands[i]; i++) | |
453 | { | |
454 | int flags = tic80_operands[opcode->operands[i]].flags; | |
455 | int X_op = myops[i].X_op; | |
456 | int num = myops[i].X_add_number; | |
457 | ||
458 | if (X_op == 0) | |
459 | { | |
460 | match = 0; | |
461 | break; | |
462 | } | |
463 | ||
11e08196 | 464 | if (flags & (TIC80_OPERAND_GPR | TIC80_OPERAND_FPA | TIC80_OPERAND_CR)) |
f1ce6af4 FF |
465 | { |
466 | if ((X_op != O_register) || | |
11e08196 FF |
467 | ((flags & TIC80_OPERAND_GPR) != (num & TIC80_OPERAND_GPR)) || |
468 | ((flags & TIC80_OPERAND_FPA) != (num & TIC80_OPERAND_FPA)) || | |
469 | ((flags & TIC80_OPERAND_CR) != (num & TIC80_OPERAND_CR))) | |
f1ce6af4 FF |
470 | { |
471 | match=0; | |
472 | break; | |
473 | } | |
474 | } | |
475 | ||
11e08196 FF |
476 | if (((flags & TIC80_OPERAND_MINUS) && ((X_op != O_absent) || (num != TIC80_OPERAND_MINUS))) || |
477 | ((flags & TIC80_OPERAND_PLUS) && ((X_op != O_absent) || (num != TIC80_OPERAND_PLUS))) || | |
478 | ((flags & TIC80_OPERAND_ATMINUS) && ((X_op != O_absent) || (num != TIC80_OPERAND_ATMINUS))) || | |
479 | ((flags & TIC80_OPERAND_ATPAR) && ((X_op != O_absent) || (num != TIC80_OPERAND_ATPAR))) || | |
480 | ((flags & TIC80_OPERAND_ATSIGN) && ((X_op != O_absent) || (num != TIC80_OPERAND_ATSIGN)))) | |
f1ce6af4 FF |
481 | { |
482 | match=0; | |
483 | break; | |
484 | } | |
485 | } | |
486 | /* we're only done if the operands matched so far AND there | |
487 | are no more to check */ | |
488 | if (match && myops[i].X_op==0) | |
489 | break; | |
490 | else | |
491 | match = 0; | |
492 | ||
493 | next_opcode = opcode+1; | |
494 | if (next_opcode->opcode == 0) | |
495 | break; | |
496 | if (strcmp(next_opcode->name, opcode->name)) | |
497 | break; | |
498 | opcode = next_opcode; | |
499 | } | |
500 | ||
501 | if (!match) | |
502 | { | |
503 | as_bad ("bad opcode or operands"); | |
504 | return (0); | |
505 | } | |
506 | ||
507 | /* Check that all registers that are required to be even are. */ | |
508 | /* Also, if any operands were marked as registers, but were really symbols */ | |
509 | /* fix that here. */ | |
510 | for (i=0; opcode->operands[i]; i++) | |
511 | { | |
11e08196 | 512 | if ((tic80_operands[opcode->operands[i]].flags & TIC80_OPERAND_EVEN) && |
f1ce6af4 | 513 | (myops[i].X_add_number & 1)) |
11e08196 | 514 | as_fatal ("Register number must be EVEN"); |
f1ce6af4 FF |
515 | if (myops[i].X_op == O_register) |
516 | { | |
11e08196 | 517 | if (!(tic80_operands[opcode->operands[i]].flags & TIC80_OPERAND_REG)) |
f1ce6af4 FF |
518 | { |
519 | myops[i].X_op = O_symbol; | |
520 | myops[i].X_add_symbol = symbol_find_or_make ((char *)myops[i].X_op_symbol); | |
521 | myops[i].X_add_number = 0; | |
522 | myops[i].X_op_symbol = NULL; | |
523 | } | |
524 | } | |
525 | } | |
11e08196 FF |
526 | |
527 | #endif | |
f1ce6af4 FF |
528 | } |
529 | ||
530 | /* build_insn takes a pointer to the opcode entry in the opcode table | |
11e08196 | 531 | and the array of operand expressions and writes out the instruction. */ |
f1ce6af4 | 532 | |
11e08196 FF |
533 | static void |
534 | build_insn (opcode, opers) | |
f1ce6af4 FF |
535 | struct tic80_opcode *opcode; |
536 | expressionS *opers; | |
f1ce6af4 | 537 | { |
11e08196 FF |
538 | int expi; /* Index of current expression to match */ |
539 | int opi; /* Index of current operand to match */ | |
540 | unsigned long insn[2]; /* Instruction and long immediate (if any) */ | |
541 | int extended = 0; /* Nonzero if instruction is 8 bytes */ | |
542 | char *f; /* Temporary pointer to output location */ | |
543 | ||
544 | /* Start with the raw opcode bits from the opcode table. */ | |
545 | insn[0] = opcode -> opcode; | |
546 | ||
d160b69e FF |
547 | /* We are going to insert at least one 32 bit opcode so get the |
548 | frag now. */ | |
549 | ||
550 | f = frag_more (4); | |
551 | ||
11e08196 FF |
552 | /* For each operand expression, insert the appropriate bits into the |
553 | instruction . */ | |
554 | for (expi = 0, opi = -1; opers[expi].X_op != O_illegal; expi++) | |
555 | { | |
556 | int bits, shift, flags, X_op, num; | |
557 | ||
558 | X_op = opers[expi].X_op; | |
559 | num = opers[expi].X_add_number; | |
560 | if (X_op != O_absent) | |
561 | { | |
562 | /* The O_absent expressions apply to the previously seen | |
563 | operand, so only increment the operand index when the | |
564 | current expression needs to be matched against the next | |
565 | operand. */ | |
566 | opi++; | |
567 | } | |
568 | else | |
569 | { | |
570 | /* Found a modifier that applies to the previously | |
571 | seen operand, so handle it. */ | |
572 | switch (opers[expi].X_add_number) | |
573 | { | |
574 | case TIC80_OPERAND_M_SI | TIC80_OPERAND_M_LI: | |
575 | internal_error_a ("unhandled operand modifier", opers[expi].X_add_number); | |
576 | break; | |
577 | case TIC80_OPERAND_SCALED: | |
578 | internal_error_a ("unhandled operand modifier", opers[expi].X_add_number); | |
579 | break; | |
580 | case TIC80_OPERAND_PARENS: | |
581 | internal_error_a ("unhandled operand modifier", opers[expi].X_add_number); | |
582 | break; | |
583 | default: | |
584 | internal_error_a ("unhandled operand modifier", opers[expi].X_add_number); | |
585 | break; | |
586 | } | |
587 | } | |
588 | flags = tic80_operands[opcode -> operands[opi]].flags; | |
589 | bits = tic80_operands[opcode -> operands[opi]].bits; | |
590 | shift = tic80_operands[opcode -> operands[opi]].shift; | |
591 | ||
592 | switch (X_op) | |
593 | { | |
594 | case O_register: | |
595 | num &= ~TIC80_OPERAND_MASK; | |
596 | insn[0] = insn[0] | (num << shift); | |
597 | break; | |
598 | case O_constant: | |
599 | if ((flags & TIC80_OPERAND_ENDMASK) && (num == 32)) | |
600 | { | |
601 | /* Endmask values of 0 and 32 give identical results */ | |
602 | num = 0; | |
603 | } | |
d160b69e FF |
604 | else if ((flags & TIC80_OPERAND_BITNUM)) |
605 | { | |
606 | /* BITNUM values are stored in one's complement form */ | |
607 | num = (~num & 0x1F); | |
608 | } | |
11e08196 FF |
609 | /* Mask off upper bits, just it case it is signed and is negative */ |
610 | if (bits < 32) | |
611 | { | |
612 | num &= (1 << bits) - 1; | |
613 | insn[0] = insn[0] | (num << shift); | |
614 | } | |
615 | else | |
616 | { | |
617 | extended++; | |
618 | insn[1] = num; | |
619 | } | |
620 | break; | |
d160b69e FF |
621 | case O_symbol: |
622 | if (flags & TIC80_OPERAND_PCREL) | |
623 | { | |
624 | fix_new_exp (frag_now, | |
625 | f - (frag_now -> fr_literal), | |
626 | 4, /* FIXME! how is this used? */ | |
627 | &opers[expi], | |
628 | 1, | |
629 | R_MPPCR); | |
630 | } | |
ec72a266 | 631 | else if (bits == 32) /* was (flags & TIC80_OPERAND_BASEREL) */ |
d160b69e FF |
632 | { |
633 | extended++; | |
634 | fix_new_exp (frag_now, | |
635 | (f + 4) - (frag_now -> fr_literal), | |
636 | 4, | |
637 | &opers[expi], | |
ec72a266 FF |
638 | 0, |
639 | R_RELLONGX); | |
d160b69e FF |
640 | } |
641 | else | |
642 | { | |
ec72a266 | 643 | internal_error ("symbol reloc that is not PC relative or 32 bits"); |
d160b69e FF |
644 | } |
645 | break; | |
11e08196 FF |
646 | case O_illegal: |
647 | case O_absent: | |
11e08196 FF |
648 | case O_symbol_rva: |
649 | case O_big: | |
650 | case O_uminus: | |
651 | case O_bit_not: | |
652 | case O_logical_not: | |
653 | case O_multiply: | |
654 | case O_divide: | |
655 | case O_modulus: | |
656 | case O_left_shift: | |
657 | case O_right_shift: | |
658 | case O_bit_inclusive_or: | |
659 | case O_bit_or_not: | |
660 | case O_bit_exclusive_or: | |
661 | case O_bit_and: | |
662 | case O_add: | |
663 | case O_subtract: | |
664 | case O_eq: | |
665 | case O_ne: | |
666 | case O_lt: | |
667 | case O_le: | |
668 | case O_ge: | |
669 | case O_gt: | |
670 | case O_logical_and: | |
671 | case O_logical_or: | |
672 | case O_max: | |
673 | default: | |
674 | internal_error_a ("unhandled expression", X_op); | |
675 | break; | |
676 | } | |
677 | } | |
678 | ||
679 | /* Write out the instruction, either 4 or 8 bytes. */ | |
680 | ||
11e08196 FF |
681 | md_number_to_chars (f, insn[0], 4); |
682 | if (extended) | |
683 | { | |
684 | f = frag_more (4); | |
685 | md_number_to_chars (f, insn[1], 4); | |
686 | } | |
f1ce6af4 FF |
687 | } |
688 | ||
16171d71 FF |
689 | /* This is the main entry point for the machine-dependent assembler. Gas |
690 | calls this function for each input line which does not contain a | |
691 | pseudoop. | |
692 | ||
693 | STR points to a NULL terminated machine dependent instruction. This | |
694 | function is supposed to emit the frags/bytes it assembles to. */ | |
f1ce6af4 FF |
695 | |
696 | void | |
697 | md_assemble (str) | |
698 | char *str; | |
699 | { | |
700 | char *scan; | |
701 | unsigned char *input_line_save; | |
702 | struct tic80_opcode *opcode; | |
11e08196 | 703 | expressionS myops[16]; |
f1ce6af4 FF |
704 | unsigned long insn; |
705 | ||
706 | /* Ensure there is something there to assemble. */ | |
707 | assert (str); | |
708 | ||
709 | /* Drop any leading whitespace. */ | |
710 | while (isspace (*str)) | |
711 | { | |
712 | str++; | |
713 | } | |
714 | ||
715 | /* Isolate the mnemonic from the rest of the string by finding the first | |
716 | whitespace character and zapping it to a null byte. */ | |
717 | for (scan = str; *scan != '\000' && !isspace (*scan); scan++) {;} | |
718 | if (*scan != '\000') | |
719 | { | |
720 | *scan++ = '\000'; | |
721 | } | |
722 | ||
723 | /* Try to find this mnemonic in the hash table */ | |
724 | if ((opcode = (struct tic80_opcode *) hash_find (tic80_hash, str)) == NULL) | |
725 | { | |
726 | as_bad ("Invalid mnemonic: '%s'", str); | |
727 | return; | |
728 | } | |
729 | ||
730 | str = scan; | |
731 | while (isspace (*scan)) | |
732 | { | |
733 | scan++; | |
734 | } | |
735 | ||
736 | input_line_save = input_line_pointer; | |
737 | input_line_pointer = str; | |
738 | ||
739 | opcode = find_opcode (opcode, myops); | |
740 | if (opcode == NULL) | |
741 | { | |
11e08196 | 742 | as_bad ("Invalid operands: '%s'", input_line_save); |
f1ce6af4 FF |
743 | } |
744 | ||
745 | input_line_pointer = input_line_save; | |
11e08196 | 746 | build_insn (opcode, myops); |
f1ce6af4 FF |
747 | } |
748 | ||
16171d71 FF |
749 | /* This function is called once at the start of assembly, after the command |
750 | line arguments have been parsed and all the machine independent | |
751 | initializations have been completed. | |
752 | ||
753 | It should set up all the tables, etc., that the machine dependent part of | |
754 | the assembler will need. */ | |
f1ce6af4 FF |
755 | |
756 | void | |
757 | md_begin () | |
758 | { | |
759 | char *prev_name = ""; | |
760 | register const struct tic80_opcode *op; | |
761 | register const struct tic80_opcode *op_end; | |
16171d71 | 762 | const struct predefined_symbol *pdsp; |
f1ce6af4 | 763 | |
16171d71 | 764 | tic80_hash = hash_new (); |
f1ce6af4 FF |
765 | |
766 | /* Insert unique names into hash table. The TIc80 instruction set | |
767 | has many identical opcode names that have different opcodes based | |
768 | on the operands. This hash table then provides a quick index to | |
769 | the first opcode with a particular name in the opcode table. */ | |
770 | ||
771 | op_end = tic80_opcodes + tic80_num_opcodes; | |
772 | for (op = tic80_opcodes; op < op_end; op++) | |
773 | { | |
774 | if (strcmp (prev_name, op -> name) != 0) | |
775 | { | |
776 | prev_name = (char *) op -> name; | |
777 | hash_insert (tic80_hash, op -> name, (char *) op); | |
778 | } | |
779 | } | |
16171d71 FF |
780 | |
781 | /* Insert the predefined symbols into the symbol table. We use symbol_create | |
782 | rather than symbol_new so that these symbols don't end up in the object | |
783 | files' symbol table. Note that the values of the predefined symbols include | |
784 | some upper bits that distinguish the type of the symbol (register, bitnum, | |
785 | condition code, etc) and these bits must be masked away before actually | |
786 | inserting the values into the instruction stream. For registers we put | |
787 | these bits in the symbol table since we use them later and there is no | |
788 | question that they aren't part of the register number. For constants we | |
789 | can't do that since the constant can be any value, so they are masked off | |
790 | before putting them into the symbol table. */ | |
791 | ||
792 | pdsp = NULL; | |
793 | while ((pdsp = tic80_next_predefined_symbol (pdsp)) != NULL) | |
794 | { | |
795 | segT segment; | |
796 | valueT valu; | |
797 | int symtype; | |
798 | ||
799 | symtype = PDS_VALUE (pdsp) & TIC80_OPERAND_MASK; | |
800 | switch (symtype) | |
801 | { | |
802 | case TIC80_OPERAND_GPR: | |
803 | case TIC80_OPERAND_FPA: | |
804 | case TIC80_OPERAND_CR: | |
805 | segment = reg_section; | |
806 | valu = PDS_VALUE (pdsp); | |
807 | break; | |
808 | case TIC80_OPERAND_CC: | |
809 | case TIC80_OPERAND_BITNUM: | |
810 | segment = absolute_section; | |
811 | valu = PDS_VALUE (pdsp) & ~TIC80_OPERAND_MASK; | |
812 | break; | |
813 | default: | |
814 | internal_error_a ("unhandled predefined symbol bits", symtype); | |
815 | break; | |
816 | } | |
817 | symbol_table_insert (symbol_create (PDS_NAME (pdsp), segment, valu, | |
818 | &zero_address_frag)); | |
819 | } | |
f1ce6af4 FF |
820 | } |
821 | ||
822 | \f | |
823 | ||
16171d71 FF |
824 | /* The assembler adds md_shortopts to the string passed to getopt. */ |
825 | ||
f1ce6af4 FF |
826 | CONST char *md_shortopts = ""; |
827 | ||
16171d71 FF |
828 | /* The assembler adds md_longopts to the machine independent long options |
829 | that are passed to getopt. */ | |
830 | ||
f1ce6af4 FF |
831 | struct option md_longopts[] = { |
832 | {NULL, no_argument, NULL, 0} | |
833 | }; | |
834 | ||
835 | size_t md_longopts_size = sizeof(md_longopts); | |
836 | ||
16171d71 FF |
837 | /* The md_parse_option function will be called whenever getopt returns an |
838 | unrecognized code, presumably indicating a special code value which | |
839 | appears in md_longopts for machine specific command line options. */ | |
f1ce6af4 FF |
840 | |
841 | int | |
842 | md_parse_option (c, arg) | |
843 | int c; | |
844 | char *arg; | |
845 | { | |
846 | return (0); | |
847 | } | |
848 | ||
16171d71 FF |
849 | /* The md_show_usage function will be called whenever a usage message is |
850 | printed. It should print a description of the machine specific options | |
851 | found in md_longopts. */ | |
f1ce6af4 FF |
852 | |
853 | void | |
854 | md_show_usage (stream) | |
855 | FILE *stream; | |
856 | { | |
857 | } | |
858 | ||
859 | \f | |
860 | /* Attempt to simplify or even eliminate a fixup. The return value is | |
861 | ignored; perhaps it was once meaningful, but now it is historical. | |
862 | To indicate that a fixup has been eliminated, set fixP->fx_done. | |
863 | */ | |
864 | ||
865 | void | |
866 | md_apply_fix (fixP, val) | |
867 | fixS *fixP; | |
868 | long val; | |
869 | { | |
d160b69e FF |
870 | char *dest = fixP -> fx_frag -> fr_literal + fixP -> fx_where; |
871 | ||
872 | switch (fixP -> fx_r_type) | |
873 | { | |
874 | case R_RELLONGX: | |
875 | md_number_to_chars (dest, (valueT) val, 4); | |
876 | break; | |
877 | case R_MPPCR: | |
878 | /* FIXME! - should check for overflow of the 15 bit field */ | |
879 | *dest++ = val >> 2; | |
880 | *dest = (*dest & 0x80) | val >> 10; | |
881 | break; | |
b16a8c8e FF |
882 | case R_ABS: |
883 | md_number_to_chars (dest, (valueT) val, fixP -> fx_size); | |
884 | break; | |
d160b69e FF |
885 | default: |
886 | internal_error_a ("unhandled relocation type in fixup", fixP -> fx_r_type); | |
887 | break; | |
888 | } | |
f1ce6af4 FF |
889 | } |
890 | ||
891 | \f | |
892 | /* Functions concerning relocs. */ | |
893 | ||
894 | /* The location from which a PC relative jump should be calculated, | |
d160b69e FF |
895 | given a PC relative reloc. |
896 | ||
897 | For the TIc80, this is the address of the 32 bit opcode containing | |
898 | the PC relative field. */ | |
f1ce6af4 FF |
899 | |
900 | long | |
901 | md_pcrel_from (fixP) | |
902 | fixS *fixP; | |
903 | { | |
d160b69e | 904 | return (fixP -> fx_frag -> fr_address + fixP -> fx_where) ; |
f1ce6af4 FF |
905 | } |
906 | ||
907 | /* | |
908 | * Called after relax() is finished. | |
909 | * In: Address of frag. | |
910 | * fr_type == rs_machine_dependent. | |
911 | * fr_subtype is what the address relaxed to. | |
912 | * | |
913 | * Out: Any fixSs and constants are set up. | |
914 | * Caller will turn frag into a ".space 0". | |
915 | */ | |
916 | ||
917 | void | |
918 | md_convert_frag (headers, seg, fragP) | |
919 | object_headers *headers; | |
920 | segT seg; | |
921 | fragS *fragP; | |
922 | { | |
11e08196 | 923 | internal_error ("md_convert_frag() not implemented yet"); |
f1ce6af4 FF |
924 | abort (); |
925 | } | |
926 | ||
927 | \f | |
928 | /*ARGSUSED*/ | |
929 | void | |
930 | tc_coff_symbol_emit_hook (ignore) | |
931 | symbolS *ignore; | |
932 | { | |
933 | } | |
934 | ||
935 | #if defined OBJ_COFF | |
936 | ||
937 | short | |
938 | tc_coff_fix2rtype (fixP) | |
939 | fixS *fixP; | |
940 | { | |
d160b69e | 941 | return (fixP -> fx_r_type); |
f1ce6af4 FF |
942 | } |
943 | ||
944 | #endif /* OBJ_COFF */ | |
945 | ||
64556643 | 946 | /* end of tc-tic80.c */ |