Commit | Line | Data |
---|---|---|
64556643 | 1 | /* tc-tic80.c -- Assemble for the TI TMS320C80 (MV) |
414a1069 | 2 | Copyright (C) 1996, 1997 Free Software Foundation, Inc. |
64556643 FF |
3 | |
4 | This file is part of GAS, the GNU Assembler. | |
5 | ||
6 | GAS is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GAS is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GAS; see the file COPYING. If not, write to the Free | |
18 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
19 | 02111-1307, USA. */ | |
20 | ||
21 | #include "as.h" | |
22 | #include "opcode/tic80.h" | |
23 | ||
11e08196 FF |
24 | #define internal_error(what) \ |
25 | as_fatal("internal error:%s:%d: %s\n",__FILE__,__LINE__,what) | |
26 | #define internal_error_a(what,arg) \ | |
27 | as_fatal("internal error:%s:%d: %s %d\n",__FILE__,__LINE__,what,arg) | |
28 | ||
64556643 FF |
29 | \f |
30 | /* Generic assembler global variables which must be defined by all targets. */ | |
31 | ||
32 | /* Characters which always start a comment. */ | |
33 | const char comment_chars[] = ";"; | |
34 | ||
35 | /* Characters which start a comment at the beginning of a line. */ | |
64251de5 | 36 | const char line_comment_chars[] = ";*#"; |
64556643 | 37 | |
16171d71 FF |
38 | /* Characters which may be used to separate multiple commands on a single |
39 | line. The semicolon is such a character by default and should not be | |
40 | explicitly listed. */ | |
11e08196 | 41 | const char line_separator_chars[] = ""; |
64556643 FF |
42 | |
43 | /* Characters which are used to indicate an exponent in a floating | |
44 | point number. */ | |
45 | const char EXP_CHARS[] = "eE"; | |
46 | ||
47 | /* Characters which mean that a number is a floating point constant, | |
1e12595d FF |
48 | as in 0f1.0. */ |
49 | const char FLT_CHARS[] = "fF"; | |
64556643 | 50 | |
f1ce6af4 FF |
51 | /* This table describes all the machine specific pseudo-ops the assembler |
52 | has to support. The fields are: | |
16171d71 | 53 | |
f1ce6af4 FF |
54 | pseudo-op name without dot |
55 | function to call to execute this pseudo-op | |
16171d71 | 56 | integer arg to pass to the function */ |
f1ce6af4 | 57 | |
1ea52646 FF |
58 | extern void obj_coff_section (); |
59 | ||
f1ce6af4 FF |
60 | const pseudo_typeS md_pseudo_table[] = |
61 | { | |
1ea52646 FF |
62 | { "align", s_align_bytes, 4 }, /* Do byte alignment, default is a 4 byte boundary */ |
63 | { "word", cons, 4 }, /* FIXME: Should this be machine independent? */ | |
64 | { "bss", s_lcomm, 1 }, | |
65 | { "sect", obj_coff_section, 0}, /* For compatibility with TI tools */ | |
66 | { "section", obj_coff_section, 0}, /* Standard COFF .section pseudo-op */ | |
67 | { NULL, NULL, 0 } | |
f1ce6af4 FF |
68 | }; |
69 | ||
70 | /* Opcode hash table. */ | |
71 | static struct hash_control *tic80_hash; | |
72 | ||
73 | static struct tic80_opcode * find_opcode PARAMS ((struct tic80_opcode *, expressionS [])); | |
11e08196 | 74 | static void build_insn PARAMS ((struct tic80_opcode *, expressionS *)); |
f1ce6af4 | 75 | static int get_operands PARAMS ((expressionS exp[])); |
11e08196 | 76 | static int const_overflow PARAMS ((unsigned long num, int bits, int flags)); |
f1ce6af4 | 77 | |
64556643 | 78 | \f |
f1ce6af4 FF |
79 | int |
80 | md_estimate_size_before_relax (fragP, segment_type) | |
81 | fragS *fragP; | |
82 | segT segment_type; | |
83 | { | |
11e08196 | 84 | internal_error ("Relaxation is a luxury we can't afford"); |
f1ce6af4 FF |
85 | return (-1); |
86 | } | |
87 | ||
88 | /* We have no need to default values of symbols. */ | |
89 | ||
90 | /* ARGSUSED */ | |
91 | symbolS * | |
92 | md_undefined_symbol (name) | |
93 | char *name; | |
94 | { | |
95 | return 0; | |
96 | } | |
97 | ||
98 | /* Turn a string in input_line_pointer into a floating point constant of type | |
99 | type, and store the appropriate bytes in *litP. The number of LITTLENUMS | |
100 | emitted is stored in *sizeP . An error message is returned, or NULL on OK. | |
101 | */ | |
102 | ||
103 | #define MAX_LITTLENUMS 4 | |
104 | ||
105 | char * | |
106 | md_atof (type, litP, sizeP) | |
107 | int type; | |
108 | char *litP; | |
109 | int *sizeP; | |
110 | { | |
111 | int prec; | |
112 | LITTLENUM_TYPE words[MAX_LITTLENUMS]; | |
113 | LITTLENUM_TYPE *wordP; | |
114 | char *t; | |
115 | char *atof_ieee (); | |
116 | ||
117 | switch (type) | |
118 | { | |
119 | case 'f': | |
120 | case 'F': | |
121 | case 's': | |
122 | case 'S': | |
123 | prec = 2; | |
124 | break; | |
125 | ||
126 | case 'd': | |
127 | case 'D': | |
128 | case 'r': | |
129 | case 'R': | |
130 | prec = 4; | |
131 | break; | |
132 | ||
133 | default: | |
134 | *sizeP = 0; | |
135 | return "bad call to md_atof ()"; | |
136 | } | |
137 | ||
138 | t = atof_ieee (input_line_pointer, type, words); | |
139 | if (t) | |
140 | { | |
141 | input_line_pointer = t; | |
142 | } | |
143 | ||
144 | *sizeP = prec * sizeof (LITTLENUM_TYPE); | |
145 | ||
146 | for (wordP = words; prec--;) | |
147 | { | |
148 | md_number_to_chars (litP, (valueT) (*wordP++), sizeof (LITTLENUM_TYPE)); | |
149 | litP += sizeof (LITTLENUM_TYPE); | |
150 | } | |
151 | return (NULL); | |
152 | } | |
153 | ||
11e08196 FF |
154 | /* Check to see if the constant value in NUM will fit in a field of |
155 | width BITS if it has flags FLAGS. */ | |
156 | ||
157 | static int | |
158 | const_overflow (num, bits, flags) | |
159 | unsigned long num; | |
160 | int bits; | |
161 | int flags; | |
162 | { | |
163 | long min, max; | |
164 | int retval = 0; | |
165 | ||
166 | /* Only need to check fields less than 32 bits wide */ | |
167 | if (bits < 32) | |
168 | if (flags & TIC80_OPERAND_SIGNED) | |
169 | { | |
170 | max = (1 << (bits - 1)) - 1; | |
171 | min = - (1 << (bits - 1)); | |
172 | retval = ((long) num > max) || ((long) num < min); | |
173 | } | |
174 | else | |
175 | { | |
176 | max = (1 << bits) - 1; | |
177 | min = 0; | |
178 | retval = (num > max) || (num < min); | |
179 | } | |
180 | return (retval); | |
181 | } | |
182 | ||
f1ce6af4 FF |
183 | /* get_operands() parses a string of operands and fills in a passed array of |
184 | expressions in EXP. | |
185 | ||
186 | Note that we use O_absent expressions to record additional information | |
187 | about the previous non-O_absent expression, such as ":m" or ":s" | |
188 | modifiers or register numbers enclosed in parens like "(r10)". | |
189 | ||
190 | Returns the number of expressions that were placed in EXP. | |
191 | ||
192 | */ | |
193 | ||
194 | static int | |
195 | get_operands (exp) | |
196 | expressionS exp[]; | |
197 | { | |
198 | char *p = input_line_pointer; | |
199 | int numexp = 0; | |
200 | int mflag = 0; | |
201 | int sflag = 0; | |
202 | int parens = 0; | |
203 | ||
204 | while (*p) | |
205 | { | |
206 | /* Skip leading whitespace */ | |
207 | while (*p == ' ' || *p == '\t' || *p == ',') | |
208 | { | |
209 | p++; | |
210 | } | |
211 | ||
212 | /* Check to see if we have any operands left to parse */ | |
213 | if (*p == 0 || *p == '\n' || *p == '\r') | |
214 | { | |
215 | break; | |
216 | } | |
217 | ||
218 | /* Notice scaling or direct memory operand modifiers and save them in | |
219 | an O_absent expression after the expression that they modify. */ | |
220 | ||
221 | if (*p == ':') | |
222 | { | |
223 | p++; | |
224 | exp[numexp].X_op = O_absent; | |
225 | if (*p == 'm') | |
226 | { | |
227 | p++; | |
f92f247b | 228 | /* This is a ":m" modifier */ |
f1ce6af4 FF |
229 | exp[numexp].X_add_number = TIC80_OPERAND_M_SI | TIC80_OPERAND_M_LI; |
230 | } | |
231 | else if (*p == 's') | |
232 | { | |
233 | p++; | |
f92f247b | 234 | /* This is a ":s" modifier */ |
f1ce6af4 FF |
235 | exp[numexp].X_add_number = TIC80_OPERAND_SCALED; |
236 | } | |
237 | else | |
238 | { | |
239 | as_bad ("':' not followed by 'm' or 's'"); | |
240 | } | |
241 | numexp++; | |
242 | continue; | |
243 | } | |
244 | ||
245 | /* Handle leading '(' on operands that use them, by recording that we | |
246 | have entered a paren nesting level and then continuing. We complain | |
247 | about multiple nesting. */ | |
248 | ||
249 | if (*p == '(') | |
250 | { | |
251 | if (++parens != 1) | |
252 | { | |
253 | as_bad ("paren nesting"); | |
254 | } | |
255 | p++; | |
256 | continue; | |
257 | } | |
258 | ||
259 | /* Handle trailing ')' on operands that use them, by reducing the | |
260 | nesting level and then continuing. We complain if there were too | |
261 | many closures. */ | |
262 | ||
263 | if (*p == ')') | |
264 | { | |
265 | /* Record that we have left a paren group and continue */ | |
266 | if (--parens < 0) | |
267 | { | |
268 | as_bad ("mismatched parenthesis"); | |
269 | } | |
270 | p++; | |
271 | continue; | |
272 | } | |
273 | ||
274 | /* Begin operand parsing at the current scan point. */ | |
275 | ||
276 | input_line_pointer = p; | |
16171d71 | 277 | expression (&exp[numexp]); |
f1ce6af4 FF |
278 | |
279 | if (exp[numexp].X_op == O_illegal) | |
280 | { | |
281 | as_bad ("illegal operand"); | |
282 | } | |
283 | else if (exp[numexp].X_op == O_absent) | |
284 | { | |
285 | as_bad ("missing operand"); | |
286 | } | |
287 | ||
288 | numexp++; | |
289 | p = input_line_pointer; | |
290 | } | |
291 | ||
292 | if (parens) | |
293 | { | |
294 | exp[numexp].X_op = O_absent; | |
295 | exp[numexp++].X_add_number = TIC80_OPERAND_PARENS; | |
296 | } | |
297 | ||
11e08196 FF |
298 | /* Mark the end of the valid operands with an illegal expression. */ |
299 | exp[numexp].X_op = O_illegal; | |
300 | ||
f1ce6af4 FF |
301 | return (numexp); |
302 | } | |
303 | ||
304 | /* find_opcode() gets a pointer to the entry in the opcode table that | |
305 | matches the instruction being assembled, or returns NULL if no such match | |
306 | is found. | |
307 | ||
308 | First it parses all the operands and save them as expressions. Note that | |
309 | we use O_absent expressions to record additional information about the | |
310 | previous non-O_absent expression, such as ":m" or ":s" modifiers or | |
311 | register numbers enclosed in parens like "(r10)". | |
312 | ||
11e08196 | 313 | It then looks at all opcodes with the same name and uses the operands to |
f1ce6af4 FF |
314 | choose the correct opcode. */ |
315 | ||
f1ce6af4 FF |
316 | static struct tic80_opcode * |
317 | find_opcode (opcode, myops) | |
318 | struct tic80_opcode *opcode; | |
319 | expressionS myops[]; | |
320 | { | |
11e08196 FF |
321 | int numexp; /* Number of expressions from parsing operands */ |
322 | int expi; /* Index of current expression to match */ | |
323 | int opi; /* Index of current operand to match */ | |
324 | int match = 0; /* Set to 1 when an operand match is found */ | |
325 | struct tic80_opcode *opc = opcode; /* Pointer to current opcode table entry */ | |
326 | const struct tic80_opcode *end; /* Pointer to end of opcode table */ | |
327 | ||
328 | /* First parse all the operands so we only have to do it once. There may | |
329 | be more expressions generated than there are operands. */ | |
330 | ||
331 | numexp = get_operands (myops); | |
332 | ||
333 | /* For each opcode with the same name, try to match it against the parsed | |
334 | operands. */ | |
335 | ||
336 | end = tic80_opcodes + tic80_num_opcodes; | |
337 | while (!match && (opc < end) && (strcmp (opc -> name, opcode -> name) == 0)) | |
338 | { | |
339 | /* Start off assuming a match. If we find a mismatch, then this is | |
340 | reset and the operand/expr matching loop terminates with match | |
341 | equal to zero, which allows us to try the next opcode. */ | |
342 | ||
343 | match = 1; | |
344 | ||
345 | /* For each expression, try to match it against the current operand | |
346 | for the current opcode. Upon any mismatch, we abandon further | |
347 | matching for the current opcode table entry. */ | |
f1ce6af4 | 348 | |
11e08196 FF |
349 | for (expi = 0, opi = -1; (expi < numexp) && match; expi++) |
350 | { | |
351 | int bits, flags, X_op, num; | |
f1ce6af4 | 352 | |
11e08196 FF |
353 | X_op = myops[expi].X_op; |
354 | num = myops[expi].X_add_number; | |
f92f247b FF |
355 | |
356 | /* The O_absent expressions apply to the same operand as the most | |
357 | recent non O_absent expression. So only increment the operand | |
358 | index when the current expression is not one of these special | |
359 | expressions. */ | |
360 | ||
11e08196 FF |
361 | if (X_op != O_absent) |
362 | { | |
11e08196 FF |
363 | opi++; |
364 | } | |
f92f247b | 365 | |
11e08196 FF |
366 | flags = tic80_operands[opc -> operands[opi]].flags; |
367 | bits = tic80_operands[opc -> operands[opi]].bits; | |
f1ce6af4 | 368 | |
11e08196 FF |
369 | switch (X_op) |
370 | { | |
371 | case O_register: | |
372 | /* Also check that registers that are supposed to be even actually | |
373 | are even. */ | |
374 | if (((flags & TIC80_OPERAND_GPR) != (num & TIC80_OPERAND_GPR)) || | |
375 | ((flags & TIC80_OPERAND_FPA) != (num & TIC80_OPERAND_FPA)) || | |
376 | ((flags & TIC80_OPERAND_CR) != (num & TIC80_OPERAND_CR)) || | |
377 | ((flags & TIC80_OPERAND_EVEN) && (num & 1)) || | |
378 | const_overflow (num & ~TIC80_OPERAND_MASK, bits, flags)) | |
379 | { | |
380 | match = 0; | |
381 | } | |
382 | break; | |
383 | case O_constant: | |
384 | if ((flags & TIC80_OPERAND_ENDMASK) && (num == 32)) | |
385 | { | |
386 | /* Endmask values of 0 and 32 give identical results */ | |
387 | num = 0; | |
388 | } | |
389 | if ((flags & (TIC80_OPERAND_FPA | TIC80_OPERAND_GPR)) || | |
390 | const_overflow (num, bits, flags)) | |
391 | { | |
392 | match = 0; | |
393 | } | |
394 | break; | |
d160b69e FF |
395 | case O_symbol: |
396 | if ((bits < 32) && (flags & TIC80_OPERAND_PCREL)) | |
397 | { | |
398 | /* For now we only allow PC relative relocations in the | |
399 | short immediate fields, like the TI assembler. | |
400 | FIXME: Should be able to choose "best-fit". */ | |
401 | } | |
ec72a266 | 402 | else if ((bits == 32) /* && (flags & TIC80_OPERAND_BASEREL) */) |
d160b69e FF |
403 | { |
404 | /* For now we only allow base relative relocations in | |
405 | the long immediate fields, like the TI assembler. | |
406 | FIXME: Should be able to choose "best-fit". */ | |
407 | } | |
408 | else | |
409 | { | |
410 | /* Symbols that don't match one of the above cases are | |
411 | rejected as an operand. */ | |
412 | match = 0; | |
413 | } | |
414 | break; | |
11e08196 | 415 | case O_absent: |
f92f247b FF |
416 | /* If this is an O_absent expression, then it may be an expression that |
417 | supplies additional information about the operand, such as ":m" or | |
418 | ":s" modifiers. Check to see that the operand matches this requirement. */ | |
419 | if (!((num & TIC80_OPERAND_M_SI) && (flags & TIC80_OPERAND_M_SI) || | |
420 | (num & TIC80_OPERAND_M_LI) && (flags & TIC80_OPERAND_M_LI) || | |
421 | (num & TIC80_OPERAND_SCALED) && (flags & TIC80_OPERAND_SCALED))) | |
422 | { | |
423 | match = 0; | |
424 | } | |
425 | break; | |
1e12595d FF |
426 | case O_big: |
427 | if ((num > 0) || !(flags & TIC80_OPERAND_FLOAT)) | |
428 | { | |
429 | match = 0; | |
430 | } | |
431 | break; | |
f92f247b | 432 | case O_illegal: |
11e08196 | 433 | case O_symbol_rva: |
11e08196 FF |
434 | case O_uminus: |
435 | case O_bit_not: | |
436 | case O_logical_not: | |
437 | case O_multiply: | |
438 | case O_divide: | |
439 | case O_modulus: | |
440 | case O_left_shift: | |
441 | case O_right_shift: | |
442 | case O_bit_inclusive_or: | |
443 | case O_bit_or_not: | |
444 | case O_bit_exclusive_or: | |
445 | case O_bit_and: | |
446 | case O_add: | |
447 | case O_subtract: | |
448 | case O_eq: | |
449 | case O_ne: | |
450 | case O_lt: | |
451 | case O_le: | |
452 | case O_ge: | |
453 | case O_gt: | |
454 | case O_logical_and: | |
455 | case O_logical_or: | |
456 | case O_max: | |
457 | default: | |
458 | internal_error_a ("unhandled expression type", X_op); | |
459 | } | |
460 | } | |
461 | if (!match) | |
462 | { | |
463 | opc++; | |
464 | } | |
465 | } | |
466 | ||
467 | return (match ? opc : NULL); | |
468 | ||
469 | #if 0 | |
f1ce6af4 FF |
470 | |
471 | /* Now search the opcode table table for one with operands that | |
472 | matches what we've got. */ | |
473 | ||
474 | while (!match) | |
475 | { | |
476 | match = 1; | |
477 | for (i = 0; opcode -> operands[i]; i++) | |
478 | { | |
479 | int flags = tic80_operands[opcode->operands[i]].flags; | |
480 | int X_op = myops[i].X_op; | |
481 | int num = myops[i].X_add_number; | |
482 | ||
483 | if (X_op == 0) | |
484 | { | |
485 | match = 0; | |
486 | break; | |
487 | } | |
488 | ||
11e08196 | 489 | if (flags & (TIC80_OPERAND_GPR | TIC80_OPERAND_FPA | TIC80_OPERAND_CR)) |
f1ce6af4 FF |
490 | { |
491 | if ((X_op != O_register) || | |
11e08196 FF |
492 | ((flags & TIC80_OPERAND_GPR) != (num & TIC80_OPERAND_GPR)) || |
493 | ((flags & TIC80_OPERAND_FPA) != (num & TIC80_OPERAND_FPA)) || | |
494 | ((flags & TIC80_OPERAND_CR) != (num & TIC80_OPERAND_CR))) | |
f1ce6af4 FF |
495 | { |
496 | match=0; | |
497 | break; | |
498 | } | |
499 | } | |
500 | ||
11e08196 FF |
501 | if (((flags & TIC80_OPERAND_MINUS) && ((X_op != O_absent) || (num != TIC80_OPERAND_MINUS))) || |
502 | ((flags & TIC80_OPERAND_PLUS) && ((X_op != O_absent) || (num != TIC80_OPERAND_PLUS))) || | |
503 | ((flags & TIC80_OPERAND_ATMINUS) && ((X_op != O_absent) || (num != TIC80_OPERAND_ATMINUS))) || | |
504 | ((flags & TIC80_OPERAND_ATPAR) && ((X_op != O_absent) || (num != TIC80_OPERAND_ATPAR))) || | |
505 | ((flags & TIC80_OPERAND_ATSIGN) && ((X_op != O_absent) || (num != TIC80_OPERAND_ATSIGN)))) | |
f1ce6af4 FF |
506 | { |
507 | match=0; | |
508 | break; | |
509 | } | |
510 | } | |
511 | /* we're only done if the operands matched so far AND there | |
512 | are no more to check */ | |
513 | if (match && myops[i].X_op==0) | |
514 | break; | |
515 | else | |
516 | match = 0; | |
517 | ||
518 | next_opcode = opcode+1; | |
519 | if (next_opcode->opcode == 0) | |
520 | break; | |
521 | if (strcmp(next_opcode->name, opcode->name)) | |
522 | break; | |
523 | opcode = next_opcode; | |
524 | } | |
525 | ||
526 | if (!match) | |
527 | { | |
528 | as_bad ("bad opcode or operands"); | |
529 | return (0); | |
530 | } | |
531 | ||
532 | /* Check that all registers that are required to be even are. */ | |
533 | /* Also, if any operands were marked as registers, but were really symbols */ | |
534 | /* fix that here. */ | |
535 | for (i=0; opcode->operands[i]; i++) | |
536 | { | |
11e08196 | 537 | if ((tic80_operands[opcode->operands[i]].flags & TIC80_OPERAND_EVEN) && |
f1ce6af4 | 538 | (myops[i].X_add_number & 1)) |
11e08196 | 539 | as_fatal ("Register number must be EVEN"); |
f1ce6af4 FF |
540 | if (myops[i].X_op == O_register) |
541 | { | |
11e08196 | 542 | if (!(tic80_operands[opcode->operands[i]].flags & TIC80_OPERAND_REG)) |
f1ce6af4 FF |
543 | { |
544 | myops[i].X_op = O_symbol; | |
545 | myops[i].X_add_symbol = symbol_find_or_make ((char *)myops[i].X_op_symbol); | |
546 | myops[i].X_add_number = 0; | |
547 | myops[i].X_op_symbol = NULL; | |
548 | } | |
549 | } | |
550 | } | |
11e08196 FF |
551 | |
552 | #endif | |
f1ce6af4 FF |
553 | } |
554 | ||
555 | /* build_insn takes a pointer to the opcode entry in the opcode table | |
11e08196 | 556 | and the array of operand expressions and writes out the instruction. */ |
f1ce6af4 | 557 | |
11e08196 FF |
558 | static void |
559 | build_insn (opcode, opers) | |
f1ce6af4 FF |
560 | struct tic80_opcode *opcode; |
561 | expressionS *opers; | |
f1ce6af4 | 562 | { |
11e08196 FF |
563 | int expi; /* Index of current expression to match */ |
564 | int opi; /* Index of current operand to match */ | |
565 | unsigned long insn[2]; /* Instruction and long immediate (if any) */ | |
566 | int extended = 0; /* Nonzero if instruction is 8 bytes */ | |
567 | char *f; /* Temporary pointer to output location */ | |
568 | ||
569 | /* Start with the raw opcode bits from the opcode table. */ | |
570 | insn[0] = opcode -> opcode; | |
571 | ||
d160b69e FF |
572 | /* We are going to insert at least one 32 bit opcode so get the |
573 | frag now. */ | |
574 | ||
575 | f = frag_more (4); | |
576 | ||
11e08196 FF |
577 | /* For each operand expression, insert the appropriate bits into the |
578 | instruction . */ | |
579 | for (expi = 0, opi = -1; opers[expi].X_op != O_illegal; expi++) | |
580 | { | |
581 | int bits, shift, flags, X_op, num; | |
582 | ||
583 | X_op = opers[expi].X_op; | |
584 | num = opers[expi].X_add_number; | |
f92f247b FF |
585 | |
586 | /* The O_absent expressions apply to the same operand as the most | |
587 | recent non O_absent expression. So only increment the operand | |
588 | index when the current expression is not one of these special | |
589 | expressions. */ | |
590 | ||
11e08196 FF |
591 | if (X_op != O_absent) |
592 | { | |
11e08196 FF |
593 | opi++; |
594 | } | |
f92f247b | 595 | |
11e08196 FF |
596 | flags = tic80_operands[opcode -> operands[opi]].flags; |
597 | bits = tic80_operands[opcode -> operands[opi]].bits; | |
598 | shift = tic80_operands[opcode -> operands[opi]].shift; | |
599 | ||
600 | switch (X_op) | |
601 | { | |
602 | case O_register: | |
603 | num &= ~TIC80_OPERAND_MASK; | |
604 | insn[0] = insn[0] | (num << shift); | |
605 | break; | |
606 | case O_constant: | |
607 | if ((flags & TIC80_OPERAND_ENDMASK) && (num == 32)) | |
608 | { | |
609 | /* Endmask values of 0 and 32 give identical results */ | |
610 | num = 0; | |
611 | } | |
d160b69e FF |
612 | else if ((flags & TIC80_OPERAND_BITNUM)) |
613 | { | |
614 | /* BITNUM values are stored in one's complement form */ | |
615 | num = (~num & 0x1F); | |
616 | } | |
11e08196 FF |
617 | /* Mask off upper bits, just it case it is signed and is negative */ |
618 | if (bits < 32) | |
619 | { | |
620 | num &= (1 << bits) - 1; | |
621 | insn[0] = insn[0] | (num << shift); | |
622 | } | |
623 | else | |
624 | { | |
625 | extended++; | |
626 | insn[1] = num; | |
627 | } | |
628 | break; | |
d160b69e FF |
629 | case O_symbol: |
630 | if (flags & TIC80_OPERAND_PCREL) | |
631 | { | |
632 | fix_new_exp (frag_now, | |
633 | f - (frag_now -> fr_literal), | |
634 | 4, /* FIXME! how is this used? */ | |
635 | &opers[expi], | |
636 | 1, | |
637 | R_MPPCR); | |
638 | } | |
ec72a266 | 639 | else if (bits == 32) /* was (flags & TIC80_OPERAND_BASEREL) */ |
d160b69e FF |
640 | { |
641 | extended++; | |
642 | fix_new_exp (frag_now, | |
643 | (f + 4) - (frag_now -> fr_literal), | |
644 | 4, | |
645 | &opers[expi], | |
ec72a266 FF |
646 | 0, |
647 | R_RELLONGX); | |
d160b69e FF |
648 | } |
649 | else | |
650 | { | |
ec72a266 | 651 | internal_error ("symbol reloc that is not PC relative or 32 bits"); |
d160b69e FF |
652 | } |
653 | break; | |
11e08196 | 654 | case O_absent: |
f92f247b FF |
655 | /* Each O_absent expression can indicate exactly one possible modifier. */ |
656 | if ((num & TIC80_OPERAND_M_SI) && (flags & TIC80_OPERAND_M_SI)) | |
657 | { | |
658 | insn[0] = insn[0] | (1 << 17); | |
659 | } | |
660 | else if ((num & TIC80_OPERAND_M_LI) && (flags & TIC80_OPERAND_M_LI)) | |
661 | { | |
662 | insn[0] = insn[0] | (1 << 15); | |
663 | } | |
664 | else if ((num & TIC80_OPERAND_SCALED) && (flags & TIC80_OPERAND_SCALED)) | |
665 | { | |
666 | insn[0] = insn[0] | (1 << 11); | |
667 | } | |
668 | else if ((num & TIC80_OPERAND_PARENS) && (flags & TIC80_OPERAND_PARENS)) | |
669 | { | |
670 | /* No code to generate, just accept and discard this expression */ | |
671 | } | |
672 | else | |
673 | { | |
674 | internal_error_a ("unhandled operand modifier", opers[expi].X_add_number); | |
675 | } | |
676 | break; | |
1e12595d FF |
677 | case O_big: |
678 | extended++; | |
679 | { | |
680 | union { | |
681 | unsigned long l; | |
682 | LITTLENUM_TYPE words[10]; | |
683 | } u; | |
684 | gen_to_words (u.words, 2, 8L); /* FIXME: magic numbers */ | |
685 | /* FIXME: More magic, swap the littlenums */ | |
686 | u.words[2] = u.words[0]; | |
687 | u.words[0] = u.words [1]; | |
688 | u.words[1] = u.words [2]; | |
689 | insn[1] = u.l; | |
690 | } | |
691 | break; | |
f92f247b | 692 | case O_illegal: |
11e08196 | 693 | case O_symbol_rva: |
11e08196 FF |
694 | case O_uminus: |
695 | case O_bit_not: | |
696 | case O_logical_not: | |
697 | case O_multiply: | |
698 | case O_divide: | |
699 | case O_modulus: | |
700 | case O_left_shift: | |
701 | case O_right_shift: | |
702 | case O_bit_inclusive_or: | |
703 | case O_bit_or_not: | |
704 | case O_bit_exclusive_or: | |
705 | case O_bit_and: | |
706 | case O_add: | |
707 | case O_subtract: | |
708 | case O_eq: | |
709 | case O_ne: | |
710 | case O_lt: | |
711 | case O_le: | |
712 | case O_ge: | |
713 | case O_gt: | |
714 | case O_logical_and: | |
715 | case O_logical_or: | |
716 | case O_max: | |
717 | default: | |
718 | internal_error_a ("unhandled expression", X_op); | |
719 | break; | |
720 | } | |
721 | } | |
722 | ||
723 | /* Write out the instruction, either 4 or 8 bytes. */ | |
724 | ||
11e08196 FF |
725 | md_number_to_chars (f, insn[0], 4); |
726 | if (extended) | |
727 | { | |
728 | f = frag_more (4); | |
729 | md_number_to_chars (f, insn[1], 4); | |
730 | } | |
f1ce6af4 FF |
731 | } |
732 | ||
16171d71 FF |
733 | /* This is the main entry point for the machine-dependent assembler. Gas |
734 | calls this function for each input line which does not contain a | |
735 | pseudoop. | |
736 | ||
737 | STR points to a NULL terminated machine dependent instruction. This | |
738 | function is supposed to emit the frags/bytes it assembles to. */ | |
f1ce6af4 FF |
739 | |
740 | void | |
741 | md_assemble (str) | |
742 | char *str; | |
743 | { | |
744 | char *scan; | |
745 | unsigned char *input_line_save; | |
746 | struct tic80_opcode *opcode; | |
11e08196 | 747 | expressionS myops[16]; |
f1ce6af4 FF |
748 | unsigned long insn; |
749 | ||
750 | /* Ensure there is something there to assemble. */ | |
751 | assert (str); | |
752 | ||
753 | /* Drop any leading whitespace. */ | |
754 | while (isspace (*str)) | |
755 | { | |
756 | str++; | |
757 | } | |
758 | ||
759 | /* Isolate the mnemonic from the rest of the string by finding the first | |
760 | whitespace character and zapping it to a null byte. */ | |
761 | for (scan = str; *scan != '\000' && !isspace (*scan); scan++) {;} | |
762 | if (*scan != '\000') | |
763 | { | |
764 | *scan++ = '\000'; | |
765 | } | |
766 | ||
767 | /* Try to find this mnemonic in the hash table */ | |
768 | if ((opcode = (struct tic80_opcode *) hash_find (tic80_hash, str)) == NULL) | |
769 | { | |
770 | as_bad ("Invalid mnemonic: '%s'", str); | |
771 | return; | |
772 | } | |
773 | ||
774 | str = scan; | |
775 | while (isspace (*scan)) | |
776 | { | |
777 | scan++; | |
778 | } | |
779 | ||
780 | input_line_save = input_line_pointer; | |
781 | input_line_pointer = str; | |
782 | ||
783 | opcode = find_opcode (opcode, myops); | |
784 | if (opcode == NULL) | |
785 | { | |
11e08196 | 786 | as_bad ("Invalid operands: '%s'", input_line_save); |
f1ce6af4 FF |
787 | } |
788 | ||
789 | input_line_pointer = input_line_save; | |
11e08196 | 790 | build_insn (opcode, myops); |
f1ce6af4 FF |
791 | } |
792 | ||
16171d71 FF |
793 | /* This function is called once at the start of assembly, after the command |
794 | line arguments have been parsed and all the machine independent | |
795 | initializations have been completed. | |
796 | ||
797 | It should set up all the tables, etc., that the machine dependent part of | |
798 | the assembler will need. */ | |
f1ce6af4 FF |
799 | |
800 | void | |
801 | md_begin () | |
802 | { | |
803 | char *prev_name = ""; | |
804 | register const struct tic80_opcode *op; | |
805 | register const struct tic80_opcode *op_end; | |
16171d71 | 806 | const struct predefined_symbol *pdsp; |
e74539b8 | 807 | extern int coff_flags; /* Defined in obj-coff.c */ |
f1ce6af4 | 808 | |
e74539b8 FF |
809 | /* Set F_AR32WR in coff_flags, which will end up in the file header |
810 | f_flags field. */ | |
811 | ||
812 | coff_flags |= F_AR32WR; /* TIc80 is 32 bit little endian */ | |
f1ce6af4 FF |
813 | |
814 | /* Insert unique names into hash table. The TIc80 instruction set | |
815 | has many identical opcode names that have different opcodes based | |
816 | on the operands. This hash table then provides a quick index to | |
817 | the first opcode with a particular name in the opcode table. */ | |
818 | ||
e74539b8 | 819 | tic80_hash = hash_new (); |
f1ce6af4 FF |
820 | op_end = tic80_opcodes + tic80_num_opcodes; |
821 | for (op = tic80_opcodes; op < op_end; op++) | |
822 | { | |
823 | if (strcmp (prev_name, op -> name) != 0) | |
824 | { | |
825 | prev_name = (char *) op -> name; | |
826 | hash_insert (tic80_hash, op -> name, (char *) op); | |
827 | } | |
828 | } | |
16171d71 FF |
829 | |
830 | /* Insert the predefined symbols into the symbol table. We use symbol_create | |
831 | rather than symbol_new so that these symbols don't end up in the object | |
832 | files' symbol table. Note that the values of the predefined symbols include | |
833 | some upper bits that distinguish the type of the symbol (register, bitnum, | |
834 | condition code, etc) and these bits must be masked away before actually | |
835 | inserting the values into the instruction stream. For registers we put | |
836 | these bits in the symbol table since we use them later and there is no | |
837 | question that they aren't part of the register number. For constants we | |
838 | can't do that since the constant can be any value, so they are masked off | |
839 | before putting them into the symbol table. */ | |
840 | ||
841 | pdsp = NULL; | |
842 | while ((pdsp = tic80_next_predefined_symbol (pdsp)) != NULL) | |
843 | { | |
844 | segT segment; | |
845 | valueT valu; | |
846 | int symtype; | |
847 | ||
848 | symtype = PDS_VALUE (pdsp) & TIC80_OPERAND_MASK; | |
849 | switch (symtype) | |
850 | { | |
851 | case TIC80_OPERAND_GPR: | |
852 | case TIC80_OPERAND_FPA: | |
853 | case TIC80_OPERAND_CR: | |
854 | segment = reg_section; | |
855 | valu = PDS_VALUE (pdsp); | |
856 | break; | |
857 | case TIC80_OPERAND_CC: | |
858 | case TIC80_OPERAND_BITNUM: | |
859 | segment = absolute_section; | |
860 | valu = PDS_VALUE (pdsp) & ~TIC80_OPERAND_MASK; | |
861 | break; | |
862 | default: | |
863 | internal_error_a ("unhandled predefined symbol bits", symtype); | |
864 | break; | |
865 | } | |
866 | symbol_table_insert (symbol_create (PDS_NAME (pdsp), segment, valu, | |
867 | &zero_address_frag)); | |
868 | } | |
f1ce6af4 FF |
869 | } |
870 | ||
871 | \f | |
872 | ||
16171d71 FF |
873 | /* The assembler adds md_shortopts to the string passed to getopt. */ |
874 | ||
f1ce6af4 FF |
875 | CONST char *md_shortopts = ""; |
876 | ||
16171d71 FF |
877 | /* The assembler adds md_longopts to the machine independent long options |
878 | that are passed to getopt. */ | |
879 | ||
f1ce6af4 FF |
880 | struct option md_longopts[] = { |
881 | {NULL, no_argument, NULL, 0} | |
882 | }; | |
883 | ||
884 | size_t md_longopts_size = sizeof(md_longopts); | |
885 | ||
16171d71 FF |
886 | /* The md_parse_option function will be called whenever getopt returns an |
887 | unrecognized code, presumably indicating a special code value which | |
888 | appears in md_longopts for machine specific command line options. */ | |
f1ce6af4 FF |
889 | |
890 | int | |
891 | md_parse_option (c, arg) | |
892 | int c; | |
893 | char *arg; | |
894 | { | |
895 | return (0); | |
896 | } | |
897 | ||
16171d71 FF |
898 | /* The md_show_usage function will be called whenever a usage message is |
899 | printed. It should print a description of the machine specific options | |
900 | found in md_longopts. */ | |
f1ce6af4 FF |
901 | |
902 | void | |
903 | md_show_usage (stream) | |
904 | FILE *stream; | |
905 | { | |
906 | } | |
907 | ||
908 | \f | |
909 | /* Attempt to simplify or even eliminate a fixup. The return value is | |
910 | ignored; perhaps it was once meaningful, but now it is historical. | |
911 | To indicate that a fixup has been eliminated, set fixP->fx_done. | |
912 | */ | |
913 | ||
914 | void | |
915 | md_apply_fix (fixP, val) | |
916 | fixS *fixP; | |
917 | long val; | |
918 | { | |
d160b69e FF |
919 | char *dest = fixP -> fx_frag -> fr_literal + fixP -> fx_where; |
920 | ||
921 | switch (fixP -> fx_r_type) | |
922 | { | |
923 | case R_RELLONGX: | |
924 | md_number_to_chars (dest, (valueT) val, 4); | |
925 | break; | |
926 | case R_MPPCR: | |
927 | /* FIXME! - should check for overflow of the 15 bit field */ | |
928 | *dest++ = val >> 2; | |
929 | *dest = (*dest & 0x80) | val >> 10; | |
930 | break; | |
b16a8c8e FF |
931 | case R_ABS: |
932 | md_number_to_chars (dest, (valueT) val, fixP -> fx_size); | |
933 | break; | |
d160b69e FF |
934 | default: |
935 | internal_error_a ("unhandled relocation type in fixup", fixP -> fx_r_type); | |
936 | break; | |
937 | } | |
f1ce6af4 FF |
938 | } |
939 | ||
940 | \f | |
941 | /* Functions concerning relocs. */ | |
942 | ||
943 | /* The location from which a PC relative jump should be calculated, | |
d160b69e FF |
944 | given a PC relative reloc. |
945 | ||
946 | For the TIc80, this is the address of the 32 bit opcode containing | |
947 | the PC relative field. */ | |
f1ce6af4 FF |
948 | |
949 | long | |
950 | md_pcrel_from (fixP) | |
951 | fixS *fixP; | |
952 | { | |
d160b69e | 953 | return (fixP -> fx_frag -> fr_address + fixP -> fx_where) ; |
f1ce6af4 FF |
954 | } |
955 | ||
956 | /* | |
957 | * Called after relax() is finished. | |
958 | * In: Address of frag. | |
959 | * fr_type == rs_machine_dependent. | |
960 | * fr_subtype is what the address relaxed to. | |
961 | * | |
962 | * Out: Any fixSs and constants are set up. | |
963 | * Caller will turn frag into a ".space 0". | |
964 | */ | |
965 | ||
966 | void | |
967 | md_convert_frag (headers, seg, fragP) | |
968 | object_headers *headers; | |
969 | segT seg; | |
970 | fragS *fragP; | |
971 | { | |
11e08196 | 972 | internal_error ("md_convert_frag() not implemented yet"); |
f1ce6af4 FF |
973 | abort (); |
974 | } | |
975 | ||
976 | \f | |
977 | /*ARGSUSED*/ | |
978 | void | |
979 | tc_coff_symbol_emit_hook (ignore) | |
980 | symbolS *ignore; | |
981 | { | |
982 | } | |
983 | ||
984 | #if defined OBJ_COFF | |
985 | ||
986 | short | |
987 | tc_coff_fix2rtype (fixP) | |
988 | fixS *fixP; | |
989 | { | |
d160b69e | 990 | return (fixP -> fx_r_type); |
f1ce6af4 FF |
991 | } |
992 | ||
993 | #endif /* OBJ_COFF */ | |
994 | ||
64556643 | 995 | /* end of tc-tic80.c */ |