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tc-ppc.c md_apply_fix tidy
[deliverable/binutils-gdb.git] / gas / config / tc-tilegx.c
CommitLineData
aa137e4d 1/* tc-tilegx.c -- Assemble for a Tile-Gx chip.
b90efa5b 2 Copyright (C) 2011-2015 Free Software Foundation, Inc.
aa137e4d
NC		 3
4 This file is part of GAS, the GNU Assembler.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21#include "as.h"
22#include "struc-symbol.h"
23#include "subsegs.h"
24
25#include "elf/tilegx.h"
26#include "opcode/tilegx.h"
27
28#include "dwarf2dbg.h"
29#include "dw2gencfi.h"
30
31#include "safe-ctype.h"
32
33
34/* Special registers. */
35#define TREG_IDN0 57
36#define TREG_IDN1 58
37#define TREG_UDN0 59
38#define TREG_UDN1 60
39#define TREG_UDN2 61
40#define TREG_UDN3 62
41#define TREG_ZERO 63
42
43
44/* Generic assembler global variables which must be defined by all
45 targets. */
46
47/* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
48int tilegx_cie_data_alignment;
49
50/* Characters which always start a comment. */
51const char comment_chars[] = "#";
52
53/* Characters which start a comment at the beginning of a line. */
54const char line_comment_chars[] = "#";
55
56/* Characters which may be used to separate multiple commands on a
57 single line. */
58const char line_separator_chars[] = ";";
59
60/* Characters which are used to indicate an exponent in a floating
61 point number. */
62const char EXP_CHARS[] = "eE";
63
64/* Characters which mean that a number is a floating point constant,
65 as in 0d1.0. */
66const char FLT_CHARS[] = "rRsSfFdDxXpP";
67
68/* Either 32 or 64. */
69static int tilegx_arch_size = 64;
70
71
72const char *
73tilegx_target_format (void)
74{
fb6cedde
WL		 75 if (target_big_endian) {
76 return tilegx_arch_size == 64 ? "elf64-tilegx-be" : "elf32-tilegx-be";
77 } else {
78 return tilegx_arch_size == 64 ? "elf64-tilegx-le" : "elf32-tilegx-le";
79 }
aa137e4d
NC		 80}
81
82
83#define OPTION_32 (OPTION_MD_BASE + 0)
84#define OPTION_64 (OPTION_MD_BASE + 1)
fb6cedde
WL		 85#define OPTION_EB (OPTION_MD_BASE + 2)
86#define OPTION_EL (OPTION_MD_BASE + 3)
aa137e4d
NC		 87
88const char *md_shortopts = "VQ:";
89
90struct option md_longopts[] =
91{
92 {"32", no_argument, NULL, OPTION_32},
93 {"64", no_argument, NULL, OPTION_64},
fb6cedde
WL		 94 {"EB", no_argument, NULL, OPTION_EB },
95 {"EL", no_argument, NULL, OPTION_EL },
aa137e4d
NC		 96 {NULL, no_argument, NULL, 0}
97};
98
99size_t md_longopts_size = sizeof (md_longopts);
100
101int
102md_parse_option (int c, char *arg ATTRIBUTE_UNUSED)
103{
104 switch (c)
105 {
106 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
107 should be emitted or not. FIXME: Not implemented. */
108 case 'Q':
109 break;
110
111 /* -V: SVR4 argument to print version ID. */
112 case 'V':
113 print_version_id ();
114 break;
115
116 case OPTION_32:
117 tilegx_arch_size = 32;
118 break;
119
120 case OPTION_64:
121 tilegx_arch_size = 64;
122 break;
123
fb6cedde
WL		 124 case OPTION_EB:
125 target_big_endian = 1;
126 break;
127
128 case OPTION_EL:
129 target_big_endian = 0;
130 break;
131
aa137e4d
NC		 132 default:
133 return 0;
134 }
135
136 return 1;
137}
138
139void
140md_show_usage (FILE *stream)
141{
142 fprintf (stream, _("\
143 -Q ignored\n\
144 -V print assembler version number\n\
fb6cedde 145 -EB/-EL generate big-endian/little-endian code\n\
aa137e4d
NC		 146 --32/--64 generate 32bit/64bit code\n"));
147}
148
149
150/* Extra expression types. */
151
152#define O_hw0 O_md1
153#define O_hw1 O_md2
154#define O_hw2 O_md3
155#define O_hw3 O_md4
156#define O_hw0_last O_md5
157#define O_hw1_last O_md6
158#define O_hw2_last O_md7
159#define O_hw0_got O_md8
6f7be959
WL		 160#define O_hw0_last_got O_md9
161#define O_hw1_last_got O_md10
162#define O_plt O_md11
163#define O_hw0_tls_gd O_md12
164#define O_hw0_last_tls_gd O_md13
165#define O_hw1_last_tls_gd O_md14
166#define O_hw0_tls_ie O_md15
167#define O_hw0_last_tls_ie O_md16
168#define O_hw1_last_tls_ie O_md17
169#define O_hw0_tls_le O_md18
170#define O_hw0_last_tls_le O_md19
171#define O_hw1_last_tls_le O_md20
172#define O_tls_gd_call O_md21
173#define O_tls_gd_add O_md22
174#define O_tls_ie_load O_md23
175#define O_tls_add O_md24
e5b95258
WL		 176#define O_hw0_plt O_md25
177#define O_hw1_plt O_md26
178#define O_hw1_last_plt O_md27
179#define O_hw2_last_plt O_md28
aa137e4d
NC		 180
181static struct hash_control *special_operator_hash;
182
183/* Hash tables for instruction mnemonic lookup. */
184static struct hash_control *op_hash;
185
186/* Hash table for spr lookup. */
187static struct hash_control *spr_hash;
188
189/* True temporarily while parsing an SPR expression. This changes the
190 * namespace to include SPR names. */
191static int parsing_spr;
192
193/* Are we currently inside `{ ... }'? */
194static int inside_bundle;
195
196struct tilegx_instruction
197{
198 const struct tilegx_opcode *opcode;
199 tilegx_pipeline pipe;
200 expressionS operand_values[TILEGX_MAX_OPERANDS];
201};
202
203/* This keeps track of the current bundle being built up. */
204static struct tilegx_instruction current_bundle[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
205
206/* Index in current_bundle for the next instruction to parse. */
207static int current_bundle_index;
208
209/* Allow 'r63' in addition to 'zero', etc. Normally we disallow this as
210 'zero' is not a real register, so using it accidentally would be a
211 nasty bug. For other registers, such as 'sp', code using multiple names
212 for the same physical register is excessively confusing.
213
214 The '.require_canonical_reg_names' pseudo-op turns this error on,
215 and the '.no_require_canonical_reg_names' pseudo-op turns this off.
216 By default the error is on. */
217static int require_canonical_reg_names;
218
219/* Allow bundles that do undefined or suspicious things like write
220 two different values to the same register at the same time.
221
222 The '.no_allow_suspicious_bundles' pseudo-op turns this error on,
223 and the '.allow_suspicious_bundles' pseudo-op turns this off. */
224static int allow_suspicious_bundles;
225
226
227/* A hash table of main processor registers, mapping each register name
228 to its index.
229
230 Furthermore, if the register number is greater than the number
231 of registers for that processor, the user used an illegal alias
232 for that register (e.g. r63 instead of zero), so we should generate
233 a warning. The attempted register number can be found by clearing
234 NONCANONICAL_REG_NAME_FLAG. */
235static struct hash_control *main_reg_hash;
236
237
238/* We cannot unambiguously store a 0 in a hash table and look it up,
239 so we OR in this flag to every canonical register. */
240#define CANONICAL_REG_NAME_FLAG 0x1000
241
242/* By default we disallow register aliases like r63, but we record
243 them in the hash table in case the .no_require_canonical_reg_names
244 directive is used. Noncanonical names have this value added to them. */
245#define NONCANONICAL_REG_NAME_FLAG 0x2000
246
247/* Discards flags for register hash table entries and returns the
248 reg number. */
249#define EXTRACT_REGNO(p) ((p) & 63)
250
251/* This function is called once, at assembler startup time. It should
252 set up all the tables, etc., that the MD part of the assembler will
253 need. */
254
255void
256md_begin (void)
257{
258 const struct tilegx_opcode *op;
259 int i;
82590249
WL		 260 int mach = (tilegx_arch_size == 64) ? bfd_mach_tilegx : bfd_mach_tilegx32;
261
262 if (! bfd_set_arch_mach (stdoutput, bfd_arch_tilegx, mach))
263 as_warn (_("Could not set architecture and machine"));
aa137e4d
NC		 264
265 /* Guarantee text section is aligned. */
266 bfd_set_section_alignment (stdoutput, text_section,
267 TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES);
268
269 require_canonical_reg_names = 1;
270 allow_suspicious_bundles = 0;
271 current_bundle_index = 0;
272 inside_bundle = 0;
273
274 tilegx_cie_data_alignment = (tilegx_arch_size == 64 ? -8 : -4);
275
276 /* Initialize special operator hash table. */
277 special_operator_hash = hash_new ();
278#define INSERT_SPECIAL_OP(name) \
279 hash_insert (special_operator_hash, #name, (void *)O_##name)
280
281 INSERT_SPECIAL_OP (hw0);
282 INSERT_SPECIAL_OP (hw1);
283 INSERT_SPECIAL_OP (hw2);
284 INSERT_SPECIAL_OP (hw3);
285 INSERT_SPECIAL_OP (hw0_last);
286 INSERT_SPECIAL_OP (hw1_last);
287 INSERT_SPECIAL_OP (hw2_last);
288 /* hw3_last is a convenience alias for the equivalent hw3. */
289 hash_insert (special_operator_hash, "hw3_last", (void*)O_hw3);
290 INSERT_SPECIAL_OP (hw0_got);
aa137e4d
NC		 291 INSERT_SPECIAL_OP (hw0_last_got);
292 INSERT_SPECIAL_OP (hw1_last_got);
aa137e4d
NC		 293 INSERT_SPECIAL_OP(plt);
294 INSERT_SPECIAL_OP (hw0_tls_gd);
aa137e4d
NC		 295 INSERT_SPECIAL_OP (hw0_last_tls_gd);
296 INSERT_SPECIAL_OP (hw1_last_tls_gd);
aa137e4d 297 INSERT_SPECIAL_OP (hw0_tls_ie);
aa137e4d
NC		 298 INSERT_SPECIAL_OP (hw0_last_tls_ie);
299 INSERT_SPECIAL_OP (hw1_last_tls_ie);
6f7be959
WL		 300 INSERT_SPECIAL_OP (hw0_tls_le);
301 INSERT_SPECIAL_OP (hw0_last_tls_le);
302 INSERT_SPECIAL_OP (hw1_last_tls_le);
303 INSERT_SPECIAL_OP (tls_gd_call);
304 INSERT_SPECIAL_OP (tls_gd_add);
305 INSERT_SPECIAL_OP (tls_ie_load);
306 INSERT_SPECIAL_OP (tls_add);
e5b95258
WL		 307 INSERT_SPECIAL_OP (hw0_plt);
308 INSERT_SPECIAL_OP (hw1_plt);
309 INSERT_SPECIAL_OP (hw1_last_plt);
310 INSERT_SPECIAL_OP (hw2_last_plt);
aa137e4d
NC		 311#undef INSERT_SPECIAL_OP
312
313 /* Initialize op_hash hash table. */
314 op_hash = hash_new ();
315 for (op = &tilegx_opcodes[0]; op->name != NULL; op++)
316 {
317 const char *hash_err = hash_insert (op_hash, op->name, (void *)op);
318 if (hash_err != NULL)
319 as_fatal (_("Internal Error: Can't hash %s: %s"), op->name, hash_err);
320 }
321
322 /* Initialize the spr hash table. */
323 parsing_spr = 0;
324 spr_hash = hash_new ();
325 for (i = 0; i < tilegx_num_sprs; i++)
326 hash_insert (spr_hash, tilegx_sprs[i].name,
327 (void *) &tilegx_sprs[i]);
328
329 /* Set up the main_reg_hash table. We use this instead of
330 creating a symbol in the register section to avoid ambiguities
331 with labels that have the same names as registers. */
332 main_reg_hash = hash_new ();
333 for (i = 0; i < TILEGX_NUM_REGISTERS; i++)
334 {
335 char buf[64];
336
337 hash_insert (main_reg_hash, tilegx_register_names[i],
338 (void *) (long) (i | CANONICAL_REG_NAME_FLAG));
339
340 /* See if we should insert a noncanonical alias, like r63. */
341 sprintf (buf, "r%d", i);
342 if (strcmp (buf, tilegx_register_names[i]) != 0)
343 hash_insert (main_reg_hash, xstrdup (buf),
344 (void *) (long) (i | NONCANONICAL_REG_NAME_FLAG));
345 }
346}
347
348#define BUNDLE_TEMPLATE_MASK(p0, p1, p2) \
349 ((p0) | ((p1) << 8) | ((p2) << 16))
350#define BUNDLE_TEMPLATE(p0, p1, p2) \
351 { { (p0), (p1), (p2) }, \
352 BUNDLE_TEMPLATE_MASK(1 << (p0), 1 << (p1), (1 << (p2))) \
353 }
354
355#define NO_PIPELINE TILEGX_NUM_PIPELINE_ENCODINGS
356
357struct bundle_template
358{
359 tilegx_pipeline pipe[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE];
360 unsigned int pipe_mask;
361};
362
363static const struct bundle_template bundle_templates[] =
364{
365 /* In Y format we must always have something in Y2, since it has
366 no fnop, so this conveys that Y2 must always be used. */
367 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y0, TILEGX_PIPELINE_Y2, NO_PIPELINE),
368 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y1, TILEGX_PIPELINE_Y2, NO_PIPELINE),
369 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y2, TILEGX_PIPELINE_Y0, NO_PIPELINE),
370 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y2, TILEGX_PIPELINE_Y1, NO_PIPELINE),
371
372 /* Y format has three instructions. */
373 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y0,TILEGX_PIPELINE_Y1,TILEGX_PIPELINE_Y2),
374 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y0,TILEGX_PIPELINE_Y2,TILEGX_PIPELINE_Y1),
375 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y1,TILEGX_PIPELINE_Y0,TILEGX_PIPELINE_Y2),
376 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y1,TILEGX_PIPELINE_Y2,TILEGX_PIPELINE_Y0),
377 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y2,TILEGX_PIPELINE_Y0,TILEGX_PIPELINE_Y1),
378 BUNDLE_TEMPLATE(TILEGX_PIPELINE_Y2,TILEGX_PIPELINE_Y1,TILEGX_PIPELINE_Y0),
379
380 /* X format has only two instructions. */
381 BUNDLE_TEMPLATE(TILEGX_PIPELINE_X0, TILEGX_PIPELINE_X1, NO_PIPELINE),
382 BUNDLE_TEMPLATE(TILEGX_PIPELINE_X1, TILEGX_PIPELINE_X0, NO_PIPELINE)
383};
384
385
386static void
387prepend_nop_to_bundle (tilegx_mnemonic mnemonic)
388{
389 memmove (&current_bundle[1], &current_bundle[0],
390 current_bundle_index * sizeof current_bundle[0]);
391 current_bundle[0].opcode = &tilegx_opcodes[mnemonic];
392 ++current_bundle_index;
393}
394
395static tilegx_bundle_bits
396insert_operand (tilegx_bundle_bits bits,
397 const struct tilegx_operand *operand,
398 int operand_value,
399 char *file,
400 unsigned lineno)
401{
402 /* Range-check the immediate. */
403 int num_bits = operand->num_bits;
404
405 operand_value >>= operand->rightshift;
406
407 if (bfd_check_overflow (operand->is_signed
408 ? complain_overflow_signed
409 : complain_overflow_unsigned,
410 num_bits,
411 0,
412 bfd_arch_bits_per_address (stdoutput),
413 operand_value)
414 != bfd_reloc_ok)
415 {
416 offsetT min, max;
417 if (operand->is_signed)
418 {
419 min = -(1 << (num_bits - 1));
420 max = (1 << (num_bits - 1)) - 1;
421 }
422 else
423 {
424 min = 0;
425 max = (1 << num_bits) - 1;
426 }
427 as_bad_value_out_of_range (_("operand"), operand_value, min, max,
428 file, lineno);
429 }
430
431 /* Write out the bits for the immediate. */
432 return bits | operand->insert (operand_value);
433}
434
435
436static int
437apply_special_operator (operatorT op, offsetT num, char *file, unsigned lineno)
438{
439 int ret;
440 int check_shift = -1;
441
442 switch (op)
443 {
aa137e4d
NC		 444 case O_hw0_last:
445 check_shift = 0;
446 /* Fall through. */
aa137e4d
NC		 447 case O_hw0:
448 ret = (signed short)num;
449 break;
450
aa137e4d
NC		 451 case O_hw1_last:
452 check_shift = 16;
453 /* Fall through. */
aa137e4d
NC		 454 case O_hw1:
455 ret = (signed short)(num >> 16);
456 break;
457
aa137e4d
NC		 458 case O_hw2_last:
459 check_shift = 32;
460 /* Fall through. */
aa137e4d
NC		 461 case O_hw2:
462 ret = (signed short)(num >> 32);
463 break;
464
aa137e4d
NC		 465 case O_hw3:
466 ret = (signed short)(num >> 48);
467 break;
468
469 default:
470 abort ();
471 break;
472 }
473
474 if (check_shift >= 0 && ret != (num >> check_shift))
475 {
476 as_bad_value_out_of_range (_("operand"), num,
477 ~0ULL << (check_shift + 16 - 1),
478 ~0ULL >> (64 - (check_shift + 16 - 1)),
479 file, lineno);
480 }
481
482 return ret;
483}
484
485static tilegx_bundle_bits
486emit_tilegx_instruction (tilegx_bundle_bits bits,
487 int num_operands,
488 const unsigned char *operands,
489 expressionS *operand_values,
490 char *bundle_start)
491{
492 int i;
493
494 for (i = 0; i < num_operands; i++)
495 {
496 const struct tilegx_operand *operand =
497 &tilegx_operands[operands[i]];
498 expressionS *operand_exp = &operand_values[i];
499 int is_pc_relative = operand->is_pc_relative;
500
501 if (operand_exp->X_op == O_register
502 || (operand_exp->X_op == O_constant && !is_pc_relative))
503 {
504 /* We know what the bits are right now, so insert them. */
505 bits = insert_operand (bits, operand, operand_exp->X_add_number,
506 NULL, 0);
507 }
508 else
509 {
510 bfd_reloc_code_real_type reloc = operand->default_reloc;
511 expressionS subexp;
512 int die = 0, use_subexp = 0, require_symbol = 0;
513 fixS *fixP;
514
515 /* Take an expression like hw0(x) and turn it into x with
516 a different reloc type. */
517 switch (operand_exp->X_op)
518 {
519#define HANDLE_OP16(suffix) \
520 switch (reloc) \
521 { \
522 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST: \
523 reloc = BFD_RELOC_TILEGX_IMM16_X0_##suffix; \
524 break; \
525 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST: \
526 reloc = BFD_RELOC_TILEGX_IMM16_X1_##suffix; \
527 break; \
528 default: \
529 die = 1; \
530 break; \
531 } \
532 use_subexp = 1
533
534 case O_hw0:
535 HANDLE_OP16 (HW0);
536 break;
537
538 case O_hw1:
539 HANDLE_OP16 (HW1);
540 break;
541
542 case O_hw2:
543 HANDLE_OP16 (HW2);
544 break;
545
546 case O_hw3:
547 HANDLE_OP16 (HW3);
548 break;
549
550 case O_hw0_last:
551 HANDLE_OP16 (HW0_LAST);
552 break;
553
554 case O_hw1_last:
555 HANDLE_OP16 (HW1_LAST);
556 break;
557
558 case O_hw2_last:
559 HANDLE_OP16 (HW2_LAST);
560 break;
561
562 case O_hw0_got:
563 HANDLE_OP16 (HW0_GOT);
564 require_symbol = 1;
565 break;
566
aa137e4d
NC		 567 case O_hw0_last_got:
568 HANDLE_OP16 (HW0_LAST_GOT);
569 require_symbol = 1;
570 break;
571
572 case O_hw1_last_got:
573 HANDLE_OP16 (HW1_LAST_GOT);
574 require_symbol = 1;
575 break;
576
aa137e4d
NC		 577 case O_hw0_tls_gd:
578 HANDLE_OP16 (HW0_TLS_GD);
579 require_symbol = 1;
580 break;
581
6f7be959
WL		 582 case O_hw0_last_tls_gd:
583 HANDLE_OP16 (HW0_LAST_TLS_GD);
aa137e4d
NC		 584 require_symbol = 1;
585 break;
586
6f7be959
WL		 587 case O_hw1_last_tls_gd:
588 HANDLE_OP16 (HW1_LAST_TLS_GD);
aa137e4d
NC		 589 require_symbol = 1;
590 break;
591
6f7be959
WL		 592 case O_hw0_tls_ie:
593 HANDLE_OP16 (HW0_TLS_IE);
aa137e4d
NC		 594 require_symbol = 1;
595 break;
596
6f7be959
WL		 597 case O_hw0_last_tls_ie:
598 HANDLE_OP16 (HW0_LAST_TLS_IE);
aa137e4d
NC		 599 require_symbol = 1;
600 break;
601
6f7be959
WL		 602 case O_hw1_last_tls_ie:
603 HANDLE_OP16 (HW1_LAST_TLS_IE);
aa137e4d
NC		 604 require_symbol = 1;
605 break;
606
6f7be959
WL		 607 case O_hw0_tls_le:
608 HANDLE_OP16 (HW0_TLS_LE);
aa137e4d
NC		 609 require_symbol = 1;
610 break;
611
6f7be959
WL		 612 case O_hw0_last_tls_le:
613 HANDLE_OP16 (HW0_LAST_TLS_LE);
aa137e4d
NC		 614 require_symbol = 1;
615 break;
616
6f7be959
WL		 617 case O_hw1_last_tls_le:
618 HANDLE_OP16 (HW1_LAST_TLS_LE);
aa137e4d
NC		 619 require_symbol = 1;
620 break;
621
e5b95258
WL		 622 case O_hw0_plt:
623 HANDLE_OP16 (HW0_PLT_PCREL);
624 break;
625
626 case O_hw1_plt:
627 HANDLE_OP16 (HW1_PLT_PCREL);
628 break;
629
630 case O_hw1_last_plt:
631 HANDLE_OP16 (HW1_LAST_PLT_PCREL);
632 break;
633
634 case O_hw2_last_plt:
635 HANDLE_OP16 (HW2_LAST_PLT_PCREL);
636 break;
637
6f7be959 638#undef HANDLE_OP16
aa137e4d 639
6f7be959
WL		 640 case O_plt:
641 switch (reloc)
642 {
643 case BFD_RELOC_TILEGX_JUMPOFF_X1:
644 reloc = BFD_RELOC_TILEGX_JUMPOFF_X1_PLT;
645 break;
646 default:
647 die = 1;
648 break;
649 }
650 use_subexp = 1;
aa137e4d
NC		 651 require_symbol = 1;
652 break;
653
6f7be959
WL		 654 case O_tls_gd_call:
655 switch (reloc)
656 {
657 case BFD_RELOC_TILEGX_JUMPOFF_X1:
658 reloc = BFD_RELOC_TILEGX_TLS_GD_CALL;
659 break;
660 default:
661 die = 1;
662 break;
663 }
664 use_subexp = 1;
aa137e4d
NC		 665 require_symbol = 1;
666 break;
667
6f7be959
WL		 668 case O_tls_gd_add:
669 switch (reloc)
670 {
671 case BFD_RELOC_TILEGX_IMM8_X0:
672 reloc = BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD;
673 break;
674 case BFD_RELOC_TILEGX_IMM8_X1:
675 reloc = BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD;
676 break;
677 case BFD_RELOC_TILEGX_IMM8_Y0:
678 reloc = BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD;
679 break;
680 case BFD_RELOC_TILEGX_IMM8_Y1:
681 reloc = BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD;
682 break;
683 default:
684 die = 1;
685 break;
686 }
687 use_subexp = 1;
aa137e4d
NC		 688 require_symbol = 1;
689 break;
690
6f7be959
WL		 691 case O_tls_ie_load:
692 switch (reloc)
693 {
694 case BFD_RELOC_TILEGX_IMM8_X1:
695 reloc = BFD_RELOC_TILEGX_TLS_IE_LOAD;
696 break;
697 default:
698 die = 1;
699 break;
700 }
701 use_subexp = 1;
aa137e4d
NC		 702 require_symbol = 1;
703 break;
704
6f7be959 705 case O_tls_add:
aa137e4d
NC		 706 switch (reloc)
707 {
6f7be959
WL		 708 case BFD_RELOC_TILEGX_IMM8_X0:
709 reloc = BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD;
710 break;
711 case BFD_RELOC_TILEGX_IMM8_X1:
712 reloc = BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD;
713 break;
714 case BFD_RELOC_TILEGX_IMM8_Y0:
715 reloc = BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD;
716 break;
717 case BFD_RELOC_TILEGX_IMM8_Y1:
718 reloc = BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD;
aa137e4d
NC		 719 break;
720 default:
721 die = 1;
722 break;
723 }
724 use_subexp = 1;
725 require_symbol = 1;
726 break;
727
728 default:
729 /* Do nothing. */
730 break;
731 }
732
733 if (die)
734 {
735 as_bad (_("Invalid operator for operand."));
736 }
737 else if (use_subexp)
738 {
739 /* Now that we've changed the reloc, change ha16(x) into x,
740 etc. */
741
481fe810
WL		 742 if (!operand_exp->X_add_symbol->sy_flags.sy_local_symbol
743 && operand_exp->X_add_symbol->sy_value.X_md)
aa137e4d 744 {
aa137e4d
NC		 745 /* HACK: We used X_md to mark this symbol as a fake wrapper
746 around a real expression. To unwrap it, we just grab its
747 value here. */
748 operand_exp = &operand_exp->X_add_symbol->sy_value;
e8b9f508
WL		 749
750 if (require_symbol)
751 {
752 /* Look at the expression, and reject it if it's not a
753 plain symbol. */
754 if (operand_exp->X_op != O_symbol
755 || operand_exp->X_add_number != 0)
756 as_bad (_("Operator may only be applied to symbols."));
757 }
aa137e4d
NC		 758 }
759 else
760 {
761 /* The value of this expression is an actual symbol, so
762 turn that into an expression. */
763 memset (&subexp, 0, sizeof subexp);
764 subexp.X_op = O_symbol;
765 subexp.X_add_symbol = operand_exp->X_add_symbol;
766 operand_exp = &subexp;
767 }
768 }
769
770 /* Create a fixup to handle this later. */
771 fixP = fix_new_exp (frag_now,
772 bundle_start - frag_now->fr_literal,
773 (operand->num_bits + 7) >> 3,
774 operand_exp,
775 is_pc_relative,
776 reloc);
777 fixP->tc_fix_data = operand;
778
779 /* Don't do overflow checking if we are applying a function like
780 ha16. */
781 fixP->fx_no_overflow |= use_subexp;
782 }
783 }
784 return bits;
785}
786
787
788/* Detects and complains if two instructions in current_bundle write
789 to the same register, either implicitly or explicitly, or if a
790 read-only register is written. */
791static void
792check_illegal_reg_writes (void)
793{
794 BFD_HOST_U_64_BIT all_regs_written = 0;
795 int j;
796
797 for (j = 0; j < current_bundle_index; j++)
798 {
799 const struct tilegx_instruction *instr = &current_bundle[j];
800 int k;
801 BFD_HOST_U_64_BIT regs =
802 ((BFD_HOST_U_64_BIT)1) << instr->opcode->implicitly_written_register;
803 BFD_HOST_U_64_BIT conflict;
804
805 for (k = 0; k < instr->opcode->num_operands; k++)
806 {
807 const struct tilegx_operand *operand =
808 &tilegx_operands[instr->opcode->operands[instr->pipe][k]];
809
810 if (operand->is_dest_reg)
811 {
812 int regno = instr->operand_values[k].X_add_number;
813 BFD_HOST_U_64_BIT mask = ((BFD_HOST_U_64_BIT)1) << regno;
814
815 if ((mask & ( (((BFD_HOST_U_64_BIT)1) << TREG_IDN1)
816 | (((BFD_HOST_U_64_BIT)1) << TREG_UDN1)
817 | (((BFD_HOST_U_64_BIT)1) << TREG_UDN2)
818 | (((BFD_HOST_U_64_BIT)1) << TREG_UDN3))) != 0
819 && !allow_suspicious_bundles)
820 {
821 as_bad (_("Writes to register '%s' are not allowed."),
822 tilegx_register_names[regno]);
823 }
824
825 regs |= mask;
826 }
827 }
828
829 /* Writing to the zero register doesn't count. */
830 regs &= ~(((BFD_HOST_U_64_BIT)1) << TREG_ZERO);
831
832 conflict = all_regs_written & regs;
833 if (conflict != 0 && !allow_suspicious_bundles)
834 {
835 /* Find which register caused the conflict. */
836 const char *conflicting_reg_name = "???";
837 int i;
838
839 for (i = 0; i < TILEGX_NUM_REGISTERS; i++)
840 {
841 if (((conflict >> i) & 1) != 0)
842 {
843 conflicting_reg_name = tilegx_register_names[i];
844 break;
845 }
846 }
847
848 as_bad (_("Two instructions in the same bundle both write "
849 "to register %s, which is not allowed."),
850 conflicting_reg_name);
851 }
852
853 all_regs_written |= regs;
854 }
855}
856
857
858static void
859tilegx_flush_bundle (void)
860{
861 unsigned i;
862 int j;
863 addressT addr_mod;
864 unsigned compatible_pipes;
865 const struct bundle_template *match;
866 char *f;
867
868 inside_bundle = 0;
869
870 switch (current_bundle_index)
871 {
872 case 0:
873 /* No instructions. */
874 return;
875 case 1:
876 if (current_bundle[0].opcode->can_bundle)
877 {
878 /* Simplify later logic by adding an explicit fnop. */
879 prepend_nop_to_bundle (TILEGX_OPC_FNOP);
880 }
881 else
882 {
883 /* This instruction cannot be bundled with anything else.
884 Prepend an explicit 'nop', rather than an 'fnop', because
885 fnops can be replaced by later binary-processing tools while
886 nops cannot. */
887 prepend_nop_to_bundle (TILEGX_OPC_NOP);
888 }
889 break;
890 default:
891 if (!allow_suspicious_bundles)
892 {
893 /* Make sure all instructions can be bundled with other
894 instructions. */
895 const struct tilegx_opcode *cannot_bundle = NULL;
896 bfd_boolean seen_non_nop = FALSE;
897
898 for (j = 0; j < current_bundle_index; j++)
899 {
900 const struct tilegx_opcode *op = current_bundle[j].opcode;
901
902 if (!op->can_bundle && cannot_bundle == NULL)
903 cannot_bundle = op;
904 else if (op->mnemonic != TILEGX_OPC_NOP
905 && op->mnemonic != TILEGX_OPC_INFO
906 && op->mnemonic != TILEGX_OPC_INFOL)
907 seen_non_nop = TRUE;
908 }
909
910 if (cannot_bundle != NULL && seen_non_nop)
911 {
912 current_bundle_index = 0;
913 as_bad (_("'%s' may not be bundled with other instructions."),
914 cannot_bundle->name);
915 return;
916 }
917 }
918 break;
919 }
920
921 compatible_pipes =
922 BUNDLE_TEMPLATE_MASK(current_bundle[0].opcode->pipes,
923 current_bundle[1].opcode->pipes,
924 (current_bundle_index == 3
925 ? current_bundle[2].opcode->pipes
926 : (1 << NO_PIPELINE)));
927
928 /* Find a template that works, if any. */
929 match = NULL;
930 for (i = 0; i < sizeof bundle_templates / sizeof bundle_templates[0]; i++)
931 {
932 const struct bundle_template *b = &bundle_templates[i];
933 if ((b->pipe_mask & compatible_pipes) == b->pipe_mask)
934 {
935 match = b;
936 break;
937 }
938 }
939
940 if (match == NULL)
941 {
942 current_bundle_index = 0;
943 as_bad (_("Invalid combination of instructions for bundle."));
944 return;
945 }
946
947 /* If the section seems to have no alignment set yet, go ahead and
948 make it large enough to hold code. */
949 if (bfd_get_section_alignment (stdoutput, now_seg) == 0)
950 bfd_set_section_alignment (stdoutput, now_seg,
951 TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES);
952
953 for (j = 0; j < current_bundle_index; j++)
954 current_bundle[j].pipe = match->pipe[j];
955
956 if (current_bundle_index == 2 && !tilegx_is_x_pipeline (match->pipe[0]))
957 {
958 /* We are in Y mode with only two instructions, so add an FNOP. */
959 prepend_nop_to_bundle (TILEGX_OPC_FNOP);
960
961 /* Figure out what pipe the fnop must be in via arithmetic.
962 * p0 + p1 + p2 must sum to the sum of TILEGX_PIPELINE_Y[012]. */
963 current_bundle[0].pipe =
964 (tilegx_pipeline)((TILEGX_PIPELINE_Y0
965 + TILEGX_PIPELINE_Y1
966 + TILEGX_PIPELINE_Y2) -
967 (current_bundle[1].pipe + current_bundle[2].pipe));
968 }
969
970 check_illegal_reg_writes ();
971
972 f = frag_more (TILEGX_BUNDLE_SIZE_IN_BYTES);
973
974 /* Check to see if this bundle is at an offset that is a multiple of 8-bytes
975 from the start of the frag. */
976 addr_mod = frag_now_fix () & (TILEGX_BUNDLE_ALIGNMENT_IN_BYTES - 1);
977 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
978 as_bad (_("instruction address is not a multiple of 8"));
979 frag_now->insn_addr = addr_mod;
980 frag_now->has_code = 1;
981
982 tilegx_bundle_bits bits = 0;
983 for (j = 0; j < current_bundle_index; j++)
984 {
985 struct tilegx_instruction *instr = &current_bundle[j];
986 tilegx_pipeline pipeline = instr->pipe;
987 const struct tilegx_opcode *opcode = instr->opcode;
988
989 bits |= emit_tilegx_instruction (opcode->fixed_bit_values[pipeline],
990 opcode->num_operands,
991 &opcode->operands[pipeline][0],
992 instr->operand_values,
993 f);
994 }
995
996 number_to_chars_littleendian (f, bits, 8);
997 current_bundle_index = 0;
998
999 /* Emit DWARF2 debugging information. */
1000 dwarf2_emit_insn (TILEGX_BUNDLE_SIZE_IN_BYTES);
1001}
1002
1003
1004/* Extend the expression parser to handle hw0(label), etc.
1005 as well as SPR names when in the context of parsing an SPR. */
1006
1007int
1008tilegx_parse_name (char *name, expressionS *e, char *nextcharP)
1009{
1010 operatorT op = O_illegal;
1011
1012 if (parsing_spr)
1013 {
1014 void* val = hash_find (spr_hash, name);
1015 if (val == NULL)
1016 return 0;
1017
1018 memset (e, 0, sizeof *e);
1019 e->X_op = O_constant;
1020 e->X_add_number = ((const struct tilegx_spr *)val)->number;
1021 return 1;
1022 }
1023
1024 if (*nextcharP != '(')
1025 {
1026 /* hw0, etc. not followed by a paren is just a label with that name. */
1027 return 0;
1028 }
1029 else
1030 {
1031 /* Look up the operator in our table. */
1032 void* val = hash_find (special_operator_hash, name);
1033 if (val == 0)
1034 return 0;
1035 op = (operatorT)(long)val;
1036 }
1037
1038 /* Restore old '(' and skip it. */
1039 *input_line_pointer = '(';
1040 ++input_line_pointer;
1041
1042 expression (e);
1043
1044 if (*input_line_pointer != ')')
1045 {
1046 as_bad (_("Missing ')'"));
1047 *nextcharP = *input_line_pointer;
1048 return 0;
1049 }
1050 /* Skip ')'. */
1051 ++input_line_pointer;
1052
1053 if (e->X_op == O_register || e->X_op == O_absent)
1054 {
1055 as_bad (_("Invalid expression."));
1056 e->X_op = O_constant;
1057 e->X_add_number = 0;
1058 }
1059 else
1060 {
1061 /* Wrap subexpression with a unary operator. */
1062 symbolS *sym = make_expr_symbol (e);
1063
1064 if (sym != e->X_add_symbol)
1065 {
1066 /* HACK: mark this symbol as a temporary wrapper around a proper
1067 expression, so we can unwrap it later once we have communicated
1068 the relocation type. */
1069 sym->sy_value.X_md = 1;
1070 }
1071
1072 memset (e, 0, sizeof *e);
1073 e->X_op = op;
1074 e->X_add_symbol = sym;
1075 e->X_add_number = 0;
1076 }
1077
1078 *nextcharP = *input_line_pointer;
1079 return 1;
1080}
1081
1082
1083/* Parses an expression which must be a register name. */
1084
1085static void
1086parse_reg_expression (expressionS* expression)
1087{
d02603dc
NC		 1088 char *regname;
1089 char terminating_char;
1090 void *pval;
1091 int regno_and_flags;
1092 int regno;
1093
aa137e4d
NC		 1094 /* Zero everything to make sure we don't miss any flags. */
1095 memset (expression, 0, sizeof *expression);
1096
d02603dc 1097 terminating_char = get_symbol_name (&regname);
aa137e4d 1098
d02603dc 1099 pval = hash_find (main_reg_hash, regname);
aa137e4d 1100 if (pval == NULL)
d02603dc 1101 as_bad (_("Expected register, got '%s'."), regname);
aa137e4d 1102
d02603dc
NC		 1103 regno_and_flags = (int)(size_t)pval;
1104 regno = EXTRACT_REGNO(regno_and_flags);
aa137e4d
NC		 1105
1106 if ((regno_and_flags & NONCANONICAL_REG_NAME_FLAG)
1107 && require_canonical_reg_names)
d02603dc
NC		 1108 as_warn (_("Found use of non-canonical register name %s; "
1109 "use %s instead."),
1110 regname, tilegx_register_names[regno]);
aa137e4d
NC		 1111
1112 /* Restore the old character following the register name. */
d02603dc 1113 (void) restore_line_pointer (terminating_char);
aa137e4d
NC		 1114
1115 /* Fill in the expression fields to indicate it's a register. */
1116 expression->X_op = O_register;
1117 expression->X_add_number = regno;
1118}
1119
1120
1121/* Parses and type-checks comma-separated operands in input_line_pointer. */
1122
1123static void
1124parse_operands (const char *opcode_name,
1125 const unsigned char *operands,
1126 int num_operands,
1127 expressionS *operand_values)
1128{
1129 int i;
1130
1131 memset (operand_values, 0, num_operands * sizeof operand_values[0]);
1132
1133 SKIP_WHITESPACE ();
1134 for (i = 0; i < num_operands; i++)
1135 {
1136 tilegx_operand_type type = tilegx_operands[operands[i]].type;
1137
1138 SKIP_WHITESPACE ();
1139
1140 if (type == TILEGX_OP_TYPE_REGISTER)
1141 {
1142 parse_reg_expression (&operand_values[i]);
1143 }
1144 else if (*input_line_pointer == '}')
1145 {
1146 operand_values[i].X_op = O_absent;
1147 }
1148 else if (type == TILEGX_OP_TYPE_SPR)
1149 {
1150 /* Modify the expression parser to add SPRs to the namespace. */
1151 parsing_spr = 1;
1152 expression (&operand_values[i]);
1153 parsing_spr = 0;
1154 }
1155 else
1156 {
1157 expression (&operand_values[i]);
1158 }
1159
1160 SKIP_WHITESPACE ();
1161
1162 if (i + 1 < num_operands)
1163 {
1164 int separator = (unsigned char)*input_line_pointer++;
1165
1166 if (is_end_of_line[separator] || (separator == '}'))
1167 {
1168 as_bad (_("Too few operands to '%s'."), opcode_name);
1169 return;
1170 }
1171 else if (separator != ',')
1172 {
1173 as_bad (_("Unexpected character '%c' after operand %d to %s."),
1174 (char)separator, i + 1, opcode_name);
1175 return;
1176 }
1177 }
1178
1179 /* Arbitrarily use the first valid pipe to get the operand type,
1180 since they are all the same. */
1181 switch (tilegx_operands[operands[i]].type)
1182 {
1183 case TILEGX_OP_TYPE_REGISTER:
1184 /* Handled in parse_reg_expression already. */
1185 break;
1186 case TILEGX_OP_TYPE_SPR:
1187 /* Fall through */
1188 case TILEGX_OP_TYPE_IMMEDIATE:
1189 /* Fall through */
1190 case TILEGX_OP_TYPE_ADDRESS:
1191 if ( operand_values[i].X_op == O_register
1192 || operand_values[i].X_op == O_illegal
1193 || operand_values[i].X_op == O_absent)
1194 as_bad (_("Expected immediate expression"));
1195 break;
1196 default:
1197 abort();
1198 }
1199 }
1200
1201 if (!is_end_of_line[(unsigned char)*input_line_pointer])
1202 {
1203 switch (*input_line_pointer)
1204 {
1205 case '}':
1206 if (!inside_bundle)
1207 as_bad (_("Found '}' when not bundling."));
1208 ++input_line_pointer;
1209 inside_bundle = 0;
1210 demand_empty_rest_of_line ();
1211 break;
1212
1213 case ',':
1214 as_bad (_("Too many operands"));
1215 break;
1216
1217 default:
1218 /* Use default error for unrecognized garbage. */
1219 demand_empty_rest_of_line ();
1220 break;
1221 }
1222 }
1223}
1224
1225
1226/* This is the guts of the machine-dependent assembler. STR points to a
1227 machine dependent instruction. This function is supposed to emit the
1228 frags/bytes it assembles to. */
1229
1230void
1231md_assemble (char *str)
1232{
1233 char old_char;
1234 size_t opname_len;
1235 char *old_input_line_pointer;
1236 const struct tilegx_opcode *op;
1237 int first_pipe;
1238
1239 /* Split off the opcode and look it up. */
1240 opname_len = strcspn (str, " {}");
1241 old_char = str[opname_len];
1242 str[opname_len] = '\0';
1243
1244 op = hash_find(op_hash, str);
1245 str[opname_len] = old_char;
1246 if (op == NULL)
1247 {
1248 as_bad (_("Unknown opcode `%.*s'."), (int)opname_len, str);
1249 return;
1250 }
1251
1252 /* Prepare to parse the operands. */
1253 old_input_line_pointer = input_line_pointer;
1254 input_line_pointer = str + opname_len;
1255 SKIP_WHITESPACE ();
1256
1257 if (current_bundle_index == TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE)
1258 {
1259 as_bad (_("Too many instructions for bundle."));
1260 tilegx_flush_bundle ();
1261 }
1262
1263 /* Make sure we have room for the upcoming bundle before we
1264 create any fixups. Otherwise if we have to switch to a new
1265 frag the fixup dot_value fields will be wrong. */
1266 frag_grow (TILEGX_BUNDLE_SIZE_IN_BYTES);
1267
1268 /* Find a valid pipe for this opcode. */
1269 for (first_pipe = 0; (op->pipes & (1 << first_pipe)) == 0; first_pipe++)
1270 ;
1271
1272 /* Call the function that assembles this instruction. */
1273 current_bundle[current_bundle_index].opcode = op;
1274 parse_operands (op->name,
1275 &op->operands[first_pipe][0],
1276 op->num_operands,
1277 current_bundle[current_bundle_index].operand_values);
1278 ++current_bundle_index;
1279
1280 /* Restore the saved value of input_line_pointer. */
1281 input_line_pointer = old_input_line_pointer;
1282
1283 /* If we weren't inside curly braces, go ahead and emit
1284 this lone instruction as a bundle right now. */
1285 if (!inside_bundle)
1286 tilegx_flush_bundle ();
1287}
1288
1289
1290static void
1291s_require_canonical_reg_names (int require)
1292{
1293 demand_empty_rest_of_line ();
1294 require_canonical_reg_names = require;
1295}
1296
1297static void
1298s_allow_suspicious_bundles (int allow)
1299{
1300 demand_empty_rest_of_line ();
1301 allow_suspicious_bundles = allow;
1302}
1303
1304const pseudo_typeS md_pseudo_table[] =
1305{
1306 {"align", s_align_bytes, 0}, /* Defaulting is invalid (0). */
1307 {"word", cons, 4},
1308 {"require_canonical_reg_names", s_require_canonical_reg_names, 1 },
1309 {"no_require_canonical_reg_names", s_require_canonical_reg_names, 0 },
1310 {"allow_suspicious_bundles", s_allow_suspicious_bundles, 1 },
1311 {"no_allow_suspicious_bundles", s_allow_suspicious_bundles, 0 },
1312 { NULL, 0, 0 }
1313};
1314
1315/* Equal to MAX_PRECISION in atof-ieee.c */
1316#define MAX_LITTLENUMS 6
1317
fb6cedde
WL		 1318void
1319md_number_to_chars (char * buf, valueT val, int n)
1320{
1321 if (target_big_endian)
1322 number_to_chars_bigendian (buf, val, n);
1323 else
1324 number_to_chars_littleendian (buf, val, n);
1325}
1326
aa137e4d
NC		 1327/* Turn the string pointed to by litP into a floating point constant
1328 of type TYPE, and emit the appropriate bytes. The number of
1329 LITTLENUMS emitted is stored in *SIZEP. An error message is
1330 returned, or NULL on OK. */
1331
1332char *
1333md_atof (int type, char *litP, int *sizeP)
1334{
1335 int prec;
1336 LITTLENUM_TYPE words[MAX_LITTLENUMS];
1337 LITTLENUM_TYPE *wordP;
1338 char *t;
1339
1340 switch (type)
1341 {
1342 case 'f':
1343 case 'F':
1344 prec = 2;
1345 break;
1346
1347 case 'd':
1348 case 'D':
1349 prec = 4;
1350 break;
1351
1352 default:
1353 *sizeP = 0;
1354 return _("Bad call to md_atof ()");
1355 }
1356 t = atof_ieee (input_line_pointer, type, words);
1357 if (t)
1358 input_line_pointer = t;
1359
1360 *sizeP = prec * sizeof (LITTLENUM_TYPE);
1361 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
1362 the bigendian 386. */
1363 for (wordP = words + prec - 1; prec--;)
1364 {
1365 md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
1366 litP += sizeof (LITTLENUM_TYPE);
1367 }
1368 return 0;
1369}
1370
1371
1372/* We have no need to default values of symbols. */
1373
1374symbolS *
1375md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
1376{
1377 return NULL;
1378}
1379
1380
1381void
1382tilegx_cons_fix_new (fragS *frag,
1383 int where,
1384 int nbytes,
1385 expressionS *exp)
1386{
1387 expressionS subexp;
1388 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE;
1389 int no_overflow = 0;
1390 fixS *fixP;
1391
1392 /* See if it's one of our special functions. */
1393 switch (exp->X_op)
1394 {
1395 case O_hw0:
1396 reloc = BFD_RELOC_TILEGX_HW0;
1397 no_overflow = 1;
1398 break;
1399 case O_hw1:
1400 reloc = BFD_RELOC_TILEGX_HW1;
1401 no_overflow = 1;
1402 break;
1403 case O_hw2:
1404 reloc = BFD_RELOC_TILEGX_HW2;
1405 no_overflow = 1;
1406 break;
1407 case O_hw3:
1408 reloc = BFD_RELOC_TILEGX_HW3;
1409 no_overflow = 1;
1410 break;
1411 case O_hw0_last:
1412 reloc = BFD_RELOC_TILEGX_HW0_LAST;
1413 break;
1414 case O_hw1_last:
1415 reloc = BFD_RELOC_TILEGX_HW1_LAST;
1416 break;
1417 case O_hw2_last:
1418 reloc = BFD_RELOC_TILEGX_HW2_LAST;
1419 break;
1420
1421 default:
1422 /* Do nothing. */
1423 break;
1424 }
1425
1426 if (reloc != BFD_RELOC_NONE)
1427 {
1428 if (nbytes != 2)
1429 {
1430 as_bad (_("This operator only produces two byte values."));
1431 nbytes = 2;
1432 }
1433
1434 memset (&subexp, 0, sizeof subexp);
1435 subexp.X_op = O_symbol;
1436 subexp.X_add_symbol = exp->X_add_symbol;
1437 exp = &subexp;
1438 }
1439 else
1440 {
1441 switch (nbytes)
1442 {
1443 case 1:
1444 reloc = BFD_RELOC_8;
1445 break;
1446 case 2:
1447 reloc = BFD_RELOC_16;
1448 break;
1449 case 4:
1450 reloc = BFD_RELOC_32;
1451 break;
1452 case 8:
1453 reloc = BFD_RELOC_64;
1454 break;
1455 default:
1456 as_bad (_("unsupported BFD relocation size %d"), nbytes);
1457 reloc = BFD_RELOC_64;
1458 break;
1459 }
1460 }
1461
1462 fixP = fix_new_exp (frag, where, nbytes, exp, 0, reloc);
1463 fixP->tc_fix_data = NULL;
1464 fixP->fx_no_overflow |= no_overflow;
1465}
1466
1467
1468void
1469md_apply_fix (fixS *fixP, valueT * valP, segT seg ATTRIBUTE_UNUSED)
1470{
1471 const struct tilegx_operand *operand;
1472 valueT value = *valP;
1473 operatorT special;
1474 char *p;
1475
1476 /* Leave these for the linker. */
1477 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1478 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1479 return;
1480
1481 if (fixP->fx_subsy != (symbolS *) NULL)
1482 {
1483 /* We can't actually support subtracting a symbol. */
1484 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1485 }
1486
1487 /* Correct relocation types for pc-relativeness. */
1488 switch (fixP->fx_r_type)
1489 {
1490#define FIX_PCREL(rtype) \
1491 case rtype: \
1492 if (fixP->fx_pcrel) \
1493 fixP->fx_r_type = rtype##_PCREL; \
1494 break; \
1495 \
1496 case rtype##_PCREL: \
1497 if (!fixP->fx_pcrel) \
1498 fixP->fx_r_type = rtype; \
1499 break
1500
e5b95258
WL		 1501#define FIX_PLT_PCREL(rtype) \
1502 case rtype##_PLT_PCREL: \
1503 if (!fixP->fx_pcrel) \
1504 fixP->fx_r_type = rtype; \
1505 \
1506 break;
1507
aa137e4d
NC		 1508 FIX_PCREL (BFD_RELOC_8);
1509 FIX_PCREL (BFD_RELOC_16);
1510 FIX_PCREL (BFD_RELOC_32);
1511 FIX_PCREL (BFD_RELOC_64);
1512 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW0);
1513 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW0);
1514 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW1);
1515 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW1);
1516 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW2);
1517 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW2);
1518 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW3);
1519 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW3);
1520 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST);
1521 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST);
1522 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST);
1523 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST);
1524 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST);
1525 FIX_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST);
e5b95258
WL		 1526 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW0);
1527 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW0);
1528 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW1);
1529 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW1);
1530 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST);
1531 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST);
1532 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST);
1533 FIX_PLT_PCREL (BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST);
aa137e4d
NC		 1534
1535#undef FIX_PCREL
1536
1537 default:
1538 /* Do nothing */
1539 break;
1540 }
1541
1542 if (fixP->fx_addsy != NULL)
1543 {
1544#ifdef OBJ_ELF
1545 switch (fixP->fx_r_type)
1546 {
6f7be959
WL		 1547 case BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD:
1548 case BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD:
1549 case BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD:
1550 case BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD:
1551 case BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD:
1552 case BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD:
1553 case BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD:
1554 case BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD:
aa137e4d
NC		 1555 case BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD:
1556 case BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD:
aa137e4d
NC		 1557 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD:
1558 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD:
aa137e4d
NC		 1559 case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD:
1560 case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD:
6f7be959
WL		 1561 case BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE:
1562 case BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE:
1563 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE:
1564 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE:
aa137e4d
NC		 1565 case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE:
1566 case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE:
6f7be959
WL		 1567 case BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE:
1568 case BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE:
1569 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE:
1570 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE:
1571 case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE:
1572 case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE:
1573 case BFD_RELOC_TILEGX_TLS_GD_CALL:
1574 case BFD_RELOC_TILEGX_TLS_IE_LOAD:
aa137e4d
NC		 1575 case BFD_RELOC_TILEGX_TLS_DTPMOD64:
1576 case BFD_RELOC_TILEGX_TLS_DTPOFF64:
1577 case BFD_RELOC_TILEGX_TLS_TPOFF64:
1578 case BFD_RELOC_TILEGX_TLS_DTPMOD32:
1579 case BFD_RELOC_TILEGX_TLS_DTPOFF32:
1580 case BFD_RELOC_TILEGX_TLS_TPOFF32:
1581 S_SET_THREAD_LOCAL (fixP->fx_addsy);
1582 break;
1583
1584 default:
1585 /* Do nothing */
1586 break;
1587 }
1588#endif
1589 return;
1590 }
1591
1592 /* Apply hw0, etc. */
1593 special = O_illegal;
1594 switch (fixP->fx_r_type)
1595 {
1596 case BFD_RELOC_TILEGX_HW0:
1597 case BFD_RELOC_TILEGX_IMM16_X0_HW0:
1598 case BFD_RELOC_TILEGX_IMM16_X1_HW0:
1599 case BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL:
1600 case BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL:
e5b95258
WL		 1601 case BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL:
1602 case BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL:
aa137e4d
NC		 1603 special = O_hw0;
1604 break;
1605
1606 case BFD_RELOC_TILEGX_HW0_LAST:
1607 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST:
1608 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST:
1609 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL:
1610 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL:
e5b95258
WL		 1611 case BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL:
1612 case BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL:
aa137e4d
NC		 1613 special = O_hw0_last;
1614 break;
1615
1616 case BFD_RELOC_TILEGX_HW1:
1617 case BFD_RELOC_TILEGX_IMM16_X0_HW1:
1618 case BFD_RELOC_TILEGX_IMM16_X1_HW1:
1619 case BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL:
1620 case BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL:
e5b95258
WL		 1621 case BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL:
1622 case BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL:
aa137e4d
NC		 1623 special = O_hw1;
1624 break;
1625
1626 case BFD_RELOC_TILEGX_HW1_LAST:
1627 case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST:
1628 case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST:
1629 case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL:
1630 case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL:
e5b95258
WL		 1631 case BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL:
1632 case BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL:
aa137e4d
NC		 1633 special = O_hw1_last;
1634 break;
1635
1636 case BFD_RELOC_TILEGX_HW2:
1637 case BFD_RELOC_TILEGX_IMM16_X0_HW2:
1638 case BFD_RELOC_TILEGX_IMM16_X1_HW2:
1639 case BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL:
1640 case BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL:
e5b95258
WL		 1641 case BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL:
1642 case BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL:
aa137e4d
NC		 1643 special = O_hw2;
1644 break;
1645
1646 case BFD_RELOC_TILEGX_HW2_LAST:
1647 case BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST:
1648 case BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST:
1649 case BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL:
1650 case BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL:
e5b95258
WL		 1651 case BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL:
1652 case BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL:
aa137e4d
NC		 1653 special = O_hw2_last;
1654 break;
1655
1656 case BFD_RELOC_TILEGX_HW3:
1657 case BFD_RELOC_TILEGX_IMM16_X0_HW3:
1658 case BFD_RELOC_TILEGX_IMM16_X1_HW3:
1659 case BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL:
1660 case BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL:
e5b95258
WL		 1661 case BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL:
1662 case BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL:
aa137e4d
NC		 1663 special = O_hw3;
1664 break;
1665
1666 default:
1667 /* Do nothing */
1668 break;
1669 }
1670
1671 if (special != O_illegal)
1672 {
1673 *valP = value = apply_special_operator (special, value,
1674 fixP->fx_file, fixP->fx_line);
1675 }
1676
1677 p = fixP->fx_frag->fr_literal + fixP->fx_where;
1678
1679 operand = fixP->tc_fix_data;
1680 if (operand != NULL)
1681 {
1682 /* It's an instruction operand. */
1683 tilegx_bundle_bits bits =
1684 insert_operand (0, operand, value, fixP->fx_file, fixP->fx_line);
1685
1686 /* Note that we might either be writing out bits for a bundle
1687 or a static network instruction, which are different sizes, so it's
1688 important to stop touching memory once we run out of bits.
1689 ORing in values is OK since we know the existing bits for
1690 this operand are zero. */
1691 for (; bits != 0; bits >>= 8)
1692 *p++ |= (char)bits;
1693 }
1694 else
1695 {
1696 /* Some other kind of relocation. */
1697 switch (fixP->fx_r_type)
1698 {
1699 case BFD_RELOC_8:
1700 case BFD_RELOC_8_PCREL:
1701 md_number_to_chars (p, value, 1);
1702 break;
1703
1704 case BFD_RELOC_16:
1705 case BFD_RELOC_16_PCREL:
1706 md_number_to_chars (p, value, 2);
1707 break;
1708
1709 case BFD_RELOC_32:
1710 case BFD_RELOC_32_PCREL:
1711 md_number_to_chars (p, value, 4);
1712 break;
1713
1714 case BFD_RELOC_64:
1715 case BFD_RELOC_64_PCREL:
1716 md_number_to_chars (p, value, 8);
1717 break;
1718
1719 default:
1720 /* Leave it for the linker. */
1721 return;
1722 }
1723 }
1724
1725 fixP->fx_done = 1;
1726}
1727
1728
1729/* Generate the BFD reloc to be stuck in the object file from the
1730 fixup used internally in the assembler. */
1731
1732arelent *
1733tc_gen_reloc (asection *sec ATTRIBUTE_UNUSED, fixS *fixp)
1734{
1735 arelent *reloc;
1736
1737 reloc = (arelent *) xmalloc (sizeof (arelent));
1738 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1739 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1740 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1741
1742 /* Make sure none of our internal relocations make it this far.
1743 They'd better have been fully resolved by this point. */
1744 gas_assert ((int) fixp->fx_r_type > 0);
1745
1746 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1747 if (reloc->howto == NULL)
1748 {
1749 as_bad_where (fixp->fx_file, fixp->fx_line,
1750 _("cannot represent `%s' relocation in object file"),
1751 bfd_get_reloc_code_name (fixp->fx_r_type));
1752 return NULL;
1753 }
1754
1755 if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
1756 {
1757 as_fatal (_("internal error? cannot generate `%s' relocation (%d, %d)"),
1758 bfd_get_reloc_code_name (fixp->fx_r_type),
1759 fixp->fx_pcrel, reloc->howto->pc_relative);
1760 }
1761 gas_assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
1762
1763 reloc->addend = fixp->fx_offset;
1764
1765 return reloc;
1766}
1767
1768
1769/* The location from which a PC relative jump should be calculated,
1770 given a PC relative reloc. */
1771
1772long
1773md_pcrel_from (fixS *fixP)
1774{
1775 return fixP->fx_frag->fr_address + fixP->fx_where;
1776}
1777
1778
1779/* Return 1 if it's OK to adjust a reloc by replacing the symbol with
1780 a section symbol plus some offset. */
1781int
1782tilegx_fix_adjustable (fixS *fix)
1783{
1784 /* Prevent all adjustments to global symbols */
1785 if (S_IS_EXTERNAL (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
1786 return 0;
1787
1788 return 1;
1789}
1790
1791
1792int
1793tilegx_unrecognized_line (int ch)
1794{
1795 switch (ch)
1796 {
1797 case '{':
1798 if (inside_bundle)
1799 {
1800 as_bad (_("Found '{' when already bundling."));
1801 }
1802 else
1803 {
1804 inside_bundle = 1;
1805 current_bundle_index = 0;
1806 }
1807 return 1;
1808
1809 case '}':
1810 if (!inside_bundle)
1811 {
1812 as_bad (_("Found '}' when not bundling."));
1813 }
1814 else
1815 {
1816 tilegx_flush_bundle ();
1817 }
1818
1819 /* Allow '{' to follow on the same line. We also allow ";;", but that
1820 happens automatically because ';' is an end of line marker. */
1821 SKIP_WHITESPACE ();
1822 if (input_line_pointer[0] == '{')
1823 {
1824 input_line_pointer++;
1825 return tilegx_unrecognized_line ('{');
1826 }
1827
1828 demand_empty_rest_of_line ();
1829 return 1;
1830
1831 default:
1832 break;
1833 }
1834
1835 /* Not a valid line. */
1836 return 0;
1837}
1838
1839
1840/* This is called from HANDLE_ALIGN in write.c. Fill in the contents
1841 of an rs_align_code fragment. */
1842
1843void
1844tilegx_handle_align (fragS *fragp)
1845{
1846 addressT bytes, fix;
1847 char *p;
1848
1849 if (fragp->fr_type != rs_align_code)
1850 return;
1851
1852 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
1853 p = fragp->fr_literal + fragp->fr_fix;
1854 fix = 0;
1855
1856 /* Determine the bits for NOP. */
1857 const struct tilegx_opcode *nop_opcode =
1858 &tilegx_opcodes[TILEGX_OPC_NOP];
1859 tilegx_bundle_bits nop =
1860 ( nop_opcode->fixed_bit_values[TILEGX_PIPELINE_X0]
1861 | nop_opcode->fixed_bit_values[TILEGX_PIPELINE_X1]);
1862
1863 if ((bytes & (TILEGX_BUNDLE_SIZE_IN_BYTES - 1)) != 0)
1864 {
1865 fix = bytes & (TILEGX_BUNDLE_SIZE_IN_BYTES - 1);
1866 memset (p, 0, fix);
1867 p += fix;
1868 bytes -= fix;
1869 }
1870
1871 number_to_chars_littleendian (p, nop, 8);
1872 fragp->fr_fix += fix;
1873 fragp->fr_var = TILEGX_BUNDLE_SIZE_IN_BYTES;
1874}
1875
1876/* Standard calling conventions leave the CFA at SP on entry. */
1877void
1878tilegx_cfi_frame_initial_instructions (void)
1879{
1880 cfi_add_CFA_def_cfa_register (54);
1881}
1882
1883int
1884tc_tilegx_regname_to_dw2regnum (char *regname)
1885{
1886 int i;
1887 for (i = 0; i < TILEGX_NUM_REGISTERS; i++)
1888 {
1889 if (!strcmp (regname, tilegx_register_names[i]))
1890 return i;
1891 }
1892
1893 return -1;
1894}
GDB Binutils - Deliverables
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