ATMEL AVR microcontroller support.
[deliverable/binutils-gdb.git] / gas / config / tc-v850.c
CommitLineData
252b5132 1/* tc-v850.c -- Assembler code for the NEC V850
310b5aa2 2 Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation.
252b5132
RH
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21#include <stdio.h>
22#include <ctype.h>
23#include "as.h"
24#include "subsegs.h"
25#include "opcode/v850.h"
26
27#define AREA_ZDA 0
28#define AREA_SDA 1
29#define AREA_TDA 2
30
31/* sign-extend a 16-bit number */
32#define SEXT16(x) ((((x) & 0xffff) ^ (~ 0x7fff)) + 0x8000)
33
34/* Temporarily holds the reloc in a cons expression. */
35static bfd_reloc_code_real_type hold_cons_reloc;
36
37/* Set to TRUE if we want to be pedantic about signed overflows. */
38static boolean warn_signed_overflows = FALSE;
39static boolean warn_unsigned_overflows = FALSE;
40
41/* Indicates the target BFD machine number. */
42static int machine = -1;
43
44/* Indicates the target processor(s) for the assemble. */
45static unsigned int processor_mask = -1;
46
47\f
48/* Structure to hold information about predefined registers. */
49struct reg_name
50{
51 const char * name;
52 int value;
53};
54
55/* Generic assembler global variables which must be defined by all targets. */
56
57/* Characters which always start a comment. */
58const char comment_chars[] = "#";
59
60/* Characters which start a comment at the beginning of a line. */
61const char line_comment_chars[] = ";#";
62
63/* Characters which may be used to separate multiple commands on a
64 single line. */
65const char line_separator_chars[] = ";";
66
67/* Characters which are used to indicate an exponent in a floating
68 point number. */
69const char EXP_CHARS[] = "eE";
70
71/* Characters which mean that a number is a floating point constant,
72 as in 0d1.0. */
73const char FLT_CHARS[] = "dD";
74\f
75
76const relax_typeS md_relax_table[] =
77{
78 /* Conditional branches. */
79 {0xff, -0x100, 2, 1},
80 {0x1fffff, -0x200000, 6, 0},
81 /* Unconditional branches. */
82 {0xff, -0x100, 2, 3},
83 {0x1fffff, -0x200000, 4, 0},
84};
85
86
87static segT sdata_section = NULL;
88static segT tdata_section = NULL;
89static segT zdata_section = NULL;
90static segT sbss_section = NULL;
91static segT tbss_section = NULL;
92static segT zbss_section = NULL;
93static segT rosdata_section = NULL;
94static segT rozdata_section = NULL;
95static segT scommon_section = NULL;
96static segT tcommon_section = NULL;
97static segT zcommon_section = NULL;
98static segT call_table_data_section = NULL;
99static segT call_table_text_section = NULL;
100
101/* fixups */
102#define MAX_INSN_FIXUPS (5)
103struct v850_fixup
104{
105 expressionS exp;
106 int opindex;
107 bfd_reloc_code_real_type reloc;
108};
109
110struct v850_fixup fixups [MAX_INSN_FIXUPS];
111static int fc;
112
113\f
114void
115v850_sdata (int ignore)
116{
117 obj_elf_section_change_hook();
118
119 subseg_set (sdata_section, (subsegT) get_absolute_expression ());
120
121 demand_empty_rest_of_line ();
122}
123
124void
125v850_tdata (int ignore)
126{
127 obj_elf_section_change_hook();
128
129 subseg_set (tdata_section, (subsegT) get_absolute_expression ());
130
131 demand_empty_rest_of_line ();
132}
133
134void
135v850_zdata (int ignore)
136{
137 obj_elf_section_change_hook();
138
139 subseg_set (zdata_section, (subsegT) get_absolute_expression ());
140
141 demand_empty_rest_of_line ();
142}
143
144void
145v850_sbss (int ignore)
146{
147 obj_elf_section_change_hook();
148
149 subseg_set (sbss_section, (subsegT) get_absolute_expression ());
150
151 demand_empty_rest_of_line ();
152}
153
154void
155v850_tbss (int ignore)
156{
157 obj_elf_section_change_hook();
158
159 subseg_set (tbss_section, (subsegT) get_absolute_expression ());
160
161 demand_empty_rest_of_line ();
162}
163
164void
165v850_zbss (int ignore)
166{
167 obj_elf_section_change_hook();
168
169 subseg_set (zbss_section, (subsegT) get_absolute_expression ());
170
171 demand_empty_rest_of_line ();
172}
173
174void
175v850_rosdata (int ignore)
176{
177 obj_elf_section_change_hook();
178
179 subseg_set (rosdata_section, (subsegT) get_absolute_expression ());
180
181 demand_empty_rest_of_line ();
182}
183
184void
185v850_rozdata (int ignore)
186{
187 obj_elf_section_change_hook();
188
189 subseg_set (rozdata_section, (subsegT) get_absolute_expression ());
190
191 demand_empty_rest_of_line ();
192}
193
194void
195v850_call_table_data (int ignore)
196{
197 obj_elf_section_change_hook();
198
199 subseg_set (call_table_data_section, (subsegT) get_absolute_expression ());
200
201 demand_empty_rest_of_line ();
202}
203
204void
205v850_call_table_text (int ignore)
206{
207 obj_elf_section_change_hook();
208
209 subseg_set (call_table_text_section, (subsegT) get_absolute_expression ());
210
211 demand_empty_rest_of_line ();
212}
213
214void
215v850_bss (int ignore)
216{
217 register int temp = get_absolute_expression ();
218
219 obj_elf_section_change_hook();
220
221 subseg_set (bss_section, (subsegT) temp);
222
223 demand_empty_rest_of_line ();
224}
225
226void
227v850_offset (int ignore)
228{
229 int temp = get_absolute_expression ();
230
231 temp -= frag_now_fix();
232
233 if (temp > 0)
234 (void) frag_more (temp);
235
236 demand_empty_rest_of_line ();
237}
238
239/* Copied from obj_elf_common() in gas/config/obj-elf.c */
240static void
241v850_comm (area)
242 int area;
243{
244 char * name;
245 char c;
246 char * p;
247 int temp;
248 int size;
249 symbolS * symbolP;
250 int have_align;
251
252 name = input_line_pointer;
253 c = get_symbol_end ();
254
255 /* just after name is now '\0' */
256 p = input_line_pointer;
257 *p = c;
258
259 SKIP_WHITESPACE ();
260
261 if (*input_line_pointer != ',')
262 {
263 as_bad (_("Expected comma after symbol-name"));
264 ignore_rest_of_line ();
265 return;
266 }
267
268 input_line_pointer ++; /* skip ',' */
269
270 if ((temp = get_absolute_expression ()) < 0)
271 {
272 /* xgettext:c-format */
273 as_bad (_(".COMMon length (%d.) < 0! Ignored."), temp);
274 ignore_rest_of_line ();
275 return;
276 }
277
278 size = temp;
279 *p = 0;
280 symbolP = symbol_find_or_make (name);
281 *p = c;
282
283 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
284 {
285 as_bad (_("Ignoring attempt to re-define symbol"));
286 ignore_rest_of_line ();
287 return;
288 }
289
290 if (S_GET_VALUE (symbolP) != 0)
291 {
292 if (S_GET_VALUE (symbolP) != size)
293 {
294 /* xgettext:c-format */
295 as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %d."),
296 S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
297 }
298 }
299
7dcc9865 300 know (symbol_get_frag (symbolP) == & zero_address_frag);
252b5132
RH
301
302 if (*input_line_pointer != ',')
303 have_align = 0;
304 else
305 {
306 have_align = 1;
307 input_line_pointer++;
308 SKIP_WHITESPACE ();
309 }
310
311 if (! have_align || *input_line_pointer != '"')
312 {
313 if (! have_align)
314 temp = 0;
315 else
316 {
317 temp = get_absolute_expression ();
318
319 if (temp < 0)
320 {
321 temp = 0;
322 as_warn (_("Common alignment negative; 0 assumed"));
323 }
324 }
325
cac58fa6 326 if (symbol_get_obj (symbolP)->local)
252b5132
RH
327 {
328 segT old_sec;
329 int old_subsec;
330 char * pfrag;
331 int align;
332 flagword applicable;
333
334 old_sec = now_seg;
335 old_subsec = now_subseg;
336
337 applicable = bfd_applicable_section_flags (stdoutput);
338
339 applicable &= SEC_ALLOC;
340
341 switch (area)
342 {
343 case AREA_SDA:
344 if (sbss_section == NULL)
345 {
346 sbss_section = subseg_new (".sbss", 0);
347
348 bfd_set_section_flags (stdoutput, sbss_section, applicable);
349
350 seg_info (sbss_section)->bss = 1;
351 }
352 break;
353
354 case AREA_ZDA:
355 if (zbss_section == NULL)
356 {
357 zbss_section = subseg_new (".zbss", 0);
358
359 bfd_set_section_flags (stdoutput, sbss_section, applicable);
360
361 seg_info (zbss_section)->bss = 1;
362 }
363 break;
364
365 case AREA_TDA:
366 if (tbss_section == NULL)
367 {
368 tbss_section = subseg_new (".tbss", 0);
369
370 bfd_set_section_flags (stdoutput, tbss_section, applicable);
371
372 seg_info (tbss_section)->bss = 1;
373 }
374 break;
375 }
376
377 if (temp)
378 {
379 /* convert to a power of 2 alignment */
380 for (align = 0; (temp & 1) == 0; temp >>= 1, ++align)
381 ;
382
383 if (temp != 1)
384 {
385 as_bad (_("Common alignment not a power of 2"));
386 ignore_rest_of_line ();
387 return;
388 }
389 }
390 else
391 align = 0;
392
393 switch (area)
394 {
395 case AREA_SDA:
396 record_alignment (sbss_section, align);
397 obj_elf_section_change_hook();
398 subseg_set (sbss_section, 0);
399 break;
400
401 case AREA_ZDA:
402 record_alignment (zbss_section, align);
403 obj_elf_section_change_hook();
404 subseg_set (zbss_section, 0);
405 break;
406
407 case AREA_TDA:
408 record_alignment (tbss_section, align);
409 obj_elf_section_change_hook();
410 subseg_set (tbss_section, 0);
411 break;
412
413 default:
414 abort();
415 }
416
417 if (align)
418 frag_align (align, 0, 0);
419
420 switch (area)
421 {
422 case AREA_SDA:
423 if (S_GET_SEGMENT (symbolP) == sbss_section)
7dcc9865 424 symbol_get_frag (symbolP)->fr_symbol = 0;
252b5132
RH
425 break;
426
427 case AREA_ZDA:
428 if (S_GET_SEGMENT (symbolP) == zbss_section)
7dcc9865 429 symbol_get_frag (symbolP)->fr_symbol = 0;
252b5132
RH
430 break;
431
432 case AREA_TDA:
433 if (S_GET_SEGMENT (symbolP) == tbss_section)
7dcc9865 434 symbol_get_frag (symbolP)->fr_symbol = 0;
252b5132
RH
435 break;
436
437 default:
cac58fa6 438 abort ();
252b5132
RH
439 }
440
7dcc9865 441 symbol_set_frag (symbolP, frag_now);
252b5132
RH
442 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP,
443 (offsetT) size, (char *) 0);
444 *pfrag = 0;
445 S_SET_SIZE (symbolP, size);
446
447 switch (area)
448 {
449 case AREA_SDA:
450 S_SET_SEGMENT (symbolP, sbss_section);
451 break;
452
453 case AREA_ZDA:
454 S_SET_SEGMENT (symbolP, zbss_section);
455 break;
456
457 case AREA_TDA:
458 S_SET_SEGMENT (symbolP, tbss_section);
459 break;
460
461 default:
462 abort();
463 }
464
465 S_CLEAR_EXTERNAL (symbolP);
466 obj_elf_section_change_hook();
467 subseg_set (old_sec, old_subsec);
468 }
469 else
470 {
471 allocate_common:
472 S_SET_VALUE (symbolP, (valueT) size);
473 S_SET_ALIGN (symbolP, temp);
474 S_SET_EXTERNAL (symbolP);
475
476 switch (area)
477 {
478 case AREA_SDA:
479 if (scommon_section == NULL)
480 {
481 flagword applicable;
482
483 applicable = bfd_applicable_section_flags (stdoutput);
484
485 scommon_section = subseg_new (".scommon", 0);
486
487 bfd_set_section_flags (stdoutput, scommon_section, applicable
488 & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA
489 | SEC_HAS_CONTENTS) | SEC_IS_COMMON);
490 }
491 S_SET_SEGMENT (symbolP, scommon_section);
492 break;
493
494 case AREA_ZDA:
495 if (zcommon_section == NULL)
496 {
497 flagword applicable;
498
499 applicable = bfd_applicable_section_flags (stdoutput);
500
501 zcommon_section = subseg_new (".zcommon", 0);
502
503 bfd_set_section_flags (stdoutput, zcommon_section, applicable
504 & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA
505 | SEC_HAS_CONTENTS) | SEC_IS_COMMON);
506 }
507 S_SET_SEGMENT (symbolP, zcommon_section);
508 break;
509
510 case AREA_TDA:
511 if (tcommon_section == NULL)
512 {
513 flagword applicable;
514
515 applicable = bfd_applicable_section_flags (stdoutput);
516
517 tcommon_section = subseg_new (".tcommon", 0);
518
519 bfd_set_section_flags (stdoutput, tcommon_section, applicable
520 & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA
521 | SEC_HAS_CONTENTS) | SEC_IS_COMMON);
522 }
523 S_SET_SEGMENT (symbolP, tcommon_section);
524 break;
525
526 default:
527 abort();
528 }
529 }
530 }
531 else
532 {
533 input_line_pointer++;
534 /* @@ Some use the dot, some don't. Can we get some consistency?? */
535 if (*input_line_pointer == '.')
536 input_line_pointer++;
537 /* @@ Some say data, some say bss. */
538 if (strncmp (input_line_pointer, "bss\"", 4)
539 && strncmp (input_line_pointer, "data\"", 5))
540 {
541 while (*--input_line_pointer != '"')
542 ;
543 input_line_pointer--;
544 goto bad_common_segment;
545 }
546 while (*input_line_pointer++ != '"')
547 ;
548 goto allocate_common;
549 }
550
fed9b18a 551 symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT;
252b5132
RH
552
553 demand_empty_rest_of_line ();
554 return;
555
556 {
557 bad_common_segment:
558 p = input_line_pointer;
559 while (*p && *p != '\n')
560 p++;
561 c = *p;
562 *p = '\0';
563 as_bad (_("bad .common segment %s"), input_line_pointer + 1);
564 *p = c;
565 input_line_pointer = p;
566 ignore_rest_of_line ();
567 return;
568 }
569}
570
571void
572set_machine (int number)
573{
574 machine = number;
575 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
576
577 switch (machine)
578 {
579 case 0: processor_mask = PROCESSOR_V850; break;
580 case bfd_mach_v850e: processor_mask = PROCESSOR_V850E; break;
581 case bfd_mach_v850ea: processor_mask = PROCESSOR_V850EA; break;
582 }
583}
584
585/* The target specific pseudo-ops which we support. */
586const pseudo_typeS md_pseudo_table[] =
587{
588 {"sdata", v850_sdata, 0},
589 {"tdata", v850_tdata, 0},
590 {"zdata", v850_zdata, 0},
591 {"sbss", v850_sbss, 0},
592 {"tbss", v850_tbss, 0},
593 {"zbss", v850_zbss, 0},
594 {"rosdata", v850_rosdata, 0},
595 {"rozdata", v850_rozdata, 0},
596 {"bss", v850_bss, 0},
597 {"offset", v850_offset, 0},
598 {"word", cons, 4},
599 {"zcomm", v850_comm, AREA_ZDA},
600 {"scomm", v850_comm, AREA_SDA},
601 {"tcomm", v850_comm, AREA_TDA},
602 {"v850", set_machine, 0},
603 {"call_table_data", v850_call_table_data, 0},
604 {"call_table_text", v850_call_table_text, 0},
605 {"v850e", set_machine, bfd_mach_v850e},
606 {"v850ea", set_machine, bfd_mach_v850ea},
607 { NULL, NULL, 0}
608};
609
610/* Opcode hash table. */
611static struct hash_control *v850_hash;
612
613/* This table is sorted. Suitable for searching by a binary search. */
614static const struct reg_name pre_defined_registers[] =
615{
616 { "ep", 30 }, /* ep - element ptr */
617 { "gp", 4 }, /* gp - global ptr */
618 { "hp", 2 }, /* hp - handler stack ptr */
619 { "lp", 31 }, /* lp - link ptr */
620 { "r0", 0 },
621 { "r1", 1 },
622 { "r10", 10 },
623 { "r11", 11 },
624 { "r12", 12 },
625 { "r13", 13 },
626 { "r14", 14 },
627 { "r15", 15 },
628 { "r16", 16 },
629 { "r17", 17 },
630 { "r18", 18 },
631 { "r19", 19 },
632 { "r2", 2 },
633 { "r20", 20 },
634 { "r21", 21 },
635 { "r22", 22 },
636 { "r23", 23 },
637 { "r24", 24 },
638 { "r25", 25 },
639 { "r26", 26 },
640 { "r27", 27 },
641 { "r28", 28 },
642 { "r29", 29 },
643 { "r3", 3 },
644 { "r30", 30 },
645 { "r31", 31 },
646 { "r4", 4 },
647 { "r5", 5 },
648 { "r6", 6 },
649 { "r7", 7 },
650 { "r8", 8 },
651 { "r9", 9 },
652 { "sp", 3 }, /* sp - stack ptr */
653 { "tp", 5 }, /* tp - text ptr */
654 { "zero", 0 },
655};
656#define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct reg_name))
657
658
659static const struct reg_name system_registers[] =
660{
661 { "ctbp", 20 },
662 { "ctpc", 16 },
663 { "ctpsw", 17 },
664 { "dbpc", 18 },
665 { "dbpsw", 19 },
666 { "ecr", 4 },
667 { "eipc", 0 },
668 { "eipsw", 1 },
669 { "fepc", 2 },
670 { "fepsw", 3 },
671 { "psw", 5 },
672};
673#define SYSREG_NAME_CNT (sizeof (system_registers) / sizeof (struct reg_name))
674
675static const struct reg_name system_list_registers[] =
676{
677 {"PS", 5 },
678 {"SR", 0 + 1}
679};
680#define SYSREGLIST_NAME_CNT (sizeof (system_list_registers) / sizeof (struct reg_name))
681
682static const struct reg_name cc_names[] =
683{
684 { "c", 0x1 },
685 { "e", 0x2 },
686 { "ge", 0xe },
687 { "gt", 0xf },
688 { "h", 0xb },
689 { "l", 0x1 },
690 { "le", 0x7 },
691 { "lt", 0x6 },
692 { "n", 0x4 },
693 { "nc", 0x9 },
694 { "ne", 0xa },
695 { "nh", 0x3 },
696 { "nl", 0x9 },
697 { "ns", 0xc },
698 { "nv", 0x8 },
699 { "nz", 0xa },
700 { "p", 0xc },
701 { "s", 0x4 },
702 { "sa", 0xd },
703 { "t", 0x5 },
704 { "v", 0x0 },
705 { "z", 0x2 },
706};
707#define CC_NAME_CNT (sizeof (cc_names) / sizeof (struct reg_name))
708
709/* reg_name_search does a binary search of the given register table
710 to see if "name" is a valid regiter name. Returns the register
711 number from the array on success, or -1 on failure. */
712
713static int
714reg_name_search (regs, regcount, name, accept_numbers)
715 const struct reg_name * regs;
716 int regcount;
717 const char * name;
718 boolean accept_numbers;
719{
720 int middle, low, high;
721 int cmp;
722 symbolS * symbolP;
723
724 /* If the register name is a symbol, then evaluate it. */
725 if ((symbolP = symbol_find (name)) != NULL)
726 {
727 /* If the symbol is an alias for another name then use that.
728 If the symbol is an alias for a number, then return the number. */
a77f5182 729 if (symbol_equated_p (symbolP))
252b5132 730 {
a77f5182 731 name = S_GET_NAME (symbol_get_value_expression (symbolP)->X_add_symbol);
252b5132
RH
732 }
733 else if (accept_numbers)
734 {
735 int reg = S_GET_VALUE (symbolP);
736
737 if (reg >= 0 && reg <= 31)
738 return reg;
739 }
740
741 /* Otherwise drop through and try parsing name normally. */
742 }
743
744 low = 0;
745 high = regcount - 1;
746
747 do
748 {
749 middle = (low + high) / 2;
750 cmp = strcasecmp (name, regs[middle].name);
751 if (cmp < 0)
752 high = middle - 1;
753 else if (cmp > 0)
754 low = middle + 1;
755 else
756 return regs[middle].value;
757 }
758 while (low <= high);
759 return -1;
760}
761
762
763/* Summary of register_name().
764 *
765 * in: Input_line_pointer points to 1st char of operand.
766 *
767 * out: A expressionS.
768 * The operand may have been a register: in this case, X_op == O_register,
769 * X_add_number is set to the register number, and truth is returned.
770 * Input_line_pointer->(next non-blank) char after operand, or is in
771 * its original state.
772 */
773static boolean
774register_name (expressionP)
775 expressionS * expressionP;
776{
777 int reg_number;
778 char * name;
779 char * start;
780 char c;
781
782 /* Find the spelling of the operand */
783 start = name = input_line_pointer;
784
785 c = get_symbol_end ();
786
787 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT,
788 name, FALSE);
789
790 * input_line_pointer = c; /* put back the delimiting char */
791
792 /* look to see if it's in the register table */
793 if (reg_number >= 0)
794 {
795 expressionP->X_op = O_register;
796 expressionP->X_add_number = reg_number;
797
798 /* make the rest nice */
799 expressionP->X_add_symbol = NULL;
800 expressionP->X_op_symbol = NULL;
801
802 return true;
803 }
804 else
805 {
806 /* reset the line as if we had not done anything */
807 input_line_pointer = start;
808
809 return false;
810 }
811}
812
813/* Summary of system_register_name().
814 *
815 * in: Input_line_pointer points to 1st char of operand.
816 * expressionP points to an expression structure to be filled in.
817 * accept_numbers is true iff numerical register names may be used.
818 * accept_list_names is true iff the special names PS and SR may be
819 * accepted.
820 *
821 * out: A expressionS structure in expressionP.
822 * The operand may have been a register: in this case, X_op == O_register,
823 * X_add_number is set to the register number, and truth is returned.
824 * Input_line_pointer->(next non-blank) char after operand, or is in
825 * its original state.
826 */
827static boolean
828system_register_name (expressionP, accept_numbers, accept_list_names)
829 expressionS * expressionP;
830 boolean accept_numbers;
831 boolean accept_list_names;
832{
833 int reg_number;
834 char * name;
835 char * start;
836 char c;
837
838 /* Find the spelling of the operand */
839 start = name = input_line_pointer;
840
841 c = get_symbol_end ();
842 reg_number = reg_name_search (system_registers, SYSREG_NAME_CNT, name,
843 accept_numbers);
844
845 * input_line_pointer = c; /* put back the delimiting char */
846
847 if (reg_number < 0
848 && accept_numbers)
849 {
850 input_line_pointer = start; /* reset input_line pointer */
851
852 if (isdigit (* input_line_pointer))
853 {
854 reg_number = strtol (input_line_pointer, & input_line_pointer, 10);
855
856 /* Make sure that the register number is allowable. */
857 if ( reg_number < 0
858 || reg_number > 5
859 && reg_number < 16
860 || reg_number > 20
861 )
862 {
863 reg_number = -1;
864 }
865 }
866 else if (accept_list_names)
867 {
868 c = get_symbol_end ();
869 reg_number = reg_name_search (system_list_registers,
870 SYSREGLIST_NAME_CNT, name, FALSE);
871
872 * input_line_pointer = c; /* put back the delimiting char */
873 }
874 }
875
876 /* look to see if it's in the register table */
877 if (reg_number >= 0)
878 {
879 expressionP->X_op = O_register;
880 expressionP->X_add_number = reg_number;
881
882 /* make the rest nice */
883 expressionP->X_add_symbol = NULL;
884 expressionP->X_op_symbol = NULL;
885
886 return true;
887 }
888 else
889 {
890 /* reset the line as if we had not done anything */
891 input_line_pointer = start;
892
893 return false;
894 }
895}
896
897/* Summary of cc_name().
898 *
899 * in: Input_line_pointer points to 1st char of operand.
900 *
901 * out: A expressionS.
902 * The operand may have been a register: in this case, X_op == O_register,
903 * X_add_number is set to the register number, and truth is returned.
904 * Input_line_pointer->(next non-blank) char after operand, or is in
905 * its original state.
906 */
907static boolean
908cc_name (expressionP)
909 expressionS * expressionP;
910{
911 int reg_number;
912 char * name;
913 char * start;
914 char c;
915
916 /* Find the spelling of the operand */
917 start = name = input_line_pointer;
918
919 c = get_symbol_end ();
920 reg_number = reg_name_search (cc_names, CC_NAME_CNT, name, FALSE);
921
922 * input_line_pointer = c; /* put back the delimiting char */
923
924 /* look to see if it's in the register table */
925 if (reg_number >= 0)
926 {
927 expressionP->X_op = O_constant;
928 expressionP->X_add_number = reg_number;
929
930 /* make the rest nice */
931 expressionP->X_add_symbol = NULL;
932 expressionP->X_op_symbol = NULL;
933
934 return true;
935 }
936 else
937 {
938 /* reset the line as if we had not done anything */
939 input_line_pointer = start;
940
941 return false;
942 }
943}
944
945static void
946skip_white_space (void)
947{
948 while ( * input_line_pointer == ' '
949 || * input_line_pointer == '\t')
950 ++ input_line_pointer;
951}
952
953/* Summary of parse_register_list ().
954 *
955 * in: Input_line_pointer points to 1st char of a list of registers.
956 * insn is the partially constructed instruction.
957 * operand is the operand being inserted.
958 *
959 * out: NULL if the parse completed successfully, otherwise a
960 * pointer to an error message is returned. If the parse
961 * completes the correct bit fields in the instruction
962 * will be filled in.
963 *
964 * Parses register lists with the syntax:
965 *
966 * { rX }
967 * { rX, rY }
968 * { rX - rY }
969 * { rX - rY, rZ }
970 * etc
971 *
972 * and also parses constant epxressions whoes bits indicate the
973 * registers in the lists. The LSB in the expression refers to
974 * the lowest numbered permissable register in the register list,
975 * and so on upwards. System registers are considered to be very
976 * high numbers.
977 *
978 */
979static char *
980parse_register_list
981(
982 unsigned long * insn,
983 const struct v850_operand * operand
984)
985{
986 static int type1_regs[ 32 ] = { 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 };
987 static int type2_regs[ 32 ] = { 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24 };
988 static int type3_regs[ 32 ] = { 3, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14, 15, 13, 12, 7, 6, 5, 4, 11, 10, 9, 8 };
989 int * regs;
990 expressionS exp;
991
992
993 /* Select a register array to parse. */
994 switch (operand->shift)
995 {
996 case 0xffe00001: regs = type1_regs; break;
997 case 0xfff8000f: regs = type2_regs; break;
998 case 0xfff8001f: regs = type3_regs; break;
999 default:
1000 as_bad (_("unknown operand shift: %x\n"), operand->shift);
1001 return _("internal failure in parse_register_list");
1002 }
1003
1004 skip_white_space ();
1005
1006 /* If the expression starts with a curly brace it is a register list.
1007 Otherwise it is a constant expression, whoes bits indicate which
1008 registers are to be included in the list. */
1009
1010 if (* input_line_pointer != '{')
1011 {
1012 int bits;
1013 int reg;
1014 int i;
1015
1016 expression (& exp);
1017
1018 if (exp.X_op != O_constant)
1019 return _("constant expression or register list expected");
1020
1021 if (regs == type1_regs)
1022 {
1023 if (exp.X_add_number & 0xFFFFF000)
1024 return _("high bits set in register list expression");
1025
1026 for (reg = 20; reg < 32; reg ++)
1027 if (exp.X_add_number & (1 << (reg - 20)))
1028 {
1029 for (i = 0; i < 32; i++)
1030 if (regs[i] == reg)
1031 * insn |= (1 << i);
1032 }
1033 }
1034 else if (regs == type2_regs)
1035 {
1036 if (exp.X_add_number & 0xFFFE0000)
1037 return _("high bits set in register list expression");
1038
1039 for (reg = 1; reg < 16; reg ++)
1040 if (exp.X_add_number & (1 << (reg - 1)))
1041 {
1042 for (i = 0; i < 32; i++)
1043 if (regs[i] == reg)
1044 * insn |= (1 << i);
1045 }
1046
1047 if (exp.X_add_number & (1 << 15))
1048 * insn |= (1 << 3);
1049
1050 if (exp.X_add_number & (1 << 16))
1051 * insn |= (1 << 19);
1052 }
1053 else /* regs == type3_regs */
1054 {
1055 if (exp.X_add_number & 0xFFFE0000)
1056 return _("high bits set in register list expression");
1057
1058 for (reg = 16; reg < 32; reg ++)
1059 if (exp.X_add_number & (1 << (reg - 16)))
1060 {
1061 for (i = 0; i < 32; i++)
1062 if (regs[i] == reg)
1063 * insn |= (1 << i);
1064 }
1065
1066 if (exp.X_add_number & (1 << 16))
1067 * insn |= (1 << 19);
1068 }
1069
1070 return NULL;
1071 }
1072
1073 input_line_pointer ++;
1074
1075 /* Parse the register list until a terminator (closing curly brace or
1076 new-line) is found. */
1077 for (;;)
1078 {
1079 if (register_name (& exp))
1080 {
1081 int i;
1082
1083 /* Locate the given register in the list, and if it is there,
1084 insert the corresponding bit into the instruction. */
1085 for (i = 0; i < 32; i++)
1086 {
1087 if (regs[ i ] == exp.X_add_number)
1088 {
1089 * insn |= (1 << i);
1090 break;
1091 }
1092 }
1093
1094 if (i == 32)
1095 {
1096 return _("illegal register included in list");
1097 }
1098 }
1099 else if (system_register_name (& exp, true, true))
1100 {
1101 if (regs == type1_regs)
1102 {
1103 return _("system registers cannot be included in list");
1104 }
1105 else if (exp.X_add_number == 5)
1106 {
1107 if (regs == type2_regs)
1108 return _("PSW cannot be included in list");
1109 else
1110 * insn |= 0x8;
1111 }
1112 else if (exp.X_add_number < 4)
1113 * insn |= 0x80000;
1114 else
1115 return _("High value system registers cannot be included in list");
1116 }
1117 else if (* input_line_pointer == '}')
1118 {
1119 input_line_pointer ++;
1120 break;
1121 }
1122 else if (* input_line_pointer == ',')
1123 {
1124 input_line_pointer ++;
1125 continue;
1126 }
1127 else if (* input_line_pointer == '-')
1128 {
1129 /* We have encountered a range of registers: rX - rY */
1130 int j;
1131 expressionS exp2;
1132
1133 /* Skip the dash. */
1134 ++ input_line_pointer;
1135
1136 /* Get the second register in the range. */
1137 if (! register_name (& exp2))
1138 {
1139 return _("second register should follow dash in register list");
1140 exp2.X_add_number = exp.X_add_number;
1141 }
1142
1143 /* Add the rest of the registers in the range. */
1144 for (j = exp.X_add_number + 1; j <= exp2.X_add_number; j++)
1145 {
1146 int i;
1147
1148 /* Locate the given register in the list, and if it is there,
1149 insert the corresponding bit into the instruction. */
1150 for (i = 0; i < 32; i++)
1151 {
1152 if (regs[ i ] == j)
1153 {
1154 * insn |= (1 << i);
1155 break;
1156 }
1157 }
1158
1159 if (i == 32)
1160 return _("illegal register included in list");
1161 }
1162 }
1163 else
1164 {
1165 break;
1166 }
1167
1168 skip_white_space ();
1169 }
1170
1171 return NULL;
1172}
1173
1174CONST char * md_shortopts = "m:";
1175
1176struct option md_longopts[] =
1177{
1178 {NULL, no_argument, NULL, 0}
1179};
1180size_t md_longopts_size = sizeof md_longopts;
1181
1182
1183void
1184md_show_usage (stream)
1185 FILE * stream;
1186{
1187 fprintf (stream, _(" V850 options:\n"));
1188 fprintf (stream, _(" -mwarn-signed-overflow Warn if signed immediate values overflow\n"));
1189 fprintf (stream, _(" -mwarn-unsigned-overflow Warn if unsigned immediate values overflow\n"));
1190 fprintf (stream, _(" -mv850 The code is targeted at the v850\n"));
1191 fprintf (stream, _(" -mv850e The code is targeted at the v850e\n"));
1192 fprintf (stream, _(" -mv850ea The code is targeted at the v850ea\n"));
1193 fprintf (stream, _(" -mv850any The code is generic, despite any processor specific instructions\n"));
1194}
1195
1196int
1197md_parse_option (c, arg)
1198 int c;
1199 char * arg;
1200{
1201 if (c != 'm')
1202 {
1203 /* xgettext:c-format */
1204 fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
1205 return 0;
1206 }
1207
1208 if (strcmp (arg, "warn-signed-overflow") == 0)
1209 {
1210 warn_signed_overflows = TRUE;
1211 }
1212 else if (strcmp (arg, "warn-unsigned-overflow") == 0)
1213 {
1214 warn_unsigned_overflows = TRUE;
1215 }
1216 else if (strcmp (arg, "v850") == 0)
1217 {
1218 machine = 0;
1219 processor_mask = PROCESSOR_V850;
1220 }
1221 else if (strcmp (arg, "v850e") == 0)
1222 {
1223 machine = bfd_mach_v850e;
1224 processor_mask = PROCESSOR_V850E;
1225 }
1226 else if (strcmp (arg, "v850ea") == 0)
1227 {
1228 machine = bfd_mach_v850ea;
1229 processor_mask = PROCESSOR_V850EA;
1230 }
1231 else if (strcmp (arg, "v850any") == 0)
1232 {
1233 machine = 0; /* Tell the world that this is for any v850 chip. */
1234 processor_mask = PROCESSOR_V850EA; /* But support instructions for the extended versions. */
1235 }
1236 else
1237 {
1238 /* xgettext:c-format */
1239 fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
1240 return 0;
1241 }
1242
1243 return 1;
1244}
1245
1246symbolS *
1247md_undefined_symbol (name)
1248 char * name;
1249{
1250 return 0;
1251}
1252
1253char *
1254md_atof (type, litp, sizep)
1255 int type;
1256 char * litp;
1257 int * sizep;
1258{
1259 int prec;
1260 LITTLENUM_TYPE words[4];
1261 char * t;
1262 int i;
1263
1264 switch (type)
1265 {
1266 case 'f':
1267 prec = 2;
1268 break;
1269
1270 case 'd':
1271 prec = 4;
1272 break;
1273
1274 default:
1275 *sizep = 0;
1276 return _("bad call to md_atof");
1277 }
1278
1279 t = atof_ieee (input_line_pointer, type, words);
1280 if (t)
1281 input_line_pointer = t;
1282
1283 *sizep = prec * 2;
1284
1285 for (i = prec - 1; i >= 0; i--)
1286 {
1287 md_number_to_chars (litp, (valueT) words[i], 2);
1288 litp += 2;
1289 }
1290
1291 return NULL;
1292}
1293
1294
1295/* Very gross. */
1296void
1297md_convert_frag (abfd, sec, fragP)
1298 bfd * abfd;
1299 asection * sec;
1300 fragS * fragP;
1301{
1302 subseg_change (sec, 0);
1303
1304 /* In range conditional or unconditional branch. */
1305 if (fragP->fr_subtype == 0 || fragP->fr_subtype == 2)
1306 {
1307 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
1308 fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode);
1309 fragP->fr_var = 0;
1310 fragP->fr_fix += 2;
1311 }
1312 /* Out of range conditional branch. Emit a branch around a jump. */
1313 else if (fragP->fr_subtype == 1)
1314 {
1315 unsigned char *buffer =
1316 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
1317
1318 /* Reverse the condition of the first branch. */
1319 buffer[0] ^= 0x08;
1320 /* Mask off all the displacement bits. */
1321 buffer[0] &= 0x8f;
1322 buffer[1] &= 0x07;
1323 /* Now set the displacement bits so that we branch
1324 around the unconditional branch. */
1325 buffer[0] |= 0x30;
1326
1327 /* Now create the unconditional branch + fixup to the final
1328 target. */
1329 md_number_to_chars (buffer + 2, 0x00000780, 4);
1330 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
1331 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1332 (int) fragP->fr_opcode + 1);
1333 fragP->fr_var = 0;
1334 fragP->fr_fix += 6;
1335 }
1336 /* Out of range unconditional branch. Emit a jump. */
1337 else if (fragP->fr_subtype == 3)
1338 {
1339 md_number_to_chars (fragP->fr_fix + fragP->fr_literal, 0x00000780, 4);
1340 fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,
1341 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1342 (int) fragP->fr_opcode + 1);
1343 fragP->fr_var = 0;
1344 fragP->fr_fix += 4;
1345 }
1346 else
1347 abort ();
1348}
1349
1350valueT
1351md_section_align (seg, addr)
1352 asection * seg;
1353 valueT addr;
1354{
1355 int align = bfd_get_section_alignment (stdoutput, seg);
1356 return ((addr + (1 << align) - 1) & (-1 << align));
1357}
1358
1359void
1360md_begin ()
1361{
1362 char * prev_name = "";
1363 register const struct v850_opcode * op;
1364 flagword applicable;
1365
1366 if (strncmp (TARGET_CPU, "v850ea", 6) == 0)
1367 {
1368 if (machine == -1)
1369 machine = bfd_mach_v850ea;
1370
1371 if (processor_mask == -1)
1372 processor_mask = PROCESSOR_V850EA;
1373 }
1374 else if (strncmp (TARGET_CPU, "v850e", 5) == 0)
1375 {
1376 if (machine == -1)
1377 machine = bfd_mach_v850e;
1378
1379 if (processor_mask == -1)
1380 processor_mask = PROCESSOR_V850E;
1381 }
1382 else
1383 if (strncmp (TARGET_CPU, "v850", 4) == 0)
1384 {
1385 if (machine == -1)
1386 machine = 0;
1387
1388 if (processor_mask == -1)
1389 processor_mask = PROCESSOR_V850;
1390 }
1391 else
1392 /* xgettext:c-format */
1393 as_bad (_("Unable to determine default target processor from string: %s"),
1394 TARGET_CPU);
1395
1396 v850_hash = hash_new();
1397
1398 /* Insert unique names into hash table. The V850 instruction set
1399 has many identical opcode names that have different opcodes based
1400 on the operands. This hash table then provides a quick index to
1401 the first opcode with a particular name in the opcode table. */
1402
1403 op = v850_opcodes;
1404 while (op->name)
1405 {
1406 if (strcmp (prev_name, op->name))
1407 {
1408 prev_name = (char *) op->name;
1409 hash_insert (v850_hash, op->name, (char *) op);
1410 }
1411 op++;
1412 }
1413
1414 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
1415
1416 applicable = bfd_applicable_section_flags (stdoutput);
1417
1418 call_table_data_section = subseg_new (".call_table_data", 0);
1419 bfd_set_section_flags (stdoutput, call_table_data_section,
1420 applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC
1421 | SEC_DATA | SEC_HAS_CONTENTS));
1422
1423 call_table_text_section = subseg_new (".call_table_text", 0);
1424 bfd_set_section_flags (stdoutput, call_table_text_section,
1425 applicable & (SEC_ALLOC | SEC_LOAD | SEC_READONLY
1426 | SEC_CODE));
1427
1428 /* Restore text section as the current default. */
1429 subseg_set (text_section, 0);
1430}
1431
1432
1433static bfd_reloc_code_real_type
1434handle_ctoff (const struct v850_operand * operand)
1435{
1436 if (operand == NULL)
1437 return BFD_RELOC_V850_CALLT_16_16_OFFSET;
1438
1439 if ( operand->bits != 6
1440 || operand->shift != 0)
1441 {
1442 as_bad (_("ctoff() relocation used on an instruction which does not support it"));
1443 return BFD_RELOC_64; /* Used to indicate an error condition. */
1444 }
1445
1446 return BFD_RELOC_V850_CALLT_6_7_OFFSET;
1447}
1448
1449static bfd_reloc_code_real_type
1450handle_sdaoff (const struct v850_operand * operand)
1451{
1452 if (operand == NULL) return BFD_RELOC_V850_SDA_16_16_OFFSET;
1453 if (operand->bits == 15 && operand->shift == 17) return BFD_RELOC_V850_SDA_15_16_OFFSET;
1454 if (operand->bits == -1) return BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET;
1455
1456 if ( operand->bits != 16
1457 || operand->shift != 16)
1458 {
1459 as_bad (_("sdaoff() relocation used on an instruction which does not support it"));
1460 return BFD_RELOC_64; /* Used to indicate an error condition. */
1461 }
1462
1463 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1464}
1465
1466static bfd_reloc_code_real_type
1467handle_zdaoff (const struct v850_operand * operand)
1468{
1469 if (operand == NULL) return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1470 if (operand->bits == 15 && operand->shift == 17) return BFD_RELOC_V850_ZDA_15_16_OFFSET;
1471 if (operand->bits == -1) return BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET;
1472
1473 if ( operand->bits != 16
1474 || operand->shift != 16)
1475 {
1476 as_bad (_("zdaoff() relocation used on an instruction which does not support it"));
1477 return BFD_RELOC_64; /* Used to indicate an error condition. */
1478 }
1479
1480 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1481}
1482
1483static bfd_reloc_code_real_type
1484handle_tdaoff (const struct v850_operand * operand)
1485{
1486 if (operand == NULL) return BFD_RELOC_V850_TDA_7_7_OFFSET; /* data item, not an instruction. */
1487 if (operand->bits == 6 && operand->shift == 1) return BFD_RELOC_V850_TDA_6_8_OFFSET; /* sld.w/sst.w, operand: D8_6 */
1488 if (operand->bits == 4 && operand->insert != NULL) return BFD_RELOC_V850_TDA_4_5_OFFSET; /* sld.hu, operand: D5-4 */
1489 if (operand->bits == 4 && operand->insert == NULL) return BFD_RELOC_V850_TDA_4_4_OFFSET; /* sld.bu, operand: D4 */
1490 if (operand->bits == 16 && operand->shift == 16) return BFD_RELOC_V850_TDA_16_16_OFFSET; /* set1 & chums, operands: D16 */
1491
1492 if (operand->bits != 7)
1493 {
1494 as_bad (_("tdaoff() relocation used on an instruction which does not support it"));
1495 return BFD_RELOC_64; /* Used to indicate an error condition. */
1496 }
1497
1498 return operand->insert != NULL
1499 ? BFD_RELOC_V850_TDA_7_8_OFFSET /* sld.h/sst.h, operand: D8_7 */
1500 : BFD_RELOC_V850_TDA_7_7_OFFSET; /* sld.b/sst.b, opreand: D7 */
1501}
1502
1503/* Warning: The code in this function relies upon the definitions
1504 in the v850_operands[] array (defined in opcodes/v850-opc.c)
1505 matching the hard coded values contained herein. */
1506
1507static bfd_reloc_code_real_type
1508v850_reloc_prefix (const struct v850_operand * operand)
1509{
1510 boolean paren_skipped = false;
1511
1512
1513 /* Skip leading opening parenthesis. */
1514 if (* input_line_pointer == '(')
1515 {
1516 ++ input_line_pointer;
1517 paren_skipped = true;
1518 }
1519
1520#define CHECK_(name, reloc) \
1521 if (strncmp (input_line_pointer, name##"(", strlen (name) + 1) == 0) \
1522 { \
1523 input_line_pointer += strlen (name); \
1524 return reloc; \
1525 }
1526
1527 CHECK_ ("hi0", BFD_RELOC_HI16);
1528 CHECK_ ("hi", BFD_RELOC_HI16_S);
1529 CHECK_ ("lo", BFD_RELOC_LO16);
1530 CHECK_ ("sdaoff", handle_sdaoff (operand));
1531 CHECK_ ("zdaoff", handle_zdaoff (operand));
1532 CHECK_ ("tdaoff", handle_tdaoff (operand));
1533 CHECK_ ("hilo", BFD_RELOC_32);
1534 CHECK_ ("ctoff", handle_ctoff (operand));
1535
1536 /* Restore skipped parenthesis. */
1537 if (paren_skipped)
1538 -- input_line_pointer;
1539
1540 return BFD_RELOC_UNUSED;
1541}
1542
1543/* Insert an operand value into an instruction. */
1544
1545static unsigned long
1546v850_insert_operand (insn, operand, val, file, line, str)
1547 unsigned long insn;
1548 const struct v850_operand * operand;
1549 offsetT val;
1550 char * file;
1551 unsigned int line;
1552 char * str;
1553{
1554 if (operand->insert)
1555 {
1556 const char * message = NULL;
1557
1558 insn = operand->insert (insn, val, & message);
1559 if (message != NULL)
1560 {
1561 if ((operand->flags & V850_OPERAND_SIGNED)
1562 && ! warn_signed_overflows
1563 && strstr (message, "out of range") != NULL)
1564 {
1565 /* skip warning... */
1566 }
1567 else if ((operand->flags & V850_OPERAND_SIGNED) == 0
1568 && ! warn_unsigned_overflows
1569 && strstr (message, "out of range") != NULL)
1570 {
1571 /* skip warning... */
1572 }
1573 else if (str)
1574 {
1575 if (file == (char *) NULL)
1576 as_warn ("%s: %s", str, message);
1577 else
1578 as_warn_where (file, line, "%s: %s", str, message);
1579 }
1580 else
1581 {
1582 if (file == (char *) NULL)
1583 as_warn (message);
1584 else
1585 as_warn_where (file, line, message);
1586 }
1587 }
1588 }
1589 else
1590 {
1591 if (operand->bits != 32)
1592 {
1593 long min, max;
1594 offsetT test;
1595
1596 if ((operand->flags & V850_OPERAND_SIGNED) != 0)
1597 {
1598 if (! warn_signed_overflows)
1599 max = (1 << operand->bits) - 1;
1600 else
1601 max = (1 << (operand->bits - 1)) - 1;
1602
1603 min = - (1 << (operand->bits - 1));
1604 }
1605 else
1606 {
1607 max = (1 << operand->bits) - 1;
1608
1609 if (! warn_unsigned_overflows)
1610 min = - (1 << (operand->bits - 1));
1611 else
1612 min = 0;
1613 }
1614
1615 if (val < (offsetT) min || val > (offsetT) max)
1616 {
1617 /* xgettext:c-format */
1618 const char * err = _("operand out of range (%s not between %ld and %ld)");
1619 char buf[100];
1620
1621 /* Restore min and mix to expected values for decimal ranges. */
1622 if ((operand->flags & V850_OPERAND_SIGNED)
1623 && ! warn_signed_overflows)
1624 max = (1 << (operand->bits - 1)) - 1;
1625
1626 if (! (operand->flags & V850_OPERAND_SIGNED)
1627 && ! warn_unsigned_overflows)
1628 min = 0;
1629
1630 if (str)
1631 {
1632 sprintf (buf, "%s: ", str);
1633
1634 sprint_value (buf + strlen (buf), val);
1635 }
1636 else
1637 sprint_value (buf, val);
1638
1639 if (file == (char *) NULL)
1640 as_warn (err, buf, min, max);
1641 else
1642 as_warn_where (file, line, err, buf, min, max);
1643 }
1644 }
1645
1646 insn |= (((long) val & ((1 << operand->bits) - 1)) << operand->shift);
1647 }
1648
1649 return insn;
1650}
1651
1652\f
1653static char copy_of_instruction [128];
1654
1655void
1656md_assemble (str)
1657 char * str;
1658{
1659 char * s;
1660 char * start_of_operands;
1661 struct v850_opcode * opcode;
1662 struct v850_opcode * next_opcode;
1663 const unsigned char * opindex_ptr;
1664 int next_opindex;
1665 int relaxable;
1666 unsigned long insn;
1667 unsigned long insn_size;
1668 char * f;
1669 int i;
1670 int match;
1671 boolean extra_data_after_insn = false;
1672 unsigned extra_data_len;
1673 unsigned long extra_data;
1674 char * saved_input_line_pointer;
1675
1676
1677 strncpy (copy_of_instruction, str, sizeof (copy_of_instruction) - 1);
1678
1679 /* Get the opcode. */
1680 for (s = str; *s != '\0' && ! isspace (*s); s++)
1681 continue;
1682
1683 if (*s != '\0')
1684 *s++ = '\0';
1685
1686 /* find the first opcode with the proper name */
1687 opcode = (struct v850_opcode *) hash_find (v850_hash, str);
1688 if (opcode == NULL)
1689 {
1690 /* xgettext:c-format */
1691 as_bad (_("Unrecognized opcode: `%s'"), str);
1692 ignore_rest_of_line ();
1693 return;
1694 }
1695
1696 str = s;
1697 while (isspace (* str))
1698 ++ str;
1699
1700 start_of_operands = str;
1701
1702 saved_input_line_pointer = input_line_pointer;
1703
1704 for (;;)
1705 {
1706 const char * errmsg = NULL;
1707
1708 match = 0;
1709
1710 if ((opcode->processors & processor_mask) == 0)
1711 {
1712 errmsg = _("Target processor does not support this instruction.");
1713 goto error;
1714 }
1715
1716 relaxable = 0;
1717 fc = 0;
1718 next_opindex = 0;
1719 insn = opcode->opcode;
1720 extra_data_after_insn = false;
1721
1722 input_line_pointer = str = start_of_operands;
1723
1724 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr ++)
1725 {
1726 const struct v850_operand * operand;
1727 char * hold;
1728 expressionS ex;
1729 bfd_reloc_code_real_type reloc;
1730
1731 if (next_opindex == 0)
1732 {
1733 operand = & v850_operands[ * opindex_ptr ];
1734 }
1735 else
1736 {
1737 operand = & v850_operands[ next_opindex ];
1738 next_opindex = 0;
1739 }
1740
1741 errmsg = NULL;
1742
1743 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
1744 ++ str;
1745
1746 if (operand->flags & V850_OPERAND_RELAX)
1747 relaxable = 1;
1748
1749 /* Gather the operand. */
1750 hold = input_line_pointer;
1751 input_line_pointer = str;
1752
1753 /* lo(), hi(), hi0(), etc... */
1754 if ((reloc = v850_reloc_prefix (operand)) != BFD_RELOC_UNUSED)
1755 {
1756 /* This is a fake reloc, used to indicate an error condition. */
1757 if (reloc == BFD_RELOC_64)
1758 {
1759 match = 1;
1760 goto error;
1761 }
1762
1763 expression (& ex);
1764
1765 if (ex.X_op == O_constant)
1766 {
1767 switch (reloc)
1768 {
1769 case BFD_RELOC_V850_ZDA_16_16_OFFSET:
1770 /* To cope with "not1 7, zdaoff(0xfffff006)[r0]"
1771 and the like. */
1772 /* Fall through. */
1773
1774 case BFD_RELOC_LO16:
1775 {
1776 /* Truncate, then sign extend the value. */
1777 ex.X_add_number = SEXT16 (ex.X_add_number);
1778 break;
1779 }
1780
1781 case BFD_RELOC_HI16:
1782 {
1783 /* Truncate, then sign extend the value. */
1784 ex.X_add_number = SEXT16 (ex.X_add_number >> 16);
1785 break;
1786 }
1787
1788 case BFD_RELOC_HI16_S:
1789 {
1790 /* Truncate, then sign extend the value. */
1791 int temp = (ex.X_add_number >> 16) & 0xffff;
1792
1793 temp += (ex.X_add_number >> 15) & 1;
1794
1795 ex.X_add_number = SEXT16 (temp);
1796 break;
1797 }
1798
1799 case BFD_RELOC_32:
1800 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1801 {
1802 errmsg = _("immediate operand is too large");
1803 goto error;
1804 }
1805
1806 extra_data_after_insn = true;
1807 extra_data_len = 4;
1808 extra_data = ex.X_add_number;
1809 ex.X_add_number = 0;
1810 break;
1811
1812 default:
1813 fprintf (stderr, "reloc: %d\n", reloc);
1814 as_bad (_("AAARG -> unhandled constant reloc"));
1815 break;
1816 }
1817
1818 if (fc > MAX_INSN_FIXUPS)
1819 as_fatal (_("too many fixups"));
1820
1821 fixups[ fc ].exp = ex;
1822 fixups[ fc ].opindex = * opindex_ptr;
1823 fixups[ fc ].reloc = reloc;
1824 fc++;
1825 }
1826 else
1827 {
1828 if (reloc == BFD_RELOC_32)
1829 {
1830 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1831 {
1832 errmsg = _("immediate operand is too large");
1833 goto error;
1834 }
1835
1836 extra_data_after_insn = true;
1837 extra_data_len = 4;
1838 extra_data = ex.X_add_number;
1839 }
1840
1841 if (fc > MAX_INSN_FIXUPS)
1842 as_fatal (_("too many fixups"));
1843
1844 fixups[ fc ].exp = ex;
1845 fixups[ fc ].opindex = * opindex_ptr;
1846 fixups[ fc ].reloc = reloc;
1847 fc++;
1848 }
1849 }
1850 else
1851 {
1852 errmsg = NULL;
1853
1854 if ((operand->flags & V850_OPERAND_REG) != 0)
1855 {
1856 if (!register_name (& ex))
1857 {
1858 errmsg = _("invalid register name");
1859 }
1860 else if ((operand->flags & V850_NOT_R0)
1861 && ex.X_add_number == 0)
1862 {
1863 errmsg = _("register r0 cannot be used here");
1864
1865 /* Force an error message to be generated by
1866 skipping over any following potential matches
1867 for this opcode. */
1868 opcode += 3;
1869 }
1870 }
1871 else if ((operand->flags & V850_OPERAND_SRG) != 0)
1872 {
1873 if (!system_register_name (& ex, true, false))
1874 {
1875 errmsg = _("invalid system register name");
1876 }
1877 }
1878 else if ((operand->flags & V850_OPERAND_EP) != 0)
1879 {
1880 char * start = input_line_pointer;
1881 char c = get_symbol_end ();
1882
1883 if (strcmp (start, "ep") != 0 && strcmp (start, "r30") != 0)
1884 {
1885 /* Put things back the way we found them. */
1886 *input_line_pointer = c;
1887 input_line_pointer = start;
1888 errmsg = _("expected EP register");
1889 goto error;
1890 }
1891
1892 *input_line_pointer = c;
1893 str = input_line_pointer;
1894 input_line_pointer = hold;
1895
1896 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
1897 ++ str;
1898 continue;
1899 }
1900 else if ((operand->flags & V850_OPERAND_CC) != 0)
1901 {
1902 if (!cc_name (& ex))
1903 {
1904 errmsg = _("invalid condition code name");
1905 }
1906 }
1907 else if (operand->flags & V850E_PUSH_POP)
1908 {
1909 errmsg = parse_register_list (& insn, operand);
1910
1911 /* The parse_register_list() function has already done
1912 everything, so fake a dummy expression. */
1913 ex.X_op = O_constant;
1914 ex.X_add_number = 0;
1915 }
1916 else if (operand->flags & V850E_IMMEDIATE16)
1917 {
1918 expression (& ex);
1919
1920 if (ex.X_op != O_constant)
1921 errmsg = _("constant expression expected");
1922 else if (ex.X_add_number & 0xffff0000)
1923 {
1924 if (ex.X_add_number & 0xffff)
1925 errmsg = _("constant too big to fit into instruction");
1926 else if ((insn & 0x001fffc0) == 0x00130780)
1927 ex.X_add_number >>= 16;
1928 else
1929 errmsg = _("constant too big to fit into instruction");
1930 }
1931
1932 extra_data_after_insn = true;
1933 extra_data_len = 2;
1934 extra_data = ex.X_add_number;
1935 ex.X_add_number = 0;
1936 }
1937 else if (operand->flags & V850E_IMMEDIATE32)
1938 {
1939 expression (& ex);
1940
1941 if (ex.X_op != O_constant)
1942 errmsg = _("constant expression expected");
1943
1944 extra_data_after_insn = true;
1945 extra_data_len = 4;
1946 extra_data = ex.X_add_number;
1947 ex.X_add_number = 0;
1948 }
1949 else if (register_name (& ex)
1950 && (operand->flags & V850_OPERAND_REG) == 0)
1951 {
1952 char c;
1953 int exists = 0;
1954
1955 /* It is possible that an alias has been defined that
1956 matches a register name. For example the code may
1957 include a ".set ZERO, 0" directive, which matches
1958 the register name "zero". Attempt to reparse the
1959 field as an expression, and only complain if we
1960 cannot generate a constant. */
1961
1962 input_line_pointer = str;
1963
1964 c = get_symbol_end ();
1965
1966 if (symbol_find (str) != NULL)
1967 exists = 1;
1968
1969 * input_line_pointer = c;
1970 input_line_pointer = str;
1971
1972 expression (& ex);
1973
1974 if (ex.X_op != O_constant)
1975 {
1976 /* If this register is actually occuring too early on
1977 the parsing of the instruction, (because another
1978 field is missing) then report this. */
1979 if (opindex_ptr[1] != 0
1980 && (v850_operands [opindex_ptr [1]].flags & V850_OPERAND_REG))
1981 errmsg = _("syntax error: value is missing before the register name");
1982 else
1983 errmsg = _("syntax error: register not expected");
1984
1985 /* If we created a symbol in the process of this test then
1986 delete it now, so that it will not be output with the real
1987 symbols... */
1988 if (exists == 0
1989 && ex.X_op == O_symbol)
1990 symbol_remove (ex.X_add_symbol,
1991 & symbol_rootP, & symbol_lastP);
1992 }
1993 }
1994 else if (system_register_name (& ex, false, false)
1995 && (operand->flags & V850_OPERAND_SRG) == 0)
1996 {
1997 errmsg = _("syntax error: system register not expected");
1998 }
1999 else if (cc_name (&ex)
2000 && (operand->flags & V850_OPERAND_CC) == 0)
2001 {
2002 errmsg = _("syntax error: condition code not expected");
2003 }
2004 else
2005 {
2006 expression (& ex);
2007 /* Special case:
2008 If we are assembling a MOV instruction (or a CALLT.... :-)
2009 and the immediate value does not fit into the bits
2010 available then create a fake error so that the next MOV
2011 instruction will be selected. This one has a 32 bit
2012 immediate field. */
2013
2014 if (((insn & 0x07e0) == 0x0200)
2015 && ex.X_op == O_constant
2016 && (ex.X_add_number < (- (1 << (operand->bits - 1)))
2017 || ex.X_add_number > ((1 << operand->bits) - 1)))
2018 errmsg = _("immediate operand is too large");
2019 }
2020
2021 if (errmsg)
2022 goto error;
2023
2024/* fprintf (stderr, " insn: %x, operand %d, op: %d, add_number: %d\n",
2025 insn, opindex_ptr - opcode->operands, ex.X_op, ex.X_add_number); */
2026
2027 switch (ex.X_op)
2028 {
2029 case O_illegal:
2030 errmsg = _("illegal operand");
2031 goto error;
2032 case O_absent:
2033 errmsg = _("missing operand");
2034 goto error;
2035 case O_register:
2036 if ((operand->flags & (V850_OPERAND_REG | V850_OPERAND_SRG)) == 0)
2037 {
2038 errmsg = _("invalid operand");
2039 goto error;
2040 }
2041 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2042 (char *) NULL, 0,
2043 copy_of_instruction);
2044 break;
2045
2046 case O_constant:
2047 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2048 (char *) NULL, 0,
2049 copy_of_instruction);
2050 break;
2051
2052 default:
2053 /* We need to generate a fixup for this expression. */
2054 if (fc >= MAX_INSN_FIXUPS)
2055 as_fatal (_("too many fixups"));
2056
2057 fixups[ fc ].exp = ex;
2058 fixups[ fc ].opindex = * opindex_ptr;
2059 fixups[ fc ].reloc = BFD_RELOC_UNUSED;
2060 ++fc;
2061 break;
2062 }
2063 }
2064
2065 str = input_line_pointer;
2066 input_line_pointer = hold;
2067
2068 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']'
2069 || *str == ')')
2070 ++str;
2071 }
2072 match = 1;
2073
2074 error:
2075 if (match == 0)
2076 {
2077 next_opcode = opcode + 1;
2078 if (next_opcode->name != NULL
2079 && strcmp (next_opcode->name, opcode->name) == 0)
2080 {
2081 opcode = next_opcode;
2082
2083 /* Skip versions that are not supported by the target
2084 processor. */
2085 if ((opcode->processors & processor_mask) == 0)
2086 goto error;
2087
2088 continue;
2089 }
2090
2091 as_bad ("%s: %s", copy_of_instruction, errmsg);
2092
2093 if (* input_line_pointer == ']')
2094 ++ input_line_pointer;
2095
2096 ignore_rest_of_line ();
2097 input_line_pointer = saved_input_line_pointer;
2098 return;
2099 }
2100 break;
2101 }
2102
2103 while (isspace (*str))
2104 ++str;
2105
2106 if (*str != '\0')
2107 /* xgettext:c-format */
2108 as_bad (_("junk at end of line: `%s'"), str);
2109
2110 input_line_pointer = str;
2111
2112 /* Write out the instruction. */
2113
2114 if (relaxable && fc > 0)
2115 {
2116 insn_size = 2;
2117 fc = 0;
2118
2119 if (!strcmp (opcode->name, "br"))
2120 {
2121 f = frag_var (rs_machine_dependent, 4, 2, 2,
2122 fixups[0].exp.X_add_symbol,
2123 fixups[0].exp.X_add_number,
2124 (char *)fixups[0].opindex);
2125 md_number_to_chars (f, insn, insn_size);
2126 md_number_to_chars (f + 2, 0, 2);
2127 }
2128 else
2129 {
2130 f = frag_var (rs_machine_dependent, 6, 4, 0,
2131 fixups[0].exp.X_add_symbol,
2132 fixups[0].exp.X_add_number,
2133 (char *)fixups[0].opindex);
2134 md_number_to_chars (f, insn, insn_size);
2135 md_number_to_chars (f + 2, 0, 4);
2136 }
2137 }
2138 else
2139 {
2140 /* Four byte insns have an opcode with the two high bits on. */
2141 if ((insn & 0x0600) == 0x0600)
2142 insn_size = 4;
2143 else
2144 insn_size = 2;
2145
2146 /* Special case: 32 bit MOV */
2147 if ((insn & 0xffe0) == 0x0620)
2148 insn_size = 2;
2149
2150 f = frag_more (insn_size);
2151
2152 md_number_to_chars (f, insn, insn_size);
2153
2154 if (extra_data_after_insn)
2155 {
2156 f = frag_more (extra_data_len);
2157
2158 md_number_to_chars (f, extra_data, extra_data_len);
2159
2160 extra_data_after_insn = false;
2161 }
2162 }
2163
2164 /* Create any fixups. At this point we do not use a
2165 bfd_reloc_code_real_type, but instead just use the
2166 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2167 handle fixups for any operand type, although that is admittedly
2168 not a very exciting feature. We pick a BFD reloc type in
2169 md_apply_fix. */
2170 for (i = 0; i < fc; i++)
2171 {
2172 const struct v850_operand * operand;
2173 bfd_reloc_code_real_type reloc;
2174
2175 operand = & v850_operands[ fixups[i].opindex ];
2176
2177 reloc = fixups[i].reloc;
2178
2179 if (reloc != BFD_RELOC_UNUSED)
2180 {
2181 reloc_howto_type * reloc_howto = bfd_reloc_type_lookup (stdoutput,
2182 reloc);
2183 int size;
2184 int address;
2185 fixS * fixP;
2186
2187 if (!reloc_howto)
2188 abort();
2189
2190 size = bfd_get_reloc_size (reloc_howto);
2191
2192 /* XXX This will abort on an R_V850_8 reloc -
2193 is this reloc actually used ? */
2194 if (size != 2 && size != 4)
2195 abort ();
2196
2197 address = (f - frag_now->fr_literal) + insn_size - size;
2198
2199 if (reloc == BFD_RELOC_32)
2200 {
2201 address += 2;
2202 }
2203
2204 fixP = fix_new_exp (frag_now, address, size,
2205 & fixups[i].exp,
2206 reloc_howto->pc_relative,
2207 reloc);
2208
2209 switch (reloc)
2210 {
2211 case BFD_RELOC_LO16:
2212 case BFD_RELOC_HI16:
2213 case BFD_RELOC_HI16_S:
2214 fixP->fx_no_overflow = 1;
2215 break;
2216 }
2217 }
2218 else
2219 {
2220 fix_new_exp (
2221 frag_now,
2222 f - frag_now->fr_literal, 4,
2223 & fixups[i].exp,
2224 1 /* FIXME: V850_OPERAND_RELATIVE ??? */,
2225 (bfd_reloc_code_real_type) (fixups[i].opindex
2226 + (int) BFD_RELOC_UNUSED)
2227 );
2228 }
2229 }
2230
2231 input_line_pointer = saved_input_line_pointer;
2232}
2233
2234
2235/* If while processing a fixup, a reloc really needs to be created */
2236/* then it is done here. */
2237
2238arelent *
2239tc_gen_reloc (seg, fixp)
2240 asection * seg;
2241 fixS * fixp;
2242{
2243 arelent * reloc;
2244
2245 reloc = (arelent *) xmalloc (sizeof (arelent));
310b5aa2
ILT
2246 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
2247 *reloc->sym_ptr_ptr= symbol_get_bfdsym (fixp->fx_addsy);
252b5132
RH
2248 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2249 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
2250
2251 if (reloc->howto == (reloc_howto_type *) NULL)
2252 {
2253 as_bad_where (fixp->fx_file, fixp->fx_line,
2254 /* xgettext:c-format */
2255 _("reloc %d not supported by object file format"),
2256 (int) fixp->fx_r_type);
2257
2258 xfree (reloc);
2259
2260 return NULL;
2261 }
2262
d6c497c7 2263 if ( fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY
252b5132
RH
2264 || fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT)
2265 reloc->addend = fixp->fx_offset;
2266 else
2267 reloc->addend = fixp->fx_addnumber;
2268
2269 return reloc;
2270}
2271
2272/* Assume everything will fit in two bytes, then expand as necessary. */
2273int
2274md_estimate_size_before_relax (fragp, seg)
2275 fragS * fragp;
2276 asection * seg;
2277{
2278 if (fragp->fr_subtype == 0)
2279 fragp->fr_var = 4;
2280 else if (fragp->fr_subtype == 2)
2281 fragp->fr_var = 2;
2282 else
2283 abort ();
2284 return 2;
2285}
2286
2287long
2288v850_pcrel_from_section (fixp, section)
2289 fixS * fixp;
2290 segT section;
2291{
2292 /* If the symbol is undefined, or in a section other than our own,
d6c497c7 2293 or it is weak (in which case it may well be in another section,
252b5132
RH
2294 then let the linker figure it out. */
2295 if (fixp->fx_addsy != (symbolS *) NULL
2296 && (! S_IS_DEFINED (fixp->fx_addsy)
d6c497c7 2297 || S_IS_WEAK (fixp->fx_addsy)
252b5132 2298 || (S_GET_SEGMENT (fixp->fx_addsy) != section)))
d6c497c7
NC
2299 return 0;
2300
252b5132
RH
2301 return fixp->fx_frag->fr_address + fixp->fx_where;
2302}
2303
2304int
2305md_apply_fix3 (fixp, valuep, seg)
2306 fixS * fixp;
2307 valueT * valuep;
2308 segT seg;
2309{
2310 valueT value;
2311 char * where;
2312
d6c497c7 2313 if ( fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
252b5132
RH
2314 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2315 {
2316 fixp->fx_done = 0;
2317 return 1;
2318 }
2319
2320 if (fixp->fx_addsy == (symbolS *) NULL)
2321 {
2322 value = * valuep;
2323 fixp->fx_done = 1;
2324 }
2325 else if (fixp->fx_pcrel)
2326 value = * valuep;
2327 else
2328 {
2329 value = fixp->fx_offset;
2330 if (fixp->fx_subsy != (symbolS *) NULL)
2331 {
2332 if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
2333 value -= S_GET_VALUE (fixp->fx_subsy);
2334 else
2335 {
2336 /* We don't actually support subtracting a symbol. */
2337 as_bad_where (fixp->fx_file, fixp->fx_line,
2338 _("expression too complex"));
2339 }
2340 }
2341 }
2342
2343 if ((int) fixp->fx_r_type >= (int) BFD_RELOC_UNUSED)
2344 {
2345 int opindex;
2346 const struct v850_operand * operand;
2347 unsigned long insn;
2348
2349 opindex = (int) fixp->fx_r_type - (int) BFD_RELOC_UNUSED;
2350 operand = & v850_operands[ opindex ];
2351
2352 /* Fetch the instruction, insert the fully resolved operand
2353 value, and stuff the instruction back again.
2354
2355 Note the instruction has been stored in little endian
2356 format! */
2357 where = fixp->fx_frag->fr_literal + fixp->fx_where;
2358
2359 insn = bfd_getl32 ((unsigned char *) where);
2360 insn = v850_insert_operand (insn, operand, (offsetT) value,
2361 fixp->fx_file, fixp->fx_line, NULL);
2362 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
2363
2364 if (fixp->fx_done)
2365 {
2366 /* Nothing else to do here. */
2367 return 1;
2368 }
2369
2370 /* Determine a BFD reloc value based on the operand information.
2371 We are only prepared to turn a few of the operands into relocs. */
2372
2373 if (operand->bits == 22)
2374 fixp->fx_r_type = BFD_RELOC_V850_22_PCREL;
2375 else if (operand->bits == 9)
2376 fixp->fx_r_type = BFD_RELOC_V850_9_PCREL;
2377 else
2378 {
2379 /* fprintf (stderr, "bits: %d, insn: %x\n", operand->bits, insn); */
2380
2381 as_bad_where (fixp->fx_file, fixp->fx_line,
2382 _("unresolved expression that must be resolved"));
2383 fixp->fx_done = 1;
2384 return 1;
2385 }
2386 }
2387 else if (fixp->fx_done)
2388 {
2389 /* We still have to insert the value into memory! */
2390 where = fixp->fx_frag->fr_literal + fixp->fx_where;
2391
2392 if (fixp->fx_size == 1)
2393 * where = value & 0xff;
2394 else if (fixp->fx_size == 2)
2395 bfd_putl16 (value & 0xffff, (unsigned char *) where);
2396 else if (fixp->fx_size == 4)
2397 bfd_putl32 (value, (unsigned char *) where);
2398 }
2399
2400 fixp->fx_addnumber = value;
2401 return 1;
2402}
2403
2404\f
2405/* Parse a cons expression. We have to handle hi(), lo(), etc
2406 on the v850. */
2407void
2408parse_cons_expression_v850 (exp)
d6c497c7 2409 expressionS * exp;
252b5132
RH
2410{
2411 /* See if there's a reloc prefix like hi() we have to handle. */
2412 hold_cons_reloc = v850_reloc_prefix (NULL);
2413
2414 /* Do normal expression parsing. */
2415 expression (exp);
2416}
2417
2418/* Create a fixup for a cons expression. If parse_cons_expression_v850
2419 found a reloc prefix, then we use that reloc, else we choose an
2420 appropriate one based on the size of the expression. */
2421void
2422cons_fix_new_v850 (frag, where, size, exp)
d6c497c7 2423 fragS * frag;
252b5132
RH
2424 int where;
2425 int size;
2426 expressionS *exp;
2427{
2428 if (hold_cons_reloc == BFD_RELOC_UNUSED)
2429 {
2430 if (size == 4)
2431 hold_cons_reloc = BFD_RELOC_32;
2432 if (size == 2)
2433 hold_cons_reloc = BFD_RELOC_16;
2434 if (size == 1)
2435 hold_cons_reloc = BFD_RELOC_8;
2436 }
2437
2438 if (exp != NULL)
2439 fix_new_exp (frag, where, size, exp, 0, hold_cons_reloc);
2440 else
2441 fix_new (frag, where, size, NULL, 0, 0, hold_cons_reloc);
2442}
d6c497c7 2443
252b5132
RH
2444boolean
2445v850_fix_adjustable (fixP)
d6c497c7 2446 fixS * fixP;
252b5132 2447{
252b5132
RH
2448 if (fixP->fx_addsy == NULL)
2449 return 1;
2450
2451 /* Prevent all adjustments to global symbols. */
2452 if (S_IS_EXTERN (fixP->fx_addsy))
2453 return 0;
d6c497c7 2454
252b5132
RH
2455 if (S_IS_WEAK (fixP->fx_addsy))
2456 return 0;
d6c497c7 2457
252b5132
RH
2458 /* Don't adjust function names */
2459 if (S_IS_FUNCTION (fixP->fx_addsy))
2460 return 0;
2461
2462 /* We need the symbol name for the VTABLE entries */
d6c497c7 2463 if ( fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
252b5132
RH
2464 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2465 return 0;
d6c497c7 2466
252b5132
RH
2467 return 1;
2468}
2469
2470int
d6c497c7
NC
2471v850_force_relocation (fixP)
2472 struct fix * fixP;
252b5132 2473{
d6c497c7
NC
2474 if (fixP->fx_addsy && S_IS_WEAK (fixP->fx_addsy))
2475 return 1;
2476
2477 if ( fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2478 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
252b5132
RH
2479 return 1;
2480
2481 return 0;
2482}
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