Apply Nick Clifton's suggestion.
[deliverable/binutils-gdb.git] / gas / config / tc-v850.c
CommitLineData
252b5132 1/* tc-v850.c -- Assembler code for the NEC V850
310b5aa2 2 Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation.
252b5132
RH
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21#include <stdio.h>
22#include <ctype.h>
23#include "as.h"
28e4f854 24#include "subsegs.h"
252b5132
RH
25#include "opcode/v850.h"
26
27#define AREA_ZDA 0
28#define AREA_SDA 1
29#define AREA_TDA 2
30
28e4f854
KH
31/* Sign-extend a 16-bit number. */
32#define SEXT16(x) ((((x) & 0xffff) ^ (~0x7fff)) + 0x8000)
252b5132
RH
33
34/* Temporarily holds the reloc in a cons expression. */
35static bfd_reloc_code_real_type hold_cons_reloc;
36
37/* Set to TRUE if we want to be pedantic about signed overflows. */
38static boolean warn_signed_overflows = FALSE;
39static boolean warn_unsigned_overflows = FALSE;
40
41/* Indicates the target BFD machine number. */
28e4f854 42static int machine = -1;
252b5132
RH
43
44/* Indicates the target processor(s) for the assemble. */
28e4f854 45static int processor_mask = -1;
252b5132
RH
46\f
47/* Structure to hold information about predefined registers. */
48struct reg_name
49{
28e4f854
KH
50 const char *name;
51 int value;
252b5132
RH
52};
53
28e4f854
KH
54/* Generic assembler global variables which must be defined by all
55 targets. */
252b5132 56
28e4f854 57/* Characters which always start a comment. */
252b5132
RH
58const char comment_chars[] = "#";
59
60/* Characters which start a comment at the beginning of a line. */
61const char line_comment_chars[] = ";#";
62
28e4f854 63/* Characters which may be used to separate multiple commands on a
252b5132
RH
64 single line. */
65const char line_separator_chars[] = ";";
66
28e4f854 67/* Characters which are used to indicate an exponent in a floating
252b5132
RH
68 point number. */
69const char EXP_CHARS[] = "eE";
70
28e4f854 71/* Characters which mean that a number is a floating point constant,
252b5132
RH
72 as in 0d1.0. */
73const char FLT_CHARS[] = "dD";
74\f
252b5132
RH
75const relax_typeS md_relax_table[] =
76{
77 /* Conditional branches. */
78 {0xff, -0x100, 2, 1},
79 {0x1fffff, -0x200000, 6, 0},
80 /* Unconditional branches. */
81 {0xff, -0x100, 2, 3},
82 {0x1fffff, -0x200000, 4, 0},
83};
84
252b5132
RH
85static segT sdata_section = NULL;
86static segT tdata_section = NULL;
87static segT zdata_section = NULL;
88static segT sbss_section = NULL;
89static segT tbss_section = NULL;
90static segT zbss_section = NULL;
91static segT rosdata_section = NULL;
92static segT rozdata_section = NULL;
93static segT scommon_section = NULL;
94static segT tcommon_section = NULL;
95static segT zcommon_section = NULL;
96static segT call_table_data_section = NULL;
97static segT call_table_text_section = NULL;
98
28e4f854 99/* Fixups. */
252b5132
RH
100#define MAX_INSN_FIXUPS (5)
101struct v850_fixup
102{
28e4f854
KH
103 expressionS exp;
104 int opindex;
252b5132
RH
105 bfd_reloc_code_real_type reloc;
106};
107
28e4f854 108struct v850_fixup fixups[MAX_INSN_FIXUPS];
252b5132 109static int fc;
252b5132
RH
110\f
111void
5480ccf3 112v850_sdata (int ignore ATTRIBUTE_UNUSED)
252b5132 113{
28e4f854
KH
114 obj_elf_section_change_hook ();
115
252b5132
RH
116 subseg_set (sdata_section, (subsegT) get_absolute_expression ());
117
118 demand_empty_rest_of_line ();
119}
120
121void
5480ccf3 122v850_tdata (int ignore ATTRIBUTE_UNUSED)
252b5132 123{
28e4f854
KH
124 obj_elf_section_change_hook ();
125
252b5132 126 subseg_set (tdata_section, (subsegT) get_absolute_expression ());
28e4f854 127
252b5132
RH
128 demand_empty_rest_of_line ();
129}
130
131void
5480ccf3 132v850_zdata (int ignore ATTRIBUTE_UNUSED)
252b5132 133{
28e4f854
KH
134 obj_elf_section_change_hook ();
135
252b5132 136 subseg_set (zdata_section, (subsegT) get_absolute_expression ());
28e4f854 137
252b5132
RH
138 demand_empty_rest_of_line ();
139}
140
141void
5480ccf3 142v850_sbss (int ignore ATTRIBUTE_UNUSED)
252b5132 143{
28e4f854
KH
144 obj_elf_section_change_hook ();
145
252b5132 146 subseg_set (sbss_section, (subsegT) get_absolute_expression ());
28e4f854 147
252b5132
RH
148 demand_empty_rest_of_line ();
149}
150
151void
5480ccf3 152v850_tbss (int ignore ATTRIBUTE_UNUSED)
252b5132 153{
28e4f854
KH
154 obj_elf_section_change_hook ();
155
252b5132 156 subseg_set (tbss_section, (subsegT) get_absolute_expression ());
28e4f854 157
252b5132
RH
158 demand_empty_rest_of_line ();
159}
160
161void
5480ccf3 162v850_zbss (int ignore ATTRIBUTE_UNUSED)
252b5132 163{
28e4f854
KH
164 obj_elf_section_change_hook ();
165
252b5132 166 subseg_set (zbss_section, (subsegT) get_absolute_expression ());
28e4f854 167
252b5132
RH
168 demand_empty_rest_of_line ();
169}
170
171void
5480ccf3 172v850_rosdata (int ignore ATTRIBUTE_UNUSED)
252b5132 173{
28e4f854
KH
174 obj_elf_section_change_hook ();
175
252b5132 176 subseg_set (rosdata_section, (subsegT) get_absolute_expression ());
28e4f854 177
252b5132
RH
178 demand_empty_rest_of_line ();
179}
180
181void
5480ccf3 182v850_rozdata (int ignore ATTRIBUTE_UNUSED)
252b5132 183{
28e4f854
KH
184 obj_elf_section_change_hook ();
185
252b5132 186 subseg_set (rozdata_section, (subsegT) get_absolute_expression ());
28e4f854 187
252b5132
RH
188 demand_empty_rest_of_line ();
189}
190
191void
5480ccf3 192v850_call_table_data (int ignore ATTRIBUTE_UNUSED)
252b5132 193{
28e4f854
KH
194 obj_elf_section_change_hook ();
195
252b5132 196 subseg_set (call_table_data_section, (subsegT) get_absolute_expression ());
28e4f854 197
252b5132
RH
198 demand_empty_rest_of_line ();
199}
200
201void
5480ccf3 202v850_call_table_text (int ignore ATTRIBUTE_UNUSED)
252b5132 203{
28e4f854
KH
204 obj_elf_section_change_hook ();
205
252b5132 206 subseg_set (call_table_text_section, (subsegT) get_absolute_expression ());
28e4f854 207
252b5132
RH
208 demand_empty_rest_of_line ();
209}
210
211void
5480ccf3 212v850_bss (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
213{
214 register int temp = get_absolute_expression ();
215
28e4f854
KH
216 obj_elf_section_change_hook ();
217
252b5132 218 subseg_set (bss_section, (subsegT) temp);
28e4f854 219
252b5132
RH
220 demand_empty_rest_of_line ();
221}
222
223void
5480ccf3 224v850_offset (int ignore ATTRIBUTE_UNUSED)
252b5132
RH
225{
226 int temp = get_absolute_expression ();
28e4f854
KH
227
228 temp -= frag_now_fix ();
229
252b5132
RH
230 if (temp > 0)
231 (void) frag_more (temp);
28e4f854 232
252b5132
RH
233 demand_empty_rest_of_line ();
234}
235
28e4f854
KH
236/* Copied from obj_elf_common() in gas/config/obj-elf.c. */
237
252b5132
RH
238static void
239v850_comm (area)
240 int area;
241{
28e4f854
KH
242 char *name;
243 char c;
244 char *p;
245 int temp;
246 unsigned int size;
247 symbolS *symbolP;
248 int have_align;
252b5132
RH
249
250 name = input_line_pointer;
251 c = get_symbol_end ();
28e4f854
KH
252
253 /* Just after name is now '\0'. */
252b5132
RH
254 p = input_line_pointer;
255 *p = c;
28e4f854 256
252b5132 257 SKIP_WHITESPACE ();
28e4f854 258
252b5132
RH
259 if (*input_line_pointer != ',')
260 {
261 as_bad (_("Expected comma after symbol-name"));
262 ignore_rest_of_line ();
263 return;
264 }
28e4f854
KH
265
266 /* Skip ','. */
267 input_line_pointer++;
268
252b5132
RH
269 if ((temp = get_absolute_expression ()) < 0)
270 {
28e4f854 271 /* xgettext:c-format */
252b5132
RH
272 as_bad (_(".COMMon length (%d.) < 0! Ignored."), temp);
273 ignore_rest_of_line ();
274 return;
275 }
28e4f854 276
252b5132
RH
277 size = temp;
278 *p = 0;
279 symbolP = symbol_find_or_make (name);
280 *p = c;
28e4f854 281
252b5132
RH
282 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
283 {
284 as_bad (_("Ignoring attempt to re-define symbol"));
285 ignore_rest_of_line ();
286 return;
287 }
28e4f854 288
252b5132
RH
289 if (S_GET_VALUE (symbolP) != 0)
290 {
291 if (S_GET_VALUE (symbolP) != size)
292 {
28e4f854 293 /* xgettext:c-format */
252b5132
RH
294 as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %d."),
295 S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
296 }
297 }
28e4f854
KH
298
299 know (symbol_get_frag (symbolP) == &zero_address_frag);
300
252b5132
RH
301 if (*input_line_pointer != ',')
302 have_align = 0;
303 else
304 {
305 have_align = 1;
306 input_line_pointer++;
307 SKIP_WHITESPACE ();
308 }
28e4f854 309
252b5132
RH
310 if (! have_align || *input_line_pointer != '"')
311 {
312 if (! have_align)
313 temp = 0;
314 else
315 {
316 temp = get_absolute_expression ();
28e4f854 317
252b5132
RH
318 if (temp < 0)
319 {
320 temp = 0;
321 as_warn (_("Common alignment negative; 0 assumed"));
322 }
323 }
28e4f854 324
cac58fa6 325 if (symbol_get_obj (symbolP)->local)
252b5132 326 {
28e4f854
KH
327 segT old_sec;
328 int old_subsec;
329 char *pfrag;
330 int align;
331 flagword applicable;
252b5132
RH
332
333 old_sec = now_seg;
334 old_subsec = now_subseg;
28e4f854 335
252b5132 336 applicable = bfd_applicable_section_flags (stdoutput);
28e4f854 337
252b5132 338 applicable &= SEC_ALLOC;
28e4f854 339
252b5132
RH
340 switch (area)
341 {
342 case AREA_SDA:
343 if (sbss_section == NULL)
344 {
345 sbss_section = subseg_new (".sbss", 0);
28e4f854 346
252b5132 347 bfd_set_section_flags (stdoutput, sbss_section, applicable);
28e4f854 348
252b5132
RH
349 seg_info (sbss_section)->bss = 1;
350 }
351 break;
28e4f854 352
252b5132
RH
353 case AREA_ZDA:
354 if (zbss_section == NULL)
355 {
356 zbss_section = subseg_new (".zbss", 0);
28e4f854 357
252b5132 358 bfd_set_section_flags (stdoutput, sbss_section, applicable);
28e4f854 359
252b5132
RH
360 seg_info (zbss_section)->bss = 1;
361 }
362 break;
28e4f854 363
252b5132
RH
364 case AREA_TDA:
365 if (tbss_section == NULL)
366 {
367 tbss_section = subseg_new (".tbss", 0);
28e4f854 368
252b5132 369 bfd_set_section_flags (stdoutput, tbss_section, applicable);
28e4f854 370
252b5132
RH
371 seg_info (tbss_section)->bss = 1;
372 }
373 break;
374 }
375
376 if (temp)
377 {
28e4f854 378 /* Convert to a power of 2 alignment. */
252b5132
RH
379 for (align = 0; (temp & 1) == 0; temp >>= 1, ++align)
380 ;
28e4f854 381
252b5132
RH
382 if (temp != 1)
383 {
384 as_bad (_("Common alignment not a power of 2"));
385 ignore_rest_of_line ();
386 return;
387 }
388 }
389 else
390 align = 0;
28e4f854 391
252b5132
RH
392 switch (area)
393 {
394 case AREA_SDA:
395 record_alignment (sbss_section, align);
28e4f854 396 obj_elf_section_change_hook ();
252b5132
RH
397 subseg_set (sbss_section, 0);
398 break;
399
400 case AREA_ZDA:
401 record_alignment (zbss_section, align);
28e4f854 402 obj_elf_section_change_hook ();
252b5132
RH
403 subseg_set (zbss_section, 0);
404 break;
405
406 case AREA_TDA:
407 record_alignment (tbss_section, align);
28e4f854 408 obj_elf_section_change_hook ();
252b5132
RH
409 subseg_set (tbss_section, 0);
410 break;
411
412 default:
28e4f854 413 abort ();
252b5132 414 }
28e4f854 415
252b5132
RH
416 if (align)
417 frag_align (align, 0, 0);
418
419 switch (area)
420 {
421 case AREA_SDA:
422 if (S_GET_SEGMENT (symbolP) == sbss_section)
7dcc9865 423 symbol_get_frag (symbolP)->fr_symbol = 0;
252b5132
RH
424 break;
425
426 case AREA_ZDA:
427 if (S_GET_SEGMENT (symbolP) == zbss_section)
7dcc9865 428 symbol_get_frag (symbolP)->fr_symbol = 0;
252b5132
RH
429 break;
430
431 case AREA_TDA:
432 if (S_GET_SEGMENT (symbolP) == tbss_section)
7dcc9865 433 symbol_get_frag (symbolP)->fr_symbol = 0;
252b5132
RH
434 break;
435
436 default:
cac58fa6 437 abort ();
252b5132 438 }
28e4f854 439
7dcc9865 440 symbol_set_frag (symbolP, frag_now);
252b5132
RH
441 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP,
442 (offsetT) size, (char *) 0);
443 *pfrag = 0;
444 S_SET_SIZE (symbolP, size);
28e4f854 445
252b5132
RH
446 switch (area)
447 {
448 case AREA_SDA:
449 S_SET_SEGMENT (symbolP, sbss_section);
450 break;
28e4f854 451
252b5132
RH
452 case AREA_ZDA:
453 S_SET_SEGMENT (symbolP, zbss_section);
454 break;
28e4f854 455
252b5132
RH
456 case AREA_TDA:
457 S_SET_SEGMENT (symbolP, tbss_section);
458 break;
28e4f854 459
252b5132 460 default:
28e4f854 461 abort ();
252b5132 462 }
28e4f854 463
252b5132 464 S_CLEAR_EXTERNAL (symbolP);
28e4f854 465 obj_elf_section_change_hook ();
252b5132
RH
466 subseg_set (old_sec, old_subsec);
467 }
468 else
469 {
470 allocate_common:
471 S_SET_VALUE (symbolP, (valueT) size);
472 S_SET_ALIGN (symbolP, temp);
473 S_SET_EXTERNAL (symbolP);
28e4f854 474
252b5132
RH
475 switch (area)
476 {
477 case AREA_SDA:
478 if (scommon_section == NULL)
479 {
28e4f854
KH
480 flagword applicable =
481 bfd_applicable_section_flags (stdoutput);
482
252b5132 483 scommon_section = subseg_new (".scommon", 0);
28e4f854 484
5480ccf3
NC
485 bfd_set_section_flags (stdoutput, scommon_section,
486 (applicable
252b5132 487 & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA
5480ccf3 488 | SEC_HAS_CONTENTS)) | SEC_IS_COMMON);
252b5132
RH
489 }
490 S_SET_SEGMENT (symbolP, scommon_section);
491 break;
28e4f854 492
252b5132
RH
493 case AREA_ZDA:
494 if (zcommon_section == NULL)
495 {
28e4f854
KH
496 flagword applicable =
497 bfd_applicable_section_flags (stdoutput);
498
252b5132 499 zcommon_section = subseg_new (".zcommon", 0);
28e4f854 500
5480ccf3
NC
501 bfd_set_section_flags (stdoutput, zcommon_section,
502 (applicable
252b5132 503 & (SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA
5480ccf3 504 | SEC_HAS_CONTENTS)) | SEC_IS_COMMON);
252b5132
RH
505 }
506 S_SET_SEGMENT (symbolP, zcommon_section);
507 break;
28e4f854 508
252b5132
RH
509 case AREA_TDA:
510 if (tcommon_section == NULL)
511 {
28e4f854
KH
512 flagword applicable =
513 bfd_applicable_section_flags (stdoutput);
514
252b5132 515 tcommon_section = subseg_new (".tcommon", 0);
28e4f854 516
5480ccf3 517 bfd_set_section_flags (stdoutput, tcommon_section,
28e4f854
KH
518 ((applicable
519 & (SEC_ALLOC | SEC_LOAD
520 | SEC_RELOC | SEC_DATA
521 | SEC_HAS_CONTENTS))
522 | SEC_IS_COMMON));
252b5132
RH
523 }
524 S_SET_SEGMENT (symbolP, tcommon_section);
525 break;
28e4f854 526
252b5132 527 default:
28e4f854 528 abort ();
252b5132
RH
529 }
530 }
531 }
532 else
533 {
534 input_line_pointer++;
28e4f854 535
252b5132
RH
536 /* @@ Some use the dot, some don't. Can we get some consistency?? */
537 if (*input_line_pointer == '.')
538 input_line_pointer++;
28e4f854 539
252b5132
RH
540 /* @@ Some say data, some say bss. */
541 if (strncmp (input_line_pointer, "bss\"", 4)
542 && strncmp (input_line_pointer, "data\"", 5))
543 {
544 while (*--input_line_pointer != '"')
545 ;
546 input_line_pointer--;
547 goto bad_common_segment;
548 }
549 while (*input_line_pointer++ != '"')
550 ;
551 goto allocate_common;
552 }
553
fed9b18a 554 symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT;
252b5132
RH
555
556 demand_empty_rest_of_line ();
557 return;
558
559 {
560 bad_common_segment:
561 p = input_line_pointer;
562 while (*p && *p != '\n')
563 p++;
564 c = *p;
565 *p = '\0';
566 as_bad (_("bad .common segment %s"), input_line_pointer + 1);
567 *p = c;
568 input_line_pointer = p;
569 ignore_rest_of_line ();
570 return;
571 }
572}
573
574void
575set_machine (int number)
576{
577 machine = number;
578 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
579
580 switch (machine)
581 {
28e4f854
KH
582 case 0: processor_mask = PROCESSOR_V850; break;
583 case bfd_mach_v850e: processor_mask = PROCESSOR_V850E; break;
252b5132
RH
584 case bfd_mach_v850ea: processor_mask = PROCESSOR_V850EA; break;
585 }
586}
587
588/* The target specific pseudo-ops which we support. */
589const pseudo_typeS md_pseudo_table[] =
590{
591 {"sdata", v850_sdata, 0},
592 {"tdata", v850_tdata, 0},
593 {"zdata", v850_zdata, 0},
594 {"sbss", v850_sbss, 0},
595 {"tbss", v850_tbss, 0},
596 {"zbss", v850_zbss, 0},
597 {"rosdata", v850_rosdata, 0},
598 {"rozdata", v850_rozdata, 0},
599 {"bss", v850_bss, 0},
600 {"offset", v850_offset, 0},
601 {"word", cons, 4},
602 {"zcomm", v850_comm, AREA_ZDA},
603 {"scomm", v850_comm, AREA_SDA},
604 {"tcomm", v850_comm, AREA_TDA},
605 {"v850", set_machine, 0},
606 {"call_table_data", v850_call_table_data, 0},
607 {"call_table_text", v850_call_table_text, 0},
608 {"v850e", set_machine, bfd_mach_v850e},
609 {"v850ea", set_machine, bfd_mach_v850ea},
610 { NULL, NULL, 0}
611};
612
613/* Opcode hash table. */
614static struct hash_control *v850_hash;
615
28e4f854 616/* This table is sorted. Suitable for searching by a binary search. */
252b5132
RH
617static const struct reg_name pre_defined_registers[] =
618{
619 { "ep", 30 }, /* ep - element ptr */
28e4f854
KH
620 { "gp", 4 }, /* gp - global ptr */
621 { "hp", 2 }, /* hp - handler stack ptr */
622 { "lp", 31 }, /* lp - link ptr */
252b5132
RH
623 { "r0", 0 },
624 { "r1", 1 },
625 { "r10", 10 },
626 { "r11", 11 },
627 { "r12", 12 },
628 { "r13", 13 },
629 { "r14", 14 },
630 { "r15", 15 },
631 { "r16", 16 },
632 { "r17", 17 },
633 { "r18", 18 },
634 { "r19", 19 },
635 { "r2", 2 },
636 { "r20", 20 },
637 { "r21", 21 },
638 { "r22", 22 },
639 { "r23", 23 },
640 { "r24", 24 },
641 { "r25", 25 },
642 { "r26", 26 },
643 { "r27", 27 },
644 { "r28", 28 },
645 { "r29", 29 },
646 { "r3", 3 },
647 { "r30", 30 },
648 { "r31", 31 },
649 { "r4", 4 },
650 { "r5", 5 },
651 { "r6", 6 },
652 { "r7", 7 },
653 { "r8", 8 },
654 { "r9", 9 },
28e4f854
KH
655 { "sp", 3 }, /* sp - stack ptr */
656 { "tp", 5 }, /* tp - text ptr */
252b5132
RH
657 { "zero", 0 },
658};
252b5132 659
28e4f854
KH
660#define REG_NAME_CNT \
661 (sizeof (pre_defined_registers) / sizeof (struct reg_name))
252b5132 662
28e4f854 663static const struct reg_name system_registers[] =
252b5132
RH
664{
665 { "ctbp", 20 },
666 { "ctpc", 16 },
667 { "ctpsw", 17 },
668 { "dbpc", 18 },
669 { "dbpsw", 19 },
670 { "ecr", 4 },
671 { "eipc", 0 },
672 { "eipsw", 1 },
673 { "fepc", 2 },
674 { "fepsw", 3 },
675 { "psw", 5 },
676};
28e4f854
KH
677
678#define SYSREG_NAME_CNT \
679 (sizeof (system_registers) / sizeof (struct reg_name))
252b5132
RH
680
681static const struct reg_name system_list_registers[] =
682{
683 {"PS", 5 },
684 {"SR", 0 + 1}
685};
28e4f854
KH
686
687#define SYSREGLIST_NAME_CNT \
688 (sizeof (system_list_registers) / sizeof (struct reg_name))
252b5132
RH
689
690static const struct reg_name cc_names[] =
691{
692 { "c", 0x1 },
693 { "e", 0x2 },
694 { "ge", 0xe },
695 { "gt", 0xf },
696 { "h", 0xb },
697 { "l", 0x1 },
698 { "le", 0x7 },
699 { "lt", 0x6 },
700 { "n", 0x4 },
701 { "nc", 0x9 },
702 { "ne", 0xa },
703 { "nh", 0x3 },
704 { "nl", 0x9 },
705 { "ns", 0xc },
706 { "nv", 0x8 },
707 { "nz", 0xa },
708 { "p", 0xc },
709 { "s", 0x4 },
710 { "sa", 0xd },
711 { "t", 0x5 },
712 { "v", 0x0 },
713 { "z", 0x2 },
714};
252b5132 715
28e4f854
KH
716#define CC_NAME_CNT \
717 (sizeof (cc_names) / sizeof (struct reg_name))
718
719/* Do a binary search of the given register table to see if NAME is a
720 valid regiter name. Return the register number from the array on
721 success, or -1 on failure. */
252b5132
RH
722
723static int
724reg_name_search (regs, regcount, name, accept_numbers)
28e4f854
KH
725 const struct reg_name *regs;
726 int regcount;
727 const char *name;
728 boolean accept_numbers;
252b5132
RH
729{
730 int middle, low, high;
731 int cmp;
28e4f854 732 symbolS *symbolP;
252b5132
RH
733
734 /* If the register name is a symbol, then evaluate it. */
735 if ((symbolP = symbol_find (name)) != NULL)
736 {
737 /* If the symbol is an alias for another name then use that.
738 If the symbol is an alias for a number, then return the number. */
a77f5182 739 if (symbol_equated_p (symbolP))
252b5132 740 {
28e4f854
KH
741 name
742 = S_GET_NAME (symbol_get_value_expression (symbolP)->X_add_symbol);
252b5132
RH
743 }
744 else if (accept_numbers)
745 {
746 int reg = S_GET_VALUE (symbolP);
28e4f854 747
252b5132
RH
748 if (reg >= 0 && reg <= 31)
749 return reg;
750 }
751
752 /* Otherwise drop through and try parsing name normally. */
753 }
28e4f854 754
252b5132
RH
755 low = 0;
756 high = regcount - 1;
757
758 do
759 {
760 middle = (low + high) / 2;
761 cmp = strcasecmp (name, regs[middle].name);
762 if (cmp < 0)
763 high = middle - 1;
764 else if (cmp > 0)
765 low = middle + 1;
766 else
767 return regs[middle].value;
768 }
769 while (low <= high);
770 return -1;
771}
772
252b5132
RH
773/* Summary of register_name().
774 *
775 * in: Input_line_pointer points to 1st char of operand.
776 *
777 * out: A expressionS.
778 * The operand may have been a register: in this case, X_op == O_register,
779 * X_add_number is set to the register number, and truth is returned.
780 * Input_line_pointer->(next non-blank) char after operand, or is in
28e4f854
KH
781 * its original state. */
782
252b5132
RH
783static boolean
784register_name (expressionP)
28e4f854 785 expressionS *expressionP;
252b5132 786{
28e4f854
KH
787 int reg_number;
788 char *name;
789 char *start;
790 char c;
252b5132 791
28e4f854 792 /* Find the spelling of the operand. */
252b5132
RH
793 start = name = input_line_pointer;
794
795 c = get_symbol_end ();
796
797 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT,
798 name, FALSE);
799
28e4f854
KH
800 /* Put back the delimiting char. */
801 *input_line_pointer = c;
802
803 /* Look to see if it's in the register table. */
804 if (reg_number >= 0)
252b5132
RH
805 {
806 expressionP->X_op = O_register;
807 expressionP->X_add_number = reg_number;
808
28e4f854 809 /* Make the rest nice. */
252b5132
RH
810 expressionP->X_add_symbol = NULL;
811 expressionP->X_op_symbol = NULL;
28e4f854 812
252b5132
RH
813 return true;
814 }
815 else
816 {
28e4f854 817 /* Reset the line as if we had not done anything. */
252b5132 818 input_line_pointer = start;
28e4f854 819
252b5132
RH
820 return false;
821 }
822}
823
824/* Summary of system_register_name().
825 *
28e4f854
KH
826 * in: INPUT_LINE_POINTER points to 1st char of operand.
827 * EXPRESSIONP points to an expression structure to be filled in.
828 * ACCEPT_NUMBERS is true iff numerical register names may be used.
829 * ACCEPT_LIST_NAMES is true iff the special names PS and SR may be
252b5132
RH
830 * accepted.
831 *
832 * out: A expressionS structure in expressionP.
833 * The operand may have been a register: in this case, X_op == O_register,
834 * X_add_number is set to the register number, and truth is returned.
835 * Input_line_pointer->(next non-blank) char after operand, or is in
28e4f854
KH
836 * its original state. */
837
252b5132
RH
838static boolean
839system_register_name (expressionP, accept_numbers, accept_list_names)
28e4f854
KH
840 expressionS *expressionP;
841 boolean accept_numbers;
842 boolean accept_list_names;
252b5132 843{
28e4f854
KH
844 int reg_number;
845 char *name;
846 char *start;
847 char c;
252b5132 848
28e4f854 849 /* Find the spelling of the operand. */
252b5132
RH
850 start = name = input_line_pointer;
851
852 c = get_symbol_end ();
853 reg_number = reg_name_search (system_registers, SYSREG_NAME_CNT, name,
854 accept_numbers);
855
28e4f854
KH
856 /* Put back the delimiting char. */
857 *input_line_pointer = c;
858
252b5132
RH
859 if (reg_number < 0
860 && accept_numbers)
861 {
28e4f854
KH
862 /* Reset input_line pointer. */
863 input_line_pointer = start;
252b5132 864
28e4f854 865 if (isdigit (*input_line_pointer))
252b5132 866 {
28e4f854 867 reg_number = strtol (input_line_pointer, &input_line_pointer, 10);
252b5132 868
28e4f854
KH
869 /* Make sure that the register number is allowable. */
870 if (reg_number < 0
5480ccf3 871 || (reg_number > 5 && reg_number < 16)
28e4f854 872 || reg_number > 20)
252b5132
RH
873 {
874 reg_number = -1;
875 }
876 }
877 else if (accept_list_names)
878 {
879 c = get_symbol_end ();
880 reg_number = reg_name_search (system_list_registers,
881 SYSREGLIST_NAME_CNT, name, FALSE);
882
28e4f854
KH
883 /* Put back the delimiting char. */
884 *input_line_pointer = c;
252b5132
RH
885 }
886 }
28e4f854
KH
887
888 /* Look to see if it's in the register table. */
889 if (reg_number >= 0)
252b5132
RH
890 {
891 expressionP->X_op = O_register;
892 expressionP->X_add_number = reg_number;
893
28e4f854 894 /* Make the rest nice. */
252b5132
RH
895 expressionP->X_add_symbol = NULL;
896 expressionP->X_op_symbol = NULL;
897
898 return true;
899 }
900 else
901 {
28e4f854 902 /* Reset the line as if we had not done anything. */
252b5132 903 input_line_pointer = start;
28e4f854 904
252b5132
RH
905 return false;
906 }
907}
908
909/* Summary of cc_name().
910 *
28e4f854 911 * in: INPUT_LINE_POINTER points to 1st char of operand.
252b5132
RH
912 *
913 * out: A expressionS.
914 * The operand may have been a register: in this case, X_op == O_register,
915 * X_add_number is set to the register number, and truth is returned.
916 * Input_line_pointer->(next non-blank) char after operand, or is in
28e4f854
KH
917 * its original state. */
918
252b5132
RH
919static boolean
920cc_name (expressionP)
28e4f854 921 expressionS *expressionP;
252b5132 922{
28e4f854
KH
923 int reg_number;
924 char *name;
925 char *start;
926 char c;
252b5132 927
28e4f854 928 /* Find the spelling of the operand. */
252b5132
RH
929 start = name = input_line_pointer;
930
931 c = get_symbol_end ();
932 reg_number = reg_name_search (cc_names, CC_NAME_CNT, name, FALSE);
933
28e4f854
KH
934 /* Put back the delimiting char. */
935 *input_line_pointer = c;
936
937 /* Look to see if it's in the register table. */
938 if (reg_number >= 0)
252b5132
RH
939 {
940 expressionP->X_op = O_constant;
941 expressionP->X_add_number = reg_number;
942
28e4f854 943 /* Make the rest nice. */
252b5132
RH
944 expressionP->X_add_symbol = NULL;
945 expressionP->X_op_symbol = NULL;
946
947 return true;
948 }
949 else
950 {
28e4f854 951 /* Reset the line as if we had not done anything. */
252b5132 952 input_line_pointer = start;
28e4f854 953
252b5132
RH
954 return false;
955 }
956}
957
958static void
959skip_white_space (void)
960{
28e4f854
KH
961 while (*input_line_pointer == ' '
962 || *input_line_pointer == '\t')
963 ++input_line_pointer;
252b5132
RH
964}
965
966/* Summary of parse_register_list ().
967 *
28e4f854
KH
968 * in: INPUT_LINE_POINTER points to 1st char of a list of registers.
969 * INSN is the partially constructed instruction.
970 * OPERAND is the operand being inserted.
252b5132
RH
971 *
972 * out: NULL if the parse completed successfully, otherwise a
973 * pointer to an error message is returned. If the parse
974 * completes the correct bit fields in the instruction
975 * will be filled in.
976 *
977 * Parses register lists with the syntax:
978 *
979 * { rX }
980 * { rX, rY }
981 * { rX - rY }
982 * { rX - rY, rZ }
983 * etc
984 *
985 * and also parses constant epxressions whoes bits indicate the
986 * registers in the lists. The LSB in the expression refers to
987 * the lowest numbered permissable register in the register list,
988 * and so on upwards. System registers are considered to be very
28e4f854
KH
989 * high numbers. */
990
252b5132 991static char *
28e4f854
KH
992parse_register_list (insn, operand)
993 unsigned long *insn;
994 const struct v850_operand *operand;
252b5132 995{
28e4f854
KH
996 static int type1_regs[32] = {
997 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
998 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
999 };
1000 static int type2_regs[32] = {
1001 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1002 0, 0, 0, 0, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
1003 };
1004 static int type3_regs[32] = {
1005 3, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1006 0, 0, 0, 0, 14, 15, 13, 12, 7, 6, 5, 4, 11, 10, 9, 8
1007 };
1008 int *regs;
252b5132
RH
1009 expressionS exp;
1010
28e4f854 1011 /* Select a register array to parse. */
252b5132
RH
1012 switch (operand->shift)
1013 {
1014 case 0xffe00001: regs = type1_regs; break;
1015 case 0xfff8000f: regs = type2_regs; break;
1016 case 0xfff8001f: regs = type3_regs; break;
1017 default:
1018 as_bad (_("unknown operand shift: %x\n"), operand->shift);
1019 return _("internal failure in parse_register_list");
1020 }
1021
1022 skip_white_space ();
1023
1024 /* If the expression starts with a curly brace it is a register list.
1025 Otherwise it is a constant expression, whoes bits indicate which
1026 registers are to be included in the list. */
28e4f854
KH
1027
1028 if (*input_line_pointer != '{')
252b5132 1029 {
252b5132
RH
1030 int reg;
1031 int i;
28e4f854
KH
1032
1033 expression (&exp);
1034
252b5132
RH
1035 if (exp.X_op != O_constant)
1036 return _("constant expression or register list expected");
1037
1038 if (regs == type1_regs)
1039 {
1040 if (exp.X_add_number & 0xFFFFF000)
1041 return _("high bits set in register list expression");
28e4f854
KH
1042
1043 for (reg = 20; reg < 32; reg++)
252b5132
RH
1044 if (exp.X_add_number & (1 << (reg - 20)))
1045 {
1046 for (i = 0; i < 32; i++)
1047 if (regs[i] == reg)
28e4f854 1048 *insn |= (1 << i);
252b5132
RH
1049 }
1050 }
1051 else if (regs == type2_regs)
1052 {
1053 if (exp.X_add_number & 0xFFFE0000)
1054 return _("high bits set in register list expression");
28e4f854
KH
1055
1056 for (reg = 1; reg < 16; reg++)
252b5132
RH
1057 if (exp.X_add_number & (1 << (reg - 1)))
1058 {
1059 for (i = 0; i < 32; i++)
1060 if (regs[i] == reg)
28e4f854 1061 *insn |= (1 << i);
252b5132
RH
1062 }
1063
1064 if (exp.X_add_number & (1 << 15))
28e4f854
KH
1065 *insn |= (1 << 3);
1066
252b5132 1067 if (exp.X_add_number & (1 << 16))
28e4f854 1068 *insn |= (1 << 19);
252b5132 1069 }
28e4f854 1070 else /* regs == type3_regs */
252b5132
RH
1071 {
1072 if (exp.X_add_number & 0xFFFE0000)
1073 return _("high bits set in register list expression");
28e4f854
KH
1074
1075 for (reg = 16; reg < 32; reg++)
252b5132
RH
1076 if (exp.X_add_number & (1 << (reg - 16)))
1077 {
1078 for (i = 0; i < 32; i++)
1079 if (regs[i] == reg)
28e4f854 1080 *insn |= (1 << i);
252b5132
RH
1081 }
1082
1083 if (exp.X_add_number & (1 << 16))
28e4f854 1084 *insn |= (1 << 19);
252b5132
RH
1085 }
1086
1087 return NULL;
1088 }
1089
28e4f854 1090 input_line_pointer++;
252b5132
RH
1091
1092 /* Parse the register list until a terminator (closing curly brace or
1093 new-line) is found. */
1094 for (;;)
1095 {
28e4f854 1096 if (register_name (&exp))
252b5132 1097 {
28e4f854
KH
1098 int i;
1099
252b5132
RH
1100 /* Locate the given register in the list, and if it is there,
1101 insert the corresponding bit into the instruction. */
1102 for (i = 0; i < 32; i++)
1103 {
28e4f854 1104 if (regs[i] == exp.X_add_number)
252b5132 1105 {
28e4f854 1106 *insn |= (1 << i);
252b5132
RH
1107 break;
1108 }
1109 }
1110
1111 if (i == 32)
1112 {
1113 return _("illegal register included in list");
1114 }
1115 }
28e4f854 1116 else if (system_register_name (&exp, true, true))
252b5132
RH
1117 {
1118 if (regs == type1_regs)
1119 {
1120 return _("system registers cannot be included in list");
1121 }
1122 else if (exp.X_add_number == 5)
1123 {
1124 if (regs == type2_regs)
1125 return _("PSW cannot be included in list");
1126 else
28e4f854 1127 *insn |= 0x8;
252b5132
RH
1128 }
1129 else if (exp.X_add_number < 4)
28e4f854 1130 *insn |= 0x80000;
252b5132
RH
1131 else
1132 return _("High value system registers cannot be included in list");
1133 }
28e4f854 1134 else if (*input_line_pointer == '}')
252b5132 1135 {
28e4f854 1136 input_line_pointer++;
252b5132
RH
1137 break;
1138 }
28e4f854 1139 else if (*input_line_pointer == ',')
252b5132 1140 {
28e4f854 1141 input_line_pointer++;
252b5132
RH
1142 continue;
1143 }
28e4f854 1144 else if (*input_line_pointer == '-')
252b5132 1145 {
28e4f854
KH
1146 /* We have encountered a range of registers: rX - rY. */
1147 int j;
252b5132
RH
1148 expressionS exp2;
1149
1150 /* Skip the dash. */
28e4f854 1151 ++input_line_pointer;
252b5132
RH
1152
1153 /* Get the second register in the range. */
28e4f854 1154 if (! register_name (&exp2))
252b5132
RH
1155 {
1156 return _("second register should follow dash in register list");
1157 exp2.X_add_number = exp.X_add_number;
1158 }
1159
1160 /* Add the rest of the registers in the range. */
1161 for (j = exp.X_add_number + 1; j <= exp2.X_add_number; j++)
1162 {
28e4f854
KH
1163 int i;
1164
252b5132
RH
1165 /* Locate the given register in the list, and if it is there,
1166 insert the corresponding bit into the instruction. */
1167 for (i = 0; i < 32; i++)
1168 {
28e4f854 1169 if (regs[i] == j)
252b5132 1170 {
28e4f854 1171 *insn |= (1 << i);
252b5132
RH
1172 break;
1173 }
1174 }
1175
1176 if (i == 32)
1177 return _("illegal register included in list");
1178 }
1179 }
1180 else
1181 {
1182 break;
1183 }
1184
1185 skip_white_space ();
1186 }
1187
1188 return NULL;
1189}
1190
28e4f854 1191CONST char *md_shortopts = "m:";
252b5132
RH
1192
1193struct option md_longopts[] =
1194{
1195 {NULL, no_argument, NULL, 0}
1196};
252b5132 1197
28e4f854 1198size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
1199
1200void
1201md_show_usage (stream)
28e4f854 1202 FILE *stream;
252b5132
RH
1203{
1204 fprintf (stream, _(" V850 options:\n"));
1205 fprintf (stream, _(" -mwarn-signed-overflow Warn if signed immediate values overflow\n"));
1206 fprintf (stream, _(" -mwarn-unsigned-overflow Warn if unsigned immediate values overflow\n"));
1207 fprintf (stream, _(" -mv850 The code is targeted at the v850\n"));
1208 fprintf (stream, _(" -mv850e The code is targeted at the v850e\n"));
1209 fprintf (stream, _(" -mv850ea The code is targeted at the v850ea\n"));
1210 fprintf (stream, _(" -mv850any The code is generic, despite any processor specific instructions\n"));
1211}
1212
1213int
1214md_parse_option (c, arg)
28e4f854
KH
1215 int c;
1216 char *arg;
252b5132
RH
1217{
1218 if (c != 'm')
1219 {
5480ccf3 1220 if (c != 'a')
28e4f854 1221 /* xgettext:c-format */
5480ccf3 1222 fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
252b5132
RH
1223 return 0;
1224 }
1225
1226 if (strcmp (arg, "warn-signed-overflow") == 0)
1227 {
1228 warn_signed_overflows = TRUE;
1229 }
1230 else if (strcmp (arg, "warn-unsigned-overflow") == 0)
1231 {
1232 warn_unsigned_overflows = TRUE;
1233 }
1234 else if (strcmp (arg, "v850") == 0)
1235 {
1236 machine = 0;
1237 processor_mask = PROCESSOR_V850;
1238 }
1239 else if (strcmp (arg, "v850e") == 0)
1240 {
1241 machine = bfd_mach_v850e;
1242 processor_mask = PROCESSOR_V850E;
1243 }
1244 else if (strcmp (arg, "v850ea") == 0)
1245 {
1246 machine = bfd_mach_v850ea;
1247 processor_mask = PROCESSOR_V850EA;
1248 }
1249 else if (strcmp (arg, "v850any") == 0)
1250 {
28e4f854
KH
1251 /* Tell the world that this is for any v850 chip. */
1252 machine = 0;
1253
1254 /* But support instructions for the extended versions. */
1255 processor_mask = PROCESSOR_V850EA;
252b5132
RH
1256 }
1257 else
1258 {
28e4f854 1259 /* xgettext:c-format */
252b5132
RH
1260 fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
1261 return 0;
1262 }
28e4f854 1263
252b5132
RH
1264 return 1;
1265}
1266
1267symbolS *
1268md_undefined_symbol (name)
28e4f854 1269 char *name ATTRIBUTE_UNUSED;
252b5132
RH
1270{
1271 return 0;
1272}
1273
1274char *
1275md_atof (type, litp, sizep)
28e4f854
KH
1276 int type;
1277 char *litp;
1278 int *sizep;
252b5132 1279{
28e4f854 1280 int prec;
252b5132 1281 LITTLENUM_TYPE words[4];
28e4f854
KH
1282 char *t;
1283 int i;
252b5132
RH
1284
1285 switch (type)
1286 {
1287 case 'f':
1288 prec = 2;
1289 break;
1290
1291 case 'd':
1292 prec = 4;
1293 break;
1294
1295 default:
1296 *sizep = 0;
1297 return _("bad call to md_atof");
1298 }
28e4f854 1299
252b5132
RH
1300 t = atof_ieee (input_line_pointer, type, words);
1301 if (t)
1302 input_line_pointer = t;
1303
1304 *sizep = prec * 2;
1305
1306 for (i = prec - 1; i >= 0; i--)
1307 {
1308 md_number_to_chars (litp, (valueT) words[i], 2);
1309 litp += 2;
1310 }
1311
1312 return NULL;
1313}
1314
252b5132 1315/* Very gross. */
28e4f854 1316
252b5132
RH
1317void
1318md_convert_frag (abfd, sec, fragP)
28e4f854
KH
1319 bfd *abfd ATTRIBUTE_UNUSED;
1320 asection *sec;
1321 fragS *fragP;
252b5132
RH
1322{
1323 subseg_change (sec, 0);
28e4f854 1324
252b5132
RH
1325 /* In range conditional or unconditional branch. */
1326 if (fragP->fr_subtype == 0 || fragP->fr_subtype == 2)
1327 {
1328 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
1329 fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode);
1330 fragP->fr_var = 0;
1331 fragP->fr_fix += 2;
1332 }
1333 /* Out of range conditional branch. Emit a branch around a jump. */
1334 else if (fragP->fr_subtype == 1)
1335 {
28e4f854 1336 unsigned char *buffer =
252b5132
RH
1337 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
1338
1339 /* Reverse the condition of the first branch. */
1340 buffer[0] ^= 0x08;
1341 /* Mask off all the displacement bits. */
1342 buffer[0] &= 0x8f;
1343 buffer[1] &= 0x07;
1344 /* Now set the displacement bits so that we branch
1345 around the unconditional branch. */
1346 buffer[0] |= 0x30;
1347
1348 /* Now create the unconditional branch + fixup to the final
1349 target. */
1350 md_number_to_chars (buffer + 2, 0x00000780, 4);
1351 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
1352 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1353 (int) fragP->fr_opcode + 1);
1354 fragP->fr_var = 0;
1355 fragP->fr_fix += 6;
1356 }
1357 /* Out of range unconditional branch. Emit a jump. */
1358 else if (fragP->fr_subtype == 3)
1359 {
1360 md_number_to_chars (fragP->fr_fix + fragP->fr_literal, 0x00000780, 4);
1361 fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,
1362 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1363 (int) fragP->fr_opcode + 1);
1364 fragP->fr_var = 0;
1365 fragP->fr_fix += 4;
1366 }
1367 else
1368 abort ();
1369}
1370
1371valueT
1372md_section_align (seg, addr)
28e4f854
KH
1373 asection *seg;
1374 valueT addr;
252b5132
RH
1375{
1376 int align = bfd_get_section_alignment (stdoutput, seg);
1377 return ((addr + (1 << align) - 1) & (-1 << align));
1378}
1379
1380void
1381md_begin ()
1382{
28e4f854
KH
1383 char *prev_name = "";
1384 register const struct v850_opcode *op;
1385 flagword applicable;
252b5132
RH
1386
1387 if (strncmp (TARGET_CPU, "v850ea", 6) == 0)
1388 {
1389 if (machine == -1)
1390 machine = bfd_mach_v850ea;
28e4f854 1391
252b5132
RH
1392 if (processor_mask == -1)
1393 processor_mask = PROCESSOR_V850EA;
1394 }
1395 else if (strncmp (TARGET_CPU, "v850e", 5) == 0)
1396 {
1397 if (machine == -1)
28e4f854
KH
1398 machine = bfd_mach_v850e;
1399
252b5132
RH
1400 if (processor_mask == -1)
1401 processor_mask = PROCESSOR_V850E;
1402 }
28e4f854 1403 else if (strncmp (TARGET_CPU, "v850", 4) == 0)
252b5132
RH
1404 {
1405 if (machine == -1)
28e4f854
KH
1406 machine = 0;
1407
252b5132
RH
1408 if (processor_mask == -1)
1409 processor_mask = PROCESSOR_V850;
1410 }
1411 else
28e4f854
KH
1412 /* xgettext:c-format */
1413 as_bad (_("Unable to determine default target processor from string: %s"),
252b5132
RH
1414 TARGET_CPU);
1415
1416 v850_hash = hash_new();
1417
1418 /* Insert unique names into hash table. The V850 instruction set
1419 has many identical opcode names that have different opcodes based
1420 on the operands. This hash table then provides a quick index to
1421 the first opcode with a particular name in the opcode table. */
1422
1423 op = v850_opcodes;
1424 while (op->name)
1425 {
28e4f854 1426 if (strcmp (prev_name, op->name))
252b5132
RH
1427 {
1428 prev_name = (char *) op->name;
1429 hash_insert (v850_hash, op->name, (char *) op);
1430 }
1431 op++;
1432 }
1433
1434 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
1435
1436 applicable = bfd_applicable_section_flags (stdoutput);
28e4f854 1437
252b5132
RH
1438 call_table_data_section = subseg_new (".call_table_data", 0);
1439 bfd_set_section_flags (stdoutput, call_table_data_section,
1440 applicable & (SEC_ALLOC | SEC_LOAD | SEC_RELOC
1441 | SEC_DATA | SEC_HAS_CONTENTS));
28e4f854 1442
252b5132
RH
1443 call_table_text_section = subseg_new (".call_table_text", 0);
1444 bfd_set_section_flags (stdoutput, call_table_text_section,
1445 applicable & (SEC_ALLOC | SEC_LOAD | SEC_READONLY
1446 | SEC_CODE));
28e4f854 1447
252b5132
RH
1448 /* Restore text section as the current default. */
1449 subseg_set (text_section, 0);
1450}
1451
252b5132 1452static bfd_reloc_code_real_type
28e4f854 1453handle_ctoff (const struct v850_operand *operand)
252b5132
RH
1454{
1455 if (operand == NULL)
1456 return BFD_RELOC_V850_CALLT_16_16_OFFSET;
1457
28e4f854 1458 if (operand->bits != 6
252b5132
RH
1459 || operand->shift != 0)
1460 {
1461 as_bad (_("ctoff() relocation used on an instruction which does not support it"));
1462 return BFD_RELOC_64; /* Used to indicate an error condition. */
1463 }
28e4f854 1464
252b5132
RH
1465 return BFD_RELOC_V850_CALLT_6_7_OFFSET;
1466}
1467
1468static bfd_reloc_code_real_type
28e4f854 1469handle_sdaoff (const struct v850_operand *operand)
252b5132 1470{
28e4f854
KH
1471 if (operand == NULL)
1472 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1473
1474 if (operand->bits == 15 && operand->shift == 17)
1475 return BFD_RELOC_V850_SDA_15_16_OFFSET;
1476
1477 if (operand->bits == -1)
1478 return BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET;
1479
1480 if (operand->bits != 16
252b5132
RH
1481 || operand->shift != 16)
1482 {
1483 as_bad (_("sdaoff() relocation used on an instruction which does not support it"));
1484 return BFD_RELOC_64; /* Used to indicate an error condition. */
1485 }
28e4f854 1486
252b5132
RH
1487 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1488}
1489
1490static bfd_reloc_code_real_type
28e4f854 1491handle_zdaoff (const struct v850_operand *operand)
252b5132 1492{
28e4f854
KH
1493 if (operand == NULL)
1494 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1495
1496 if (operand->bits == 15 && operand->shift == 17)
1497 return BFD_RELOC_V850_ZDA_15_16_OFFSET;
252b5132 1498
28e4f854
KH
1499 if (operand->bits == -1)
1500 return BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET;
1501
1502 if (operand->bits != 16
252b5132
RH
1503 || operand->shift != 16)
1504 {
1505 as_bad (_("zdaoff() relocation used on an instruction which does not support it"));
28e4f854
KH
1506 /* Used to indicate an error condition. */
1507 return BFD_RELOC_64;
252b5132 1508 }
28e4f854 1509
252b5132
RH
1510 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1511}
1512
1513static bfd_reloc_code_real_type
28e4f854 1514handle_tdaoff (const struct v850_operand *operand)
252b5132 1515{
28e4f854
KH
1516 if (operand == NULL)
1517 /* Data item, not an instruction. */
1518 return BFD_RELOC_V850_TDA_7_7_OFFSET;
1519
1520 if (operand->bits == 6 && operand->shift == 1)
1521 /* sld.w/sst.w, operand: D8_6 */
1522 return BFD_RELOC_V850_TDA_6_8_OFFSET;
1523
1524 if (operand->bits == 4 && operand->insert != NULL)
1525 /* sld.hu, operand: D5-4 */
1526 return BFD_RELOC_V850_TDA_4_5_OFFSET;
1527
1528 if (operand->bits == 4 && operand->insert == NULL)
1529 /* sld.bu, operand: D4 */
1530 return BFD_RELOC_V850_TDA_4_4_OFFSET;
1531
1532 if (operand->bits == 16 && operand->shift == 16)
1533 /* set1 & chums, operands: D16 */
1534 return BFD_RELOC_V850_TDA_16_16_OFFSET;
1535
252b5132
RH
1536 if (operand->bits != 7)
1537 {
1538 as_bad (_("tdaoff() relocation used on an instruction which does not support it"));
28e4f854
KH
1539 /* Used to indicate an error condition. */
1540 return BFD_RELOC_64;
252b5132 1541 }
28e4f854 1542
252b5132 1543 return operand->insert != NULL
28e4f854
KH
1544 ? BFD_RELOC_V850_TDA_7_8_OFFSET /* sld.h/sst.h, operand: D8_7 */
1545 : BFD_RELOC_V850_TDA_7_7_OFFSET; /* sld.b/sst.b, opreand: D7 */
252b5132
RH
1546}
1547
1548/* Warning: The code in this function relies upon the definitions
1549 in the v850_operands[] array (defined in opcodes/v850-opc.c)
1550 matching the hard coded values contained herein. */
1551
1552static bfd_reloc_code_real_type
28e4f854 1553v850_reloc_prefix (const struct v850_operand *operand)
252b5132
RH
1554{
1555 boolean paren_skipped = false;
1556
252b5132 1557 /* Skip leading opening parenthesis. */
28e4f854 1558 if (*input_line_pointer == '(')
252b5132 1559 {
28e4f854 1560 ++input_line_pointer;
252b5132
RH
1561 paren_skipped = true;
1562 }
1563
1564#define CHECK_(name, reloc) \
1565 if (strncmp (input_line_pointer, name##"(", strlen (name) + 1) == 0) \
1566 { \
1567 input_line_pointer += strlen (name); \
1568 return reloc; \
1569 }
28e4f854
KH
1570
1571 CHECK_ ("hi0", BFD_RELOC_HI16 );
1572 CHECK_ ("hi", BFD_RELOC_HI16_S );
1573 CHECK_ ("lo", BFD_RELOC_LO16 );
252b5132
RH
1574 CHECK_ ("sdaoff", handle_sdaoff (operand));
1575 CHECK_ ("zdaoff", handle_zdaoff (operand));
1576 CHECK_ ("tdaoff", handle_tdaoff (operand));
28e4f854
KH
1577 CHECK_ ("hilo", BFD_RELOC_32 );
1578 CHECK_ ("ctoff", handle_ctoff (operand) );
1579
252b5132
RH
1580 /* Restore skipped parenthesis. */
1581 if (paren_skipped)
28e4f854
KH
1582 --input_line_pointer;
1583
252b5132
RH
1584 return BFD_RELOC_UNUSED;
1585}
1586
1587/* Insert an operand value into an instruction. */
1588
1589static unsigned long
1590v850_insert_operand (insn, operand, val, file, line, str)
28e4f854
KH
1591 unsigned long insn;
1592 const struct v850_operand *operand;
1593 offsetT val;
1594 char *file;
1595 unsigned int line;
1596 char *str;
252b5132
RH
1597{
1598 if (operand->insert)
1599 {
28e4f854
KH
1600 const char *message = NULL;
1601
1602 insn = operand->insert (insn, val, &message);
252b5132
RH
1603 if (message != NULL)
1604 {
1605 if ((operand->flags & V850_OPERAND_SIGNED)
1606 && ! warn_signed_overflows
1607 && strstr (message, "out of range") != NULL)
1608 {
28e4f854 1609 /* Skip warning... */
252b5132
RH
1610 }
1611 else if ((operand->flags & V850_OPERAND_SIGNED) == 0
1612 && ! warn_unsigned_overflows
1613 && strstr (message, "out of range") != NULL)
1614 {
28e4f854 1615 /* Skip warning... */
252b5132
RH
1616 }
1617 else if (str)
1618 {
1619 if (file == (char *) NULL)
1620 as_warn ("%s: %s", str, message);
1621 else
1622 as_warn_where (file, line, "%s: %s", str, message);
1623 }
1624 else
1625 {
1626 if (file == (char *) NULL)
1627 as_warn (message);
1628 else
1629 as_warn_where (file, line, message);
1630 }
1631 }
1632 }
1633 else
1634 {
1635 if (operand->bits != 32)
1636 {
28e4f854 1637 long min, max;
252b5132
RH
1638
1639 if ((operand->flags & V850_OPERAND_SIGNED) != 0)
1640 {
1641 if (! warn_signed_overflows)
1642 max = (1 << operand->bits) - 1;
1643 else
1644 max = (1 << (operand->bits - 1)) - 1;
28e4f854
KH
1645
1646 min = -(1 << (operand->bits - 1));
252b5132
RH
1647 }
1648 else
1649 {
1650 max = (1 << operand->bits) - 1;
28e4f854 1651
252b5132 1652 if (! warn_unsigned_overflows)
28e4f854 1653 min = -(1 << (operand->bits - 1));
252b5132
RH
1654 else
1655 min = 0;
1656 }
28e4f854 1657
252b5132
RH
1658 if (val < (offsetT) min || val > (offsetT) max)
1659 {
28e4f854
KH
1660 /* xgettext:c-format */
1661 const char *err =
1662 _("operand out of range (%s not between %ld and %ld)");
1663 char buf[100];
1664
252b5132
RH
1665 /* Restore min and mix to expected values for decimal ranges. */
1666 if ((operand->flags & V850_OPERAND_SIGNED)
1667 && ! warn_signed_overflows)
1668 max = (1 << (operand->bits - 1)) - 1;
1669
1670 if (! (operand->flags & V850_OPERAND_SIGNED)
1671 && ! warn_unsigned_overflows)
1672 min = 0;
1673
1674 if (str)
1675 {
1676 sprintf (buf, "%s: ", str);
28e4f854 1677
252b5132
RH
1678 sprint_value (buf + strlen (buf), val);
1679 }
1680 else
1681 sprint_value (buf, val);
28e4f854 1682
252b5132
RH
1683 if (file == (char *) NULL)
1684 as_warn (err, buf, min, max);
1685 else
1686 as_warn_where (file, line, err, buf, min, max);
1687 }
1688 }
1689
1690 insn |= (((long) val & ((1 << operand->bits) - 1)) << operand->shift);
1691 }
28e4f854 1692
252b5132
RH
1693 return insn;
1694}
252b5132 1695\f
28e4f854 1696static char copy_of_instruction[128];
252b5132
RH
1697
1698void
28e4f854
KH
1699md_assemble (str)
1700 char *str;
252b5132 1701{
28e4f854
KH
1702 char *s;
1703 char *start_of_operands;
1704 struct v850_opcode *opcode;
1705 struct v850_opcode *next_opcode;
1706 const unsigned char *opindex_ptr;
1707 int next_opindex;
1708 int relaxable = 0;
1709 unsigned long insn;
1710 unsigned long insn_size;
1711 char *f;
1712 int i;
1713 int match;
1714 boolean extra_data_after_insn = false;
1715 unsigned extra_data_len = 0;
1716 unsigned long extra_data = 0;
1717 char *saved_input_line_pointer;
1718
252b5132 1719 strncpy (copy_of_instruction, str, sizeof (copy_of_instruction) - 1);
28e4f854 1720
252b5132
RH
1721 /* Get the opcode. */
1722 for (s = str; *s != '\0' && ! isspace (*s); s++)
1723 continue;
28e4f854 1724
252b5132
RH
1725 if (*s != '\0')
1726 *s++ = '\0';
1727
28e4f854 1728 /* Find the first opcode with the proper name. */
252b5132
RH
1729 opcode = (struct v850_opcode *) hash_find (v850_hash, str);
1730 if (opcode == NULL)
1731 {
28e4f854 1732 /* xgettext:c-format */
252b5132
RH
1733 as_bad (_("Unrecognized opcode: `%s'"), str);
1734 ignore_rest_of_line ();
1735 return;
1736 }
1737
1738 str = s;
28e4f854
KH
1739 while (isspace (*str))
1740 ++str;
252b5132
RH
1741
1742 start_of_operands = str;
1743
1744 saved_input_line_pointer = input_line_pointer;
28e4f854 1745
252b5132
RH
1746 for (;;)
1747 {
28e4f854 1748 const char *errmsg = NULL;
252b5132
RH
1749
1750 match = 0;
28e4f854 1751
252b5132
RH
1752 if ((opcode->processors & processor_mask) == 0)
1753 {
1754 errmsg = _("Target processor does not support this instruction.");
1755 goto error;
1756 }
28e4f854 1757
252b5132
RH
1758 relaxable = 0;
1759 fc = 0;
1760 next_opindex = 0;
1761 insn = opcode->opcode;
1762 extra_data_after_insn = false;
1763
1764 input_line_pointer = str = start_of_operands;
1765
28e4f854 1766 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
252b5132 1767 {
28e4f854
KH
1768 const struct v850_operand *operand;
1769 char *hold;
1770 expressionS ex;
1771 bfd_reloc_code_real_type reloc;
252b5132
RH
1772
1773 if (next_opindex == 0)
1774 {
28e4f854 1775 operand = &v850_operands[*opindex_ptr];
252b5132
RH
1776 }
1777 else
1778 {
28e4f854 1779 operand = &v850_operands[next_opindex];
252b5132
RH
1780 next_opindex = 0;
1781 }
1782
1783 errmsg = NULL;
1784
1785 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
28e4f854 1786 ++str;
252b5132
RH
1787
1788 if (operand->flags & V850_OPERAND_RELAX)
1789 relaxable = 1;
1790
28e4f854 1791 /* Gather the operand. */
252b5132
RH
1792 hold = input_line_pointer;
1793 input_line_pointer = str;
28e4f854
KH
1794
1795 /* lo(), hi(), hi0(), etc... */
252b5132
RH
1796 if ((reloc = v850_reloc_prefix (operand)) != BFD_RELOC_UNUSED)
1797 {
1798 /* This is a fake reloc, used to indicate an error condition. */
1799 if (reloc == BFD_RELOC_64)
1800 {
1801 match = 1;
1802 goto error;
1803 }
28e4f854
KH
1804
1805 expression (&ex);
252b5132
RH
1806
1807 if (ex.X_op == O_constant)
1808 {
1809 switch (reloc)
1810 {
1811 case BFD_RELOC_V850_ZDA_16_16_OFFSET:
1812 /* To cope with "not1 7, zdaoff(0xfffff006)[r0]"
1813 and the like. */
1814 /* Fall through. */
28e4f854 1815
252b5132
RH
1816 case BFD_RELOC_LO16:
1817 {
1818 /* Truncate, then sign extend the value. */
1819 ex.X_add_number = SEXT16 (ex.X_add_number);
1820 break;
1821 }
1822
1823 case BFD_RELOC_HI16:
1824 {
1825 /* Truncate, then sign extend the value. */
1826 ex.X_add_number = SEXT16 (ex.X_add_number >> 16);
1827 break;
1828 }
1829
1830 case BFD_RELOC_HI16_S:
1831 {
1832 /* Truncate, then sign extend the value. */
28e4f854 1833 int temp = (ex.X_add_number >> 16) & 0xffff;
252b5132
RH
1834
1835 temp += (ex.X_add_number >> 15) & 1;
1836
1837 ex.X_add_number = SEXT16 (temp);
1838 break;
1839 }
28e4f854 1840
252b5132
RH
1841 case BFD_RELOC_32:
1842 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1843 {
1844 errmsg = _("immediate operand is too large");
1845 goto error;
1846 }
28e4f854 1847
252b5132
RH
1848 extra_data_after_insn = true;
1849 extra_data_len = 4;
1850 extra_data = ex.X_add_number;
1851 ex.X_add_number = 0;
1852 break;
28e4f854 1853
252b5132
RH
1854 default:
1855 fprintf (stderr, "reloc: %d\n", reloc);
1856 as_bad (_("AAARG -> unhandled constant reloc"));
1857 break;
1858 }
1859
1860 if (fc > MAX_INSN_FIXUPS)
1861 as_fatal (_("too many fixups"));
28e4f854
KH
1862
1863 fixups[fc].exp = ex;
1864 fixups[fc].opindex = *opindex_ptr;
1865 fixups[fc].reloc = reloc;
252b5132
RH
1866 fc++;
1867 }
1868 else
1869 {
1870 if (reloc == BFD_RELOC_32)
1871 {
1872 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1873 {
1874 errmsg = _("immediate operand is too large");
1875 goto error;
1876 }
28e4f854 1877
252b5132
RH
1878 extra_data_after_insn = true;
1879 extra_data_len = 4;
1880 extra_data = ex.X_add_number;
1881 }
28e4f854 1882
252b5132
RH
1883 if (fc > MAX_INSN_FIXUPS)
1884 as_fatal (_("too many fixups"));
1885
28e4f854
KH
1886 fixups[fc].exp = ex;
1887 fixups[fc].opindex = *opindex_ptr;
1888 fixups[fc].reloc = reloc;
252b5132
RH
1889 fc++;
1890 }
1891 }
1892 else
1893 {
1894 errmsg = NULL;
28e4f854
KH
1895
1896 if ((operand->flags & V850_OPERAND_REG) != 0)
252b5132 1897 {
28e4f854 1898 if (!register_name (&ex))
252b5132
RH
1899 {
1900 errmsg = _("invalid register name");
1901 }
1902 else if ((operand->flags & V850_NOT_R0)
28e4f854 1903 && ex.X_add_number == 0)
252b5132
RH
1904 {
1905 errmsg = _("register r0 cannot be used here");
28e4f854 1906
252b5132
RH
1907 /* Force an error message to be generated by
1908 skipping over any following potential matches
1909 for this opcode. */
1910 opcode += 3;
1911 }
1912 }
28e4f854 1913 else if ((operand->flags & V850_OPERAND_SRG) != 0)
252b5132 1914 {
28e4f854 1915 if (!system_register_name (&ex, true, false))
252b5132
RH
1916 {
1917 errmsg = _("invalid system register name");
1918 }
1919 }
1920 else if ((operand->flags & V850_OPERAND_EP) != 0)
1921 {
28e4f854
KH
1922 char *start = input_line_pointer;
1923 char c = get_symbol_end ();
1924
252b5132
RH
1925 if (strcmp (start, "ep") != 0 && strcmp (start, "r30") != 0)
1926 {
1927 /* Put things back the way we found them. */
1928 *input_line_pointer = c;
1929 input_line_pointer = start;
1930 errmsg = _("expected EP register");
1931 goto error;
1932 }
28e4f854 1933
252b5132
RH
1934 *input_line_pointer = c;
1935 str = input_line_pointer;
1936 input_line_pointer = hold;
28e4f854
KH
1937
1938 while (*str == ' ' || *str == ','
1939 || *str == '[' || *str == ']')
1940 ++str;
252b5132
RH
1941 continue;
1942 }
28e4f854 1943 else if ((operand->flags & V850_OPERAND_CC) != 0)
252b5132 1944 {
28e4f854 1945 if (!cc_name (&ex))
252b5132
RH
1946 {
1947 errmsg = _("invalid condition code name");
1948 }
1949 }
28e4f854 1950 else if (operand->flags & V850E_PUSH_POP)
252b5132 1951 {
28e4f854
KH
1952 errmsg = parse_register_list (&insn, operand);
1953
252b5132
RH
1954 /* The parse_register_list() function has already done
1955 everything, so fake a dummy expression. */
1956 ex.X_op = O_constant;
1957 ex.X_add_number = 0;
1958 }
28e4f854 1959 else if (operand->flags & V850E_IMMEDIATE16)
252b5132 1960 {
28e4f854 1961 expression (&ex);
252b5132
RH
1962
1963 if (ex.X_op != O_constant)
1964 errmsg = _("constant expression expected");
1965 else if (ex.X_add_number & 0xffff0000)
1966 {
1967 if (ex.X_add_number & 0xffff)
1968 errmsg = _("constant too big to fit into instruction");
1969 else if ((insn & 0x001fffc0) == 0x00130780)
1970 ex.X_add_number >>= 16;
1971 else
1972 errmsg = _("constant too big to fit into instruction");
1973 }
28e4f854 1974
252b5132
RH
1975 extra_data_after_insn = true;
1976 extra_data_len = 2;
1977 extra_data = ex.X_add_number;
1978 ex.X_add_number = 0;
1979 }
28e4f854 1980 else if (operand->flags & V850E_IMMEDIATE32)
252b5132 1981 {
28e4f854
KH
1982 expression (&ex);
1983
252b5132
RH
1984 if (ex.X_op != O_constant)
1985 errmsg = _("constant expression expected");
28e4f854 1986
252b5132
RH
1987 extra_data_after_insn = true;
1988 extra_data_len = 4;
1989 extra_data = ex.X_add_number;
1990 ex.X_add_number = 0;
1991 }
28e4f854 1992 else if (register_name (&ex)
252b5132
RH
1993 && (operand->flags & V850_OPERAND_REG) == 0)
1994 {
1995 char c;
28e4f854
KH
1996 int exists = 0;
1997
252b5132
RH
1998 /* It is possible that an alias has been defined that
1999 matches a register name. For example the code may
2000 include a ".set ZERO, 0" directive, which matches
2001 the register name "zero". Attempt to reparse the
2002 field as an expression, and only complain if we
2003 cannot generate a constant. */
2004
2005 input_line_pointer = str;
2006
2007 c = get_symbol_end ();
28e4f854 2008
252b5132
RH
2009 if (symbol_find (str) != NULL)
2010 exists = 1;
28e4f854
KH
2011
2012 *input_line_pointer = c;
252b5132 2013 input_line_pointer = str;
28e4f854
KH
2014
2015 expression (&ex);
252b5132
RH
2016
2017 if (ex.X_op != O_constant)
2018 {
2019 /* If this register is actually occuring too early on
2020 the parsing of the instruction, (because another
2021 field is missing) then report this. */
2022 if (opindex_ptr[1] != 0
28e4f854
KH
2023 && (v850_operands[opindex_ptr[1]].flags
2024 & V850_OPERAND_REG))
252b5132
RH
2025 errmsg = _("syntax error: value is missing before the register name");
2026 else
2027 errmsg = _("syntax error: register not expected");
2028
28e4f854
KH
2029 /* If we created a symbol in the process of this
2030 test then delete it now, so that it will not
2031 be output with the real symbols... */
252b5132
RH
2032 if (exists == 0
2033 && ex.X_op == O_symbol)
2034 symbol_remove (ex.X_add_symbol,
28e4f854 2035 &symbol_rootP, &symbol_lastP);
252b5132
RH
2036 }
2037 }
28e4f854 2038 else if (system_register_name (&ex, false, false)
252b5132
RH
2039 && (operand->flags & V850_OPERAND_SRG) == 0)
2040 {
2041 errmsg = _("syntax error: system register not expected");
2042 }
2043 else if (cc_name (&ex)
2044 && (operand->flags & V850_OPERAND_CC) == 0)
2045 {
2046 errmsg = _("syntax error: condition code not expected");
2047 }
2048 else
2049 {
28e4f854 2050 expression (&ex);
252b5132
RH
2051 /* Special case:
2052 If we are assembling a MOV instruction (or a CALLT.... :-)
2053 and the immediate value does not fit into the bits
2054 available then create a fake error so that the next MOV
2055 instruction will be selected. This one has a 32 bit
2056 immediate field. */
2057
2058 if (((insn & 0x07e0) == 0x0200)
2059 && ex.X_op == O_constant
28e4f854 2060 && (ex.X_add_number < (-(1 << (operand->bits - 1)))
252b5132
RH
2061 || ex.X_add_number > ((1 << operand->bits) - 1)))
2062 errmsg = _("immediate operand is too large");
2063 }
2064
2065 if (errmsg)
2066 goto error;
252b5132 2067
28e4f854
KH
2068#if 0
2069 fprintf (stderr,
2070 " insn: %x, operand %d, op: %d, add_number: %d\n",
2071 insn, opindex_ptr - opcode->operands,
2072 ex.X_op, ex.X_add_number);
2073#endif
2074
2075 switch (ex.X_op)
252b5132
RH
2076 {
2077 case O_illegal:
2078 errmsg = _("illegal operand");
2079 goto error;
2080 case O_absent:
2081 errmsg = _("missing operand");
2082 goto error;
2083 case O_register:
28e4f854
KH
2084 if ((operand->flags
2085 & (V850_OPERAND_REG | V850_OPERAND_SRG)) == 0)
252b5132
RH
2086 {
2087 errmsg = _("invalid operand");
2088 goto error;
2089 }
2090 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2091 (char *) NULL, 0,
2092 copy_of_instruction);
2093 break;
2094
2095 case O_constant:
2096 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2097 (char *) NULL, 0,
2098 copy_of_instruction);
2099 break;
2100
2101 default:
2102 /* We need to generate a fixup for this expression. */
2103 if (fc >= MAX_INSN_FIXUPS)
2104 as_fatal (_("too many fixups"));
2105
28e4f854
KH
2106 fixups[fc].exp = ex;
2107 fixups[fc].opindex = *opindex_ptr;
2108 fixups[fc].reloc = BFD_RELOC_UNUSED;
252b5132
RH
2109 ++fc;
2110 break;
2111 }
2112 }
2113
2114 str = input_line_pointer;
2115 input_line_pointer = hold;
2116
2117 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']'
2118 || *str == ')')
2119 ++str;
2120 }
2121 match = 1;
2122
2123 error:
2124 if (match == 0)
28e4f854 2125 {
252b5132
RH
2126 next_opcode = opcode + 1;
2127 if (next_opcode->name != NULL
2128 && strcmp (next_opcode->name, opcode->name) == 0)
2129 {
2130 opcode = next_opcode;
2131
2132 /* Skip versions that are not supported by the target
2133 processor. */
2134 if ((opcode->processors & processor_mask) == 0)
2135 goto error;
28e4f854 2136
252b5132
RH
2137 continue;
2138 }
28e4f854 2139
252b5132 2140 as_bad ("%s: %s", copy_of_instruction, errmsg);
28e4f854
KH
2141
2142 if (*input_line_pointer == ']')
2143 ++input_line_pointer;
2144
252b5132
RH
2145 ignore_rest_of_line ();
2146 input_line_pointer = saved_input_line_pointer;
2147 return;
28e4f854 2148 }
252b5132
RH
2149 break;
2150 }
28e4f854 2151
252b5132
RH
2152 while (isspace (*str))
2153 ++str;
2154
2155 if (*str != '\0')
28e4f854 2156 /* xgettext:c-format */
252b5132
RH
2157 as_bad (_("junk at end of line: `%s'"), str);
2158
2159 input_line_pointer = str;
2160
28e4f854
KH
2161 /* Write out the instruction. */
2162
252b5132
RH
2163 if (relaxable && fc > 0)
2164 {
2165 insn_size = 2;
2166 fc = 0;
2167
2168 if (!strcmp (opcode->name, "br"))
2169 {
2170 f = frag_var (rs_machine_dependent, 4, 2, 2,
2171 fixups[0].exp.X_add_symbol,
2172 fixups[0].exp.X_add_number,
28e4f854 2173 (char *) fixups[0].opindex);
252b5132
RH
2174 md_number_to_chars (f, insn, insn_size);
2175 md_number_to_chars (f + 2, 0, 2);
2176 }
2177 else
2178 {
2179 f = frag_var (rs_machine_dependent, 6, 4, 0,
2180 fixups[0].exp.X_add_symbol,
2181 fixups[0].exp.X_add_number,
28e4f854 2182 (char *) fixups[0].opindex);
252b5132
RH
2183 md_number_to_chars (f, insn, insn_size);
2184 md_number_to_chars (f + 2, 0, 4);
2185 }
2186 }
28e4f854 2187 else
252b5132
RH
2188 {
2189 /* Four byte insns have an opcode with the two high bits on. */
2190 if ((insn & 0x0600) == 0x0600)
2191 insn_size = 4;
2192 else
2193 insn_size = 2;
2194
28e4f854 2195 /* Special case: 32 bit MOV. */
252b5132
RH
2196 if ((insn & 0xffe0) == 0x0620)
2197 insn_size = 2;
28e4f854 2198
252b5132 2199 f = frag_more (insn_size);
28e4f854 2200
252b5132
RH
2201 md_number_to_chars (f, insn, insn_size);
2202
2203 if (extra_data_after_insn)
2204 {
2205 f = frag_more (extra_data_len);
28e4f854 2206
252b5132
RH
2207 md_number_to_chars (f, extra_data, extra_data_len);
2208
2209 extra_data_after_insn = false;
2210 }
2211 }
2212
2213 /* Create any fixups. At this point we do not use a
2214 bfd_reloc_code_real_type, but instead just use the
2215 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2216 handle fixups for any operand type, although that is admittedly
2217 not a very exciting feature. We pick a BFD reloc type in
28e4f854 2218 md_apply_fix. */
252b5132
RH
2219 for (i = 0; i < fc; i++)
2220 {
28e4f854
KH
2221 const struct v850_operand *operand;
2222 bfd_reloc_code_real_type reloc;
2223
2224 operand = &v850_operands[fixups[i].opindex];
252b5132
RH
2225
2226 reloc = fixups[i].reloc;
28e4f854 2227
252b5132
RH
2228 if (reloc != BFD_RELOC_UNUSED)
2229 {
28e4f854
KH
2230 reloc_howto_type *reloc_howto =
2231 bfd_reloc_type_lookup (stdoutput, reloc);
2232 int size;
2233 int address;
2234 fixS *fixP;
252b5132
RH
2235
2236 if (!reloc_howto)
28e4f854
KH
2237 abort ();
2238
252b5132
RH
2239 size = bfd_get_reloc_size (reloc_howto);
2240
2241 /* XXX This will abort on an R_V850_8 reloc -
28e4f854
KH
2242 is this reloc actually used? */
2243 if (size != 2 && size != 4)
252b5132
RH
2244 abort ();
2245
2246 address = (f - frag_now->fr_literal) + insn_size - size;
2247
2248 if (reloc == BFD_RELOC_32)
28e4f854
KH
2249 address += 2;
2250
252b5132 2251 fixP = fix_new_exp (frag_now, address, size,
28e4f854 2252 &fixups[i].exp,
252b5132
RH
2253 reloc_howto->pc_relative,
2254 reloc);
2255
2256 switch (reloc)
2257 {
2258 case BFD_RELOC_LO16:
2259 case BFD_RELOC_HI16:
2260 case BFD_RELOC_HI16_S:
2261 fixP->fx_no_overflow = 1;
2262 break;
5480ccf3
NC
2263 default:
2264 break;
252b5132
RH
2265 }
2266 }
2267 else
2268 {
28e4f854 2269 fix_new_exp (frag_now,
252b5132
RH
2270 f - frag_now->fr_literal, 4,
2271 & fixups[i].exp,
28e4f854 2272 1 /* FIXME: V850_OPERAND_RELATIVE ??? */,
252b5132 2273 (bfd_reloc_code_real_type) (fixups[i].opindex
28e4f854 2274 + (int) BFD_RELOC_UNUSED));
252b5132
RH
2275 }
2276 }
2277
2278 input_line_pointer = saved_input_line_pointer;
2279}
2280
28e4f854
KH
2281/* If while processing a fixup, a reloc really needs to be created
2282 then it is done here. */
252b5132 2283
252b5132
RH
2284arelent *
2285tc_gen_reloc (seg, fixp)
28e4f854
KH
2286 asection *seg ATTRIBUTE_UNUSED;
2287 fixS *fixp;
252b5132 2288{
28e4f854
KH
2289 arelent *reloc;
2290
2291 reloc = (arelent *) xmalloc (sizeof (arelent));
2292 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
2293 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2294 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2295 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
252b5132
RH
2296
2297 if (reloc->howto == (reloc_howto_type *) NULL)
2298 {
2299 as_bad_where (fixp->fx_file, fixp->fx_line,
28e4f854
KH
2300 /* xgettext:c-format */
2301 _("reloc %d not supported by object file format"),
252b5132
RH
2302 (int) fixp->fx_r_type);
2303
2304 xfree (reloc);
28e4f854 2305
252b5132
RH
2306 return NULL;
2307 }
28e4f854
KH
2308
2309 if (fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY
252b5132
RH
2310 || fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT)
2311 reloc->addend = fixp->fx_offset;
2312 else
2313 reloc->addend = fixp->fx_addnumber;
28e4f854 2314
252b5132
RH
2315 return reloc;
2316}
2317
2318/* Assume everything will fit in two bytes, then expand as necessary. */
28e4f854 2319
252b5132
RH
2320int
2321md_estimate_size_before_relax (fragp, seg)
28e4f854
KH
2322 fragS *fragp;
2323 asection *seg ATTRIBUTE_UNUSED;
252b5132
RH
2324{
2325 if (fragp->fr_subtype == 0)
2326 fragp->fr_var = 4;
2327 else if (fragp->fr_subtype == 2)
2328 fragp->fr_var = 2;
2329 else
2330 abort ();
2331 return 2;
28e4f854 2332}
252b5132
RH
2333
2334long
2335v850_pcrel_from_section (fixp, section)
28e4f854
KH
2336 fixS *fixp;
2337 segT section;
252b5132
RH
2338{
2339 /* If the symbol is undefined, or in a section other than our own,
d6c497c7 2340 or it is weak (in which case it may well be in another section,
252b5132
RH
2341 then let the linker figure it out. */
2342 if (fixp->fx_addsy != (symbolS *) NULL
2343 && (! S_IS_DEFINED (fixp->fx_addsy)
d6c497c7 2344 || S_IS_WEAK (fixp->fx_addsy)
252b5132 2345 || (S_GET_SEGMENT (fixp->fx_addsy) != section)))
d6c497c7 2346 return 0;
28e4f854 2347
252b5132
RH
2348 return fixp->fx_frag->fr_address + fixp->fx_where;
2349}
2350
2351int
2352md_apply_fix3 (fixp, valuep, seg)
28e4f854
KH
2353 fixS *fixp;
2354 valueT *valuep;
2355 segT seg ATTRIBUTE_UNUSED;
252b5132
RH
2356{
2357 valueT value;
28e4f854 2358 char *where;
252b5132 2359
28e4f854 2360 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
252b5132
RH
2361 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2362 {
2363 fixp->fx_done = 0;
2364 return 1;
2365 }
2366
2367 if (fixp->fx_addsy == (symbolS *) NULL)
2368 {
28e4f854 2369 value = *valuep;
252b5132
RH
2370 fixp->fx_done = 1;
2371 }
2372 else if (fixp->fx_pcrel)
28e4f854 2373 value = *valuep;
252b5132
RH
2374 else
2375 {
2376 value = fixp->fx_offset;
2377 if (fixp->fx_subsy != (symbolS *) NULL)
2378 {
2379 if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
2380 value -= S_GET_VALUE (fixp->fx_subsy);
2381 else
2382 {
2383 /* We don't actually support subtracting a symbol. */
2384 as_bad_where (fixp->fx_file, fixp->fx_line,
2385 _("expression too complex"));
2386 }
2387 }
2388 }
2389
2390 if ((int) fixp->fx_r_type >= (int) BFD_RELOC_UNUSED)
2391 {
28e4f854
KH
2392 int opindex;
2393 const struct v850_operand *operand;
2394 unsigned long insn;
252b5132
RH
2395
2396 opindex = (int) fixp->fx_r_type - (int) BFD_RELOC_UNUSED;
28e4f854 2397 operand = &v850_operands[opindex];
252b5132
RH
2398
2399 /* Fetch the instruction, insert the fully resolved operand
2400 value, and stuff the instruction back again.
2401
2402 Note the instruction has been stored in little endian
2403 format! */
2404 where = fixp->fx_frag->fr_literal + fixp->fx_where;
2405
2406 insn = bfd_getl32 ((unsigned char *) where);
2407 insn = v850_insert_operand (insn, operand, (offsetT) value,
2408 fixp->fx_file, fixp->fx_line, NULL);
2409 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
2410
2411 if (fixp->fx_done)
2412 {
28e4f854 2413 /* Nothing else to do here. */
252b5132
RH
2414 return 1;
2415 }
2416
28e4f854
KH
2417 /* Determine a BFD reloc value based on the operand information.
2418 We are only prepared to turn a few of the operands into relocs. */
252b5132
RH
2419
2420 if (operand->bits == 22)
2421 fixp->fx_r_type = BFD_RELOC_V850_22_PCREL;
2422 else if (operand->bits == 9)
2423 fixp->fx_r_type = BFD_RELOC_V850_9_PCREL;
2424 else
2425 {
28e4f854
KH
2426#if 0
2427 fprintf (stderr, "bits: %d, insn: %x\n", operand->bits, insn);
2428#endif
2429
252b5132 2430 as_bad_where (fixp->fx_file, fixp->fx_line,
28e4f854 2431 _("unresolved expression that must be resolved"));
252b5132
RH
2432 fixp->fx_done = 1;
2433 return 1;
2434 }
2435 }
2436 else if (fixp->fx_done)
2437 {
2438 /* We still have to insert the value into memory! */
2439 where = fixp->fx_frag->fr_literal + fixp->fx_where;
2440
2441 if (fixp->fx_size == 1)
28e4f854 2442 *where = value & 0xff;
252b5132
RH
2443 else if (fixp->fx_size == 2)
2444 bfd_putl16 (value & 0xffff, (unsigned char *) where);
2445 else if (fixp->fx_size == 4)
2446 bfd_putl32 (value, (unsigned char *) where);
2447 }
28e4f854 2448
252b5132
RH
2449 fixp->fx_addnumber = value;
2450 return 1;
2451}
252b5132
RH
2452\f
2453/* Parse a cons expression. We have to handle hi(), lo(), etc
2454 on the v850. */
28e4f854 2455
252b5132
RH
2456void
2457parse_cons_expression_v850 (exp)
28e4f854 2458 expressionS *exp;
252b5132
RH
2459{
2460 /* See if there's a reloc prefix like hi() we have to handle. */
2461 hold_cons_reloc = v850_reloc_prefix (NULL);
2462
2463 /* Do normal expression parsing. */
2464 expression (exp);
2465}
2466
2467/* Create a fixup for a cons expression. If parse_cons_expression_v850
2468 found a reloc prefix, then we use that reloc, else we choose an
2469 appropriate one based on the size of the expression. */
28e4f854 2470
252b5132
RH
2471void
2472cons_fix_new_v850 (frag, where, size, exp)
28e4f854 2473 fragS *frag;
252b5132
RH
2474 int where;
2475 int size;
2476 expressionS *exp;
2477{
2478 if (hold_cons_reloc == BFD_RELOC_UNUSED)
2479 {
2480 if (size == 4)
2481 hold_cons_reloc = BFD_RELOC_32;
2482 if (size == 2)
2483 hold_cons_reloc = BFD_RELOC_16;
2484 if (size == 1)
2485 hold_cons_reloc = BFD_RELOC_8;
2486 }
2487
2488 if (exp != NULL)
2489 fix_new_exp (frag, where, size, exp, 0, hold_cons_reloc);
2490 else
2491 fix_new (frag, where, size, NULL, 0, 0, hold_cons_reloc);
2492}
d6c497c7 2493
252b5132
RH
2494boolean
2495v850_fix_adjustable (fixP)
28e4f854 2496 fixS *fixP;
252b5132 2497{
252b5132
RH
2498 if (fixP->fx_addsy == NULL)
2499 return 1;
28e4f854
KH
2500
2501 /* Prevent all adjustments to global symbols. */
252b5132
RH
2502 if (S_IS_EXTERN (fixP->fx_addsy))
2503 return 0;
28e4f854 2504
5480ccf3 2505 /* Similarly for weak symbols. */
252b5132
RH
2506 if (S_IS_WEAK (fixP->fx_addsy))
2507 return 0;
28e4f854
KH
2508
2509 /* Don't adjust function names. */
252b5132
RH
2510 if (S_IS_FUNCTION (fixP->fx_addsy))
2511 return 0;
2512
28e4f854
KH
2513 /* We need the symbol name for the VTABLE entries. */
2514 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
252b5132
RH
2515 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2516 return 0;
28e4f854 2517
252b5132
RH
2518 return 1;
2519}
28e4f854 2520
252b5132 2521int
d6c497c7 2522v850_force_relocation (fixP)
28e4f854 2523 struct fix *fixP;
252b5132 2524{
d6c497c7
NC
2525 if (fixP->fx_addsy && S_IS_WEAK (fixP->fx_addsy))
2526 return 1;
28e4f854
KH
2527
2528 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
d6c497c7 2529 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
252b5132 2530 return 1;
28e4f854 2531
252b5132
RH
2532 return 0;
2533}
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