Fix v850 .offset pseudo-op
[deliverable/binutils-gdb.git] / gas / config / tc-v850.c
CommitLineData
252b5132 1/* tc-v850.c -- Assembler code for the NEC V850
9e0665bc 2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002
507c8a1a 3 Free Software Foundation, Inc.
252b5132
RH
4
5 This file is part of GAS, the GNU Assembler.
6
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include <stdio.h>
252b5132 23#include "as.h"
3882b010 24#include "safe-ctype.h"
28e4f854 25#include "subsegs.h"
252b5132 26#include "opcode/v850.h"
a8761a19 27#include "dwarf2dbg.h"
252b5132 28
28e4f854
KH
29/* Sign-extend a 16-bit number. */
30#define SEXT16(x) ((((x) & 0xffff) ^ (~0x7fff)) + 0x8000)
252b5132
RH
31
32/* Temporarily holds the reloc in a cons expression. */
a8761a19 33static bfd_reloc_code_real_type hold_cons_reloc = BFD_RELOC_UNUSED;
252b5132
RH
34
35/* Set to TRUE if we want to be pedantic about signed overflows. */
36static boolean warn_signed_overflows = FALSE;
37static boolean warn_unsigned_overflows = FALSE;
38
39/* Indicates the target BFD machine number. */
28e4f854 40static int machine = -1;
252b5132
RH
41
42/* Indicates the target processor(s) for the assemble. */
28e4f854 43static int processor_mask = -1;
252b5132
RH
44\f
45/* Structure to hold information about predefined registers. */
19d63e5d 46struct reg_name {
28e4f854
KH
47 const char *name;
48 int value;
252b5132
RH
49};
50
28e4f854
KH
51/* Generic assembler global variables which must be defined by all
52 targets. */
252b5132 53
28e4f854 54/* Characters which always start a comment. */
252b5132
RH
55const char comment_chars[] = "#";
56
57/* Characters which start a comment at the beginning of a line. */
58const char line_comment_chars[] = ";#";
59
28e4f854 60/* Characters which may be used to separate multiple commands on a
252b5132
RH
61 single line. */
62const char line_separator_chars[] = ";";
63
28e4f854 64/* Characters which are used to indicate an exponent in a floating
252b5132
RH
65 point number. */
66const char EXP_CHARS[] = "eE";
67
28e4f854 68/* Characters which mean that a number is a floating point constant,
252b5132
RH
69 as in 0d1.0. */
70const char FLT_CHARS[] = "dD";
71\f
19d63e5d 72const relax_typeS md_relax_table[] = {
252b5132
RH
73 /* Conditional branches. */
74 {0xff, -0x100, 2, 1},
75 {0x1fffff, -0x200000, 6, 0},
76 /* Unconditional branches. */
77 {0xff, -0x100, 2, 3},
78 {0x1fffff, -0x200000, 4, 0},
79};
80
86aba9db
NC
81static int v850_relax = 0;
82
28e4f854 83/* Fixups. */
252b5132 84#define MAX_INSN_FIXUPS (5)
19d63e5d 85struct v850_fixup {
28e4f854
KH
86 expressionS exp;
87 int opindex;
252b5132
RH
88 bfd_reloc_code_real_type reloc;
89};
90
28e4f854 91struct v850_fixup fixups[MAX_INSN_FIXUPS];
252b5132 92static int fc;
252b5132 93
9e0665bc 94struct v850_seg_entry
252b5132 95{
9e0665bc
AM
96 segT s;
97 const char *name;
98 flagword flags;
99};
252b5132 100
9e0665bc 101struct v850_seg_entry v850_seg_table[] =
252b5132 102{
9e0665bc
AM
103 { NULL, ".sdata",
104 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
105 | SEC_SMALL_DATA },
106 { NULL, ".tdata",
107 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
108 { NULL, ".zdata",
109 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
110 { NULL, ".sbss",
111 SEC_ALLOC | SEC_SMALL_DATA },
112 { NULL, ".tbss",
113 SEC_ALLOC },
114 { NULL, ".zbss",
115 SEC_ALLOC},
116 { NULL, ".rosdata",
117 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_DATA
118 | SEC_HAS_CONTENTS | SEC_SMALL_DATA },
119 { NULL, ".rozdata",
120 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_DATA
121 | SEC_HAS_CONTENTS },
122 { NULL, ".scommon",
123 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
124 | SEC_SMALL_DATA | SEC_IS_COMMON },
125 { NULL, ".tcommon",
126 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
127 | SEC_IS_COMMON },
128 { NULL, ".zcommon",
129 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS
130 | SEC_IS_COMMON },
131 { NULL, ".call_table_data",
132 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_DATA | SEC_HAS_CONTENTS },
133 { NULL, ".call_table_text",
134 SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY | SEC_CODE
135 | SEC_HAS_CONTENTS},
136 { NULL, ".bss",
137 SEC_ALLOC }
138};
28e4f854 139
9e0665bc
AM
140#define SDATA_SECTION 0
141#define TDATA_SECTION 1
142#define ZDATA_SECTION 2
143#define SBSS_SECTION 3
144#define TBSS_SECTION 4
145#define ZBSS_SECTION 5
146#define ROSDATA_SECTION 6
147#define ROZDATA_SECTION 7
148#define SCOMMON_SECTION 8
149#define TCOMMON_SECTION 9
150#define ZCOMMON_SECTION 10
151#define CALL_TABLE_DATA_SECTION 11
152#define CALL_TABLE_TEXT_SECTION 12
153#define BSS_SECTION 13
154
155static void do_v850_seg PARAMS ((int, subsegT));
252b5132 156
9e0665bc
AM
157static void
158do_v850_seg (i, sub)
159 int i;
160 subsegT sub;
252b5132 161{
9e0665bc 162 struct v850_seg_entry *seg = v850_seg_table + i;
28e4f854 163
28e4f854 164 obj_elf_section_change_hook ();
9e0665bc
AM
165 if (seg->s != NULL)
166 {
167 subseg_set (seg->s, sub);
168 }
169 else
170 {
171 seg->s = subseg_new (seg->name, sub);
172 bfd_set_section_flags (stdoutput, seg->s, seg->flags);
173 if ((seg->flags & SEC_LOAD) == 0)
174 seg_info (seg->s)->bss = 1;
175 }
252b5132
RH
176}
177
9e0665bc 178static void v850_seg PARAMS ((int i));
28e4f854 179
9e0665bc
AM
180static void
181v850_seg (i)
182 int i;
252b5132 183{
9e0665bc 184 subsegT sub = get_absolute_expression ();
28e4f854 185
9e0665bc 186 do_v850_seg (i, sub);
252b5132
RH
187 demand_empty_rest_of_line ();
188}
189
9e0665bc 190static void v850_offset PARAMS ((int));
28e4f854 191
9e0665bc
AM
192static void
193v850_offset (ignore)
194 int ignore ATTRIBUTE_UNUSED;
252b5132 195{
825487fa 196 char *pfrag;
252b5132 197 int temp = get_absolute_expression ();
825487fa
JW
198
199 pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, (symbolS *)0,
200 (offsetT) temp, (char *) 0);
201 *pfrag = 0;
28e4f854 202
252b5132
RH
203 demand_empty_rest_of_line ();
204}
205
28e4f854
KH
206/* Copied from obj_elf_common() in gas/config/obj-elf.c. */
207
9e0665bc
AM
208static void v850_comm PARAMS ((int));
209
252b5132
RH
210static void
211v850_comm (area)
212 int area;
213{
28e4f854
KH
214 char *name;
215 char c;
216 char *p;
217 int temp;
218 unsigned int size;
219 symbolS *symbolP;
220 int have_align;
252b5132
RH
221
222 name = input_line_pointer;
223 c = get_symbol_end ();
28e4f854
KH
224
225 /* Just after name is now '\0'. */
252b5132
RH
226 p = input_line_pointer;
227 *p = c;
28e4f854 228
252b5132 229 SKIP_WHITESPACE ();
28e4f854 230
252b5132
RH
231 if (*input_line_pointer != ',')
232 {
233 as_bad (_("Expected comma after symbol-name"));
234 ignore_rest_of_line ();
235 return;
236 }
28e4f854
KH
237
238 /* Skip ','. */
239 input_line_pointer++;
240
252b5132
RH
241 if ((temp = get_absolute_expression ()) < 0)
242 {
28e4f854 243 /* xgettext:c-format */
252b5132
RH
244 as_bad (_(".COMMon length (%d.) < 0! Ignored."), temp);
245 ignore_rest_of_line ();
246 return;
247 }
28e4f854 248
252b5132
RH
249 size = temp;
250 *p = 0;
251 symbolP = symbol_find_or_make (name);
252 *p = c;
28e4f854 253
252b5132
RH
254 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
255 {
256 as_bad (_("Ignoring attempt to re-define symbol"));
257 ignore_rest_of_line ();
258 return;
259 }
28e4f854 260
252b5132
RH
261 if (S_GET_VALUE (symbolP) != 0)
262 {
263 if (S_GET_VALUE (symbolP) != size)
264 {
28e4f854 265 /* xgettext:c-format */
252b5132
RH
266 as_warn (_("Length of .comm \"%s\" is already %ld. Not changed to %d."),
267 S_GET_NAME (symbolP), (long) S_GET_VALUE (symbolP), size);
268 }
269 }
28e4f854
KH
270
271 know (symbol_get_frag (symbolP) == &zero_address_frag);
272
252b5132
RH
273 if (*input_line_pointer != ',')
274 have_align = 0;
275 else
276 {
277 have_align = 1;
278 input_line_pointer++;
279 SKIP_WHITESPACE ();
280 }
28e4f854 281
252b5132
RH
282 if (! have_align || *input_line_pointer != '"')
283 {
284 if (! have_align)
285 temp = 0;
286 else
287 {
288 temp = get_absolute_expression ();
28e4f854 289
252b5132
RH
290 if (temp < 0)
291 {
292 temp = 0;
293 as_warn (_("Common alignment negative; 0 assumed"));
294 }
295 }
28e4f854 296
cac58fa6 297 if (symbol_get_obj (symbolP)->local)
252b5132 298 {
28e4f854
KH
299 segT old_sec;
300 int old_subsec;
301 char *pfrag;
302 int align;
303 flagword applicable;
252b5132
RH
304
305 old_sec = now_seg;
306 old_subsec = now_subseg;
28e4f854 307
252b5132 308 applicable = bfd_applicable_section_flags (stdoutput);
28e4f854 309
252b5132 310 applicable &= SEC_ALLOC;
28e4f854 311
252b5132
RH
312 switch (area)
313 {
9e0665bc
AM
314 case SCOMMON_SECTION:
315 do_v850_seg (SBSS_SECTION, 0);
252b5132 316 break;
28e4f854 317
9e0665bc
AM
318 case ZCOMMON_SECTION:
319 do_v850_seg (ZBSS_SECTION, 0);
252b5132 320 break;
28e4f854 321
9e0665bc
AM
322 case TCOMMON_SECTION:
323 do_v850_seg (TBSS_SECTION, 0);
252b5132
RH
324 break;
325 }
326
327 if (temp)
328 {
28e4f854 329 /* Convert to a power of 2 alignment. */
252b5132
RH
330 for (align = 0; (temp & 1) == 0; temp >>= 1, ++align)
331 ;
28e4f854 332
252b5132
RH
333 if (temp != 1)
334 {
335 as_bad (_("Common alignment not a power of 2"));
336 ignore_rest_of_line ();
337 return;
338 }
339 }
340 else
341 align = 0;
28e4f854 342
9e0665bc 343 record_alignment (now_seg, align);
28e4f854 344
252b5132
RH
345 if (align)
346 frag_align (align, 0, 0);
347
348 switch (area)
349 {
9e0665bc
AM
350 case SCOMMON_SECTION:
351 if (S_GET_SEGMENT (symbolP) == v850_seg_table[SBSS_SECTION].s)
7dcc9865 352 symbol_get_frag (symbolP)->fr_symbol = 0;
252b5132
RH
353 break;
354
9e0665bc
AM
355 case ZCOMMON_SECTION:
356 if (S_GET_SEGMENT (symbolP) == v850_seg_table[ZBSS_SECTION].s)
7dcc9865 357 symbol_get_frag (symbolP)->fr_symbol = 0;
252b5132
RH
358 break;
359
9e0665bc
AM
360 case TCOMMON_SECTION:
361 if (S_GET_SEGMENT (symbolP) == v850_seg_table[TBSS_SECTION].s)
7dcc9865 362 symbol_get_frag (symbolP)->fr_symbol = 0;
252b5132
RH
363 break;
364
365 default:
cac58fa6 366 abort ();
252b5132 367 }
28e4f854 368
7dcc9865 369 symbol_set_frag (symbolP, frag_now);
252b5132
RH
370 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP,
371 (offsetT) size, (char *) 0);
372 *pfrag = 0;
373 S_SET_SIZE (symbolP, size);
28e4f854 374
252b5132
RH
375 switch (area)
376 {
9e0665bc
AM
377 case SCOMMON_SECTION:
378 S_SET_SEGMENT (symbolP, v850_seg_table[SBSS_SECTION].s);
252b5132 379 break;
28e4f854 380
9e0665bc
AM
381 case ZCOMMON_SECTION:
382 S_SET_SEGMENT (symbolP, v850_seg_table[ZBSS_SECTION].s);
252b5132 383 break;
28e4f854 384
9e0665bc
AM
385 case TCOMMON_SECTION:
386 S_SET_SEGMENT (symbolP, v850_seg_table[TBSS_SECTION].s);
252b5132 387 break;
28e4f854 388
252b5132 389 default:
28e4f854 390 abort ();
252b5132 391 }
28e4f854 392
252b5132 393 S_CLEAR_EXTERNAL (symbolP);
28e4f854 394 obj_elf_section_change_hook ();
252b5132
RH
395 subseg_set (old_sec, old_subsec);
396 }
397 else
398 {
86aba9db
NC
399 segT old_sec;
400 int old_subsec;
401
252b5132 402 allocate_common:
86aba9db
NC
403 old_sec = now_seg;
404 old_subsec = now_subseg;
405
252b5132
RH
406 S_SET_VALUE (symbolP, (valueT) size);
407 S_SET_ALIGN (symbolP, temp);
408 S_SET_EXTERNAL (symbolP);
28e4f854 409
252b5132
RH
410 switch (area)
411 {
9e0665bc
AM
412 case SCOMMON_SECTION:
413 case ZCOMMON_SECTION:
414 case TCOMMON_SECTION:
415 do_v850_seg (area, 0);
416 S_SET_SEGMENT (symbolP, v850_seg_table[area].s);
252b5132 417 break;
28e4f854 418
252b5132 419 default:
28e4f854 420 abort ();
252b5132 421 }
86aba9db
NC
422
423 obj_elf_section_change_hook ();
424 subseg_set (old_sec, old_subsec);
252b5132
RH
425 }
426 }
427 else
428 {
429 input_line_pointer++;
28e4f854 430
252b5132
RH
431 /* @@ Some use the dot, some don't. Can we get some consistency?? */
432 if (*input_line_pointer == '.')
433 input_line_pointer++;
28e4f854 434
252b5132
RH
435 /* @@ Some say data, some say bss. */
436 if (strncmp (input_line_pointer, "bss\"", 4)
437 && strncmp (input_line_pointer, "data\"", 5))
438 {
439 while (*--input_line_pointer != '"')
440 ;
441 input_line_pointer--;
442 goto bad_common_segment;
443 }
444 while (*input_line_pointer++ != '"')
445 ;
446 goto allocate_common;
447 }
448
fed9b18a 449 symbol_get_bfdsym (symbolP)->flags |= BSF_OBJECT;
252b5132
RH
450
451 demand_empty_rest_of_line ();
452 return;
453
454 {
455 bad_common_segment:
456 p = input_line_pointer;
457 while (*p && *p != '\n')
458 p++;
459 c = *p;
460 *p = '\0';
461 as_bad (_("bad .common segment %s"), input_line_pointer + 1);
462 *p = c;
463 input_line_pointer = p;
464 ignore_rest_of_line ();
465 return;
466 }
467}
468
9e0665bc
AM
469static void set_machine PARAMS ((int));
470
471static void
472set_machine (number)
473 int number;
252b5132
RH
474{
475 machine = number;
476 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
477
478 switch (machine)
479 {
28e4f854
KH
480 case 0: processor_mask = PROCESSOR_V850; break;
481 case bfd_mach_v850e: processor_mask = PROCESSOR_V850E; break;
252b5132
RH
482 }
483}
484
86aba9db
NC
485static void v850_longcode PARAMS ((int));
486
487static void
488v850_longcode (type)
489 int type;
490{
491 expressionS ex;
492
493 if (! v850_relax)
494 {
495 if (type == 1)
496 as_warn (".longcall pseudo-op seen when not relaxing");
497 else
498 as_warn (".longjump pseudo-op seen when not relaxing");
499 }
500
501 expression (&ex);
502
503 if (ex.X_op != O_symbol || ex.X_add_number != 0)
504 {
505 as_bad ("bad .longcall format");
506 ignore_rest_of_line ();
507
508 return;
509 }
510
511 if (type == 1)
512 fix_new_exp (frag_now, frag_now_fix (), 4, & ex, 1,
513 BFD_RELOC_V850_LONGCALL);
514 else
515 fix_new_exp (frag_now, frag_now_fix (), 4, & ex, 1,
516 BFD_RELOC_V850_LONGJUMP);
517
518 demand_empty_rest_of_line ();
519}
520
252b5132 521/* The target specific pseudo-ops which we support. */
19d63e5d 522const pseudo_typeS md_pseudo_table[] = {
9e0665bc
AM
523 { "sdata", v850_seg, SDATA_SECTION },
524 { "tdata", v850_seg, TDATA_SECTION },
525 { "zdata", v850_seg, ZDATA_SECTION },
526 { "sbss", v850_seg, SBSS_SECTION },
527 { "tbss", v850_seg, TBSS_SECTION },
528 { "zbss", v850_seg, ZBSS_SECTION },
529 { "rosdata", v850_seg, ROSDATA_SECTION },
530 { "rozdata", v850_seg, ROZDATA_SECTION },
531 { "bss", v850_seg, BSS_SECTION },
532 { "offset", v850_offset, 0 },
533 { "word", cons, 4 },
534 { "zcomm", v850_comm, ZCOMMON_SECTION },
535 { "scomm", v850_comm, SCOMMON_SECTION },
536 { "tcomm", v850_comm, TCOMMON_SECTION },
537 { "v850", set_machine, 0 },
538 { "call_table_data", v850_seg, CALL_TABLE_DATA_SECTION },
539 { "call_table_text", v850_seg, CALL_TABLE_TEXT_SECTION },
540 { "v850e", set_machine, bfd_mach_v850e },
9f1838ed 541 { "file", (void (*) PARAMS ((int))) dwarf2_directive_file, 0 },
9e0665bc 542 { "loc", dwarf2_directive_loc, 0 },
86aba9db
NC
543 { "longcall", v850_longcode, 1 },
544 { "longjump", v850_longcode, 2 },
9e0665bc 545 { NULL, NULL, 0 }
252b5132
RH
546};
547
548/* Opcode hash table. */
549static struct hash_control *v850_hash;
550
28e4f854 551/* This table is sorted. Suitable for searching by a binary search. */
19d63e5d 552static const struct reg_name pre_defined_registers[] = {
252b5132 553 { "ep", 30 }, /* ep - element ptr */
28e4f854
KH
554 { "gp", 4 }, /* gp - global ptr */
555 { "hp", 2 }, /* hp - handler stack ptr */
556 { "lp", 31 }, /* lp - link ptr */
252b5132
RH
557 { "r0", 0 },
558 { "r1", 1 },
559 { "r10", 10 },
560 { "r11", 11 },
561 { "r12", 12 },
562 { "r13", 13 },
563 { "r14", 14 },
564 { "r15", 15 },
565 { "r16", 16 },
566 { "r17", 17 },
567 { "r18", 18 },
568 { "r19", 19 },
569 { "r2", 2 },
570 { "r20", 20 },
571 { "r21", 21 },
572 { "r22", 22 },
573 { "r23", 23 },
574 { "r24", 24 },
575 { "r25", 25 },
576 { "r26", 26 },
577 { "r27", 27 },
578 { "r28", 28 },
579 { "r29", 29 },
580 { "r3", 3 },
581 { "r30", 30 },
582 { "r31", 31 },
583 { "r4", 4 },
584 { "r5", 5 },
585 { "r6", 6 },
586 { "r7", 7 },
587 { "r8", 8 },
588 { "r9", 9 },
28e4f854
KH
589 { "sp", 3 }, /* sp - stack ptr */
590 { "tp", 5 }, /* tp - text ptr */
252b5132
RH
591 { "zero", 0 },
592};
252b5132 593
28e4f854
KH
594#define REG_NAME_CNT \
595 (sizeof (pre_defined_registers) / sizeof (struct reg_name))
252b5132 596
19d63e5d 597static const struct reg_name system_registers[] = {
252b5132
RH
598 { "ctbp", 20 },
599 { "ctpc", 16 },
600 { "ctpsw", 17 },
601 { "dbpc", 18 },
602 { "dbpsw", 19 },
603 { "ecr", 4 },
604 { "eipc", 0 },
605 { "eipsw", 1 },
606 { "fepc", 2 },
607 { "fepsw", 3 },
608 { "psw", 5 },
609};
28e4f854
KH
610
611#define SYSREG_NAME_CNT \
612 (sizeof (system_registers) / sizeof (struct reg_name))
252b5132 613
19d63e5d 614static const struct reg_name system_list_registers[] = {
252b5132
RH
615 {"PS", 5 },
616 {"SR", 0 + 1}
617};
28e4f854
KH
618
619#define SYSREGLIST_NAME_CNT \
620 (sizeof (system_list_registers) / sizeof (struct reg_name))
252b5132 621
19d63e5d 622static const struct reg_name cc_names[] = {
252b5132
RH
623 { "c", 0x1 },
624 { "e", 0x2 },
625 { "ge", 0xe },
626 { "gt", 0xf },
627 { "h", 0xb },
628 { "l", 0x1 },
629 { "le", 0x7 },
630 { "lt", 0x6 },
631 { "n", 0x4 },
632 { "nc", 0x9 },
633 { "ne", 0xa },
634 { "nh", 0x3 },
635 { "nl", 0x9 },
636 { "ns", 0xc },
637 { "nv", 0x8 },
638 { "nz", 0xa },
639 { "p", 0xc },
640 { "s", 0x4 },
641 { "sa", 0xd },
642 { "t", 0x5 },
643 { "v", 0x0 },
644 { "z", 0x2 },
645};
252b5132 646
28e4f854
KH
647#define CC_NAME_CNT \
648 (sizeof (cc_names) / sizeof (struct reg_name))
649
650/* Do a binary search of the given register table to see if NAME is a
651 valid regiter name. Return the register number from the array on
652 success, or -1 on failure. */
252b5132 653
9e0665bc
AM
654static int reg_name_search
655 PARAMS ((const struct reg_name *, int, const char *, boolean));
656
252b5132
RH
657static int
658reg_name_search (regs, regcount, name, accept_numbers)
28e4f854
KH
659 const struct reg_name *regs;
660 int regcount;
661 const char *name;
662 boolean accept_numbers;
252b5132
RH
663{
664 int middle, low, high;
665 int cmp;
28e4f854 666 symbolS *symbolP;
252b5132
RH
667
668 /* If the register name is a symbol, then evaluate it. */
669 if ((symbolP = symbol_find (name)) != NULL)
670 {
671 /* If the symbol is an alias for another name then use that.
672 If the symbol is an alias for a number, then return the number. */
a77f5182 673 if (symbol_equated_p (symbolP))
252b5132 674 {
28e4f854
KH
675 name
676 = S_GET_NAME (symbol_get_value_expression (symbolP)->X_add_symbol);
252b5132
RH
677 }
678 else if (accept_numbers)
679 {
680 int reg = S_GET_VALUE (symbolP);
28e4f854 681
252b5132
RH
682 if (reg >= 0 && reg <= 31)
683 return reg;
684 }
685
686 /* Otherwise drop through and try parsing name normally. */
687 }
28e4f854 688
252b5132
RH
689 low = 0;
690 high = regcount - 1;
691
692 do
693 {
694 middle = (low + high) / 2;
695 cmp = strcasecmp (name, regs[middle].name);
696 if (cmp < 0)
697 high = middle - 1;
698 else if (cmp > 0)
699 low = middle + 1;
700 else
701 return regs[middle].value;
702 }
703 while (low <= high);
704 return -1;
705}
706
252b5132
RH
707/* Summary of register_name().
708 *
709 * in: Input_line_pointer points to 1st char of operand.
710 *
b6ff326e 711 * out: An expressionS.
252b5132
RH
712 * The operand may have been a register: in this case, X_op == O_register,
713 * X_add_number is set to the register number, and truth is returned.
714 * Input_line_pointer->(next non-blank) char after operand, or is in
28e4f854
KH
715 * its original state. */
716
9e0665bc
AM
717static boolean register_name PARAMS ((expressionS *));
718
252b5132
RH
719static boolean
720register_name (expressionP)
28e4f854 721 expressionS *expressionP;
252b5132 722{
28e4f854
KH
723 int reg_number;
724 char *name;
725 char *start;
726 char c;
252b5132 727
28e4f854 728 /* Find the spelling of the operand. */
252b5132
RH
729 start = name = input_line_pointer;
730
731 c = get_symbol_end ();
732
733 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT,
734 name, FALSE);
735
28e4f854
KH
736 /* Put back the delimiting char. */
737 *input_line_pointer = c;
738
739 /* Look to see if it's in the register table. */
740 if (reg_number >= 0)
252b5132
RH
741 {
742 expressionP->X_op = O_register;
743 expressionP->X_add_number = reg_number;
744
28e4f854 745 /* Make the rest nice. */
252b5132
RH
746 expressionP->X_add_symbol = NULL;
747 expressionP->X_op_symbol = NULL;
28e4f854 748
252b5132
RH
749 return true;
750 }
751 else
752 {
28e4f854 753 /* Reset the line as if we had not done anything. */
252b5132 754 input_line_pointer = start;
28e4f854 755
252b5132
RH
756 return false;
757 }
758}
759
760/* Summary of system_register_name().
761 *
28e4f854
KH
762 * in: INPUT_LINE_POINTER points to 1st char of operand.
763 * EXPRESSIONP points to an expression structure to be filled in.
764 * ACCEPT_NUMBERS is true iff numerical register names may be used.
765 * ACCEPT_LIST_NAMES is true iff the special names PS and SR may be
252b5132
RH
766 * accepted.
767 *
b6ff326e 768 * out: An expressionS structure in expressionP.
252b5132
RH
769 * The operand may have been a register: in this case, X_op == O_register,
770 * X_add_number is set to the register number, and truth is returned.
771 * Input_line_pointer->(next non-blank) char after operand, or is in
28e4f854
KH
772 * its original state. */
773
9e0665bc
AM
774static boolean system_register_name PARAMS ((expressionS *, boolean, boolean));
775
252b5132
RH
776static boolean
777system_register_name (expressionP, accept_numbers, accept_list_names)
28e4f854
KH
778 expressionS *expressionP;
779 boolean accept_numbers;
780 boolean accept_list_names;
252b5132 781{
28e4f854
KH
782 int reg_number;
783 char *name;
784 char *start;
785 char c;
252b5132 786
28e4f854 787 /* Find the spelling of the operand. */
252b5132
RH
788 start = name = input_line_pointer;
789
790 c = get_symbol_end ();
791 reg_number = reg_name_search (system_registers, SYSREG_NAME_CNT, name,
792 accept_numbers);
793
28e4f854
KH
794 /* Put back the delimiting char. */
795 *input_line_pointer = c;
796
252b5132
RH
797 if (reg_number < 0
798 && accept_numbers)
799 {
28e4f854
KH
800 /* Reset input_line pointer. */
801 input_line_pointer = start;
252b5132 802
3882b010 803 if (ISDIGIT (*input_line_pointer))
252b5132 804 {
28e4f854 805 reg_number = strtol (input_line_pointer, &input_line_pointer, 10);
252b5132 806
28e4f854
KH
807 /* Make sure that the register number is allowable. */
808 if (reg_number < 0
5480ccf3 809 || (reg_number > 5 && reg_number < 16)
28e4f854 810 || reg_number > 20)
252b5132
RH
811 {
812 reg_number = -1;
813 }
814 }
815 else if (accept_list_names)
816 {
817 c = get_symbol_end ();
818 reg_number = reg_name_search (system_list_registers,
819 SYSREGLIST_NAME_CNT, name, FALSE);
820
28e4f854
KH
821 /* Put back the delimiting char. */
822 *input_line_pointer = c;
252b5132
RH
823 }
824 }
28e4f854
KH
825
826 /* Look to see if it's in the register table. */
827 if (reg_number >= 0)
252b5132
RH
828 {
829 expressionP->X_op = O_register;
830 expressionP->X_add_number = reg_number;
831
28e4f854 832 /* Make the rest nice. */
252b5132
RH
833 expressionP->X_add_symbol = NULL;
834 expressionP->X_op_symbol = NULL;
835
836 return true;
837 }
838 else
839 {
28e4f854 840 /* Reset the line as if we had not done anything. */
252b5132 841 input_line_pointer = start;
28e4f854 842
252b5132
RH
843 return false;
844 }
845}
846
847/* Summary of cc_name().
848 *
28e4f854 849 * in: INPUT_LINE_POINTER points to 1st char of operand.
252b5132 850 *
b6ff326e 851 * out: An expressionS.
252b5132
RH
852 * The operand may have been a register: in this case, X_op == O_register,
853 * X_add_number is set to the register number, and truth is returned.
854 * Input_line_pointer->(next non-blank) char after operand, or is in
28e4f854
KH
855 * its original state. */
856
9e0665bc
AM
857static boolean cc_name PARAMS ((expressionS *));
858
252b5132
RH
859static boolean
860cc_name (expressionP)
28e4f854 861 expressionS *expressionP;
252b5132 862{
28e4f854
KH
863 int reg_number;
864 char *name;
865 char *start;
866 char c;
252b5132 867
28e4f854 868 /* Find the spelling of the operand. */
252b5132
RH
869 start = name = input_line_pointer;
870
871 c = get_symbol_end ();
872 reg_number = reg_name_search (cc_names, CC_NAME_CNT, name, FALSE);
873
28e4f854
KH
874 /* Put back the delimiting char. */
875 *input_line_pointer = c;
876
877 /* Look to see if it's in the register table. */
878 if (reg_number >= 0)
252b5132
RH
879 {
880 expressionP->X_op = O_constant;
881 expressionP->X_add_number = reg_number;
882
28e4f854 883 /* Make the rest nice. */
252b5132
RH
884 expressionP->X_add_symbol = NULL;
885 expressionP->X_op_symbol = NULL;
886
887 return true;
888 }
889 else
890 {
28e4f854 891 /* Reset the line as if we had not done anything. */
252b5132 892 input_line_pointer = start;
28e4f854 893
252b5132
RH
894 return false;
895 }
896}
897
9e0665bc
AM
898static void skip_white_space PARAMS ((void));
899
252b5132 900static void
9e0665bc 901skip_white_space ()
252b5132 902{
28e4f854
KH
903 while (*input_line_pointer == ' '
904 || *input_line_pointer == '\t')
905 ++input_line_pointer;
252b5132
RH
906}
907
908/* Summary of parse_register_list ().
909 *
28e4f854
KH
910 * in: INPUT_LINE_POINTER points to 1st char of a list of registers.
911 * INSN is the partially constructed instruction.
912 * OPERAND is the operand being inserted.
252b5132
RH
913 *
914 * out: NULL if the parse completed successfully, otherwise a
915 * pointer to an error message is returned. If the parse
916 * completes the correct bit fields in the instruction
917 * will be filled in.
918 *
919 * Parses register lists with the syntax:
920 *
921 * { rX }
922 * { rX, rY }
923 * { rX - rY }
924 * { rX - rY, rZ }
925 * etc
926 *
927 * and also parses constant epxressions whoes bits indicate the
928 * registers in the lists. The LSB in the expression refers to
929 * the lowest numbered permissable register in the register list,
930 * and so on upwards. System registers are considered to be very
28e4f854
KH
931 * high numbers. */
932
9e0665bc
AM
933static char *parse_register_list
934 PARAMS ((unsigned long *, const struct v850_operand *));
935
252b5132 936static char *
28e4f854
KH
937parse_register_list (insn, operand)
938 unsigned long *insn;
939 const struct v850_operand *operand;
252b5132 940{
28e4f854
KH
941 static int type1_regs[32] = {
942 30, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
943 0, 0, 0, 0, 0, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
944 };
945 static int type2_regs[32] = {
946 19, 18, 17, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
947 0, 0, 0, 0, 30, 31, 29, 28, 23, 22, 21, 20, 27, 26, 25, 24
948 };
949 static int type3_regs[32] = {
950 3, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
951 0, 0, 0, 0, 14, 15, 13, 12, 7, 6, 5, 4, 11, 10, 9, 8
952 };
953 int *regs;
252b5132
RH
954 expressionS exp;
955
28e4f854 956 /* Select a register array to parse. */
252b5132
RH
957 switch (operand->shift)
958 {
959 case 0xffe00001: regs = type1_regs; break;
960 case 0xfff8000f: regs = type2_regs; break;
961 case 0xfff8001f: regs = type3_regs; break;
962 default:
963 as_bad (_("unknown operand shift: %x\n"), operand->shift);
964 return _("internal failure in parse_register_list");
965 }
966
967 skip_white_space ();
968
969 /* If the expression starts with a curly brace it is a register list.
970 Otherwise it is a constant expression, whoes bits indicate which
971 registers are to be included in the list. */
28e4f854
KH
972
973 if (*input_line_pointer != '{')
252b5132 974 {
252b5132
RH
975 int reg;
976 int i;
28e4f854
KH
977
978 expression (&exp);
979
252b5132
RH
980 if (exp.X_op != O_constant)
981 return _("constant expression or register list expected");
982
983 if (regs == type1_regs)
984 {
985 if (exp.X_add_number & 0xFFFFF000)
986 return _("high bits set in register list expression");
28e4f854
KH
987
988 for (reg = 20; reg < 32; reg++)
252b5132
RH
989 if (exp.X_add_number & (1 << (reg - 20)))
990 {
991 for (i = 0; i < 32; i++)
992 if (regs[i] == reg)
28e4f854 993 *insn |= (1 << i);
252b5132
RH
994 }
995 }
996 else if (regs == type2_regs)
997 {
998 if (exp.X_add_number & 0xFFFE0000)
999 return _("high bits set in register list expression");
28e4f854
KH
1000
1001 for (reg = 1; reg < 16; reg++)
252b5132
RH
1002 if (exp.X_add_number & (1 << (reg - 1)))
1003 {
1004 for (i = 0; i < 32; i++)
1005 if (regs[i] == reg)
28e4f854 1006 *insn |= (1 << i);
252b5132
RH
1007 }
1008
1009 if (exp.X_add_number & (1 << 15))
28e4f854
KH
1010 *insn |= (1 << 3);
1011
252b5132 1012 if (exp.X_add_number & (1 << 16))
28e4f854 1013 *insn |= (1 << 19);
252b5132 1014 }
28e4f854 1015 else /* regs == type3_regs */
252b5132
RH
1016 {
1017 if (exp.X_add_number & 0xFFFE0000)
1018 return _("high bits set in register list expression");
28e4f854
KH
1019
1020 for (reg = 16; reg < 32; reg++)
252b5132
RH
1021 if (exp.X_add_number & (1 << (reg - 16)))
1022 {
1023 for (i = 0; i < 32; i++)
1024 if (regs[i] == reg)
28e4f854 1025 *insn |= (1 << i);
252b5132
RH
1026 }
1027
1028 if (exp.X_add_number & (1 << 16))
28e4f854 1029 *insn |= (1 << 19);
252b5132
RH
1030 }
1031
1032 return NULL;
1033 }
1034
28e4f854 1035 input_line_pointer++;
252b5132
RH
1036
1037 /* Parse the register list until a terminator (closing curly brace or
1038 new-line) is found. */
1039 for (;;)
1040 {
28e4f854 1041 if (register_name (&exp))
252b5132 1042 {
28e4f854
KH
1043 int i;
1044
252b5132
RH
1045 /* Locate the given register in the list, and if it is there,
1046 insert the corresponding bit into the instruction. */
1047 for (i = 0; i < 32; i++)
1048 {
28e4f854 1049 if (regs[i] == exp.X_add_number)
252b5132 1050 {
28e4f854 1051 *insn |= (1 << i);
252b5132
RH
1052 break;
1053 }
1054 }
1055
1056 if (i == 32)
1057 {
1058 return _("illegal register included in list");
1059 }
1060 }
28e4f854 1061 else if (system_register_name (&exp, true, true))
252b5132
RH
1062 {
1063 if (regs == type1_regs)
1064 {
1065 return _("system registers cannot be included in list");
1066 }
1067 else if (exp.X_add_number == 5)
1068 {
1069 if (regs == type2_regs)
1070 return _("PSW cannot be included in list");
1071 else
28e4f854 1072 *insn |= 0x8;
252b5132
RH
1073 }
1074 else if (exp.X_add_number < 4)
28e4f854 1075 *insn |= 0x80000;
252b5132
RH
1076 else
1077 return _("High value system registers cannot be included in list");
1078 }
28e4f854 1079 else if (*input_line_pointer == '}')
252b5132 1080 {
28e4f854 1081 input_line_pointer++;
252b5132
RH
1082 break;
1083 }
28e4f854 1084 else if (*input_line_pointer == ',')
252b5132 1085 {
28e4f854 1086 input_line_pointer++;
252b5132
RH
1087 continue;
1088 }
28e4f854 1089 else if (*input_line_pointer == '-')
252b5132 1090 {
28e4f854
KH
1091 /* We have encountered a range of registers: rX - rY. */
1092 int j;
252b5132
RH
1093 expressionS exp2;
1094
1095 /* Skip the dash. */
28e4f854 1096 ++input_line_pointer;
252b5132
RH
1097
1098 /* Get the second register in the range. */
28e4f854 1099 if (! register_name (&exp2))
252b5132
RH
1100 {
1101 return _("second register should follow dash in register list");
1102 exp2.X_add_number = exp.X_add_number;
1103 }
1104
1105 /* Add the rest of the registers in the range. */
1106 for (j = exp.X_add_number + 1; j <= exp2.X_add_number; j++)
1107 {
28e4f854
KH
1108 int i;
1109
252b5132
RH
1110 /* Locate the given register in the list, and if it is there,
1111 insert the corresponding bit into the instruction. */
1112 for (i = 0; i < 32; i++)
1113 {
28e4f854 1114 if (regs[i] == j)
252b5132 1115 {
28e4f854 1116 *insn |= (1 << i);
252b5132
RH
1117 break;
1118 }
1119 }
1120
1121 if (i == 32)
1122 return _("illegal register included in list");
1123 }
1124 }
1125 else
1126 {
1127 break;
1128 }
1129
1130 skip_white_space ();
1131 }
1132
1133 return NULL;
1134}
1135
5a38dc70 1136const char *md_shortopts = "m:";
252b5132 1137
19d63e5d 1138struct option md_longopts[] = {
252b5132
RH
1139 {NULL, no_argument, NULL, 0}
1140};
252b5132 1141
28e4f854 1142size_t md_longopts_size = sizeof (md_longopts);
252b5132
RH
1143
1144void
1145md_show_usage (stream)
28e4f854 1146 FILE *stream;
252b5132
RH
1147{
1148 fprintf (stream, _(" V850 options:\n"));
1149 fprintf (stream, _(" -mwarn-signed-overflow Warn if signed immediate values overflow\n"));
1150 fprintf (stream, _(" -mwarn-unsigned-overflow Warn if unsigned immediate values overflow\n"));
1151 fprintf (stream, _(" -mv850 The code is targeted at the v850\n"));
1152 fprintf (stream, _(" -mv850e The code is targeted at the v850e\n"));
252b5132 1153 fprintf (stream, _(" -mv850any The code is generic, despite any processor specific instructions\n"));
86aba9db
NC
1154 fprintf (stream, _(" -mrelax Enable relaxation\n"));
1155
252b5132
RH
1156}
1157
1158int
1159md_parse_option (c, arg)
28e4f854
KH
1160 int c;
1161 char *arg;
252b5132
RH
1162{
1163 if (c != 'm')
1164 {
5480ccf3 1165 if (c != 'a')
28e4f854 1166 /* xgettext:c-format */
5480ccf3 1167 fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
252b5132
RH
1168 return 0;
1169 }
1170
1171 if (strcmp (arg, "warn-signed-overflow") == 0)
1172 {
1173 warn_signed_overflows = TRUE;
1174 }
1175 else if (strcmp (arg, "warn-unsigned-overflow") == 0)
1176 {
1177 warn_unsigned_overflows = TRUE;
1178 }
1179 else if (strcmp (arg, "v850") == 0)
1180 {
1181 machine = 0;
1182 processor_mask = PROCESSOR_V850;
1183 }
1184 else if (strcmp (arg, "v850e") == 0)
1185 {
1186 machine = bfd_mach_v850e;
1187 processor_mask = PROCESSOR_V850E;
1188 }
252b5132
RH
1189 else if (strcmp (arg, "v850any") == 0)
1190 {
28e4f854
KH
1191 /* Tell the world that this is for any v850 chip. */
1192 machine = 0;
1193
1194 /* But support instructions for the extended versions. */
86aba9db 1195 processor_mask = PROCESSOR_V850E;
252b5132 1196 }
86aba9db
NC
1197 else if (strcmp (arg, "relax") == 0)
1198 v850_relax = 1;
252b5132
RH
1199 else
1200 {
28e4f854 1201 /* xgettext:c-format */
252b5132
RH
1202 fprintf (stderr, _("unknown command line option: -%c%s\n"), c, arg);
1203 return 0;
1204 }
28e4f854 1205
252b5132
RH
1206 return 1;
1207}
1208
1209symbolS *
1210md_undefined_symbol (name)
28e4f854 1211 char *name ATTRIBUTE_UNUSED;
252b5132
RH
1212{
1213 return 0;
1214}
1215
1216char *
1217md_atof (type, litp, sizep)
28e4f854
KH
1218 int type;
1219 char *litp;
1220 int *sizep;
252b5132 1221{
28e4f854 1222 int prec;
252b5132 1223 LITTLENUM_TYPE words[4];
28e4f854
KH
1224 char *t;
1225 int i;
252b5132
RH
1226
1227 switch (type)
1228 {
1229 case 'f':
1230 prec = 2;
1231 break;
1232
1233 case 'd':
1234 prec = 4;
1235 break;
1236
1237 default:
1238 *sizep = 0;
1239 return _("bad call to md_atof");
1240 }
28e4f854 1241
252b5132
RH
1242 t = atof_ieee (input_line_pointer, type, words);
1243 if (t)
1244 input_line_pointer = t;
1245
1246 *sizep = prec * 2;
1247
1248 for (i = prec - 1; i >= 0; i--)
1249 {
1250 md_number_to_chars (litp, (valueT) words[i], 2);
1251 litp += 2;
1252 }
1253
1254 return NULL;
1255}
1256
252b5132 1257/* Very gross. */
28e4f854 1258
252b5132
RH
1259void
1260md_convert_frag (abfd, sec, fragP)
19d63e5d
KH
1261 bfd *abfd ATTRIBUTE_UNUSED;
1262 asection *sec;
1263 fragS *fragP;
252b5132
RH
1264{
1265 subseg_change (sec, 0);
28e4f854 1266
252b5132
RH
1267 /* In range conditional or unconditional branch. */
1268 if (fragP->fr_subtype == 0 || fragP->fr_subtype == 2)
1269 {
1270 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
1271 fragP->fr_offset, 1, BFD_RELOC_UNUSED + (int)fragP->fr_opcode);
252b5132
RH
1272 fragP->fr_fix += 2;
1273 }
1274 /* Out of range conditional branch. Emit a branch around a jump. */
1275 else if (fragP->fr_subtype == 1)
1276 {
28e4f854 1277 unsigned char *buffer =
252b5132
RH
1278 (unsigned char *) (fragP->fr_fix + fragP->fr_literal);
1279
1280 /* Reverse the condition of the first branch. */
1281 buffer[0] ^= 0x08;
1282 /* Mask off all the displacement bits. */
1283 buffer[0] &= 0x8f;
1284 buffer[1] &= 0x07;
1285 /* Now set the displacement bits so that we branch
1286 around the unconditional branch. */
1287 buffer[0] |= 0x30;
1288
1289 /* Now create the unconditional branch + fixup to the final
1290 target. */
1291 md_number_to_chars (buffer + 2, 0x00000780, 4);
1292 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
1293 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1294 (int) fragP->fr_opcode + 1);
252b5132
RH
1295 fragP->fr_fix += 6;
1296 }
1297 /* Out of range unconditional branch. Emit a jump. */
1298 else if (fragP->fr_subtype == 3)
1299 {
1300 md_number_to_chars (fragP->fr_fix + fragP->fr_literal, 0x00000780, 4);
1301 fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,
1302 fragP->fr_offset, 1, BFD_RELOC_UNUSED +
1303 (int) fragP->fr_opcode + 1);
252b5132
RH
1304 fragP->fr_fix += 4;
1305 }
1306 else
1307 abort ();
1308}
1309
1310valueT
1311md_section_align (seg, addr)
28e4f854
KH
1312 asection *seg;
1313 valueT addr;
252b5132
RH
1314{
1315 int align = bfd_get_section_alignment (stdoutput, seg);
1316 return ((addr + (1 << align) - 1) & (-1 << align));
1317}
1318
1319void
1320md_begin ()
1321{
28e4f854 1322 char *prev_name = "";
86aba9db 1323 const struct v850_opcode *op;
28e4f854 1324
86aba9db 1325 if (strncmp (TARGET_CPU, "v850e", 5) == 0)
252b5132
RH
1326 {
1327 if (machine == -1)
28e4f854
KH
1328 machine = bfd_mach_v850e;
1329
252b5132
RH
1330 if (processor_mask == -1)
1331 processor_mask = PROCESSOR_V850E;
1332 }
28e4f854 1333 else if (strncmp (TARGET_CPU, "v850", 4) == 0)
252b5132
RH
1334 {
1335 if (machine == -1)
28e4f854
KH
1336 machine = 0;
1337
252b5132
RH
1338 if (processor_mask == -1)
1339 processor_mask = PROCESSOR_V850;
1340 }
1341 else
28e4f854
KH
1342 /* xgettext:c-format */
1343 as_bad (_("Unable to determine default target processor from string: %s"),
252b5132
RH
1344 TARGET_CPU);
1345
19d63e5d 1346 v850_hash = hash_new ();
252b5132
RH
1347
1348 /* Insert unique names into hash table. The V850 instruction set
1349 has many identical opcode names that have different opcodes based
1350 on the operands. This hash table then provides a quick index to
1351 the first opcode with a particular name in the opcode table. */
1352
1353 op = v850_opcodes;
1354 while (op->name)
1355 {
28e4f854 1356 if (strcmp (prev_name, op->name))
252b5132
RH
1357 {
1358 prev_name = (char *) op->name;
1359 hash_insert (v850_hash, op->name, (char *) op);
1360 }
1361 op++;
1362 }
1363
9e0665bc 1364 v850_seg_table[BSS_SECTION].s = bss_section;
252b5132 1365 bfd_set_arch_mach (stdoutput, TARGET_ARCH, machine);
252b5132
RH
1366}
1367
9e0665bc
AM
1368static bfd_reloc_code_real_type handle_ctoff
1369 PARAMS ((const struct v850_operand *));
1370
252b5132 1371static bfd_reloc_code_real_type
9e0665bc
AM
1372handle_ctoff (operand)
1373 const struct v850_operand *operand;
252b5132
RH
1374{
1375 if (operand == NULL)
1376 return BFD_RELOC_V850_CALLT_16_16_OFFSET;
1377
28e4f854 1378 if (operand->bits != 6
252b5132
RH
1379 || operand->shift != 0)
1380 {
1381 as_bad (_("ctoff() relocation used on an instruction which does not support it"));
1382 return BFD_RELOC_64; /* Used to indicate an error condition. */
1383 }
28e4f854 1384
252b5132
RH
1385 return BFD_RELOC_V850_CALLT_6_7_OFFSET;
1386}
1387
9e0665bc
AM
1388static bfd_reloc_code_real_type handle_sdaoff
1389 PARAMS ((const struct v850_operand *));
1390
252b5132 1391static bfd_reloc_code_real_type
9e0665bc
AM
1392handle_sdaoff (operand)
1393 const struct v850_operand *operand;
252b5132 1394{
28e4f854
KH
1395 if (operand == NULL)
1396 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1397
1398 if (operand->bits == 15 && operand->shift == 17)
1399 return BFD_RELOC_V850_SDA_15_16_OFFSET;
1400
1401 if (operand->bits == -1)
1402 return BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET;
1403
1404 if (operand->bits != 16
252b5132
RH
1405 || operand->shift != 16)
1406 {
1407 as_bad (_("sdaoff() relocation used on an instruction which does not support it"));
1408 return BFD_RELOC_64; /* Used to indicate an error condition. */
1409 }
28e4f854 1410
252b5132
RH
1411 return BFD_RELOC_V850_SDA_16_16_OFFSET;
1412}
1413
9e0665bc
AM
1414static bfd_reloc_code_real_type handle_zdaoff
1415 PARAMS ((const struct v850_operand *));
1416
252b5132 1417static bfd_reloc_code_real_type
9e0665bc
AM
1418handle_zdaoff (operand)
1419 const struct v850_operand *operand;
252b5132 1420{
28e4f854
KH
1421 if (operand == NULL)
1422 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1423
1424 if (operand->bits == 15 && operand->shift == 17)
1425 return BFD_RELOC_V850_ZDA_15_16_OFFSET;
252b5132 1426
28e4f854
KH
1427 if (operand->bits == -1)
1428 return BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET;
1429
1430 if (operand->bits != 16
252b5132
RH
1431 || operand->shift != 16)
1432 {
1433 as_bad (_("zdaoff() relocation used on an instruction which does not support it"));
28e4f854
KH
1434 /* Used to indicate an error condition. */
1435 return BFD_RELOC_64;
252b5132 1436 }
28e4f854 1437
252b5132
RH
1438 return BFD_RELOC_V850_ZDA_16_16_OFFSET;
1439}
1440
9e0665bc
AM
1441static bfd_reloc_code_real_type handle_tdaoff
1442 PARAMS ((const struct v850_operand *));
1443
252b5132 1444static bfd_reloc_code_real_type
9e0665bc
AM
1445handle_tdaoff (operand)
1446 const struct v850_operand *operand;
252b5132 1447{
28e4f854
KH
1448 if (operand == NULL)
1449 /* Data item, not an instruction. */
1450 return BFD_RELOC_V850_TDA_7_7_OFFSET;
1451
1452 if (operand->bits == 6 && operand->shift == 1)
1453 /* sld.w/sst.w, operand: D8_6 */
1454 return BFD_RELOC_V850_TDA_6_8_OFFSET;
1455
1456 if (operand->bits == 4 && operand->insert != NULL)
1457 /* sld.hu, operand: D5-4 */
1458 return BFD_RELOC_V850_TDA_4_5_OFFSET;
1459
1460 if (operand->bits == 4 && operand->insert == NULL)
1461 /* sld.bu, operand: D4 */
1462 return BFD_RELOC_V850_TDA_4_4_OFFSET;
1463
1464 if (operand->bits == 16 && operand->shift == 16)
1465 /* set1 & chums, operands: D16 */
1466 return BFD_RELOC_V850_TDA_16_16_OFFSET;
1467
252b5132
RH
1468 if (operand->bits != 7)
1469 {
1470 as_bad (_("tdaoff() relocation used on an instruction which does not support it"));
28e4f854
KH
1471 /* Used to indicate an error condition. */
1472 return BFD_RELOC_64;
252b5132 1473 }
28e4f854 1474
252b5132 1475 return operand->insert != NULL
28e4f854
KH
1476 ? BFD_RELOC_V850_TDA_7_8_OFFSET /* sld.h/sst.h, operand: D8_7 */
1477 : BFD_RELOC_V850_TDA_7_7_OFFSET; /* sld.b/sst.b, opreand: D7 */
252b5132
RH
1478}
1479
1480/* Warning: The code in this function relies upon the definitions
1481 in the v850_operands[] array (defined in opcodes/v850-opc.c)
1482 matching the hard coded values contained herein. */
1483
9e0665bc
AM
1484static bfd_reloc_code_real_type v850_reloc_prefix
1485 PARAMS ((const struct v850_operand *));
1486
252b5132 1487static bfd_reloc_code_real_type
9e0665bc
AM
1488v850_reloc_prefix (operand)
1489 const struct v850_operand *operand;
252b5132
RH
1490{
1491 boolean paren_skipped = false;
1492
252b5132 1493 /* Skip leading opening parenthesis. */
28e4f854 1494 if (*input_line_pointer == '(')
252b5132 1495 {
28e4f854 1496 ++input_line_pointer;
252b5132
RH
1497 paren_skipped = true;
1498 }
1499
1500#define CHECK_(name, reloc) \
1501 if (strncmp (input_line_pointer, name##"(", strlen (name) + 1) == 0) \
1502 { \
1503 input_line_pointer += strlen (name); \
1504 return reloc; \
1505 }
28e4f854
KH
1506
1507 CHECK_ ("hi0", BFD_RELOC_HI16 );
1508 CHECK_ ("hi", BFD_RELOC_HI16_S );
1509 CHECK_ ("lo", BFD_RELOC_LO16 );
252b5132
RH
1510 CHECK_ ("sdaoff", handle_sdaoff (operand));
1511 CHECK_ ("zdaoff", handle_zdaoff (operand));
1512 CHECK_ ("tdaoff", handle_tdaoff (operand));
28e4f854
KH
1513 CHECK_ ("hilo", BFD_RELOC_32 );
1514 CHECK_ ("ctoff", handle_ctoff (operand) );
1515
252b5132
RH
1516 /* Restore skipped parenthesis. */
1517 if (paren_skipped)
28e4f854
KH
1518 --input_line_pointer;
1519
252b5132
RH
1520 return BFD_RELOC_UNUSED;
1521}
1522
1523/* Insert an operand value into an instruction. */
1524
9e0665bc
AM
1525static unsigned long v850_insert_operand
1526 PARAMS ((unsigned long, const struct v850_operand *, offsetT, char *,
1527 unsigned int, char *));
1528
252b5132
RH
1529static unsigned long
1530v850_insert_operand (insn, operand, val, file, line, str)
28e4f854
KH
1531 unsigned long insn;
1532 const struct v850_operand *operand;
1533 offsetT val;
1534 char *file;
1535 unsigned int line;
1536 char *str;
252b5132
RH
1537{
1538 if (operand->insert)
1539 {
28e4f854
KH
1540 const char *message = NULL;
1541
1542 insn = operand->insert (insn, val, &message);
252b5132
RH
1543 if (message != NULL)
1544 {
1545 if ((operand->flags & V850_OPERAND_SIGNED)
1546 && ! warn_signed_overflows
1547 && strstr (message, "out of range") != NULL)
1548 {
28e4f854 1549 /* Skip warning... */
252b5132
RH
1550 }
1551 else if ((operand->flags & V850_OPERAND_SIGNED) == 0
1552 && ! warn_unsigned_overflows
1553 && strstr (message, "out of range") != NULL)
1554 {
28e4f854 1555 /* Skip warning... */
252b5132
RH
1556 }
1557 else if (str)
1558 {
1559 if (file == (char *) NULL)
1560 as_warn ("%s: %s", str, message);
1561 else
1562 as_warn_where (file, line, "%s: %s", str, message);
1563 }
1564 else
1565 {
1566 if (file == (char *) NULL)
1567 as_warn (message);
1568 else
1569 as_warn_where (file, line, message);
1570 }
1571 }
1572 }
1573 else
1574 {
1575 if (operand->bits != 32)
1576 {
28e4f854 1577 long min, max;
252b5132
RH
1578
1579 if ((operand->flags & V850_OPERAND_SIGNED) != 0)
1580 {
1581 if (! warn_signed_overflows)
1582 max = (1 << operand->bits) - 1;
1583 else
1584 max = (1 << (operand->bits - 1)) - 1;
28e4f854
KH
1585
1586 min = -(1 << (operand->bits - 1));
252b5132
RH
1587 }
1588 else
1589 {
1590 max = (1 << operand->bits) - 1;
28e4f854 1591
252b5132 1592 if (! warn_unsigned_overflows)
28e4f854 1593 min = -(1 << (operand->bits - 1));
252b5132
RH
1594 else
1595 min = 0;
1596 }
28e4f854 1597
252b5132
RH
1598 if (val < (offsetT) min || val > (offsetT) max)
1599 {
28e4f854
KH
1600 /* xgettext:c-format */
1601 const char *err =
1602 _("operand out of range (%s not between %ld and %ld)");
1603 char buf[100];
1604
252b5132
RH
1605 /* Restore min and mix to expected values for decimal ranges. */
1606 if ((operand->flags & V850_OPERAND_SIGNED)
1607 && ! warn_signed_overflows)
1608 max = (1 << (operand->bits - 1)) - 1;
1609
1610 if (! (operand->flags & V850_OPERAND_SIGNED)
1611 && ! warn_unsigned_overflows)
1612 min = 0;
1613
1614 if (str)
1615 {
1616 sprintf (buf, "%s: ", str);
28e4f854 1617
252b5132
RH
1618 sprint_value (buf + strlen (buf), val);
1619 }
1620 else
1621 sprint_value (buf, val);
28e4f854 1622
252b5132
RH
1623 if (file == (char *) NULL)
1624 as_warn (err, buf, min, max);
1625 else
1626 as_warn_where (file, line, err, buf, min, max);
1627 }
1628 }
1629
1630 insn |= (((long) val & ((1 << operand->bits) - 1)) << operand->shift);
1631 }
28e4f854 1632
252b5132
RH
1633 return insn;
1634}
252b5132 1635\f
28e4f854 1636static char copy_of_instruction[128];
252b5132
RH
1637
1638void
28e4f854
KH
1639md_assemble (str)
1640 char *str;
252b5132 1641{
28e4f854
KH
1642 char *s;
1643 char *start_of_operands;
1644 struct v850_opcode *opcode;
1645 struct v850_opcode *next_opcode;
1646 const unsigned char *opindex_ptr;
1647 int next_opindex;
1648 int relaxable = 0;
1649 unsigned long insn;
1650 unsigned long insn_size;
1651 char *f;
1652 int i;
1653 int match;
1654 boolean extra_data_after_insn = false;
1655 unsigned extra_data_len = 0;
1656 unsigned long extra_data = 0;
1657 char *saved_input_line_pointer;
1658
252b5132 1659 strncpy (copy_of_instruction, str, sizeof (copy_of_instruction) - 1);
28e4f854 1660
252b5132 1661 /* Get the opcode. */
3882b010 1662 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
252b5132 1663 continue;
28e4f854 1664
252b5132
RH
1665 if (*s != '\0')
1666 *s++ = '\0';
1667
28e4f854 1668 /* Find the first opcode with the proper name. */
252b5132
RH
1669 opcode = (struct v850_opcode *) hash_find (v850_hash, str);
1670 if (opcode == NULL)
1671 {
28e4f854 1672 /* xgettext:c-format */
252b5132
RH
1673 as_bad (_("Unrecognized opcode: `%s'"), str);
1674 ignore_rest_of_line ();
1675 return;
1676 }
1677
1678 str = s;
3882b010 1679 while (ISSPACE (*str))
28e4f854 1680 ++str;
252b5132
RH
1681
1682 start_of_operands = str;
1683
1684 saved_input_line_pointer = input_line_pointer;
28e4f854 1685
252b5132
RH
1686 for (;;)
1687 {
28e4f854 1688 const char *errmsg = NULL;
252b5132
RH
1689
1690 match = 0;
28e4f854 1691
252b5132
RH
1692 if ((opcode->processors & processor_mask) == 0)
1693 {
1694 errmsg = _("Target processor does not support this instruction.");
1695 goto error;
1696 }
28e4f854 1697
252b5132
RH
1698 relaxable = 0;
1699 fc = 0;
1700 next_opindex = 0;
1701 insn = opcode->opcode;
1702 extra_data_after_insn = false;
1703
1704 input_line_pointer = str = start_of_operands;
1705
28e4f854 1706 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
252b5132 1707 {
28e4f854
KH
1708 const struct v850_operand *operand;
1709 char *hold;
1710 expressionS ex;
1711 bfd_reloc_code_real_type reloc;
252b5132
RH
1712
1713 if (next_opindex == 0)
1714 {
28e4f854 1715 operand = &v850_operands[*opindex_ptr];
252b5132
RH
1716 }
1717 else
1718 {
28e4f854 1719 operand = &v850_operands[next_opindex];
252b5132
RH
1720 next_opindex = 0;
1721 }
1722
1723 errmsg = NULL;
1724
1725 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']')
28e4f854 1726 ++str;
252b5132
RH
1727
1728 if (operand->flags & V850_OPERAND_RELAX)
1729 relaxable = 1;
1730
28e4f854 1731 /* Gather the operand. */
252b5132
RH
1732 hold = input_line_pointer;
1733 input_line_pointer = str;
28e4f854
KH
1734
1735 /* lo(), hi(), hi0(), etc... */
252b5132
RH
1736 if ((reloc = v850_reloc_prefix (operand)) != BFD_RELOC_UNUSED)
1737 {
1738 /* This is a fake reloc, used to indicate an error condition. */
1739 if (reloc == BFD_RELOC_64)
1740 {
1741 match = 1;
1742 goto error;
1743 }
28e4f854
KH
1744
1745 expression (&ex);
252b5132
RH
1746
1747 if (ex.X_op == O_constant)
1748 {
1749 switch (reloc)
1750 {
1751 case BFD_RELOC_V850_ZDA_16_16_OFFSET:
1752 /* To cope with "not1 7, zdaoff(0xfffff006)[r0]"
1753 and the like. */
1754 /* Fall through. */
28e4f854 1755
252b5132
RH
1756 case BFD_RELOC_LO16:
1757 {
1758 /* Truncate, then sign extend the value. */
1759 ex.X_add_number = SEXT16 (ex.X_add_number);
1760 break;
1761 }
1762
1763 case BFD_RELOC_HI16:
1764 {
1765 /* Truncate, then sign extend the value. */
1766 ex.X_add_number = SEXT16 (ex.X_add_number >> 16);
1767 break;
1768 }
1769
1770 case BFD_RELOC_HI16_S:
1771 {
1772 /* Truncate, then sign extend the value. */
28e4f854 1773 int temp = (ex.X_add_number >> 16) & 0xffff;
252b5132
RH
1774
1775 temp += (ex.X_add_number >> 15) & 1;
1776
1777 ex.X_add_number = SEXT16 (temp);
1778 break;
1779 }
28e4f854 1780
252b5132
RH
1781 case BFD_RELOC_32:
1782 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1783 {
1784 errmsg = _("immediate operand is too large");
1785 goto error;
1786 }
28e4f854 1787
252b5132
RH
1788 extra_data_after_insn = true;
1789 extra_data_len = 4;
86aba9db 1790 extra_data = 0;
252b5132 1791 break;
28e4f854 1792
252b5132
RH
1793 default:
1794 fprintf (stderr, "reloc: %d\n", reloc);
1795 as_bad (_("AAARG -> unhandled constant reloc"));
1796 break;
1797 }
1798
1799 if (fc > MAX_INSN_FIXUPS)
1800 as_fatal (_("too many fixups"));
28e4f854
KH
1801
1802 fixups[fc].exp = ex;
1803 fixups[fc].opindex = *opindex_ptr;
1804 fixups[fc].reloc = reloc;
252b5132
RH
1805 fc++;
1806 }
1807 else
1808 {
1809 if (reloc == BFD_RELOC_32)
1810 {
1811 if ((operand->flags & V850E_IMMEDIATE32) == 0)
1812 {
1813 errmsg = _("immediate operand is too large");
1814 goto error;
1815 }
28e4f854 1816
252b5132
RH
1817 extra_data_after_insn = true;
1818 extra_data_len = 4;
1819 extra_data = ex.X_add_number;
1820 }
28e4f854 1821
252b5132
RH
1822 if (fc > MAX_INSN_FIXUPS)
1823 as_fatal (_("too many fixups"));
1824
28e4f854
KH
1825 fixups[fc].exp = ex;
1826 fixups[fc].opindex = *opindex_ptr;
1827 fixups[fc].reloc = reloc;
252b5132
RH
1828 fc++;
1829 }
1830 }
1831 else
1832 {
1833 errmsg = NULL;
28e4f854
KH
1834
1835 if ((operand->flags & V850_OPERAND_REG) != 0)
252b5132 1836 {
28e4f854 1837 if (!register_name (&ex))
252b5132
RH
1838 {
1839 errmsg = _("invalid register name");
1840 }
1841 else if ((operand->flags & V850_NOT_R0)
28e4f854 1842 && ex.X_add_number == 0)
252b5132
RH
1843 {
1844 errmsg = _("register r0 cannot be used here");
28e4f854 1845
252b5132
RH
1846 /* Force an error message to be generated by
1847 skipping over any following potential matches
1848 for this opcode. */
1849 opcode += 3;
1850 }
1851 }
28e4f854 1852 else if ((operand->flags & V850_OPERAND_SRG) != 0)
252b5132 1853 {
28e4f854 1854 if (!system_register_name (&ex, true, false))
252b5132
RH
1855 {
1856 errmsg = _("invalid system register name");
1857 }
1858 }
1859 else if ((operand->flags & V850_OPERAND_EP) != 0)
1860 {
28e4f854
KH
1861 char *start = input_line_pointer;
1862 char c = get_symbol_end ();
1863
252b5132
RH
1864 if (strcmp (start, "ep") != 0 && strcmp (start, "r30") != 0)
1865 {
1866 /* Put things back the way we found them. */
1867 *input_line_pointer = c;
1868 input_line_pointer = start;
1869 errmsg = _("expected EP register");
1870 goto error;
1871 }
28e4f854 1872
252b5132
RH
1873 *input_line_pointer = c;
1874 str = input_line_pointer;
1875 input_line_pointer = hold;
28e4f854
KH
1876
1877 while (*str == ' ' || *str == ','
1878 || *str == '[' || *str == ']')
1879 ++str;
252b5132
RH
1880 continue;
1881 }
28e4f854 1882 else if ((operand->flags & V850_OPERAND_CC) != 0)
252b5132 1883 {
28e4f854 1884 if (!cc_name (&ex))
252b5132
RH
1885 {
1886 errmsg = _("invalid condition code name");
1887 }
1888 }
28e4f854 1889 else if (operand->flags & V850E_PUSH_POP)
252b5132 1890 {
28e4f854
KH
1891 errmsg = parse_register_list (&insn, operand);
1892
252b5132
RH
1893 /* The parse_register_list() function has already done
1894 everything, so fake a dummy expression. */
1895 ex.X_op = O_constant;
1896 ex.X_add_number = 0;
1897 }
28e4f854 1898 else if (operand->flags & V850E_IMMEDIATE16)
252b5132 1899 {
28e4f854 1900 expression (&ex);
252b5132
RH
1901
1902 if (ex.X_op != O_constant)
1903 errmsg = _("constant expression expected");
1904 else if (ex.X_add_number & 0xffff0000)
1905 {
1906 if (ex.X_add_number & 0xffff)
1907 errmsg = _("constant too big to fit into instruction");
1908 else if ((insn & 0x001fffc0) == 0x00130780)
1909 ex.X_add_number >>= 16;
1910 else
1911 errmsg = _("constant too big to fit into instruction");
1912 }
28e4f854 1913
252b5132
RH
1914 extra_data_after_insn = true;
1915 extra_data_len = 2;
1916 extra_data = ex.X_add_number;
1917 ex.X_add_number = 0;
1918 }
28e4f854 1919 else if (operand->flags & V850E_IMMEDIATE32)
252b5132 1920 {
28e4f854
KH
1921 expression (&ex);
1922
252b5132
RH
1923 if (ex.X_op != O_constant)
1924 errmsg = _("constant expression expected");
28e4f854 1925
252b5132
RH
1926 extra_data_after_insn = true;
1927 extra_data_len = 4;
1928 extra_data = ex.X_add_number;
1929 ex.X_add_number = 0;
1930 }
28e4f854 1931 else if (register_name (&ex)
252b5132
RH
1932 && (operand->flags & V850_OPERAND_REG) == 0)
1933 {
1934 char c;
28e4f854
KH
1935 int exists = 0;
1936
252b5132
RH
1937 /* It is possible that an alias has been defined that
1938 matches a register name. For example the code may
1939 include a ".set ZERO, 0" directive, which matches
1940 the register name "zero". Attempt to reparse the
1941 field as an expression, and only complain if we
1942 cannot generate a constant. */
1943
1944 input_line_pointer = str;
1945
1946 c = get_symbol_end ();
28e4f854 1947
252b5132
RH
1948 if (symbol_find (str) != NULL)
1949 exists = 1;
28e4f854
KH
1950
1951 *input_line_pointer = c;
252b5132 1952 input_line_pointer = str;
28e4f854
KH
1953
1954 expression (&ex);
252b5132
RH
1955
1956 if (ex.X_op != O_constant)
1957 {
1958 /* If this register is actually occuring too early on
1959 the parsing of the instruction, (because another
1960 field is missing) then report this. */
1961 if (opindex_ptr[1] != 0
28e4f854
KH
1962 && (v850_operands[opindex_ptr[1]].flags
1963 & V850_OPERAND_REG))
252b5132
RH
1964 errmsg = _("syntax error: value is missing before the register name");
1965 else
1966 errmsg = _("syntax error: register not expected");
1967
28e4f854
KH
1968 /* If we created a symbol in the process of this
1969 test then delete it now, so that it will not
1970 be output with the real symbols... */
252b5132
RH
1971 if (exists == 0
1972 && ex.X_op == O_symbol)
1973 symbol_remove (ex.X_add_symbol,
28e4f854 1974 &symbol_rootP, &symbol_lastP);
252b5132
RH
1975 }
1976 }
28e4f854 1977 else if (system_register_name (&ex, false, false)
252b5132
RH
1978 && (operand->flags & V850_OPERAND_SRG) == 0)
1979 {
1980 errmsg = _("syntax error: system register not expected");
1981 }
1982 else if (cc_name (&ex)
1983 && (operand->flags & V850_OPERAND_CC) == 0)
1984 {
1985 errmsg = _("syntax error: condition code not expected");
1986 }
1987 else
1988 {
28e4f854 1989 expression (&ex);
252b5132 1990 /* Special case:
50b15da2
NC
1991 If we are assembling a MOV instruction and the immediate
1992 value does not fit into the bits available then create a
1993 fake error so that the next MOV instruction will be
1994 selected. This one has a 32 bit immediate field. */
252b5132
RH
1995
1996 if (((insn & 0x07e0) == 0x0200)
50b15da2 1997 && operand->bits == 5 /* Do not match the CALLT instruction. */
252b5132 1998 && ex.X_op == O_constant
28e4f854 1999 && (ex.X_add_number < (-(1 << (operand->bits - 1)))
03223580 2000 || ex.X_add_number > ((1 << (operand->bits - 1)) - 1)))
252b5132
RH
2001 errmsg = _("immediate operand is too large");
2002 }
2003
2004 if (errmsg)
2005 goto error;
252b5132 2006
28e4f854
KH
2007#if 0
2008 fprintf (stderr,
2009 " insn: %x, operand %d, op: %d, add_number: %d\n",
2010 insn, opindex_ptr - opcode->operands,
2011 ex.X_op, ex.X_add_number);
2012#endif
2013
2014 switch (ex.X_op)
252b5132
RH
2015 {
2016 case O_illegal:
2017 errmsg = _("illegal operand");
2018 goto error;
2019 case O_absent:
2020 errmsg = _("missing operand");
2021 goto error;
2022 case O_register:
28e4f854
KH
2023 if ((operand->flags
2024 & (V850_OPERAND_REG | V850_OPERAND_SRG)) == 0)
252b5132
RH
2025 {
2026 errmsg = _("invalid operand");
2027 goto error;
2028 }
2029 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2030 (char *) NULL, 0,
2031 copy_of_instruction);
2032 break;
2033
2034 case O_constant:
2035 insn = v850_insert_operand (insn, operand, ex.X_add_number,
2036 (char *) NULL, 0,
2037 copy_of_instruction);
2038 break;
2039
2040 default:
2041 /* We need to generate a fixup for this expression. */
2042 if (fc >= MAX_INSN_FIXUPS)
2043 as_fatal (_("too many fixups"));
2044
28e4f854
KH
2045 fixups[fc].exp = ex;
2046 fixups[fc].opindex = *opindex_ptr;
2047 fixups[fc].reloc = BFD_RELOC_UNUSED;
252b5132
RH
2048 ++fc;
2049 break;
2050 }
2051 }
2052
2053 str = input_line_pointer;
2054 input_line_pointer = hold;
2055
2056 while (*str == ' ' || *str == ',' || *str == '[' || *str == ']'
2057 || *str == ')')
2058 ++str;
2059 }
2060 match = 1;
2061
2062 error:
2063 if (match == 0)
28e4f854 2064 {
252b5132
RH
2065 next_opcode = opcode + 1;
2066 if (next_opcode->name != NULL
2067 && strcmp (next_opcode->name, opcode->name) == 0)
2068 {
2069 opcode = next_opcode;
2070
2071 /* Skip versions that are not supported by the target
2072 processor. */
2073 if ((opcode->processors & processor_mask) == 0)
2074 goto error;
28e4f854 2075
252b5132
RH
2076 continue;
2077 }
28e4f854 2078
252b5132 2079 as_bad ("%s: %s", copy_of_instruction, errmsg);
28e4f854
KH
2080
2081 if (*input_line_pointer == ']')
2082 ++input_line_pointer;
2083
252b5132
RH
2084 ignore_rest_of_line ();
2085 input_line_pointer = saved_input_line_pointer;
2086 return;
28e4f854 2087 }
252b5132
RH
2088 break;
2089 }
28e4f854 2090
3882b010 2091 while (ISSPACE (*str))
252b5132
RH
2092 ++str;
2093
2094 if (*str != '\0')
28e4f854 2095 /* xgettext:c-format */
252b5132
RH
2096 as_bad (_("junk at end of line: `%s'"), str);
2097
2098 input_line_pointer = str;
2099
9fcc94b6
AM
2100 /* Tie dwarf2 debug info to the address at the start of the insn.
2101 We can't do this after the insn has been output as the current
2102 frag may have been closed off. eg. by frag_var. */
2103 dwarf2_emit_insn (0);
2104
28e4f854
KH
2105 /* Write out the instruction. */
2106
252b5132
RH
2107 if (relaxable && fc > 0)
2108 {
2109 insn_size = 2;
2110 fc = 0;
2111
2112 if (!strcmp (opcode->name, "br"))
2113 {
2114 f = frag_var (rs_machine_dependent, 4, 2, 2,
2115 fixups[0].exp.X_add_symbol,
2116 fixups[0].exp.X_add_number,
28e4f854 2117 (char *) fixups[0].opindex);
252b5132
RH
2118 md_number_to_chars (f, insn, insn_size);
2119 md_number_to_chars (f + 2, 0, 2);
2120 }
2121 else
2122 {
2123 f = frag_var (rs_machine_dependent, 6, 4, 0,
2124 fixups[0].exp.X_add_symbol,
2125 fixups[0].exp.X_add_number,
28e4f854 2126 (char *) fixups[0].opindex);
252b5132
RH
2127 md_number_to_chars (f, insn, insn_size);
2128 md_number_to_chars (f + 2, 0, 4);
2129 }
2130 }
28e4f854 2131 else
252b5132
RH
2132 {
2133 /* Four byte insns have an opcode with the two high bits on. */
2134 if ((insn & 0x0600) == 0x0600)
2135 insn_size = 4;
2136 else
2137 insn_size = 2;
2138
28e4f854 2139 /* Special case: 32 bit MOV. */
252b5132
RH
2140 if ((insn & 0xffe0) == 0x0620)
2141 insn_size = 2;
28e4f854 2142
252b5132 2143 f = frag_more (insn_size);
252b5132
RH
2144 md_number_to_chars (f, insn, insn_size);
2145
2146 if (extra_data_after_insn)
2147 {
2148 f = frag_more (extra_data_len);
252b5132
RH
2149 md_number_to_chars (f, extra_data, extra_data_len);
2150
2151 extra_data_after_insn = false;
2152 }
2153 }
2154
2155 /* Create any fixups. At this point we do not use a
2156 bfd_reloc_code_real_type, but instead just use the
2157 BFD_RELOC_UNUSED plus the operand index. This lets us easily
2158 handle fixups for any operand type, although that is admittedly
2159 not a very exciting feature. We pick a BFD reloc type in
94f592af 2160 md_apply_fix3. */
252b5132
RH
2161 for (i = 0; i < fc; i++)
2162 {
28e4f854
KH
2163 const struct v850_operand *operand;
2164 bfd_reloc_code_real_type reloc;
2165
2166 operand = &v850_operands[fixups[i].opindex];
252b5132
RH
2167
2168 reloc = fixups[i].reloc;
28e4f854 2169
252b5132
RH
2170 if (reloc != BFD_RELOC_UNUSED)
2171 {
28e4f854
KH
2172 reloc_howto_type *reloc_howto =
2173 bfd_reloc_type_lookup (stdoutput, reloc);
2174 int size;
2175 int address;
2176 fixS *fixP;
252b5132
RH
2177
2178 if (!reloc_howto)
28e4f854
KH
2179 abort ();
2180
252b5132
RH
2181 size = bfd_get_reloc_size (reloc_howto);
2182
2183 /* XXX This will abort on an R_V850_8 reloc -
28e4f854
KH
2184 is this reloc actually used? */
2185 if (size != 2 && size != 4)
252b5132
RH
2186 abort ();
2187
2188 address = (f - frag_now->fr_literal) + insn_size - size;
2189
2190 if (reloc == BFD_RELOC_32)
28e4f854
KH
2191 address += 2;
2192
252b5132 2193 fixP = fix_new_exp (frag_now, address, size,
28e4f854 2194 &fixups[i].exp,
252b5132
RH
2195 reloc_howto->pc_relative,
2196 reloc);
2197
2198 switch (reloc)
2199 {
2200 case BFD_RELOC_LO16:
2201 case BFD_RELOC_HI16:
2202 case BFD_RELOC_HI16_S:
2203 fixP->fx_no_overflow = 1;
2204 break;
5480ccf3
NC
2205 default:
2206 break;
252b5132
RH
2207 }
2208 }
2209 else
2210 {
28e4f854 2211 fix_new_exp (frag_now,
252b5132
RH
2212 f - frag_now->fr_literal, 4,
2213 & fixups[i].exp,
28e4f854 2214 1 /* FIXME: V850_OPERAND_RELATIVE ??? */,
252b5132 2215 (bfd_reloc_code_real_type) (fixups[i].opindex
28e4f854 2216 + (int) BFD_RELOC_UNUSED));
252b5132
RH
2217 }
2218 }
2219
2220 input_line_pointer = saved_input_line_pointer;
2221}
2222
28e4f854
KH
2223/* If while processing a fixup, a reloc really needs to be created
2224 then it is done here. */
252b5132 2225
252b5132
RH
2226arelent *
2227tc_gen_reloc (seg, fixp)
28e4f854
KH
2228 asection *seg ATTRIBUTE_UNUSED;
2229 fixS *fixp;
252b5132 2230{
28e4f854
KH
2231 arelent *reloc;
2232
2233 reloc = (arelent *) xmalloc (sizeof (arelent));
2234 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
2235 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2236 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2237 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
252b5132
RH
2238
2239 if (reloc->howto == (reloc_howto_type *) NULL)
2240 {
2241 as_bad_where (fixp->fx_file, fixp->fx_line,
28e4f854
KH
2242 /* xgettext:c-format */
2243 _("reloc %d not supported by object file format"),
252b5132
RH
2244 (int) fixp->fx_r_type);
2245
2246 xfree (reloc);
28e4f854 2247
252b5132
RH
2248 return NULL;
2249 }
28e4f854
KH
2250
2251 if (fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY
252b5132
RH
2252 || fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT)
2253 reloc->addend = fixp->fx_offset;
86aba9db
NC
2254 else if ( fixp->fx_r_type == BFD_RELOC_V850_LONGCALL
2255 || fixp->fx_r_type == BFD_RELOC_V850_LONGJUMP
2256 || fixp->fx_r_type == BFD_RELOC_V850_ALIGN)
2257 reloc->addend = fixp->fx_offset;
252b5132
RH
2258 else
2259 reloc->addend = fixp->fx_addnumber;
28e4f854 2260
252b5132
RH
2261 return reloc;
2262}
2263
86aba9db
NC
2264void
2265v850_handle_align (frag)
2266 fragS * frag;
2267{
2268 if (v850_relax
2269 && frag->fr_type == rs_align
2270 && frag->fr_address + frag->fr_fix > 0
2271 && frag->fr_offset > 1
2272 && now_seg != bss_section
2273 && now_seg != v850_seg_table[SBSS_SECTION].s
2274 && now_seg != v850_seg_table[TBSS_SECTION].s
2275 && now_seg != v850_seg_table[ZBSS_SECTION].s)
2276 fix_new (frag, frag->fr_fix, 2, & abs_symbol, frag->fr_offset, 0,
2277 BFD_RELOC_V850_ALIGN);
2278}
2279
606ab118 2280/* Return current size of variable part of frag. */
28e4f854 2281
252b5132
RH
2282int
2283md_estimate_size_before_relax (fragp, seg)
28e4f854
KH
2284 fragS *fragp;
2285 asection *seg ATTRIBUTE_UNUSED;
252b5132 2286{
606ab118 2287 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
252b5132 2288 abort ();
606ab118
AM
2289
2290 return md_relax_table[fragp->fr_subtype].rlx_length;
28e4f854 2291}
252b5132
RH
2292
2293long
2294v850_pcrel_from_section (fixp, section)
28e4f854
KH
2295 fixS *fixp;
2296 segT section;
252b5132
RH
2297{
2298 /* If the symbol is undefined, or in a section other than our own,
d6c497c7 2299 or it is weak (in which case it may well be in another section,
252b5132
RH
2300 then let the linker figure it out. */
2301 if (fixp->fx_addsy != (symbolS *) NULL
2302 && (! S_IS_DEFINED (fixp->fx_addsy)
d6c497c7 2303 || S_IS_WEAK (fixp->fx_addsy)
252b5132 2304 || (S_GET_SEGMENT (fixp->fx_addsy) != section)))
d6c497c7 2305 return 0;
28e4f854 2306
252b5132
RH
2307 return fixp->fx_frag->fr_address + fixp->fx_where;
2308}
2309
94f592af
NC
2310void
2311md_apply_fix3 (fixP, valueP, seg)
2312 fixS *fixP;
2313 valueT *valueP;
28e4f854 2314 segT seg ATTRIBUTE_UNUSED;
252b5132 2315{
94f592af 2316 valueT value = * valueP;
28e4f854 2317 char *where;
252b5132 2318
94f592af 2319 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
86aba9db
NC
2320 || fixP->fx_r_type == BFD_RELOC_V850_LONGCALL
2321 || fixP->fx_r_type == BFD_RELOC_V850_LONGJUMP
94f592af 2322 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
252b5132 2323 {
94f592af
NC
2324 fixP->fx_done = 0;
2325 return;
252b5132
RH
2326 }
2327
94f592af 2328 if (fixP->fx_addsy == (symbolS *) NULL)
86aba9db 2329 fixP->fx_addnumber = value,
94f592af
NC
2330 fixP->fx_done = 1;
2331
2332 else if (fixP->fx_pcrel)
86aba9db 2333 fixP->fx_addnumber = fixP->fx_offset;
94f592af 2334
252b5132
RH
2335 else
2336 {
94f592af
NC
2337 value = fixP->fx_offset;
2338 if (fixP->fx_subsy != (symbolS *) NULL)
252b5132 2339 {
94f592af
NC
2340 if (S_GET_SEGMENT (fixP->fx_subsy) == absolute_section)
2341 value -= S_GET_VALUE (fixP->fx_subsy);
252b5132
RH
2342 else
2343 {
2344 /* We don't actually support subtracting a symbol. */
94f592af 2345 as_bad_where (fixP->fx_file, fixP->fx_line,
252b5132
RH
2346 _("expression too complex"));
2347 }
2348 }
86aba9db 2349 fixP->fx_addnumber = value;
252b5132
RH
2350 }
2351
94f592af 2352 if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
252b5132 2353 {
28e4f854
KH
2354 int opindex;
2355 const struct v850_operand *operand;
2356 unsigned long insn;
252b5132 2357
94f592af 2358 opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
28e4f854 2359 operand = &v850_operands[opindex];
252b5132
RH
2360
2361 /* Fetch the instruction, insert the fully resolved operand
2362 value, and stuff the instruction back again.
2363
2364 Note the instruction has been stored in little endian
2365 format! */
94f592af 2366 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132
RH
2367
2368 insn = bfd_getl32 ((unsigned char *) where);
2369 insn = v850_insert_operand (insn, operand, (offsetT) value,
94f592af 2370 fixP->fx_file, fixP->fx_line, NULL);
252b5132
RH
2371 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where);
2372
94f592af
NC
2373 if (fixP->fx_done)
2374 /* Nothing else to do here. */
2375 return;
252b5132 2376
28e4f854
KH
2377 /* Determine a BFD reloc value based on the operand information.
2378 We are only prepared to turn a few of the operands into relocs. */
252b5132
RH
2379
2380 if (operand->bits == 22)
94f592af 2381 fixP->fx_r_type = BFD_RELOC_V850_22_PCREL;
252b5132 2382 else if (operand->bits == 9)
94f592af 2383 fixP->fx_r_type = BFD_RELOC_V850_9_PCREL;
252b5132
RH
2384 else
2385 {
28e4f854
KH
2386#if 0
2387 fprintf (stderr, "bits: %d, insn: %x\n", operand->bits, insn);
2388#endif
2389
94f592af 2390 as_bad_where (fixP->fx_file, fixP->fx_line,
28e4f854 2391 _("unresolved expression that must be resolved"));
94f592af
NC
2392 fixP->fx_done = 1;
2393 return;
252b5132
RH
2394 }
2395 }
94f592af 2396 else if (fixP->fx_done)
252b5132
RH
2397 {
2398 /* We still have to insert the value into memory! */
94f592af 2399 where = fixP->fx_frag->fr_literal + fixP->fx_where;
252b5132 2400
94f592af 2401 if (fixP->fx_size == 1)
28e4f854 2402 *where = value & 0xff;
94f592af 2403 else if (fixP->fx_size == 2)
252b5132 2404 bfd_putl16 (value & 0xffff, (unsigned char *) where);
94f592af 2405 else if (fixP->fx_size == 4)
252b5132
RH
2406 bfd_putl32 (value, (unsigned char *) where);
2407 }
252b5132 2408}
252b5132
RH
2409\f
2410/* Parse a cons expression. We have to handle hi(), lo(), etc
2411 on the v850. */
28e4f854 2412
252b5132
RH
2413void
2414parse_cons_expression_v850 (exp)
28e4f854 2415 expressionS *exp;
252b5132
RH
2416{
2417 /* See if there's a reloc prefix like hi() we have to handle. */
2418 hold_cons_reloc = v850_reloc_prefix (NULL);
2419
2420 /* Do normal expression parsing. */
2421 expression (exp);
2422}
2423
2424/* Create a fixup for a cons expression. If parse_cons_expression_v850
2425 found a reloc prefix, then we use that reloc, else we choose an
2426 appropriate one based on the size of the expression. */
28e4f854 2427
252b5132
RH
2428void
2429cons_fix_new_v850 (frag, where, size, exp)
28e4f854 2430 fragS *frag;
252b5132
RH
2431 int where;
2432 int size;
2433 expressionS *exp;
2434{
2435 if (hold_cons_reloc == BFD_RELOC_UNUSED)
2436 {
2437 if (size == 4)
2438 hold_cons_reloc = BFD_RELOC_32;
2439 if (size == 2)
2440 hold_cons_reloc = BFD_RELOC_16;
2441 if (size == 1)
2442 hold_cons_reloc = BFD_RELOC_8;
2443 }
2444
2445 if (exp != NULL)
2446 fix_new_exp (frag, where, size, exp, 0, hold_cons_reloc);
2447 else
2448 fix_new (frag, where, size, NULL, 0, 0, hold_cons_reloc);
a8761a19
DD
2449
2450 hold_cons_reloc = BFD_RELOC_UNUSED;
252b5132 2451}
d6c497c7 2452
252b5132
RH
2453boolean
2454v850_fix_adjustable (fixP)
28e4f854 2455 fixS *fixP;
252b5132 2456{
252b5132
RH
2457 if (fixP->fx_addsy == NULL)
2458 return 1;
28e4f854 2459
28e4f854 2460 /* Don't adjust function names. */
252b5132
RH
2461 if (S_IS_FUNCTION (fixP->fx_addsy))
2462 return 0;
2463
28e4f854
KH
2464 /* We need the symbol name for the VTABLE entries. */
2465 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
252b5132
RH
2466 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2467 return 0;
28e4f854 2468
252b5132
RH
2469 return 1;
2470}
28e4f854 2471
252b5132 2472int
d6c497c7 2473v850_force_relocation (fixP)
28e4f854 2474 struct fix *fixP;
252b5132 2475{
28e4f854 2476 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
d6c497c7 2477 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
252b5132 2478 return 1;
28e4f854 2479
a161fe53 2480 if (fixP->fx_r_type == BFD_RELOC_V850_LONGCALL
86aba9db
NC
2481 || fixP->fx_r_type == BFD_RELOC_V850_LONGJUMP)
2482 return 1;
2483
2484 if (v850_relax
2485 && (fixP->fx_pcrel
a161fe53
AM
2486 || fixP->fx_r_type == BFD_RELOC_V850_ALIGN
2487 || fixP->fx_r_type == BFD_RELOC_V850_22_PCREL
2488 || fixP->fx_r_type == BFD_RELOC_V850_9_PCREL
2489 || fixP->fx_r_type >= BFD_RELOC_UNUSED))
86aba9db
NC
2490 return 1;
2491
a161fe53 2492 return S_FORCE_RELOC (fixP->fx_addsy);
252b5132 2493}
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