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[deliverable/binutils-gdb.git] / gas / config / tc-xtensa.c
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e0001a05
NC		 1/* tc-xtensa.c -- Assemble Xtensa instructions.
2 Copyright 2003 Free Software Foundation, Inc.
3
4 This file is part of GAS, the GNU Assembler.
5
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330, Boston,
19 MA 02111-1307, USA. */
20
21#include <string.h>
22#include "as.h"
23#include "sb.h"
24#include "safe-ctype.h"
25#include "tc-xtensa.h"
26#include "frags.h"
27#include "subsegs.h"
28#include "xtensa-relax.h"
29#include "xtensa-istack.h"
e0001a05
NC		 30#include "struc-symbol.h"
31#include "xtensa-config.h"
32
33#ifndef uint32
34#define uint32 unsigned int
35#endif
36#ifndef int32
37#define int32 signed int
38#endif
39
40/* Notes:
41
42 There are 3 forms for instructions,
43 1) the MEMORY format -- this is the encoding 2 or 3 byte instruction
44 2) the TInsn -- handles instructions/labels and literals;
45 all operands are assumed to be expressions
46 3) the IStack -- a stack of TInsn. this allows us to
47 reason about the generated expansion instructions
48
49 Naming conventions (used somewhat inconsistently):
50 The xtensa_ functions are exported
51 The xg_ functions are internal
52
53 We also have a couple of different extensibility mechanisms.
54 1) The idiom replacement:
55 This is used when a line is first parsed to
56 replace an instruction pattern with another instruction
57 It is currently limited to replacements of instructions
58 with constant operands.
59 2) The xtensa-relax.c mechanism that has stronger instruction
60 replacement patterns. When an instruction's immediate field
61 does not fit the next instruction sequence is attempted.
62 In addition, "narrow" opcodes are supported this way. */
63
64
65/* Define characters with special meanings to GAS. */
66const char comment_chars[] = "#";
67const char line_comment_chars[] = "#";
68const char line_separator_chars[] = ";";
69const char EXP_CHARS[] = "eE";
70const char FLT_CHARS[] = "rRsSfFdDxXpP";
71
72
73/* Flag to indicate whether the hardware supports the density option.
74 If not, enabling density instructions (via directives or --density flag)
75 is illegal. */
76
77#if STATIC_LIBISA
78bfd_boolean density_supported = XCHAL_HAVE_DENSITY;
79#else
80bfd_boolean density_supported = TRUE;
81#endif
82
83#define XTENSA_FETCH_WIDTH 4
84
85/* Flags for properties of the last instruction in a segment. */
86#define FLAG_IS_A0_WRITER 0x1
87#define FLAG_IS_BAD_LOOPEND 0x2
88
89
90/* We define a special segment names ".literal" to place literals
91 into. The .fini and .init sections are special because they
92 contain code that is moved together by the linker. We give them
93 their own special .fini.literal and .init.literal sections. */
94
95#define LITERAL_SECTION_NAME xtensa_section_rename (".literal")
96#define FINI_SECTION_NAME xtensa_section_rename (".fini")
97#define INIT_SECTION_NAME xtensa_section_rename (".init")
98#define FINI_LITERAL_SECTION_NAME xtensa_section_rename (".fini.literal")
99#define INIT_LITERAL_SECTION_NAME xtensa_section_rename (".init.literal")
100
101
102/* This type is used for the directive_stack to keep track of the
103 state of the literal collection pools. */
104
105typedef struct lit_state_struct
106{
107 const char *lit_seg_name;
108 const char *init_lit_seg_name;
109 const char *fini_lit_seg_name;
110 segT lit_seg;
111 segT init_lit_seg;
112 segT fini_lit_seg;
113} lit_state;
114
115static lit_state default_lit_sections;
116
117
118/* We keep lists of literal segments. The seg_list type is the node
119 for such a list. The *_literal_head locals are the heads of the
120 various lists. All of these lists have a dummy node at the start. */
121
122typedef struct seg_list_struct
123{
124 struct seg_list_struct *next;
125 segT seg;
126} seg_list;
127
128static seg_list literal_head_h;
129static seg_list *literal_head = &literal_head_h;
130static seg_list init_literal_head_h;
131static seg_list *init_literal_head = &init_literal_head_h;
132static seg_list fini_literal_head_h;
133static seg_list *fini_literal_head = &fini_literal_head_h;
134
135
136/* Global flag to indicate when we are emitting literals. */
137int generating_literals = 0;
138
139
140/* Structure for saving the current state before emitting literals. */
141typedef struct emit_state_struct
142{
143 const char *name;
144 segT now_seg;
145 subsegT now_subseg;
146 int generating_literals;
147} emit_state;
148
149
150/* Directives. */
151
152typedef enum
153{
154 directive_none = 0,
155 directive_literal,
156 directive_density,
157 directive_generics,
158 directive_relax,
159 directive_freeregs,
160 directive_longcalls,
161 directive_literal_prefix
162} directiveE;
163
164typedef struct
165{
166 const char *name;
167 bfd_boolean can_be_negated;
168} directive_infoS;
169
170const directive_infoS directive_info[] =
171{
172 {"none", FALSE},
173 {"literal", FALSE},
174 {"density", TRUE},
175 {"generics", TRUE},
176 {"relax", TRUE},
177 {"freeregs", FALSE},
178 {"longcalls", TRUE},
179 {"literal_prefix", FALSE}
180};
181
182bfd_boolean directive_state[] =
183{
184 FALSE, /* none */
185 FALSE, /* literal */
186#if STATIC_LIBISA && !XCHAL_HAVE_DENSITY
187 FALSE, /* density */
188#else
189 TRUE, /* density */
190#endif
191 TRUE, /* generics */
192 TRUE, /* relax */
193 FALSE, /* freeregs */
194 FALSE, /* longcalls */
195 FALSE /* literal_prefix */
196};
197
198
199enum xtensa_relax_statesE
200{
201 RELAX_ALIGN_NEXT_OPCODE,
202 /* Use the first opcode of the next fragment to determine the
203 alignment requirements. This is ONLY used for LOOPS
204 currently. */
205
206 RELAX_DESIRE_ALIGN_IF_TARGET,
207 /* These are placed in front of labels. They will all be converted
208 to RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before
209 relaxation begins. */
210
211 RELAX_ADD_NOP_IF_A0_B_RETW,
212 /* These are placed in front of conditional branches. It will be
213 turned into a NOP (using a1) if the branch is immediately
214 followed by a RETW or RETW.N. Otherwise it will be turned into
215 an rs_fill of 0 before relaxation begins. */
216
217 RELAX_ADD_NOP_IF_PRE_LOOP_END,
218 /* These are placed after JX instructions. It will be turned into a
219 NOP if there is one instruction before a loop end label.
220 Otherwise it will be turned into an rs_fill of 0 before
221 relaxation begins. This is used to avoid a hardware TIE
222 interlock issue prior to T1040. */
223
224 RELAX_ADD_NOP_IF_SHORT_LOOP,
225 /* These are placed after LOOP instructions. It will be turned into
226 a NOP when: (1) there are less than 3 instructions in the loop;
227 we place 2 of these in a row to add up to 2 NOPS in short loops;
228 or (2) The instructions in the loop do not include a branch or
229 jump. Otherwise it will be turned into an rs_fill of 0 before
230 relaxation begins. This is used to avoid hardware bug
231 PR3830. */
232
233 RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
234 /* These are placed after LOOP instructions. It will be turned into
235 a NOP if there are less than 12 bytes to the end of some other
236 loop's end. Otherwise it will be turned into an rs_fill of 0
237 before relaxation begins. This is used to avoid hardware bug
238 PR3830. */
239
240 RELAX_DESIRE_ALIGN,
241 /* The next fragment like its first instruction to NOT cross a
242 4-byte boundary. */
243
244 RELAX_LOOP_END,
245 /* This will be turned into a NOP or NOP.N if the previous
246 instruction is expanded to negate a loop. */
247
248 RELAX_LOOP_END_ADD_NOP,
249 /* When the code density option is available, this will generate a
250 NOP.N marked RELAX_NARROW. Otherwise, it will create an rs_fill
251 fragment with a NOP in it. */
252
253 RELAX_LITERAL,
254 /* Another fragment could generate an expansion here but has not yet. */
255
256 RELAX_LITERAL_NR,
257 /* Expansion has been generated by an instruction that generates a
258 literal. However, the stretch has NOT been reported yet in this
259 fragment. */
260
261 RELAX_LITERAL_FINAL,
262 /* Expansion has been generated by an instruction that generates a
263 literal. */
264
265 RELAX_LITERAL_POOL_BEGIN,
266 RELAX_LITERAL_POOL_END,
267 /* Technically these are not relaxations at all, but mark a location
268 to store literals later. Note that fr_var stores the frchain for
269 BEGIN frags and fr_var stores now_seg for END frags. */
270
271 RELAX_NARROW,
272 /* The last instruction in this fragment (at->fr_opcode) can be
273 freely replaced with a single wider instruction if a future
274 alignment desires or needs it. */
275
276 RELAX_IMMED,
277 /* The last instruction in this fragment (at->fr_opcode) contains
278 the value defined by fr_symbol (fr_offset = 0). If the value
279 does not fit, use the specified expansion. This is similar to
280 "NARROW", except that these may not be expanded in order to align
281 code. */
282
283 RELAX_IMMED_STEP1,
284 /* The last instruction in this fragment (at->fr_opcode) contains a
285 literal. It has already been expanded at least 1 step. */
286
287 RELAX_IMMED_STEP2
288 /* The last instruction in this fragment (at->fr_opcode) contains a
289 literal. It has already been expanded at least 2 steps. */
290};
291
292/* This is used as a stopper to bound the number of steps that
293 can be taken. */
294#define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP2 - RELAX_IMMED)
295
296
297typedef bfd_boolean (*frag_predicate) (const fragS *);
298
299
300/* Directive functions. */
301
302static bfd_boolean use_generics
303 PARAMS ((void));
304static bfd_boolean use_longcalls
305 PARAMS ((void));
306static bfd_boolean code_density_available
307 PARAMS ((void));
308static bfd_boolean can_relax
309 PARAMS ((void));
310static void directive_push
311 PARAMS ((directiveE, bfd_boolean, const void *));
312static void directive_pop
313 PARAMS ((directiveE *, bfd_boolean *, const char **,
314 unsigned int *, const void **));
315static void directive_balance
316 PARAMS ((void));
317static bfd_boolean inside_directive
318 PARAMS ((directiveE));
319static void get_directive
320 PARAMS ((directiveE *, bfd_boolean *));
321static void xtensa_begin_directive
322 PARAMS ((int));
323static void xtensa_end_directive
324 PARAMS ((int));
325static void xtensa_literal_prefix
326 PARAMS ((char const *, int));
327static void xtensa_literal_position
328 PARAMS ((int));
329static void xtensa_literal_pseudo
330 PARAMS ((int));
331
332/* Parsing and Idiom Translation Functions. */
333
334static const char *expression_end
335 PARAMS ((const char *));
336static unsigned tc_get_register
337 PARAMS ((const char *));
338static void expression_maybe_register
339 PARAMS ((xtensa_operand, expressionS *));
340static int tokenize_arguments
341 PARAMS ((char **, char *));
342static bfd_boolean parse_arguments
343 PARAMS ((TInsn *, int, char **));
344static int xg_translate_idioms
345 PARAMS ((char **, int *, char **));
346static int xg_translate_sysreg_op
347 PARAMS ((char **, int *, char **));
348static void xg_reverse_shift_count
349 PARAMS ((char **));
350static int xg_arg_is_constant
351 PARAMS ((char *, offsetT *));
352static void xg_replace_opname
353 PARAMS ((char **, char *));
354static int xg_check_num_args
355 PARAMS ((int *, int, char *, char **));
356
357/* Functions for dealing with the Xtensa ISA. */
358
359static bfd_boolean operand_is_immed
360 PARAMS ((xtensa_operand));
361static bfd_boolean operand_is_pcrel_label
362 PARAMS ((xtensa_operand));
363static int get_relaxable_immed
364 PARAMS ((xtensa_opcode));
365static xtensa_opcode get_opcode_from_buf
366 PARAMS ((const char *));
367static bfd_boolean is_direct_call_opcode
368 PARAMS ((xtensa_opcode));
369static bfd_boolean is_call_opcode
370 PARAMS ((xtensa_opcode));
371static bfd_boolean is_entry_opcode
372 PARAMS ((xtensa_opcode));
373static bfd_boolean is_loop_opcode
374 PARAMS ((xtensa_opcode));
375static bfd_boolean is_the_loop_opcode
376 PARAMS ((xtensa_opcode));
377static bfd_boolean is_jx_opcode
378 PARAMS ((xtensa_opcode));
379static bfd_boolean is_windowed_return_opcode
380 PARAMS ((xtensa_opcode));
381static bfd_boolean is_conditional_branch_opcode
382 PARAMS ((xtensa_opcode));
383static bfd_boolean is_branch_or_jump_opcode
384 PARAMS ((xtensa_opcode));
385static bfd_reloc_code_real_type opnum_to_reloc
386 PARAMS ((int));
387static int reloc_to_opnum
388 PARAMS ((bfd_reloc_code_real_type));
389static void xtensa_insnbuf_set_operand
390 PARAMS ((xtensa_insnbuf, xtensa_opcode, xtensa_operand, int32,
391 const char *, unsigned int));
392static uint32 xtensa_insnbuf_get_operand
393 PARAMS ((xtensa_insnbuf, xtensa_opcode, int));
394static void xtensa_insnbuf_set_immediate_field
395 PARAMS ((xtensa_opcode, xtensa_insnbuf, int32, const char *,
396 unsigned int));
397static bfd_boolean is_negatable_branch
398 PARAMS ((TInsn *));
399
400/* Functions for Internal Lists of Symbols. */
401static void xtensa_define_label
402 PARAMS ((symbolS *));
403static void add_target_symbol
404 PARAMS ((symbolS *, bfd_boolean));
405static symbolS *xtensa_find_label
406 PARAMS ((fragS *, offsetT, bfd_boolean));
407static void map_over_defined_symbols
408 PARAMS ((void (*fn) (symbolS *)));
409static bfd_boolean is_loop_target_label
410 PARAMS ((symbolS *));
411static void xtensa_mark_target_fragments
412 PARAMS ((void));
413
414/* Various Other Internal Functions. */
415
416static bfd_boolean is_unique_insn_expansion
417 PARAMS ((TransitionRule *));
418static int xg_get_insn_size
419 PARAMS ((TInsn *));
420static int xg_get_build_instr_size
421 PARAMS ((BuildInstr *));
422static bfd_boolean xg_is_narrow_insn
423 PARAMS ((TInsn *));
424static bfd_boolean xg_is_single_relaxable_insn
425 PARAMS ((TInsn *));
426static int xg_get_max_narrow_insn_size
427 PARAMS ((xtensa_opcode));
428static int xg_get_max_insn_widen_size
429 PARAMS ((xtensa_opcode));
430static int xg_get_max_insn_widen_literal_size
431 PARAMS ((xtensa_opcode));
432static bfd_boolean xg_is_relaxable_insn
433 PARAMS ((TInsn *, int));
434static symbolS *get_special_literal_symbol
435 PARAMS ((void));
436static symbolS *get_special_label_symbol
437 PARAMS ((void));
438static bfd_boolean xg_build_to_insn
439 PARAMS ((TInsn *, TInsn *, BuildInstr *));
440static bfd_boolean xg_build_to_stack
441 PARAMS ((IStack *, TInsn *, BuildInstr *));
442static bfd_boolean xg_expand_to_stack
443 PARAMS ((IStack *, TInsn *, int));
444static bfd_boolean xg_expand_narrow
445 PARAMS ((TInsn *, TInsn *));
446static bfd_boolean xg_immeds_fit
447 PARAMS ((const TInsn *));
448static bfd_boolean xg_symbolic_immeds_fit
449 PARAMS ((const TInsn *, segT, fragS *, offsetT, long));
450static bfd_boolean xg_check_operand
451 PARAMS ((int32, xtensa_operand));
452static int is_dnrange
453 PARAMS ((fragS *, symbolS *, long));
454static int xg_assembly_relax
455 PARAMS ((IStack *, TInsn *, segT, fragS *, offsetT, int, long));
456static void xg_force_frag_space
457 PARAMS ((int));
458static void xg_finish_frag
459 PARAMS ((char *, enum xtensa_relax_statesE, int, bfd_boolean));
460static bfd_boolean is_branch_jmp_to_next
461 PARAMS ((TInsn *, fragS *));
462static void xg_add_branch_and_loop_targets
463 PARAMS ((TInsn *));
464static bfd_boolean xg_instruction_matches_rule
465 PARAMS ((TInsn *, TransitionRule *));
466static TransitionRule *xg_instruction_match
467 PARAMS ((TInsn *));
468static bfd_boolean xg_build_token_insn
469 PARAMS ((BuildInstr *, TInsn *, TInsn *));
470static bfd_boolean xg_simplify_insn
471 PARAMS ((TInsn *, TInsn *));
472static bfd_boolean xg_expand_assembly_insn
473 PARAMS ((IStack *, TInsn *));
474static symbolS *xg_assemble_literal
475 PARAMS ((TInsn *));
476static void xg_assemble_literal_space
477 PARAMS ((int));
478static symbolS *xtensa_create_literal_symbol
479 PARAMS ((segT, fragS *));
480static symbolS *xtensa_create_local_symbol
481 PARAMS ((bfd *, const char *, segT, valueT, fragS *));
482static bfd_boolean get_is_linkonce_section
483 PARAMS ((bfd *, segT));
484static bfd_boolean xg_emit_insn
485 PARAMS ((TInsn *, bfd_boolean));
486static bfd_boolean xg_emit_insn_to_buf
487 PARAMS ((TInsn *, char *, fragS *, offsetT, bfd_boolean));
488static bfd_boolean xg_add_opcode_fix
489 PARAMS ((xtensa_opcode, int, expressionS *, fragS *, offsetT));
490static void xg_resolve_literals
491 PARAMS ((TInsn *, symbolS *));
492static void xg_resolve_labels
493 PARAMS ((TInsn *, symbolS *));
494static void xg_assemble_tokens
495 PARAMS ((TInsn *));
496static bfd_boolean is_register_writer
497 PARAMS ((const TInsn *, const char *, int));
498static bfd_boolean is_bad_loopend_opcode
499 PARAMS ((const TInsn *));
500static bfd_boolean is_unaligned_label
501 PARAMS ((symbolS *));
502static fragS *next_non_empty_frag
503 PARAMS ((const fragS *));
504static xtensa_opcode next_frag_opcode
505 PARAMS ((const fragS *));
506static void update_next_frag_nop_state
507 PARAMS ((fragS *));
508static bfd_boolean next_frag_is_branch_target
509 PARAMS ((const fragS *));
510static bfd_boolean next_frag_is_loop_target
511 PARAMS ((const fragS *));
512static addressT next_frag_pre_opcode_bytes
513 PARAMS ((const fragS *));
514static bfd_boolean is_next_frag_target
515 PARAMS ((const fragS *, const fragS *));
516static void xtensa_mark_literal_pool_location
517 PARAMS ((bfd_boolean));
518static void xtensa_move_labels
519 PARAMS ((fragS *, valueT, fragS *, valueT));
520static void assemble_nop
521 PARAMS ((size_t, char *));
522static addressT get_expanded_loop_offset
523 PARAMS ((xtensa_opcode));
524static fragS *get_literal_pool_location
525 PARAMS ((segT));
526static void set_literal_pool_location
527 PARAMS ((segT, fragS *));
528
529/* Helpers for xtensa_end(). */
530
531static void xtensa_cleanup_align_frags
532 PARAMS ((void));
533static void xtensa_fix_target_frags
534 PARAMS ((void));
535static bfd_boolean frag_can_negate_branch
536 PARAMS ((fragS *));
537static void xtensa_fix_a0_b_retw_frags
538 PARAMS ((void));
539static bfd_boolean next_instrs_are_b_retw
540 PARAMS ((fragS *));
541static void xtensa_fix_b_j_loop_end_frags
542 PARAMS ((void));
543static bfd_boolean next_instr_is_loop_end
544 PARAMS ((fragS *));
545static void xtensa_fix_close_loop_end_frags
546 PARAMS ((void));
547static size_t min_bytes_to_other_loop_end
548 PARAMS ((fragS *, fragS *, offsetT, size_t));
549static size_t unrelaxed_frag_min_size
550 PARAMS ((fragS *));
551static void xtensa_fix_short_loop_frags
552 PARAMS ((void));
553static size_t count_insns_to_loop_end
554 PARAMS ((fragS *, bfd_boolean, size_t));
555static size_t unrelaxed_frag_min_insn_count
556 PARAMS ((fragS *));
557static bfd_boolean branch_before_loop_end
558 PARAMS ((fragS *));
559static bfd_boolean unrelaxed_frag_has_b_j
560 PARAMS ((fragS *));
561static void xtensa_sanity_check
562 PARAMS ((void));
563static bfd_boolean is_empty_loop
564 PARAMS ((const TInsn *, fragS *));
565static bfd_boolean is_local_forward_loop
566 PARAMS ((const TInsn *, fragS *));
567
568/* Alignment Functions. */
569
570static size_t get_text_align_power
571 PARAMS ((int));
572static addressT get_text_align_max_fill_size
573 PARAMS ((int, bfd_boolean, bfd_boolean));
574static addressT get_text_align_fill_size
575 PARAMS ((addressT, int, int, bfd_boolean, bfd_boolean));
576static size_t get_text_align_nop_count
577 PARAMS ((size_t, bfd_boolean));
578static size_t get_text_align_nth_nop_size
579 PARAMS ((size_t, size_t, bfd_boolean));
580static addressT get_noop_aligned_address
581 PARAMS ((fragS *, addressT));
582static addressT get_widen_aligned_address
583 PARAMS ((fragS *, addressT));
584
585/* Helpers for xtensa_relax_frag(). */
586
587static long relax_frag_text_align
588 PARAMS ((fragS *, long));
589static long relax_frag_add_nop
590 PARAMS ((fragS *));
591static long relax_frag_narrow
592 PARAMS ((fragS *, long));
593static bfd_boolean future_alignment_required
594 PARAMS ((fragS *, long));
595static long relax_frag_immed
596 PARAMS ((segT, fragS *, long, int, int *));
597
598/* Helpers for md_convert_frag(). */
599
600static void convert_frag_align_next_opcode
601 PARAMS ((fragS *));
602static void convert_frag_narrow
603 PARAMS ((fragS *));
604static void convert_frag_immed
605 PARAMS ((segT, fragS *, int));
606static fixS *fix_new_exp_in_seg
607 PARAMS ((segT, subsegT, fragS *, int, int, expressionS *, int,
608 bfd_reloc_code_real_type));
609static void convert_frag_immed_finish_loop
610 PARAMS ((segT, fragS *, TInsn *));
611static offsetT get_expression_value
612 PARAMS ((segT, expressionS *));
613
614/* Flags for the Last Instruction in Each Subsegment. */
615
616static unsigned get_last_insn_flags
617 PARAMS ((segT, subsegT));
618static void set_last_insn_flags
619 PARAMS ((segT, subsegT, unsigned, bfd_boolean));
620
621/* Segment list functions. */
622
623static void xtensa_remove_section
624 PARAMS ((segT));
625static void xtensa_insert_section
626 PARAMS ((segT, segT));
627static void xtensa_move_seg_list_to_beginning
628 PARAMS ((seg_list *));
629static void xtensa_move_literals
630 PARAMS ((void));
631static void xtensa_move_frag_symbol
632 PARAMS ((symbolS *));
633static void xtensa_move_frag_symbols
634 PARAMS ((void));
635static void xtensa_reorder_seg_list
636 PARAMS ((seg_list *, segT));
637static void xtensa_reorder_segments
638 PARAMS ((void));
639static segT get_last_sec
640 PARAMS ((void));
641static void xtensa_switch_to_literal_fragment
642 PARAMS ((emit_state *));
643static void xtensa_switch_section_emit_state
644 PARAMS ((emit_state *, segT, subsegT));
645static void xtensa_restore_emit_state
646 PARAMS ((emit_state *));
647static void cache_literal_section
648 PARAMS ((seg_list *, const char *, segT *));
649static segT retrieve_literal_seg
650 PARAMS ((seg_list *, const char *));
651static segT seg_present
652 PARAMS ((const char *));
653static void add_seg_list
654 PARAMS ((seg_list *, segT));
655
656/* Property Table (e.g., ".xt.insn" and ".xt.lit") Functions. */
657
658static void xtensa_create_property_segments
659 PARAMS ((frag_predicate, const char *, xt_section_type));
660static segment_info_type *retrieve_segment_info
661 PARAMS ((segT));
662static segT retrieve_xtensa_section
663 PARAMS ((char *));
664static bfd_boolean section_has_property
665 PARAMS ((segT sec, frag_predicate));
666static void add_xt_block_frags
667 PARAMS ((segT, segT, xtensa_block_info **, frag_predicate));
668static bfd_boolean get_frag_is_literal
669 PARAMS ((const fragS *));
670static bfd_boolean get_frag_is_insn
671 PARAMS ((const fragS *));
672
673/* Import from elf32-xtensa.c in BFD library. */
674extern char *xtensa_get_property_section_name
675 PARAMS ((bfd *, asection *, const char *));
676
677/* TInsn and IStack functions. */
678static bfd_boolean tinsn_has_symbolic_operands
679 PARAMS ((const TInsn *));
680static bfd_boolean tinsn_has_invalid_symbolic_operands
681 PARAMS ((const TInsn *));
682static bfd_boolean tinsn_has_complex_operands
683 PARAMS ((const TInsn *));
684static bfd_boolean tinsn_to_insnbuf
685 PARAMS ((TInsn *, xtensa_insnbuf));
686static bfd_boolean tinsn_check_arguments
687 PARAMS ((const TInsn *));
688static void tinsn_from_chars
689 PARAMS ((TInsn *, char *));
690static void tinsn_immed_from_frag
691 PARAMS ((TInsn *, fragS *));
692static int get_num_stack_text_bytes
693 PARAMS ((IStack *));
694static int get_num_stack_literal_bytes
695 PARAMS ((IStack *));
696
697/* Expression Utilities. */
698bfd_boolean expr_is_const
699 PARAMS ((const expressionS *));
700offsetT get_expr_const
701 PARAMS ((const expressionS *));
702void set_expr_const
703 PARAMS ((expressionS *, offsetT));
704void set_expr_symbol_offset
705 PARAMS ((expressionS *, symbolS *, offsetT));
706bfd_boolean expr_is_equal
707 PARAMS ((expressionS *, expressionS *));
708static void copy_expr
709 PARAMS ((expressionS *, const expressionS *));
710
711#ifdef XTENSA_SECTION_RENAME
712static void build_section_rename
713 PARAMS ((const char *));
714static void add_section_rename
715 PARAMS ((char *, char *));
716#endif
717
e0001a05
NC		 718
719/* ISA imported from bfd. */
720extern xtensa_isa xtensa_default_isa;
721
722extern int target_big_endian;
723
724static xtensa_opcode xtensa_addi_opcode;
725static xtensa_opcode xtensa_addmi_opcode;
726static xtensa_opcode xtensa_call0_opcode;
727static xtensa_opcode xtensa_call4_opcode;
728static xtensa_opcode xtensa_call8_opcode;
729static xtensa_opcode xtensa_call12_opcode;
730static xtensa_opcode xtensa_callx0_opcode;
731static xtensa_opcode xtensa_callx4_opcode;
732static xtensa_opcode xtensa_callx8_opcode;
733static xtensa_opcode xtensa_callx12_opcode;
734static xtensa_opcode xtensa_entry_opcode;
735static xtensa_opcode xtensa_isync_opcode;
736static xtensa_opcode xtensa_j_opcode;
737static xtensa_opcode xtensa_jx_opcode;
738static xtensa_opcode xtensa_loop_opcode;
739static xtensa_opcode xtensa_loopnez_opcode;
740static xtensa_opcode xtensa_loopgtz_opcode;
741static xtensa_opcode xtensa_nop_n_opcode;
742static xtensa_opcode xtensa_or_opcode;
743static xtensa_opcode xtensa_ret_opcode;
744static xtensa_opcode xtensa_ret_n_opcode;
745static xtensa_opcode xtensa_retw_opcode;
746static xtensa_opcode xtensa_retw_n_opcode;
747static xtensa_opcode xtensa_rsr_opcode;
748static xtensa_opcode xtensa_waiti_opcode;
749
750\f
751/* Command-line Options. */
752
753bfd_boolean use_literal_section = TRUE;
754static bfd_boolean align_targets = TRUE;
755static bfd_boolean align_only_targets = FALSE;
756static bfd_boolean software_a0_b_retw_interlock = TRUE;
757static bfd_boolean has_a0_b_retw = FALSE;
758static bfd_boolean workaround_a0_b_retw = TRUE;
759
760static bfd_boolean software_avoid_b_j_loop_end = TRUE;
761static bfd_boolean workaround_b_j_loop_end = TRUE;
762static bfd_boolean maybe_has_b_j_loop_end = FALSE;
763
764static bfd_boolean software_avoid_short_loop = TRUE;
765static bfd_boolean workaround_short_loop = TRUE;
766static bfd_boolean maybe_has_short_loop = FALSE;
767
768static bfd_boolean software_avoid_close_loop_end = TRUE;
769static bfd_boolean workaround_close_loop_end = TRUE;
770static bfd_boolean maybe_has_close_loop_end = FALSE;
771
772/* When avoid_short_loops is true, all loops with early exits must
773 have at least 3 instructions. avoid_all_short_loops is a modifier
774 to the avoid_short_loop flag. In addition to the avoid_short_loop
775 actions, all straightline loopgtz and loopnez must have at least 3
776 instructions. */
777
778static bfd_boolean software_avoid_all_short_loops = TRUE;
779static bfd_boolean workaround_all_short_loops = TRUE;
780
781/* This is on a per-instruction basis. */
782static bfd_boolean specific_opcode = FALSE;
783
784enum
785{
786 option_density = OPTION_MD_BASE,
787 option_no_density,
788
789 option_relax,
790 option_no_relax,
791
792 option_generics,
793 option_no_generics,
794
795 option_text_section_literals,
796 option_no_text_section_literals,
797
798 option_align_targets,
799 option_no_align_targets,
800
801 option_align_only_targets,
802 option_no_align_only_targets,
803
804 option_longcalls,
805 option_no_longcalls,
806
807 option_workaround_a0_b_retw,
808 option_no_workaround_a0_b_retw,
809
810 option_workaround_b_j_loop_end,
811 option_no_workaround_b_j_loop_end,
812
813 option_workaround_short_loop,
814 option_no_workaround_short_loop,
815
816 option_workaround_all_short_loops,
817 option_no_workaround_all_short_loops,
818
819 option_workaround_close_loop_end,
820 option_no_workaround_close_loop_end,
821
822 option_no_workarounds,
823
824#ifdef XTENSA_SECTION_RENAME
825 option_literal_section_name,
826 option_text_section_name,
827 option_data_section_name,
828 option_bss_section_name,
829 option_rename_section_name,
830#endif
831
832 option_eb,
833 option_el
834};
835
836const char *md_shortopts = "";
837
838struct option md_longopts[] =
839{
840 {"density", no_argument, NULL, option_density},
841 {"no-density", no_argument, NULL, option_no_density},
842 /* At least as early as alameda, --[no-]relax didn't work as
843 documented, so as of albany, --[no-]relax is equivalent to
844 --[no-]generics. Both of these will be deprecated in
845 BearValley. */
846 {"relax", no_argument, NULL, option_generics},
847 {"no-relax", no_argument, NULL, option_no_generics},
848 {"generics", no_argument, NULL, option_generics},
849 {"no-generics", no_argument, NULL, option_no_generics},
850 {"text-section-literals", no_argument, NULL, option_text_section_literals},
851 {"no-text-section-literals", no_argument, NULL,
852 option_no_text_section_literals},
853 /* This option was changed from -align-target to -target-align
854 because it conflicted with the "-al" option. */
855 {"target-align", no_argument, NULL, option_align_targets},
856 {"no-target-align", no_argument, NULL,
857 option_no_align_targets},
858#if 0
859 /* This option should do a better job aligning targets because
860 it will only attempt to align targets that are the target of a
861 branch. */
862 { "target-align-only", no_argument, NULL, option_align_only_targets },
863 { "no-target-align-only", no_argument, NULL, option_no_align_only_targets },
864#endif /* 0 */
865 {"longcalls", no_argument, NULL, option_longcalls},
866 {"no-longcalls", no_argument, NULL, option_no_longcalls},
867
868 {"no-workaround-a0-b-retw", no_argument, NULL,
869 option_no_workaround_a0_b_retw},
870 {"workaround-a0-b-retw", no_argument, NULL, option_workaround_a0_b_retw},
871
872 {"no-workaround-b-j-loop-end", no_argument, NULL,
873 option_no_workaround_b_j_loop_end},
874 {"workaround-b-j-loop-end", no_argument, NULL,
875 option_workaround_b_j_loop_end},
876
877 {"no-workaround-short-loops", no_argument, NULL,
878 option_no_workaround_short_loop},
879 {"workaround-short-loops", no_argument, NULL, option_workaround_short_loop},
880
881 {"no-workaround-all-short-loops", no_argument, NULL,
882 option_no_workaround_all_short_loops},
883 {"workaround-all-short-loop", no_argument, NULL,
884 option_workaround_all_short_loops},
885
886 {"no-workaround-close-loop-end", no_argument, NULL,
887 option_no_workaround_close_loop_end},
888 {"workaround-close-loop-end", no_argument, NULL,
889 option_workaround_close_loop_end},
890
891 {"no-workarounds", no_argument, NULL, option_no_workarounds},
892
893#ifdef XTENSA_SECTION_RENAME
894 {"literal-section-name", required_argument, NULL,
895 option_literal_section_name},
896 {"text-section-name", required_argument, NULL,
897 option_text_section_name},
898 {"data-section-name", required_argument, NULL,
899 option_data_section_name},
900 {"rename-section", required_argument, NULL,
901 option_rename_section_name},
902 {"bss-section-name", required_argument, NULL,
903 option_bss_section_name},
904#endif /* XTENSA_SECTION_RENAME */
905
906 {NULL, no_argument, NULL, 0}
907};
908
909size_t md_longopts_size = sizeof md_longopts;
910
911
912int
913md_parse_option (c, arg)
914 int c;
915 char *arg;
916{
917 switch (c)
918 {
919 case option_density:
920 if (!density_supported)
921 {
922 as_bad (_("'--density' option not supported in this Xtensa "
923 "configuration"));
924 return 0;
925 }
926 directive_state[directive_density] = TRUE;
927 return 1;
928 case option_no_density:
929 directive_state[directive_density] = FALSE;
930 return 1;
931 case option_generics:
932 directive_state[directive_generics] = TRUE;
933 return 1;
934 case option_no_generics:
935 directive_state[directive_generics] = FALSE;
936 return 1;
937 case option_longcalls:
938 directive_state[directive_longcalls] = TRUE;
939 return 1;
940 case option_no_longcalls:
941 directive_state[directive_longcalls] = FALSE;
942 return 1;
943 case option_text_section_literals:
944 use_literal_section = FALSE;
945 return 1;
946 case option_no_text_section_literals:
947 use_literal_section = TRUE;
948 return 1;
949 case option_workaround_a0_b_retw:
950 workaround_a0_b_retw = TRUE;
951 software_a0_b_retw_interlock = TRUE;
952 return 1;
953 case option_no_workaround_a0_b_retw:
954 workaround_a0_b_retw = FALSE;
955 software_a0_b_retw_interlock = FALSE;
956 return 1;
957 case option_workaround_b_j_loop_end:
958 workaround_b_j_loop_end = TRUE;
959 software_avoid_b_j_loop_end = TRUE;
960 return 1;
961 case option_no_workaround_b_j_loop_end:
962 workaround_b_j_loop_end = FALSE;
963 software_avoid_b_j_loop_end = FALSE;
964 return 1;
965
966 case option_workaround_short_loop:
967 workaround_short_loop = TRUE;
968 software_avoid_short_loop = TRUE;
969 return 1;
970 case option_no_workaround_short_loop:
971 workaround_short_loop = FALSE;
972 software_avoid_short_loop = FALSE;
973 return 1;
974
975 case option_workaround_all_short_loops:
976 workaround_all_short_loops = TRUE;
977 software_avoid_all_short_loops = TRUE;
978 return 1;
979 case option_no_workaround_all_short_loops:
980 workaround_all_short_loops = FALSE;
981 software_avoid_all_short_loops = FALSE;
982 return 1;
983
984 case option_workaround_close_loop_end:
985 workaround_close_loop_end = TRUE;
986 software_avoid_close_loop_end = TRUE;
987 return 1;
988 case option_no_workaround_close_loop_end:
989 workaround_close_loop_end = FALSE;
990 software_avoid_close_loop_end = FALSE;
991 return 1;
992
993 case option_no_workarounds:
994 workaround_a0_b_retw = FALSE;
995 software_a0_b_retw_interlock = FALSE;
996 workaround_b_j_loop_end = FALSE;
997 software_avoid_b_j_loop_end = FALSE;
998 workaround_short_loop = FALSE;
999 software_avoid_short_loop = FALSE;
1000 workaround_all_short_loops = FALSE;
1001 software_avoid_all_short_loops = FALSE;
1002 workaround_close_loop_end = FALSE;
1003 software_avoid_close_loop_end = FALSE;
1004 return 1;
1005
1006 case option_align_targets:
1007 align_targets = TRUE;
1008 return 1;
1009 case option_no_align_targets:
1010 align_targets = FALSE;
1011 return 1;
1012
1013 case option_align_only_targets:
1014 align_only_targets = TRUE;
1015 return 1;
1016 case option_no_align_only_targets:
1017 align_only_targets = FALSE;
1018 return 1;
1019
1020#ifdef XTENSA_SECTION_RENAME
1021 case option_literal_section_name:
1022 add_section_rename (".literal", arg);
1023 as_warn (_("'--literal-section-name' is deprecated; "
1024 "use '--rename-section .literal=NEWNAME'"));
1025 return 1;
1026
1027 case option_text_section_name:
1028 add_section_rename (".text", arg);
1029 as_warn (_("'--text-section-name' is deprecated; "
1030 "use '--rename-section .text=NEWNAME'"));
1031 return 1;
1032
1033 case option_data_section_name:
1034 add_section_rename (".data", arg);
1035 as_warn (_("'--data-section-name' is deprecated; "
1036 "use '--rename-section .data=NEWNAME'"));
1037 return 1;
1038
1039 case option_bss_section_name:
1040 add_section_rename (".bss", arg);
1041 as_warn (_("'--bss-section-name' is deprecated; "
1042 "use '--rename-section .bss=NEWNAME'"));
1043 return 1;
1044
1045 case option_rename_section_name:
1046 build_section_rename (arg);
1047 return 1;
1048#endif /* XTENSA_SECTION_RENAME */
1049
1050 case 'Q':
1051 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1052 should be emitted or not. FIXME: Not implemented. */
1053 return 1;
1054
1055 default:
1056 return 0;
1057 }
1058}
1059
1060
1061void
1062md_show_usage (stream)
1063 FILE *stream;
1064{
1065 fputs ("\nXtensa options:\n"
1066 "--[no-]density [Do not] emit density instructions\n"
1067 "--[no-]relax [Do not] perform branch relaxation\n"
1068 "--[no-]generics [Do not] transform instructions\n"
1069 "--[no-]longcalls [Do not] emit 32-bit call sequences\n"
1070 "--[no-]target-align [Do not] try to align branch targets\n"
1071 "--[no-]text-section-literals\n"
1072 " [Do not] put literals in the text section\n"
1073 "--no-workarounds Do not use any Xtensa workarounds\n"
1074#ifdef XTENSA_SECTION_RENAME
1075 "--rename-section old=new(:old1=new1)*\n"
1076 " Rename section 'old' to 'new'\n"
1077 "\nThe following Xtensa options are deprecated\n"
1078 "--literal-section-name Name of literal section (default .literal)\n"
1079 "--text-section-name Name of text section (default .text)\n"
1080 "--data-section-name Name of data section (default .data)\n"
1081 "--bss-section-name Name of bss section (default .bss)\n"
1082#endif
1083 , stream);
1084}
1085
1086\f
1087/* Directive data and functions. */
1088
1089typedef struct state_stackS_struct
1090{
1091 directiveE directive;
1092 bfd_boolean negated;
1093 bfd_boolean old_state;
1094 const char *file;
1095 unsigned int line;
1096 const void *datum;
1097 struct state_stackS_struct *prev;
1098} state_stackS;
1099
1100state_stackS *directive_state_stack;
1101
1102const pseudo_typeS md_pseudo_table[] =
1103{
1104 {"align", s_align_bytes, 0}, /* Defaulting is invalid (0) */
1105 {"literal_position", xtensa_literal_position, 0},
1106 {"frame", s_ignore, 0}, /* formerly used for STABS debugging */
1107 {"word", cons, 4},
1108 {"begin", xtensa_begin_directive, 0},
1109 {"end", xtensa_end_directive, 0},
e0001a05
NC		 1110 {"literal", xtensa_literal_pseudo, 0},
1111 {NULL, 0, 0},
1112};
1113
1114
1115bfd_boolean
1116use_generics ()
1117{
1118 return directive_state[directive_generics];
1119}
1120
1121
1122bfd_boolean
1123use_longcalls ()
1124{
1125 return directive_state[directive_longcalls];
1126}
1127
1128
1129bfd_boolean
1130code_density_available ()
1131{
1132 return directive_state[directive_density];
1133}
1134
1135
1136bfd_boolean
1137can_relax ()
1138{
1139 return use_generics ();
1140}
1141
1142
1143static void
1144directive_push (directive, negated, datum)
1145 directiveE directive;
1146 bfd_boolean negated;
1147 const void *datum;
1148{
1149 char *file;
1150 unsigned int line;
1151 state_stackS *stack = (state_stackS *) xmalloc (sizeof (state_stackS));
1152
1153 as_where (&file, &line);
1154
1155 stack->directive = directive;
1156 stack->negated = negated;
1157 stack->old_state = directive_state[directive];
1158 stack->file = file;
1159 stack->line = line;
1160 stack->datum = datum;
1161 stack->prev = directive_state_stack;
1162 directive_state_stack = stack;
1163
1164 directive_state[directive] = !negated;
1165}
1166
1167static void
1168directive_pop (directive, negated, file, line, datum)
1169 directiveE *directive;
1170 bfd_boolean *negated;
1171 const char **file;
1172 unsigned int *line;
1173 const void **datum;
1174{
1175 state_stackS *top = directive_state_stack;
1176
1177 if (!directive_state_stack)
1178 {
1179 as_bad (_("unmatched end directive"));
1180 *directive = directive_none;
1181 return;
1182 }
1183
1184 directive_state[directive_state_stack->directive] = top->old_state;
1185 *directive = top->directive;
1186 *negated = top->negated;
1187 *file = top->file;
1188 *line = top->line;
1189 *datum = top->datum;
1190 directive_state_stack = top->prev;
1191 free (top);
1192}
1193
1194
1195static void
1196directive_balance ()
1197{
1198 while (directive_state_stack)
1199 {
1200 directiveE directive;
1201 bfd_boolean negated;
1202 const char *file;
1203 unsigned int line;
1204 const void *datum;
1205
1206 directive_pop (&directive, &negated, &file, &line, &datum);
1207 as_warn_where ((char *) file, line,
1208 _(".begin directive with no matching .end directive"));
1209 }
1210}
1211
1212
1213static bfd_boolean
1214inside_directive (dir)
1215 directiveE dir;
1216{
1217 state_stackS *top = directive_state_stack;
1218
1219 while (top && top->directive != dir)
1220 top = top->prev;
1221
1222 return (top != NULL);
1223}
1224
1225
1226static void
1227get_directive (directive, negated)
1228 directiveE *directive;
1229 bfd_boolean *negated;
1230{
1231 int len;
1232 unsigned i;
1233
1234 if (strncmp (input_line_pointer, "no-", 3) != 0)
1235 *negated = FALSE;
1236 else
1237 {
1238 *negated = TRUE;
1239 input_line_pointer += 3;
1240 }
1241
1242 len = strspn (input_line_pointer,
1243 "abcdefghijklmnopqrstuvwxyz_/0123456789.");
1244
1245 for (i = 0; i < sizeof (directive_info) / sizeof (*directive_info); ++i)
1246 {
1247 if (strncmp (input_line_pointer, directive_info[i].name, len) == 0)
1248 {
1249 input_line_pointer += len;
1250 *directive = (directiveE) i;
1251 if (*negated && !directive_info[i].can_be_negated)
1252 as_bad (_("directive %s can't be negated"),
1253 directive_info[i].name);
1254 return;
1255 }
1256 }
1257
1258 as_bad (_("unknown directive"));
1259 *directive = (directiveE) XTENSA_UNDEFINED;
1260}
1261
1262
1263static void
1264xtensa_begin_directive (ignore)
1265 int ignore ATTRIBUTE_UNUSED;
1266{
1267 directiveE directive;
1268 bfd_boolean negated;
1269 emit_state *state;
1270 int len;
1271 lit_state *ls;
1272
1273 get_directive (&directive, &negated);
1274 if (directive == (directiveE) XTENSA_UNDEFINED)
1275 {
1276 discard_rest_of_line ();
1277 return;
1278 }
1279
1280 switch (directive)
1281 {
1282 case directive_literal:
1283 state = (emit_state *) xmalloc (sizeof (emit_state));
1284 xtensa_switch_to_literal_fragment (state);
1285 directive_push (directive_literal, negated, state);
1286 break;
1287
1288 case directive_literal_prefix:
1289 /* Check to see if the current fragment is a literal
1290 fragment. If it is, then this operation is not allowed. */
1291 if (frag_now->tc_frag_data.is_literal)
1292 {
1293 as_bad (_("cannot set literal_prefix inside literal fragment"));
1294 return;
1295 }
1296
1297 /* Allocate the literal state for this section and push
1298 onto the directive stack. */
1299 ls = xmalloc (sizeof (lit_state));
1300 assert (ls);
1301
1302 *ls = default_lit_sections;
1303
1304 directive_push (directive_literal_prefix, negated, ls);
1305
1306 /* Parse the new prefix from the input_line_pointer. */
1307 SKIP_WHITESPACE ();
1308 len = strspn (input_line_pointer,
1309 "ABCDEFGHIJKLMNOPQRSTUVWXYZ"
1310 "abcdefghijklmnopqrstuvwxyz_/0123456789.$");
1311
1312 /* Process the new prefix. */
1313 xtensa_literal_prefix (input_line_pointer, len);
1314
1315 /* Skip the name in the input line. */
1316 input_line_pointer += len;
1317 break;
1318
1319 case directive_freeregs:
1320 /* This information is currently unused, but we'll accept the statement
1321 and just discard the rest of the line. This won't check the syntax,
1322 but it will accept every correct freeregs directive. */
1323 input_line_pointer += strcspn (input_line_pointer, "\n");
1324 directive_push (directive_freeregs, negated, 0);
1325 break;
1326
1327 case directive_density:
1328 if (!density_supported && !negated)
1329 {
1330 as_warn (_("Xtensa density option not supported; ignored"));
1331 break;
1332 }
1333 /* fall through */
1334
1335 default:
1336 directive_push (directive, negated, 0);
1337 break;
1338 }
1339
1340 demand_empty_rest_of_line ();
1341}
1342
1343
1344static void
1345xtensa_end_directive (ignore)
1346 int ignore ATTRIBUTE_UNUSED;
1347{
1348 directiveE begin_directive, end_directive;
1349 bfd_boolean begin_negated, end_negated;
1350 const char *file;
1351 unsigned int line;
1352 emit_state *state;
1353 lit_state *s;
1354
1355 get_directive (&end_directive, &end_negated);
1356 if (end_directive == (directiveE) XTENSA_UNDEFINED)
1357 {
1358 discard_rest_of_line ();
1359 return;
1360 }
1361
1362 if (end_directive == directive_density && !density_supported && !end_negated)
1363 {
1364 as_warn (_("Xtensa density option not supported; ignored"));
1365 demand_empty_rest_of_line ();
1366 return;
1367 }
1368
1369 directive_pop (&begin_directive, &begin_negated, &file, &line,
1370 (const void **) &state);
1371
1372 if (begin_directive != directive_none)
1373 {
1374 if (begin_directive != end_directive || begin_negated != end_negated)
1375 {
1376 as_bad (_("does not match begin %s%s at %s:%d"),
1377 begin_negated ? "no-" : "",
1378 directive_info[begin_directive].name, file, line);
1379 }
1380 else
1381 {
1382 switch (end_directive)
1383 {
1384 case directive_literal:
1385 frag_var (rs_fill, 0, 0, 0, NULL, 0, NULL);
1386 xtensa_restore_emit_state (state);
1387 free (state);
1388 break;
1389
1390 case directive_freeregs:
1391 break;
1392
1393 case directive_literal_prefix:
1394 /* Restore the default collection sections from saved state. */
1395 s = (lit_state *) state;
1396 assert (s);
1397
1398 if (use_literal_section)
1399 default_lit_sections = *s;
1400
1401 /* free the state storage */
1402 free (s);
1403 break;
1404
1405 default:
1406 break;
1407 }
1408 }
1409 }
1410
1411 demand_empty_rest_of_line ();
1412}
1413
1414
1415/* Place an aligned literal fragment at the current location. */
1416
1417static void
1418xtensa_literal_position (ignore)
1419 int ignore ATTRIBUTE_UNUSED;
1420{
1421 if (inside_directive (directive_literal))
1422 as_warn (_(".literal_position inside literal directive; ignoring"));
1423 else if (!use_literal_section)
1424 xtensa_mark_literal_pool_location (FALSE);
1425
1426 demand_empty_rest_of_line ();
1427}
1428
1429
1430/* Support .literal label, value@plt + offset. */
1431
1432static void
1433xtensa_literal_pseudo (ignored)
1434 int ignored ATTRIBUTE_UNUSED;
1435{
1436 emit_state state;
1745fcba 1437 char *p, *base_name;
e0001a05 1438 char c;
e0001a05
NC		 1439 expressionS expP;
1440 segT dest_seg;
1441
1442 /* If we are using text-section literals, then this is the right value... */
1443 dest_seg = now_seg;
1444
1445 base_name = input_line_pointer;
1446
1447 xtensa_switch_to_literal_fragment (&state);
1448
1449 /* ...but if we aren't using text-section-literals, then we
1450 need to put them in the section we just switched to. */
1451 if (use_literal_section)
1452 dest_seg = now_seg;
1453
1454 /* All literals are aligned to four-byte boundaries
1455 which is handled by switch to literal fragment. */
1456 /* frag_align (2, 0, 0); */
1457
1458 c = get_symbol_end ();
1459 /* Just after name is now '\0'. */
1460 p = input_line_pointer;
1461 *p = c;
1462 SKIP_WHITESPACE ();
1463
1464 if (*input_line_pointer != ',' && *input_line_pointer != ':')
1465 {
1466 as_bad (_("expected comma or colon after symbol name; "
1467 "rest of line ignored"));
1468 ignore_rest_of_line ();
1469 xtensa_restore_emit_state (&state);
1470 return;
1471 }
1472 *p = 0;
1473
e0001a05 1474 colon (base_name);
e0001a05
NC		 1475
1476 do
1477 {
1478 input_line_pointer++; /* skip ',' or ':' */
1479
1480 expr (0, &expP);
1481
e0001a05
NC		 1482 /* We only support 4-byte literals with .literal. */
1483 emit_expr (&expP, 4);
e0001a05
NC		 1484 }
1485 while (*input_line_pointer == ',');
1486
1487 *p = c;
e0001a05
NC		 1488
1489 demand_empty_rest_of_line ();
1490
1491 xtensa_restore_emit_state (&state);
1492}
1493
1494
1495static void
1496xtensa_literal_prefix (start, len)
1497 char const *start;
1498 int len;
1499{
1500 segT s_now; /* Storage for the current seg and subseg. */
1501 subsegT ss_now;
1502 char *name; /* Pointer to the name itself. */
1503 char *newname;
1504
1505 if (!use_literal_section)
1506 return;
1507
1508 /* Store away the current section and subsection. */
1509 s_now = now_seg;
1510 ss_now = now_subseg;
1511
1512 /* Get a null-terminated copy of the name. */
1513 name = xmalloc (len + 1);
1514 assert (name);
1515
1516 strncpy (name, start, len);
1517 name[len] = 0;
1518
1519 /* Allocate the sections (interesting note: the memory pointing to
1520 the name is actually used for the name by the new section). */
1521 newname = xmalloc (len + strlen (".literal") + 1);
1522 strcpy (newname, name);
1523 strcpy (newname + len, ".literal");
1524
1525 /* Note that retrieve_literal_seg does not create a segment if
1526 it already exists. */
1527 default_lit_sections.lit_seg = NULL; /* retrieved on demand */
1528
1529 /* Canonicalizing section names allows renaming literal
1530 sections to occur correctly. */
1531 default_lit_sections.lit_seg_name =
1532 tc_canonicalize_symbol_name (newname);
1533
1534 free (name);
1535
1536 /* Restore the current section and subsection and set the
1537 generation into the old segment. */
1538 subseg_set (s_now, ss_now);
1539}
1540
1541\f
1542/* Parsing and Idiom Translation. */
1543
1544static const char *
1545expression_end (name)
1546 const char *name;
1547{
1548 while (1)
1549 {
1550 switch (*name)
1551 {
1552 case ';':
1553 case '\0':
1554 case ',':
1555 return name;
1556 case ' ':
1557 case '\t':
1558 ++name;
1559 continue;
1560 default:
1561 return 0;
1562 }
1563 }
1564}
1565
1566
1567#define ERROR_REG_NUM ((unsigned) -1)
1568
1569static unsigned
1570tc_get_register (prefix)
1571 const char *prefix;
1572{
1573 unsigned reg;
1574 const char *next_expr;
1575 const char *old_line_pointer;
1576
1577 SKIP_WHITESPACE ();
1578 old_line_pointer = input_line_pointer;
1579
1580 if (*input_line_pointer == '$')
1581 ++input_line_pointer;
1582
1583 /* Accept "sp" as a synonym for "a1". */
1584 if (input_line_pointer[0] == 's' && input_line_pointer[1] == 'p'
1585 && expression_end (input_line_pointer + 2))
1586 {
1587 input_line_pointer += 2;
1588 return 1; /* AR[1] */
1589 }
1590
1591 while (*input_line_pointer++ == *prefix++)
1592 ;
1593 --input_line_pointer;
1594 --prefix;
1595
1596 if (*prefix)
1597 {
1598 as_bad (_("bad register name: %s"), old_line_pointer);
1599 return ERROR_REG_NUM;
1600 }
1601
1602 if (!ISDIGIT ((unsigned char) *input_line_pointer))
1603 {
1604 as_bad (_("bad register number: %s"), input_line_pointer);
1605 return ERROR_REG_NUM;
1606 }
1607
1608 reg = 0;
1609
1610 while (ISDIGIT ((int) *input_line_pointer))
1611 reg = reg * 10 + *input_line_pointer++ - '0';
1612
1613 if (!(next_expr = expression_end (input_line_pointer)))
1614 {
1615 as_bad (_("bad register name: %s"), old_line_pointer);
1616 return ERROR_REG_NUM;
1617 }
1618
1619 input_line_pointer = (char *) next_expr;
1620
1621 return reg;
1622}
1623
1624
1625#define PLT_SUFFIX "@PLT"
1626#define plt_suffix "@plt"
1627
1628static void
1629expression_maybe_register (opnd, tok)
1630 xtensa_operand opnd;
1631 expressionS *tok;
1632{
1633 char *kind = xtensa_operand_kind (opnd);
1634
1635 if ((strlen (kind) == 1)
1636 && (*kind == 'l' || *kind == 'L' || *kind == 'i' || *kind == 'r'))
1637 {
1638 segT t = expression (tok);
1639 if (t == absolute_section && operand_is_pcrel_label (opnd))
1640 {
1641 assert (tok->X_op == O_constant);
1642 tok->X_op = O_symbol;
1643 tok->X_add_symbol = &abs_symbol;
1644 }
1645 if (tok->X_op == O_symbol
1646 && (!strncmp (input_line_pointer, PLT_SUFFIX,
1647 strlen (PLT_SUFFIX) - 1)
1648 || !strncmp (input_line_pointer, plt_suffix,
1649 strlen (plt_suffix) - 1)))
1650 {
1651 tok->X_add_symbol->sy_tc.plt = 1;
1652 input_line_pointer += strlen (plt_suffix);
1653 }
e0001a05
NC		 1654 }
1655 else
1656 {
1657 unsigned reg = tc_get_register (kind);
1658
1659 if (reg != ERROR_REG_NUM) /* Already errored */
1660 {
1661 uint32 buf = reg;
1662 if ((xtensa_operand_encode (opnd, &buf) != xtensa_encode_result_ok)
1663 || (reg != xtensa_operand_decode (opnd, buf)))
1664 as_bad (_("register number out of range"));
1665 }
1666
1667 tok->X_op = O_register;
1668 tok->X_add_symbol = 0;
1669 tok->X_add_number = reg;
1670 }
1671}
1672
1673
1674/* Split up the arguments for an opcode or pseudo-op. */
1675
1676static int
1677tokenize_arguments (args, str)
1678 char **args;
1679 char *str;
1680{
1681 char *old_input_line_pointer;
1682 bfd_boolean saw_comma = FALSE;
1683 bfd_boolean saw_arg = FALSE;
1684 int num_args = 0;
1685 char *arg_end, *arg;
1686 int arg_len;
1687
1688 /* Save and restore input_line_pointer around this function. */
1689 old_input_line_pointer = input_line_pointer;
1690 input_line_pointer = str;
1691
1692 while (*input_line_pointer)
1693 {
1694 SKIP_WHITESPACE ();
1695 switch (*input_line_pointer)
1696 {
1697 case '\0':
1698 goto fini;
1699
1700 case ',':
1701 input_line_pointer++;
1702 if (saw_comma || !saw_arg)
1703 goto err;
1704 saw_comma = TRUE;
1705 break;
1706
1707 default:
1708 if (!saw_comma && saw_arg)
1709 goto err;
1710
1711 arg_end = input_line_pointer + 1;
1712 while (!expression_end (arg_end))
1713 arg_end += 1;
1714
1715 arg_len = arg_end - input_line_pointer;
1716 arg = (char *) xmalloc (arg_len + 1);
1717 args[num_args] = arg;
1718
1719 strncpy (arg, input_line_pointer, arg_len);
1720 arg[arg_len] = '\0';
1721
1722 input_line_pointer = arg_end;
1723 num_args += 1;
1724 saw_comma = FALSE;
1725 saw_arg = TRUE;
1726 break;
1727 }
1728 }
1729
1730fini:
1731 if (saw_comma)
1732 goto err;
1733 input_line_pointer = old_input_line_pointer;
1734 return num_args;
1735
1736err:
1737 input_line_pointer = old_input_line_pointer;
1738 return -1;
1739}
1740
1741
1742/* Parse the arguments to an opcode. Return true on error. */
1743
1744static bfd_boolean
1745parse_arguments (insn, num_args, arg_strings)
1746 TInsn *insn;
1747 int num_args;
1748 char **arg_strings;
1749{
1750 expressionS *tok = insn->tok;
1751 xtensa_opcode opcode = insn->opcode;
1752 bfd_boolean had_error = TRUE;
1753 xtensa_isa isa = xtensa_default_isa;
1754 int n;
1755 int opcode_operand_count;
1756 int actual_operand_count = 0;
1757 xtensa_operand opnd = NULL;
1758 char *old_input_line_pointer;
1759
1760 if (insn->insn_type == ITYPE_LITERAL)
1761 opcode_operand_count = 1;
1762 else
1763 opcode_operand_count = xtensa_num_operands (isa, opcode);
1764
1765 memset (tok, 0, sizeof (*tok) * MAX_INSN_ARGS);
1766
1767 /* Save and restore input_line_pointer around this function. */
1768 old_input_line_pointer = input_line_pointer;
1769
1770 for (n = 0; n < num_args; n++)
1771 {
1772 input_line_pointer = arg_strings[n];
1773
1774 if (actual_operand_count >= opcode_operand_count)
1775 {
1776 as_warn (_("too many arguments"));
1777 goto err;
1778 }
1779 assert (actual_operand_count < MAX_INSN_ARGS);
1780
1781 opnd = xtensa_get_operand (isa, opcode, actual_operand_count);
1782 expression_maybe_register (opnd, tok);
1783
1784 if (tok->X_op == O_illegal || tok->X_op == O_absent)
1785 goto err;
1786 actual_operand_count++;
1787 tok++;
1788 }
1789
1790 insn->ntok = tok - insn->tok;
1791 had_error = FALSE;
1792
1793 err:
1794 input_line_pointer = old_input_line_pointer;
1795 return had_error;
1796}
1797
1798
1799static void
1800xg_reverse_shift_count (cnt_argp)
1801 char **cnt_argp;
1802{
1803 char *cnt_arg, *new_arg;
1804 cnt_arg = *cnt_argp;
1805
1806 /* replace the argument with "31-(argument)" */
1807 new_arg = (char *) xmalloc (strlen (cnt_arg) + 6);
1808 sprintf (new_arg, "31-(%s)", cnt_arg);
1809
1810 free (cnt_arg);
1811 *cnt_argp = new_arg;
1812}
1813
1814
1815/* If "arg" is a constant expression, return non-zero with the value
1816 in *valp. */
1817
1818static int
1819xg_arg_is_constant (arg, valp)
1820 char *arg;
1821 offsetT *valp;
1822{
1823 expressionS exp;
1824 char *save_ptr = input_line_pointer;
1825
1826 input_line_pointer = arg;
1827 expression (&exp);
1828 input_line_pointer = save_ptr;
1829
1830 if (exp.X_op == O_constant)
1831 {
1832 *valp = exp.X_add_number;
1833 return 1;
1834 }
1835
1836 return 0;
1837}
1838
1839
1840static void
1841xg_replace_opname (popname, newop)
1842 char **popname;
1843 char *newop;
1844{
1845 free (*popname);
1846 *popname = (char *) xmalloc (strlen (newop) + 1);
1847 strcpy (*popname, newop);
1848}
1849
1850
1851static int
1852xg_check_num_args (pnum_args, expected_num, opname, arg_strings)
1853 int *pnum_args;
1854 int expected_num;
1855 char *opname;
1856 char **arg_strings;
1857{
1858 int num_args = *pnum_args;
1859
1860 if (num_args < expected_num)
1861 {
1862 as_bad (_("not enough operands (%d) for '%s'; expected %d"),
1863 num_args, opname, expected_num);
1864 return -1;
1865 }
1866
1867 if (num_args > expected_num)
1868 {
1869 as_warn (_("too many operands (%d) for '%s'; expected %d"),
1870 num_args, opname, expected_num);
1871 while (num_args-- > expected_num)
1872 {
1873 free (arg_strings[num_args]);
1874 arg_strings[num_args] = 0;
1875 }
1876 *pnum_args = expected_num;
1877 return -1;
1878 }
1879
1880 return 0;
1881}
1882
1883
1884static int
1885xg_translate_sysreg_op (popname, pnum_args, arg_strings)
1886 char **popname;
1887 int *pnum_args;
1888 char **arg_strings;
1889{
1890 char *opname, *new_opname;
1891 offsetT val;
1892 bfd_boolean has_underbar = FALSE;
1893
1894 opname = *popname;
1895 if (*opname == '_')
1896 {
1897 has_underbar = TRUE;
1898 opname += 1;
1899 }
1900
1901 /* Opname == [rw]ur... */
1902
1903 if (opname[3] == '\0')
1904 {
1905 /* If the register is not specified as part of the opcode,
1906 then get it from the operand and move it to the opcode. */
1907
1908 if (xg_check_num_args (pnum_args, 2, opname, arg_strings))
1909 return -1;
1910
1911 if (!xg_arg_is_constant (arg_strings[1], &val))
1912 {
1913 as_bad (_("register number for `%s' is not a constant"), opname);
1914 return -1;
1915 }
1916 if ((unsigned) val > 255)
1917 {
1918 as_bad (_("register number (%ld) for `%s' is out of range"),
1919 val, opname);
1920 return -1;
1921 }
1922
1923 /* Remove the last argument, which is now part of the opcode. */
1924 free (arg_strings[1]);
1925 arg_strings[1] = 0;
1926 *pnum_args = 1;
1927
1928 /* Translate the opcode. */
1929 new_opname = (char *) xmalloc (8);
1930 sprintf (new_opname, "%s%cur%u", (has_underbar ? "_" : ""),
1931 opname[0], (unsigned) val);
1932 free (*popname);
1933 *popname = new_opname;
1934 }
1935
1936 return 0;
1937}
1938
1939
1940/* If the instruction is an idiom (i.e., a built-in macro), translate it.
1941 Returns non-zero if an error was found. */
1942
1943static int
1944xg_translate_idioms (popname, pnum_args, arg_strings)
1945 char **popname;
1946 int *pnum_args;
1947 char **arg_strings;
1948{
1949 char *opname = *popname;
1950 bfd_boolean has_underbar = FALSE;
1951
1952 if (*opname == '_')
1953 {
1954 has_underbar = TRUE;
1955 opname += 1;
1956 }
1957
1958 if (strcmp (opname, "mov") == 0)
1959 {
1960 if (!has_underbar && code_density_available ())
1961 xg_replace_opname (popname, "mov.n");
1962 else
1963 {
1964 if (xg_check_num_args (pnum_args, 2, opname, arg_strings))
1965 return -1;
1966 xg_replace_opname (popname, (has_underbar ? "_or" : "or"));
1967 arg_strings[2] = (char *) xmalloc (strlen (arg_strings[1]) + 1);
1968 strcpy (arg_strings[2], arg_strings[1]);
1969 *pnum_args = 3;
1970 }
1971 return 0;
1972 }
1973
1974 if (strcmp (opname, "bbsi.l") == 0)
1975 {
1976 if (xg_check_num_args (pnum_args, 3, opname, arg_strings))
1977 return -1;
1978 xg_replace_opname (popname, (has_underbar ? "_bbsi" : "bbsi"));
1979 if (target_big_endian)
1980 xg_reverse_shift_count (&arg_strings[1]);
1981 return 0;
1982 }
1983
1984 if (strcmp (opname, "bbci.l") == 0)
1985 {
1986 if (xg_check_num_args (pnum_args, 3, opname, arg_strings))
1987 return -1;
1988 xg_replace_opname (popname, (has_underbar ? "_bbci" : "bbci"));
1989 if (target_big_endian)
1990 xg_reverse_shift_count (&arg_strings[1]);
1991 return 0;
1992 }
1993
1994 if (strcmp (opname, "nop") == 0)
1995 {
1996 if (!has_underbar && code_density_available ())
1997 xg_replace_opname (popname, "nop.n");
1998 else
1999 {
2000 if (xg_check_num_args (pnum_args, 0, opname, arg_strings))
2001 return -1;
2002 xg_replace_opname (popname, (has_underbar ? "_or" : "or"));
2003 arg_strings[0] = (char *) xmalloc (3);
2004 arg_strings[1] = (char *) xmalloc (3);
2005 arg_strings[2] = (char *) xmalloc (3);
2006 strcpy (arg_strings[0], "a1");
2007 strcpy (arg_strings[1], "a1");
2008 strcpy (arg_strings[2], "a1");
2009 *pnum_args = 3;
2010 }
2011 return 0;
2012 }
2013
2014 if ((opname[0] == 'r' || opname[0] == 'w')
2015 && opname[1] == 'u'
2016 && opname[2] == 'r')
2017 return xg_translate_sysreg_op (popname, pnum_args, arg_strings);
2018
2019
2020 /* WIDENING DENSITY OPCODES
2021
2022 questionable relaxations (widening) from old "tai" idioms:
2023
2024 ADD.N --> ADD
2025 BEQZ.N --> BEQZ
2026 RET.N --> RET
2027 RETW.N --> RETW
2028 MOVI.N --> MOVI
2029 MOV.N --> MOV
2030 NOP.N --> NOP
2031
2032 Note: this incomplete list was imported to match the "tai"
2033 behavior; other density opcodes are not handled.
2034
2035 The xtensa-relax code may know how to do these but it doesn't do
2036 anything when these density opcodes appear inside a no-density
2037 region. Somehow GAS should either print an error when that happens
2038 or do the widening. The old "tai" behavior was to do the widening.
2039 For now, I'll make it widen but print a warning.
2040
2041 FIXME: GAS needs to detect density opcodes inside no-density
2042 regions and treat them as errors. This code should be removed
2043 when that is done. */
2044
2045 if (use_generics ()
2046 && !has_underbar
2047 && density_supported
2048 && !code_density_available ())
2049 {
2050 if (strcmp (opname, "add.n") == 0)
2051 xg_replace_opname (popname, "add");
2052
2053 else if (strcmp (opname, "beqz.n") == 0)
2054 xg_replace_opname (popname, "beqz");
2055
2056 else if (strcmp (opname, "ret.n") == 0)
2057 xg_replace_opname (popname, "ret");
2058
2059 else if (strcmp (opname, "retw.n") == 0)
2060 xg_replace_opname (popname, "retw");
2061
2062 else if (strcmp (opname, "movi.n") == 0)
2063 xg_replace_opname (popname, "movi");
2064
2065 else if (strcmp (opname, "mov.n") == 0)
2066 {
2067 if (xg_check_num_args (pnum_args, 2, opname, arg_strings))
2068 return -1;
2069 xg_replace_opname (popname, "or");
2070 arg_strings[2] = (char *) xmalloc (strlen (arg_strings[1]) + 1);
2071 strcpy (arg_strings[2], arg_strings[1]);
2072 *pnum_args = 3;
2073 }
2074
2075 else if (strcmp (opname, "nop.n") == 0)
2076 {
2077 if (xg_check_num_args (pnum_args, 0, opname, arg_strings))
2078 return -1;
2079 xg_replace_opname (popname, "or");
2080 arg_strings[0] = (char *) xmalloc (3);
2081 arg_strings[1] = (char *) xmalloc (3);
2082 arg_strings[2] = (char *) xmalloc (3);
2083 strcpy (arg_strings[0], "a1");
2084 strcpy (arg_strings[1], "a1");
2085 strcpy (arg_strings[2], "a1");
2086 *pnum_args = 3;
2087 }
2088 }
2089
2090 return 0;
2091}
2092
2093\f
2094/* Functions for dealing with the Xtensa ISA. */
2095
2096/* Return true if the given operand is an immed or target instruction,
2097 i.e., has a reloc associated with it. Currently, this is only true
2098 if the operand kind is "i, "l" or "L". */
2099
2100static bfd_boolean
2101operand_is_immed (opnd)
2102 xtensa_operand opnd;
2103{
2104 const char *opkind = xtensa_operand_kind (opnd);
2105 if (opkind[0] == '\0' || opkind[1] != '\0')
2106 return FALSE;
2107 switch (opkind[0])
2108 {
2109 case 'i':
2110 case 'l':
2111 case 'L':
2112 return TRUE;
2113 }
2114 return FALSE;
2115}
2116
2117
2118/* Return true if the given operand is a pc-relative label. This is
2119 true for "l", "L", and "r" operand kinds. */
2120
2121bfd_boolean
2122operand_is_pcrel_label (opnd)
2123 xtensa_operand opnd;
2124{
2125 const char *opkind = xtensa_operand_kind (opnd);
2126 if (opkind[0] == '\0' || opkind[1] != '\0')
2127 return FALSE;
2128 switch (opkind[0])
2129 {
2130 case 'r':
2131 case 'l':
2132 case 'L':
2133 return TRUE;
2134 }
2135 return FALSE;
2136}
2137
2138
2139/* Currently the assembler only allows us to use a single target per
2140 fragment. Because of this, only one operand for a given
2141 instruction may be symbolic. If there is an operand of kind "lrL",
2142 the last one is chosen. Otherwise, the result is the number of the
2143 last operand of type "i", and if there are none of those, we fail
2144 and return -1. */
2145
2146int
2147get_relaxable_immed (opcode)
2148 xtensa_opcode opcode;
2149{
2150 int last_immed = -1;
2151 int noperands, opi;
2152 xtensa_operand operand;
2153
2154 if (opcode == XTENSA_UNDEFINED)
2155 return -1;
2156
2157 noperands = xtensa_num_operands (xtensa_default_isa, opcode);
2158 for (opi = noperands - 1; opi >= 0; opi--)
2159 {
2160 operand = xtensa_get_operand (xtensa_default_isa, opcode, opi);
2161 if (operand_is_pcrel_label (operand))
2162 return opi;
2163 if (last_immed == -1 && operand_is_immed (operand))
2164 last_immed = opi;
2165 }
2166 return last_immed;
2167}
2168
2169
2170xtensa_opcode
2171get_opcode_from_buf (buf)
2172 const char *buf;
2173{
2174 static xtensa_insnbuf insnbuf = NULL;
2175 xtensa_opcode opcode;
2176 xtensa_isa isa = xtensa_default_isa;
2177 if (!insnbuf)
2178 insnbuf = xtensa_insnbuf_alloc (isa);
2179
2180 xtensa_insnbuf_from_chars (isa, insnbuf, buf);
2181 opcode = xtensa_decode_insn (isa, insnbuf);
2182 return opcode;
2183}
2184
2185
2186static bfd_boolean
2187is_direct_call_opcode (opcode)
2188 xtensa_opcode opcode;
2189{
2190 if (opcode == XTENSA_UNDEFINED)
2191 return FALSE;
2192
2193 return (opcode == xtensa_call0_opcode
2194 || opcode == xtensa_call4_opcode
2195 || opcode == xtensa_call8_opcode
2196 || opcode == xtensa_call12_opcode);
2197}
2198
2199
2200static bfd_boolean
2201is_call_opcode (opcode)
2202 xtensa_opcode opcode;
2203{
2204 if (is_direct_call_opcode (opcode))
2205 return TRUE;
2206
2207 if (opcode == XTENSA_UNDEFINED)
2208 return FALSE;
2209
2210 return (opcode == xtensa_callx0_opcode
2211 || opcode == xtensa_callx4_opcode
2212 || opcode == xtensa_callx8_opcode
2213 || opcode == xtensa_callx12_opcode);
2214}
2215
2216
2217/* Return true if the opcode is an entry opcode. This is used because
2218 "entry" adds an implicit ".align 4" and also the entry instruction
2219 has an extra check for an operand value. */
2220
2221static bfd_boolean
2222is_entry_opcode (opcode)
2223 xtensa_opcode opcode;
2224{
2225 if (opcode == XTENSA_UNDEFINED)
2226 return FALSE;
2227
2228 return (opcode == xtensa_entry_opcode);
2229}
2230
2231
2232/* Return true if it is one of the loop opcodes. Loops are special
2233 because they need automatic alignment and they have a relaxation so
2234 complex that we hard-coded it. */
2235
2236static bfd_boolean
2237is_loop_opcode (opcode)
2238 xtensa_opcode opcode;
2239{
2240 if (opcode == XTENSA_UNDEFINED)
2241 return FALSE;
2242
2243 return (opcode == xtensa_loop_opcode
2244 || opcode == xtensa_loopnez_opcode
2245 || opcode == xtensa_loopgtz_opcode);
2246}
2247
2248
2249static bfd_boolean
2250is_the_loop_opcode (opcode)
2251 xtensa_opcode opcode;
2252{
2253 if (opcode == XTENSA_UNDEFINED)
2254 return FALSE;
2255
2256 return (opcode == xtensa_loop_opcode);
2257}
2258
2259
2260static bfd_boolean
2261is_jx_opcode (opcode)
2262 xtensa_opcode opcode;
2263{
2264 if (opcode == XTENSA_UNDEFINED)
2265 return FALSE;
2266
2267 return (opcode == xtensa_jx_opcode);
2268}
2269
2270
2271/* Return true if the opcode is a retw or retw.n.
2272 Needed to add nops to avoid a hardware interlock issue. */
2273
2274static bfd_boolean
2275is_windowed_return_opcode (opcode)
2276 xtensa_opcode opcode;
2277{
2278 if (opcode == XTENSA_UNDEFINED)
2279 return FALSE;
2280
2281 return (opcode == xtensa_retw_opcode || opcode == xtensa_retw_n_opcode);
2282}
2283
2284
2285/* Return true if the opcode type is "l" and the opcode is NOT a jump. */
2286
2287static bfd_boolean
2288is_conditional_branch_opcode (opcode)
2289 xtensa_opcode opcode;
2290{
2291 xtensa_isa isa = xtensa_default_isa;
2292 int num_ops, i;
2293
2294 if (opcode == xtensa_j_opcode && opcode != XTENSA_UNDEFINED)
2295 return FALSE;
2296
2297 num_ops = xtensa_num_operands (isa, opcode);
2298 for (i = 0; i < num_ops; i++)
2299 {
2300 xtensa_operand operand = xtensa_get_operand (isa, opcode, i);
2301 if (strcmp (xtensa_operand_kind (operand), "l") == 0)
2302 return TRUE;
2303 }
2304 return FALSE;
2305}
2306
2307
2308/* Return true if the given opcode is a conditional branch
2309 instruction, i.e., currently this is true if the instruction
2310 is a jx or has an operand with 'l' type and is not a loop. */
2311
2312bfd_boolean
2313is_branch_or_jump_opcode (opcode)
2314 xtensa_opcode opcode;
2315{
2316 int opn, op_count;
2317
2318 if (opcode == XTENSA_UNDEFINED)
2319 return FALSE;
2320
2321 if (is_loop_opcode (opcode))
2322 return FALSE;
2323
2324 if (is_jx_opcode (opcode))
2325 return TRUE;
2326
2327 op_count = xtensa_num_operands (xtensa_default_isa, opcode);
2328 for (opn = 0; opn < op_count; opn++)
2329 {
2330 xtensa_operand opnd =
2331 xtensa_get_operand (xtensa_default_isa, opcode, opn);
2332 const char *opkind = xtensa_operand_kind (opnd);
2333 if (opkind && opkind[0] == 'l' && opkind[1] == '\0')
2334 return TRUE;
2335 }
2336 return FALSE;
2337}
2338
2339
2340/* Convert from operand numbers to BFD relocation type code.
2341 Return BFD_RELOC_NONE on failure. */
2342
2343bfd_reloc_code_real_type
2344opnum_to_reloc (opnum)
2345 int opnum;
2346{
2347 switch (opnum)
2348 {
2349 case 0:
2350 return BFD_RELOC_XTENSA_OP0;
2351 case 1:
2352 return BFD_RELOC_XTENSA_OP1;
2353 case 2:
2354 return BFD_RELOC_XTENSA_OP2;
2355 default:
2356 break;
2357 }
2358 return BFD_RELOC_NONE;
2359}
2360
2361
2362/* Convert from BFD relocation type code to operand number.
2363 Return -1 on failure. */
2364
2365int
2366reloc_to_opnum (reloc)
2367 bfd_reloc_code_real_type reloc;
2368{
2369 switch (reloc)
2370 {
2371 case BFD_RELOC_XTENSA_OP0:
2372 return 0;
2373 case BFD_RELOC_XTENSA_OP1:
2374 return 1;
2375 case BFD_RELOC_XTENSA_OP2:
2376 return 2;
2377 default:
2378 break;
2379 }
2380 return -1;
2381}
2382
2383
2384static void
2385xtensa_insnbuf_set_operand (insnbuf, opcode, operand, value, file, line)
2386 xtensa_insnbuf insnbuf;
2387 xtensa_opcode opcode;
2388 xtensa_operand operand;
2389 int32 value;
2390 const char *file;
2391 unsigned int line;
2392{
2393 xtensa_encode_result encode_result;
2394 uint32 valbuf = value;
2395
2396 encode_result = xtensa_operand_encode (operand, &valbuf);
2397
2398 switch (encode_result)
2399 {
2400 case xtensa_encode_result_ok:
2401 break;
2402 case xtensa_encode_result_align:
2403 as_bad_where ((char *) file, line,
2404 _("operand %d not properly aligned for '%s'"),
2405 value, xtensa_opcode_name (xtensa_default_isa, opcode));
2406 break;
2407 case xtensa_encode_result_not_in_table:
2408 as_bad_where ((char *) file, line,
2409 _("operand %d not in immediate table for '%s'"),
2410 value, xtensa_opcode_name (xtensa_default_isa, opcode));
2411 break;
2412 case xtensa_encode_result_too_high:
2413 as_bad_where ((char *) file, line,
2414 _("operand %d too large for '%s'"), value,
2415 xtensa_opcode_name (xtensa_default_isa, opcode));
2416 break;
2417 case xtensa_encode_result_too_low:
2418 as_bad_where ((char *) file, line,
2419 _("operand %d too small for '%s'"), value,
2420 xtensa_opcode_name (xtensa_default_isa, opcode));
2421 break;
2422 case xtensa_encode_result_not_ok:
2423 as_bad_where ((char *) file, line,
2424 _("operand %d is invalid for '%s'"), value,
2425 xtensa_opcode_name (xtensa_default_isa, opcode));
2426 break;
2427 default:
2428 abort ();
2429 }
2430
2431 xtensa_operand_set_field (operand, insnbuf, valbuf);
2432}
2433
2434
2435static uint32
2436xtensa_insnbuf_get_operand (insnbuf, opcode, opnum)
2437 xtensa_insnbuf insnbuf;
2438 xtensa_opcode opcode;
2439 int opnum;
2440{
2441 xtensa_operand op = xtensa_get_operand (xtensa_default_isa, opcode, opnum);
2442 return xtensa_operand_decode (op, xtensa_operand_get_field (op, insnbuf));
2443}
2444
2445
2446static void
2447xtensa_insnbuf_set_immediate_field (opcode, insnbuf, value, file, line)
2448 xtensa_opcode opcode;
2449 xtensa_insnbuf insnbuf;
2450 int32 value;
2451 const char *file;
2452 unsigned int line;
2453{
2454 xtensa_isa isa = xtensa_default_isa;
2455 int last_opnd = xtensa_num_operands (isa, opcode) - 1;
2456 xtensa_operand operand = xtensa_get_operand (isa, opcode, last_opnd);
2457 xtensa_insnbuf_set_operand (insnbuf, opcode, operand, value, file, line);
2458}
2459
2460
2461static bfd_boolean
2462is_negatable_branch (insn)
2463 TInsn *insn;
2464{
2465 xtensa_isa isa = xtensa_default_isa;
2466 int i;
2467 int num_ops = xtensa_num_operands (isa, insn->opcode);
2468
2469 for (i = 0; i < num_ops; i++)
2470 {
2471 xtensa_operand opnd = xtensa_get_operand (isa, insn->opcode, i);
2472 char *kind = xtensa_operand_kind (opnd);
2473 if (strlen (kind) == 1 && *kind == 'l')
2474 return TRUE;
2475 }
2476 return FALSE;
2477}
2478
2479\f
2480/* Lists for recording various properties of symbols. */
2481
2482typedef struct symbol_consS_struct
2483{
2484 symbolS *first;
2485 /* These are used for the target taken. */
2486 int is_loop_target:1;
2487 int is_branch_target:1;
2488 int is_literal:1;
2489 int is_moved:1;
2490 struct symbol_consS_struct *rest;
2491} symbol_consS;
2492
2493symbol_consS *defined_symbols = 0;
2494symbol_consS *branch_targets = 0;
2495
2496
2497static void
2498xtensa_define_label (sym)
2499 symbolS *sym;
2500{
2501 symbol_consS *cons = (symbol_consS *) xmalloc (sizeof (symbol_consS));
2502
2503 cons->first = sym;
2504 cons->is_branch_target = 0;
2505 cons->is_loop_target = 0;
2506 cons->is_literal = generating_literals ? 1 : 0;
2507 cons->is_moved = 0;
2508 cons->rest = defined_symbols;
2509 defined_symbols = cons;
2510}
2511
2512
2513void
2514add_target_symbol (sym, is_loop)
2515 symbolS *sym;
2516 bfd_boolean is_loop;
2517{
2518 symbol_consS *cons, *sym_e;
2519
2520 for (sym_e = branch_targets; sym_e; sym_e = sym_e->rest)
2521 {
2522 if (sym_e->first == sym)
2523 {
2524 if (is_loop)
2525 sym_e->is_loop_target = 1;
2526 else
2527 sym_e->is_branch_target = 1;
2528 return;
2529 }
2530 }
2531
2532 cons = (symbol_consS *) xmalloc (sizeof (symbol_consS));
2533 cons->first = sym;
2534 cons->is_branch_target = (is_loop ? 0 : 1);
2535 cons->is_loop_target = (is_loop ? 1 : 0);
2536 cons->rest = branch_targets;
2537 branch_targets = cons;
2538}
2539
2540
2541/* Find the symbol at a given position. (Note: the "loops_ok"
2542 argument is provided to allow ignoring labels that define loop
2543 ends. This fixes a bug where the NOPs to align a loop opcode were
2544 included in a previous zero-cost loop:
2545
2546 loop a0, loopend
2547 <loop1 body>
2548 loopend:
2549
2550 loop a2, loopend2
2551 <loop2 body>
2552
2553 would become:
2554
2555 loop a0, loopend
2556 <loop1 body>
2557 nop.n <===== bad!
2558 loopend:
2559
2560 loop a2, loopend2
2561 <loop2 body>
2562
2563 This argument is used to prevent moving the NOP to before the
2564 loop-end label, which is what you want in this special case.) */
2565
2566static symbolS *
2567xtensa_find_label (fragP, offset, loops_ok)
2568 fragS *fragP;
2569 offsetT offset;
2570 bfd_boolean loops_ok;
2571{
2572 symbol_consS *consP;
2573
2574 for (consP = defined_symbols; consP; consP = consP->rest)
2575 {
2576 symbolS *symP = consP->first;
2577
2578 if (S_GET_SEGMENT (symP) == now_seg
2579 && symbol_get_frag (symP) == fragP
2580 && symbol_constant_p (symP)
2581 && S_GET_VALUE (symP) == fragP->fr_address + (unsigned) offset
2582 && (loops_ok || !is_loop_target_label (symP)))
2583 return symP;
2584 }
2585 return NULL;
2586}
2587
2588
2589static void
2590map_over_defined_symbols (fn)
2591 void (*fn) PARAMS ((symbolS *));
2592{
2593 symbol_consS *sym_cons;
2594
2595 for (sym_cons = defined_symbols; sym_cons; sym_cons = sym_cons->rest)
2596 fn (sym_cons->first);
2597}
2598
2599
2600static bfd_boolean
2601is_loop_target_label (sym)
2602 symbolS *sym;
2603{
2604 symbol_consS *sym_e;
2605
2606 for (sym_e = branch_targets; sym_e; sym_e = sym_e->rest)
2607 {
2608 if (sym_e->first == sym)
2609 return sym_e->is_loop_target;
2610 }
2611 return FALSE;
2612}
2613
2614
2615/* Walk over all of the symbols that are branch target labels and
2616 loop target labels. Mark the associated fragments for these with
2617 the appropriate flags. */
2618
2619static void
2620xtensa_mark_target_fragments ()
2621{
2622 symbol_consS *sym_e;
2623
2624 for (sym_e = branch_targets; sym_e; sym_e = sym_e->rest)
2625 {
2626 symbolS *sym = sym_e->first;
2627
2628 if (symbol_get_frag (sym)
2629 && symbol_constant_p (sym)
2630 && S_GET_VALUE (sym) == 0)
2631 {
2632 if (sym_e->is_branch_target)
2633 symbol_get_frag (sym)->tc_frag_data.is_branch_target = TRUE;
2634 if (sym_e->is_loop_target)
2635 symbol_get_frag (sym)->tc_frag_data.is_loop_target = TRUE;
2636 }
2637 }
2638}
2639
2640\f
2641/* Various Other Internal Functions. */
2642
2643static bfd_boolean
2644is_unique_insn_expansion (r)
2645 TransitionRule *r;
2646{
2647 if (!r->to_instr || r->to_instr->next != NULL)
2648 return FALSE;
2649 if (r->to_instr->typ != INSTR_INSTR)
2650 return FALSE;
2651 return TRUE;
2652}
2653
2654
2655static int
2656xg_get_insn_size (insn)
2657 TInsn *insn;
2658{
2659 assert (insn->insn_type == ITYPE_INSN);
2660 return xtensa_insn_length (xtensa_default_isa, insn->opcode);
2661}
2662
2663
2664static int
2665xg_get_build_instr_size (insn)
2666 BuildInstr *insn;
2667{
2668 assert (insn->typ == INSTR_INSTR);
2669 return xtensa_insn_length (xtensa_default_isa, insn->opcode);
2670}
2671
2672
2673bfd_boolean
2674xg_is_narrow_insn (insn)
2675 TInsn *insn;
2676{
2677 TransitionTable *table = xg_build_widen_table ();
2678 TransitionList *l;
2679 int num_match = 0;
2680 assert (insn->insn_type == ITYPE_INSN);
2681 assert (insn->opcode < table->num_opcodes);
2682
2683 for (l = table->table[insn->opcode]; l != NULL; l = l->next)
2684 {
2685 TransitionRule *rule = l->rule;
2686
2687 if (xg_instruction_matches_rule (insn, rule)
2688 && is_unique_insn_expansion (rule))
2689 {
2690 /* It only generates one instruction... */
2691 assert (insn->insn_type == ITYPE_INSN);
2692 /* ...and it is a larger instruction. */
2693 if (xg_get_insn_size (insn)
2694 < xg_get_build_instr_size (rule->to_instr))
2695 {
2696 num_match++;
2697 if (num_match > 1)
2698 return FALSE;
2699 }
2700 }
2701 }
2702 return (num_match == 1);
2703}
2704
2705
2706bfd_boolean
2707xg_is_single_relaxable_insn (insn)
2708 TInsn *insn;
2709{
2710 TransitionTable *table = xg_build_widen_table ();
2711 TransitionList *l;
2712 int num_match = 0;
2713 assert (insn->insn_type == ITYPE_INSN);
2714 assert (insn->opcode < table->num_opcodes);
2715
2716 for (l = table->table[insn->opcode]; l != NULL; l = l->next)
2717 {
2718 TransitionRule *rule = l->rule;
2719
2720 if (xg_instruction_matches_rule (insn, rule)
2721 && is_unique_insn_expansion (rule))
2722 {
2723 assert (insn->insn_type == ITYPE_INSN);
2724 /* ... and it is a larger instruction. */
2725 if (xg_get_insn_size (insn)
2726 <= xg_get_build_instr_size (rule->to_instr))
2727 {
2728 num_match++;
2729 if (num_match > 1)
2730 return FALSE;
2731 }
2732 }
2733 }
2734 return (num_match == 1);
2735}
2736
2737
2738/* Return the largest size instruction that this instruction can
2739 expand to. Currently, in all cases, this is 3 bytes. Of course we
2740 could just calculate this once and generate a table. */
2741
2742int
2743xg_get_max_narrow_insn_size (opcode)
2744 xtensa_opcode opcode;
2745{
2746 /* Go ahead and compute it, but it better be 3. */
2747 TransitionTable *table = xg_build_widen_table ();
2748 TransitionList *l;
2749 int old_size = xtensa_insn_length (xtensa_default_isa, opcode);
2750 assert (opcode < table->num_opcodes);
2751
2752 /* Actually we can do better. Check to see of Only one applies. */
2753 for (l = table->table[opcode]; l != NULL; l = l->next)
2754 {
2755 TransitionRule *rule = l->rule;
2756
2757 /* If it only generates one instruction. */
2758 if (is_unique_insn_expansion (rule))
2759 {
2760 int new_size = xtensa_insn_length (xtensa_default_isa,
2761 rule->to_instr->opcode);
2762 if (new_size > old_size)
2763 {
2764 assert (new_size == 3);
2765 return 3;
2766 }
2767 }
2768 }
2769 return old_size;
2770}
2771
2772
2773/* Return the maximum number of bytes this opcode can expand to. */
2774
2775int
2776xg_get_max_insn_widen_size (opcode)
2777 xtensa_opcode opcode;
2778{
2779 TransitionTable *table = xg_build_widen_table ();
2780 TransitionList *l;
2781 int max_size = xtensa_insn_length (xtensa_default_isa, opcode);
2782
2783 assert (opcode < table->num_opcodes);
2784
2785 for (l = table->table[opcode]; l != NULL; l = l->next)
2786 {
2787 TransitionRule *rule = l->rule;
2788 BuildInstr *build_list;
2789 int this_size = 0;
2790
2791 if (!rule)
2792 continue;
2793 build_list = rule->to_instr;
2794 if (is_unique_insn_expansion (rule))
2795 {
2796 assert (build_list->typ == INSTR_INSTR);
2797 this_size = xg_get_max_insn_widen_size (build_list->opcode);
2798 }
2799 else
2800 for (; build_list != NULL; build_list = build_list->next)
2801 {
2802 switch (build_list->typ)
2803 {
2804 case INSTR_INSTR:
2805 this_size += xtensa_insn_length (xtensa_default_isa,
2806 build_list->opcode);
2807
2808 break;
2809 case INSTR_LITERAL_DEF:
2810 case INSTR_LABEL_DEF:
2811 default:
2812 break;
2813 }
2814 }
2815 if (this_size > max_size)
2816 max_size = this_size;
2817 }
2818 return max_size;
2819}
2820
2821
2822/* Return the maximum number of literal bytes this opcode can generate. */
2823
2824int
2825xg_get_max_insn_widen_literal_size (opcode)
2826 xtensa_opcode opcode;
2827{
2828 TransitionTable *table = xg_build_widen_table ();
2829 TransitionList *l;
2830 int max_size = 0;
2831
2832 assert (opcode < table->num_opcodes);
2833
2834 for (l = table->table[opcode]; l != NULL; l = l->next)
2835 {
2836 TransitionRule *rule = l->rule;
2837 BuildInstr *build_list;
2838 int this_size = 0;
2839
2840 if (!rule)
2841 continue;
2842 build_list = rule->to_instr;
2843 if (is_unique_insn_expansion (rule))
2844 {
2845 assert (build_list->typ == INSTR_INSTR);
2846 this_size = xg_get_max_insn_widen_literal_size (build_list->opcode);
2847 }
2848 else
2849 for (; build_list != NULL; build_list = build_list->next)
2850 {
2851 switch (build_list->typ)
2852 {
2853 case INSTR_LITERAL_DEF:
2854 /* hard coded 4-byte literal. */
2855 this_size += 4;
2856 break;
2857 case INSTR_INSTR:
2858 case INSTR_LABEL_DEF:
2859 default:
2860 break;
2861 }
2862 }
2863 if (this_size > max_size)
2864 max_size = this_size;
2865 }
2866 return max_size;
2867}
2868
2869
2870bfd_boolean
2871xg_is_relaxable_insn (insn, lateral_steps)
2872 TInsn *insn;
2873 int lateral_steps;
2874{
2875 int steps_taken = 0;
2876 TransitionTable *table = xg_build_widen_table ();
2877 TransitionList *l;
2878
2879 assert (insn->insn_type == ITYPE_INSN);
2880 assert (insn->opcode < table->num_opcodes);
2881
2882 for (l = table->table[insn->opcode]; l != NULL; l = l->next)
2883 {
2884 TransitionRule *rule = l->rule;
2885
2886 if (xg_instruction_matches_rule (insn, rule))
2887 {
2888 if (steps_taken == lateral_steps)
2889 return TRUE;
2890 steps_taken++;
2891 }
2892 }
2893 return FALSE;
2894}
2895
2896
2897static symbolS *
2898get_special_literal_symbol ()
2899{
2900 static symbolS *sym = NULL;
2901
2902 if (sym == NULL)
2903 sym = symbol_find_or_make ("SPECIAL_LITERAL0\001");
2904 return sym;
2905}
2906
2907
2908static symbolS *
2909get_special_label_symbol ()
2910{
2911 static symbolS *sym = NULL;
2912
2913 if (sym == NULL)
2914 sym = symbol_find_or_make ("SPECIAL_LABEL0\001");
2915 return sym;
2916}
2917
2918
2919/* Return true on success. */
2920
2921bfd_boolean
2922xg_build_to_insn (targ, insn, bi)
2923 TInsn *targ;
2924 TInsn *insn;
2925 BuildInstr *bi;
2926{
2927 BuildOp *op;
2928 symbolS *sym;
2929
2930 memset (targ, 0, sizeof (TInsn));
2931 switch (bi->typ)
2932 {
2933 case INSTR_INSTR:
2934 op = bi->ops;
2935 targ->opcode = bi->opcode;
2936 targ->insn_type = ITYPE_INSN;
2937 targ->is_specific_opcode = FALSE;
2938
2939 for (; op != NULL; op = op->next)
2940 {
2941 int op_num = op->op_num;
2942 int op_data = op->op_data;
2943
2944 assert (op->op_num < MAX_INSN_ARGS);
2945
2946 if (targ->ntok <= op_num)
2947 targ->ntok = op_num + 1;
2948
2949 switch (op->typ)
2950 {
2951 case OP_CONSTANT:
2952 set_expr_const (&targ->tok[op_num], op_data);
2953 break;
2954 case OP_OPERAND:
2955 assert (op_data < insn->ntok);
2956 copy_expr (&targ->tok[op_num], &insn->tok[op_data]);
2957 break;
2958 case OP_LITERAL:
2959 sym = get_special_literal_symbol ();
2960 set_expr_symbol_offset (&targ->tok[op_num], sym, 0);
2961 break;
2962 case OP_LABEL:
2963 sym = get_special_label_symbol ();
2964 set_expr_symbol_offset (&targ->tok[op_num], sym, 0);
2965 break;
2966 default:
2967 /* currently handles:
2968 OP_OPERAND_LOW8
2969 OP_OPERAND_HI24S
2970 OP_OPERAND_F32MINUS */
2971 if (xg_has_userdef_op_fn (op->typ))
2972 {
2973 assert (op_data < insn->ntok);
2974 if (expr_is_const (&insn->tok[op_data]))
2975 {
2976 long val;
2977 copy_expr (&targ->tok[op_num], &insn->tok[op_data]);
2978 val = xg_apply_userdef_op_fn (op->typ,
2979 targ->tok[op_num].
2980 X_add_number);
2981 targ->tok[op_num].X_add_number = val;
2982 }
2983 else
2984 return FALSE; /* We cannot use a relocation for this. */
2985 break;
2986 }
2987 assert (0);
2988 break;
2989 }
2990 }
2991 break;
2992
2993 case INSTR_LITERAL_DEF:
2994 op = bi->ops;
2995 targ->opcode = XTENSA_UNDEFINED;
2996 targ->insn_type = ITYPE_LITERAL;
2997 targ->is_specific_opcode = FALSE;
2998 for (; op != NULL; op = op->next)
2999 {
3000 int op_num = op->op_num;
3001 int op_data = op->op_data;
3002 assert (op->op_num < MAX_INSN_ARGS);
3003
3004 if (targ->ntok <= op_num)
3005 targ->ntok = op_num + 1;
3006
3007 switch (op->typ)
3008 {
3009 case OP_OPERAND:
3010 assert (op_data < insn->ntok);
3011 copy_expr (&targ->tok[op_num], &insn->tok[op_data]);
3012 break;
3013 case OP_LITERAL:
3014 case OP_CONSTANT:
3015 case OP_LABEL:
3016 default:
3017 assert (0);
3018 break;
3019 }
3020 }
3021 break;
3022
3023 case INSTR_LABEL_DEF:
3024 op = bi->ops;
3025 targ->opcode = XTENSA_UNDEFINED;
3026 targ->insn_type = ITYPE_LABEL;
3027 targ->is_specific_opcode = FALSE;
3028 /* Literal with no ops. is a label? */
3029 assert (op == NULL);
3030 break;
3031
3032 default:
3033 assert (0);
3034 }
3035
3036 return TRUE;
3037}
3038
3039
3040/* Return true on success. */
3041
3042bfd_boolean
3043xg_build_to_stack (istack, insn, bi)
3044 IStack *istack;
3045 TInsn *insn;
3046 BuildInstr *bi;
3047{
3048 for (; bi != NULL; bi = bi->next)
3049 {
3050 TInsn *next_insn = istack_push_space (istack);
3051
3052 if (!xg_build_to_insn (next_insn, insn, bi))
3053 return FALSE;
3054 }
3055 return TRUE;
3056}
3057
3058
3059/* Return true on valid expansion. */
3060
3061bfd_boolean
3062xg_expand_to_stack (istack, insn, lateral_steps)
3063 IStack *istack;
3064 TInsn *insn;
3065 int lateral_steps;
3066{
3067 int stack_size = istack->ninsn;
3068 int steps_taken = 0;
3069 TransitionTable *table = xg_build_widen_table ();
3070 TransitionList *l;
3071
3072 assert (insn->insn_type == ITYPE_INSN);
3073 assert (insn->opcode < table->num_opcodes);
3074
3075 for (l = table->table[insn->opcode]; l != NULL; l = l->next)
3076 {
3077 TransitionRule *rule = l->rule;
3078
3079 if (xg_instruction_matches_rule (insn, rule))
3080 {
3081 if (lateral_steps == steps_taken)
3082 {
3083 int i;
3084
3085 /* This is it. Expand the rule to the stack. */
3086 if (!xg_build_to_stack (istack, insn, rule->to_instr))
3087 return FALSE;
3088
3089 /* Check to see if it fits. */
3090 for (i = stack_size; i < istack->ninsn; i++)
3091 {
3092 TInsn *insn = &istack->insn[i];
3093
3094 if (insn->insn_type == ITYPE_INSN
3095 && !tinsn_has_symbolic_operands (insn)
3096 && !xg_immeds_fit (insn))
3097 {
3098 istack->ninsn = stack_size;
3099 return FALSE;
3100 }
3101 }
3102 return TRUE;
3103 }
3104 steps_taken++;
3105 }
3106 }
3107 return FALSE;
3108}
3109
3110
3111bfd_boolean
3112xg_expand_narrow (targ, insn)
3113 TInsn *targ;
3114 TInsn *insn;
3115{
3116 TransitionTable *table = xg_build_widen_table ();
3117 TransitionList *l;
3118
3119 assert (insn->insn_type == ITYPE_INSN);
3120 assert (insn->opcode < table->num_opcodes);
3121
3122 for (l = table->table[insn->opcode]; l != NULL; l = l->next)
3123 {
3124 TransitionRule *rule = l->rule;
3125 if (xg_instruction_matches_rule (insn, rule)
3126 && is_unique_insn_expansion (rule))
3127 {
3128 /* Is it a larger instruction? */
3129 if (xg_get_insn_size (insn)
3130 <= xg_get_build_instr_size (rule->to_instr))
3131 {
3132 xg_build_to_insn (targ, insn, rule->to_instr);
3133 return FALSE;
3134 }
3135 }
3136 }
3137 return TRUE;
3138}
3139
3140
3141/* Assumes: All immeds are constants. Check that all constants fit
3142 into their immeds; return false if not. */
3143
3144static bfd_boolean
3145xg_immeds_fit (insn)
3146 const TInsn *insn;
3147{
3148 int i;
3149
3150 int n = insn->ntok;
3151 assert (insn->insn_type == ITYPE_INSN);
3152 for (i = 0; i < n; ++i)
3153 {
3154 const expressionS *expr = &insn->tok[i];
3155 xtensa_operand opnd = xtensa_get_operand (xtensa_default_isa,
3156 insn->opcode, i);
3157 if (!operand_is_immed (opnd))
3158 continue;
3159
3160 switch (expr->X_op)
3161 {
3162 case O_register:
3163 case O_constant:
3164 {
3165 if (xg_check_operand (expr->X_add_number, opnd))
3166 return FALSE;
3167 }
3168 break;
3169 default:
3170 /* The symbol should have a fixup associated with it. */
3171 assert (FALSE);
3172 break;
3173 }
3174 }
3175 return TRUE;
3176}
3177
3178
3179/* This should only be called after we have an initial
3180 estimate of the addresses. */
3181
3182static bfd_boolean
3183xg_symbolic_immeds_fit (insn, pc_seg, pc_frag, pc_offset, stretch)
3184 const TInsn *insn;
3185 segT pc_seg;
3186 fragS *pc_frag;
3187 offsetT pc_offset;
3188 long stretch;
3189{
3190 symbolS *symbolP;
3191 offsetT target, pc, new_offset;
3192 int i;
3193 int n = insn->ntok;
3194
3195 assert (insn->insn_type == ITYPE_INSN);
3196
3197 for (i = 0; i < n; ++i)
3198 {
3199 const expressionS *expr = &insn->tok[i];
3200 xtensa_operand opnd = xtensa_get_operand (xtensa_default_isa,
3201 insn->opcode, i);
3202 if (!operand_is_immed (opnd))
3203 continue;
3204
3205 switch (expr->X_op)
3206 {
3207 case O_register:
3208 case O_constant:
3209 if (xg_check_operand (expr->X_add_number, opnd))
3210 return FALSE;
3211 break;
3212
3213 case O_symbol:
3214 /* We only allow symbols for pc-relative stuff.
3215 If pc_frag == 0, then we don't have frag locations yet. */
3216 if (pc_frag == 0)
3217 return FALSE;
3218
3219 /* If it is PC-relative and the symbol is in the same segment as
3220 the PC.... */
3221 if (!xtensa_operand_isPCRelative (opnd)
3222 || S_GET_SEGMENT (expr->X_add_symbol) != pc_seg)
3223 return FALSE;
3224
3225 symbolP = expr->X_add_symbol;
3226 target = S_GET_VALUE (symbolP) + expr->X_add_number;
3227 pc = pc_frag->fr_address + pc_offset;
3228
3229 /* If frag has yet to be reached on this pass, assume it
3230 will move by STRETCH just as we did. If this is not so,
3231 it will be because some frag between grows, and that will
3232 force another pass. Beware zero-length frags. There
3233 should be a faster way to do this. */
3234
3235 if (stretch && is_dnrange (pc_frag, symbolP, stretch))
3236 target += stretch;
3237
3238 new_offset = xtensa_operand_do_reloc (opnd, target, pc);
3239 if (xg_check_operand (new_offset, opnd))
3240 return FALSE;
3241 break;
3242
3243 default:
3244 /* The symbol should have a fixup associated with it. */
3245 return FALSE;
3246 }
3247 }
3248
3249 return TRUE;
3250}
3251
3252
3253/* This will check to see if the value can be converted into the
3254 operand type. It will return true if it does not fit. */
3255
3256static bfd_boolean
3257xg_check_operand (value, operand)
3258 int32 value;
3259 xtensa_operand operand;
3260{
3261 uint32 valbuf = value;
3262 return (xtensa_operand_encode (operand, &valbuf) != xtensa_encode_result_ok);
3263}
3264
3265
3266/* Check if a symbol is pointing to somewhere after
3267 the start frag, given that the segment has stretched
3268 by stretch during relaxation.
3269
3270 This is more complicated than it might appear at first blush
3271 because of the stretching that goes on. Here is how the check
3272 works:
3273
3274 If the symbol and the frag are in the same segment, then
3275 the symbol could be down range. Note that this function
3276 assumes that start_frag is in now_seg.
3277
3278 If the symbol is pointing to a frag with an address greater than
3279 than the start_frag's address, then it _could_ be down range.
3280
3281 The problem comes because target_frag may or may not have had
3282 stretch bytes added to its address already, depending on if it is
3283 before or after start frag. (And if we knew that, then we wouldn't
3284 need this function.) start_frag has definitely already had stretch
3285 bytes added to its address.
3286
3287 If target_frag's address hasn't been adjusted yet, then to
3288 determine if it comes after start_frag, we need to subtract
3289 stretch from start_frag's address.
3290
3291 If target_frag's address has been adjusted, then it might have
3292 been adjusted such that it comes after start_frag's address minus
3293 stretch bytes.
3294
3295 So, in that case, we scan for it down stream to within
3296 stretch bytes. We could search to the end of the fr_chain, but
3297 that ends up taking too much time (over a minute on some gnu
3298 tests). */
3299
3300int
3301is_dnrange (start_frag, sym, stretch)
3302 fragS *start_frag;
3303 symbolS *sym;
3304 long stretch;
3305{
3306 if (S_GET_SEGMENT (sym) == now_seg)
3307 {
3308 fragS *cur_frag = symbol_get_frag (sym);
3309
3310 if (cur_frag->fr_address >= start_frag->fr_address - stretch)
3311 {
3312 int distance = stretch;
3313
3314 while (cur_frag && distance >= 0)
3315 {
3316 distance -= cur_frag->fr_fix;
3317 if (cur_frag == start_frag)
3318 return 0;
3319 cur_frag = cur_frag->fr_next;
3320 }
3321 return 1;
3322 }
3323 }
3324 return 0;
3325}
3326
3327\f
3328/* Relax the assembly instruction at least "min_steps".
3329 Return the number of steps taken. */
3330
3331int
3332xg_assembly_relax (istack, insn, pc_seg, pc_frag, pc_offset, min_steps,
3333 stretch)
3334 IStack *istack;
3335 TInsn *insn;
3336 segT pc_seg;
3337 fragS *pc_frag; /* If pc_frag == 0, then no pc-relative. */
3338 offsetT pc_offset; /* Offset in fragment. */
3339 int min_steps; /* Minimum number of conversion steps. */
3340 long stretch; /* Number of bytes stretched so far. */
3341{
3342 int steps_taken = 0;
3343
3344 /* assert (has no symbolic operands)
3345 Some of its immeds don't fit.
3346 Try to build a relaxed version.
3347 This may go through a couple of stages
3348 of single instruction transformations before
3349 we get there. */
3350
3351 TInsn single_target;
3352 TInsn current_insn;
3353 int lateral_steps = 0;
3354 int istack_size = istack->ninsn;
3355
3356 if (xg_symbolic_immeds_fit (insn, pc_seg, pc_frag, pc_offset, stretch)
3357 && steps_taken >= min_steps)
3358 {
3359 istack_push (istack, insn);
3360 return steps_taken;
3361 }
3362 tinsn_copy (&current_insn, insn);
3363
3364 /* Walk through all of the single instruction expansions. */
3365 while (xg_is_single_relaxable_insn (&current_insn))
3366 {
3367 int error_val = xg_expand_narrow (&single_target, &current_insn);
3368
3369 assert (!error_val);
3370
3371 if (xg_symbolic_immeds_fit (&single_target, pc_seg, pc_frag, pc_offset,
3372 stretch))
3373 {
3374 steps_taken++;
3375 if (steps_taken >= min_steps)
3376 {
3377 istack_push (istack, &single_target);
3378 return steps_taken;
3379 }
3380 }
3381 tinsn_copy (&current_insn, &single_target);
3382 }
3383
3384 /* Now check for a multi-instruction expansion. */
3385 while (xg_is_relaxable_insn (&current_insn, lateral_steps))
3386 {
3387 if (xg_symbolic_immeds_fit (&current_insn, pc_seg, pc_frag, pc_offset,
3388 stretch))
3389 {
3390 if (steps_taken >= min_steps)
3391 {
3392 istack_push (istack, &current_insn);
3393 return steps_taken;
3394 }
3395 }
3396 steps_taken++;
3397 if (xg_expand_to_stack (istack, &current_insn, lateral_steps))
3398 {
3399 if (steps_taken >= min_steps)
3400 return steps_taken;
3401 }
3402 lateral_steps++;
3403 istack->ninsn = istack_size;
3404 }
3405
3406 /* It's not going to work -- use the original. */
3407 istack_push (istack, insn);
3408 return steps_taken;
3409}
3410
3411
3412static void
3413xg_force_frag_space (size)
3414 int size;
3415{
3416 /* This may have the side effect of creating a new fragment for the
3417 space to go into. I just do not like the name of the "frag"
3418 functions. */
3419 frag_grow (size);
3420}
3421
3422
3423void
3424xg_finish_frag (last_insn, state, max_growth, is_insn)
3425 char *last_insn;
3426 enum xtensa_relax_statesE state;
3427 int max_growth;
3428 bfd_boolean is_insn;
3429{
3430 /* Finish off this fragment so that it has at LEAST the desired
3431 max_growth. If it doesn't fit in this fragment, close this one
3432 and start a new one. In either case, return a pointer to the
3433 beginning of the growth area. */
3434
3435 fragS *old_frag;
3436 xg_force_frag_space (max_growth);
3437
3438 old_frag = frag_now;
3439
3440 frag_now->fr_opcode = last_insn;
3441 if (is_insn)
3442 frag_now->tc_frag_data.is_insn = TRUE;
3443
3444 frag_var (rs_machine_dependent, max_growth, max_growth,
3445 state, frag_now->fr_symbol, frag_now->fr_offset, last_insn);
3446
3447 /* Just to make sure that we did not split it up. */
3448 assert (old_frag->fr_next == frag_now);
3449}
3450
3451
3452static bfd_boolean
3453is_branch_jmp_to_next (insn, fragP)
3454 TInsn *insn;
3455 fragS *fragP;
3456{
3457 xtensa_isa isa = xtensa_default_isa;
3458 int i;
3459 int num_ops = xtensa_num_operands (isa, insn->opcode);
3460 int target_op = -1;
3461 symbolS *sym;
3462 fragS *target_frag;
3463
3464 if (is_loop_opcode (insn->opcode))
3465 return FALSE;
3466
3467 for (i = 0; i < num_ops; i++)
3468 {
3469 xtensa_operand opnd = xtensa_get_operand (isa, insn->opcode, i);
3470 char *kind = xtensa_operand_kind (opnd);
3471 if (strlen (kind) == 1 && *kind == 'l')
3472 {
3473 target_op = i;
3474 break;
3475 }
3476 }
3477 if (target_op == -1)
3478 return FALSE;
3479
3480 if (insn->ntok <= target_op)
3481 return FALSE;
3482
3483 if (insn->tok[target_op].X_op != O_symbol)
3484 return FALSE;
3485
3486 sym = insn->tok[target_op].X_add_symbol;
3487 if (sym == NULL)
3488 return FALSE;
3489
3490 if (insn->tok[target_op].X_add_number != 0)
3491 return FALSE;
3492
3493 target_frag = symbol_get_frag (sym);
3494 if (target_frag == NULL)
3495 return FALSE;
3496
3497 if (is_next_frag_target (fragP->fr_next, target_frag)
3498 && S_GET_VALUE (sym) == target_frag->fr_address)
3499 return TRUE;
3500
3501 return FALSE;
3502}
3503
3504
3505static void
3506xg_add_branch_and_loop_targets (insn)
3507 TInsn *insn;
3508{
3509 xtensa_isa isa = xtensa_default_isa;
3510 int num_ops = xtensa_num_operands (isa, insn->opcode);
3511
3512 if (is_loop_opcode (insn->opcode))
3513 {
3514 int i = 1;
3515 xtensa_operand opnd = xtensa_get_operand (isa, insn->opcode, i);
3516 char *kind = xtensa_operand_kind (opnd);
3517 if (strlen (kind) == 1 && *kind == 'l')
3518 if (insn->tok[i].X_op == O_symbol)
3519 add_target_symbol (insn->tok[i].X_add_symbol, TRUE);
3520 return;
3521 }
3522
3523 /* Currently, we do not add branch targets. This is an optimization
3524 for later that tries to align only branch targets, not just any
3525 label in a text section. */
3526
3527 if (align_only_targets)
3528 {
3529 int i;
3530
3531 for (i = 0; i < insn->ntok && i < num_ops; i++)
3532 {
3533 xtensa_operand opnd = xtensa_get_operand (isa, insn->opcode, i);
3534 char *kind = xtensa_operand_kind (opnd);
3535 if (strlen (kind) == 1 && *kind == 'l'
3536 && insn->tok[i].X_op == O_symbol)
3537 add_target_symbol (insn->tok[i].X_add_symbol, FALSE);
3538 }
3539 }
3540}
3541
3542
3543/* Return the transition rule that matches or NULL if none matches. */
3544
3545bfd_boolean
3546xg_instruction_matches_rule (insn, rule)
3547 TInsn *insn;
3548 TransitionRule *rule;
3549{
3550 PreconditionList *condition_l;
3551
3552 if (rule->opcode != insn->opcode)
3553 return FALSE;
3554
3555 for (condition_l = rule->conditions;
3556 condition_l != NULL;
3557 condition_l = condition_l->next)
3558 {
3559 expressionS *exp1;
3560 expressionS *exp2;
3561 Precondition *cond = condition_l->precond;
3562
3563 switch (cond->typ)
3564 {
3565 case OP_CONSTANT:
3566 /* The expression must be the constant. */
3567 assert (cond->op_num < insn->ntok);
3568 exp1 = &insn->tok[cond->op_num];
3569 if (!expr_is_const (exp1))
3570 return FALSE;
3571 switch (cond->cmp)
3572 {
3573 case OP_EQUAL:
3574 if (get_expr_const (exp1) != cond->op_data)
3575 return FALSE;
3576 break;
3577 case OP_NOTEQUAL:
3578 if (get_expr_const (exp1) == cond->op_data)
3579 return FALSE;
3580 break;
3581 }
3582 break;
3583
3584 case OP_OPERAND:
3585 assert (cond->op_num < insn->ntok);
3586 assert (cond->op_data < insn->ntok);
3587 exp1 = &insn->tok[cond->op_num];
3588 exp2 = &insn->tok[cond->op_data];
3589
3590 switch (cond->cmp)
3591 {
3592 case OP_EQUAL:
3593 if (!expr_is_equal (exp1, exp2))
3594 return FALSE;
3595 break;
3596 case OP_NOTEQUAL:
3597 if (expr_is_equal (exp1, exp2))
3598 return FALSE;
3599 break;
3600 }
3601 break;
3602
3603 case OP_LITERAL:
3604 case OP_LABEL:
3605 default:
3606 return FALSE;
3607 }
3608 }
3609 return TRUE;
3610}
3611
3612
3613TransitionRule *
3614xg_instruction_match (insn)
3615 TInsn *insn;
3616{
3617 TransitionTable *table = xg_build_simplify_table ();
3618 TransitionList *l;
3619 assert (insn->opcode < table->num_opcodes);
3620
3621 /* Walk through all of the possible transitions. */
3622 for (l = table->table[insn->opcode]; l != NULL; l = l->next)
3623 {
3624 TransitionRule *rule = l->rule;
3625 if (xg_instruction_matches_rule (insn, rule))
3626 return rule;
3627 }
3628 return NULL;
3629}
3630
3631
3632/* Return false if no error. */
3633
3634bfd_boolean
3635xg_build_token_insn (instr_spec, old_insn, new_insn)
3636 BuildInstr *instr_spec;
3637 TInsn *old_insn;
3638 TInsn *new_insn;
3639{
3640 int num_ops = 0;
3641 BuildOp *b_op;
3642
3643 switch (instr_spec->typ)
3644 {
3645 case INSTR_INSTR:
3646 new_insn->insn_type = ITYPE_INSN;
3647 new_insn->opcode = instr_spec->opcode;
3648 new_insn->is_specific_opcode = FALSE;
3649 break;
3650 case INSTR_LITERAL_DEF:
3651 new_insn->insn_type = ITYPE_LITERAL;
3652 new_insn->opcode = XTENSA_UNDEFINED;
3653 new_insn->is_specific_opcode = FALSE;
3654 break;
3655 case INSTR_LABEL_DEF:
3656 as_bad (_("INSTR_LABEL_DEF not supported yet"));
3657 break;
3658 }
3659
3660 for (b_op = instr_spec->ops; b_op != NULL; b_op = b_op->next)
3661 {
3662 expressionS *exp;
3663 const expressionS *src_exp;
3664
3665 num_ops++;
3666 switch (b_op->typ)
3667 {
3668 case OP_CONSTANT:
3669 /* The expression must be the constant. */
3670 assert (b_op->op_num < MAX_INSN_ARGS);
3671 exp = &new_insn->tok[b_op->op_num];
3672 set_expr_const (exp, b_op->op_data);
3673 break;
3674
3675 case OP_OPERAND:
3676 assert (b_op->op_num < MAX_INSN_ARGS);
3677 assert (b_op->op_data < (unsigned) old_insn->ntok);
3678 src_exp = &old_insn->tok[b_op->op_data];
3679 exp = &new_insn->tok[b_op->op_num];
3680 copy_expr (exp, src_exp);
3681 break;
3682
3683 case OP_LITERAL:
3684 case OP_LABEL:
3685 as_bad (_("can't handle generation of literal/labels yet"));
3686 assert (0);
3687
3688 default:
3689 as_bad (_("can't handle undefined OP TYPE"));
3690 assert (0);
3691 }
3692 }
3693
3694 new_insn->ntok = num_ops;
3695 return FALSE;
3696}
3697
3698
3699/* Return true if it was simplified. */
3700
3701bfd_boolean
3702xg_simplify_insn (old_insn, new_insn)
3703 TInsn *old_insn;
3704 TInsn *new_insn;
3705{
3706 TransitionRule *rule = xg_instruction_match (old_insn);
3707 BuildInstr *insn_spec;
3708 if (rule == NULL)
3709 return FALSE;
3710
3711 insn_spec = rule->to_instr;
3712 /* There should only be one. */
3713 assert (insn_spec != NULL);
3714 assert (insn_spec->next == NULL);
3715 if (insn_spec->next != NULL)
3716 return FALSE;
3717
3718 xg_build_token_insn (insn_spec, old_insn, new_insn);
3719
3720 return TRUE;
3721}
3722
3723
3724/* xg_expand_assembly_insn: (1) Simplify the instruction, i.e., l32i ->
3725 l32i.n. (2) Check the number of operands. (3) Place the instruction
3726 tokens into the stack or if we can relax it at assembly time, place
3727 multiple instructions/literals onto the stack. Return false if no
3728 error. */
3729
3730static bfd_boolean
3731xg_expand_assembly_insn (istack, orig_insn)
3732 IStack *istack;
3733 TInsn *orig_insn;
3734{
3735 int noperands;
3736 TInsn new_insn;
3737 memset (&new_insn, 0, sizeof (TInsn));
3738
3739 /* On return, we will be using the "use_tokens" with "use_ntok".
3740 This will reduce things like addi to addi.n. */
3741 if (code_density_available () && !orig_insn->is_specific_opcode)
3742 {
3743 if (xg_simplify_insn (orig_insn, &new_insn))
3744 orig_insn = &new_insn;
3745 }
3746
3747 noperands = xtensa_num_operands (xtensa_default_isa, orig_insn->opcode);
3748 if (orig_insn->ntok < noperands)
3749 {
3750 as_bad (_("found %d operands for '%s': Expected %d"),
3751 orig_insn->ntok,
3752 xtensa_opcode_name (xtensa_default_isa, orig_insn->opcode),
3753 noperands);
3754 return TRUE;
3755 }
3756 if (orig_insn->ntok > noperands)
3757 as_warn (_("found too many (%d) operands for '%s': Expected %d"),
3758 orig_insn->ntok,
3759 xtensa_opcode_name (xtensa_default_isa, orig_insn->opcode),
3760 noperands);
3761
3762 /* If there are not enough operands, we will assert above. If there
3763 are too many, just cut out the extras here. */
3764
3765 orig_insn->ntok = noperands;
3766
3767 /* Cases:
3768
3769 Instructions with all constant immeds:
3770 Assemble them and relax the instruction if possible.
3771 Give error if not possible; no fixup needed.
3772
3773 Instructions with symbolic immeds:
3774 Assemble them with a Fix up (that may cause instruction expansion).
3775 Also close out the fragment if the fixup may cause instruction expansion.
3776
3777 There are some other special cases where we need alignment.
3778 1) before certain instructions with required alignment (OPCODE_ALIGN)
3779 2) before labels that have jumps (LABEL_ALIGN)
3780 3) after call instructions (RETURN_ALIGN)
3781 Multiple of these may be possible on the same fragment.
3782 If so, make sure to satisfy the required alignment.
3783 Then try to get the desired alignment. */
3784
3785 if (tinsn_has_invalid_symbolic_operands (orig_insn))
3786 return TRUE;
3787
3788 if (orig_insn->is_specific_opcode || !can_relax ())
3789 {
3790 istack_push (istack, orig_insn);
3791 return FALSE;
3792 }
3793
3794 if (tinsn_has_symbolic_operands (orig_insn))
3795 {
3796 if (tinsn_has_complex_operands (orig_insn))
3797 xg_assembly_relax (istack, orig_insn, 0, 0, 0, 0, 0);
3798 else
3799 istack_push (istack, orig_insn);
3800 }
3801 else
3802 {
3803 if (xg_immeds_fit (orig_insn))
3804 istack_push (istack, orig_insn);
3805 else
3806 xg_assembly_relax (istack, orig_insn, 0, 0, 0, 0, 0);
3807 }
3808
3809#if 0
3810 for (i = 0; i < istack->ninsn; i++)
3811 {
3812 if (xg_simplify_insn (&new_insn, &istack->insn[i]))
3813 istack->insn[i] = new_insn;
3814 }
3815#endif
3816
3817 return FALSE;
3818}
3819
3820
3821/* Currently all literals that are generated here are 32-bit L32R targets. */
3822
3823symbolS *
3824xg_assemble_literal (insn)
3825 /* const */ TInsn *insn;
3826{
3827 emit_state state;
3828 symbolS *lit_sym = NULL;
3829
3830 /* size = 4 for L32R. It could easily be larger when we move to
3831 larger constants. Add a parameter later. */
3832 offsetT litsize = 4;
3833 offsetT litalign = 2; /* 2^2 = 4 */
3834 expressionS saved_loc;
3835 set_expr_symbol_offset (&saved_loc, frag_now->fr_symbol, frag_now_fix ());
3836
3837 assert (insn->insn_type == ITYPE_LITERAL);
3838 assert (insn->ntok = 1); /* must be only one token here */
3839
3840 xtensa_switch_to_literal_fragment (&state);
3841
3842 /* Force a 4-byte align here. Note that this opens a new frag, so all
3843 literals done with this function have a frag to themselves. That's
3844 important for the way text section literals work. */
3845 frag_align (litalign, 0, 0);
3846
3847 emit_expr (&insn->tok[0], litsize);
3848
3849 assert (frag_now->tc_frag_data.literal_frag == NULL);
3850 frag_now->tc_frag_data.literal_frag = get_literal_pool_location (now_seg);
3851 frag_now->fr_symbol = xtensa_create_literal_symbol (now_seg, frag_now);
3852 lit_sym = frag_now->fr_symbol;
3853 frag_now->tc_frag_data.is_literal = TRUE;
3854
3855 /* Go back. */
3856 xtensa_restore_emit_state (&state);
3857 return lit_sym;
3858}
3859
3860
3861static void
3862xg_assemble_literal_space (size)
3863 /* const */ int size;
3864{
3865 emit_state state;
3866 /* We might have to do something about this alignment. It only
3867 takes effect if something is placed here. */
3868 offsetT litalign = 2; /* 2^2 = 4 */
3869 fragS *lit_saved_frag;
3870
3871 expressionS saved_loc;
3872
3873 assert (size % 4 == 0);
3874 set_expr_symbol_offset (&saved_loc, frag_now->fr_symbol, frag_now_fix ());
3875
3876 xtensa_switch_to_literal_fragment (&state);
3877
3878 /* Force a 4-byte align here. */
3879 frag_align (litalign, 0, 0);
3880
3881 xg_force_frag_space (size);
3882
3883 lit_saved_frag = frag_now;
3884 frag_now->tc_frag_data.literal_frag = get_literal_pool_location (now_seg);
3885 frag_now->tc_frag_data.is_literal = TRUE;
3886 frag_now->fr_symbol = xtensa_create_literal_symbol (now_seg, frag_now);
3887 xg_finish_frag (0, RELAX_LITERAL, size, FALSE);
3888
3889 /* Go back. */
3890 xtensa_restore_emit_state (&state);
3891 frag_now->tc_frag_data.literal_frag = lit_saved_frag;
3892}
3893
3894
3895symbolS *
3896xtensa_create_literal_symbol (sec, frag)
3897 segT sec;
3898 fragS *frag;
3899{
3900 static int lit_num = 0;
3901 static char name[256];
3902 symbolS *fragSym;
3903
3904 sprintf (name, ".L_lit_sym%d", lit_num);
3905 fragSym = xtensa_create_local_symbol (stdoutput, name, sec, 0, frag_now);
3906
3907 frag->tc_frag_data.is_literal = TRUE;
3908 lit_num++;
3909 return fragSym;
3910}
3911
3912
3913/* Create a local symbol. If it is in a linkonce section, we have to
3914 be careful to make sure that if it is used in a relocation that the
3915 symbol will be in the output file. */
3916
3917symbolS *
3918xtensa_create_local_symbol (abfd, name, sec, value, frag)
3919 bfd *abfd;
3920 const char *name;
3921 segT sec;
3922 valueT value;
3923 fragS *frag;
3924{
3925 symbolS *symbolP;
3926
3927 if (get_is_linkonce_section (abfd, sec))
3928 {
3929 symbolP = symbol_new (name, sec, value, frag);
3930 S_CLEAR_EXTERNAL (symbolP);
3931 /* symbolP->local = 1; */
3932 }
3933 else
3934 symbolP = symbol_new (name, sec, value, frag);
3935
3936 return symbolP;
3937}
3938
3939
3940/* Return true if the section flags are marked linkonce
3941 or the name is .gnu.linkonce*. */
3942
3943bfd_boolean
3944get_is_linkonce_section (abfd, sec)
3945 bfd *abfd ATTRIBUTE_UNUSED;
3946 segT sec;
3947{
3948 flagword flags, link_once_flags;
3949
3950 flags = bfd_get_section_flags (abfd, sec);
3951 link_once_flags = (flags & SEC_LINK_ONCE);
3952
3953 /* Flags might not be set yet. */
3954 if (!link_once_flags)
3955 {
3956 static size_t len = sizeof ".gnu.linkonce.t.";
3957
3958 if (strncmp (segment_name (sec), ".gnu.linkonce.t.", len - 1) == 0)
3959 link_once_flags = SEC_LINK_ONCE;
3960 }
3961 return (link_once_flags != 0);
3962}
3963
3964
3965/* Emit an instruction to the current fragment. If record_fix is true,
3966 then this instruction will not change and we can go ahead and record
3967 the fixup. If record_fix is false, then the instruction may change
3968 and we are going to close out this fragment. Go ahead and set the
3969 fr_symbol and fr_offset instead of adding a fixup. */
3970
3971static bfd_boolean
3972xg_emit_insn (t_insn, record_fix)
3973 TInsn *t_insn;
3974 bfd_boolean record_fix;
3975{
3976 bfd_boolean ok = TRUE;
3977 xtensa_isa isa = xtensa_default_isa;
3978 xtensa_opcode opcode = t_insn->opcode;
3979 bfd_boolean has_fixup = FALSE;
3980 int noperands;
3981 int i, byte_count;
3982 fragS *oldfrag;
3983 size_t old_size;
3984 char *f;
3985 static xtensa_insnbuf insnbuf = NULL;
3986
3987 /* Use a static pointer to the insn buffer so we don't have to call
3988 malloc each time through. */
3989 if (!insnbuf)
3990 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
3991
3992 has_fixup = tinsn_to_insnbuf (t_insn, insnbuf);
3993
3994 noperands = xtensa_num_operands (isa, opcode);
3995 assert (noperands == t_insn->ntok);
3996
3997 byte_count = xtensa_insn_length (isa, opcode);
3998 oldfrag = frag_now;
3999 /* This should NEVER cause us to jump into a new frag;
4000 we've already reserved space. */
4001 old_size = frag_now_fix ();
4002 f = frag_more (byte_count);
4003 assert (oldfrag == frag_now);
4004
4005 /* This needs to generate a record that lists the parts that are
4006 instructions. */
4007 if (!frag_now->tc_frag_data.is_insn)
4008 {
4009 /* If we are at the beginning of a fragment, switch this
4010 fragment to an instruction fragment. */
4011 if (now_seg != absolute_section && old_size != 0)
4012 as_warn (_("instruction fragment may contain data"));
4013 frag_now->tc_frag_data.is_insn = TRUE;
4014 }
4015
4016 xtensa_insnbuf_to_chars (isa, insnbuf, f);
4017
e0001a05
NC		 4018 /* Now spit out the opcode fixup.... */
4019 if (!has_fixup)
4020 return !ok;
4021
4022 for (i = 0; i < noperands; ++i)
4023 {
4024 expressionS *expr = &t_insn->tok[i];
4025 switch (expr->X_op)
4026 {
4027 case O_symbol:
4028 if (get_relaxable_immed (opcode) == i)
4029 {
4030 if (record_fix)
4031 {
4032 if (!xg_add_opcode_fix (opcode, i, expr, frag_now,
4033 f - frag_now->fr_literal))
4034 ok = FALSE;
4035 }
4036 else
4037 {
4038 /* Write it to the fr_offset, fr_symbol. */
4039 frag_now->fr_symbol = expr->X_add_symbol;
4040 frag_now->fr_offset = expr->X_add_number;
4041 }
4042 }
4043 else
4044 {
4045 as_bad (_("invalid operand %d on '%s'"),
4046 i, xtensa_opcode_name (isa, opcode));
4047 ok = FALSE;
4048 }
4049 break;
4050
4051 case O_constant:
4052 case O_register:
4053 break;
4054
4055 default:
4056 as_bad (_("invalid expression for operand %d on '%s'"),
4057 i, xtensa_opcode_name (isa, opcode));
4058 ok = FALSE;
4059 break;
4060 }
4061 }
4062
4063 return !ok;
4064}
4065
4066
4067static bfd_boolean
4068xg_emit_insn_to_buf (t_insn, buf, fragP, offset, build_fix)
4069 TInsn *t_insn;
4070 char *buf;
4071 fragS *fragP;
4072 offsetT offset;
4073 bfd_boolean build_fix;
4074{
4075 static xtensa_insnbuf insnbuf = NULL;
4076 bfd_boolean has_symbolic_immed = FALSE;
4077 bfd_boolean ok = TRUE;
4078 if (!insnbuf)
4079 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
4080
4081 has_symbolic_immed = tinsn_to_insnbuf (t_insn, insnbuf);
4082 if (has_symbolic_immed && build_fix)
4083 {
4084 /* Add a fixup. */
4085 int opnum = get_relaxable_immed (t_insn->opcode);
4086 expressionS *exp = &t_insn->tok[opnum];
4087
4088 if (!xg_add_opcode_fix (t_insn->opcode,
4089 opnum, exp, fragP, offset))
4090 ok = FALSE;
4091 }
4092 fragP->tc_frag_data.is_insn = TRUE;
4093 xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf, buf);
4094 return ok;
4095}
4096
4097
4098/* Put in a fixup record based on the opcode.
4099 Return true on success. */
4100
4101bfd_boolean
4102xg_add_opcode_fix (opcode, opnum, expr, fragP, offset)
4103 xtensa_opcode opcode;
4104 int opnum;
4105 expressionS *expr;
4106 fragS *fragP;
4107 offsetT offset;
4108{
4109 bfd_reloc_code_real_type reloc;
4110 reloc_howto_type *howto;
4111 int insn_length;
4112 fixS *the_fix;
4113
4114 reloc = opnum_to_reloc (opnum);
4115 if (reloc == BFD_RELOC_NONE)
4116 {
4117 as_bad (_("invalid relocation operand %i on '%s'"),
4118 opnum, xtensa_opcode_name (xtensa_default_isa, opcode));
4119 return FALSE;
4120 }
4121
4122 howto = bfd_reloc_type_lookup (stdoutput, reloc);
4123
4124 if (!howto)
4125 {
4126 as_bad (_("undefined symbol for opcode \"%s\"."),
4127 xtensa_opcode_name (xtensa_default_isa, opcode));
4128 return FALSE;
4129 }
4130
4131 insn_length = xtensa_insn_length (xtensa_default_isa, opcode);
4132 the_fix = fix_new_exp (fragP, offset, insn_length, expr,
4133 howto->pc_relative, reloc);
4134
4135 if (expr->X_add_symbol &&
4136 (S_IS_EXTERNAL (expr->X_add_symbol) || S_IS_WEAK (expr->X_add_symbol)))
4137 the_fix->fx_plt = TRUE;
4138
4139 return TRUE;
4140}
4141
4142
4143void
4144xg_resolve_literals (insn, lit_sym)
4145 TInsn *insn;
4146 symbolS *lit_sym;
4147{
4148 symbolS *sym = get_special_literal_symbol ();
4149 int i;
4150 if (lit_sym == 0)
4151 return;
4152 assert (insn->insn_type == ITYPE_INSN);
4153 for (i = 0; i < insn->ntok; i++)
4154 if (insn->tok[i].X_add_symbol == sym)
4155 insn->tok[i].X_add_symbol = lit_sym;
4156
4157}
4158
4159
4160void
4161xg_resolve_labels (insn, label_sym)
4162 TInsn *insn;
4163 symbolS *label_sym;
4164{
4165 symbolS *sym = get_special_label_symbol ();
4166 int i;
4167 /* assert(!insn->is_literal); */
4168 for (i = 0; i < insn->ntok; i++)
4169 if (insn->tok[i].X_add_symbol == sym)
4170 insn->tok[i].X_add_symbol = label_sym;
4171
4172}
4173
4174
4175static void
4176xg_assemble_tokens (insn)
4177 /*const */ TInsn *insn;
4178{
4179 /* By the time we get here, there's not too much left to do.
4180 1) Check our assumptions.
4181 2) Check if the current instruction is "narrow".
4182 If so, then finish the frag, create another one.
4183 We could also go back to change some previous
4184 "narrow" frags into no-change ones if we have more than
4185 MAX_NARROW_ALIGNMENT of them without alignment restrictions
4186 between them.
4187
4188 Cases:
4189 1) It has constant operands and doesn't fit.
4190 Go ahead and assemble it so it will fail.
4191 2) It has constant operands that fit.
4192 If narrow and !is_specific_opcode,
4193 assemble it and put in a relocation
4194 else
4195 assemble it.
4196 3) It has a symbolic immediate operand
4197 a) Find the worst-case relaxation required
4198 b) Find the worst-case literal pool space required.
4199 Insert appropriate alignment & space in the literal.
4200 Assemble it.
4201 Add the relocation. */
4202
4203 assert (insn->insn_type == ITYPE_INSN);
4204
4205 if (!tinsn_has_symbolic_operands (insn))
4206 {
4207 if (xg_is_narrow_insn (insn) && !insn->is_specific_opcode)
4208 {
4209 /* assemble it but add max required space */
4210 int max_size = xg_get_max_narrow_insn_size (insn->opcode);
4211 int min_size = xg_get_insn_size (insn);
4212 char *last_insn;
4213 assert (max_size == 3);
4214 /* make sure we have enough space to widen it */
4215 xg_force_frag_space (max_size);
4216 /* Output the instruction. It may cause an error if some
4217 operands do not fit. */
4218 last_insn = frag_more (0);
4219 if (xg_emit_insn (insn, TRUE))
4220 as_warn (_("instruction with constant operands does not fit"));
4221 xg_finish_frag (last_insn, RELAX_NARROW, max_size - min_size, TRUE);
4222 }
4223 else
4224 {
4225 /* Assemble it. No relocation needed. */
4226 int max_size = xg_get_insn_size (insn);
4227 xg_force_frag_space (max_size);
4228 if (xg_emit_insn (insn, FALSE))
4229 as_warn (_("instruction with constant operands does not "
4230 "fit without widening"));
4231 /* frag_more (max_size); */
4232
4233 /* Special case for jx. If the jx is the next to last
4234 instruction in a loop, we will add a NOP after it. This
4235 avoids a hardware issue that could occur if the jx jumped
4236 to the next instruction. */
4237 if (software_avoid_b_j_loop_end
4238 && is_jx_opcode (insn->opcode))
4239 {
4240 maybe_has_b_j_loop_end = TRUE;
4241 /* add 2 of these */
4242 frag_now->tc_frag_data.is_insn = TRUE;
4243 frag_var (rs_machine_dependent, 4, 4,
4244 RELAX_ADD_NOP_IF_PRE_LOOP_END,
4245 frag_now->fr_symbol, frag_now->fr_offset, NULL);
4246 }
4247 }
4248 }
4249 else
4250 {
4251 /* Need to assemble it with space for the relocation. */
4252 if (!insn->is_specific_opcode)
4253 {
4254 /* Assemble it but add max required space. */
4255 char *last_insn;
4256 int min_size = xg_get_insn_size (insn);
4257 int max_size = xg_get_max_insn_widen_size (insn->opcode);
4258 int max_literal_size =
4259 xg_get_max_insn_widen_literal_size (insn->opcode);
4260
4261#if 0
4262 symbolS *immed_sym = xg_get_insn_immed_symbol (insn);
4263 set_frag_segment (frag_now, now_seg);
4264#endif /* 0 */
4265
4266 /* Make sure we have enough space to widen the instruction.
4267 This may open a new fragment. */
4268 xg_force_frag_space (max_size);
4269 if (max_literal_size != 0)
4270 xg_assemble_literal_space (max_literal_size);
4271
4272 /* Output the instruction. It may cause an error if some
4273 operands do not fit. Emit the incomplete instruction. */
4274 last_insn = frag_more (0);
4275 xg_emit_insn (insn, FALSE);
4276
4277 xg_finish_frag (last_insn, RELAX_IMMED, max_size - min_size, TRUE);
4278
4279 /* Special cases for loops:
4280 close_loop_end should be inserted AFTER short_loop.
4281 Make sure that CLOSE loops are processed BEFORE short_loops
4282 when converting them. */
4283
4284 /* "short_loop": add a NOP if the loop is < 4 bytes. */
4285 if (software_avoid_short_loop
4286 && is_loop_opcode (insn->opcode))
4287 {
4288 maybe_has_short_loop = TRUE;
4289 frag_now->tc_frag_data.is_insn = TRUE;
4290 frag_var (rs_machine_dependent, 4, 4,
4291 RELAX_ADD_NOP_IF_SHORT_LOOP,
4292 frag_now->fr_symbol, frag_now->fr_offset, NULL);
4293 frag_now->tc_frag_data.is_insn = TRUE;
4294 frag_var (rs_machine_dependent, 4, 4,
4295 RELAX_ADD_NOP_IF_SHORT_LOOP,
4296 frag_now->fr_symbol, frag_now->fr_offset, NULL);
4297 }
4298
4299 /* "close_loop_end": Add up to 12 bytes of NOPs to keep a
4300 loop at least 12 bytes away from another loop's loop
4301 end. */
4302 if (software_avoid_close_loop_end
4303 && is_loop_opcode (insn->opcode))
4304 {
4305 maybe_has_close_loop_end = TRUE;
4306 frag_now->tc_frag_data.is_insn = TRUE;
4307 frag_var (rs_machine_dependent, 12, 12,
4308 RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
4309 frag_now->fr_symbol, frag_now->fr_offset, NULL);
4310 }
4311 }
4312 else
4313 {
4314 /* Assemble it in place. No expansion will be required,
4315 but we'll still need a relocation record. */
4316 int max_size = xg_get_insn_size (insn);
4317 xg_force_frag_space (max_size);
4318 if (xg_emit_insn (insn, TRUE))
4319 as_warn (_("instruction's constant operands do not fit"));
4320 }
4321 }
4322}
4323
4324
4325/* Return true if the instruction can write to the specified
4326 integer register. */
4327
4328static bfd_boolean
4329is_register_writer (insn, regset, regnum)
4330 const TInsn *insn;
4331 const char *regset;
4332 int regnum;
4333{
4334 int i;
4335 int num_ops;
4336 xtensa_isa isa = xtensa_default_isa;
4337
4338 num_ops = xtensa_num_operands (isa, insn->opcode);
4339
4340 for (i = 0; i < num_ops; i++)
4341 {
4342 xtensa_operand operand = xtensa_get_operand (isa, insn->opcode, i);
4343 char inout = xtensa_operand_inout (operand);
4344
4345 if (inout == '>' || inout == '=')
4346 {
4347 if (strcmp (xtensa_operand_kind (operand), regset) == 0)
4348 {
4349 if ((insn->tok[i].X_op == O_register)
4350 && (insn->tok[i].X_add_number == regnum))
4351 return TRUE;
4352 }
4353 }
4354 }
4355 return FALSE;
4356}
4357
4358
4359static bfd_boolean
4360is_bad_loopend_opcode (tinsn)
4361 const TInsn * tinsn;
4362{
4363 xtensa_opcode opcode = tinsn->opcode;
4364
4365 if (opcode == XTENSA_UNDEFINED)
4366 return FALSE;
4367
4368 if (opcode == xtensa_call0_opcode
4369 || opcode == xtensa_callx0_opcode
4370 || opcode == xtensa_call4_opcode
4371 || opcode == xtensa_callx4_opcode
4372 || opcode == xtensa_call8_opcode
4373 || opcode == xtensa_callx8_opcode
4374 || opcode == xtensa_call12_opcode
4375 || opcode == xtensa_callx12_opcode
4376 || opcode == xtensa_isync_opcode
4377 || opcode == xtensa_ret_opcode
4378 || opcode == xtensa_ret_n_opcode
4379 || opcode == xtensa_retw_opcode
4380 || opcode == xtensa_retw_n_opcode
4381 || opcode == xtensa_waiti_opcode)
4382 return TRUE;
4383
4384 /* An RSR of LCOUNT is illegal as the last opcode in a loop. */
4385 if (opcode == xtensa_rsr_opcode
4386 && tinsn->ntok >= 2
4387 && tinsn->tok[1].X_op == O_constant
4388 && tinsn->tok[1].X_add_number == 2)
4389 return TRUE;
4390
4391 return FALSE;
4392}
4393
4394
4395/* Labels that begin with ".Ln" or ".LM" are unaligned.
4396 This allows the debugger to add unaligned labels.
4397 Also, the assembler generates stabs labels that need
4398 not be aligned: FAKE_LABEL_NAME . {"F", "L", "endfunc"}. */
4399
4400bfd_boolean
4401is_unaligned_label (sym)
4402 symbolS *sym;
4403{
4404 const char *name = S_GET_NAME (sym);
4405 static size_t fake_size = 0;
4406
4407 if (name
4408 && name[0] == '.'
4409 && name[1] == 'L' && (name[2] == 'n' || name[2] == 'M'))
4410 return TRUE;
4411
4412 /* FAKE_LABEL_NAME followed by "F", "L" or "endfunc" */
4413 if (fake_size == 0)
4414 fake_size = strlen (FAKE_LABEL_NAME);
4415
4416 if (name
4417 && strncmp (FAKE_LABEL_NAME, name, fake_size) == 0
4418 && (name[fake_size] == 'F'
4419 || name[fake_size] == 'L'
4420 || (name[fake_size] == 'e'
4421 && strncmp ("endfunc", name+fake_size, 7) == 0)))
4422 return TRUE;
4423
4424 return FALSE;
4425}
4426
4427
4428fragS *
4429next_non_empty_frag (fragP)
4430 const fragS *fragP;
4431{
4432 fragS *next_fragP = fragP->fr_next;
4433
4434 /* Sometimes an empty will end up here due storage allocation issues.
4435 So we have to skip until we find something legit. */
4436 while (next_fragP && next_fragP->fr_fix == 0)
4437 next_fragP = next_fragP->fr_next;
4438
4439 if (next_fragP == NULL || next_fragP->fr_fix == 0)
4440 return NULL;
4441
4442 return next_fragP;
4443}
4444
4445
4446xtensa_opcode
4447next_frag_opcode (fragP)
4448 const fragS * fragP;
4449{
4450 const fragS *next_fragP = next_non_empty_frag (fragP);
4451 static xtensa_insnbuf insnbuf = NULL;
4452 xtensa_isa isa = xtensa_default_isa;
4453
4454 if (!insnbuf)
4455 insnbuf = xtensa_insnbuf_alloc (isa);
4456
4457 if (next_fragP == NULL)
4458 return XTENSA_UNDEFINED;
4459
4460 xtensa_insnbuf_from_chars (isa, insnbuf, next_fragP->fr_literal);
4461 return xtensa_decode_insn (isa, insnbuf);
4462}
4463
4464
4465/* Return true if the target frag is one of the next non-empty frags. */
4466
4467bfd_boolean
4468is_next_frag_target (fragP, target)
4469 const fragS *fragP;
4470 const fragS *target;
4471{
4472 if (fragP == NULL)
4473 return FALSE;
4474
4475 for (; fragP; fragP = fragP->fr_next)
4476 {
4477 if (fragP == target)
4478 return TRUE;
4479 if (fragP->fr_fix != 0)
4480 return FALSE;
4481 if (fragP->fr_type == rs_fill && fragP->fr_offset != 0)
4482 return FALSE;
4483 if ((fragP->fr_type == rs_align || fragP->fr_type == rs_align_code)
4484 && ((fragP->fr_address % (1 << fragP->fr_offset)) != 0))
4485 return FALSE;
4486 if (fragP->fr_type == rs_space)
4487 return FALSE;
4488 }
4489 return FALSE;
4490}
4491
4492
4493/* If the next legit fragment is an end-of-loop marker,
4494 switch its state so it will instantiate a NOP. */
4495
4496static void
4497update_next_frag_nop_state (fragP)
4498 fragS *fragP;
4499{
4500 fragS *next_fragP = fragP->fr_next;
4501
4502 while (next_fragP && next_fragP->fr_fix == 0)
4503 {
4504 if (next_fragP->fr_type == rs_machine_dependent
4505 && next_fragP->fr_subtype == RELAX_LOOP_END)
4506 {
4507 next_fragP->fr_subtype = RELAX_LOOP_END_ADD_NOP;
4508 return;
4509 }
4510 next_fragP = next_fragP->fr_next;
4511 }
4512}
4513
4514
4515static bfd_boolean
4516next_frag_is_branch_target (fragP)
4517 const fragS *fragP;
4518{
4519 /* Sometimes an empty will end up here due storage allocation issues,
4520 so we have to skip until we find something legit. */
4521 for (fragP = fragP->fr_next; fragP; fragP = fragP->fr_next)
4522 {
4523 if (fragP->tc_frag_data.is_branch_target)
4524 return TRUE;
4525 if (fragP->fr_fix != 0)
4526 break;
4527 }
4528 return FALSE;
4529}
4530
4531
4532static bfd_boolean
4533next_frag_is_loop_target (fragP)
4534 const fragS *fragP;
4535{
4536 /* Sometimes an empty will end up here due storage allocation issues.
4537 So we have to skip until we find something legit. */
4538 for (fragP = fragP->fr_next; fragP; fragP = fragP->fr_next)
4539 {
4540 if (fragP->tc_frag_data.is_loop_target)
4541 return TRUE;
4542 if (fragP->fr_fix != 0)
4543 break;
4544 }
4545 return FALSE;
4546}
4547
4548
4549static addressT
4550next_frag_pre_opcode_bytes (fragp)
4551 const fragS *fragp;
4552{
4553 const fragS *next_fragp = fragp->fr_next;
4554
4555 xtensa_opcode next_opcode = next_frag_opcode (fragp);
4556 if (!is_loop_opcode (next_opcode))
4557 return 0;
4558
4559 /* Sometimes an empty will end up here due storage allocation issues.
4560 So we have to skip until we find something legit. */
4561 while (next_fragp->fr_fix == 0)
4562 next_fragp = next_fragp->fr_next;
4563
4564 if (next_fragp->fr_type != rs_machine_dependent)
4565 return 0;
4566
4567 /* There is some implicit knowledge encoded in here.
4568 The LOOP instructions that are NOT RELAX_IMMED have
4569 been relaxed. */
4570 if (next_fragp->fr_subtype > RELAX_IMMED)
4571 return get_expanded_loop_offset (next_opcode);
4572
4573 return 0;
4574}
4575
4576
4577/* Mark a location where we can later insert literal frags. Update
4578 the section's literal_pool_loc, so subsequent literals can be
4579 placed nearest to their use. */
4580
4581static void
4582xtensa_mark_literal_pool_location (move_labels)
4583 bfd_boolean move_labels;
4584{
4585 /* Any labels pointing to the current location need
4586 to be adjusted to after the literal pool. */
4587 emit_state s;
4588 fragS *label_target = frag_now;
4589 fragS *pool_location;
4590 offsetT label_offset = frag_now_fix ();
4591
4592 frag_align (2, 0, 0);
4593
4594 /* We stash info in the fr_var of these frags
4595 so we can later move the literal's fixes into this
4596 frchain's fix list. We can use fr_var because fr_var's
4597 interpretation depends solely on the fr_type and subtype. */
4598 pool_location = frag_now;
4599 frag_variant (rs_machine_dependent, 0, (int) frchain_now,
4600 RELAX_LITERAL_POOL_BEGIN, NULL, 0, NULL);
4601 frag_variant (rs_machine_dependent, 0, (int) now_seg,
4602 RELAX_LITERAL_POOL_END, NULL, 0, NULL);
4603
4604 /* Now put a frag into the literal pool that points to this location. */
4605 set_literal_pool_location (now_seg, pool_location);
4606 xtensa_switch_to_literal_fragment (&s);
4607
4608 /* Close whatever frag is there. */
4609 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
4610 frag_now->tc_frag_data.literal_frag = pool_location;
4611 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
4612 xtensa_restore_emit_state (&s);
4613 if (move_labels)
4614 xtensa_move_labels (label_target, label_offset, frag_now, 0);
4615}
4616
4617
4618static void
4619xtensa_move_labels (old_frag, old_offset, new_frag, new_offset)
4620 fragS *old_frag;
4621 valueT old_offset;
4622 fragS *new_frag ATTRIBUTE_UNUSED;
4623 valueT new_offset;
4624{
4625 symbolS *old_sym;
4626
4627 /* Repeat until there are no more.... */
4628 for (old_sym = xtensa_find_label (old_frag, old_offset, TRUE);
4629 old_sym;
4630 old_sym = xtensa_find_label (old_frag, old_offset, TRUE))
4631 {
4632 S_SET_VALUE (old_sym, (valueT) new_offset);
4633 symbol_set_frag (old_sym, frag_now);
4634 }
4635}
4636
4637
4638/* Assemble a NOP of the requested size in the buffer. User must have
4639 allocated "buf" with at least "size" bytes. */
4640
4641void
4642assemble_nop (size, buf)
4643 size_t size;
4644 char *buf;
4645{
4646 static xtensa_insnbuf insnbuf = NULL;
4647 TInsn t_insn;
4648 if (!insnbuf)
4649 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
4650
4651 tinsn_init (&t_insn);
4652 switch (size)
4653 {
4654 case 2:
4655 t_insn.opcode = xtensa_nop_n_opcode;
4656 t_insn.ntok = 0;
4657 if (t_insn.opcode == XTENSA_UNDEFINED)
4658 as_fatal (_("opcode 'NOP.N' unavailable in this configuration"));
4659 tinsn_to_insnbuf (&t_insn, insnbuf);
4660 xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf, buf);
4661 break;
4662
4663 case 3:
4664 t_insn.opcode = xtensa_or_opcode;
4665 assert (t_insn.opcode != XTENSA_UNDEFINED);
4666 if (t_insn.opcode == XTENSA_UNDEFINED)
4667 as_fatal (_("opcode 'OR' unavailable in this configuration"));
4668 set_expr_const (&t_insn.tok[0], 1);
4669 set_expr_const (&t_insn.tok[1], 1);
4670 set_expr_const (&t_insn.tok[2], 1);
4671 t_insn.ntok = 3;
4672 tinsn_to_insnbuf (&t_insn, insnbuf);
4673 xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf, buf);
4674 break;
4675
4676 default:
4677 as_fatal (_("invalid %d-byte NOP requested"), size);
4678 }
4679}
4680
4681
4682/* Return the number of bytes for the offset of the expanded loop
4683 instruction. This should be incorporated into the relaxation
4684 specification but is hard-coded here. This is used to auto-align
4685 the loop instruction. It is invalid to call this function if the
4686 configuration does not have loops or if the opcode is not a loop
4687 opcode. */
4688
4689static addressT
4690get_expanded_loop_offset (opcode)
4691 xtensa_opcode opcode;
4692{
4693 /* This is the OFFSET of the loop instruction in the expanded loop.
4694 This MUST correspond directly to the specification of the loop
4695 expansion. It will be validated on fragment conversion. */
4696 if (opcode == XTENSA_UNDEFINED)
4697 as_fatal (_("get_expanded_loop_offset: undefined opcode"));
4698 if (opcode == xtensa_loop_opcode)
4699 return 0;
4700 if (opcode == xtensa_loopnez_opcode)
4701 return 3;
4702 if (opcode == xtensa_loopgtz_opcode)
4703 return 6;
4704 as_fatal (_("get_expanded_loop_offset: invalid opcode"));
4705 return 0;
4706}
4707
4708
4709fragS *
4710get_literal_pool_location (seg)
4711 segT seg;
4712{
4713 return seg_info (seg)->tc_segment_info_data.literal_pool_loc;
4714}
4715
4716
4717static void
4718set_literal_pool_location (seg, literal_pool_loc)
4719 segT seg;
4720 fragS *literal_pool_loc;
4721{
4722 seg_info (seg)->tc_segment_info_data.literal_pool_loc = literal_pool_loc;
4723}
4724
4725\f
4726/* External Functions and Other GAS Hooks. */
4727
4728const char *
4729xtensa_target_format ()
4730{
4731 return (target_big_endian ? "elf32-xtensa-be" : "elf32-xtensa-le");
4732}
4733
4734
4735void
4736xtensa_file_arch_init (abfd)
4737 bfd *abfd;
4738{
4739 bfd_set_private_flags (abfd, 0x100 | 0x200);
4740}
4741
4742
4743void
4744md_number_to_chars (buf, val, n)
4745 char *buf;
4746 valueT val;
4747 int n;
4748{
4749 if (target_big_endian)
4750 number_to_chars_bigendian (buf, val, n);
4751 else
4752 number_to_chars_littleendian (buf, val, n);
4753}
4754
4755
4756/* This function is called once, at assembler startup time. It should
4757 set up all the tables, etc. that the MD part of the assembler will
4758 need. */
4759
4760void
4761md_begin ()
4762{
4763 segT current_section = now_seg;
4764 int current_subsec = now_subseg;
4765 xtensa_isa isa;
4766
4767#if STATIC_LIBISA
4768 isa = xtensa_isa_init ();
4769#else
4770 /* ISA was already initialized by xtensa_init(). */
4771 isa = xtensa_default_isa;
4772#endif
4773
4774 /* Set up the .literal, .fini.literal and .init.literal sections. */
4775 memset (&default_lit_sections, 0, sizeof (default_lit_sections));
4776 default_lit_sections.init_lit_seg_name = INIT_LITERAL_SECTION_NAME;
4777 default_lit_sections.fini_lit_seg_name = FINI_LITERAL_SECTION_NAME;
4778 default_lit_sections.lit_seg_name = LITERAL_SECTION_NAME;
4779
4780 subseg_set (current_section, current_subsec);
4781
4782 xtensa_addi_opcode = xtensa_opcode_lookup (isa, "addi");
4783 xtensa_addmi_opcode = xtensa_opcode_lookup (isa, "addmi");
4784 xtensa_call0_opcode = xtensa_opcode_lookup (isa, "call0");
4785 xtensa_call4_opcode = xtensa_opcode_lookup (isa, "call4");
4786 xtensa_call8_opcode = xtensa_opcode_lookup (isa, "call8");
4787 xtensa_call12_opcode = xtensa_opcode_lookup (isa, "call12");
4788 xtensa_callx0_opcode = xtensa_opcode_lookup (isa, "callx0");
4789 xtensa_callx4_opcode = xtensa_opcode_lookup (isa, "callx4");
4790 xtensa_callx8_opcode = xtensa_opcode_lookup (isa, "callx8");
4791 xtensa_callx12_opcode = xtensa_opcode_lookup (isa, "callx12");
4792 xtensa_entry_opcode = xtensa_opcode_lookup (isa, "entry");
4793 xtensa_isync_opcode = xtensa_opcode_lookup (isa, "isync");
4794 xtensa_j_opcode = xtensa_opcode_lookup (isa, "j");
4795 xtensa_jx_opcode = xtensa_opcode_lookup (isa, "jx");
4796 xtensa_loop_opcode = xtensa_opcode_lookup (isa, "loop");
4797 xtensa_loopnez_opcode = xtensa_opcode_lookup (isa, "loopnez");
4798 xtensa_loopgtz_opcode = xtensa_opcode_lookup (isa, "loopgtz");
4799 xtensa_nop_n_opcode = xtensa_opcode_lookup (isa, "nop.n");
4800 xtensa_or_opcode = xtensa_opcode_lookup (isa, "or");
4801 xtensa_ret_opcode = xtensa_opcode_lookup (isa, "ret");
4802 xtensa_ret_n_opcode = xtensa_opcode_lookup (isa, "ret.n");
4803 xtensa_retw_opcode = xtensa_opcode_lookup (isa, "retw");
4804 xtensa_retw_n_opcode = xtensa_opcode_lookup (isa, "retw.n");
4805 xtensa_rsr_opcode = xtensa_opcode_lookup (isa, "rsr");
4806 xtensa_waiti_opcode = xtensa_opcode_lookup (isa, "waiti");
4807}
4808
4809
4810/* tc_frob_label hook */
4811
4812void
4813xtensa_frob_label (sym)
4814 symbolS *sym;
4815{
4816 xtensa_define_label (sym);
4817 if (is_loop_target_label (sym)
4818 && (get_last_insn_flags (now_seg, now_subseg)
4819 & FLAG_IS_BAD_LOOPEND) != 0)
4820 as_bad (_("invalid last instruction for a zero-overhead loop"));
4821
4822 /* No target aligning in the absolute section. */
4823 if (now_seg != absolute_section && align_targets
4824 && !is_unaligned_label (sym))
4825 {
4826 fragS *old_frag = frag_now;
4827 offsetT old_offset = frag_now_fix ();
4828 if (frag_now->tc_frag_data.is_literal)
4829 return;
4830 /* frag_now->tc_frag_data.is_insn = TRUE; */
4831 frag_var (rs_machine_dependent, 4, 4,
4832 RELAX_DESIRE_ALIGN_IF_TARGET,
4833 frag_now->fr_symbol, frag_now->fr_offset, NULL);
4834 xtensa_move_labels (old_frag, old_offset, frag_now, 0);
4835 /* Once we know whether or not the label is a branch target
4836 We will suppress some of these alignments. */
4837 }
4838}
4839
4840
4841/* md_flush_pending_output hook */
4842
4843void
4844xtensa_flush_pending_output ()
4845{
4846 /* If there is a non-zero instruction fragment, close it. */
4847 if (frag_now_fix () != 0 && frag_now->tc_frag_data.is_insn)
4848 {
4849 frag_wane (frag_now);
4850 frag_new (0);
4851 }
4852 frag_now->tc_frag_data.is_insn = FALSE;
4853}
4854
4855
4856void
4857md_assemble (str)
4858 char *str;
4859{
4860 xtensa_isa isa = xtensa_default_isa;
4861 char *opname;
4862 unsigned opnamelen;
4863 bfd_boolean has_underbar = FALSE;
4864 char *arg_strings[MAX_INSN_ARGS];
4865 int num_args;
4866 IStack istack; /* Put instructions into here. */
4867 TInsn orig_insn; /* Original instruction from the input. */
4868 int i;
4869 symbolS *lit_sym = NULL;
4870
4871 if (frag_now->tc_frag_data.is_literal)
4872 {
4873 static bfd_boolean reported = 0;
4874 if (reported < 4)
4875 as_bad (_("cannot assemble '%s' into a literal fragment"), str);
4876 if (reported == 3)
4877 as_bad (_("..."));
4878 reported++;
4879 return;
4880 }
4881
4882 istack_init (&istack);
4883 tinsn_init (&orig_insn);
4884
4885 /* Split off the opcode. */
4886 opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/0123456789.");
4887 opname = xmalloc (opnamelen + 1);
4888 memcpy (opname, str, opnamelen);
4889 opname[opnamelen] = '\0';
4890
4891 num_args = tokenize_arguments (arg_strings, str + opnamelen);
4892 if (num_args == -1)
4893 {
4894 as_bad (_("syntax error"));
4895 return;
4896 }
4897
4898 if (xg_translate_idioms (&opname, &num_args, arg_strings))
4899 return;
4900
4901 /* Check for an underbar prefix. */
4902 if (*opname == '_')
4903 {
4904 has_underbar = TRUE;
4905 opname += 1;
4906 }
4907
4908 orig_insn.insn_type = ITYPE_INSN;
4909 orig_insn.ntok = 0;
4910 orig_insn.is_specific_opcode = (has_underbar || !use_generics ());
4911 specific_opcode = orig_insn.is_specific_opcode;
4912
4913 orig_insn.opcode = xtensa_opcode_lookup (isa, opname);
4914 if (orig_insn.opcode == XTENSA_UNDEFINED)
4915 {
4916 as_bad (_("unknown opcode %s"), opname);
4917 return;
4918 }
4919
4920 if (frag_now_fix () != 0 && !frag_now->tc_frag_data.is_insn)
4921 {
4922 frag_wane (frag_now);
4923 frag_new (0);
4924 }
4925
4926 if (software_a0_b_retw_interlock)
4927 {
4928 if ((get_last_insn_flags (now_seg, now_subseg) & FLAG_IS_A0_WRITER) != 0
4929 && is_conditional_branch_opcode (orig_insn.opcode))
4930 {
4931 has_a0_b_retw = TRUE;
4932
4933 /* Mark this fragment with the special RELAX_ADD_NOP_IF_A0_B_RETW.
4934 After the first assembly pass we will check all of them and
4935 add a nop if needed. */
4936 frag_now->tc_frag_data.is_insn = TRUE;
4937 frag_var (rs_machine_dependent, 4, 4,
4938 RELAX_ADD_NOP_IF_A0_B_RETW,
4939 frag_now->fr_symbol, frag_now->fr_offset, NULL);
4940 frag_now->tc_frag_data.is_insn = TRUE;
4941 frag_var (rs_machine_dependent, 4, 4,
4942 RELAX_ADD_NOP_IF_A0_B_RETW,
4943 frag_now->fr_symbol, frag_now->fr_offset, NULL);
4944 }
4945 }
4946
4947 /* Special case: The call instructions should be marked "specific opcode"
4948 to keep them from expanding. */
4949 if (!use_longcalls () && is_direct_call_opcode (orig_insn.opcode))
4950 orig_insn.is_specific_opcode = TRUE;
4951
4952 /* Parse the arguments. */
4953 if (parse_arguments (&orig_insn, num_args, arg_strings))
4954 {
4955 as_bad (_("syntax error"));
4956 return;
4957 }
4958
4959 /* Free the opcode and argument strings, now that they've been parsed. */
4960 free (has_underbar ? opname - 1 : opname);
4961 opname = 0;
4962 while (num_args-- > 0)
4963 free (arg_strings[num_args]);
4964
4965 /* Check for the right number and type of arguments. */
4966 if (tinsn_check_arguments (&orig_insn))
4967 return;
4968
4969 /* See if the instruction implies an aligned section. */
4970 if (is_entry_opcode (orig_insn.opcode) || is_loop_opcode (orig_insn.opcode))
4971 record_alignment (now_seg, 2);
4972
4973 xg_add_branch_and_loop_targets (&orig_insn);
4974
4975 /* Special cases for instructions that force an alignment... */
4976 if (!orig_insn.is_specific_opcode && is_loop_opcode (orig_insn.opcode))
4977 {
4978 fragS *old_frag = frag_now;
4979 offsetT old_offset = frag_now_fix ();
4980 symbolS *old_sym = NULL;
4981 size_t max_fill;
4982
4983 frag_now->tc_frag_data.is_insn = TRUE;
4984 frag_now->tc_frag_data.is_no_density = !code_density_available ();
4985 max_fill = get_text_align_max_fill_size
4986 (get_text_align_power (XTENSA_FETCH_WIDTH),
4987 TRUE, frag_now->tc_frag_data.is_no_density);
4988 frag_var (rs_machine_dependent, max_fill, max_fill,
4989 RELAX_ALIGN_NEXT_OPCODE, frag_now->fr_symbol,
4990 frag_now->fr_offset, NULL);
4991
4992 /* Repeat until there are no more. */
4993 while ((old_sym = xtensa_find_label (old_frag, old_offset, FALSE)))
4994 {
4995 S_SET_VALUE (old_sym, (valueT) 0);
4996 symbol_set_frag (old_sym, frag_now);
4997 }
4998 }
4999
5000 /* Special count for "entry" instruction. */
5001 if (is_entry_opcode (orig_insn.opcode))
5002 {
5003 /* Check that the second opcode (#1) is >= 16. */
5004 if (orig_insn.ntok >= 2)
5005 {
5006 expressionS *exp = &orig_insn.tok[1];
5007 switch (exp->X_op)
5008 {
5009 case O_constant:
5010 if (exp->X_add_number < 16)
5011 as_warn (_("entry instruction with stack decrement < 16"));
5012 break;
5013
5014 default:
5015 as_warn (_("entry instruction with non-constant decrement"));
5016 }
5017 }
5018 }
5019
5020 if (!orig_insn.is_specific_opcode && is_entry_opcode (orig_insn.opcode))
5021 {
5022 xtensa_mark_literal_pool_location (TRUE);
5023
5024 /* Automatically align ENTRY instructions. */
5025 frag_align (2, 0, 0);
5026 }
5027
5028 if (software_a0_b_retw_interlock)
5029 set_last_insn_flags (now_seg, now_subseg, FLAG_IS_A0_WRITER,
5030 is_register_writer (&orig_insn, "a", 0));
5031
5032 set_last_insn_flags (now_seg, now_subseg, FLAG_IS_BAD_LOOPEND,
5033 is_bad_loopend_opcode (&orig_insn));
5034
5035 /* Finish it off:
5036 assemble_tokens (opcode, tok, ntok);
5037 expand the tokens from the orig_insn into the
5038 stack of instructions that will not expand
5039 unless required at relaxation time. */
5040 if (xg_expand_assembly_insn (&istack, &orig_insn))
5041 return;
5042
5043 for (i = 0; i < istack.ninsn; i++)
5044 {
5045 TInsn *insn = &istack.insn[i];
5046 if (insn->insn_type == ITYPE_LITERAL)
5047 {
5048 assert (lit_sym == NULL);
5049 lit_sym = xg_assemble_literal (insn);
5050 }
5051 else
5052 {
5053 if (lit_sym)
5054 xg_resolve_literals (insn, lit_sym);
5055 xg_assemble_tokens (insn);
5056 }
5057 }
5058
5059 /* Now, if the original opcode was a call... */
5060 if (align_targets && is_call_opcode (orig_insn.opcode))
5061 {
5062 frag_now->tc_frag_data.is_insn = TRUE;
5063 frag_var (rs_machine_dependent, 4, 4,
5064 RELAX_DESIRE_ALIGN,
5065 frag_now->fr_symbol,
5066 frag_now->fr_offset,
5067 NULL);
5068 }
5069}
5070
5071
5072/* TC_CONS_FIX_NEW hook: Check for "@PLT" suffix on symbol references.
5073 If found, use an XTENSA_PLT reloc for 4-byte values. Otherwise, this
5074 is the same as the standard code in read.c. */
5075
5076void
5077xtensa_cons_fix_new (frag, where, size, exp)
5078 fragS *frag;
5079 int where;
5080 int size;
5081 expressionS *exp;
5082{
5083 bfd_reloc_code_real_type r;
5084 bfd_boolean plt = FALSE;
5085
5086 if (*input_line_pointer == '@')
5087 {
5088 if (!strncmp (input_line_pointer, PLT_SUFFIX, strlen (PLT_SUFFIX) - 1)
5089 && !strncmp (input_line_pointer, plt_suffix,
5090 strlen (plt_suffix) - 1))
5091 {
5092 as_bad (_("undefined @ suffix '%s', expected '%s'"),
5093 input_line_pointer, plt_suffix);
5094 ignore_rest_of_line ();
5095 return;
5096 }
5097
5098 input_line_pointer += strlen (plt_suffix);
5099 plt = TRUE;
5100 }
5101
5102 switch (size)
5103 {
5104 case 1:
5105 r = BFD_RELOC_8;
5106 break;
5107 case 2:
5108 r = BFD_RELOC_16;
5109 break;
5110 case 4:
5111 r = plt ? BFD_RELOC_XTENSA_PLT : BFD_RELOC_32;
5112 break;
5113 case 8:
5114 r = BFD_RELOC_64;
5115 break;
5116 default:
5117 as_bad (_("unsupported BFD relocation size %u"), size);
5118 r = BFD_RELOC_32;
5119 break;
5120 }
5121 fix_new_exp (frag, where, size, exp, 0, r);
5122}
5123
5124
5125/* TC_FRAG_INIT hook */
5126
5127void
5128xtensa_frag_init (frag)
5129 fragS *frag;
5130{
5131 frag->tc_frag_data.is_no_density = !code_density_available ();
5132}
5133
5134
5135symbolS *
5136md_undefined_symbol (name)
5137 char *name ATTRIBUTE_UNUSED;
5138{
5139 return NULL;
5140}
5141
5142
5143/* Round up a section size to the appropriate boundary. */
5144
5145valueT
5146md_section_align (segment, size)
5147 segT segment ATTRIBUTE_UNUSED;
5148 valueT size;
5149{
5150 return size; /* Byte alignment is fine. */
5151}
5152
5153
5154long
5155md_pcrel_from (fixP)
5156 fixS *fixP;
5157{
5158 char *insn_p;
5159 static xtensa_insnbuf insnbuf = NULL;
5160 int opnum;
5161 xtensa_operand operand;
5162 xtensa_opcode opcode;
5163 xtensa_isa isa = xtensa_default_isa;
5164 valueT addr = fixP->fx_where + fixP->fx_frag->fr_address;
5165
5166 if (fixP->fx_done)
5167 return addr;
5168
5169 if (fixP->fx_r_type == BFD_RELOC_XTENSA_ASM_EXPAND)
5170 return addr;
5171
5172 if (!insnbuf)
5173 insnbuf = xtensa_insnbuf_alloc (isa);
5174
5175 insn_p = &fixP->fx_frag->fr_literal[fixP->fx_where];
5176 xtensa_insnbuf_from_chars (isa, insnbuf, insn_p);
5177 opcode = xtensa_decode_insn (isa, insnbuf);
5178
5179 opnum = reloc_to_opnum (fixP->fx_r_type);
5180
5181 if (opnum < 0)
5182 as_fatal (_("invalid operand relocation for '%s' instruction"),
5183 xtensa_opcode_name (isa, opcode));
5184 if (opnum >= xtensa_num_operands (isa, opcode))
5185 as_fatal (_("invalid relocation for operand %d in '%s' instruction"),
5186 opnum, xtensa_opcode_name (isa, opcode));
5187 operand = xtensa_get_operand (isa, opcode, opnum);
5188 if (!operand)
5189 {
5190 as_warn_where (fixP->fx_file,
5191 fixP->fx_line,
5192 _("invalid relocation type %d for %s instruction"),
5193 fixP->fx_r_type, xtensa_opcode_name (isa, opcode));
5194 return addr;
5195 }
5196
5197 if (!operand_is_pcrel_label (operand))
5198 {
5199 as_bad_where (fixP->fx_file,
5200 fixP->fx_line,
5201 _("invalid relocation for operand %d of '%s'"),
5202 opnum, xtensa_opcode_name (isa, opcode));
5203 return addr;
5204 }
5205 if (!xtensa_operand_isPCRelative (operand))
5206 {
5207 as_warn_where (fixP->fx_file,
5208 fixP->fx_line,
5209 _("non-PCREL relocation operand %d for '%s': %s"),
5210 opnum, xtensa_opcode_name (isa, opcode),
5211 bfd_get_reloc_code_name (fixP->fx_r_type));
5212 return addr;
5213 }
5214
5215 return 0 - xtensa_operand_do_reloc (operand, 0, addr);
5216}
5217
5218
5219/* tc_symbol_new_hook */
5220
5221void
5222xtensa_symbol_new_hook (symbolP)
5223 symbolS *symbolP;
5224{
5225 symbolP->sy_tc.plt = 0;
5226}
5227
5228
5229/* tc_fix_adjustable hook */
5230
5231bfd_boolean
5232xtensa_fix_adjustable (fixP)
5233 fixS *fixP;
5234{
5235 /* We need the symbol name for the VTABLE entries. */
5236 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
5237 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
5238 return 0;
5239
5240 return 1;
5241}
5242
5243
5244void
5245md_apply_fix3 (fixP, valP, seg)
5246 fixS *fixP;
5247 valueT *valP;
5248 segT seg ATTRIBUTE_UNUSED;
5249{
5250 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
5251 {
5252 /* This happens when the relocation is within the current section.
5253 It seems this implies a PCREL operation. We'll catch it and error
5254 if not. */
5255
5256 char *const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where;
5257 static xtensa_insnbuf insnbuf = NULL;
5258 xtensa_opcode opcode;
5259 xtensa_isa isa;
5260
5261 switch (fixP->fx_r_type)
5262 {
5263 case BFD_RELOC_XTENSA_ASM_EXPAND:
5264 fixP->fx_done = 1;
5265 break;
5266
5267 case BFD_RELOC_XTENSA_ASM_SIMPLIFY:
5268 as_bad (_("unhandled local relocation fix %s"),
5269 bfd_get_reloc_code_name (fixP->fx_r_type));
5270 break;
5271
5272 case BFD_RELOC_32:
5273 case BFD_RELOC_16:
5274 case BFD_RELOC_8:
5275 /* The only one we support that isn't an instruction field. */
5276 md_number_to_chars (fixpos, *valP, fixP->fx_size);
5277 fixP->fx_done = 1;
5278 break;
5279
5280 case BFD_RELOC_XTENSA_OP0:
5281 case BFD_RELOC_XTENSA_OP1:
5282 case BFD_RELOC_XTENSA_OP2:
5283 isa = xtensa_default_isa;
5284 if (!insnbuf)
5285 insnbuf = xtensa_insnbuf_alloc (isa);
5286
5287 xtensa_insnbuf_from_chars (isa, insnbuf, fixpos);
5288 opcode = xtensa_decode_insn (isa, insnbuf);
5289 if (opcode == XTENSA_UNDEFINED)
5290 as_fatal (_("undecodable FIX"));
5291
5292 xtensa_insnbuf_set_immediate_field (opcode, insnbuf, *valP,
5293 fixP->fx_file, fixP->fx_line);
5294
5295 fixP->fx_frag->tc_frag_data.is_insn = TRUE;
5296 xtensa_insnbuf_to_chars (isa, insnbuf, fixpos);
5297 fixP->fx_done = 1;
5298 break;
5299
5300 case BFD_RELOC_VTABLE_INHERIT:
5301 case BFD_RELOC_VTABLE_ENTRY:
5302 fixP->fx_done = 0;
5303 break;
5304
5305 default:
5306 as_bad (_("unhandled local relocation fix %s"),
5307 bfd_get_reloc_code_name (fixP->fx_r_type));
5308 }
5309 }
5310}
5311
5312
5313char *
5314md_atof (type, litP, sizeP)
5315 int type;
5316 char *litP;
5317 int *sizeP;
5318{
5319 int prec;
5320 LITTLENUM_TYPE words[4];
5321 char *t;
5322 int i;
5323
5324 switch (type)
5325 {
5326 case 'f':
5327 prec = 2;
5328 break;
5329
5330 case 'd':
5331 prec = 4;
5332 break;
5333
5334 default:
5335 *sizeP = 0;
5336 return "bad call to md_atof";
5337 }
5338
5339 t = atof_ieee (input_line_pointer, type, words);
5340 if (t)
5341 input_line_pointer = t;
5342
5343 *sizeP = prec * 2;
5344
5345 for (i = prec - 1; i >= 0; i--)
5346 {
5347 int idx = i;
5348 if (target_big_endian)
5349 idx = (prec - 1 - i);
5350
5351 md_number_to_chars (litP, (valueT) words[idx], 2);
5352 litP += 2;
5353 }
5354
5355 return NULL;
5356}
5357
5358
5359int
5360md_estimate_size_before_relax (fragP, seg)
5361 fragS *fragP;
5362 segT seg ATTRIBUTE_UNUSED;
5363{
5364 return fragP->tc_frag_data.text_expansion;
5365}
5366
5367
5368/* Translate internal representation of relocation info to BFD target
5369 format. */
5370
5371arelent *
5372tc_gen_reloc (section, fixp)
5373 asection *section ATTRIBUTE_UNUSED;
5374 fixS *fixp;
5375{
5376 arelent *reloc;
5377
5378 reloc = (arelent *) xmalloc (sizeof (arelent));
5379 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
5380 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
5381 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
5382
5383 /* Make sure none of our internal relocations make it this far.
5384 They'd better have been fully resolved by this point. */
5385 assert ((int) fixp->fx_r_type > 0);
5386
5387 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
5388 if (reloc->howto == NULL)
5389 {
5390 as_bad_where (fixp->fx_file, fixp->fx_line,
5391 _("cannot represent `%s' relocation in object file"),
5392 bfd_get_reloc_code_name (fixp->fx_r_type));
5393 return NULL;
5394 }
5395
5396 if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
5397 {
5398 as_fatal (_("internal error? cannot generate `%s' relocation"),
5399 bfd_get_reloc_code_name (fixp->fx_r_type));
5400 }
5401 assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
5402
5403 reloc->addend = fixp->fx_offset;
5404
5405 switch (fixp->fx_r_type)
5406 {
5407 case BFD_RELOC_XTENSA_OP0:
5408 case BFD_RELOC_XTENSA_OP1:
5409 case BFD_RELOC_XTENSA_OP2:
5410 case BFD_RELOC_XTENSA_ASM_EXPAND:
5411 case BFD_RELOC_32:
5412 case BFD_RELOC_XTENSA_PLT:
5413 case BFD_RELOC_VTABLE_INHERIT:
5414 case BFD_RELOC_VTABLE_ENTRY:
5415 break;
5416
5417 case BFD_RELOC_XTENSA_ASM_SIMPLIFY:
5418 as_warn (_("emitting simplification relocation"));
5419 break;
5420
5421 default:
5422 as_warn (_("emitting unknown relocation"));
5423 }
5424
5425 return reloc;
5426}
5427
5428\f
5429void
5430xtensa_end ()
5431{
5432 directive_balance ();
5433 xtensa_move_literals ();
5434
5435 xtensa_reorder_segments ();
5436 xtensa_mark_target_fragments ();
5437 xtensa_cleanup_align_frags ();
5438 xtensa_fix_target_frags ();
5439 if (software_a0_b_retw_interlock && has_a0_b_retw)
5440 xtensa_fix_a0_b_retw_frags ();
5441 if (software_avoid_b_j_loop_end && maybe_has_b_j_loop_end)
5442 xtensa_fix_b_j_loop_end_frags ();
5443
5444 /* "close_loop_end" should be processed BEFORE "short_loop". */
5445 if (software_avoid_close_loop_end && maybe_has_close_loop_end)
5446 xtensa_fix_close_loop_end_frags ();
5447
5448 if (software_avoid_short_loop && maybe_has_short_loop)
5449 xtensa_fix_short_loop_frags ();
5450
5451 xtensa_sanity_check ();
5452}
5453
5454
5455static void
5456xtensa_cleanup_align_frags ()
5457{
5458 frchainS *frchP;
5459
5460 for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
5461 {
5462 fragS *fragP;
5463
5464 /* Walk over all of the fragments in a subsection. */
5465 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
5466 {
5467 if ((fragP->fr_type == rs_align
5468 || fragP->fr_type == rs_align_code
5469 || (fragP->fr_type == rs_machine_dependent
5470 && (fragP->fr_subtype == RELAX_DESIRE_ALIGN
5471 || fragP->fr_subtype == RELAX_DESIRE_ALIGN_IF_TARGET)))
5472 && fragP->fr_fix == 0)
5473 {
5474 fragS * next = fragP->fr_next;
5475
5476 while (next
5477 && next->fr_type == rs_machine_dependent
5478 && next->fr_subtype == RELAX_DESIRE_ALIGN_IF_TARGET)
5479 {
5480 frag_wane (next);
5481 next = next->fr_next;
5482 }
5483 }
5484 }
5485 }
5486}
5487
5488
5489/* Re-process all of the fragments looking to convert all of the
5490 RELAX_DESIRE_ALIGN_IF_TARGET fragments. If there is a branch
5491 target in the next fragment, convert this to RELAX_DESIRE_ALIGN.
5492 If the next fragment starts with a loop target, AND the previous
5493 fragment can be expanded to negate the branch, convert this to a
5494 RELAX_LOOP_END. Otherwise, convert to a .fill 0. */
5495
5496static void
5497xtensa_fix_target_frags ()
5498{
5499 frchainS *frchP;
5500
5501 /* When this routine is called, all of the subsections are still intact
5502 so we walk over subsections instead of sections. */
5503 for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
5504 {
5505 bfd_boolean prev_frag_can_negate_branch = FALSE;
5506 fragS *fragP;
5507
5508 /* Walk over all of the fragments in a subsection. */
5509 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
5510 {
5511 if (fragP->fr_type == rs_machine_dependent
5512 && fragP->fr_subtype == RELAX_DESIRE_ALIGN_IF_TARGET)
5513 {
5514 if (next_frag_is_loop_target (fragP))
5515 {
5516 if (prev_frag_can_negate_branch)
5517 fragP->fr_subtype = RELAX_LOOP_END;
5518 else
5519 {
5520 if (!align_only_targets ||
5521 next_frag_is_branch_target (fragP))
5522 fragP->fr_subtype = RELAX_DESIRE_ALIGN;
5523 else
5524 frag_wane (fragP);
5525 }
5526 }
5527 else if (!align_only_targets
5528 || next_frag_is_branch_target (fragP))
5529 fragP->fr_subtype = RELAX_DESIRE_ALIGN;
5530 else
5531 frag_wane (fragP);
5532 }
5533 if (fragP->fr_fix != 0)
5534 prev_frag_can_negate_branch = FALSE;
5535 if (frag_can_negate_branch (fragP))
5536 prev_frag_can_negate_branch = TRUE;
5537 }
5538 }
5539}
5540
5541
5542static bfd_boolean
5543frag_can_negate_branch (fragP)
5544 fragS *fragP;
5545{
5546 if (fragP->fr_type == rs_machine_dependent
5547 && fragP->fr_subtype == RELAX_IMMED)
5548 {
5549 TInsn t_insn;
5550 tinsn_from_chars (&t_insn, fragP->fr_opcode);
5551 if (is_negatable_branch (&t_insn))
5552 return TRUE;
5553 }
5554 return FALSE;
5555}
5556
5557
5558/* Re-process all of the fragments looking to convert all of the
5559 RELAX_ADD_NOP_IF_A0_B_RETW. If the next instruction is a
5560 conditional branch or a retw/retw.n, convert this frag to one that
5561 will generate a NOP. In any case close it off with a .fill 0. */
5562
5563static void
5564xtensa_fix_a0_b_retw_frags ()
5565{
5566 frchainS *frchP;
5567
5568 /* When this routine is called, all of the subsections are still intact
5569 so we walk over subsections instead of sections. */
5570 for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
5571 {
5572 fragS *fragP;
5573
5574 /* Walk over all of the fragments in a subsection. */
5575 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
5576 {
5577 if (fragP->fr_type == rs_machine_dependent
5578 && fragP->fr_subtype == RELAX_ADD_NOP_IF_A0_B_RETW)
5579 {
5580 if (next_instrs_are_b_retw (fragP))
5581 relax_frag_add_nop (fragP);
5582 else
5583 frag_wane (fragP);
5584 }
5585 }
5586 }
5587}
5588
5589
5590bfd_boolean
5591next_instrs_are_b_retw (fragP)
5592 fragS * fragP;
5593{
5594 xtensa_opcode opcode;
5595 const fragS *next_fragP = next_non_empty_frag (fragP);
5596 static xtensa_insnbuf insnbuf = NULL;
5597 xtensa_isa isa = xtensa_default_isa;
5598 int offset = 0;
5599
5600 if (!insnbuf)
5601 insnbuf = xtensa_insnbuf_alloc (isa);
5602
5603 if (next_fragP == NULL)
5604 return FALSE;
5605
5606 /* Check for the conditional branch. */
5607 xtensa_insnbuf_from_chars (isa, insnbuf, &next_fragP->fr_literal[offset]);
5608 opcode = xtensa_decode_insn (isa, insnbuf);
5609
5610 if (!is_conditional_branch_opcode (opcode))
5611 return FALSE;
5612
5613 offset += xtensa_insn_length (isa, opcode);
5614 if (offset == next_fragP->fr_fix)
5615 {
5616 next_fragP = next_non_empty_frag (next_fragP);
5617 offset = 0;
5618 }
5619 if (next_fragP == NULL)
5620 return FALSE;
5621
5622 /* Check for the retw/retw.n. */
5623 xtensa_insnbuf_from_chars (isa, insnbuf, &next_fragP->fr_literal[offset]);
5624 opcode = xtensa_decode_insn (isa, insnbuf);
5625
5626 if (is_windowed_return_opcode (opcode))
5627 return TRUE;
5628 return FALSE;
5629}
5630
5631
5632/* Re-process all of the fragments looking to convert all of the
5633 RELAX_ADD_NOP_IF_PRE_LOOP_END. If there is one instruction and a
5634 loop end label, convert this frag to one that will generate a NOP.
5635 In any case close it off with a .fill 0. */
5636
5637static void
5638xtensa_fix_b_j_loop_end_frags ()
5639{
5640 frchainS *frchP;
5641
5642 /* When this routine is called, all of the subsections are still intact
5643 so we walk over subsections instead of sections. */
5644 for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
5645 {
5646 fragS *fragP;
5647
5648 /* Walk over all of the fragments in a subsection. */
5649 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
5650 {
5651 if (fragP->fr_type == rs_machine_dependent
5652 && fragP->fr_subtype == RELAX_ADD_NOP_IF_PRE_LOOP_END)
5653 {
5654 if (next_instr_is_loop_end (fragP))
5655 relax_frag_add_nop (fragP);
5656 else
5657 frag_wane (fragP);
5658 }
5659 }
5660 }
5661}
5662
5663
5664bfd_boolean
5665next_instr_is_loop_end (fragP)
5666 fragS * fragP;
5667{
5668 const fragS *next_fragP;
5669
5670 if (next_frag_is_loop_target (fragP))
5671 return FALSE;
5672
5673 next_fragP = next_non_empty_frag (fragP);
5674 if (next_fragP == NULL)
5675 return FALSE;
5676
5677 if (!next_frag_is_loop_target (next_fragP))
5678 return FALSE;
5679
5680 /* If the size is >= 3 then there is more than one instruction here.
5681 The hardware bug will not fire. */
5682 if (next_fragP->fr_fix > 3)
5683 return FALSE;
5684
5685 return TRUE;
5686}
5687
5688
5689/* Re-process all of the fragments looking to convert all of the
5690 RELAX_ADD_NOP_IF_CLOSE_LOOP_END. If there is an loop end that is
5691 not MY loop's loop end within 12 bytes, add enough nops here to
5692 make it at least 12 bytes away. In any case close it off with a
5693 .fill 0. */
5694
5695static void
5696xtensa_fix_close_loop_end_frags ()
5697{
5698 frchainS *frchP;
5699
5700 /* When this routine is called, all of the subsections are still intact
5701 so we walk over subsections instead of sections. */
5702 for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
5703 {
5704 fragS *fragP;
5705
5706 fragS *current_target = NULL;
5707 offsetT current_offset = 0;
5708
5709 /* Walk over all of the fragments in a subsection. */
5710 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
5711 {
5712 if (fragP->fr_type == rs_machine_dependent
5713 && fragP->fr_subtype == RELAX_IMMED)
5714 {
5715 /* Read it. If the instruction is a loop, get the target. */
5716 xtensa_opcode opcode = get_opcode_from_buf (fragP->fr_opcode);
5717 if (is_loop_opcode (opcode))
5718 {
5719 TInsn t_insn;
5720
5721 tinsn_from_chars (&t_insn, fragP->fr_opcode);
5722 tinsn_immed_from_frag (&t_insn, fragP);
5723
5724 /* Get the current fragment target. */
5725 if (fragP->fr_symbol)
5726 {
5727 current_target = symbol_get_frag (fragP->fr_symbol);
5728 current_offset = fragP->fr_offset;
5729 }
5730 }
5731 }
5732
5733 if (current_target
5734 && fragP->fr_type == rs_machine_dependent
5735 && fragP->fr_subtype == RELAX_ADD_NOP_IF_CLOSE_LOOP_END)
5736 {
5737 size_t min_bytes;
5738 size_t bytes_added = 0;
5739
5740#define REQUIRED_LOOP_DIVIDING_BYTES 12
5741 /* Max out at 12. */
5742 min_bytes = min_bytes_to_other_loop_end
5743 (fragP->fr_next, current_target, current_offset,
5744 REQUIRED_LOOP_DIVIDING_BYTES);
5745
5746 if (min_bytes < REQUIRED_LOOP_DIVIDING_BYTES)
5747 {
5748 while (min_bytes + bytes_added
5749 < REQUIRED_LOOP_DIVIDING_BYTES)
5750 {
5751 int length = 3;
5752
5753 if (fragP->fr_var < length)
5754 as_warn (_("fr_var %lu < length %d; ignoring"),
5755 fragP->fr_var, length);
5756 else
5757 {
5758 assemble_nop (length,
5759 fragP->fr_literal + fragP->fr_fix);
5760 fragP->fr_fix += length;
5761 fragP->fr_var -= length;
5762 }
5763 bytes_added += length;
5764 }
5765 }
5766 frag_wane (fragP);
5767 }
5768 }
5769 }
5770}
5771
5772
5773size_t
5774min_bytes_to_other_loop_end (fragP, current_target, current_offset, max_size)
5775 fragS *fragP;
5776 fragS *current_target;
5777 offsetT current_offset;
5778 size_t max_size;
5779{
5780 size_t offset = 0;
5781 fragS *current_fragP;
5782
5783 for (current_fragP = fragP;
5784 current_fragP;
5785 current_fragP = current_fragP->fr_next)
5786 {
5787 if (current_fragP->tc_frag_data.is_loop_target
5788 && current_fragP != current_target)
5789 return offset + current_offset;
5790
5791 offset += unrelaxed_frag_min_size (current_fragP);
5792
5793 if (offset + current_offset >= max_size)
5794 return max_size;
5795 }
5796 return max_size;
5797}
5798
5799
5800size_t
5801unrelaxed_frag_min_size (fragP)
5802 fragS * fragP;
5803{
5804 size_t size = fragP->fr_fix;
5805
5806 /* add fill size */
5807 if (fragP->fr_type == rs_fill)
5808 size += fragP->fr_offset;
5809
5810 return size;
5811}
5812
5813
5814/* Re-process all of the fragments looking to convert all
5815 of the RELAX_ADD_NOP_IF_SHORT_LOOP. If:
5816
5817 A)
5818 1) the instruction size count to the loop end label
5819 is too short (<= 2 instructions),
5820 2) loop has a jump or branch in it
5821
5822 or B)
5823 1) software_avoid_all_short_loops is true
5824 2) The generating loop was a 'loopgtz' or 'loopnez'
5825 3) the instruction size count to the loop end label is too short
5826 (<= 2 instructions)
5827 then convert this frag (and maybe the next one) to generate a NOP.
5828 In any case close it off with a .fill 0. */
5829
5830static void
5831xtensa_fix_short_loop_frags ()
5832{
5833 frchainS *frchP;
5834
5835 /* When this routine is called, all of the subsections are still intact
5836 so we walk over subsections instead of sections. */
5837 for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
5838 {
5839 fragS *fragP;
5840 fragS *current_target = NULL;
5841 offsetT current_offset = 0;
5842 xtensa_opcode current_opcode = XTENSA_UNDEFINED;
5843
5844 /* Walk over all of the fragments in a subsection. */
5845 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
5846 {
5847 /* check on the current loop */
5848 if (fragP->fr_type == rs_machine_dependent
5849 && fragP->fr_subtype == RELAX_IMMED)
5850 {
5851 /* Read it. If the instruction is a loop, get the target. */
5852 xtensa_opcode opcode = get_opcode_from_buf (fragP->fr_opcode);
5853 if (is_loop_opcode (opcode))
5854 {
5855 TInsn t_insn;
5856
5857 tinsn_from_chars (&t_insn, fragP->fr_opcode);
5858 tinsn_immed_from_frag (&t_insn, fragP);
5859
5860 /* Get the current fragment target. */
5861 if (fragP->fr_symbol)
5862 {
5863 current_target = symbol_get_frag (fragP->fr_symbol);
5864 current_offset = fragP->fr_offset;
5865 current_opcode = opcode;
5866 }
5867 }
5868 }
5869
5870 if (fragP->fr_type == rs_machine_dependent
5871 && fragP->fr_subtype == RELAX_ADD_NOP_IF_SHORT_LOOP)
5872 {
5873 size_t insn_count =
5874 count_insns_to_loop_end (fragP->fr_next, TRUE, 3);
5875 if (insn_count < 3
5876 && (branch_before_loop_end (fragP->fr_next)
5877 || (software_avoid_all_short_loops
5878 && current_opcode != XTENSA_UNDEFINED
5879 && !is_the_loop_opcode (current_opcode))))
5880 relax_frag_add_nop (fragP);
5881 else
5882 frag_wane (fragP);
5883 }
5884 }
5885 }
5886}
5887
5888
5889size_t
5890count_insns_to_loop_end (base_fragP, count_relax_add, max_count)
5891 fragS *base_fragP;
5892 bfd_boolean count_relax_add;
5893 size_t max_count;
5894{
5895 fragS *fragP = NULL;
5896 size_t insn_count = 0;
5897
5898 fragP = base_fragP;
5899
5900 for (; fragP && !fragP->tc_frag_data.is_loop_target; fragP = fragP->fr_next)
5901 {
5902 insn_count += unrelaxed_frag_min_insn_count (fragP);
5903 if (insn_count >= max_count)
5904 return max_count;
5905
5906 if (count_relax_add)
5907 {
5908 if (fragP->fr_type == rs_machine_dependent
5909 && fragP->fr_subtype == RELAX_ADD_NOP_IF_SHORT_LOOP)
5910 {
5911 /* In order to add the appropriate number of
5912 NOPs, we count an instruction for downstream
5913 occurrences. */
5914 insn_count++;
5915 if (insn_count >= max_count)
5916 return max_count;
5917 }
5918 }
5919 }
5920 return insn_count;
5921}
5922
5923
5924size_t
5925unrelaxed_frag_min_insn_count (fragP)
5926 fragS *fragP;
5927{
5928 size_t insn_count = 0;
5929 int offset = 0;
5930
5931 if (!fragP->tc_frag_data.is_insn)
5932 return insn_count;
5933
5934 /* Decode the fixed instructions. */
5935 while (offset < fragP->fr_fix)
5936 {
5937 xtensa_opcode opcode = get_opcode_from_buf (fragP->fr_literal + offset);
5938 if (opcode == XTENSA_UNDEFINED)
5939 {
5940 as_fatal (_("undecodable instruction in instruction frag"));
5941 return insn_count;
5942 }
5943 offset += xtensa_insn_length (xtensa_default_isa, opcode);
5944 insn_count++;
5945 }
5946
5947 return insn_count;
5948}
5949
5950
5951bfd_boolean
5952branch_before_loop_end (base_fragP)
5953 fragS *base_fragP;
5954{
5955 fragS *fragP;
5956
5957 for (fragP = base_fragP;
5958 fragP && !fragP->tc_frag_data.is_loop_target;
5959 fragP = fragP->fr_next)
5960 {
5961 if (unrelaxed_frag_has_b_j (fragP))
5962 return TRUE;
5963 }
5964 return FALSE;
5965}
5966
5967
5968bfd_boolean
5969unrelaxed_frag_has_b_j (fragP)
5970 fragS *fragP;
5971{
5972 size_t insn_count = 0;
5973 int offset = 0;
5974
5975 if (!fragP->tc_frag_data.is_insn)
5976 return FALSE;
5977
5978 /* Decode the fixed instructions. */
5979 while (offset < fragP->fr_fix)
5980 {
5981 xtensa_opcode opcode = get_opcode_from_buf (fragP->fr_literal + offset);
5982 if (opcode == XTENSA_UNDEFINED)
5983 {
5984 as_fatal (_("undecodable instruction in instruction frag"));
5985 return insn_count;
5986 }
5987 if (is_branch_or_jump_opcode (opcode))
5988 return TRUE;
5989 offset += xtensa_insn_length (xtensa_default_isa, opcode);
5990 }
5991 return FALSE;
5992}
5993
5994
5995/* Checks to be made after initial assembly but before relaxation. */
5996
5997static void
5998xtensa_sanity_check ()
5999{
6000 char *file_name;
6001 int line;
6002
6003 frchainS *frchP;
6004
6005 as_where (&file_name, &line);
6006 for (frchP = frchain_root; frchP; frchP = frchP->frch_next)
6007 {
6008 fragS *fragP;
6009
6010 /* Walk over all of the fragments in a subsection. */
6011 for (fragP = frchP->frch_root; fragP; fragP = fragP->fr_next)
6012 {
6013 /* Currently we only check for empty loops here. */
6014 if (fragP->fr_type == rs_machine_dependent
6015 && fragP->fr_subtype == RELAX_IMMED)
6016 {
6017 static xtensa_insnbuf insnbuf = NULL;
6018 TInsn t_insn;
6019
6020 if (fragP->fr_opcode != NULL)
6021 {
6022 if (!insnbuf)
6023 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
6024 tinsn_from_chars (&t_insn, fragP->fr_opcode);
6025 tinsn_immed_from_frag (&t_insn, fragP);
6026
6027 if (is_loop_opcode (t_insn.opcode))
6028 {
6029 if (is_empty_loop (&t_insn, fragP))
6030 {
6031 new_logical_line (fragP->fr_file, fragP->fr_line);
6032 as_bad (_("invalid empty loop"));
6033 }
6034 if (!is_local_forward_loop (&t_insn, fragP))
6035 {
6036 new_logical_line (fragP->fr_file, fragP->fr_line);
6037 as_bad (_("loop target does not follow "
6038 "loop instruction in section"));
6039 }
6040 }
6041 }
6042 }
6043 }
6044 }
6045 new_logical_line (file_name, line);
6046}
6047
6048
6049#define LOOP_IMMED_OPN 1
6050
6051/* Return true if the loop target is the next non-zero fragment. */
6052
6053bfd_boolean
6054is_empty_loop (insn, fragP)
6055 const TInsn *insn;
6056 fragS *fragP;
6057{
6058 const expressionS *expr;
6059 symbolS *symbolP;
6060 fragS *next_fragP;
6061
6062 if (insn->insn_type != ITYPE_INSN)
6063 return FALSE;
6064
6065 if (!is_loop_opcode (insn->opcode))
6066 return FALSE;
6067
6068 if (insn->ntok <= LOOP_IMMED_OPN)
6069 return FALSE;
6070
6071 expr = &insn->tok[LOOP_IMMED_OPN];
6072
6073 if (expr->X_op != O_symbol)
6074 return FALSE;
6075
6076 symbolP = expr->X_add_symbol;
6077 if (!symbolP)
6078 return FALSE;
6079
6080 if (symbol_get_frag (symbolP) == NULL)
6081 return FALSE;
6082
6083 if (S_GET_VALUE (symbolP) != 0)
6084 return FALSE;
6085
6086 /* Walk through the zero-size fragments from this one. If we find
6087 the target fragment, then this is a zero-size loop. */
6088 for (next_fragP = fragP->fr_next;
6089 next_fragP != NULL;
6090 next_fragP = next_fragP->fr_next)
6091 {
6092 if (next_fragP == symbol_get_frag (symbolP))
6093 return TRUE;
6094 if (next_fragP->fr_fix != 0)
6095 return FALSE;
6096 }
6097 return FALSE;
6098}
6099
6100
6101bfd_boolean
6102is_local_forward_loop (insn, fragP)
6103 const TInsn *insn;
6104 fragS *fragP;
6105{
6106 const expressionS *expr;
6107 symbolS *symbolP;
6108 fragS *next_fragP;
6109
6110 if (insn->insn_type != ITYPE_INSN)
6111 return FALSE;
6112
6113 if (!is_loop_opcode (insn->opcode))
6114 return FALSE;
6115
6116 if (insn->ntok <= LOOP_IMMED_OPN)
6117 return FALSE;
6118
6119 expr = &insn->tok[LOOP_IMMED_OPN];
6120
6121 if (expr->X_op != O_symbol)
6122 return FALSE;
6123
6124 symbolP = expr->X_add_symbol;
6125 if (!symbolP)
6126 return FALSE;
6127
6128 if (symbol_get_frag (symbolP) == NULL)
6129 return FALSE;
6130
6131 /* Walk through fragments until we find the target.
6132 If we do not find the target, then this is an invalid loop. */
6133 for (next_fragP = fragP->fr_next;
6134 next_fragP != NULL;
6135 next_fragP = next_fragP->fr_next)
6136 if (next_fragP == symbol_get_frag (symbolP))
6137 return TRUE;
6138
6139 return FALSE;
6140}
6141
6142\f
6143/* Alignment Functions. */
6144
6145size_t
6146get_text_align_power (target_size)
6147 int target_size;
6148{
6149 size_t i = 0;
6150 for (i = 0; i < sizeof (size_t); i++)
6151 {
6152 if (target_size <= (1 << i))
6153 return i;
6154 }
6155 as_fatal (_("get_text_align_power: argument too large"));
6156 return 0;
6157}
6158
6159
6160addressT
6161get_text_align_max_fill_size (align_pow, use_nops, use_no_density)
6162 int align_pow;
6163 bfd_boolean use_nops;
6164 bfd_boolean use_no_density;
6165{
6166 if (!use_nops)
6167 return (1 << align_pow);
6168 if (use_no_density)
6169 return 3 * (1 << align_pow);
6170
6171 return 1 + (1 << align_pow);
6172}
6173
6174
6175/* get_text_align_fill_size ()
6176
6177 Desired alignments:
6178 give the address
6179 target_size = size of next instruction
6180 align_pow = get_text_align_power (target_size).
6181 use_nops = 0
6182 use_no_density = 0;
6183 Loop alignments:
6184 address = current address + loop instruction size;
6185 target_size = 3 (for 2 or 3 byte target)
6186 = 8 (for 8 byte target)
6187 align_pow = get_text_align_power (target_size);
6188 use_nops = 1
6189 use_no_density = set appropriately
6190 Text alignments:
6191 address = current address + loop instruction size;
6192 target_size = 0
6193 align_pow = get_text_align_power (target_size);
6194 use_nops = 0
6195 use_no_density = 0. */
6196
6197addressT
6198get_text_align_fill_size (address, align_pow, target_size,
6199 use_nops, use_no_density)
6200 addressT address;
6201 int align_pow;
6202 int target_size;
6203 bfd_boolean use_nops;
6204 bfd_boolean use_no_density;
6205{
6206 /* Input arguments:
6207
6208 align_pow: log2 (required alignment).
6209
6210 target_size: alignment must allow the new_address and
6211 new_address+target_size-1.
6212
6213 use_nops: if true, then we can only use 2 or 3 byte nops.
6214
6215 use_no_density: if use_nops and use_no_density, we can only use
6216 3-byte nops.
6217
6218 Usually, for non-zero target_size, the align_pow is the power of 2
6219 that is greater than or equal to the target_size. This handles the
6220 2-byte, 3-byte and 8-byte instructions. */
6221
6222 size_t alignment = (1 << align_pow);
6223 if (!use_nops)
6224 {
6225 /* This is the easy case. */
6226 size_t mod;
6227 mod = address % alignment;
6228 if (mod != 0)
6229 mod = alignment - mod;
6230 assert ((address + mod) % alignment == 0);
6231 return mod;
6232 }
6233
6234 /* This is the slightly harder case. */
6235 assert ((int) alignment >= target_size);
6236 assert (target_size > 0);
6237 if (!use_no_density)
6238 {
6239 size_t i;
6240 for (i = 0; i < alignment * 2; i++)
6241 {
6242 if (i == 1)
6243 continue;
6244 if ((address + i) >> align_pow ==
6245 (address + i + target_size - 1) >> align_pow)
6246 return i;
6247 }
6248 }
6249 else
6250 {
6251 size_t i;
6252
6253 /* Can only fill multiples of 3. */
6254 for (i = 0; i <= alignment * 3; i += 3)
6255 {
6256 if ((address + i) >> align_pow ==
6257 (address + i + target_size - 1) >> align_pow)
6258 return i;
6259 }
6260 }
6261 assert (0);
6262 return 0;
6263}
6264
6265
6266/* This will assert if it is not possible. */
6267
6268size_t
6269get_text_align_nop_count (fill_size, use_no_density)
6270 size_t fill_size;
6271 bfd_boolean use_no_density;
6272{
6273 size_t count = 0;
6274 if (use_no_density)
6275 {
6276 assert (fill_size % 3 == 0);
6277 return (fill_size / 3);
6278 }
6279
6280 assert (fill_size != 1); /* Bad argument. */
6281
6282 while (fill_size > 1)
6283 {
6284 size_t insn_size = 3;
6285 if (fill_size == 2 || fill_size == 4)
6286 insn_size = 2;
6287 fill_size -= insn_size;
6288 count++;
6289 }
6290 assert (fill_size != 1); /* Bad algorithm. */
6291 return count;
6292}
6293
6294
6295size_t
6296get_text_align_nth_nop_size (fill_size, n, use_no_density)
6297 size_t fill_size;
6298 size_t n;
6299 bfd_boolean use_no_density;
6300{
6301 size_t count = 0;
6302
6303 assert (get_text_align_nop_count (fill_size, use_no_density) > n);
6304
6305 if (use_no_density)
6306 return 3;
6307
6308 while (fill_size > 1)
6309 {
6310 size_t insn_size = 3;
6311 if (fill_size == 2 || fill_size == 4)
6312 insn_size = 2;
6313 fill_size -= insn_size;
6314 count++;
6315 if (n + 1 == count)
6316 return insn_size;
6317 }
6318 assert (0);
6319 return 0;
6320}
6321
6322
6323/* For the given fragment, find the appropriate address
6324 for it to begin at if we are using NOPs to align it. */
6325
6326static addressT
6327get_noop_aligned_address (fragP, address)
6328 fragS *fragP;
6329 addressT address;
6330{
6331 static xtensa_insnbuf insnbuf = NULL;
6332 size_t fill_size = 0;
6333
6334 if (!insnbuf)
6335 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
6336
6337 switch (fragP->fr_type)
6338 {
6339 case rs_machine_dependent:
6340 if (fragP->fr_subtype == RELAX_ALIGN_NEXT_OPCODE)
6341 {
6342 /* The rule is: get next fragment's FIRST instruction. Find
6343 the smallest number of bytes that need to be added to
6344 ensure that the next fragment's FIRST instruction will fit
6345 in a single word.
6346
6347 E.G., 2 bytes : 0, 1, 2 mod 4
6348 3 bytes: 0, 1 mod 4
6349
6350 If the FIRST instruction MIGHT be relaxed,
6351 assume that it will become a 3 byte instruction. */
6352
6353 int target_insn_size;
6354 xtensa_opcode opcode = next_frag_opcode (fragP);
6355 addressT pre_opcode_bytes;
6356
6357 if (opcode == XTENSA_UNDEFINED)
6358 {
6359 as_bad_where (fragP->fr_file, fragP->fr_line,
6360 _("invalid opcode for RELAX_ALIGN_NEXT_OPCODE"));
6361 as_fatal (_("cannot continue"));
6362 }
6363
6364 target_insn_size = xtensa_insn_length (xtensa_default_isa, opcode);
6365
6366 pre_opcode_bytes = next_frag_pre_opcode_bytes (fragP);
6367
6368 if (is_loop_opcode (opcode))
6369 {
6370 /* next_fragP should be the loop. */
6371 const fragS *next_fragP = next_non_empty_frag (fragP);
6372 xtensa_opcode next_opcode = next_frag_opcode (next_fragP);
6373 size_t alignment;
6374
6375 pre_opcode_bytes += target_insn_size;
6376
6377 /* For loops, the alignment depends on the size of the
6378 instruction following the loop, not the loop instruction. */
6379 if (next_opcode == XTENSA_UNDEFINED)
6380 target_insn_size = 3;
6381 else
6382 {
6383 target_insn_size =
6384 xtensa_insn_length (xtensa_default_isa, next_opcode);
6385
6386 if (target_insn_size == 2)
6387 target_insn_size = 3; /* ISA specifies this. */
6388 }
6389
6390 /* If it was 8, then we'll need a larger alignment
6391 for the section. */
6392 alignment = get_text_align_power (target_insn_size);
6393
6394 /* Is Now_seg valid */
6395 record_alignment (now_seg, alignment);
6396 }
6397 else
6398 as_fatal (_("expected loop opcode in relax align next target"));
6399
6400 fill_size = get_text_align_fill_size
6401 (address + pre_opcode_bytes,
6402 get_text_align_power (target_insn_size),
6403 target_insn_size, TRUE, fragP->tc_frag_data.is_no_density);
6404 }
6405 break;
6406#if 0
6407 case rs_align:
6408 case rs_align_code:
6409 fill_size = get_text_align_fill_size
6410 (address, fragP->fr_offset, 1, TRUE,
6411 fragP->tc_frag_data.is_no_density);
6412 break;
6413#endif
6414 default:
6415 as_fatal (_("expected align_code or RELAX_ALIGN_NEXT_OPCODE"));
6416 }
6417
6418 return address + fill_size;
6419}
6420
6421
6422/* 3 mechanisms for relaxing an alignment:
6423
6424 Align to a power of 2.
6425 Align so the next fragment's instruction does not cross a word boundary.
6426 Align the current instruction so that if the next instruction
6427 were 3 bytes, it would not cross a word boundary.
6428
6429 We can align with:
6430
6431 zeros - This is easy; always insert zeros.
6432 nops - 3 and 2 byte instructions
6433 2 - 2 byte nop
6434 3 - 3 byte nop
6435 4 - 2, 2-byte nops
6436 >=5 : 3 byte instruction + fn(n-3)
6437 widening - widen previous instructions. */
6438
6439static addressT
6440get_widen_aligned_address (fragP, address)
6441 fragS *fragP;
6442 addressT address;
6443{
6444 addressT align_pow, new_address, loop_insn_offset;
6445 fragS *next_frag;
6446 int insn_size;
6447 xtensa_opcode opcode, next_opcode;
6448 static xtensa_insnbuf insnbuf = NULL;
6449
6450 if (!insnbuf)
6451 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
6452
6453 if (fragP->fr_type == rs_align || fragP->fr_type == rs_align_code)
6454 {
6455 align_pow = fragP->fr_offset;
6456 new_address = ((address + ((1 << align_pow) - 1))
6457 << align_pow) >> align_pow;
6458 return new_address;
6459 }
6460
6461 if (fragP->fr_type == rs_machine_dependent)
6462 {
6463 switch (fragP->fr_subtype)
6464 {
6465 case RELAX_DESIRE_ALIGN:
6466
6467 /* The rule is: get the next fragment's FIRST instruction.
6468 Find the smallest number of bytes needed to be added
6469 in order to ensure that the next fragment is FIRST
6470 instruction will fit in a single word.
6471 i.e. 2 bytes : 0, 1, 2. mod 4
6472 3 bytes: 0, 1 mod 4
6473 If the FIRST instruction MIGHT be relaxed,
6474 assume that it will become a 3-byte instruction. */
6475
6476 insn_size = 3;
6477 /* Check to see if it might be 2 bytes. */
6478 next_opcode = next_frag_opcode (fragP);
6479 if (next_opcode != XTENSA_UNDEFINED
6480 && xtensa_insn_length (xtensa_default_isa, next_opcode) == 2)
6481 insn_size = 2;
6482
6483 assert (insn_size <= 4);
6484 for (new_address = address; new_address < address + 4; new_address++)
6485 {
6486 if (new_address >> 2 == (new_address + insn_size - 1) >> 2)
6487 return new_address;
6488 }
6489 as_bad (_("internal error aligning"));
6490 return address;
6491
6492 case RELAX_ALIGN_NEXT_OPCODE:
6493 /* The rule is: get next fragment's FIRST instruction.
6494 Find the smallest number of bytes needed to be added
6495 in order to ensure that the next fragment's FIRST
6496 instruction will fit in a single word.
6497 i.e. 2 bytes : 0, 1, 2. mod 4
6498 3 bytes: 0, 1 mod 4
6499 If the FIRST instruction MIGHT be relaxed,
6500 assume that it will become a 3 byte instruction. */
6501
6502 opcode = next_frag_opcode (fragP);
6503 if (opcode == XTENSA_UNDEFINED)
6504 {
6505 as_bad_where (fragP->fr_file, fragP->fr_line,
6506 _("invalid opcode for RELAX_ALIGN_NEXT_OPCODE"));
6507 as_fatal (_("cannot continue"));
6508 }
6509 insn_size = xtensa_insn_length (xtensa_default_isa, opcode);
6510 assert (insn_size <= 4);
6511 assert (is_loop_opcode (opcode));
6512
6513 loop_insn_offset = 0;
6514 next_frag = next_non_empty_frag (fragP);
6515
6516 /* If the loop has been expanded then the loop
6517 instruction could be at an offset from this fragment. */
6518 if (next_frag->fr_subtype != RELAX_IMMED)
6519 loop_insn_offset = get_expanded_loop_offset (opcode);
6520
6521 for (new_address = address; new_address < address + 4; new_address++)
6522 {
6523 if ((new_address + loop_insn_offset + insn_size) >> 2 ==
6524 (new_address + loop_insn_offset + insn_size + 2) >> 2)
6525 return new_address;
6526 }
6527 as_bad (_("internal error aligning"));
6528 return address;
6529
6530 default:
6531 as_bad (_("internal error aligning"));
6532 return address;
6533 }
6534 }
6535 as_bad (_("internal error aligning"));
6536 return address;
6537}
6538
6539\f
6540/* md_relax_frag Hook and Helper Functions. */
6541
6542/* Return the number of bytes added to this fragment, given that the
6543 input has been stretched already by "stretch". */
6544
6545long
6546xtensa_relax_frag (fragP, stretch, stretched_p)
6547 fragS *fragP;
6548 long stretch;
6549 int *stretched_p;
6550{
6551 int unreported = fragP->tc_frag_data.unreported_expansion;
6552 long new_stretch = 0;
6553 char *file_name;
6554 int line, lit_size;
6555
6556 as_where (&file_name, &line);
6557 new_logical_line (fragP->fr_file, fragP->fr_line);
6558
6559 fragP->tc_frag_data.unreported_expansion = 0;
6560
6561 switch (fragP->fr_subtype)
6562 {
6563 case RELAX_ALIGN_NEXT_OPCODE:
6564 /* Always convert. */
6565 new_stretch = relax_frag_text_align (fragP, stretch);
6566 break;
6567
6568 case RELAX_LOOP_END:
6569 /* Do nothing. */
6570 break;
6571
6572 case RELAX_LOOP_END_ADD_NOP:
6573 /* Add a NOP and switch to .fill 0. */
6574 new_stretch = relax_frag_add_nop (fragP);
6575 break;
6576
6577 case RELAX_DESIRE_ALIGN:
6578 /* We REALLY want to change the relaxation order here. This
6579 should do NOTHING. The narrowing before it will either align
6580 it or not. */
6581 break;
6582
6583 case RELAX_LITERAL:
6584 case RELAX_LITERAL_FINAL:
6585 return 0;
6586
6587 case RELAX_LITERAL_NR:
6588 lit_size = 4;
6589 fragP->fr_subtype = RELAX_LITERAL_FINAL;
6590 assert (unreported == lit_size);
6591 memset (&fragP->fr_literal[fragP->fr_fix], 0, 4);
6592 fragP->fr_var -= lit_size;
6593 fragP->fr_fix += lit_size;
6594 new_stretch = 4;
6595 break;
6596
6597 case RELAX_NARROW:
6598 new_stretch = relax_frag_narrow (fragP, stretch);
6599 break;
6600
6601 case RELAX_IMMED:
6602 case RELAX_IMMED_STEP1:
6603 case RELAX_IMMED_STEP2:
6604 /* Place the immediate. */
6605 new_stretch = relax_frag_immed (now_seg, fragP, stretch,
6606 fragP->fr_subtype - RELAX_IMMED,
6607 stretched_p);
6608 break;
6609
6610 case RELAX_LITERAL_POOL_BEGIN:
6611 case RELAX_LITERAL_POOL_END:
6612 /* No relaxation required. */
6613 break;
6614
6615 default:
6616 as_bad (_("bad relaxation state"));
6617 }
6618
6619 new_logical_line (file_name, line);
6620 return new_stretch;
6621}
6622
6623
6624static long
6625relax_frag_text_align (fragP, stretch)
6626 fragS *fragP;
6627 long stretch;
6628{
6629 addressT old_address, old_next_address, old_size;
6630 addressT new_address, new_next_address, new_size;
6631 addressT growth;
6632
6633 /* Overview of the relaxation procedure for alignment
6634 inside an executable section:
6635
6636 The old size is stored in the tc_frag_data.text_expansion field.
6637
6638 Calculate the new address, fix up the text_expansion and
6639 return the growth. */
6640
6641 /* Calculate the old address of this fragment and the next fragment. */
6642 old_address = fragP->fr_address - stretch;
6643 old_next_address = (fragP->fr_address - stretch + fragP->fr_fix +
6644 fragP->tc_frag_data.text_expansion);
6645 old_size = old_next_address - old_address;
6646
6647 /* Calculate the new address of this fragment and the next fragment. */
6648 new_address = fragP->fr_address;
6649 new_next_address =
6650 get_noop_aligned_address (fragP, fragP->fr_address + fragP->fr_fix);
6651 new_size = new_next_address - new_address;
6652
6653 growth = new_size - old_size;
6654
6655 /* Fix up the text_expansion field and return the new growth. */
6656 fragP->tc_frag_data.text_expansion += growth;
6657 return growth;
6658}
6659
6660
6661/* Add a NOP (i.e., "or a1, a1, a1"). Use the 3-byte one because we
6662 don't know about the availability of density yet. TODO: When the
6663 flags are stored per fragment, use NOP.N when possible. */
6664
6665static long
6666relax_frag_add_nop (fragP)
6667 fragS *fragP;
6668{
6669 static xtensa_insnbuf insnbuf = NULL;
6670 TInsn t_insn;
6671 char *nop_buf = fragP->fr_literal + fragP->fr_fix;
6672 int length;
6673 if (!insnbuf)
6674 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
6675
6676 tinsn_init (&t_insn);
6677 t_insn.opcode = xtensa_or_opcode;
6678 assert (t_insn.opcode != XTENSA_UNDEFINED);
6679
6680 t_insn.ntok = 3;
6681 set_expr_const (&t_insn.tok[0], 1);
6682 set_expr_const (&t_insn.tok[1], 1);
6683 set_expr_const (&t_insn.tok[2], 1);
6684
6685 tinsn_to_insnbuf (&t_insn, insnbuf);
6686 fragP->tc_frag_data.is_insn = TRUE;
6687 xtensa_insnbuf_to_chars (xtensa_default_isa, insnbuf, nop_buf);
6688
6689 length = xtensa_insn_length (xtensa_default_isa, t_insn.opcode);
6690 if (fragP->fr_var < length)
6691 {
6692 as_warn (_("fr_var (%ld) < length (%d); ignoring"),
6693 fragP->fr_var, length);
6694 frag_wane (fragP);
6695 return 0;
6696 }
6697
6698 fragP->fr_fix += length;
6699 fragP->fr_var -= length;
6700 frag_wane (fragP);
6701 return length;
6702}
6703
6704
6705static long
6706relax_frag_narrow (fragP, stretch)
6707 fragS *fragP;
6708 long stretch;
6709{
6710 /* Overview of the relaxation procedure for alignment inside an
6711 executable section: Find the number of widenings required and the
6712 number of nop bytes required. Store the number of bytes ALREADY
6713 widened. If there are enough instructions to widen (must go back
6714 ONLY through NARROW fragments), mark each of the fragments as TO BE
6715 widened, recalculate the fragment addresses. */
6716
6717 assert (fragP->fr_type == rs_machine_dependent
6718 && fragP->fr_subtype == RELAX_NARROW);
6719
6720 if (!future_alignment_required (fragP, 0))
6721 {
6722 /* If already expanded but no longer needed because of a prior
6723 stretch, it is SAFE to unexpand because the next fragment will
6724 NEVER start at an address > the previous time through the
6725 relaxation. */
6726 if (fragP->tc_frag_data.text_expansion)
6727 {
6728 if (stretch > 0)
6729 {
6730 fragP->tc_frag_data.text_expansion = 0;
6731 return -1;
6732 }
6733 /* Otherwise we have to live with this bad choice. */
6734 return 0;
6735 }
6736 return 0;
6737 }
6738
6739 if (fragP->tc_frag_data.text_expansion == 0)
6740 {
6741 fragP->tc_frag_data.text_expansion = 1;
6742 return 1;
6743 }
6744
6745 return 0;
6746}
6747
6748
6749static bfd_boolean
6750future_alignment_required (fragP, stretch)
6751 fragS *fragP;
6752 long stretch;
6753{
6754 long address = fragP->fr_address + stretch;
6755 int num_widens = 0;
6756 addressT aligned_address;
6757 offsetT desired_diff;
6758
6759 while (fragP)
6760 {
6761 /* Limit this to a small search. */
6762 if (num_widens > 8)
6763 return FALSE;
6764 address += fragP->fr_fix;
6765
6766 switch (fragP->fr_type)
6767 {
6768 case rs_fill:
6769 address += fragP->fr_offset * fragP->fr_var;
6770 break;
6771
6772 case rs_machine_dependent:
6773 switch (fragP->fr_subtype)
6774 {
6775 case RELAX_NARROW:
6776 /* address += fragP->fr_fix; */
6777 num_widens++;
6778 break;
6779
6780 case RELAX_IMMED:
6781 address += (/* fragP->fr_fix + */
6782 fragP->tc_frag_data.text_expansion);
6783 break;
6784
6785 case RELAX_ALIGN_NEXT_OPCODE:
6786 case RELAX_DESIRE_ALIGN:
6787 /* address += fragP->fr_fix; */
6788 aligned_address = get_widen_aligned_address (fragP, address);
6789 desired_diff = aligned_address - address;
6790 assert (desired_diff >= 0);
6791 /* If there are enough wideners in between do it. */
6792 /* return (num_widens == desired_diff); */
6793 if (num_widens == desired_diff)
6794 return TRUE;
6795 if (fragP->fr_subtype == RELAX_ALIGN_NEXT_OPCODE)
6796 return FALSE;
6797 break;
6798
6799 default:
6800 return FALSE;
6801 }
6802 break;
6803
6804 default:
6805 return FALSE;
6806 }
6807 fragP = fragP->fr_next;
6808 }
6809
6810 return FALSE;
6811}
6812
6813
6814static long
6815relax_frag_immed (segP, fragP, stretch, min_steps, stretched_p)
6816 segT segP;
6817 fragS *fragP;
6818 long stretch;
6819 int min_steps;
6820 int *stretched_p;
6821{
6822 static xtensa_insnbuf insnbuf = NULL;
6823 TInsn t_insn;
6824 int old_size;
6825 bfd_boolean negatable_branch = FALSE;
6826 bfd_boolean branch_jmp_to_next = FALSE;
6827 IStack istack;
6828 offsetT frag_offset;
6829 int num_steps;
6830 fragS *lit_fragP;
6831 int num_text_bytes, num_literal_bytes;
6832 int literal_diff, text_diff;
6833
6834 assert (fragP->fr_opcode != NULL);
6835
6836 if (!insnbuf)
6837 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
6838
6839 tinsn_from_chars (&t_insn, fragP->fr_opcode);
6840 tinsn_immed_from_frag (&t_insn, fragP);
6841
6842 negatable_branch = is_negatable_branch (&t_insn);
6843
6844 old_size = xtensa_insn_length (xtensa_default_isa, t_insn.opcode);
6845
6846 if (software_avoid_b_j_loop_end)
6847 branch_jmp_to_next = is_branch_jmp_to_next (&t_insn, fragP);
6848
6849 /* Special case: replace a branch to the next instruction with a NOP.
6850 This is required to work around a hardware bug in T1040.0 and also
6851 serves as an optimization. */
6852
6853 if (branch_jmp_to_next
6854 && ((old_size == 2) || (old_size == 3))
6855 && !next_frag_is_loop_target (fragP))
6856 return 0;
6857
6858 /* Here is the fun stuff: Get the immediate field from this
6859 instruction. If it fits, we are done. If not, find the next
6860 instruction sequence that fits. */
6861
6862 frag_offset = fragP->fr_opcode - fragP->fr_literal;
6863 istack_init (&istack);
6864 num_steps = xg_assembly_relax (&istack, &t_insn, segP, fragP, frag_offset,
6865 min_steps, stretch);
6866 if (num_steps < min_steps)
6867 {
6868 as_fatal (_("internal error: relaxation failed"));
6869 return 0;
6870 }
6871
6872 if (num_steps > RELAX_IMMED_MAXSTEPS)
6873 {
6874 as_fatal (_("internal error: relaxation requires too many steps"));
6875 return 0;
6876 }
6877
6878 fragP->fr_subtype = (int) RELAX_IMMED + num_steps;
6879
6880 /* Figure out the number of bytes needed. */
6881 lit_fragP = 0;
6882 num_text_bytes = get_num_stack_text_bytes (&istack) - old_size;
6883 num_literal_bytes = get_num_stack_literal_bytes (&istack);
6884 literal_diff = num_literal_bytes - fragP->tc_frag_data.literal_expansion;
6885 text_diff = num_text_bytes - fragP->tc_frag_data.text_expansion;
6886
6887 /* It MUST get larger. If not, we could get an infinite loop. */
6888 know (num_text_bytes >= 0);
6889 know (literal_diff >= 0 && text_diff >= 0);
6890
6891 fragP->tc_frag_data.text_expansion = num_text_bytes;
6892 fragP->tc_frag_data.literal_expansion = num_literal_bytes;
6893
6894 /* Find the associated expandable literal for this. */
6895 if (literal_diff != 0)
6896 {
6897 lit_fragP = fragP->tc_frag_data.literal_frag;
6898 if (lit_fragP)
6899 {
6900 assert (literal_diff == 4);
6901 lit_fragP->tc_frag_data.unreported_expansion += literal_diff;
6902
6903 /* We expect that the literal section state has NOT been
6904 modified yet. */
6905 assert (lit_fragP->fr_type == rs_machine_dependent
6906 && lit_fragP->fr_subtype == RELAX_LITERAL);
6907 lit_fragP->fr_subtype = RELAX_LITERAL_NR;
6908
6909 /* We need to mark this section for another iteration
6910 of relaxation. */
6911 (*stretched_p)++;
6912 }
6913 }
6914
6915 /* This implicitly uses the assumption that a branch is negated
6916 when the size of the output increases by at least 2 bytes. */
6917
6918 if (negatable_branch && num_text_bytes >= 2)
6919 {
6920 /* If next frag is a loop end, then switch it to add a NOP. */
6921 update_next_frag_nop_state (fragP);
6922 }
6923
6924 return text_diff;
6925}
6926
6927\f
6928/* md_convert_frag Hook and Helper Functions. */
6929
6930void
6931md_convert_frag (abfd, sec, fragp)
6932 bfd *abfd ATTRIBUTE_UNUSED;
6933 segT sec;
6934 fragS *fragp;
6935{
6936 char *file_name;
6937 int line;
6938
6939 as_where (&file_name, &line);
6940 new_logical_line (fragp->fr_file, fragp->fr_line);
6941
6942 switch (fragp->fr_subtype)
6943 {
6944 case RELAX_ALIGN_NEXT_OPCODE:
6945 /* Always convert. */
6946 convert_frag_align_next_opcode (fragp);
6947 break;
6948
6949 case RELAX_DESIRE_ALIGN:
6950 /* Do nothing. If not aligned already, too bad. */
6951 break;
6952
6953 case RELAX_LITERAL:
6954 case RELAX_LITERAL_FINAL:
6955 break;
6956
6957 case RELAX_NARROW:
6958 /* No conversion. */
6959 convert_frag_narrow (fragp);
6960 break;
6961
6962 case RELAX_IMMED:
6963 case RELAX_IMMED_STEP1:
6964 case RELAX_IMMED_STEP2:
6965 /* Place the immediate. */
6966 convert_frag_immed (sec, fragp, fragp->fr_subtype - RELAX_IMMED);
6967 break;
6968
6969 case RELAX_LITERAL_NR:
6970 if (use_literal_section)
6971 {
6972 /* This should have been handled during relaxation. When
6973 relaxing a code segment, literals sometimes need to be
6974 added to the corresponding literal segment. If that
6975 literal segment has already been relaxed, then we end up
6976 in this situation. Marking the literal segments as data
6977 would make this happen less often (since GAS always relaxes
6978 code before data), but we could still get into trouble if
6979 there are instructions in a segment that is not marked as
6980 containing code. Until we can implement a better solution,
6981 cheat and adjust the addresses of all the following frags.
6982 This could break subsequent alignments, but the linker's
6983 literal coalescing will do that anyway. */
6984
6985 fragS *f;
6986 fragp->fr_subtype = RELAX_LITERAL_FINAL;
6987 assert (fragp->tc_frag_data.unreported_expansion == 4);
6988 memset (&fragp->fr_literal[fragp->fr_fix], 0, 4);
6989 fragp->fr_var -= 4;
6990 fragp->fr_fix += 4;
6991 for (f = fragp->fr_next; f; f = f->fr_next)
6992 f->fr_address += 4;
6993 }
6994 else
6995 as_bad (_("invalid relaxation fragment result"));
6996 break;
6997 }
6998
6999 fragp->fr_var = 0;
7000 new_logical_line (file_name, line);
7001}
7002
7003
7004void
7005convert_frag_align_next_opcode (fragp)
7006 fragS *fragp;
7007{
7008 char *nop_buf; /* Location for Writing. */
7009 size_t i;
7010
7011 bfd_boolean use_no_density = fragp->tc_frag_data.is_no_density;
7012 addressT aligned_address;
7013 size_t fill_size, nop_count;
7014
7015 aligned_address = get_noop_aligned_address (fragp, fragp->fr_address +
7016 fragp->fr_fix);
7017 fill_size = aligned_address - (fragp->fr_address + fragp->fr_fix);
7018 nop_count = get_text_align_nop_count (fill_size, use_no_density);
7019 nop_buf = fragp->fr_literal + fragp->fr_fix;
7020
7021 for (i = 0; i < nop_count; i++)
7022 {
7023 size_t nop_size;
7024 nop_size = get_text_align_nth_nop_size (fill_size, i, use_no_density);
7025
7026 assemble_nop (nop_size, nop_buf);
7027 nop_buf += nop_size;
7028 }
7029
7030 fragp->fr_fix += fill_size;
7031 fragp->fr_var -= fill_size;
7032}
7033
7034
7035static void
7036convert_frag_narrow (fragP)
7037 fragS *fragP;
7038{
7039 static xtensa_insnbuf insnbuf = NULL;
7040 TInsn t_insn, single_target;
7041 int size, old_size, diff, error_val;
7042 offsetT frag_offset;
7043
7044 if (fragP->tc_frag_data.text_expansion == 0)
7045 {
7046 /* No conversion. */
7047 fragP->fr_var = 0;
7048 return;
7049 }
7050
7051 assert (fragP->fr_opcode != NULL);
7052
7053 if (!insnbuf)
7054 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
7055
7056 tinsn_from_chars (&t_insn, fragP->fr_opcode);
7057 tinsn_immed_from_frag (&t_insn, fragP);
7058
7059 /* Just convert it to a wide form.... */
7060 size = 0;
7061 old_size = xtensa_insn_length (xtensa_default_isa, t_insn.opcode);
7062
7063 tinsn_init (&single_target);
7064 frag_offset = fragP->fr_opcode - fragP->fr_literal;
7065
7066 error_val = xg_expand_narrow (&single_target, &t_insn);
7067 if (error_val)
7068 as_bad (_("unable to widen instruction"));
7069
7070 size = xtensa_insn_length (xtensa_default_isa, single_target.opcode);
7071 xg_emit_insn_to_buf (&single_target, fragP->fr_opcode,
7072 fragP, frag_offset, TRUE);
7073
7074 diff = size - old_size;
7075 assert (diff >= 0);
7076 assert (diff <= fragP->fr_var);
7077 fragP->fr_var -= diff;
7078 fragP->fr_fix += diff;
7079
7080 /* clean it up */
7081 fragP->fr_var = 0;
7082}
7083
7084
7085static void
7086convert_frag_immed (segP, fragP, min_steps)
7087 segT segP;
7088 fragS *fragP;
7089 int min_steps;
7090{
7091 char *immed_instr = fragP->fr_opcode;
7092 static xtensa_insnbuf insnbuf = NULL;
7093 TInsn orig_t_insn;
7094 bfd_boolean expanded = FALSE;
7095 char *fr_opcode = fragP->fr_opcode;
7096 bfd_boolean branch_jmp_to_next = FALSE;
7097 int size;
7098
7099 assert (fragP->fr_opcode != NULL);
7100
7101 if (!insnbuf)
7102 insnbuf = xtensa_insnbuf_alloc (xtensa_default_isa);
7103
7104 tinsn_from_chars (&orig_t_insn, fragP->fr_opcode);
7105 tinsn_immed_from_frag (&orig_t_insn, fragP);
7106
7107 /* Here is the fun stuff: Get the immediate field from this
7108 instruction. If it fits, we're done. If not, find the next
7109 instruction sequence that fits. */
7110
7111 if (software_avoid_b_j_loop_end)
7112 branch_jmp_to_next = is_branch_jmp_to_next (&orig_t_insn, fragP);
7113
7114 if (branch_jmp_to_next && !next_frag_is_loop_target (fragP))
7115 {
7116 /* Conversion just inserts a NOP and marks the fix as completed. */
7117 size = xtensa_insn_length (xtensa_default_isa, orig_t_insn.opcode);
7118 assemble_nop (size, fragP->fr_opcode);
7119 fragP->fr_var = 0;
7120 }
7121 else
7122 {
7123 IStack istack;
7124 int i;
7125 symbolS *lit_sym = NULL;
7126 int total_size = 0;
7127 int old_size;
7128 int diff;
7129 symbolS *gen_label = NULL;
7130 offsetT frag_offset;
7131
7132 /* It does not fit. Find something that does and
7133 convert immediately. */
7134 frag_offset = fragP->fr_opcode - fragP->fr_literal;
7135 istack_init (&istack);
7136 xg_assembly_relax (&istack, &orig_t_insn,
7137 segP, fragP, frag_offset, min_steps, 0);
7138
7139 old_size = xtensa_insn_length (xtensa_default_isa, orig_t_insn.opcode);
7140
7141 /* Assemble this right inline. */
7142
7143 /* First, create the mapping from a label name to the REAL label. */
7144 total_size = 0;
7145 for (i = 0; i < istack.ninsn; i++)
7146 {
7147 TInsn *t_insn = &istack.insn[i];
7148 int size = 0;
7149 fragS *lit_frag;
7150
7151 switch (t_insn->insn_type)
7152 {
7153 case ITYPE_LITERAL:
7154 if (lit_sym != NULL)
7155 as_bad (_("multiple literals in expansion"));
7156 /* First find the appropriate space in the literal pool. */
7157 lit_frag = fragP->tc_frag_data.literal_frag;
7158 if (lit_frag == NULL)
7159 as_bad (_("no registered fragment for literal"));
7160 if (t_insn->ntok != 1)
7161 as_bad (_("number of literal tokens != 1"));
7162
7163 /* Set the literal symbol and add a fixup. */
7164 lit_sym = lit_frag->fr_symbol;
7165 break;
7166
7167 case ITYPE_LABEL:
7168 assert (gen_label == NULL);
7169 gen_label = symbol_new (FAKE_LABEL_NAME, now_seg,
7170 fragP->fr_opcode - fragP->fr_literal +
7171 total_size, fragP);
7172 break;
7173
7174 case ITYPE_INSN:
7175 size = xtensa_insn_length (xtensa_default_isa, t_insn->opcode);
7176 total_size += size;
7177 break;
7178 }
7179 }
7180
7181 total_size = 0;
7182 for (i = 0; i < istack.ninsn; i++)
7183 {
7184 TInsn *t_insn = &istack.insn[i];
7185 fragS *lit_frag;
7186 int size;
7187 segT target_seg;
7188
7189 switch (t_insn->insn_type)
7190 {
7191 case ITYPE_LITERAL:
7192 lit_frag = fragP->tc_frag_data.literal_frag;
7193 /* already checked */
7194 assert (lit_frag != NULL);
7195 assert (lit_sym != NULL);
7196 assert (t_insn->ntok == 1);
7197 /* add a fixup */
7198 target_seg = S_GET_SEGMENT (lit_sym);
7199 assert (target_seg);
7200 fix_new_exp_in_seg (target_seg, 0, lit_frag, 0, 4,
7201 &t_insn->tok[0], FALSE, BFD_RELOC_32);
7202 break;
7203
7204 case ITYPE_LABEL:
7205 break;
7206
7207 case ITYPE_INSN:
7208 xg_resolve_labels (t_insn, gen_label);
7209 xg_resolve_literals (t_insn, lit_sym);
7210 size = xtensa_insn_length (xtensa_default_isa, t_insn->opcode);
7211 total_size += size;
7212 xg_emit_insn_to_buf (t_insn, immed_instr, fragP,
7213 immed_instr - fragP->fr_literal, TRUE);
7214 immed_instr += size;
7215 break;
7216 }
7217 }
7218
7219 diff = total_size - old_size;
7220 assert (diff >= 0);
7221 if (diff != 0)
7222 expanded = TRUE;
7223 assert (diff <= fragP->fr_var);
7224 fragP->fr_var -= diff;
7225 fragP->fr_fix += diff;
7226 }
7227
7228 /* Clean it up. */
7229 fragP->fr_var = 0;
7230
7231 /* Check for undefined immediates in LOOP instructions. */
7232 if (is_loop_opcode (orig_t_insn.opcode))
7233 {
7234 symbolS *sym;
7235 sym = orig_t_insn.tok[1].X_add_symbol;
7236 if (sym != NULL && !S_IS_DEFINED (sym))
7237 {
7238 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym));
7239 return;
7240 }
7241 sym = orig_t_insn.tok[1].X_op_symbol;
7242 if (sym != NULL && !S_IS_DEFINED (sym))
7243 {
7244 as_bad (_("unresolved loop target symbol: %s"), S_GET_NAME (sym));
7245 return;
7246 }
7247 }
7248
7249 if (expanded && is_loop_opcode (orig_t_insn.opcode))
7250 convert_frag_immed_finish_loop (segP, fragP, &orig_t_insn);
7251
7252 if (expanded && is_direct_call_opcode (orig_t_insn.opcode))
7253 {
7254 /* Add an expansion note on the expanded instruction. */
7255 fix_new_exp_in_seg (now_seg, 0, fragP, fr_opcode - fragP->fr_literal, 4,
7256 &orig_t_insn.tok[0], TRUE,
7257 BFD_RELOC_XTENSA_ASM_EXPAND);
7258
7259 }
7260}
7261
7262
7263/* Add a new fix expression into the desired segment. We have to
7264 switch to that segment to do this. */
7265
7266static fixS *
7267fix_new_exp_in_seg (new_seg, new_subseg,
7268 frag, where, size, exp, pcrel, r_type)
7269 segT new_seg;
7270 subsegT new_subseg;
7271 fragS *frag;
7272 int where;
7273 int size;
7274 expressionS *exp;
7275 int pcrel;
7276 bfd_reloc_code_real_type r_type;
7277{
7278 fixS *new_fix;
7279 segT seg = now_seg;
7280 subsegT subseg = now_subseg;
7281 assert (new_seg != 0);
7282 subseg_set (new_seg, new_subseg);
7283
7284 if (r_type == BFD_RELOC_32
7285 && exp->X_add_symbol
7286 && exp->X_add_symbol->sy_tc.plt == 1)
7287 {
7288 r_type = BFD_RELOC_XTENSA_PLT;
7289 }
7290
7291 new_fix = fix_new_exp (frag, where, size, exp, pcrel, r_type);
7292 subseg_set (seg, subseg);
7293 return new_fix;
7294}
7295
7296
7297/* Relax a loop instruction so that it can span loop >256 bytes. */
7298/*
7299 loop as, .L1
7300 .L0:
7301 rsr as, LEND
7302 wsr as, LBEG
7303 addi as, as, lo8(label-.L1)
7304 addmi as, as, mid8(label-.L1)
7305 wsr as, LEND
7306 isync
7307 rsr as, LCOUNT
7308 addi as, as, 1
7309 .L1:
7310 <<body>>
7311 label: */
7312
7313static void
7314convert_frag_immed_finish_loop (segP, fragP, t_insn)
7315 segT segP;
7316 fragS *fragP;
7317 TInsn *t_insn;
7318{
7319 TInsn loop_insn;
7320 TInsn addi_insn;
7321 TInsn addmi_insn;
7322 unsigned long target;
7323 static xtensa_insnbuf insnbuf = NULL;
7324 unsigned int loop_length, loop_length_hi, loop_length_lo;
7325 xtensa_isa isa = xtensa_default_isa;
7326 addressT loop_offset;
7327 addressT addi_offset = 9;
7328 addressT addmi_offset = 12;
7329
7330 if (!insnbuf)
7331 insnbuf = xtensa_insnbuf_alloc (isa);
7332
7333 /* Get the loop offset. */
7334 loop_offset = get_expanded_loop_offset (t_insn->opcode);
7335 /* Validate that there really is a LOOP at the loop_offset. */
7336 tinsn_from_chars (&loop_insn, fragP->fr_opcode + loop_offset);
7337
7338 if (!is_loop_opcode (loop_insn.opcode))
7339 {
7340 as_bad_where (fragP->fr_file, fragP->fr_line,
7341 _("loop relaxation specification does not correspond"));
7342 assert (0);
7343 }
7344 addi_offset += loop_offset;
7345 addmi_offset += loop_offset;
7346
7347 assert (t_insn->ntok == 2);
7348 target = get_expression_value (segP, &t_insn->tok[1]);
7349
7350 know (symbolP);
7351 know (symbolP->sy_frag);
7352 know (!(S_GET_SEGMENT (symbolP) == absolute_section)
7353 || symbol_get_frag (symbolP) == &zero_address_frag);
7354
7355 loop_length = target - (fragP->fr_address + fragP->fr_fix);
7356 loop_length_hi = loop_length & ~0x0ff;
7357 loop_length_lo = loop_length & 0x0ff;
7358 if (loop_length_lo >= 128)
7359 {
7360 loop_length_lo -= 256;
7361 loop_length_hi += 256;
7362 }
7363
7364 /* Because addmi sign-extends the immediate, 'loop_length_hi' can be at most
7365 32512. If the loop is larger than that, then we just fail. */
7366 if (loop_length_hi > 32512)
7367 as_bad_where (fragP->fr_file, fragP->fr_line,
7368 _("loop too long for LOOP instruction"));
7369
7370 tinsn_from_chars (&addi_insn, fragP->fr_opcode + addi_offset);
7371 assert (addi_insn.opcode == xtensa_addi_opcode);
7372
7373 tinsn_from_chars (&addmi_insn, fragP->fr_opcode + addmi_offset);
7374 assert (addmi_insn.opcode == xtensa_addmi_opcode);
7375
7376 set_expr_const (&addi_insn.tok[2], loop_length_lo);
7377 tinsn_to_insnbuf (&addi_insn, insnbuf);
7378
7379 fragP->tc_frag_data.is_insn = TRUE;
7380 xtensa_insnbuf_to_chars (isa, insnbuf, fragP->fr_opcode + addi_offset);
7381
7382 set_expr_const (&addmi_insn.tok[2], loop_length_hi);
7383 tinsn_to_insnbuf (&addmi_insn, insnbuf);
7384 xtensa_insnbuf_to_chars (isa, insnbuf, fragP->fr_opcode + addmi_offset);
7385}
7386
7387
7388static offsetT
7389get_expression_value (segP, exp)
7390 segT segP;
7391 expressionS *exp;
7392{
7393 if (exp->X_op == O_constant)
7394 return exp->X_add_number;
7395 if (exp->X_op == O_symbol)
7396 {
7397 /* Find the fragment. */
7398 symbolS *sym = exp->X_add_symbol;
7399
7400 assert (S_GET_SEGMENT (sym) == segP
7401 || S_GET_SEGMENT (sym) == absolute_section);
7402
7403 return (S_GET_VALUE (sym) + exp->X_add_number);
7404 }
7405 as_bad (_("invalid expression evaluation type %d"), exp->X_op);
7406 return 0;
7407}
7408
7409\f
7410/* A map that keeps information on a per-subsegment basis. This is
7411 maintained during initial assembly, but is invalid once the
7412 subsegments are smashed together. I.E., it cannot be used during
7413 the relaxation. */
7414
7415typedef struct subseg_map_struct
7416{
7417 /* the key */
7418 segT seg;
7419 subsegT subseg;
7420
7421 /* the data */
7422 unsigned flags;
7423
7424 struct subseg_map_struct *next;
7425} subseg_map;
7426
7427static subseg_map *sseg_map = NULL;
7428
7429
7430static unsigned
7431get_last_insn_flags (seg, subseg)
7432 segT seg;
7433 subsegT subseg;
7434{
7435 subseg_map *subseg_e;
7436
7437 for (subseg_e = sseg_map; subseg_e != NULL; subseg_e = subseg_e->next)
7438 if (seg == subseg_e->seg && subseg == subseg_e->subseg)
7439 return subseg_e->flags;
7440
7441 return 0;
7442}
7443
7444
7445static void
7446set_last_insn_flags (seg, subseg, fl, val)
7447 segT seg;
7448 subsegT subseg;
7449 unsigned fl;
7450 bfd_boolean val;
7451{
7452 subseg_map *subseg_e;
7453
7454 for (subseg_e = sseg_map; subseg_e; subseg_e = subseg_e->next)
7455 if (seg == subseg_e->seg && subseg == subseg_e->subseg)
7456 break;
7457
7458 if (!subseg_e)
7459 {
7460 subseg_e = (subseg_map *) xmalloc (sizeof (subseg_map));
7461 memset (subseg_e, 0, sizeof (subseg_map));
7462 subseg_e->seg = seg;
7463 subseg_e->subseg = subseg;
7464 subseg_e->flags = 0;
7465 subseg_e->next = sseg_map;
7466 sseg_map = subseg_e;
7467 }
7468
7469 if (val)
7470 subseg_e->flags |= fl;
7471 else
7472 subseg_e->flags &= ~fl;
7473}
7474
7475\f
7476/* Segment Lists and emit_state Stuff. */
7477
7478/* Remove the segment from the global sections list. */
7479
7480static void
7481xtensa_remove_section (sec)
7482 segT sec;
7483{
7484 /* Handle brain-dead bfd_section_list_remove macro, which
7485 expect the address of the prior section's "next" field, not
7486 just the address of the section to remove. */
7487
7488 segT *ps_next_ptr = &stdoutput->sections;
7489 while (*ps_next_ptr != sec && *ps_next_ptr != NULL)
7490 ps_next_ptr = &(*ps_next_ptr)->next;
7491
7492 assert (*ps_next_ptr != NULL);
7493
7494 bfd_section_list_remove (stdoutput, ps_next_ptr);
7495}
7496
7497
7498static void
7499xtensa_insert_section (after_sec, sec)
7500 segT after_sec;
7501 segT sec;
7502{
7503 segT *after_sec_next;
7504 if (after_sec == NULL)
7505 after_sec_next = &stdoutput->sections;
7506 else
7507 after_sec_next = &after_sec->next;
7508
7509 bfd_section_list_insert (stdoutput, after_sec_next, sec);
7510}
7511
7512
7513static void
7514xtensa_move_seg_list_to_beginning (head)
7515 seg_list *head;
7516{
7517 head = head->next;
7518 while (head)
7519 {
7520 segT literal_section = head->seg;
7521
7522 /* Move the literal section to the front of the section list. */
7523 assert (literal_section);
7524 xtensa_remove_section (literal_section);
7525 xtensa_insert_section (NULL, literal_section);
7526
7527 head = head->next;
7528 }
7529}
7530
7531
7532void
7533xtensa_move_literals ()
7534{
7535 seg_list *segment;
7536 frchainS *frchain_from, *frchain_to;
7537 fragS *search_frag, *next_frag, *last_frag, *literal_pool, *insert_after;
7538 fragS **frag_splice;
7539 emit_state state;
7540 segT dest_seg;
7541 fixS *fix, *next_fix, **fix_splice;
7542
7543 /* As clunky as this is, we can't rely on frag_var
7544 and frag_variant to get called in all situations. */
7545
7546 segment = literal_head->next;
7547 while (segment)
7548 {
7549 frchain_from = seg_info (segment->seg)->frchainP;
7550 search_frag = frchain_from->frch_root;
7551 while (search_frag)
7552 {
7553 search_frag->tc_frag_data.is_literal = TRUE;
7554 search_frag = search_frag->fr_next;
7555 }
7556 segment = segment->next;
7557 }
7558
7559 if (use_literal_section)
7560 return;
7561
7562 segment = literal_head->next;
7563 while (segment)
7564 {
7565 frchain_from = seg_info (segment->seg)->frchainP;
7566 search_frag = frchain_from->frch_root;
7567 literal_pool = NULL;
7568 frchain_to = NULL;
7569 frag_splice = &(frchain_from->frch_root);
7570
7571 while (!search_frag->tc_frag_data.literal_frag)
7572 {
7573 assert (search_frag->fr_fix == 0
7574 || search_frag->fr_type == rs_align);
7575 search_frag = search_frag->fr_next;
7576 }
7577
7578 assert (search_frag->tc_frag_data.literal_frag->fr_subtype
7579 == RELAX_LITERAL_POOL_BEGIN);
7580 xtensa_switch_section_emit_state (&state, segment->seg, 0);
7581
7582 /* Make sure that all the frags in this series are closed, and
7583 that there is at least one left over of zero-size. This
7584 prevents us from making a segment with an frchain without any
7585 frags in it. */
7586 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
7587 last_frag = frag_now;
7588 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
7589
7590 while (search_frag != frag_now)
7591 {
7592 next_frag = search_frag->fr_next;
7593
7594 /* First, move the frag out of the literal section and
7595 to the appropriate place. */
7596 if (search_frag->tc_frag_data.literal_frag)
7597 {
7598 literal_pool = search_frag->tc_frag_data.literal_frag;
7599 assert (literal_pool->fr_subtype == RELAX_LITERAL_POOL_BEGIN);
7600 /* Note that we set this fr_var to be a fix
7601 chain when we created the literal pool location
7602 as RELAX_LITERAL_POOL_BEGIN. */
7603 frchain_to = (frchainS *) literal_pool->fr_var;
7604 }
7605 insert_after = literal_pool;
7606
7607 while (insert_after->fr_next->fr_subtype != RELAX_LITERAL_POOL_END)
7608 insert_after = insert_after->fr_next;
7609
7610 dest_seg = (segT) insert_after->fr_next->fr_var;
7611
7612 *frag_splice = next_frag;
7613 search_frag->fr_next = insert_after->fr_next;
7614 insert_after->fr_next = search_frag;
7615 search_frag->tc_frag_data.lit_seg = dest_seg;
7616
7617 /* Now move any fixups associated with this frag to the
7618 right section. */
7619 fix = frchain_from->fix_root;
7620 fix_splice = &(frchain_from->fix_root);
7621 while (fix)
7622 {
7623 next_fix = fix->fx_next;
7624 if (fix->fx_frag == search_frag)
7625 {
7626 *fix_splice = next_fix;
7627 fix->fx_next = frchain_to->fix_root;
7628 frchain_to->fix_root = fix;
7629 if (frchain_to->fix_tail == NULL)
7630 frchain_to->fix_tail = fix;
7631 }
7632 else
7633 fix_splice = &(fix->fx_next);
7634 fix = next_fix;
7635 }
7636 search_frag = next_frag;
7637 }
7638
7639 if (frchain_from->fix_root != NULL)
7640 {
7641 frchain_from = seg_info (segment->seg)->frchainP;
7642 as_warn (_("fixes not all moved from %s"), segment->seg->name);
7643
7644 assert (frchain_from->fix_root == NULL);
7645 }
7646 frchain_from->fix_tail = NULL;
7647 xtensa_restore_emit_state (&state);
7648 segment = segment->next;
7649 }
7650
7651 xtensa_move_frag_symbols ();
7652}
7653
7654
7655static void
7656xtensa_move_frag_symbol (sym)
7657 symbolS *sym;
7658{
7659 fragS *frag = symbol_get_frag (sym);
7660
7661 if (frag->tc_frag_data.lit_seg != (segT) 0)
7662 S_SET_SEGMENT (sym, frag->tc_frag_data.lit_seg);
7663}
7664
7665
7666static void
7667xtensa_move_frag_symbols ()
7668{
7669 symbolS *symbolP;
7670
7671 /* Although you might think that only one of these lists should be
7672 searched, it turns out that the difference of the two sets
7673 (either way) is not empty. They do overlap quite a bit,
7674 however. */
7675
7676 for (symbolP = symbol_rootP; symbolP; symbolP = symbolP->sy_next)
7677 xtensa_move_frag_symbol (symbolP);
7678
7679 map_over_defined_symbols (xtensa_move_frag_symbol);
7680}
7681
7682
7683static void
7684xtensa_reorder_seg_list (head, after)
7685 seg_list *head;
7686 segT after;
7687{
7688 /* Move all of the sections in the section list to come
7689 after "after" in the gnu segment list. */
7690
7691 head = head->next;
7692 while (head)
7693 {
7694 segT literal_section = head->seg;
7695
7696 /* Move the literal section after "after". */
7697 assert (literal_section);
7698 if (literal_section != after)
7699 {
7700 xtensa_remove_section (literal_section);
7701 xtensa_insert_section (after, literal_section);
7702 }
7703
7704 head = head->next;
7705 }
7706}
7707
7708
7709/* Push all the literal segments to the end of the gnu list. */
7710
7711void
7712xtensa_reorder_segments ()
7713{
7714 segT sec;
7715 segT last_sec;
7716 int old_count = 0;
7717 int new_count = 0;
7718
7719 for (sec = stdoutput->sections; sec != NULL; sec = sec->next)
7720 old_count++;
7721
7722 /* Now that we have the last section, push all the literal
7723 sections to the end. */
7724 last_sec = get_last_sec ();
7725 xtensa_reorder_seg_list (literal_head, last_sec);
7726 xtensa_reorder_seg_list (init_literal_head, last_sec);
7727 xtensa_reorder_seg_list (fini_literal_head, last_sec);
7728
7729 /* Now perform the final error check. */
7730 for (sec = stdoutput->sections; sec != NULL; sec = sec->next)
7731 new_count++;
7732 assert (new_count == old_count);
7733}
7734
7735
7736segT
7737get_last_sec ()
7738{
7739 segT last_sec = stdoutput->sections;
7740 while (last_sec->next != NULL)
7741 last_sec = last_sec->next;
7742
7743 return last_sec;
7744}
7745
7746
7747/* Change the emit state (seg, subseg, and frag related stuff) to the
7748 correct location. Return a emit_state which can be passed to
7749 xtensa_restore_emit_state to return to current fragment. */
7750
7751void
7752xtensa_switch_to_literal_fragment (result)
7753 emit_state *result;
7754{
7755 /* When we mark a literal pool location, we want to put a frag in
7756 the literal pool that points to it. But to do that, we want to
7757 switch_to_literal_fragment. But literal sections don't have
7758 literal pools, so their location is always null, so we would
7759 recurse forever. This is kind of hacky, but it works. */
7760
7761 static bfd_boolean recursive = FALSE;
7762 fragS *pool_location = get_literal_pool_location (now_seg);
7763 bfd_boolean is_init =
7764 (now_seg && !strcmp (segment_name (now_seg), INIT_SECTION_NAME));
7765
7766 bfd_boolean is_fini =
7767 (now_seg && !strcmp (segment_name (now_seg), FINI_SECTION_NAME));
7768
7769
7770 if (pool_location == NULL
7771 && !use_literal_section
7772 && !recursive
7773 && !is_init && ! is_fini)
7774 {
7775 as_warn (_("inlining literal pool; "
7776 "specify location with .literal_position."));
7777 recursive = TRUE;
7778 xtensa_mark_literal_pool_location (FALSE);
7779 recursive = FALSE;
7780 }
7781
7782 /* Special case: If we are in the ".fini" or ".init" section, then
7783 we will ALWAYS be generating to the ".fini.literal" and
7784 ".init.literal" sections. */
7785
7786 if (is_init)
7787 {
7788 cache_literal_section (init_literal_head,
7789 default_lit_sections.init_lit_seg_name,
7790 &default_lit_sections.init_lit_seg);
7791 xtensa_switch_section_emit_state (result,
7792 default_lit_sections.init_lit_seg, 0);
7793 }
7794 else if (is_fini)
7795 {
7796 cache_literal_section (fini_literal_head,
7797 default_lit_sections.fini_lit_seg_name,
7798 &default_lit_sections.fini_lit_seg);
7799 xtensa_switch_section_emit_state (result,
7800 default_lit_sections.fini_lit_seg, 0);
7801 }
7802 else
7803 {
7804 cache_literal_section (literal_head,
7805 default_lit_sections.lit_seg_name,
7806 &default_lit_sections.lit_seg);
7807 xtensa_switch_section_emit_state (result,
7808 default_lit_sections.lit_seg, 0);
7809 }
7810
7811 if (!use_literal_section &&
7812 !is_init && !is_fini &&
7813 get_literal_pool_location (now_seg) != pool_location)
7814 {
7815 /* Close whatever frag is there. */
7816 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
7817 frag_now->tc_frag_data.literal_frag = pool_location;
7818 frag_variant (rs_fill, 0, 0, 0, NULL, 0, NULL);
7819 }
7820
7821 /* Do a 4 byte align here. */
7822 frag_align (2, 0, 0);
7823}
7824
7825
7826/* Call this function before emitting data into the literal section.
7827 This is a helper function for xtensa_switch_to_literal_fragment.
7828 This is similar to a .section new_now_seg subseg. */
7829
7830void
7831xtensa_switch_section_emit_state (state, new_now_seg, new_now_subseg)
7832 emit_state *state;
7833 segT new_now_seg;
7834 subsegT new_now_subseg;
7835{
7836 state->name = now_seg->name;
7837 state->now_seg = now_seg;
7838 state->now_subseg = now_subseg;
7839 state->generating_literals = generating_literals;
7840 generating_literals++;
7841 subseg_new (segment_name (new_now_seg), new_now_subseg);
7842}
7843
7844
7845/* Use to restore the emitting into the normal place. */
7846
7847void
7848xtensa_restore_emit_state (state)
7849 emit_state *state;
7850{
7851 generating_literals = state->generating_literals;
7852 subseg_new (state->name, state->now_subseg);
7853}
7854
7855
7856/* Get a segment of a given name. If the segment is already
7857 present, return it; otherwise, create a new one. */
7858
7859static void
7860cache_literal_section (head, name, seg)
7861 seg_list *head;
7862 const char *name;
7863 segT *seg;
7864{
7865 segT current_section = now_seg;
7866 int current_subsec = now_subseg;
7867
7868 if (*seg != 0)
7869 return;
7870 *seg = retrieve_literal_seg (head, name);
7871 subseg_set (current_section, current_subsec);
7872}
7873
7874
7875/* Get a segment of a given name. If the segment is already
7876 present, return it; otherwise, create a new one. */
7877
7878static segT
7879retrieve_literal_seg (head, name)
7880 seg_list *head;
7881 const char *name;
7882{
7883 segT ret = 0;
7884
7885 assert (head);
7886
7887 ret = seg_present (name);
7888 if (!ret)
7889 {
7890 ret = subseg_new (name, (subsegT) 0);
7891 add_seg_list (head, ret);
7892 bfd_set_section_flags (stdoutput, ret, SEC_HAS_CONTENTS |
7893 SEC_READONLY | SEC_ALLOC | SEC_LOAD | SEC_CODE);
7894 bfd_set_section_alignment (stdoutput, ret, 2);
7895 }
7896
7897 return ret;
7898}
7899
7900
7901/* Return a segment of a given name if it is present. */
7902
7903static segT
7904seg_present (name)
7905 const char *name;
7906{
7907 segT seg;
7908 seg = stdoutput->sections;
7909
7910 while (seg)
7911 {
7912 if (!strcmp (segment_name (seg), name))
7913 return seg;
7914 seg = seg->next;
7915 }
7916
7917 return 0;
7918}
7919
7920
7921/* Add a segment to a segment list. */
7922
7923static void
7924add_seg_list (head, seg)
7925 seg_list *head;
7926 segT seg;
7927{
7928 seg_list *n;
7929 n = (seg_list *) xmalloc (sizeof (seg_list));
7930 assert (n);
7931
7932 n->seg = seg;
7933 n->next = head->next;
7934 head->next = n;
7935}
7936
7937\f
7938/* Set up Property Tables after Relaxation. */
7939
7940#define XTENSA_INSN_SEC_NAME ".xt.insn"
7941#define XTENSA_LIT_SEC_NAME ".xt.lit"
7942
7943void
7944xtensa_post_relax_hook ()
7945{
7946 xtensa_move_seg_list_to_beginning (literal_head);
7947 xtensa_move_seg_list_to_beginning (init_literal_head);
7948 xtensa_move_seg_list_to_beginning (fini_literal_head);
7949
7950 xtensa_create_property_segments (get_frag_is_insn,
7951 XTENSA_INSN_SEC_NAME,
7952 xt_literal_sec);
7953 if (use_literal_section)
7954 xtensa_create_property_segments (get_frag_is_literal,
7955 XTENSA_LIT_SEC_NAME,
7956 xt_insn_sec);
7957}
7958
7959
7960static bfd_boolean
7961get_frag_is_literal (fragP)
7962 const fragS *fragP;
7963{
7964 assert (fragP != NULL);
7965 return (fragP->tc_frag_data.is_literal);
7966}
7967
7968
7969static bfd_boolean
7970get_frag_is_insn (fragP)
7971 const fragS *fragP;
7972{
7973 assert (fragP != NULL);
7974 return (fragP->tc_frag_data.is_insn);
7975}
7976
7977
7978static void
7979xtensa_create_property_segments (property_function, section_name_base,
7980 sec_type)
7981 frag_predicate property_function;
7982 const char * section_name_base;
7983 xt_section_type sec_type;
7984{
7985 segT *seclist;
7986
7987 /* Walk over all of the current segments.
7988 Walk over each fragment
7989 For each fragment that has instructions
7990 Build an instruction record (append where possible). */
7991
7992 for (seclist = &stdoutput->sections;
7993 seclist && *seclist;
7994 seclist = &(*seclist)->next)
7995 {
7996 segT sec = *seclist;
7997 if (section_has_property (sec, property_function))
7998 {
7999 char * property_section_name =
8000 xtensa_get_property_section_name (stdoutput, sec,
8001 section_name_base);
8002 segT insn_sec = retrieve_xtensa_section (property_section_name);
8003 segment_info_type *xt_seg_info = retrieve_segment_info (insn_sec);
8004 xtensa_block_info ** xt_blocks =
8005 &xt_seg_info->tc_segment_info_data.blocks[sec_type];
8006 /* Walk over all of the frchains here and add new sections. */
8007 add_xt_block_frags (sec, insn_sec, xt_blocks, property_function);
8008 }
8009 }
8010
8011 /* Now we fill them out.... */
8012
8013 for (seclist = &stdoutput->sections;
8014 seclist && *seclist;
8015 seclist = &(*seclist)->next)
8016 {
8017 segment_info_type *seginfo;
8018 xtensa_block_info *block;
8019 segT sec = *seclist;
8020 seginfo = seg_info (sec);
8021 block = seginfo->tc_segment_info_data.blocks[sec_type];
8022
8023 if (block)
8024 {
8025 xtensa_block_info *cur_block;
8026 /* This is a section with some data. */
8027 size_t num_recs = 0;
8028 size_t rec_size;
8029
8030 for (cur_block = block; cur_block; cur_block = cur_block->next)
8031 num_recs++;
8032
8033 rec_size = num_recs * 8;
8034 bfd_set_section_size (stdoutput, sec, rec_size);
8035
8036 /* In order to make this work with the assembler, we have to
8037 build some frags and then build the "fixups" for it. It
8038 would be easier to just set the contents then set the
8039 arlents. */
8040
8041 if (num_recs)
8042 {
8043 /* Allocate a fragment and leak it. */
8044 fragS *fragP;
8045 size_t frag_size;
8046 fixS *fixes;
8047 frchainS *frchainP;
8048 size_t i;
8049 char *frag_data;
8050
8051 frag_size = sizeof (fragS) + rec_size;
8052 fragP = (fragS *) xmalloc (frag_size);
8053
8054 memset (fragP, 0, frag_size);
8055 fragP->fr_address = 0;
8056 fragP->fr_next = NULL;
8057 fragP->fr_fix = rec_size;
8058 fragP->fr_var = 0;
8059 fragP->fr_type = rs_fill;
8060 /* the rest are zeros */
8061
8062 frchainP = seginfo->frchainP;
8063 frchainP->frch_root = fragP;
8064 frchainP->frch_last = fragP;
8065
8066 fixes = (fixS *) xmalloc (sizeof (fixS) * num_recs);
8067 memset (fixes, 0, sizeof (fixS) * num_recs);
8068
8069 seginfo->fix_root = fixes;
8070 seginfo->fix_tail = &fixes[num_recs - 1];
8071 cur_block = block;
8072 frag_data = &fragP->fr_literal[0];
8073 for (i = 0; i < num_recs; i++)
8074 {
8075 fixS *fix = &fixes[i];
8076 assert (cur_block);
8077
8078 /* Write the fixup. */
8079 if (i != num_recs - 1)
8080 fix->fx_next = &fixes[i + 1];
8081 else
8082 fix->fx_next = NULL;
8083 fix->fx_size = 4;
8084 fix->fx_done = 0;
8085 fix->fx_frag = fragP;
8086 fix->fx_where = i * 8;
8087 fix->fx_addsy = section_symbol (cur_block->sec);
8088 fix->fx_offset = cur_block->offset;
8089 fix->fx_r_type = BFD_RELOC_32;
8090 fix->fx_file = "Internal Assembly";
8091 fix->fx_line = 0;
8092
8093 /* Write the length. */
8094 md_number_to_chars (&frag_data[4 + 8 * i],
8095 cur_block->size, 4);
8096 cur_block = cur_block->next;
8097 }
8098 }
8099 }
8100 }
8101}
8102
8103
8104segment_info_type *
8105retrieve_segment_info (seg)
8106 segT seg;
8107{
8108 segment_info_type *seginfo;
8109 seginfo = (segment_info_type *) bfd_get_section_userdata (stdoutput, seg);
8110 if (!seginfo)
8111 {
8112 frchainS *frchainP;
8113
8114 seginfo = (segment_info_type *) xmalloc (sizeof (*seginfo));
8115 memset ((PTR) seginfo, 0, sizeof (*seginfo));
8116 seginfo->fix_root = NULL;
8117 seginfo->fix_tail = NULL;
8118 seginfo->bfd_section = seg;
8119 seginfo->sym = 0;
8120 /* We will not be dealing with these, only our special ones. */
8121#if 0
8122 if (seg == bfd_abs_section_ptr)
8123 abs_seg_info = seginfo;
8124 else if (seg == bfd_und_section_ptr)
8125 und_seg_info = seginfo;
8126 else
8127#endif
8128 bfd_set_section_userdata (stdoutput, seg, (PTR) seginfo);
8129#if 0
8130 seg_fix_rootP = &segment_info[seg].fix_root;
8131 seg_fix_tailP = &segment_info[seg].fix_tail;
8132#endif
8133
8134 frchainP = (frchainS *) xmalloc (sizeof (frchainS));
8135 frchainP->frch_root = NULL;
8136 frchainP->frch_last = NULL;
8137 frchainP->frch_next = NULL;
8138 frchainP->frch_seg = seg;
8139 frchainP->frch_subseg = 0;
8140 frchainP->fix_root = NULL;
8141 frchainP->fix_tail = NULL;
8142 /* Do not init the objstack. */
8143 /* obstack_begin (&frchainP->frch_obstack, chunksize); */
8144 /* frchainP->frch_frag_now = fragP; */
8145 frchainP->frch_frag_now = NULL;
8146
8147 seginfo->frchainP = frchainP;
8148 }
8149
8150 return seginfo;
8151}
8152
8153
8154segT
8155retrieve_xtensa_section (sec_name)
8156 char *sec_name;
8157{
8158 bfd *abfd = stdoutput;
8159 flagword flags, out_flags, link_once_flags;
8160 segT s;
8161
8162 flags = bfd_get_section_flags (abfd, now_seg);
8163 link_once_flags = (flags & SEC_LINK_ONCE);
8164 if (link_once_flags)
8165 link_once_flags |= (flags & SEC_LINK_DUPLICATES);
8166 out_flags = (SEC_RELOC | SEC_HAS_CONTENTS | SEC_READONLY | link_once_flags);
8167
8168 s = bfd_make_section_old_way (abfd, sec_name);
8169 if (s == NULL)
8170 as_bad (_("could not create section %s"), sec_name);
8171 if (!bfd_set_section_flags (abfd, s, out_flags))
8172 as_bad (_("invalid flag combination on section %s"), sec_name);
8173
8174 return s;
8175}
8176
8177
8178bfd_boolean
8179section_has_property (sec, property_function)
8180 segT sec;
8181 frag_predicate property_function;
8182{
8183 segment_info_type *seginfo = seg_info (sec);
8184 fragS *fragP;
8185
8186 if (seginfo && seginfo->frchainP)
8187 {
8188 for (fragP = seginfo->frchainP->frch_root; fragP; fragP = fragP->fr_next)
8189 {
8190 if (property_function (fragP)
8191 && (fragP->fr_type != rs_fill || fragP->fr_fix != 0))
8192 return TRUE;
8193 }
8194 }
8195 return FALSE;
8196}
8197
8198
8199/* Two types of block sections exist right now: literal and insns. */
8200
8201void
8202add_xt_block_frags (sec, xt_block_sec, xt_block, property_function)
8203 segT sec;
8204 segT xt_block_sec;
8205 xtensa_block_info **xt_block;
8206 frag_predicate property_function;
8207{
8208 segment_info_type *seg_info;
8209 segment_info_type *xt_seg_info;
8210 bfd_vma seg_offset;
8211 fragS *fragP;
8212
8213 xt_seg_info = retrieve_segment_info (xt_block_sec);
8214 seg_info = retrieve_segment_info (sec);
8215
8216 /* Build it if needed. */
8217 while (*xt_block != NULL)
8218 xt_block = &(*xt_block)->next;
8219 /* We are either at NULL at the beginning or at the end. */
8220
8221 /* Walk through the frags. */
8222 seg_offset = 0;
8223
8224 if (seg_info->frchainP)
8225 {
8226 for (fragP = seg_info->frchainP->frch_root;
8227 fragP;
8228 fragP = fragP->fr_next)
8229 {
8230 if (property_function (fragP)
8231 && (fragP->fr_type != rs_fill || fragP->fr_fix != 0))
8232 {
8233 if (*xt_block != NULL)
8234 {
8235 if ((*xt_block)->offset + (*xt_block)->size
8236 == fragP->fr_address)
8237 (*xt_block)->size += fragP->fr_fix;
8238 else
8239 xt_block = &((*xt_block)->next);
8240 }
8241 if (*xt_block == NULL)
8242 {
8243 xtensa_block_info *new_block = (xtensa_block_info *)
8244 xmalloc (sizeof (xtensa_block_info));
8245 new_block->sec = sec;
8246 new_block->offset = fragP->fr_address;
8247 new_block->size = fragP->fr_fix;
8248 new_block->next = NULL;
8249 *xt_block = new_block;
8250 }
8251 }
8252 }
8253 }
8254}
8255
8256\f
8257/* Instruction Stack Functions (from "xtensa-istack.h"). */
8258
8259void
8260istack_init (stack)
8261 IStack *stack;
8262{
8263 memset (stack, 0, sizeof (IStack));
8264 stack->ninsn = 0;
8265}
8266
8267
8268bfd_boolean
8269istack_empty (stack)
8270 IStack *stack;
8271{
8272 return (stack->ninsn == 0);
8273}
8274
8275
8276bfd_boolean
8277istack_full (stack)
8278 IStack *stack;
8279{
8280 return (stack->ninsn == MAX_ISTACK);
8281}
8282
8283
8284/* Return a pointer to the top IStack entry.
8285 It is an error to call this if istack_empty () is true. */
8286
8287TInsn *
8288istack_top (stack)
8289 IStack *stack;
8290{
8291 int rec = stack->ninsn - 1;
8292 assert (!istack_empty (stack));
8293 return &stack->insn[rec];
8294}
8295
8296
8297/* Add a new TInsn to an IStack.
8298 It is an error to call this if istack_full () is true. */
8299
8300void
8301istack_push (stack, insn)
8302 IStack *stack;
8303 TInsn *insn;
8304{
8305 int rec = stack->ninsn;
8306 assert (!istack_full (stack));
8307 tinsn_copy (&stack->insn[rec], insn);
8308 stack->ninsn++;
8309}
8310
8311
8312/* Clear space for the next TInsn on the IStack and return a pointer
8313 to it. It is an error to call this if istack_full () is true. */
8314
8315TInsn *
8316istack_push_space (stack)
8317 IStack *stack;
8318{
8319 int rec = stack->ninsn;
8320 TInsn *insn;
8321 assert (!istack_full (stack));
8322 insn = &stack->insn[rec];
8323 memset (insn, 0, sizeof (TInsn));
8324 stack->ninsn++;
8325 return insn;
8326}
8327
8328
8329/* Remove the last pushed instruction. It is an error to call this if
8330 istack_empty () returns true. */
8331
8332void
8333istack_pop (stack)
8334 IStack *stack;
8335{
8336 int rec = stack->ninsn - 1;
8337 assert (!istack_empty (stack));
8338 stack->ninsn--;
8339 memset (&stack->insn[rec], 0, sizeof (TInsn));
8340}
8341
8342\f
8343/* TInsn functions. */
8344
8345void
8346tinsn_init (dst)
8347 TInsn *dst;
8348{
8349 memset (dst, 0, sizeof (TInsn));
8350}
8351
8352
8353void
8354tinsn_copy (dst, src)
8355 TInsn *dst;
8356 const TInsn *src;
8357{
8358 tinsn_init (dst);
8359 memcpy (dst, src, sizeof (TInsn));
8360}
8361
8362
8363/* Get the ``num''th token of the TInsn.
8364 It is illegal to call this if num > insn->ntoks. */
8365
8366expressionS *
8367tinsn_get_tok (insn, num)
8368 TInsn *insn;
8369 int num;
8370{
8371 assert (num < insn->ntok);
8372 return &insn->tok[num];
8373}
8374
8375
8376/* Return true if ANY of the operands in the insn are symbolic. */
8377
8378static bfd_boolean
8379tinsn_has_symbolic_operands (insn)
8380 const TInsn *insn;
8381{
8382 int i;
8383 int n = insn->ntok;
8384
8385 assert (insn->insn_type == ITYPE_INSN);
8386
8387 for (i = 0; i < n; ++i)
8388 {
8389 switch (insn->tok[i].X_op)
8390 {
8391 case O_register:
8392 case O_constant:
8393 break;
8394 default:
8395 return TRUE;
8396 }
8397 }
8398 return FALSE;
8399}
8400
8401
8402bfd_boolean
8403tinsn_has_invalid_symbolic_operands (insn)
8404 const TInsn *insn;
8405{
8406 int i;
8407 int n = insn->ntok;
8408
8409 assert (insn->insn_type == ITYPE_INSN);
8410
8411 for (i = 0; i < n; ++i)
8412 {
8413 switch (insn->tok[i].X_op)
8414 {
8415 case O_register:
8416 case O_constant:
8417 break;
8418 default:
8419 if (i == get_relaxable_immed (insn->opcode))
8420 break;
8421 as_bad (_("invalid symbolic operand %d on '%s'"),
8422 i, xtensa_opcode_name (xtensa_default_isa, insn->opcode));
8423 return TRUE;
8424 }
8425 }
8426 return FALSE;
8427}
8428
8429
8430/* For assembly code with complex expressions (e.g. subtraction),
8431 we have to build them in the literal pool so that
8432 their results are calculated correctly after relaxation.
8433 The relaxation only handles expressions that
8434 boil down to SYMBOL + OFFSET. */
8435
8436static bfd_boolean
8437tinsn_has_complex_operands (insn)
8438 const TInsn *insn;
8439{
8440 int i;
8441 int n = insn->ntok;
8442 assert (insn->insn_type == ITYPE_INSN);
8443 for (i = 0; i < n; ++i)
8444 {
8445 switch (insn->tok[i].X_op)
8446 {
8447 case O_register:
8448 case O_constant:
8449 case O_symbol:
8450 break;
8451 default:
8452 return TRUE;
8453 }
8454 }
8455 return FALSE;
8456}
8457
8458
8459/* Convert the constant operands in the t_insn to insnbuf.
8460 Return true if there is a symbol in the immediate field.
8461
8462 Before this is called,
8463 1) the number of operands are correct
8464 2) the t_insn is a ITYPE_INSN
8465 3) ONLY the relaxable_ is built
8466 4) All operands are O_constant, O_symbol. All constants fit
8467 The return value tells whether there are any remaining O_symbols. */
8468
8469static bfd_boolean
8470tinsn_to_insnbuf (t_insn, insnbuf)
8471 TInsn *t_insn;
8472 xtensa_insnbuf insnbuf;
8473{
8474 xtensa_isa isa = xtensa_default_isa;
8475 xtensa_opcode opcode = t_insn->opcode;
8476 bfd_boolean has_fixup = FALSE;
8477 int noperands = xtensa_num_operands (isa, opcode);
8478 int i;
8479 uint32 opnd_value;
8480 char *file_name;
8481 int line;
8482
8483 assert (t_insn->insn_type == ITYPE_INSN);
8484 if (noperands != t_insn->ntok)
8485 as_fatal (_("operand number mismatch"));
8486
8487 xtensa_encode_insn (isa, opcode, insnbuf);
8488
8489 for (i = 0; i < noperands; ++i)
8490 {
8491 expressionS *expr = &t_insn->tok[i];
8492 xtensa_operand operand = xtensa_get_operand (isa, opcode, i);
8493 switch (expr->X_op)
8494 {
8495 case O_register:
8496 /* The register number has already been checked in
8497 expression_maybe_register, so we don't need to check here. */
8498 opnd_value = expr->X_add_number;
8499 (void) xtensa_operand_encode (operand, &opnd_value);
8500 xtensa_operand_set_field (operand, insnbuf, opnd_value);
8501 break;
8502
8503 case O_constant:
8504 as_where (&file_name, &line);
8505 /* It is a constant and we called this function,
8506 then we have to try to fit it. */
8507 xtensa_insnbuf_set_operand (insnbuf, opcode, operand,
8508 expr->X_add_number, file_name, line);
8509 break;
8510
8511 case O_symbol:
8512 default:
8513 has_fixup = TRUE;
8514 break;
8515 }
8516 }
8517 return has_fixup;
8518}
8519
8520
8521/* Check the instruction arguments. Return true on failure. */
8522
8523bfd_boolean
8524tinsn_check_arguments (insn)
8525 const TInsn *insn;
8526{
8527 xtensa_isa isa = xtensa_default_isa;
8528 xtensa_opcode opcode = insn->opcode;
8529
8530 if (opcode == XTENSA_UNDEFINED)
8531 {
8532 as_bad (_("invalid opcode"));
8533 return TRUE;
8534 }
8535
8536 if (xtensa_num_operands (isa, opcode) > insn->ntok)
8537 {
8538 as_bad (_("too few operands"));
8539 return TRUE;
8540 }
8541
8542 if (xtensa_num_operands (isa, opcode) < insn->ntok)
8543 {
8544 as_bad (_("too many operands"));
8545 return TRUE;
8546 }
8547 return FALSE;
8548}
8549
8550
8551/* Load an instruction from its encoded form. */
8552
8553static void
8554tinsn_from_chars (t_insn, f)
8555 TInsn *t_insn;
8556 char *f;
8557{
8558 static xtensa_insnbuf insnbuf = NULL;
8559 int i;
8560 xtensa_opcode opcode;
8561 xtensa_isa isa = xtensa_default_isa;
8562
8563 if (!insnbuf)
8564 insnbuf = xtensa_insnbuf_alloc (isa);
8565
8566 xtensa_insnbuf_from_chars (isa, insnbuf, f);
8567 opcode = xtensa_decode_insn (isa, insnbuf);
8568
8569 /* Find the immed. */
8570 tinsn_init (t_insn);
8571 t_insn->insn_type = ITYPE_INSN;
8572 t_insn->is_specific_opcode = FALSE; /* Must not be specific. */
8573 t_insn->opcode = opcode;
8574 t_insn->ntok = xtensa_num_operands (isa, opcode);
8575 for (i = 0; i < t_insn->ntok; i++)
8576 {
8577 set_expr_const (&t_insn->tok[i],
8578 xtensa_insnbuf_get_operand (insnbuf, opcode, i));
8579 }
8580}
8581
8582
8583/* Read the value of the relaxable immed from the fr_symbol and fr_offset. */
8584
8585static void
8586tinsn_immed_from_frag (t_insn, fragP)
8587 TInsn *t_insn;
8588 fragS *fragP;
8589{
8590 xtensa_opcode opcode = t_insn->opcode;
8591 int opnum;
8592
8593 if (fragP->fr_symbol)
8594 {
8595 opnum = get_relaxable_immed (opcode);
8596 set_expr_symbol_offset (&t_insn->tok[opnum],
8597 fragP->fr_symbol, fragP->fr_offset);
8598 }
8599}
8600
8601
8602static int
8603get_num_stack_text_bytes (istack)
8604 IStack *istack;
8605{
8606 int i;
8607 int text_bytes = 0;
8608
8609 for (i = 0; i < istack->ninsn; i++)
8610 {
8611 TInsn *t_insn = &istack->insn[i];
8612 if (t_insn->insn_type == ITYPE_INSN)
8613 text_bytes += xg_get_insn_size (t_insn);
8614 }
8615 return text_bytes;
8616}
8617
8618
8619static int
8620get_num_stack_literal_bytes (istack)
8621 IStack *istack;
8622{
8623 int i;
8624 int lit_bytes = 0;
8625
8626 for (i = 0; i < istack->ninsn; i++)
8627 {
8628 TInsn *t_insn = &istack->insn[i];
8629
8630 if (t_insn->insn_type == ITYPE_LITERAL && t_insn->ntok == 1)
8631 lit_bytes += 4;
8632 }
8633 return lit_bytes;
8634}
8635
8636\f
8637/* Expression utilities. */
8638
8639/* Return true if the expression is an integer constant. */
8640
8641bfd_boolean
8642expr_is_const (s)
8643 const expressionS *s;
8644{
8645 return (s->X_op == O_constant);
8646}
8647
8648
8649/* Get the expression constant.
8650 Calling this is illegal if expr_is_const () returns true. */
8651
8652offsetT
8653get_expr_const (s)
8654 const expressionS *s;
8655{
8656 assert (expr_is_const (s));
8657 return s->X_add_number;
8658}
8659
8660
8661/* Set the expression to a constant value. */
8662
8663void
8664set_expr_const (s, val)
8665 expressionS *s;
8666 offsetT val;
8667{
8668 s->X_op = O_constant;
8669 s->X_add_number = val;
8670 s->X_add_symbol = NULL;
8671 s->X_op_symbol = NULL;
8672}
8673
8674
8675/* Set the expression to a symbol + constant offset. */
8676
8677void
8678set_expr_symbol_offset (s, sym, offset)
8679 expressionS *s;
8680 symbolS *sym;
8681 offsetT offset;
8682{
8683 s->X_op = O_symbol;
8684 s->X_add_symbol = sym;
8685 s->X_op_symbol = NULL; /* unused */
8686 s->X_add_number = offset;
8687}
8688
8689
8690bfd_boolean
8691expr_is_equal (s1, s2)
8692 expressionS *s1;
8693 expressionS *s2;
8694{
8695 if (s1->X_op != s2->X_op)
8696 return FALSE;
8697 if (s1->X_add_symbol != s2->X_add_symbol)
8698 return FALSE;
8699 if (s1->X_op_symbol != s2->X_op_symbol)
8700 return FALSE;
8701 if (s1->X_add_number != s2->X_add_number)
8702 return FALSE;
8703 return TRUE;
8704}
8705
8706
8707static void
8708copy_expr (dst, src)
8709 expressionS *dst;
8710 const expressionS *src;
8711{
8712 memcpy (dst, src, sizeof (expressionS));
8713}
8714
8715\f
8716/* Support for Tensilica's "--rename-section" option. */
8717
8718#ifdef XTENSA_SECTION_RENAME
8719
8720struct rename_section_struct
8721{
8722 char *old_name;
8723 char *new_name;
8724 struct rename_section_struct *next;
8725};
8726
8727static struct rename_section_struct *section_rename;
8728
8729
8730/* Parse the string oldname=new_name:oldname2=new_name2
8731 and call add_section_rename. */
8732
8733void
8734build_section_rename (arg)
8735 const char *arg;
8736{
8737 char *this_arg = NULL;
8738 char *next_arg = NULL;
8739
8740 for (this_arg = strdup (arg); this_arg != NULL; this_arg = next_arg)
8741 {
8742 if (this_arg)
8743 {
8744 next_arg = strchr (this_arg, ':');
8745 if (next_arg)
8746 {
8747 *next_arg = '\0';
8748 next_arg++;
8749 }
8750 }
8751 {
8752 char *old_name = this_arg;
8753 char *new_name = strchr (this_arg, '=');
8754
8755 if (*old_name == '\0')
8756 {
8757 as_warn (_("ignoring extra '-rename-section' delimiter ':'"));
8758 continue;
8759 }
8760 if (!new_name || new_name[1] == '\0')
8761 {
8762 as_warn (_("ignoring invalid '-rename-section' "
8763 "specification: '%s'"), old_name);
8764 continue;
8765 }
8766 *new_name = '\0';
8767 new_name++;
8768 add_section_rename (old_name, new_name);
8769 }
8770 }
8771}
8772
8773
8774static void
8775add_section_rename (old_name, new_name)
8776 char *old_name;
8777 char *new_name;
8778{
8779 struct rename_section_struct *r = section_rename;
8780
8781 /* Check for invalid section renaming. */
8782 for (r = section_rename; r != NULL; r = r->next)
8783 {
8784 if (strcmp (r->old_name, old_name) == 0)
8785 as_bad (_("section %s renamed multiple times"), old_name);
8786 if (strcmp (r->new_name, new_name) == 0)
8787 as_bad (_("multiple sections remapped to output section %s"),
8788 new_name);
8789 }
8790
8791 /* Now add it. */
8792 r = (struct rename_section_struct *)
8793 xmalloc (sizeof (struct rename_section_struct));
8794 r->old_name = strdup (old_name);
8795 r->new_name = strdup (new_name);
8796 r->next = section_rename;
8797 section_rename = r;
8798}
8799
8800
8801const char *
8802xtensa_section_rename (name)
8803 const char *name;
8804{
8805 struct rename_section_struct *r = section_rename;
8806
8807 for (r = section_rename; r != NULL; r = r->next)
8808 if (strcmp (r->old_name, name) == 0)
8809 return r->new_name;
8810
8811 return name;
8812}
8813
8814#endif /* XTENSA_SECTION_RENAME */
GDB Binutils - Deliverables
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