[deliverable/binutils-gdb.git] / gas / config / tc-xtensa.h

/* tc-xtensa.h -- Header file for tc-xtensa.c.
   Copyright (C) 2003, 2004 Free Software Foundation, Inc.

   This file is part of GAS, the GNU Assembler.

   GAS is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2, or (at your option)
   any later version.

   GAS is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with GAS; see the file COPYING.  If not, write to the Free
   Software Foundation, 59 Temple Place - Suite 330, Boston, MA
   02111-1307, USA.  */

#ifndef TC_XTENSA
#define TC_XTENSA 1

#ifdef ANSI_PROTOTYPES
struct fix;
#endif

#ifndef BFD_ASSEMBLER
#error Xtensa support requires BFD_ASSEMBLER
#endif

#ifndef OBJ_ELF
#error Xtensa support requires ELF object format
#endif

#include "xtensa-isa.h"
#include "xtensa-config.h"

#define TARGET_BYTES_BIG_ENDIAN XCHAL_HAVE_BE


/* Maximum number of opcode slots in a VLIW instruction.  */
#define MAX_SLOTS 31


/* For all xtensa relax states except RELAX_DESIRE_ALIGN and
   RELAX_DESIRE_ALIGN_IF_TARGET, the amount a frag might grow is stored
   in the fr_var field.  For the two exceptions, fr_var is a float value
   that records the frequency with which the following instruction is
   executed as a branch target.  The aligner uses this information to
   tell which targets are most important to be aligned.  */

enum xtensa_relax_statesE
{
  RELAX_ALIGN_NEXT_OPCODE,
  /* Use the first opcode of the next fragment to determine the
     alignment requirements.  This is ONLY used for LOOPs currently.  */

  RELAX_CHECK_ALIGN_NEXT_OPCODE,
  /* The next non-empty frag contains a loop instruction.  Check to see
     if it is correctly aligned, but do not align it.  */

  RELAX_DESIRE_ALIGN_IF_TARGET,
  /* These are placed in front of labels and converted to either
     RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before
     relaxation begins.  */

  RELAX_ADD_NOP_IF_A0_B_RETW,
  /* These are placed in front of conditional branches.  Before
     relaxation begins, they are turned into either NOPs for branches
     immediately followed by RETW or RETW.N or rs_fills of 0.  This is
     used to avoid a hardware bug in some early versions of the
     processor.  */

  RELAX_ADD_NOP_IF_PRE_LOOP_END,
  /* These are placed after JX instructions.  Before relaxation begins,
     they are turned into either NOPs, if the JX is one instruction
     before a loop end label, or rs_fills of 0.  This is used to avoid a
     hardware interlock issue prior to Xtensa version T1040.  */

  RELAX_ADD_NOP_IF_SHORT_LOOP,
  /* These are placed after LOOP instructions and turned into NOPs when:
     (1) there are less than 3 instructions in the loop; we place 2 of
     these in a row to add up to 2 NOPS in short loops; or (2) the
     instructions in the loop do not include a branch or jump.
     Otherwise they are turned into rs_fills of 0 before relaxation
     begins.  This is used to avoid hardware bug PR3830.  */

  RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
  /* These are placed after LOOP instructions and turned into NOPs if
     there are less than 12 bytes to the end of some other loop's end.
     Otherwise they are turned into rs_fills of 0 before relaxation
     begins.  This is used to avoid hardware bug PR3830.  */

  RELAX_DESIRE_ALIGN,
  /* The next fragment would like its first instruction to NOT cross an
     instruction fetch boundary.  */

  RELAX_MAYBE_DESIRE_ALIGN,
  /* The next fragment might like its first instruction to NOT cross an
     instruction fetch boundary.  These are placed after a branch that
     might be relaxed.  If the branch is relaxed, then this frag will be
     a branch target and this frag will be changed to RELAX_DESIRE_ALIGN
     frag.  */

  RELAX_LOOP_END,
  /* This will be turned into a NOP or NOP.N if the previous instruction
     is expanded to negate a loop.  */

  RELAX_LOOP_END_ADD_NOP,
  /* When the code density option is available, this will generate a
     NOP.N marked RELAX_NARROW.  Otherwise, it will create an rs_fill
     fragment with a NOP in it.  */

  RELAX_LITERAL,
  /* Another fragment could generate an expansion here but has not yet.  */

  RELAX_LITERAL_NR,
  /* Expansion has been generated by an instruction that generates a
     literal.  However, the stretch has NOT been reported yet in this
     fragment.  */

  RELAX_LITERAL_FINAL,
  /* Expansion has been generated by an instruction that generates a
     literal.  */

  RELAX_LITERAL_POOL_BEGIN,
  RELAX_LITERAL_POOL_END,
  /* Technically these are not relaxations at all but mark a location
     to store literals later.  Note that fr_var stores the frchain for
     BEGIN frags and fr_var stores now_seg for END frags.  */

  RELAX_NARROW,
  /* The last instruction in this fragment (at->fr_opcode) can be
     freely replaced with a single wider instruction if a future
     alignment desires or needs it.  */

  RELAX_IMMED,
  /* The last instruction in this fragment (at->fr_opcode) contains
     the value defined by fr_symbol (fr_offset = 0).  If the value
     does not fit, use the specified expansion.  This is similar to
     "NARROW", except that these may not be expanded in order to align
     code.  */
  
  RELAX_IMMED_STEP1,
  /* The last instruction in this fragment (at->fr_opcode) contains a
     literal.  It has already been expanded at least 1 step.  */

  RELAX_IMMED_STEP2,
  /* The last instruction in this fragment (at->fr_opcode) contains a
     literal.  It has already been expanded at least 2 steps.  */

  RELAX_SLOTS,
  /* There are instructions within the last VLIW instruction that need
     relaxation.  Find the relaxation based on the slot info in
     xtensa_frag_type.  Relaxations that deal with particular opcodes
     are slot-based (e.g., converting a MOVI to an L32R).  Relaxations
     that deal with entire instructions, such as alignment, are not
     slot-based.  */

  RELAX_FILL_NOP,
  /* This marks the location of a pipeline stall.  We can fill these guys
     in for alignment of any size.  */

  RELAX_UNREACHABLE,
  /* This marks the location as unreachable.  The assembler may widen or
     narrow this area to meet alignment requirements of nearby
     instructions.  */

  RELAX_MAYBE_UNREACHABLE,
  /* This marks the location as possibly unreachable.  These are placed
     after a branch that may be relaxed into a branch and jump. If the
     branch is relaxed, then this frag will be converted to a 
     RELAX_UNREACHABLE frag.  */

  RELAX_NONE
};

/* This is used as a stopper to bound the number of steps that
   can be taken.  */
#define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP2 - RELAX_IMMED)

struct xtensa_frag_type
{
  /* Info about the current state of assembly, e.g., transform,
     absolute_literals, etc.  These need to be passed to the backend and
     then to the object file.

     When is_assembly_state_set is false, the frag inherits some of the
     state settings from the previous frag in this segment.  Because it
     is not possible to intercept all fragment closures (frag_more and
     frag_append_1_char can close a frag), we use a pass after initial
     assembly to fill in the assembly states.  */

  unsigned int is_assembly_state_set : 1;
  unsigned int is_no_density : 1;
  unsigned int is_no_transform : 1;
  unsigned int use_absolute_literals : 1;

  /* Inhibits relaxation of machine-dependent alignment frags the
     first time through a relaxation....  */
  unsigned int relax_seen : 1;

  /* Infomation that is needed in the object file and set when known.  */
  unsigned int is_literal : 1;
  unsigned int is_loop_target : 1;
  unsigned int is_branch_target : 1;
  unsigned int is_insn : 1;
  unsigned int is_unreachable : 1;

  unsigned int is_specific_opcode : 1; /* also implies no_transform */

  unsigned int is_align : 1;
  unsigned int is_text_align : 1;
  unsigned int alignment : 5;

  /* A frag with this bit set is the first in a loop that actually
     contains an instruction.  */
  unsigned int is_first_loop_insn : 1;

  /* For text fragments that can generate literals at relax time, this
     variable points to the frag where the literal will be stored.  For
     literal frags, this variable points to the nearest literal pool
     location frag.  This literal frag will be moved to after this
     location.  */
  fragS *literal_frag;

  /* The destination segment for literal frags.  (Note that this is only
     valid after xtensa_move_literals.  */
  segT lit_seg;

  /* For the relaxation scheme, some literal fragments can have their
     expansions modified by an instruction that relaxes.  */
  int text_expansion[MAX_SLOTS];
  int literal_expansion[MAX_SLOTS];
  int unreported_expansion;

  /* For text fragments that can generate literals at relax time:  */
  fragS *literal_frags[MAX_SLOTS];
  enum xtensa_relax_statesE slot_subtypes[MAX_SLOTS];
  symbolS *slot_symbols[MAX_SLOTS];
  symbolS *slot_sub_symbols[MAX_SLOTS];
  offsetT slot_offsets[MAX_SLOTS];

  /* The global aligner needs to walk backward through the list of
     frags.  This field is only valid after xtensa_end.  */
  fragS *fr_prev;
};


/* For VLIW support, we need to know what slot a fixup applies to.  */
typedef struct xtensa_fix_data_struct
{
  int slot;
  symbolS *X_add_symbol;
  offsetT X_add_number;
} xtensa_fix_data;


/* Structure to record xtensa-specific symbol information.  */
typedef struct xtensa_symfield_type
{
  unsigned int is_loop_target : 1;
  unsigned int is_branch_target : 1;
} xtensa_symfield_type;


/* Structure for saving information about a block of property data
   for frags that have the same flags.   The forward reference is
   in this header file.  The actual definition is in tc-xtensa.c.  */
struct xtensa_block_info_struct;
typedef struct xtensa_block_info_struct xtensa_block_info;


/* Property section types.  */
typedef enum
{
  xt_literal_sec,
  xt_prop_sec,
  max_xt_sec
} xt_section_type;

typedef struct xtensa_segment_info_struct
{
  fragS *literal_pool_loc;
  xtensa_block_info *blocks[max_xt_sec];
} xtensa_segment_info;


/* Section renaming is only supported in Tensilica's version of GAS.  */
#ifdef XTENSA_SECTION_RENAME
extern const char *xtensa_section_rename (const char *);
#else
/* Tensilica's section renaming feature is not included here.  */
#define xtensa_section_rename(name)	(name)
#endif /* XTENSA_SECTION_RENAME */


extern const char *xtensa_target_format (void);
extern void xtensa_init_fix_data (struct fix *);
extern void xtensa_frag_init (fragS *);
extern int xtensa_force_relocation (struct fix *);
extern void xtensa_frob_label (struct symbol *);
extern void xtensa_end (void);
extern void xtensa_post_relax_hook (void);
extern void xtensa_file_arch_init (bfd *);
extern void xtensa_flush_pending_output (void);
extern bfd_boolean xtensa_fix_adjustable (struct fix *);
extern void xtensa_symbol_new_hook (symbolS *);
extern long xtensa_relax_frag (fragS *, long, int *);
extern void xtensa_elf_section_change_hook (void);
extern int xtensa_unrecognized_line (int);
extern bfd_boolean xtensa_check_inside_bundle (void);
extern void xtensa_handle_align (fragS *);

#define TARGET_FORMAT			xtensa_target_format ()
#define TARGET_ARCH			bfd_arch_xtensa
#define TC_SEGMENT_INFO_TYPE		xtensa_segment_info
#define TC_SYMFIELD_TYPE                struct xtensa_symfield_type
#define TC_FIX_TYPE			xtensa_fix_data
#define TC_INIT_FIX_DATA(x)		xtensa_init_fix_data (x)
#define TC_FRAG_TYPE			struct xtensa_frag_type
#define TC_FRAG_INIT(frag)		xtensa_frag_init (frag)
#define TC_FORCE_RELOCATION(fix)	xtensa_force_relocation (fix)
#define NO_PSEUDO_DOT			xtensa_check_inside_bundle ()
#define tc_canonicalize_symbol_name(s)	xtensa_section_rename (s)
#define tc_init_after_args()		xtensa_file_arch_init (stdoutput)
#define tc_fix_adjustable(fix)		xtensa_fix_adjustable (fix)
#define tc_frob_label(sym)		xtensa_frob_label (sym)
#define tc_unrecognized_line(ch)	xtensa_unrecognized_line (ch)
#define md_do_align(a,b,c,d,e)		xtensa_flush_pending_output ()
#define md_elf_section_change_hook	xtensa_elf_section_change_hook
#define md_elf_section_rename(name)	xtensa_section_rename (name)
#define md_end				xtensa_end
#define md_flush_pending_output()	xtensa_flush_pending_output ()
#define md_operand(x)
#define TEXT_SECTION_NAME		xtensa_section_rename (".text")
#define DATA_SECTION_NAME		xtensa_section_rename (".data")
#define BSS_SECTION_NAME		xtensa_section_rename (".bss")
#define HANDLE_ALIGN(fragP)		xtensa_handle_align (fragP)


/* The renumber_section function must be mapped over all the sections
   after calling xtensa_post_relax_hook.  That function is static in
   write.c so it cannot be called from xtensa_post_relax_hook itself.  */

#define md_post_relax_hook \
  do \
    { \
      int i = 0; \
      xtensa_post_relax_hook (); \
      bfd_map_over_sections (stdoutput, renumber_sections, &i); \
    } \
  while (0)


/* Because xtensa relaxation can insert a new literal into the middle of
   fragment and thus require re-running the relaxation pass on the
   section, we need an explicit flag here.  We explicitly use the name
   "stretched" here to avoid changing the source code in write.c.  */

#define md_relax_frag(segment, fragP, stretch) \
  xtensa_relax_frag (fragP, stretch, &stretched)


#define LOCAL_LABELS_FB 1
#define WORKING_DOT_WORD 1
#define DOUBLESLASH_LINE_COMMENTS
#define TC_HANDLES_FX_DONE
#define TC_FINALIZE_SYMS_BEFORE_SIZE_SEG 0
#define TC_LINKRELAX_FIXUP(SEG) 0
#define MD_APPLY_SYM_VALUE(FIX) 0
#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0


/* Resource reservation info functions.  */

/* Returns the number of copies of a particular unit.  */
typedef int (*unit_num_copies_func) (void *, xtensa_funcUnit);

/* Returns the number of units the opcode uses.  */
typedef int (*opcode_num_units_func) (void *, xtensa_opcode);

/* Given an opcode and an index into the opcode's funcUnit list, 
   returns the unit used for the index.  */
typedef int (*opcode_funcUnit_use_unit_func) (void *, xtensa_opcode, int);

/* Given an opcode and an index into the opcode's funcUnit list, 
   returns the cycle during which the unit is used.  */
typedef int (*opcode_funcUnit_use_stage_func) (void *, xtensa_opcode, int);

/* The above typedefs parameterize the resource_table so that the 
   optional scheduler doesn't need its own resource reservation system.
   
   For simple resource checking, which is all that happens normally, 
   the functions will be as follows (with some wrapping to make the 
   interface more convenient): 

   unit_num_copies_func = xtensa_funcUnit_num_copies
   opcode_num_units_func = xtensa_opcode_num_funcUnit_uses
   opcode_funcUnit_use_unit_func = xtensa_opcode_funcUnit_use->unit
   opcode_funcUnit_use_stage_func = xtensa_opcode_funcUnit_use->stage

   Of course the optional scheduler has its own reservation table 
   and functions.  */

int opcode_funcUnit_use_unit (void *, xtensa_opcode, int);
int opcode_funcUnit_use_stage (void *, xtensa_opcode, int);

typedef struct
{
  void *data;
  int cycles;
  int allocated_cycles;
  int num_units;
  unit_num_copies_func unit_num_copies;
  opcode_num_units_func opcode_num_units;
  opcode_funcUnit_use_unit_func opcode_unit_use;
  opcode_funcUnit_use_stage_func opcode_unit_stage;
  char **units;
} resource_table;

resource_table *new_resource_table 
  (void *, int, int, unit_num_copies_func, opcode_num_units_func, 
   opcode_funcUnit_use_unit_func, opcode_funcUnit_use_stage_func);
void resize_resource_table (resource_table *, int);
void clear_resource_table (resource_table *);
bfd_boolean resources_available (resource_table *, xtensa_opcode, int);
void reserve_resources (resource_table *, xtensa_opcode, int);
void release_resources (resource_table *, xtensa_opcode, int);

#endif /* TC_XTENSA */
Commit	Line	Data
e0001a05	1	/* tc-xtensa.h -- Header file for tc-xtensa.c.
43cd72b9	2	Copyright (C) 2003, 2004 Free Software Foundation, Inc.
e0001a05 NC	3
	4	This file is part of GAS, the GNU Assembler.
	5
	6	GAS is free software; you can redistribute it and/or modify
	7	it under the terms of the GNU General Public License as published by
	8	the Free Software Foundation; either version 2, or (at your option)
	9	any later version.
	10
	11	GAS is distributed in the hope that it will be useful,
	12	but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	GNU General Public License for more details.
	15
	16	You should have received a copy of the GNU General Public License
	17	along with GAS; see the file COPYING. If not, write to the Free
	18	Software Foundation, 59 Temple Place - Suite 330, Boston, MA
	19	02111-1307, USA. */
	20
	21	#ifndef TC_XTENSA
	22	#define TC_XTENSA 1
	23
	24	#ifdef ANSI_PROTOTYPES
	25	struct fix;
	26	#endif
	27
	28	#ifndef BFD_ASSEMBLER
	29	#error Xtensa support requires BFD_ASSEMBLER
	30	#endif
	31
	32	#ifndef OBJ_ELF
	33	#error Xtensa support requires ELF object format
	34	#endif
	35
43cd72b9	36	#include "xtensa-isa.h"
e0001a05 NC	37	#include "xtensa-config.h"
	38
	39	#define TARGET_BYTES_BIG_ENDIAN XCHAL_HAVE_BE
	40
	41
43cd72b9 BW	42	/* Maximum number of opcode slots in a VLIW instruction. */
	43	#define MAX_SLOTS 31
	44
	45
	46	/* For all xtensa relax states except RELAX_DESIRE_ALIGN and
	47	RELAX_DESIRE_ALIGN_IF_TARGET, the amount a frag might grow is stored
	48	in the fr_var field. For the two exceptions, fr_var is a float value
	49	that records the frequency with which the following instruction is
	50	executed as a branch target. The aligner uses this information to
	51	tell which targets are most important to be aligned. */
	52
	53	enum xtensa_relax_statesE
	54	{
	55	RELAX_ALIGN_NEXT_OPCODE,
	56	/* Use the first opcode of the next fragment to determine the
	57	alignment requirements. This is ONLY used for LOOPs currently. */
	58
	59	RELAX_CHECK_ALIGN_NEXT_OPCODE,
	60	/* The next non-empty frag contains a loop instruction. Check to see
	61	if it is correctly aligned, but do not align it. */
	62
	63	RELAX_DESIRE_ALIGN_IF_TARGET,
	64	/* These are placed in front of labels and converted to either
	65	RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before
	66	relaxation begins. */
	67
	68	RELAX_ADD_NOP_IF_A0_B_RETW,
	69	/* These are placed in front of conditional branches. Before
	70	relaxation begins, they are turned into either NOPs for branches
	71	immediately followed by RETW or RETW.N or rs_fills of 0. This is
	72	used to avoid a hardware bug in some early versions of the
	73	processor. */
	74
	75	RELAX_ADD_NOP_IF_PRE_LOOP_END,
	76	/* These are placed after JX instructions. Before relaxation begins,
	77	they are turned into either NOPs, if the JX is one instruction
	78	before a loop end label, or rs_fills of 0. This is used to avoid a
	79	hardware interlock issue prior to Xtensa version T1040. */
	80
	81	RELAX_ADD_NOP_IF_SHORT_LOOP,
	82	/* These are placed after LOOP instructions and turned into NOPs when:
	83	(1) there are less than 3 instructions in the loop; we place 2 of
	84	these in a row to add up to 2 NOPS in short loops; or (2) the
	85	instructions in the loop do not include a branch or jump.
	86	Otherwise they are turned into rs_fills of 0 before relaxation
	87	begins. This is used to avoid hardware bug PR3830. */
	88
	89	RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
	90	/* These are placed after LOOP instructions and turned into NOPs if
	91	there are less than 12 bytes to the end of some other loop's end.
	92	Otherwise they are turned into rs_fills of 0 before relaxation
	93	begins. This is used to avoid hardware bug PR3830. */
	94
	95	RELAX_DESIRE_ALIGN,
	96	/* The next fragment would like its first instruction to NOT cross an
	97	instruction fetch boundary. */
	98
	99	RELAX_MAYBE_DESIRE_ALIGN,
	100	/* The next fragment might like its first instruction to NOT cross an
	101	instruction fetch boundary. These are placed after a branch that
	102	might be relaxed. If the branch is relaxed, then this frag will be
	103	a branch target and this frag will be changed to RELAX_DESIRE_ALIGN
	104	frag. */
	105
106	RELAX_LOOP_END,
107	/* This will be turned into a NOP or NOP.N if the previous instruction
108	is expanded to negate a loop. */
109
110	RELAX_LOOP_END_ADD_NOP,
111	/* When the code density option is available, this will generate a
112	NOP.N marked RELAX_NARROW. Otherwise, it will create an rs_fill
113	fragment with a NOP in it. */
114
115	RELAX_LITERAL,
116	/* Another fragment could generate an expansion here but has not yet. */
117
118	RELAX_LITERAL_NR,
119	/* Expansion has been generated by an instruction that generates a
120	literal. However, the stretch has NOT been reported yet in this
121	fragment. */
122
123	RELAX_LITERAL_FINAL,
124	/* Expansion has been generated by an instruction that generates a
125	literal. */
126
127	RELAX_LITERAL_POOL_BEGIN,
128	RELAX_LITERAL_POOL_END,
129	/* Technically these are not relaxations at all but mark a location
130	to store literals later. Note that fr_var stores the frchain for
131	BEGIN frags and fr_var stores now_seg for END frags. */
132
133	RELAX_NARROW,
134	/* The last instruction in this fragment (at->fr_opcode) can be
135	freely replaced with a single wider instruction if a future
136	alignment desires or needs it. */
137
138	RELAX_IMMED,
139	/* The last instruction in this fragment (at->fr_opcode) contains
140	the value defined by fr_symbol (fr_offset = 0). If the value
141	does not fit, use the specified expansion. This is similar to
142	"NARROW", except that these may not be expanded in order to align
143	code. */
144
145	RELAX_IMMED_STEP1,
146	/* The last instruction in this fragment (at->fr_opcode) contains a
147	literal. It has already been expanded at least 1 step. */
148
149	RELAX_IMMED_STEP2,
150	/* The last instruction in this fragment (at->fr_opcode) contains a
151	literal. It has already been expanded at least 2 steps. */
152
153	RELAX_SLOTS,
154	/* There are instructions within the last VLIW instruction that need
155	relaxation. Find the relaxation based on the slot info in
156	xtensa_frag_type. Relaxations that deal with particular opcodes
157	are slot-based (e.g., converting a MOVI to an L32R). Relaxations
158	that deal with entire instructions, such as alignment, are not
159	slot-based. */
160
161	RELAX_FILL_NOP,
162	/* This marks the location of a pipeline stall. We can fill these guys
163	in for alignment of any size. */
164
165	RELAX_UNREACHABLE,
166	/* This marks the location as unreachable. The assembler may widen or
167	narrow this area to meet alignment requirements of nearby
168	instructions. */
169
170	RELAX_MAYBE_UNREACHABLE,
171	/* This marks the location as possibly unreachable. These are placed
172	after a branch that may be relaxed into a branch and jump. If the
173	branch is relaxed, then this frag will be converted to a
174	RELAX_UNREACHABLE frag. */
175
176	RELAX_NONE
177	};
178
179	/* This is used as a stopper to bound the number of steps that
180	can be taken. */
181	#define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP2 - RELAX_IMMED)
182
e0001a05 NC	183	struct xtensa_frag_type
e0001a05 NC	184	{
43cd72b9 BW	185	/* Info about the current state of assembly, e.g., transform,
	186	absolute_literals, etc. These need to be passed to the backend and
	187	then to the object file.
	188
	189	When is_assembly_state_set is false, the frag inherits some of the
	190	state settings from the previous frag in this segment. Because it
	191	is not possible to intercept all fragment closures (frag_more and
	192	frag_append_1_char can close a frag), we use a pass after initial
	193	assembly to fill in the assembly states. */
	194
	195	unsigned int is_assembly_state_set : 1;
	196	unsigned int is_no_density : 1;
	197	unsigned int is_no_transform : 1;
	198	unsigned int use_absolute_literals : 1;
	199
	200	/* Inhibits relaxation of machine-dependent alignment frags the
	201	first time through a relaxation.... */
	202	unsigned int relax_seen : 1;
	203
	204	/* Infomation that is needed in the object file and set when known. */
	205	unsigned int is_literal : 1;
	206	unsigned int is_loop_target : 1;
	207	unsigned int is_branch_target : 1;
	208	unsigned int is_insn : 1;
	209	unsigned int is_unreachable : 1;
e0001a05	210
43cd72b9	211	unsigned int is_specific_opcode : 1; /* also implies no_transform */
e0001a05	212
43cd72b9 BW	213	unsigned int is_align : 1;
	214	unsigned int is_text_align : 1;
	215	unsigned int alignment : 5;
	216
	217	/* A frag with this bit set is the first in a loop that actually
	218	contains an instruction. */
	219	unsigned int is_first_loop_insn : 1;
e0001a05 NC	220
	221	/* For text fragments that can generate literals at relax time, this
	222	variable points to the frag where the literal will be stored. For
	223	literal frags, this variable points to the nearest literal pool
	224	location frag. This literal frag will be moved to after this
	225	location. */
e0001a05 NC	226	fragS *literal_frag;
	227
	228	/* The destination segment for literal frags. (Note that this is only
	229	valid after xtensa_move_literals. */
e0001a05 NC	230	segT lit_seg;
	231
	232	/* For the relaxation scheme, some literal fragments can have their
	233	expansions modified by an instruction that relaxes. */
43cd72b9 BW	234	int text_expansion[MAX_SLOTS];
	235	int literal_expansion[MAX_SLOTS];
	236	int unreported_expansion;
	237
	238	/* For text fragments that can generate literals at relax time: */
	239	fragS *literal_frags[MAX_SLOTS];
	240	enum xtensa_relax_statesE slot_subtypes[MAX_SLOTS];
	241	symbolS *slot_symbols[MAX_SLOTS];
	242	symbolS *slot_sub_symbols[MAX_SLOTS];
	243	offsetT slot_offsets[MAX_SLOTS];
	244
	245	/* The global aligner needs to walk backward through the list of
	246	frags. This field is only valid after xtensa_end. */
	247	fragS *fr_prev;
e0001a05 NC	248	};
e0001a05 NC	249
43cd72b9 BW	250
	251	/* For VLIW support, we need to know what slot a fixup applies to. */
	252	typedef struct xtensa_fix_data_struct
	253	{
	254	int slot;
	255	symbolS *X_add_symbol;
	256	offsetT X_add_number;
	257	} xtensa_fix_data;
	258
	259
	260	/* Structure to record xtensa-specific symbol information. */
	261	typedef struct xtensa_symfield_type
e0001a05	262	{
43cd72b9 BW	263	unsigned int is_loop_target : 1;
	264	unsigned int is_branch_target : 1;
	265	} xtensa_symfield_type;
	266
	267
	268	/* Structure for saving information about a block of property data
	269	for frags that have the same flags. The forward reference is
	270	in this header file. The actual definition is in tc-xtensa.c. */
	271	struct xtensa_block_info_struct;
	272	typedef struct xtensa_block_info_struct xtensa_block_info;
	273
e0001a05	274
43cd72b9	275	/* Property section types. */
e0001a05 NC	276	typedef enum
e0001a05 NC	277	{
e0001a05	278	xt_literal_sec,
43cd72b9	279	xt_prop_sec,
e0001a05 NC	280	max_xt_sec
	281	} xt_section_type;
	282
	283	typedef struct xtensa_segment_info_struct
	284	{
	285	fragS *literal_pool_loc;
	286	xtensa_block_info *blocks[max_xt_sec];
	287	} xtensa_segment_info;
	288
e0001a05 NC	289
e0001a05 NC	290	/* Section renaming is only supported in Tensilica's version of GAS. */
43cd72b9	291	#ifdef XTENSA_SECTION_RENAME
7fa3d080	292	extern const char xtensa_section_rename (const char );
e0001a05 NC	293	#else
	294	/* Tensilica's section renaming feature is not included here. */
	295	#define xtensa_section_rename(name) (name)
	296	#endif /* XTENSA_SECTION_RENAME */
	297
	298
7fa3d080 BW	299	extern const char *xtensa_target_format (void);
	300	extern void xtensa_init_fix_data (struct fix *);
	301	extern void xtensa_frag_init (fragS *);
	302	extern int xtensa_force_relocation (struct fix *);
	303	extern void xtensa_frob_label (struct symbol *);
	304	extern void xtensa_end (void);
	305	extern void xtensa_post_relax_hook (void);
	306	extern void xtensa_file_arch_init (bfd *);
	307	extern void xtensa_flush_pending_output (void);
	308	extern bfd_boolean xtensa_fix_adjustable (struct fix *);
	309	extern void xtensa_symbol_new_hook (symbolS *);
	310	extern long xtensa_relax_frag (fragS , long, int );
	311	extern void xtensa_elf_section_change_hook (void);
	312	extern int xtensa_unrecognized_line (int);
	313	extern bfd_boolean xtensa_check_inside_bundle (void);
	314	extern void xtensa_handle_align (fragS *);
e0001a05 NC	315
	316	#define TARGET_FORMAT xtensa_target_format ()
	317	#define TARGET_ARCH bfd_arch_xtensa
	318	#define TC_SEGMENT_INFO_TYPE xtensa_segment_info
43cd72b9 BW	319	#define TC_SYMFIELD_TYPE struct xtensa_symfield_type
	320	#define TC_FIX_TYPE xtensa_fix_data
	321	#define TC_INIT_FIX_DATA(x) xtensa_init_fix_data (x)
e0001a05 NC	322	#define TC_FRAG_TYPE struct xtensa_frag_type
e0001a05 NC	323	#define TC_FRAG_INIT(frag) xtensa_frag_init (frag)
43cd72b9 BW	324	#define TC_FORCE_RELOCATION(fix) xtensa_force_relocation (fix)
43cd72b9 BW	325	#define NO_PSEUDO_DOT xtensa_check_inside_bundle ()
e0001a05 NC	326	#define tc_canonicalize_symbol_name(s) xtensa_section_rename (s)
	327	#define tc_init_after_args() xtensa_file_arch_init (stdoutput)
	328	#define tc_fix_adjustable(fix) xtensa_fix_adjustable (fix)
	329	#define tc_frob_label(sym) xtensa_frob_label (sym)
43cd72b9 BW	330	#define tc_unrecognized_line(ch) xtensa_unrecognized_line (ch)
	331	#define md_do_align(a,b,c,d,e) xtensa_flush_pending_output ()
	332	#define md_elf_section_change_hook xtensa_elf_section_change_hook
e0001a05 NC	333	#define md_elf_section_rename(name) xtensa_section_rename (name)
	334	#define md_end xtensa_end
	335	#define md_flush_pending_output() xtensa_flush_pending_output ()
	336	#define md_operand(x)
	337	#define TEXT_SECTION_NAME xtensa_section_rename (".text")
	338	#define DATA_SECTION_NAME xtensa_section_rename (".data")
	339	#define BSS_SECTION_NAME xtensa_section_rename (".bss")
43cd72b9	340	#define HANDLE_ALIGN(fragP) xtensa_handle_align (fragP)
e0001a05 NC	341
	342
	343	/* The renumber_section function must be mapped over all the sections
	344	after calling xtensa_post_relax_hook. That function is static in
	345	write.c so it cannot be called from xtensa_post_relax_hook itself. */
	346
	347	#define md_post_relax_hook \
	348	do \
	349	{ \
	350	int i = 0; \
	351	xtensa_post_relax_hook (); \
	352	bfd_map_over_sections (stdoutput, renumber_sections, &i); \
	353	} \
	354	while (0)
	355
	356
	357	/* Because xtensa relaxation can insert a new literal into the middle of
	358	fragment and thus require re-running the relaxation pass on the
	359	section, we need an explicit flag here. We explicitly use the name
	360	"stretched" here to avoid changing the source code in write.c. */
	361
	362	#define md_relax_frag(segment, fragP, stretch) \
	363	xtensa_relax_frag (fragP, stretch, &stretched)
	364
	365
	366	#define LOCAL_LABELS_FB 1
	367	#define WORKING_DOT_WORD 1
	368	#define DOUBLESLASH_LINE_COMMENTS
	369	#define TC_HANDLES_FX_DONE
	370	#define TC_FINALIZE_SYMS_BEFORE_SIZE_SEG 0
43cd72b9	371	#define TC_LINKRELAX_FIXUP(SEG) 0
e0001a05	372	#define MD_APPLY_SYM_VALUE(FIX) 0
43cd72b9 BW	373	#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0
	374
	375
	376	/* Resource reservation info functions. */
	377
	378	/* Returns the number of copies of a particular unit. */
	379	typedef int (unit_num_copies_func) (void , xtensa_funcUnit);
	380
	381	/* Returns the number of units the opcode uses. */
	382	typedef int (opcode_num_units_func) (void , xtensa_opcode);
	383
	384	/* Given an opcode and an index into the opcode's funcUnit list,
	385	returns the unit used for the index. */
	386	typedef int (opcode_funcUnit_use_unit_func) (void , xtensa_opcode, int);
	387
	388	/* Given an opcode and an index into the opcode's funcUnit list,
	389	returns the cycle during which the unit is used. */
	390	typedef int (opcode_funcUnit_use_stage_func) (void , xtensa_opcode, int);
	391
	392	/* The above typedefs parameterize the resource_table so that the
	393	optional scheduler doesn't need its own resource reservation system.
	394
	395	For simple resource checking, which is all that happens normally,
	396	the functions will be as follows (with some wrapping to make the
	397	interface more convenient):
	398
	399	unit_num_copies_func = xtensa_funcUnit_num_copies
	400	opcode_num_units_func = xtensa_opcode_num_funcUnit_uses
	401	opcode_funcUnit_use_unit_func = xtensa_opcode_funcUnit_use->unit
	402	opcode_funcUnit_use_stage_func = xtensa_opcode_funcUnit_use->stage
	403
	404	Of course the optional scheduler has its own reservation table
	405	and functions. */
	406
7fa3d080 BW	407	int opcode_funcUnit_use_unit (void *, xtensa_opcode, int);
7fa3d080 BW	408	int opcode_funcUnit_use_stage (void *, xtensa_opcode, int);
43cd72b9 BW	409
	410	typedef struct
	411	{
	412	void *data;
	413	int cycles;
	414	int allocated_cycles;
	415	int num_units;
	416	unit_num_copies_func unit_num_copies;
	417	opcode_num_units_func opcode_num_units;
	418	opcode_funcUnit_use_unit_func opcode_unit_use;
	419	opcode_funcUnit_use_stage_func opcode_unit_stage;
	420	char **units;
	421	} resource_table;
	422
	423	resource_table *new_resource_table
7fa3d080 BW	424	(void *, int, int, unit_num_copies_func, opcode_num_units_func,
	425	opcode_funcUnit_use_unit_func, opcode_funcUnit_use_stage_func);
	426	void resize_resource_table (resource_table *, int);
	427	void clear_resource_table (resource_table *);
	428	bfd_boolean resources_available (resource_table *, xtensa_opcode, int);
	429	void reserve_resources (resource_table *, xtensa_opcode, int);
	430	void release_resources (resource_table *, xtensa_opcode, int);
e0001a05	431
e0001a05	432	#endif /* TC_XTENSA */