[deliverable/binutils-gdb.git] / gas / config / tc-xtensa.h

/* tc-xtensa.h -- Header file for tc-xtensa.c.
   Copyright (C) 2003, 2004, 2005, 2007 Free Software Foundation, Inc.

   This file is part of GAS, the GNU Assembler.

   GAS is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2, or (at your option)
   any later version.

   GAS is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with GAS; see the file COPYING.  If not, write to the Free
   Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
   02110-1301, USA.  */

#ifndef TC_XTENSA
#define TC_XTENSA 1

struct fix;

#ifndef OBJ_ELF
#error Xtensa support requires ELF object format
#endif

#include "xtensa-isa.h"
#include "xtensa-config.h"

#define TARGET_BYTES_BIG_ENDIAN XCHAL_HAVE_BE


/* Maximum number of opcode slots in a VLIW instruction.  */
#define MAX_SLOTS 15


/* For all xtensa relax states except RELAX_DESIRE_ALIGN and
   RELAX_DESIRE_ALIGN_IF_TARGET, the amount a frag might grow is stored
   in the fr_var field.  For the two exceptions, fr_var is a float value
   that records the frequency with which the following instruction is
   executed as a branch target.  The aligner uses this information to
   tell which targets are most important to be aligned.  */

enum xtensa_relax_statesE
{
  RELAX_ALIGN_NEXT_OPCODE,
  /* Use the first opcode of the next fragment to determine the
     alignment requirements.  This is ONLY used for LOOPs currently.  */

  RELAX_CHECK_ALIGN_NEXT_OPCODE,
  /* The next non-empty frag contains a loop instruction.  Check to see
     if it is correctly aligned, but do not align it.  */

  RELAX_DESIRE_ALIGN_IF_TARGET,
  /* These are placed in front of labels and converted to either
     RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before
     relaxation begins.  */

  RELAX_ADD_NOP_IF_A0_B_RETW,
  /* These are placed in front of conditional branches.  Before
     relaxation begins, they are turned into either NOPs for branches
     immediately followed by RETW or RETW.N or rs_fills of 0.  This is
     used to avoid a hardware bug in some early versions of the
     processor.  */

  RELAX_ADD_NOP_IF_PRE_LOOP_END,
  /* These are placed after JX instructions.  Before relaxation begins,
     they are turned into either NOPs, if the JX is one instruction
     before a loop end label, or rs_fills of 0.  This is used to avoid a
     hardware interlock issue prior to Xtensa version T1040.  */

  RELAX_ADD_NOP_IF_SHORT_LOOP,
  /* These are placed after LOOP instructions and turned into NOPs when:
     (1) there are less than 3 instructions in the loop; we place 2 of
     these in a row to add up to 2 NOPS in short loops; or (2) the
     instructions in the loop do not include a branch or jump.
     Otherwise they are turned into rs_fills of 0 before relaxation
     begins.  This is used to avoid hardware bug PR3830.  */

  RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
  /* These are placed after LOOP instructions and turned into NOPs if
     there are less than 12 bytes to the end of some other loop's end.
     Otherwise they are turned into rs_fills of 0 before relaxation
     begins.  This is used to avoid hardware bug PR3830.  */

  RELAX_DESIRE_ALIGN,
  /* The next fragment would like its first instruction to NOT cross an
     instruction fetch boundary.  */

  RELAX_MAYBE_DESIRE_ALIGN,
  /* The next fragment might like its first instruction to NOT cross an
     instruction fetch boundary.  These are placed after a branch that
     might be relaxed.  If the branch is relaxed, then this frag will be
     a branch target and this frag will be changed to RELAX_DESIRE_ALIGN
     frag.  */

  RELAX_LOOP_END,
  /* This will be turned into a NOP or NOP.N if the previous instruction
     is expanded to negate a loop.  */

  RELAX_LOOP_END_ADD_NOP,
  /* When the code density option is available, this will generate a
     NOP.N marked RELAX_NARROW.  Otherwise, it will create an rs_fill
     fragment with a NOP in it.  */

  RELAX_LITERAL,
  /* Another fragment could generate an expansion here but has not yet.  */

  RELAX_LITERAL_NR,
  /* Expansion has been generated by an instruction that generates a
     literal.  However, the stretch has NOT been reported yet in this
     fragment.  */

  RELAX_LITERAL_FINAL,
  /* Expansion has been generated by an instruction that generates a
     literal.  */

  RELAX_LITERAL_POOL_BEGIN,
  RELAX_LITERAL_POOL_END,
  /* Technically these are not relaxations at all but mark a location
     to store literals later.  Note that fr_var stores the frchain for
     BEGIN frags and fr_var stores now_seg for END frags.  */

  RELAX_NARROW,
  /* The last instruction in this fragment (at->fr_opcode) can be
     freely replaced with a single wider instruction if a future
     alignment desires or needs it.  */

  RELAX_IMMED,
  /* The last instruction in this fragment (at->fr_opcode) contains
     the value defined by fr_symbol (fr_offset = 0).  If the value
     does not fit, use the specified expansion.  This is similar to
     "NARROW", except that these may not be expanded in order to align
     code.  */

  RELAX_IMMED_STEP1,
  /* The last instruction in this fragment (at->fr_opcode) contains a
     literal.  It has already been expanded at least 1 step.  */

  RELAX_IMMED_STEP2,
  /* The last instruction in this fragment (at->fr_opcode) contains a
     literal.  It has already been expanded at least 2 steps.  */

  RELAX_SLOTS,
  /* There are instructions within the last VLIW instruction that need
     relaxation.  Find the relaxation based on the slot info in
     xtensa_frag_type.  Relaxations that deal with particular opcodes
     are slot-based (e.g., converting a MOVI to an L32R).  Relaxations
     that deal with entire instructions, such as alignment, are not
     slot-based.  */

  RELAX_FILL_NOP,
  /* This marks the location of a pipeline stall.  We can fill these guys
     in for alignment of any size.  */

  RELAX_UNREACHABLE,
  /* This marks the location as unreachable.  The assembler may widen or
     narrow this area to meet alignment requirements of nearby
     instructions.  */

  RELAX_MAYBE_UNREACHABLE,
  /* This marks the location as possibly unreachable.  These are placed
     after a branch that may be relaxed into a branch and jump. If the
     branch is relaxed, then this frag will be converted to a
     RELAX_UNREACHABLE frag.  */

  RELAX_NONE
};

/* This is used as a stopper to bound the number of steps that
   can be taken.  */
#define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP2 - RELAX_IMMED)

struct xtensa_frag_type
{
  /* Info about the current state of assembly, e.g., transform,
     absolute_literals, etc.  These need to be passed to the backend and
     then to the object file.

     When is_assembly_state_set is false, the frag inherits some of the
     state settings from the previous frag in this segment.  Because it
     is not possible to intercept all fragment closures (frag_more and
     frag_append_1_char can close a frag), we use a pass after initial
     assembly to fill in the assembly states.  */

  unsigned int is_assembly_state_set : 1;
  unsigned int is_no_density : 1;
  unsigned int is_no_transform : 1;
  unsigned int use_longcalls : 1;
  unsigned int use_absolute_literals : 1;

  /* Inhibits relaxation of machine-dependent alignment frags the
     first time through a relaxation....  */
  unsigned int relax_seen : 1;

  /* Information that is needed in the object file and set when known.  */
  unsigned int is_literal : 1;
  unsigned int is_loop_target : 1;
  unsigned int is_branch_target : 1;
  unsigned int is_insn : 1;
  unsigned int is_unreachable : 1;

  unsigned int is_specific_opcode : 1; /* also implies no_transform */

  unsigned int is_align : 1;
  unsigned int is_text_align : 1;
  unsigned int alignment : 5;

  /* A frag with this bit set is the first in a loop that actually
     contains an instruction.  */
  unsigned int is_first_loop_insn : 1;

  /* A frag with this bit set is a branch that we are using to
     align branch targets as if it were a normal narrow instruction.  */
  unsigned int is_aligning_branch : 1;

  /* For text fragments that can generate literals at relax time, this
     variable points to the frag where the literal will be stored.  For
     literal frags, this variable points to the nearest literal pool
     location frag.  This literal frag will be moved to after this
     location.  */
  fragS *literal_frag;

  /* The destination segment for literal frags.  (Note that this is only
     valid after xtensa_move_literals.)  This field is also used for
     LITERAL_POOL_END frags.  */
  segT lit_seg;

  /* Frag chain for LITERAL_POOL_BEGIN frags.  */
  struct frchain *lit_frchain;

  /* For the relaxation scheme, some literal fragments can have their
     expansions modified by an instruction that relaxes.  */
  int text_expansion[MAX_SLOTS];
  int literal_expansion[MAX_SLOTS];
  int unreported_expansion;

  /* For text fragments that can generate literals at relax time:  */
  fragS *literal_frags[MAX_SLOTS];
  enum xtensa_relax_statesE slot_subtypes[MAX_SLOTS];
  symbolS *slot_symbols[MAX_SLOTS];
  offsetT slot_offsets[MAX_SLOTS];

  /* The global aligner needs to walk backward through the list of
     frags.  This field is only valid after xtensa_end.  */
  fragS *fr_prev;
};


/* For VLIW support, we need to know what slot a fixup applies to.  */
typedef struct xtensa_fix_data_struct
{
  int slot;
  symbolS *X_add_symbol;
  offsetT X_add_number;
} xtensa_fix_data;


/* Structure to record xtensa-specific symbol information.  */
typedef struct xtensa_symfield_type
{
  unsigned int is_loop_target : 1;
  unsigned int is_branch_target : 1;
} xtensa_symfield_type;


/* Structure for saving information about a block of property data
   for frags that have the same flags.   The forward reference is
   in this header file.  The actual definition is in tc-xtensa.c.  */
struct xtensa_block_info_struct;
typedef struct xtensa_block_info_struct xtensa_block_info;


/* Property section types.  */
typedef enum
{
  xt_literal_sec,
  xt_prop_sec,
  max_xt_sec
} xt_section_type;

typedef struct xtensa_segment_info_struct
{
  fragS *literal_pool_loc;
  xtensa_block_info *blocks[max_xt_sec];
} xtensa_segment_info;


extern const char *xtensa_target_format (void);
extern void xtensa_init_fix_data (struct fix *);
extern void xtensa_frag_init (fragS *);
extern int xtensa_force_relocation (struct fix *);
extern int xtensa_validate_fix_sub (struct fix *);
extern void xtensa_frob_label (struct symbol *);
extern void xtensa_end (void);
extern void xtensa_post_relax_hook (void);
extern void xtensa_file_arch_init (bfd *);
extern void xtensa_flush_pending_output (void);
extern bfd_boolean xtensa_fix_adjustable (struct fix *);
extern void xtensa_symbol_new_hook (symbolS *);
extern long xtensa_relax_frag (fragS *, long, int *);
extern void xtensa_elf_section_change_hook (void);
extern int xtensa_unrecognized_line (int);
extern bfd_boolean xtensa_check_inside_bundle (void);
extern void xtensa_handle_align (fragS *);
extern char *xtensa_section_rename (char *);

#define TARGET_FORMAT			xtensa_target_format ()
#define TARGET_ARCH			bfd_arch_xtensa
#define TC_SEGMENT_INFO_TYPE		xtensa_segment_info
#define TC_SYMFIELD_TYPE                struct xtensa_symfield_type
#define TC_FIX_TYPE			xtensa_fix_data
#define TC_INIT_FIX_DATA(x)		xtensa_init_fix_data (x)
#define TC_FRAG_TYPE			struct xtensa_frag_type
#define TC_FRAG_INIT(frag)		xtensa_frag_init (frag)
#define TC_FORCE_RELOCATION(fix)	xtensa_force_relocation (fix)
#define TC_FORCE_RELOCATION_SUB_SAME(fix, seg) \
  (! SEG_NORMAL (seg) || xtensa_force_relocation (fix))
#define	TC_VALIDATE_FIX_SUB(fix)	xtensa_validate_fix_sub (fix)
#define NO_PSEUDO_DOT			xtensa_check_inside_bundle ()
#define tc_canonicalize_symbol_name(s)	xtensa_section_rename (s)
#define tc_canonicalize_section_name(s)	xtensa_section_rename (s)
#define tc_init_after_args()		xtensa_file_arch_init (stdoutput)
#define tc_fix_adjustable(fix)		xtensa_fix_adjustable (fix)
#define tc_frob_label(sym)		xtensa_frob_label (sym)
#define tc_unrecognized_line(ch)	xtensa_unrecognized_line (ch)
#define md_do_align(a,b,c,d,e)		xtensa_flush_pending_output ()
#define md_elf_section_change_hook	xtensa_elf_section_change_hook
#define md_end				xtensa_end
#define md_flush_pending_output()	xtensa_flush_pending_output ()
#define md_operand(x)
#define TEXT_SECTION_NAME		xtensa_section_rename (".text")
#define DATA_SECTION_NAME		xtensa_section_rename (".data")
#define BSS_SECTION_NAME		xtensa_section_rename (".bss")
#define HANDLE_ALIGN(fragP)		xtensa_handle_align (fragP)
#define MAX_MEM_FOR_RS_ALIGN_CODE	1


/* The renumber_section function must be mapped over all the sections
   after calling xtensa_post_relax_hook.  That function is static in
   write.c so it cannot be called from xtensa_post_relax_hook itself.  */

#define md_post_relax_hook \
  do \
    { \
      int i = 0; \
      xtensa_post_relax_hook (); \
      bfd_map_over_sections (stdoutput, renumber_sections, &i); \
    } \
  while (0)


/* Because xtensa relaxation can insert a new literal into the middle of
   fragment and thus require re-running the relaxation pass on the
   section, we need an explicit flag here.  We explicitly use the name
   "stretched" here to avoid changing the source code in write.c.  */

#define md_relax_frag(segment, fragP, stretch) \
  xtensa_relax_frag (fragP, stretch, &stretched)


#define LOCAL_LABELS_FB 1
#define WORKING_DOT_WORD 1
#define DOUBLESLASH_LINE_COMMENTS
#define TC_HANDLES_FX_DONE
#define TC_FINALIZE_SYMS_BEFORE_SIZE_SEG 0
#define TC_LINKRELAX_FIXUP(SEG) 0
#define MD_APPLY_SYM_VALUE(FIX) 0
#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0

/* Use line number format that is amenable to linker relaxation.  */
#define DWARF2_USE_FIXED_ADVANCE_PC (linkrelax != 0)


/* Resource reservation info functions.  */

/* Returns the number of copies of a particular unit.  */
typedef int (*unit_num_copies_func) (void *, xtensa_funcUnit);

/* Returns the number of units the opcode uses.  */
typedef int (*opcode_num_units_func) (void *, xtensa_opcode);

/* Given an opcode and an index into the opcode's funcUnit list,
   returns the unit used for the index.  */
typedef int (*opcode_funcUnit_use_unit_func) (void *, xtensa_opcode, int);

/* Given an opcode and an index into the opcode's funcUnit list,
   returns the cycle during which the unit is used.  */
typedef int (*opcode_funcUnit_use_stage_func) (void *, xtensa_opcode, int);

/* The above typedefs parameterize the resource_table so that the
   optional scheduler doesn't need its own resource reservation system.

   For simple resource checking, which is all that happens normally,
   the functions will be as follows (with some wrapping to make the
   interface more convenient):

   unit_num_copies_func = xtensa_funcUnit_num_copies
   opcode_num_units_func = xtensa_opcode_num_funcUnit_uses
   opcode_funcUnit_use_unit_func = xtensa_opcode_funcUnit_use->unit
   opcode_funcUnit_use_stage_func = xtensa_opcode_funcUnit_use->stage

   Of course the optional scheduler has its own reservation table
   and functions.  */

int opcode_funcUnit_use_unit (void *, xtensa_opcode, int);
int opcode_funcUnit_use_stage (void *, xtensa_opcode, int);

typedef struct
{
  void *data;
  int cycles;
  int allocated_cycles;
  int num_units;
  unit_num_copies_func unit_num_copies;
  opcode_num_units_func opcode_num_units;
  opcode_funcUnit_use_unit_func opcode_unit_use;
  opcode_funcUnit_use_stage_func opcode_unit_stage;
  unsigned char **units;
} resource_table;

resource_table *new_resource_table
  (void *, int, int, unit_num_copies_func, opcode_num_units_func,
   opcode_funcUnit_use_unit_func, opcode_funcUnit_use_stage_func);
void resize_resource_table (resource_table *, int);
void clear_resource_table (resource_table *);
bfd_boolean resources_available (resource_table *, xtensa_opcode, int);
void reserve_resources (resource_table *, xtensa_opcode, int);
void release_resources (resource_table *, xtensa_opcode, int);

#endif /* TC_XTENSA */
Commit	Line	Data
e0001a05	1	/* tc-xtensa.h -- Header file for tc-xtensa.c.
63a7429b	2	Copyright (C) 2003, 2004, 2005, 2007 Free Software Foundation, Inc.
e0001a05 NC	3
	4	This file is part of GAS, the GNU Assembler.
	5
	6	GAS is free software; you can redistribute it and/or modify
	7	it under the terms of the GNU General Public License as published by
	8	the Free Software Foundation; either version 2, or (at your option)
	9	any later version.
	10
	11	GAS is distributed in the hope that it will be useful,
	12	but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	GNU General Public License for more details.
	15
	16	You should have received a copy of the GNU General Public License
	17	along with GAS; see the file COPYING. If not, write to the Free
4b4da160 NC	18	Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
4b4da160 NC	19	02110-1301, USA. */
e0001a05 NC	20
	21	#ifndef TC_XTENSA
	22	#define TC_XTENSA 1
	23
e0001a05	24	struct fix;
e0001a05	25
e0001a05 NC	26	#ifndef OBJ_ELF
	27	#error Xtensa support requires ELF object format
	28	#endif
	29
43cd72b9	30	#include "xtensa-isa.h"
e0001a05 NC	31	#include "xtensa-config.h"
	32
	33	#define TARGET_BYTES_BIG_ENDIAN XCHAL_HAVE_BE
	34
	35
43cd72b9	36	/* Maximum number of opcode slots in a VLIW instruction. */
b08b5071	37	#define MAX_SLOTS 15
43cd72b9 BW	38
	39
	40	/* For all xtensa relax states except RELAX_DESIRE_ALIGN and
	41	RELAX_DESIRE_ALIGN_IF_TARGET, the amount a frag might grow is stored
	42	in the fr_var field. For the two exceptions, fr_var is a float value
	43	that records the frequency with which the following instruction is
	44	executed as a branch target. The aligner uses this information to
	45	tell which targets are most important to be aligned. */
	46
	47	enum xtensa_relax_statesE
	48	{
	49	RELAX_ALIGN_NEXT_OPCODE,
	50	/* Use the first opcode of the next fragment to determine the
	51	alignment requirements. This is ONLY used for LOOPs currently. */
	52
	53	RELAX_CHECK_ALIGN_NEXT_OPCODE,
	54	/* The next non-empty frag contains a loop instruction. Check to see
	55	if it is correctly aligned, but do not align it. */
	56
	57	RELAX_DESIRE_ALIGN_IF_TARGET,
	58	/* These are placed in front of labels and converted to either
	59	RELAX_DESIRE_ALIGN / RELAX_LOOP_END or rs_fill of 0 before
	60	relaxation begins. */
	61
	62	RELAX_ADD_NOP_IF_A0_B_RETW,
	63	/* These are placed in front of conditional branches. Before
	64	relaxation begins, they are turned into either NOPs for branches
	65	immediately followed by RETW or RETW.N or rs_fills of 0. This is
	66	used to avoid a hardware bug in some early versions of the
	67	processor. */
	68
	69	RELAX_ADD_NOP_IF_PRE_LOOP_END,
	70	/* These are placed after JX instructions. Before relaxation begins,
	71	they are turned into either NOPs, if the JX is one instruction
	72	before a loop end label, or rs_fills of 0. This is used to avoid a
	73	hardware interlock issue prior to Xtensa version T1040. */
	74
	75	RELAX_ADD_NOP_IF_SHORT_LOOP,
	76	/* These are placed after LOOP instructions and turned into NOPs when:
	77	(1) there are less than 3 instructions in the loop; we place 2 of
	78	these in a row to add up to 2 NOPS in short loops; or (2) the
	79	instructions in the loop do not include a branch or jump.
	80	Otherwise they are turned into rs_fills of 0 before relaxation
	81	begins. This is used to avoid hardware bug PR3830. */
	82
	83	RELAX_ADD_NOP_IF_CLOSE_LOOP_END,
	84	/* These are placed after LOOP instructions and turned into NOPs if
	85	there are less than 12 bytes to the end of some other loop's end.
	86	Otherwise they are turned into rs_fills of 0 before relaxation
	87	begins. This is used to avoid hardware bug PR3830. */
	88
	89	RELAX_DESIRE_ALIGN,
	90	/* The next fragment would like its first instruction to NOT cross an
	91	instruction fetch boundary. */
	92
	93	RELAX_MAYBE_DESIRE_ALIGN,
	94	/* The next fragment might like its first instruction to NOT cross an
	95	instruction fetch boundary. These are placed after a branch that
	96	might be relaxed. If the branch is relaxed, then this frag will be
	97	a branch target and this frag will be changed to RELAX_DESIRE_ALIGN
	98	frag. */
	99
	100	RELAX_LOOP_END,
	101	/* This will be turned into a NOP or NOP.N if the previous instruction
102	is expanded to negate a loop. */
103
104	RELAX_LOOP_END_ADD_NOP,
105	/* When the code density option is available, this will generate a
106	NOP.N marked RELAX_NARROW. Otherwise, it will create an rs_fill
107	fragment with a NOP in it. */
108
109	RELAX_LITERAL,
110	/* Another fragment could generate an expansion here but has not yet. */
111
112	RELAX_LITERAL_NR,
113	/* Expansion has been generated by an instruction that generates a
114	literal. However, the stretch has NOT been reported yet in this
115	fragment. */
116
117	RELAX_LITERAL_FINAL,
118	/* Expansion has been generated by an instruction that generates a
119	literal. */
120
121	RELAX_LITERAL_POOL_BEGIN,
122	RELAX_LITERAL_POOL_END,
123	/* Technically these are not relaxations at all but mark a location
124	to store literals later. Note that fr_var stores the frchain for
125	BEGIN frags and fr_var stores now_seg for END frags. */
126
127	RELAX_NARROW,
128	/* The last instruction in this fragment (at->fr_opcode) can be
129	freely replaced with a single wider instruction if a future
130	alignment desires or needs it. */
131
132	RELAX_IMMED,
133	/* The last instruction in this fragment (at->fr_opcode) contains
134	the value defined by fr_symbol (fr_offset = 0). If the value
135	does not fit, use the specified expansion. This is similar to
136	"NARROW", except that these may not be expanded in order to align
137	code. */
c138bc38	138
43cd72b9 BW	139	RELAX_IMMED_STEP1,
	140	/* The last instruction in this fragment (at->fr_opcode) contains a
	141	literal. It has already been expanded at least 1 step. */
	142
	143	RELAX_IMMED_STEP2,
	144	/* The last instruction in this fragment (at->fr_opcode) contains a
	145	literal. It has already been expanded at least 2 steps. */
	146
	147	RELAX_SLOTS,
	148	/* There are instructions within the last VLIW instruction that need
	149	relaxation. Find the relaxation based on the slot info in
	150	xtensa_frag_type. Relaxations that deal with particular opcodes
	151	are slot-based (e.g., converting a MOVI to an L32R). Relaxations
	152	that deal with entire instructions, such as alignment, are not
	153	slot-based. */
	154
	155	RELAX_FILL_NOP,
	156	/* This marks the location of a pipeline stall. We can fill these guys
	157	in for alignment of any size. */
	158
	159	RELAX_UNREACHABLE,
	160	/* This marks the location as unreachable. The assembler may widen or
	161	narrow this area to meet alignment requirements of nearby
	162	instructions. */
	163
	164	RELAX_MAYBE_UNREACHABLE,
	165	/* This marks the location as possibly unreachable. These are placed
	166	after a branch that may be relaxed into a branch and jump. If the
c138bc38	167	branch is relaxed, then this frag will be converted to a
43cd72b9 BW	168	RELAX_UNREACHABLE frag. */
	169
	170	RELAX_NONE
	171	};
	172
	173	/* This is used as a stopper to bound the number of steps that
	174	can be taken. */
	175	#define RELAX_IMMED_MAXSTEPS (RELAX_IMMED_STEP2 - RELAX_IMMED)
	176
e0001a05 NC	177	struct xtensa_frag_type
e0001a05 NC	178	{
43cd72b9 BW	179	/* Info about the current state of assembly, e.g., transform,
	180	absolute_literals, etc. These need to be passed to the backend and
	181	then to the object file.
	182
	183	When is_assembly_state_set is false, the frag inherits some of the
	184	state settings from the previous frag in this segment. Because it
	185	is not possible to intercept all fragment closures (frag_more and
	186	frag_append_1_char can close a frag), we use a pass after initial
	187	assembly to fill in the assembly states. */
	188
	189	unsigned int is_assembly_state_set : 1;
	190	unsigned int is_no_density : 1;
	191	unsigned int is_no_transform : 1;
7c834684	192	unsigned int use_longcalls : 1;
43cd72b9 BW	193	unsigned int use_absolute_literals : 1;
	194
	195	/* Inhibits relaxation of machine-dependent alignment frags the
	196	first time through a relaxation.... */
	197	unsigned int relax_seen : 1;
	198
0fa77c95	199	/* Information that is needed in the object file and set when known. */
43cd72b9 BW	200	unsigned int is_literal : 1;
	201	unsigned int is_loop_target : 1;
	202	unsigned int is_branch_target : 1;
	203	unsigned int is_insn : 1;
	204	unsigned int is_unreachable : 1;
e0001a05	205
43cd72b9	206	unsigned int is_specific_opcode : 1; /* also implies no_transform */
e0001a05	207
43cd72b9 BW	208	unsigned int is_align : 1;
	209	unsigned int is_text_align : 1;
	210	unsigned int alignment : 5;
	211
	212	/* A frag with this bit set is the first in a loop that actually
	213	contains an instruction. */
	214	unsigned int is_first_loop_insn : 1;
e0001a05	215
b5e4a23d BW	216	/* A frag with this bit set is a branch that we are using to
	217	align branch targets as if it were a normal narrow instruction. */
	218	unsigned int is_aligning_branch : 1;
	219
e0001a05 NC	220	/* For text fragments that can generate literals at relax time, this
	221	variable points to the frag where the literal will be stored. For
	222	literal frags, this variable points to the nearest literal pool
	223	location frag. This literal frag will be moved to after this
	224	location. */
e0001a05 NC	225	fragS *literal_frag;
	226
	227	/* The destination segment for literal frags. (Note that this is only
dd49a749 BW	228	valid after xtensa_move_literals.) This field is also used for
dd49a749 BW	229	LITERAL_POOL_END frags. */
e0001a05 NC	230	segT lit_seg;
e0001a05 NC	231
dd49a749 BW	232	/* Frag chain for LITERAL_POOL_BEGIN frags. */
	233	struct frchain *lit_frchain;
	234
e0001a05 NC	235	/* For the relaxation scheme, some literal fragments can have their
e0001a05 NC	236	expansions modified by an instruction that relaxes. */
43cd72b9 BW	237	int text_expansion[MAX_SLOTS];
	238	int literal_expansion[MAX_SLOTS];
	239	int unreported_expansion;
	240
	241	/* For text fragments that can generate literals at relax time: */
	242	fragS *literal_frags[MAX_SLOTS];
	243	enum xtensa_relax_statesE slot_subtypes[MAX_SLOTS];
	244	symbolS *slot_symbols[MAX_SLOTS];
43cd72b9 BW	245	offsetT slot_offsets[MAX_SLOTS];
	246
	247	/* The global aligner needs to walk backward through the list of
	248	frags. This field is only valid after xtensa_end. */
	249	fragS *fr_prev;
e0001a05 NC	250	};
e0001a05 NC	251
43cd72b9 BW	252
	253	/* For VLIW support, we need to know what slot a fixup applies to. */
	254	typedef struct xtensa_fix_data_struct
	255	{
	256	int slot;
	257	symbolS *X_add_symbol;
	258	offsetT X_add_number;
	259	} xtensa_fix_data;
	260
	261
	262	/* Structure to record xtensa-specific symbol information. */
	263	typedef struct xtensa_symfield_type
e0001a05	264	{
43cd72b9 BW	265	unsigned int is_loop_target : 1;
	266	unsigned int is_branch_target : 1;
	267	} xtensa_symfield_type;
	268
	269
	270	/* Structure for saving information about a block of property data
	271	for frags that have the same flags. The forward reference is
	272	in this header file. The actual definition is in tc-xtensa.c. */
	273	struct xtensa_block_info_struct;
	274	typedef struct xtensa_block_info_struct xtensa_block_info;
	275
e0001a05	276
43cd72b9	277	/* Property section types. */
e0001a05 NC	278	typedef enum
e0001a05 NC	279	{
e0001a05	280	xt_literal_sec,
43cd72b9	281	xt_prop_sec,
e0001a05 NC	282	max_xt_sec
	283	} xt_section_type;
	284
	285	typedef struct xtensa_segment_info_struct
	286	{
	287	fragS *literal_pool_loc;
	288	xtensa_block_info *blocks[max_xt_sec];
	289	} xtensa_segment_info;
	290
e0001a05	291
7fa3d080 BW	292	extern const char *xtensa_target_format (void);
	293	extern void xtensa_init_fix_data (struct fix *);
	294	extern void xtensa_frag_init (fragS *);
	295	extern int xtensa_force_relocation (struct fix *);
30f725a1	296	extern int xtensa_validate_fix_sub (struct fix *);
7fa3d080 BW	297	extern void xtensa_frob_label (struct symbol *);
	298	extern void xtensa_end (void);
	299	extern void xtensa_post_relax_hook (void);
	300	extern void xtensa_file_arch_init (bfd *);
	301	extern void xtensa_flush_pending_output (void);
	302	extern bfd_boolean xtensa_fix_adjustable (struct fix *);
	303	extern void xtensa_symbol_new_hook (symbolS *);
	304	extern long xtensa_relax_frag (fragS , long, int );
	305	extern void xtensa_elf_section_change_hook (void);
	306	extern int xtensa_unrecognized_line (int);
	307	extern bfd_boolean xtensa_check_inside_bundle (void);
	308	extern void xtensa_handle_align (fragS *);
9456465c	309	extern char xtensa_section_rename (char );
e0001a05 NC	310
	311	#define TARGET_FORMAT xtensa_target_format ()
	312	#define TARGET_ARCH bfd_arch_xtensa
	313	#define TC_SEGMENT_INFO_TYPE xtensa_segment_info
43cd72b9 BW	314	#define TC_SYMFIELD_TYPE struct xtensa_symfield_type
	315	#define TC_FIX_TYPE xtensa_fix_data
	316	#define TC_INIT_FIX_DATA(x) xtensa_init_fix_data (x)
e0001a05 NC	317	#define TC_FRAG_TYPE struct xtensa_frag_type
e0001a05 NC	318	#define TC_FRAG_INIT(frag) xtensa_frag_init (frag)
43cd72b9	319	#define TC_FORCE_RELOCATION(fix) xtensa_force_relocation (fix)
30f725a1 BW	320	#define TC_FORCE_RELOCATION_SUB_SAME(fix, seg) \
	321	(! SEG_NORMAL (seg) \|\| xtensa_force_relocation (fix))
	322	#define TC_VALIDATE_FIX_SUB(fix) xtensa_validate_fix_sub (fix)
43cd72b9	323	#define NO_PSEUDO_DOT xtensa_check_inside_bundle ()
e0001a05	324	#define tc_canonicalize_symbol_name(s) xtensa_section_rename (s)
9456465c	325	#define tc_canonicalize_section_name(s) xtensa_section_rename (s)
e0001a05 NC	326	#define tc_init_after_args() xtensa_file_arch_init (stdoutput)
	327	#define tc_fix_adjustable(fix) xtensa_fix_adjustable (fix)
	328	#define tc_frob_label(sym) xtensa_frob_label (sym)
43cd72b9 BW	329	#define tc_unrecognized_line(ch) xtensa_unrecognized_line (ch)
	330	#define md_do_align(a,b,c,d,e) xtensa_flush_pending_output ()
	331	#define md_elf_section_change_hook xtensa_elf_section_change_hook
e0001a05 NC	332	#define md_end xtensa_end
	333	#define md_flush_pending_output() xtensa_flush_pending_output ()
	334	#define md_operand(x)
	335	#define TEXT_SECTION_NAME xtensa_section_rename (".text")
	336	#define DATA_SECTION_NAME xtensa_section_rename (".data")
	337	#define BSS_SECTION_NAME xtensa_section_rename (".bss")
43cd72b9	338	#define HANDLE_ALIGN(fragP) xtensa_handle_align (fragP)
cf523b8e	339	#define MAX_MEM_FOR_RS_ALIGN_CODE 1
e0001a05 NC	340
	341
	342	/* The renumber_section function must be mapped over all the sections
	343	after calling xtensa_post_relax_hook. That function is static in
	344	write.c so it cannot be called from xtensa_post_relax_hook itself. */
	345
	346	#define md_post_relax_hook \
	347	do \
	348	{ \
	349	int i = 0; \
	350	xtensa_post_relax_hook (); \
	351	bfd_map_over_sections (stdoutput, renumber_sections, &i); \
	352	} \
	353	while (0)
	354
	355
	356	/* Because xtensa relaxation can insert a new literal into the middle of
	357	fragment and thus require re-running the relaxation pass on the
	358	section, we need an explicit flag here. We explicitly use the name
	359	"stretched" here to avoid changing the source code in write.c. */
	360
	361	#define md_relax_frag(segment, fragP, stretch) \
	362	xtensa_relax_frag (fragP, stretch, &stretched)
	363
	364
	365	#define LOCAL_LABELS_FB 1
	366	#define WORKING_DOT_WORD 1
	367	#define DOUBLESLASH_LINE_COMMENTS
	368	#define TC_HANDLES_FX_DONE
	369	#define TC_FINALIZE_SYMS_BEFORE_SIZE_SEG 0
43cd72b9	370	#define TC_LINKRELAX_FIXUP(SEG) 0
e0001a05	371	#define MD_APPLY_SYM_VALUE(FIX) 0
43cd72b9 BW	372	#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0
43cd72b9 BW	373
1737851b BW	374	/* Use line number format that is amenable to linker relaxation. */
	375	#define DWARF2_USE_FIXED_ADVANCE_PC (linkrelax != 0)
	376
43cd72b9 BW	377
	378	/* Resource reservation info functions. */
	379
	380	/* Returns the number of copies of a particular unit. */
	381	typedef int (unit_num_copies_func) (void , xtensa_funcUnit);
	382
	383	/* Returns the number of units the opcode uses. */
	384	typedef int (opcode_num_units_func) (void , xtensa_opcode);
	385
c138bc38	386	/* Given an opcode and an index into the opcode's funcUnit list,
43cd72b9 BW	387	returns the unit used for the index. */
	388	typedef int (opcode_funcUnit_use_unit_func) (void , xtensa_opcode, int);
	389
c138bc38	390	/* Given an opcode and an index into the opcode's funcUnit list,
43cd72b9 BW	391	returns the cycle during which the unit is used. */
	392	typedef int (opcode_funcUnit_use_stage_func) (void , xtensa_opcode, int);
	393
c138bc38	394	/* The above typedefs parameterize the resource_table so that the
43cd72b9	395	optional scheduler doesn't need its own resource reservation system.
c138bc38 BW	396
	397	For simple resource checking, which is all that happens normally,
	398	the functions will be as follows (with some wrapping to make the
	399	interface more convenient):
43cd72b9 BW	400
	401	unit_num_copies_func = xtensa_funcUnit_num_copies
	402	opcode_num_units_func = xtensa_opcode_num_funcUnit_uses
	403	opcode_funcUnit_use_unit_func = xtensa_opcode_funcUnit_use->unit
	404	opcode_funcUnit_use_stage_func = xtensa_opcode_funcUnit_use->stage
	405
c138bc38	406	Of course the optional scheduler has its own reservation table
43cd72b9 BW	407	and functions. */
43cd72b9 BW	408
7fa3d080 BW	409	int opcode_funcUnit_use_unit (void *, xtensa_opcode, int);
7fa3d080 BW	410	int opcode_funcUnit_use_stage (void *, xtensa_opcode, int);
43cd72b9 BW	411
	412	typedef struct
	413	{
	414	void *data;
	415	int cycles;
	416	int allocated_cycles;
	417	int num_units;
	418	unit_num_copies_func unit_num_copies;
	419	opcode_num_units_func opcode_num_units;
	420	opcode_funcUnit_use_unit_func opcode_unit_use;
	421	opcode_funcUnit_use_stage_func opcode_unit_stage;
0bf60745	422	unsigned char **units;
43cd72b9 BW	423	} resource_table;
43cd72b9 BW	424
c138bc38 BW	425	resource_table *new_resource_table
c138bc38 BW	426	(void *, int, int, unit_num_copies_func, opcode_num_units_func,
7fa3d080 BW	427	opcode_funcUnit_use_unit_func, opcode_funcUnit_use_stage_func);
	428	void resize_resource_table (resource_table *, int);
	429	void clear_resource_table (resource_table *);
	430	bfd_boolean resources_available (resource_table *, xtensa_opcode, int);
	431	void reserve_resources (resource_table *, xtensa_opcode, int);
	432	void release_resources (resource_table *, xtensa_opcode, int);
e0001a05	433
e0001a05	434	#endif /* TC_XTENSA */