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b90efa5b | 1 | @c Copyright (C) 2000-2015 Free Software Foundation, Inc. |
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2 | @c This is part of the GAS manual. |
3 | @c For copying conditions, see the file as.texinfo. | |
4 | ||
5 | @ifset GENERIC | |
6 | @page | |
7 | @node ARC-Dependent | |
8 | @chapter ARC Dependent Features | |
9 | @end ifset | |
10 | ||
11 | @ifclear GENERIC | |
12 | @node Machine Dependencies | |
13 | @chapter ARC Dependent Features | |
14 | @end ifclear | |
15 | ||
bcee8eb8 | 16 | @set ARC_CORE_DEFAULT 6 |
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17 | |
18 | @cindex ARC support | |
19 | @menu | |
20 | * ARC Options:: Options | |
21 | * ARC Syntax:: Syntax | |
2d73a4ca | 22 | * ARC Directives:: ARC Machine Directives |
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23 | * ARC Modifiers:: ARC Assembler Modifiers |
24 | * ARC Symbols:: ARC Pre-defined Symbols | |
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25 | * ARC Opcodes:: Opcodes |
26 | @end menu | |
27 | ||
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28 | @node ARC Options |
29 | @section Options | |
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30 | @cindex ARC options |
31 | @cindex options for ARC | |
32 | ||
33 | The following options control the type of CPU for which code is | |
34 | assembled, and generic constraints on the code generated: | |
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35 | |
36 | @table @code | |
37 | ||
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38 | @item -mcpu=@var{cpu} |
39 | @cindex @code{-mcpu=@var{cpu}} command line option, ARC | |
40 | Set architecture type and register usage for @var{cpu}. There are | |
41 | also shortcut alias options available for backward compatibility and | |
42 | convenience. Supported values for @var{cpu} are | |
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43 | |
44 | @table @code | |
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45 | @cindex @code{mA6} command line option, ARC |
46 | @cindex @code{marc600} command line option, ARC | |
47 | @item arc600 | |
48 | Assemble for ARC 600. Aliases: @code{-mA6}, @code{-mARC600}. | |
2d73a4ca | 49 | |
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50 | @item arc601 |
51 | @cindex @code{mARC601} command line option, ARC | |
52 | Assemble for ARC 601. Alias: @code{-mARC601}. | |
2d73a4ca | 53 | |
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54 | @item arc700 |
55 | @cindex @code{mA7} command line option, ARC | |
56 | @cindex @code{mARC700} command line option, ARC | |
57 | Assemble for ARC 700. Aliases: @code{-mA7}, @code{-mARC700}. | |
2d73a4ca | 58 | |
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59 | @item arcem |
60 | @cindex @code{mEM} command line option, ARC | |
61 | Assemble for ARC EM. Aliases: @code{-mEM} | |
2d73a4ca | 62 | |
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63 | @item archs |
64 | @cindex @code{mHS} command line option, ARC | |
65 | Assemble for ARC HS. Aliases: @code{-mHS}, @code{-mav2hs}. | |
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66 | |
67 | @end table | |
68 | ||
886a2506 | 69 | Note: the @code{.cpu} directive can to be used to select a core |
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70 | variant from within assembly code. |
71 | ||
72 | @cindex @code{-EB} command line option, ARC | |
73 | @item -EB | |
74 | This option specifies that the output generated by the assembler should | |
75 | be marked as being encoded for a big-endian processor. | |
76 | ||
77 | @cindex @code{-EL} command line option, ARC | |
78 | @item -EL | |
79 | This option specifies that the output generated by the assembler should | |
80 | be marked as being encoded for a little-endian processor - this is the | |
81 | default. | |
82 | ||
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83 | @cindex @code{-mcode-density} command line option, ARC |
84 | @item -mcode-density | |
85 | This option turns on Code Density instructions. Only valid for ARC EM | |
86 | processors. | |
87 | ||
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88 | @end table |
89 | ||
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90 | @node ARC Syntax |
91 | @section Syntax | |
92 | @menu | |
93 | * ARC-Chars:: Special Characters | |
94 | * ARC-Regs:: Register Names | |
95 | @end menu | |
96 | ||
97 | @node ARC-Chars | |
98 | @subsection Special Characters | |
99 | ||
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100 | @table @code |
101 | @item % | |
102 | @cindex register name prefix character, ARC | |
103 | @cindex ARC register name prefix character | |
104 | A register name can optionally be prefixed by a @samp{%} character. So | |
105 | register @code{%r0} is equivalent to @code{r0} in the assembly code. | |
106 | ||
107 | @item # | |
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108 | @cindex line comment character, ARC |
109 | @cindex ARC line comment character | |
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110 | The presence of a @samp{#} character within a line (but not at the |
111 | start of a line) indicates the start of a comment that extends to the | |
112 | end of the current line. | |
113 | ||
114 | @emph{Note:} if a line starts with a @samp{#} character then it can | |
115 | also be a logical line number directive (@pxref{Comments}) or a | |
116 | preprocessor control command (@pxref{Preprocessing}). | |
117 | ||
118 | @item @@ | |
119 | @cindex symbol prefix character, ARC | |
120 | @cindex ARC symbol prefix character | |
121 | Prefixing an operand with an @samp{@@} specifies that the operand is a | |
122 | symbol and not a register. This is how the assembler disambiguates | |
123 | the use of an ARC register name as a symbol. So the instruction | |
124 | @example | |
125 | mov r0, @@r0 | |
126 | @end example | |
127 | moves the address of symbol @code{r0} into register @code{r0}. | |
128 | ||
129 | @item ` | |
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130 | @cindex line separator, ARC |
131 | @cindex statement separator, ARC | |
132 | @cindex ARC line separator | |
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133 | The @samp{`} (backtick) character is used to separate statements on a |
134 | single line. | |
135 | ||
136 | @cindex line | |
137 | @item - | |
138 | @cindex C preprocessor macro separator, ARC | |
139 | @cindex ARC C preprocessor macro separator | |
140 | Used as a separator to obtain a sequence of commands from a C | |
141 | preprocessor macro. | |
142 | ||
143 | @end table | |
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144 | |
145 | @node ARC-Regs | |
146 | @subsection Register Names | |
147 | ||
148 | @cindex ARC register names | |
149 | @cindex register names, ARC | |
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150 | The ARC assembler uses the following register names for its core |
151 | registers: | |
152 | ||
153 | @table @code | |
154 | @item r0-r31 | |
155 | @cindex core general registers, ARC | |
156 | @cindex ARC core general registers | |
157 | The core general registers. Registers @code{r26} through @code{r31} | |
158 | have special functions, and are usually referred to by those synonyms. | |
159 | ||
160 | @item gp | |
161 | @cindex global pointer, ARC | |
162 | @cindex ARC global pointer | |
163 | The global pointer and a synonym for @code{r26}. | |
164 | ||
165 | @item fp | |
166 | @cindex frame pointer, ARC | |
167 | @cindex ARC frame pointer | |
168 | The frame pointer and a synonym for @code{r27}. | |
169 | ||
170 | @item sp | |
171 | @cindex stack pointer, ARC | |
172 | @cindex ARC stack pointer | |
173 | The stack pointer and a synonym for @code{r28}. | |
174 | ||
175 | @item ilink1 | |
176 | @cindex level 1 interrupt link register, ARC | |
177 | @cindex ARC level 1 interrupt link register | |
178 | For ARC 600 and ARC 700, the level 1 interrupt link register and a | |
179 | synonym for @code{r29}. Not supported for ARCv2. | |
180 | ||
181 | @item ilink | |
182 | @cindex interrupt link register, ARC | |
183 | @cindex ARC interrupt link register | |
184 | For ARCv2, the interrupt link register and a synonym for @code{r29}. | |
185 | Not supported for ARC 600 and ARC 700. | |
186 | ||
187 | @item ilink2 | |
188 | @cindex level 2 interrupt link register, ARC | |
189 | @cindex ARC level 2 interrupt link register | |
190 | For ARC 600 and ARC 700, the level 2 interrupt link register and a | |
191 | synonym for @code{r30}. Not supported for ARC v2. | |
192 | ||
193 | @item blink | |
194 | @cindex link register, ARC | |
195 | @cindex ARC link register | |
196 | The link register and a synonym for @code{r31}. | |
197 | ||
198 | @item r32-r59 | |
199 | @cindex extension core registers, ARC | |
200 | @cindex ARC extension core registers | |
201 | The extension core registers. | |
202 | ||
203 | @item lp_count | |
204 | @cindex loop counter, ARC | |
205 | @cindex ARC loop counter | |
206 | The loop count register. | |
207 | ||
208 | @item pcl | |
209 | @cindex word aligned program counter, ARC | |
210 | @cindex ARC word aligned program counter | |
211 | The word aligned program counter. | |
212 | ||
213 | @end table | |
2d73a4ca | 214 | |
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215 | In addition the ARC processor has a large number of @emph{auxiliary |
216 | registers}. The precise set depends on the extensions being | |
217 | supported, but the following baseline set are always defined: | |
2d73a4ca | 218 | |
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219 | @table @code |
220 | @item identity | |
221 | @cindex Processor Identification register, ARC | |
222 | @cindex ARC Processor Identification register | |
223 | Processor Identification register. Auxiliary register address 0x4. | |
224 | ||
225 | @item pc | |
226 | @cindex Program Counter, ARC | |
227 | @cindex ARC Program Counter | |
228 | Program Counter. Auxiliary register address 0x6. | |
229 | ||
230 | @item status32 | |
231 | @cindex Status register, ARC | |
232 | @cindex ARC Status register | |
233 | Status register. Auxiliary register address 0x0a. | |
234 | ||
235 | @item bta | |
236 | @cindex Branch Target Address, ARC | |
237 | @cindex ARC Branch Target Address | |
238 | Branch Target Address. Auxiliary register address 0x412. | |
239 | ||
240 | @item ecr | |
241 | @cindex Exception Cause Register, ARC | |
242 | @cindex ARC Exception Cause Register | |
243 | Exception Cause Register. Auxiliary register address 0x403. | |
244 | ||
245 | @item int_vector_base | |
246 | @cindex Interrupt Vector Base address, ARC | |
247 | @cindex ARC Interrupt Vector Base address | |
248 | Interrupt Vector Base address. Auxiliary register address 0x25. | |
249 | ||
250 | @item status32_p0 | |
251 | @cindex Stored STATUS32 register on entry to level P0 interrupts, ARC | |
252 | @cindex ARC Stored STATUS32 register on entry to level P0 interrupts | |
253 | Stored STATUS32 register on entry to level P0 interrupts. Auxiliary | |
254 | register address 0xb. | |
255 | ||
256 | @item aux_user_sp | |
257 | @cindex Saved User Stack Pointer, ARC | |
258 | @cindex ARC Saved User Stack Pointer | |
259 | Saved User Stack Pointer. Auxiliary register address 0xd. | |
260 | ||
261 | @item eret | |
262 | @cindex Exception Return Address, ARC | |
263 | @cindex ARC Exception Return Address | |
264 | Exception Return Address. Auxiliary register address 0x400. | |
265 | ||
266 | @item erbta | |
267 | @cindex BTA saved on exception entry, ARC | |
268 | @cindex ARC BTA saved on exception entry | |
269 | BTA saved on exception entry. Auxiliary register address 0x401. | |
270 | ||
271 | @item erstatus | |
272 | @cindex STATUS32 saved on exception, ARC | |
273 | @cindex ARC STATUS32 saved on exception | |
274 | STATUS32 saved on exception. Auxiliary register address 0x402. | |
275 | ||
276 | @item bcr_ver | |
277 | @cindex Build Configuration Registers Version, ARC | |
278 | @cindex ARC Build Configuration Registers Version | |
279 | Build Configuration Registers Version. Auxiliary register address 0x60. | |
280 | ||
281 | @item bta_link_build | |
282 | @cindex Build configuration for: BTA Registers, ARC | |
283 | @cindex ARC Build configuration for: BTA Registers | |
284 | Build configuration for: BTA Registers. Auxiliary register address 0x63. | |
285 | ||
286 | @item vecbase_ac_build | |
287 | @cindex Build configuration for: Interrupts, ARC | |
288 | @cindex ARC Build configuration for: Interrupts | |
289 | Build configuration for: Interrupts. Auxiliary register address 0x68. | |
290 | ||
291 | @item rf_build | |
292 | @cindex Build configuration for: Core Registers, ARC | |
293 | @cindex ARC Build configuration for: Core Registers | |
294 | Build configuration for: Core Registers. Auxiliary register address 0x6e. | |
295 | ||
296 | @item dccm_build | |
297 | @cindex DCCM RAM Configuration Register, ARC | |
298 | @cindex ARC DCCM RAM Configuration Register | |
299 | DCCM RAM Configuration Register. Auxiliary register address 0xc1. | |
2d73a4ca | 300 | |
886a2506 | 301 | @end table |
2d73a4ca | 302 | |
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303 | Additional auxiliary register names are defined according to the |
304 | processor architecture version and extensions selected by the options. | |
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305 | |
306 | @node ARC Directives | |
307 | @section ARC Machine Directives | |
308 | ||
309 | @cindex machine directives, ARC | |
310 | @cindex ARC machine directives | |
311 | The ARC version of @code{@value{AS}} supports the following additional | |
312 | machine directives: | |
313 | ||
314 | @table @code | |
315 | ||
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316 | @cindex @code{lcomm} directive |
317 | @item .lcomm @var{symbol} , @var{length}[, @var{alignment}] | |
318 | Reserve @var{length} (an absolute expression) bytes for a local common | |
319 | denoted by @var{symbol}. The section and value of @var{symbol} are | |
320 | those of the new local common. The addresses are allocated in the bss | |
321 | section, so that at run-time the bytes start off zeroed. Since | |
322 | @var{symbol} is not declared global, it is normally not visible to | |
323 | @code{@value{LD}}. The optional third parameter, @var{alignment}, | |
324 | specifies the desired alignment of the symbol in the bss section, | |
325 | specified as a byte boundary (for example, an alignment of 16 means | |
326 | that the least significant 4 bits of the address should be zero). The | |
327 | alignment must be an absolute expression, and it must be a power of | |
328 | two. If no alignment is specified, as will set the alignment to the | |
329 | largest power of two less than or equal to the size of the symbol, up | |
330 | to a maximum of 16. | |
331 | ||
332 | @cindex @code{lcommon} directive | |
333 | @item .lcommon @var{symbol} , @var{length}[, @var{alignment}] | |
334 | The same as @code{lcomm} directive. | |
335 | ||
336 | @cindex @code{cpu} directive, ARC | |
337 | @cindex @code{cpu} directive, ARC | |
338 | The @code{.cpu} directive must be followed by the desired core | |
339 | version. Permitted values for CPU are: | |
802a113d | 340 | @table @code |
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341 | @item ARC600 |
342 | Assemble for the ARC600 instruction set. | |
2d73a4ca | 343 | |
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344 | @item ARC700 |
345 | Assemble for the ARC700 instruction set. | |
802a113d | 346 | |
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347 | @item EM |
348 | Assemble for the ARC EM instruction set. | |
2d73a4ca | 349 | |
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350 | @item HS |
351 | Assemble for the ARC HS instruction set. | |
34bca508 | 352 | |
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353 | @end table |
354 | ||
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355 | Note: the @code{.cpu} directive overrides the command line option |
356 | @code{-mcpu=@var{cpu}}; a warning is emitted when the version is not | |
357 | consistent between the two. | |
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358 | @end table |
359 | ||
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360 | @node ARC Modifiers |
361 | @section ARC Assembler Modifiers | |
802a113d | 362 | |
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363 | The following additional assembler modifiers have been added for |
364 | position-independent code. These modifiers are available only with | |
365 | the ARC 700 and above processors and generate relocation entries, | |
366 | which are interpreted by the linker as follows: | |
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367 | |
368 | @table @code | |
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369 | @item @@pcl(@var{symbol}) |
370 | @cindex @@pcl(@var{symbol}), ARC modifier | |
371 | Relative distance of @var{symbol}'s from the current program counter | |
372 | location. | |
373 | ||
374 | @item @@gotpc(@var{symbol}) | |
375 | @cindex @@gotpc(@var{symbol}), ARC modifier | |
376 | Relative distance of @var{symbol}'s Global Offset Table entry from the | |
377 | current program counter location. | |
378 | ||
379 | @item @@gotoff(@var{symbol}) | |
380 | @cindex @@gotoff(@var{symbol}), ARC modifier | |
381 | Distance of @var{symbol} from the base of the Global Offset Table. | |
382 | ||
383 | @item @@plt(@var{symbol}) | |
384 | @cindex @@plt(@var{symbol}), ARC modifier | |
385 | Distance of @var{symbol}'s Procedure Linkage Table entry from the | |
386 | current program counter. This is valid only with branch and link | |
387 | instructions and PC-relative calls. | |
388 | ||
389 | @item @@sda(@var{symbol}) | |
390 | @cindex @@sda(@var{symbol}), ARC modifier | |
391 | Relative distance of @var{symbol} from the base of the Small Data | |
392 | Pointer. | |
802a113d | 393 | |
886a2506 | 394 | @end table |
2d73a4ca | 395 | |
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396 | @node ARC Symbols |
397 | @section ARC Pre-defined Symbols | |
2d73a4ca | 398 | |
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399 | The following assembler symbols will prove useful when developing |
400 | position-independent code. These symbols are available only with the | |
401 | ARC 700 and above processors. | |
2d73a4ca | 402 | |
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403 | @table @code |
404 | @item __GLOBAL_OFFSET_TABLE__ | |
405 | @cindex __GLOBAL_OFFSET_TABLE__, ARC pre-defined symbol | |
406 | Symbol referring to the base of the Global Offset Table. | |
2d73a4ca | 407 | |
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408 | @item __DYNAMIC__ |
409 | @cindex __DYNAMIC__, ARC pre-defined symbol | |
410 | An alias for the Global Offset Table | |
411 | @code{Base__GLOBAL_OFFSET_TABLE__}. It can be used only with | |
412 | @code{@@gotpc} modifiers. | |
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413 | |
414 | @end table | |
415 | ||
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416 | @node ARC Opcodes |
417 | @section Opcodes | |
418 | ||
419 | @cindex ARC opcodes | |
420 | @cindex opcodes for ARC | |
421 | ||
422 | For information on the ARC instruction set, see @cite{ARC Programmers | |
886a2506 | 423 | Reference Manual}, available where you download the processor IP library. |