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[deliverable/binutils-gdb.git] / gas / doc / c-avr.texi
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7c31ae13 1@c Copyright 2006, 2007, 2008, 2009, 2011
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2@c Free Software Foundation, Inc.
3@c This is part of the GAS manual.
4@c For copying conditions, see the file as.texinfo.
5
6@ifset GENERIC
7@page
8@node AVR-Dependent
9@chapter AVR Dependent Features
10@end ifset
11
12@ifclear GENERIC
13@node Machine Dependencies
14@chapter AVR Dependent Features
15@end ifclear
16
17@cindex AVR support
18@menu
19* AVR Options:: Options
20* AVR Syntax:: Syntax
21* AVR Opcodes:: Opcodes
22@end menu
23
24@node AVR Options
25@section Options
26@cindex AVR options (none)
27@cindex options for AVR (none)
28
29@table @code
30
31@cindex @code{-mmcu=} command line option, AVR
32@item -mmcu=@var{mcu}
33Specify ATMEL AVR instruction set or MCU type.
34
35Instruction set avr1 is for the minimal AVR core, not supported by the C
7f5ba16d 36compiler, only for assembler programs (MCU types: at90s1200,
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37attiny11, attiny12, attiny15, attiny28).
38
39Instruction set avr2 (default) is for the classic AVR core with up to
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408K program memory space (MCU types: at90s2313, at90s2323, at90s2333, at90s2343,
41attiny22, attiny26, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534,
42at90s8535).
43
44Instruction set avr25 is for the classic AVR core with up to 8K program memory
45space plus the MOVW instruction (MCU types: attiny13, attiny13a, attiny2313,
8453da2e 46attiny2313a, attiny24, attiny24a, attiny4313, attiny44, attiny44a, attiny84,
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47attiny84a, attiny25, attiny45, attiny85, attiny261, attiny261a, attiny461,
48attiny461a, attiny861, attiny861a, attiny87, attiny43u, attiny48, attiny88,
49at86rf401, ata6289).
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50
51Instruction set avr3 is for the classic AVR core with up to 128K program
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52memory space (MCU types: at43usb355, at76c711).
53
54Instruction set avr31 is for the classic AVR core with exactly 128K program
55memory space (MCU types: atmega103, at43usb320).
56
57Instruction set avr35 is for classic AVR core plus MOVW, CALL, and JMP
e760a81b 58instructions (MCU types: attiny167, at90usb82, at90usb162, atmega8u2,
11908008 59atmega16u2, atmega32u2).
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60
61Instruction set avr4 is for the enhanced AVR core with up to 8K program
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62memory space (MCU types: atmega48, atmega48a, atmega48p, atmega8, atmega88,
63atmega88a, atmega88p, atmega88pa, atmega8515, atmega8535, atmega8hva, at90pwm1,
64at90pwm2, at90pwm2b, at90pwm3, at90pwm3b, at90pwm81).
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65
66Instruction set avr5 is for the enhanced AVR core with up to 128K program
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67memory space (MCU types: atmega16, atmega16a, atmega161, atmega162, atmega163,
68atmega164a, atmega164p, atmega165, atmega165a, atmega165p, atmega168,
69atmega168a, atmega168p, atmega169, atmega169a, atmega169p, atmega169pa,
70atmega32, atmega323, atmega324a, atmega324p, atmega325, atmega325a, atmega325p,
71atmega3250, atmega3250a, atmega3250p, atmega328, atmega328p, atmega329,
72atmega329a, atmega329p, atmega329pa, atmega3290, atmega3290a, atmega3290p,
73atmega406, atmega64, atmega640, atmega644, atmega644a, atmega644p, atmega644pa,
74atmega645, atmega645a, atmega645p, atmega6450, atmega6450a, atmega6450p,
75atmega649, atmega649a, atmega649p, atmega6490, atmega6490a, atmega6490p,
76atmega16hva, atmega16hva2, atmega16hvb, atmega32hvb, atmega64hve, at90can32,
77at90can64, at90pwm216, at90pwm316, atmega32c1, atmega64c1, atmega16m1,
78atmega32m1, atmega64m1, atmega16u4, atmega32u4, atmega32u6, at90usb646,
79at90usb647, at94k, at90scr100).
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80
81Instruction set avr51 is for the enhanced AVR core with exactly 128K program
82memory space (MCU types: atmega128, atmega1280, atmega1281, atmega1284p,
e760a81b 83atmega128rfa1, at90can128, at90usb1286, at90usb1287, m3000).
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84
85Instruction set avr6 is for the enhanced AVR core with a 3-byte PC (MCU types:
86atmega2560, atmega2561).
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88Instruction set avrxmega2 is for the XMEGA AVR core with 8K to 64K program
89memory space and less than 64K data space (MCU types: atxmega16a4, atxmega16d4,
90atxmega32d4).
91
92Instruction set avrxmega3 is for the XMEGA AVR core with 8K to 64K program
93memory space and greater than 64K data space (MCU types: atxmega32a4).
94
95Instruction set avrxmega4 is for the XMEGA AVR core with up to 64K program
96memory space and less than 64K data space (MCU types: atxmega64a3, atxmega64d3).
97
98Instruction set avrxmega5 is for the XMEGA AVR core with up to 64K program
99memory space and greater than 64K data space (MCU types: atxmega64a1).
100
101Instruction set avrxmega6 is for the XMEGA AVR core with up to 256K program
102memory space and less than 64K data space (MCU types: atxmega128a3,
103atxmega128d3, atxmega192a3, atxmega192d3, atxmega256a3, atxmega256a3b,
104atxmega192d3).
105
106Instruction set avrxmega7 is for the XMEGA AVR core with up to 256K program
107memory space and greater than 64K data space (MCU types: atxmega128a1).
108
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109@cindex @code{-mall-opcodes} command line option, AVR
110@item -mall-opcodes
111Accept all AVR opcodes, even if not supported by @code{-mmcu}.
112
113@cindex @code{-mno-skip-bug} command line option, AVR
114@item -mno-skip-bug
115This option disable warnings for skipping two-word instructions.
116
117@cindex @code{-mno-wrap} command line option, AVR
118@item -mno-wrap
119This option reject @code{rjmp/rcall} instructions with 8K wrap-around.
120
121@end table
122
123
124@node AVR Syntax
125@section Syntax
126@menu
127* AVR-Chars:: Special Characters
128* AVR-Regs:: Register Names
129* AVR-Modifiers:: Relocatable Expression Modifiers
130@end menu
131
132@node AVR-Chars
133@subsection Special Characters
134
135@cindex line comment character, AVR
136@cindex AVR line comment character
137
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138The presence of a @samp{;} anywhere on a line indicates the start of a
139comment that extends to the end of that line.
140
141If a @samp{#} appears as the first character of a line, the whole line
142is treated as a comment, but in this case the line can also be a
143logical line number directive (@pxref{Comments}) or a preprocessor
144control command (@pxref{Preprocessing}).
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145
146@cindex line separator, AVR
147@cindex statement separator, AVR
148@cindex AVR line separator
149
150The @samp{$} character can be used instead of a newline to separate
151statements.
152
153@node AVR-Regs
154@subsection Register Names
155
156@cindex AVR register names
157@cindex register names, AVR
158
b45619c0 159The AVR has 32 x 8-bit general purpose working registers @samp{r0},
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160@samp{r1}, ... @samp{r31}.
161Six of the 32 registers can be used as three 16-bit indirect address
162register pointers for Data Space addressing. One of the these address
163pointers can also be used as an address pointer for look up tables in
164Flash program memory. These added function registers are the 16-bit
165@samp{X}, @samp{Y} and @samp{Z} - registers.
166
167@smallexample
168X = @r{r26:r27}
169Y = @r{r28:r29}
170Z = @r{r30:r31}
171@end smallexample
172
173@node AVR-Modifiers
174@subsection Relocatable Expression Modifiers
175
176@cindex AVR modifiers
177@cindex syntax, AVR
178
179The assembler supports several modifiers when using relocatable addresses
180in AVR instruction operands. The general syntax is the following:
181
182@smallexample
183modifier(relocatable-expression)
184@end smallexample
185
186@table @code
187@cindex symbol modifiers
188
189@item lo8
190
191This modifier allows you to use bits 0 through 7 of
192an address expression as 8 bit relocatable expression.
193
194@item hi8
195
196This modifier allows you to use bits 7 through 15 of an address expression
197as 8 bit relocatable expression. This is useful with, for example, the
198AVR @samp{ldi} instruction and @samp{lo8} modifier.
199
200For example
201
202@smallexample
203ldi r26, lo8(sym+10)
204ldi r27, hi8(sym+10)
205@end smallexample
206
207@item hh8
208
209This modifier allows you to use bits 16 through 23 of
210an address expression as 8 bit relocatable expression.
211Also, can be useful for loading 32 bit constants.
212
213@item hlo8
214
215Synonym of @samp{hh8}.
216
217@item hhi8
218
219This modifier allows you to use bits 24 through 31 of
220an expression as 8 bit expression. This is useful with, for example, the
221AVR @samp{ldi} instruction and @samp{lo8}, @samp{hi8}, @samp{hlo8},
222@samp{hhi8}, modifier.
223
224For example
225
226@smallexample
227ldi r26, lo8(285774925)
228ldi r27, hi8(285774925)
229ldi r28, hlo8(285774925)
230ldi r29, hhi8(285774925)
231; r29,r28,r27,r26 = 285774925
232@end smallexample
233
234@item pm_lo8
235
236This modifier allows you to use bits 0 through 7 of
237an address expression as 8 bit relocatable expression.
238This modifier useful for addressing data or code from
239Flash/Program memory. The using of @samp{pm_lo8} similar
240to @samp{lo8}.
241
242@item pm_hi8
243
244This modifier allows you to use bits 8 through 15 of
245an address expression as 8 bit relocatable expression.
246This modifier useful for addressing data or code from
247Flash/Program memory.
248
249@item pm_hh8
250
251This modifier allows you to use bits 15 through 23 of
252an address expression as 8 bit relocatable expression.
253This modifier useful for addressing data or code from
254Flash/Program memory.
255
256@end table
257
258@node AVR Opcodes
259@section Opcodes
260
261@cindex AVR opcode summary
262@cindex opcode summary, AVR
263@cindex mnemonics, AVR
264@cindex instruction summary, AVR
265For detailed information on the AVR machine instruction set, see
266@url{www.atmel.com/products/AVR}.
267
268@code{@value{AS}} implements all the standard AVR opcodes.
269The following table summarizes the AVR opcodes, and their arguments.
270
271@smallexample
272@i{Legend:}
273 r @r{any register}
274 d @r{`ldi' register (r16-r31)}
275 v @r{`movw' even register (r0, r2, ..., r28, r30)}
276 a @r{`fmul' register (r16-r23)}
277 w @r{`adiw' register (r24,r26,r28,r30)}
278 e @r{pointer registers (X,Y,Z)}
279 b @r{base pointer register and displacement ([YZ]+disp)}
280 z @r{Z pointer register (for [e]lpm Rd,Z[+])}
281 M @r{immediate value from 0 to 255}
282 n @r{immediate value from 0 to 255 ( n = ~M ). Relocation impossible}
283 s @r{immediate value from 0 to 7}
284 P @r{Port address value from 0 to 63. (in, out)}
285 p @r{Port address value from 0 to 31. (cbi, sbi, sbic, sbis)}
286 K @r{immediate value from 0 to 63 (used in `adiw', `sbiw')}
287 i @r{immediate value}
288 l @r{signed pc relative offset from -64 to 63}
289 L @r{signed pc relative offset from -2048 to 2047}
290 h @r{absolute code address (call, jmp)}
291 S @r{immediate value from 0 to 7 (S = s << 4)}
292 ? @r{use this opcode entry if no parameters, else use next opcode entry}
293
2941001010010001000 clc
2951001010011011000 clh
2961001010011111000 cli
2971001010010101000 cln
2981001010011001000 cls
2991001010011101000 clt
3001001010010111000 clv
3011001010010011000 clz
3021001010000001000 sec
3031001010001011000 seh
3041001010001111000 sei
3051001010000101000 sen
3061001010001001000 ses
3071001010001101000 set
3081001010000111000 sev
3091001010000011000 sez
310100101001SSS1000 bclr S
311100101000SSS1000 bset S
3121001010100001001 icall
3131001010000001001 ijmp
3141001010111001000 lpm ?
3151001000ddddd010+ lpm r,z
3161001010111011000 elpm ?
3171001000ddddd011+ elpm r,z
3180000000000000000 nop
3191001010100001000 ret
3201001010100011000 reti
3211001010110001000 sleep
3221001010110011000 break
3231001010110101000 wdr
3241001010111101000 spm
325000111rdddddrrrr adc r,r
326000011rdddddrrrr add r,r
327001000rdddddrrrr and r,r
328000101rdddddrrrr cp r,r
329000001rdddddrrrr cpc r,r
330000100rdddddrrrr cpse r,r
331001001rdddddrrrr eor r,r
332001011rdddddrrrr mov r,r
333100111rdddddrrrr mul r,r
334001010rdddddrrrr or r,r
335000010rdddddrrrr sbc r,r
336000110rdddddrrrr sub r,r
337001001rdddddrrrr clr r
338000011rdddddrrrr lsl r
339000111rdddddrrrr rol r
340001000rdddddrrrr tst r
3410111KKKKddddKKKK andi d,M
3420111KKKKddddKKKK cbr d,n
3431110KKKKddddKKKK ldi d,M
34411101111dddd1111 ser d
3450110KKKKddddKKKK ori d,M
3460110KKKKddddKKKK sbr d,M
3470011KKKKddddKKKK cpi d,M
3480100KKKKddddKKKK sbci d,M
3490101KKKKddddKKKK subi d,M
3501111110rrrrr0sss sbrc r,s
3511111111rrrrr0sss sbrs r,s
3521111100ddddd0sss bld r,s
3531111101ddddd0sss bst r,s
35410110PPdddddPPPP in r,P
35510111PPrrrrrPPPP out P,r
35610010110KKddKKKK adiw w,K
35710010111KKddKKKK sbiw w,K
35810011000pppppsss cbi p,s
35910011010pppppsss sbi p,s
36010011001pppppsss sbic p,s
36110011011pppppsss sbis p,s
362111101lllllll000 brcc l
363111100lllllll000 brcs l
364111100lllllll001 breq l
365111101lllllll100 brge l
366111101lllllll101 brhc l
367111100lllllll101 brhs l
368111101lllllll111 brid l
369111100lllllll111 brie l
370111100lllllll000 brlo l
371111100lllllll100 brlt l
372111100lllllll010 brmi l
373111101lllllll001 brne l
374111101lllllll010 brpl l
375111101lllllll000 brsh l
376111101lllllll110 brtc l
377111100lllllll110 brts l
378111101lllllll011 brvc l
379111100lllllll011 brvs l
380111101lllllllsss brbc s,l
381111100lllllllsss brbs s,l
3821101LLLLLLLLLLLL rcall L
3831100LLLLLLLLLLLL rjmp L
3841001010hhhhh111h call h
3851001010hhhhh110h jmp h
3861001010rrrrr0101 asr r
3871001010rrrrr0000 com r
3881001010rrrrr1010 dec r
3891001010rrrrr0011 inc r
3901001010rrrrr0110 lsr r
3911001010rrrrr0001 neg r
3921001000rrrrr1111 pop r
3931001001rrrrr1111 push r
3941001010rrrrr0111 ror r
3951001010rrrrr0010 swap r
39600000001ddddrrrr movw v,v
39700000010ddddrrrr muls d,d
398000000110ddd0rrr mulsu a,a
399000000110ddd1rrr fmul a,a
400000000111ddd0rrr fmuls a,a
401000000111ddd1rrr fmulsu a,a
4021001001ddddd0000 sts i,r
4031001000ddddd0000 lds r,i
40410o0oo0dddddbooo ldd r,b
405100!000dddddee-+ ld r,e
40610o0oo1rrrrrbooo std b,r
407100!001rrrrree-+ st e,r
4081001010100011001 eicall
4091001010000011001 eijmp
410@end smallexample
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