gdb/testsuite/
[deliverable/binutils-gdb.git] / gas / doc / c-avr.texi
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7c31ae13 1@c Copyright 2006, 2007, 2008, 2009, 2011
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2@c Free Software Foundation, Inc.
3@c This is part of the GAS manual.
4@c For copying conditions, see the file as.texinfo.
5
6@ifset GENERIC
7@page
8@node AVR-Dependent
9@chapter AVR Dependent Features
10@end ifset
11
12@ifclear GENERIC
13@node Machine Dependencies
14@chapter AVR Dependent Features
15@end ifclear
16
17@cindex AVR support
18@menu
19* AVR Options:: Options
20* AVR Syntax:: Syntax
21* AVR Opcodes:: Opcodes
22@end menu
23
24@node AVR Options
25@section Options
26@cindex AVR options (none)
27@cindex options for AVR (none)
28
29@table @code
30
31@cindex @code{-mmcu=} command line option, AVR
32@item -mmcu=@var{mcu}
33Specify ATMEL AVR instruction set or MCU type.
34
35Instruction set avr1 is for the minimal AVR core, not supported by the C
7f5ba16d 36compiler, only for assembler programs (MCU types: at90s1200,
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37attiny11, attiny12, attiny15, attiny28).
38
39Instruction set avr2 (default) is for the classic AVR core with up to
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408K program memory space (MCU types: at90s2313, at90s2323, at90s2333, at90s2343,
41attiny22, attiny26, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534,
42at90s8535).
43
44Instruction set avr25 is for the classic AVR core with up to 8K program memory
45space plus the MOVW instruction (MCU types: attiny13, attiny13a, attiny2313,
8453da2e 46attiny2313a, attiny24, attiny24a, attiny4313, attiny44, attiny44a, attiny84,
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47attiny84a, attiny25, attiny45, attiny85, attiny261, attiny261a, attiny461,
48attiny461a, attiny861, attiny861a, attiny87, attiny43u, attiny48, attiny88,
49at86rf401, ata6289).
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50
51Instruction set avr3 is for the classic AVR core with up to 128K program
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52memory space (MCU types: at43usb355, at76c711).
53
54Instruction set avr31 is for the classic AVR core with exactly 128K program
55memory space (MCU types: atmega103, at43usb320).
56
57Instruction set avr35 is for classic AVR core plus MOVW, CALL, and JMP
e760a81b 58instructions (MCU types: attiny167, at90usb82, at90usb162, atmega8u2,
11908008 59atmega16u2, atmega32u2).
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60
61Instruction set avr4 is for the enhanced AVR core with up to 8K program
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62memory space (MCU types: atmega48, atmega48a, atmega48p, atmega8, atmega88,
63atmega88a, atmega88p, atmega88pa, atmega8515, atmega8535, atmega8hva, at90pwm1,
64at90pwm2, at90pwm2b, at90pwm3, at90pwm3b, at90pwm81).
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65
66Instruction set avr5 is for the enhanced AVR core with up to 128K program
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67memory space (MCU types: atmega16, atmega16a, atmega161, atmega162, atmega163,
68atmega164a, atmega164p, atmega165, atmega165a, atmega165p, atmega168,
69atmega168a, atmega168p, atmega169, atmega169a, atmega169p, atmega169pa,
70atmega32, atmega323, atmega324a, atmega324p, atmega325, atmega325a, atmega325p,
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71atmega325pa, atmega3250, atmega3250a, atmega3250p, atmega3250pa, atmega328,
72atmega328p, atmega329, atmega329a, atmega329p, atmega329pa, atmega3290,
73atmega3290a, atmega3290p, atmega3290pa, atmega406, atmega64, atmega640,
74atmega644, atmega644a, atmega644p, atmega644pa, atmega645, atmega645a,
75atmega645p, atmega6450, atmega6450a, atmega6450p, atmega649, atmega649a,
76atmega649p, atmega6490, atmega6490a, atmega6490p, atmega16hva, atmega16hva2,
77atmega16hvb, atmega16hvbrevb, atmega32hvb, atmega32hvbrevb, atmega64hve,
78at90can32, at90can64, at90pwm161, at90pwm216, at90pwm316, atmega32c1,
79atmega64c1, atmega16m1, atmega32m1, atmega64m1, atmega16u4, atmega32u4,
80atmega32u6, at90usb646, at90usb647, at94k, at90scr100).
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81
82Instruction set avr51 is for the enhanced AVR core with exactly 128K program
83memory space (MCU types: atmega128, atmega1280, atmega1281, atmega1284p,
e760a81b 84atmega128rfa1, at90can128, at90usb1286, at90usb1287, m3000).
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85
86Instruction set avr6 is for the enhanced AVR core with a 3-byte PC (MCU types:
87atmega2560, atmega2561).
8473f7a4 88
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89Instruction set avrxmega2 is for the XMEGA AVR core with 8K to 64K program
90memory space and less than 64K data space (MCU types: atxmega16a4, atxmega16d4,
6f8a4444 91atxmega16x1, atxmega32a4, atxmega32d4, atxmega32x1).
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92
93Instruction set avrxmega3 is for the XMEGA AVR core with 8K to 64K program
6f8a4444 94memory space and greater than 64K data space (MCU types: none).
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95
96Instruction set avrxmega4 is for the XMEGA AVR core with up to 64K program
97memory space and less than 64K data space (MCU types: atxmega64a3, atxmega64d3).
98
34bca508 99Instruction set avrxmega5 is for the XMEGA AVR core with up to 64K program
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100memory space and greater than 64K data space (MCU types: atxmega64a1,
101atxmega64a1u).
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102
103Instruction set avrxmega6 is for the XMEGA AVR core with up to 256K program
104memory space and less than 64K data space (MCU types: atxmega128a3,
34bca508 105atxmega128d3, atxmega192a3, atxmega128b1, atxmega192d3, atxmega256a3,
6f8a4444 106atxmega256a3b, atxmega256a3bu, atxmega192d3).
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107
108Instruction set avrxmega7 is for the XMEGA AVR core with up to 256K program
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109memory space and greater than 64K data space (MCU types: atxmega128a1,
110atxmega128a1u).
8cc66334 111
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112@cindex @code{-mall-opcodes} command line option, AVR
113@item -mall-opcodes
114Accept all AVR opcodes, even if not supported by @code{-mmcu}.
115
116@cindex @code{-mno-skip-bug} command line option, AVR
117@item -mno-skip-bug
118This option disable warnings for skipping two-word instructions.
119
120@cindex @code{-mno-wrap} command line option, AVR
121@item -mno-wrap
122This option reject @code{rjmp/rcall} instructions with 8K wrap-around.
123
124@end table
125
126
127@node AVR Syntax
128@section Syntax
129@menu
130* AVR-Chars:: Special Characters
131* AVR-Regs:: Register Names
132* AVR-Modifiers:: Relocatable Expression Modifiers
133@end menu
134
135@node AVR-Chars
136@subsection Special Characters
137
138@cindex line comment character, AVR
139@cindex AVR line comment character
140
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141The presence of a @samp{;} anywhere on a line indicates the start of a
142comment that extends to the end of that line.
143
144If a @samp{#} appears as the first character of a line, the whole line
145is treated as a comment, but in this case the line can also be a
146logical line number directive (@pxref{Comments}) or a preprocessor
147control command (@pxref{Preprocessing}).
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148
149@cindex line separator, AVR
150@cindex statement separator, AVR
151@cindex AVR line separator
152
153The @samp{$} character can be used instead of a newline to separate
154statements.
155
156@node AVR-Regs
157@subsection Register Names
158
159@cindex AVR register names
160@cindex register names, AVR
161
b45619c0 162The AVR has 32 x 8-bit general purpose working registers @samp{r0},
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163@samp{r1}, ... @samp{r31}.
164Six of the 32 registers can be used as three 16-bit indirect address
165register pointers for Data Space addressing. One of the these address
166pointers can also be used as an address pointer for look up tables in
167Flash program memory. These added function registers are the 16-bit
168@samp{X}, @samp{Y} and @samp{Z} - registers.
169
170@smallexample
171X = @r{r26:r27}
172Y = @r{r28:r29}
173Z = @r{r30:r31}
174@end smallexample
175
176@node AVR-Modifiers
177@subsection Relocatable Expression Modifiers
178
179@cindex AVR modifiers
180@cindex syntax, AVR
181
182The assembler supports several modifiers when using relocatable addresses
183in AVR instruction operands. The general syntax is the following:
184
185@smallexample
186modifier(relocatable-expression)
187@end smallexample
188
189@table @code
190@cindex symbol modifiers
191
192@item lo8
193
194This modifier allows you to use bits 0 through 7 of
195an address expression as 8 bit relocatable expression.
196
197@item hi8
198
199This modifier allows you to use bits 7 through 15 of an address expression
200as 8 bit relocatable expression. This is useful with, for example, the
201AVR @samp{ldi} instruction and @samp{lo8} modifier.
202
203For example
204
205@smallexample
206ldi r26, lo8(sym+10)
207ldi r27, hi8(sym+10)
208@end smallexample
209
210@item hh8
211
212This modifier allows you to use bits 16 through 23 of
213an address expression as 8 bit relocatable expression.
214Also, can be useful for loading 32 bit constants.
215
216@item hlo8
217
218Synonym of @samp{hh8}.
219
220@item hhi8
221
222This modifier allows you to use bits 24 through 31 of
223an expression as 8 bit expression. This is useful with, for example, the
224AVR @samp{ldi} instruction and @samp{lo8}, @samp{hi8}, @samp{hlo8},
225@samp{hhi8}, modifier.
226
227For example
228
229@smallexample
230ldi r26, lo8(285774925)
231ldi r27, hi8(285774925)
232ldi r28, hlo8(285774925)
233ldi r29, hhi8(285774925)
234; r29,r28,r27,r26 = 285774925
235@end smallexample
236
237@item pm_lo8
238
239This modifier allows you to use bits 0 through 7 of
240an address expression as 8 bit relocatable expression.
241This modifier useful for addressing data or code from
242Flash/Program memory. The using of @samp{pm_lo8} similar
243to @samp{lo8}.
244
245@item pm_hi8
246
247This modifier allows you to use bits 8 through 15 of
248an address expression as 8 bit relocatable expression.
249This modifier useful for addressing data or code from
250Flash/Program memory.
251
252@item pm_hh8
253
254This modifier allows you to use bits 15 through 23 of
255an address expression as 8 bit relocatable expression.
256This modifier useful for addressing data or code from
257Flash/Program memory.
258
259@end table
260
261@node AVR Opcodes
262@section Opcodes
263
264@cindex AVR opcode summary
265@cindex opcode summary, AVR
266@cindex mnemonics, AVR
267@cindex instruction summary, AVR
268For detailed information on the AVR machine instruction set, see
269@url{www.atmel.com/products/AVR}.
270
271@code{@value{AS}} implements all the standard AVR opcodes.
272The following table summarizes the AVR opcodes, and their arguments.
273
274@smallexample
275@i{Legend:}
276 r @r{any register}
277 d @r{`ldi' register (r16-r31)}
278 v @r{`movw' even register (r0, r2, ..., r28, r30)}
279 a @r{`fmul' register (r16-r23)}
280 w @r{`adiw' register (r24,r26,r28,r30)}
281 e @r{pointer registers (X,Y,Z)}
282 b @r{base pointer register and displacement ([YZ]+disp)}
283 z @r{Z pointer register (for [e]lpm Rd,Z[+])}
284 M @r{immediate value from 0 to 255}
285 n @r{immediate value from 0 to 255 ( n = ~M ). Relocation impossible}
286 s @r{immediate value from 0 to 7}
287 P @r{Port address value from 0 to 63. (in, out)}
288 p @r{Port address value from 0 to 31. (cbi, sbi, sbic, sbis)}
289 K @r{immediate value from 0 to 63 (used in `adiw', `sbiw')}
290 i @r{immediate value}
291 l @r{signed pc relative offset from -64 to 63}
292 L @r{signed pc relative offset from -2048 to 2047}
293 h @r{absolute code address (call, jmp)}
294 S @r{immediate value from 0 to 7 (S = s << 4)}
295 ? @r{use this opcode entry if no parameters, else use next opcode entry}
296
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2971001010010001000 clc
2981001010011011000 clh
2991001010011111000 cli
3001001010010101000 cln
3011001010011001000 cls
3021001010011101000 clt
3031001010010111000 clv
3041001010010011000 clz
3051001010000001000 sec
3061001010001011000 seh
3071001010001111000 sei
3081001010000101000 sen
3091001010001001000 ses
3101001010001101000 set
3111001010000111000 sev
3121001010000011000 sez
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313100101001SSS1000 bclr S
314100101000SSS1000 bset S
3151001010100001001 icall
34bca508 3161001010000001001 ijmp
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3171001010111001000 lpm ?
3181001000ddddd010+ lpm r,z
3191001010111011000 elpm ?
3201001000ddddd011+ elpm r,z
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3210000000000000000 nop
3221001010100001000 ret
3231001010100011000 reti
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3241001010110001000 sleep
3251001010110011000 break
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3261001010110101000 wdr
3271001010111101000 spm
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328000111rdddddrrrr adc r,r
329000011rdddddrrrr add r,r
330001000rdddddrrrr and r,r
331000101rdddddrrrr cp r,r
332000001rdddddrrrr cpc r,r
333000100rdddddrrrr cpse r,r
334001001rdddddrrrr eor r,r
335001011rdddddrrrr mov r,r
336100111rdddddrrrr mul r,r
337001010rdddddrrrr or r,r
338000010rdddddrrrr sbc r,r
339000110rdddddrrrr sub r,r
340001001rdddddrrrr clr r
341000011rdddddrrrr lsl r
342000111rdddddrrrr rol r
343001000rdddddrrrr tst r
3440111KKKKddddKKKK andi d,M
3450111KKKKddddKKKK cbr d,n
3461110KKKKddddKKKK ldi d,M
34711101111dddd1111 ser d
3480110KKKKddddKKKK ori d,M
3490110KKKKddddKKKK sbr d,M
3500011KKKKddddKKKK cpi d,M
3510100KKKKddddKKKK sbci d,M
3520101KKKKddddKKKK subi d,M
3531111110rrrrr0sss sbrc r,s
3541111111rrrrr0sss sbrs r,s
3551111100ddddd0sss bld r,s
3561111101ddddd0sss bst r,s
35710110PPdddddPPPP in r,P
35810111PPrrrrrPPPP out P,r
35910010110KKddKKKK adiw w,K
36010010111KKddKKKK sbiw w,K
36110011000pppppsss cbi p,s
36210011010pppppsss sbi p,s
36310011001pppppsss sbic p,s
36410011011pppppsss sbis p,s
365111101lllllll000 brcc l
366111100lllllll000 brcs l
367111100lllllll001 breq l
368111101lllllll100 brge l
369111101lllllll101 brhc l
370111100lllllll101 brhs l
371111101lllllll111 brid l
372111100lllllll111 brie l
373111100lllllll000 brlo l
374111100lllllll100 brlt l
375111100lllllll010 brmi l
376111101lllllll001 brne l
377111101lllllll010 brpl l
378111101lllllll000 brsh l
379111101lllllll110 brtc l
380111100lllllll110 brts l
381111101lllllll011 brvc l
382111100lllllll011 brvs l
383111101lllllllsss brbc s,l
384111100lllllllsss brbs s,l
3851101LLLLLLLLLLLL rcall L
3861100LLLLLLLLLLLL rjmp L
3871001010hhhhh111h call h
3881001010hhhhh110h jmp h
3891001010rrrrr0101 asr r
3901001010rrrrr0000 com r
3911001010rrrrr1010 dec r
3921001010rrrrr0011 inc r
3931001010rrrrr0110 lsr r
3941001010rrrrr0001 neg r
3951001000rrrrr1111 pop r
3961001001rrrrr1111 push r
3971001010rrrrr0111 ror r
3981001010rrrrr0010 swap r
39900000001ddddrrrr movw v,v
40000000010ddddrrrr muls d,d
401000000110ddd0rrr mulsu a,a
402000000110ddd1rrr fmul a,a
403000000111ddd0rrr fmuls a,a
404000000111ddd1rrr fmulsu a,a
4051001001ddddd0000 sts i,r
4061001000ddddd0000 lds r,i
40710o0oo0dddddbooo ldd r,b
408100!000dddddee-+ ld r,e
40910o0oo1rrrrrbooo std b,r
410100!001rrrrree-+ st e,r
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4111001010100011001 eicall
4121001010000011001 eijmp
8473f7a4 413@end smallexample
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