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1 | @c Copyright 2007 Free Software Foundation, Inc. |
2 | @c This is part of the GAS manual. | |
3 | @c For copying conditions, see the file as.texinfo. | |
4 | ||
5 | @ifset GENERIC | |
6 | @page | |
7 | @node CR16-Dependent | |
8 | @chapter CR16 Dependent Features | |
9 | @end ifset | |
10 | @ifclear GENERIC | |
11 | @node Machine Dependencies | |
12 | @chapter CR16 Dependent Features | |
13 | @end ifclear | |
14 | ||
15 | @cindex CR16 support | |
16 | @menu | |
17 | * CR16 Operand Qualifiers:: CR16 Machine Operand Qualifiers | |
18 | @end menu | |
19 | ||
20 | @node CR16 Operand Qualifiers | |
21 | @section CR16 Operand Qualifiers | |
22 | @cindex CR16 Operand Qualifiers | |
23 | ||
24 | The National Semiconductor CR16 target of @code{@value{AS}} has a few machine dependent operand qualifiers. | |
25 | ||
26 | Operand expression type qualifier is an optional field in the instruction operand, to determines the type of the expression field of an operand. The @code{@@} is required. CR16 architecture uses one of the following expression qualifiers: | |
27 | ||
28 | @table @code | |
29 | @item s | |
30 | - @code{Specifies expression operand type as small} | |
31 | @item m | |
32 | - @code{Specifies expression operand type as medium} | |
33 | @item l | |
34 | - @code{Specifies expression operand type as large} | |
35 | @item c | |
36 | - @code{Specifies the CR16 Assembler generates a relocation entry for the operand, where pc has implied bit, the expression is adjusted accordingly. The linker uses the relocation entry to update the operand address at link time.} | |
37 | @end table | |
38 | ||
39 | CR16 target operand qualifiers and its size (in bits): | |
40 | ||
41 | @table @samp | |
42 | @item Immediate Operand | |
43 | - s ---- 4 bits | |
44 | @item | |
45 | - m ---- 16 bits, for movb and movw instructions. | |
46 | @item | |
47 | - m ---- 20 bits, movd instructions. | |
48 | @item | |
49 | - l ---- 32 bits | |
50 | ||
51 | @item Absolute Operand | |
52 | - s ---- Illegal specifier for this operand. | |
53 | @item | |
54 | - m ---- 20 bits, movd instructions. | |
55 | ||
56 | @item Displacement Operand | |
57 | - s ---- 8 bits | |
58 | @item | |
59 | - m ---- 16 bits | |
60 | @item | |
61 | - l ---- 24 bits | |
62 | @end table | |
63 | ||
64 | For example: | |
65 | @example | |
66 | 1 @code{movw $_myfun@@c,r1} | |
67 | ||
68 | This loads the address of _myfun, shifted right by 1, into r1. | |
69 | ||
70 | 2 @code{movd $_myfun@@c,(r2,r1)} | |
71 | ||
72 | This loads the address of _myfun, shifted right by 1, into register-pair r2-r1. | |
73 | ||
74 | 3 @code{_myfun_ptr:} | |
75 | @code{.long _myfun@@c} | |
76 | @code{loadd _myfun_ptr, (r1,r0)} | |
77 | @code{jal (r1,r0)} | |
78 | ||
79 | This .long directive, the address of _myfunc, shifted right by 1 at link time. | |
80 | @end example |