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aa820537 1@c Copyright 2007, 2008 Free Software Foundation, Inc.
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2@c This is part of the GAS manual.
3@c For copying conditions, see the file as.texinfo.
4
5@ifset GENERIC
6@page
7@node CR16-Dependent
8@chapter CR16 Dependent Features
9@end ifset
10@ifclear GENERIC
11@node Machine Dependencies
12@chapter CR16 Dependent Features
13@end ifclear
14
15@cindex CR16 support
16@menu
17* CR16 Operand Qualifiers:: CR16 Machine Operand Qualifiers
18@end menu
19
20@node CR16 Operand Qualifiers
21@section CR16 Operand Qualifiers
22@cindex CR16 Operand Qualifiers
23
24The National Semiconductor CR16 target of @code{@value{AS}} has a few machine dependent operand qualifiers.
25
26Operand expression type qualifier is an optional field in the instruction operand, to determines the type of the expression field of an operand. The @code{@@} is required. CR16 architecture uses one of the following expression qualifiers:
27
28@table @code
29@item s
30- @code{Specifies expression operand type as small}
31@item m
32- @code{Specifies expression operand type as medium}
33@item l
34- @code{Specifies expression operand type as large}
35@item c
36- @code{Specifies the CR16 Assembler generates a relocation entry for the operand, where pc has implied bit, the expression is adjusted accordingly. The linker uses the relocation entry to update the operand address at link time.}
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37@item got/GOT
38- @code{Specifies the CR16 Assembler generates a relocation entry for the operand, offset from Global Offset Table. The linker uses this relocation entry to update the operand address at link time}
39@item cgot/cGOT
40- @code{Specifies the CompactRISC Assembler generates a relocation entry for the operand, where pc has implied bit, the expression is adjusted accordingly. The linker uses the relocation entry to update the operand address at link time.}
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41@end table
42
43CR16 target operand qualifiers and its size (in bits):
44
45@table @samp
46@item Immediate Operand
47- s ---- 4 bits
48@item
49- m ---- 16 bits, for movb and movw instructions.
50@item
51- m ---- 20 bits, movd instructions.
52@item
53- l ---- 32 bits
54
55@item Absolute Operand
56- s ---- Illegal specifier for this operand.
57@item
58- m ---- 20 bits, movd instructions.
59
60@item Displacement Operand
61- s ---- 8 bits
62@item
63- m ---- 16 bits
64@item
65- l ---- 24 bits
66@end table
67
68For example:
69@example
701 @code{movw $_myfun@@c,r1}
71
72 This loads the address of _myfun, shifted right by 1, into r1.
73
742 @code{movd $_myfun@@c,(r2,r1)}
75
76 This loads the address of _myfun, shifted right by 1, into register-pair r2-r1.
77
783 @code{_myfun_ptr:}
79 @code{.long _myfun@@c}
80 @code{loadd _myfun_ptr, (r1,r0)}
81 @code{jal (r1,r0)}
82
83 This .long directive, the address of _myfunc, shifted right by 1 at link time.
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84
854 @code{loadd _data1@@GOT(r12), (r1,r0)}
86
87 This loads the address of _data1, into global offset table (ie GOT) and its offset value from GOT loads into register-pair r2-r1.
88
895 @code{loadd _myfunc@@cGOT(r12), (r1,r0)}
90
91 This loads the address of _myfun, shifted right by 1, into global offset table (ie GOT) and its offset value from GOT loads into register-pair r1-r0.
3d3d428f 92@end example
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