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1 | @c Copyright (C) 1997 Free Software Foundation, Inc. |
2 | @c This is part of the GAS manual. | |
3 | @c For copying conditions, see the file as.texinfo. | |
4 | @ifset GENERIC | |
5 | @page | |
6 | @node D30V-Dependent | |
7 | @chapter D30V Dependent Features | |
8 | @end ifset | |
9 | @ifclear GENERIC | |
10 | @node Machine Dependencies | |
11 | @chapter D30V Dependent Features | |
12 | @end ifclear | |
13 | ||
14 | @cindex D30V support | |
15 | @menu | |
16 | * D30V-Opts:: D30V Options | |
17 | * D30V-Syntax:: Syntax | |
18 | * D30V-Float:: Floating Point | |
19 | * D30V-Opcodes:: Opcodes | |
20 | @end menu | |
21 | ||
22 | @node D30V-Opts | |
23 | @section D30V Options | |
24 | @cindex options, D30V | |
25 | @cindex D30V options | |
26 | The Mitsubishi D30V version of @code{@value{AS}} has a few machine | |
27 | dependent options. | |
28 | ||
29 | @table @samp | |
30 | @item -O | |
31 | The D30V can often execute two sub-instructions in parallel. When this option | |
32 | is used, @code{@value{AS}} will attempt to optimize its output by detecting when | |
33 | instructions can be executed in parallel. | |
34 | ||
35 | @item -n | |
36 | When this option is used, @code{@value{AS}} will issue a warning every | |
37 | time it adds a nop instruction. | |
38 | ||
39 | @item -N | |
40 | When this option is used, @code{@value{AS}} will issue a warning if it | |
41 | needs to insert a nop after a 32-bit multiply before a load or 16-bit | |
42 | multiply instruction. | |
43 | @end table | |
44 | ||
45 | @node D30V-Syntax | |
46 | @section Syntax | |
47 | @cindex D30V syntax | |
48 | @cindex syntax, D30V | |
49 | ||
50 | The D30V syntax is based on the syntax in Mitsubishi's D30V architecture manual. | |
51 | The differences are detailed below. | |
52 | ||
53 | @menu | |
54 | * D30V-Size:: Size Modifiers | |
55 | * D30V-Subs:: Sub-Instructions | |
56 | * D30V-Chars:: Special Characters | |
57 | * D30V-Guarded:: Guarded Execution | |
58 | * D30V-Regs:: Register Names | |
59 | * D30V-Addressing:: Addressing Modes | |
60 | @end menu | |
61 | ||
62 | ||
63 | @node D30V-Size | |
64 | @subsection Size Modifiers | |
65 | @cindex D30V size modifiers | |
66 | @cindex size modifiers, D30V | |
67 | The D30V version of @code{@value{AS}} uses the instruction names in the D30V | |
68 | Architecture Manual. However, the names in the manual are sometimes ambiguous. | |
69 | There are instruction names that can assemble to a short or long form opcode. | |
70 | How does the assembler pick the correct form? @code{@value{AS}} will always pick the | |
71 | smallest form if it can. When dealing with a symbol that is not defined yet when a | |
72 | line is being assembled, it will always use the long form. If you need to force the | |
73 | assembler to use either the short or long form of the instruction, you can append | |
74 | either @samp{.s} (short) or @samp{.l} (long) to it. For example, if you are writing | |
75 | an assembly program and you want to do a branch to a symbol that is defined later | |
76 | in your program, you can write @samp{bra.s foo}. | |
77 | Objdump and GDB will always append @samp{.s} or @samp{.l} to instructions which | |
78 | have both short and long forms. | |
79 | ||
80 | @node D30V-Subs | |
81 | @subsection Sub-Instructions | |
82 | @cindex D30V sub-instructions | |
83 | @cindex sub-instructions, D30V | |
84 | The D30V assembler takes as input a series of instructions, either one-per-line, | |
85 | or in the special two-per-line format described in the next section. Some of these | |
86 | instructions will be short-form or sub-instructions. These sub-instructions can be packed | |
87 | into a single instruction. The assembler will do this automatically. It will also detect | |
88 | when it should not pack instructions. For example, when a label is defined, the next | |
89 | instruction will never be packaged with the previous one. Whenever a branch and link | |
90 | instruction is called, it will not be packaged with the next instruction so the return | |
91 | address will be valid. Nops are automatically inserted when necessary. | |
92 | ||
93 | If you do not want the assembler automatically making these decisions, you can control | |
94 | the packaging and execution type (parallel or sequential) with the special execution | |
95 | symbols described in the next section. | |
96 | ||
97 | @node D30V-Chars | |
98 | @subsection Special Characters | |
99 | @cindex line comment character, D30V | |
100 | @cindex D30V line comment character | |
101 | @samp{;} and @samp{#} are the line comment characters. | |
102 | @cindex sub-instruction ordering, D30V | |
103 | @cindex D30V sub-instruction ordering | |
104 | Sub-instructions may be executed in order, in reverse-order, or in parallel. | |
105 | Instructions listed in the standard one-per-line format will be executed | |
106 | sequentially unless you use the @samp{-O} option. | |
107 | ||
108 | To specify the executing order, use the following symbols: | |
109 | @table @samp | |
110 | @item -> | |
111 | Sequential with instruction on the left first. | |
112 | ||
113 | @item <- | |
114 | Sequential with instruction on the right first. | |
115 | ||
116 | @item || | |
117 | Parallel | |
118 | @end table | |
119 | ||
120 | The D30V syntax allows either one instruction per line, one instruction per line with | |
121 | the execution symbol, or two instructions per line. For example | |
122 | @table @code | |
123 | @item abs r2,r3 -> abs r4,r5 | |
124 | Execute these sequentially. The instruction on the right is in the right | |
125 | container and is executed second. | |
126 | ||
127 | @item abs r2,r3 <- abs r4,r5 | |
128 | Execute these reverse-sequentially. The instruction on the right is in the right | |
129 | container, and is executed first. | |
130 | ||
131 | @item abs r2,r3 || abs r4,r5 | |
132 | Execute these in parallel. | |
133 | ||
134 | @item ldw r2,@@(r3,r4) || | |
135 | @itemx mulx r6,r8,r9 | |
136 | Two-line format. Execute these in parallel. | |
137 | ||
138 | @item mulx a0,r8,r9 | |
139 | @itemx stw r2,@@(r3,r4) | |
140 | Two-line format. Execute these sequentially unless @samp{-O} option is | |
141 | used. If the @samp{-O} option is used, the assembler will determine if | |
142 | the instructions could be done in parallel (the above two instructions | |
143 | can be done in parallel), and if so, emit them as parallel instructions. | |
144 | The assembler will put them in the proper containers. In the above | |
145 | example, the assembler will put the @samp{stw} instruction in left | |
146 | container and the @samp{mulx} instruction in the right container. | |
147 | ||
148 | @item stw r2,@@(r3,r4) -> | |
149 | @itemx mulx a0,r8,r9 | |
150 | Two-line format. Execute the @samp{stw} instruction followed by the | |
151 | @samp{mulx} instruction sequentially. The first instruction goes in the | |
152 | left container and the second instruction goes into right container. | |
153 | The assembler will give an error if the machine ordering constraints are | |
154 | violated. | |
155 | ||
156 | @item stw r2,@@(r3,r4) <- | |
157 | @itemx mulx a0,r8,r9 | |
158 | Same as previous example, except that the @samp{mulx} instruction is | |
159 | executed before the @samp{stw} instruction. | |
160 | @end table | |
161 | ||
162 | @cindex symbol names, @samp{$} in | |
163 | @cindex @code{$} in symbol names | |
164 | Since @samp{$} has no special meaning, you may use it in symbol names. | |
165 | ||
166 | @node D30V-Guarded | |
167 | @subsection Guarded Execution | |
168 | @cindex D30V Guarded Execution | |
169 | @code{@value{AS}} supports the full range of guarded execution | |
170 | directives for each instruction. Just append the directive after the | |
171 | instruction proper. The directives are: | |
172 | ||
173 | @table @samp | |
174 | @item /tx | |
175 | Execute the instruction if flag f0 is true. | |
176 | @item /fx | |
177 | Execute the instruction if flag f0 is false. | |
178 | @item /xt | |
179 | Execute the instruction if flag f1 is true. | |
180 | @item /xf | |
181 | Execute the instruction if flag f1 is false. | |
182 | @item /tt | |
183 | Execute the instruction if both flags f0 and f1 are true. | |
184 | @item /tf | |
185 | Execute the instruction if flag f0 is true and flag f1 is false. | |
186 | @end table | |
187 | ||
188 | @node D30V-Regs | |
189 | @subsection Register Names | |
190 | @cindex D30V registers | |
191 | @cindex registers, D30V | |
192 | You can use the predefined symbols @samp{r0} through @samp{r63} to refer | |
193 | to the D30V registers. You can also use @samp{sp} as an alias for | |
194 | @samp{r63} and @samp{link} as an alias for @samp{r62}. The accumulators | |
195 | are @samp{a0} and @samp{a1}. | |
196 | ||
197 | The D30V also has predefined symbols for these control registers and status bits: | |
198 | @table @code | |
199 | @item psw | |
200 | Processor Status Word | |
201 | @item bpsw | |
202 | Backup Processor Status Word | |
203 | @item pc | |
204 | Program Counter | |
205 | @item bpc | |
206 | Backup Program Counter | |
207 | @item rpt_c | |
208 | Repeat Count | |
209 | @item rpt_s | |
210 | Repeat Start address | |
211 | @item rpt_e | |
212 | Repeat End address | |
213 | @item mod_s | |
214 | Modulo Start address | |
215 | @item mod_e | |
216 | Modulo End address | |
217 | @item iba | |
218 | Instruction Break Address | |
219 | @item f0 | |
220 | Flag 0 | |
221 | @item f1 | |
222 | Flag 1 | |
223 | @item f2 | |
224 | Flag 2 | |
225 | @item f3 | |
226 | Flag 3 | |
227 | @item f4 | |
228 | Flag 4 | |
229 | @item f5 | |
230 | Flag 5 | |
231 | @item f6 | |
232 | Flag 6 | |
233 | @item f7 | |
234 | Flag 7 | |
235 | @item s | |
236 | Same as flag 4 (saturation flag) | |
237 | @item v | |
238 | Same as flag 5 (overflow flag) | |
239 | @item va | |
240 | Same as flag 6 (sticky overflow flag) | |
241 | @item c | |
242 | Same as flag 7 (carry/borrow flag) | |
243 | @item b | |
244 | Same as flag 7 (carry/borrow flag) | |
245 | @end table | |
246 | ||
247 | @node D30V-Addressing | |
248 | @subsection Addressing Modes | |
249 | @cindex addressing modes, D30V | |
250 | @cindex D30V addressing modes | |
251 | @code{@value{AS}} understands the following addressing modes for the D30V. | |
252 | @code{R@var{n}} in the following refers to any of the numbered | |
253 | registers, but @emph{not} the control registers. | |
254 | @table @code | |
255 | @item R@var{n} | |
256 | Register direct | |
257 | @item @@R@var{n} | |
258 | Register indirect | |
259 | @item @@R@var{n}+ | |
260 | Register indirect with post-increment | |
261 | @item @@R@var{n}- | |
262 | Register indirect with post-decrement | |
263 | @item @@-SP | |
264 | Register indirect with pre-decrement | |
265 | @item @@(@var{disp}, R@var{n}) | |
266 | Register indirect with displacement | |
267 | @item @var{addr} | |
268 | PC relative address (for branch or rep). | |
269 | @item #@var{imm} | |
270 | Immediate data (the @samp{#} is optional and ignored) | |
271 | @end table | |
272 | ||
273 | @node D30V-Float | |
274 | @section Floating Point | |
275 | @cindex floating point, D30V | |
276 | @cindex D30V floating point | |
277 | The D30V has no hardware floating point, but the @code{.float} and @code{.double} | |
278 | directives generates @sc{ieee} floating-point numbers for compatibility | |
279 | with other development tools. | |
280 | ||
281 | @node D30V-Opcodes | |
282 | @section Opcodes | |
283 | @cindex D30V opcode summary | |
284 | @cindex opcode summary, D30V | |
285 | @cindex mnemonics, D30V | |
286 | @cindex instruction summary, D30V | |
287 | For detailed information on the D30V machine instruction set, see | |
288 | @cite{D30V Architecture: A VLIW Microprocessor for Multimedia Applications} | |
289 | (Mitsubishi Electric Corp.). | |
290 | @code{@value{AS}} implements all the standard D30V opcodes. The only changes are those | |
291 | described in the section on size modifiers | |
292 |