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1 | @c Copyright 2002 |
2 | @c Free Software Foundation, Inc. | |
3 | @c Contributed by David Mosberger-Tang <davidm@hpl.hp.com> | |
4 | @c This is part of the GAS manual. | |
5 | @c For copying conditions, see the file as.texinfo. | |
6 | ||
7 | @ifset GENERIC | |
8 | @page | |
9 | @node IA-64-Dependent | |
10 | @chapter IA-64 Dependent Features | |
11 | @end ifset | |
12 | ||
13 | @ifclear GENERIC | |
14 | @node Machine Dependencies | |
15 | @chapter IA-64 Dependent Features | |
16 | @end ifclear | |
17 | ||
18 | @cindex IA-64 support | |
19 | @menu | |
20 | * IA-64 Options:: Options | |
21 | * IA-64 Syntax:: Syntax | |
22 | @c * IA-64 Floating Point:: Floating Point // to be written | |
23 | @c * IA-64 Directives:: IA-64 Machine Directives // to be written | |
24 | * IA-64 Opcodes:: Opcodes | |
25 | @end menu | |
26 | ||
27 | @node IA-64 Options | |
28 | @section Options | |
29 | @cindex IA-64 options | |
30 | @cindex options for IA-64 | |
31 | ||
32 | @table @option | |
33 | @cindex @code{-mconstant-gp} command line option, IA-64 | |
34 | ||
35 | @item -mconstant-gp | |
36 | This option instructs the assembler to mark the resulting object file | |
37 | as using the ``constant GP'' model. With this model, it is assumed | |
38 | that the entire program uses a single global pointer (GP) value. Note | |
39 | that this option does not in any fashion affect the machine code | |
40 | emitted by the assembler. All it does is turn on the EF_IA_64_CONS_GP | |
41 | flag in the ELF file header. | |
42 | ||
43 | @item -mauto-pic | |
44 | This option instructs the assembler to mark the resulting object file | |
45 | as using the ``constant GP without function descriptor'' data model. | |
46 | This model is like the ``constant GP'' model, except that it | |
062b7c0c | 47 | additionally does away with function descriptors. What this means is |
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48 | that the address of a function refers directly to the function's code |
49 | entry-point. Normally, such an address would refer to a function | |
50 | descriptor, which contains both the code entry-point and the GP-value | |
51 | needed by the function. Note that this option does not in any fashion | |
52 | affect the machine code emitted by the assembler. All it does is | |
53 | turn on the EF_IA_64_NOFUNCDESC_CONS_GP flag in the ELF file header. | |
54 | ||
55 | @item -milp32 | |
56 | @item -milp64 | |
57 | @item -mlp64 | |
58 | @item -mp64 | |
59 | These options select the data model. The assembler defaults to @code{-mlp64} | |
60 | (LP64 data model). | |
61 | ||
62 | @item -mle | |
63 | @item -mbe | |
64 | These options select the byte order. The @code{-mle} option selects little-endian | |
65 | byte order (default) and @code{-mbe} selects big-endian byte order. Note that | |
66 | IA-64 machine code always uses little-endian byte order. | |
67 | ||
68 | @item -x | |
69 | @item -xexplicit | |
70 | These options turn on dependency violation checking. This checking is turned on by | |
71 | default. | |
72 | ||
73 | @item -xauto | |
74 | This option instructs the assembler to automatically insert stop bits where necessary | |
75 | to remove dependency violations. | |
76 | ||
77 | @item -xdebug | |
78 | This turns on debug output intended to help tracking down bugs in the dependency | |
79 | violation checker. | |
80 | ||
81 | @end table | |
82 | ||
83 | @cindex IA-64 Syntax | |
84 | @node IA-64 Syntax | |
85 | @section Syntax | |
86 | The assembler syntax closely follows the IA-64 Assembly Language | |
87 | Reference Guide. | |
88 | ||
89 | @menu | |
90 | * IA-64-Chars:: Special Characters | |
91 | * IA-64-Regs:: Register Names | |
92 | * IA-64-Bits:: Bit Names | |
93 | * IA-64-Relocs:: Relocations | |
94 | @end menu | |
95 | ||
96 | @node IA-64-Chars | |
97 | @subsection Special Characters | |
98 | ||
99 | @cindex line comment character, IA-64 | |
100 | @cindex IA-64 line comment character | |
101 | @samp{//} is the line comment token. | |
102 | ||
103 | @cindex line separator, IA-64 | |
104 | @cindex statement separator, IA-64 | |
105 | @cindex IA-64 line separator | |
106 | @samp{;} can be used instead of a newline to separate statements. | |
107 | ||
108 | @node IA-64-Regs | |
109 | @subsection Register Names | |
110 | @cindex IA-64 registers | |
111 | @cindex register names, IA-64 | |
112 | ||
60493797 KH |
113 | The 128 integer registers are referred to as @samp{r@var{n}}. |
114 | The 128 floating-point registers are referred to as @samp{f@var{n}}. | |
115 | The 128 application registers are referred to as @samp{ar@var{n}}. | |
116 | The 128 control registers are referred to as @samp{cr@var{n}}. | |
117 | The 64 one-bit predicate registers are referred to as @samp{p@var{n}}. | |
118 | The 8 branch registers are referred to as @samp{b@var{n}}. | |
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119 | In addition, the assembler defines a number of aliases: |
120 | @samp{gp} (@samp{r1}), @samp{sp} (@samp{r12}), @samp{rp} (@samp{b0}), | |
121 | @samp{ret0} (@samp{r8}), @samp{ret1} (@samp{r9}), @samp{ret2} (@samp{r10}), | |
122 | @samp{ret3} (@samp{r9}), @samp{farg@var{n}} (@samp{f8+@var{n}}), and | |
123 | @samp{fret@var{n}} (@samp{f8+@var{n}}). | |
124 | ||
125 | For convenience, the assembler also defines aliases for all named application | |
126 | and control registers. For example, @samp{ar.bsp} refers to the register | |
127 | backing store pointer (@samp{ar17}). Similarly, @samp{cr.eoi} refers to | |
128 | the end-of-interrupt register (@samp{cr67}). | |
129 | ||
130 | @node IA-64-Bits | |
131 | @subsection IA-64 Processor-Status-Register (PSR) Bit Names | |
132 | @cindex IA-64 Processor-status-Register bit names | |
133 | @cindex PSR bits | |
134 | @cindex bit names, IA-64 | |
135 | ||
136 | The assembler defines bit masks for each of the bits in the IA-64 | |
137 | processor status register. For example, @samp{psr.ic} corresponds to | |
138 | a value of 0x2000. These masks are primarily intended for use with | |
139 | the @sample{ssm}/@sample{sum} and @sample{rsm}/@sample{rum} | |
140 | instructions, but they can be used anywhere else where an integer | |
141 | constant is expected. | |
142 | ||
143 | @node IA-64 Opcodes | |
144 | @section Opcodes | |
145 | For detailed information on the IA-64 machine instruction set, see the | |
146 | @c Attempt to work around a very overfull hbox. | |
147 | @iftex | |
148 | IA-64 Assembly Language Reference Guide available at | |
149 | @smallfonts | |
150 | @example | |
151 | http://developer.intel.com/design/itanium/arch_spec.htm | |
152 | @end example | |
153 | @textfonts | |
154 | @end iftex | |
155 | @ifnottex | |
156 | @uref{http://developer.intel.com/design/itanium/arch_spec.htm,IA-64 Architecture Handbook}. | |
157 | @end ifnottex |