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1 | @c Copyright 2002 |
2 | @c Free Software Foundation, Inc. | |
3 | @c Contributed by David Mosberger-Tang <davidm@hpl.hp.com> | |
4 | @c This is part of the GAS manual. | |
5 | @c For copying conditions, see the file as.texinfo. | |
6 | ||
7 | @ifset GENERIC | |
8 | @page | |
9 | @node IA-64-Dependent | |
10 | @chapter IA-64 Dependent Features | |
11 | @end ifset | |
12 | ||
13 | @ifclear GENERIC | |
14 | @node Machine Dependencies | |
15 | @chapter IA-64 Dependent Features | |
16 | @end ifclear | |
17 | ||
18 | @cindex IA-64 support | |
19 | @menu | |
20 | * IA-64 Options:: Options | |
21 | * IA-64 Syntax:: Syntax | |
22 | @c * IA-64 Floating Point:: Floating Point // to be written | |
23 | @c * IA-64 Directives:: IA-64 Machine Directives // to be written | |
24 | * IA-64 Opcodes:: Opcodes | |
25 | @end menu | |
26 | ||
27 | @node IA-64 Options | |
28 | @section Options | |
29 | @cindex IA-64 options | |
30 | @cindex options for IA-64 | |
31 | ||
32 | @table @option | |
33 | @cindex @code{-mconstant-gp} command line option, IA-64 | |
34 | ||
35 | @item -mconstant-gp | |
36 | This option instructs the assembler to mark the resulting object file | |
37 | as using the ``constant GP'' model. With this model, it is assumed | |
38 | that the entire program uses a single global pointer (GP) value. Note | |
39 | that this option does not in any fashion affect the machine code | |
40 | emitted by the assembler. All it does is turn on the EF_IA_64_CONS_GP | |
41 | flag in the ELF file header. | |
42 | ||
43 | @item -mauto-pic | |
44 | This option instructs the assembler to mark the resulting object file | |
45 | as using the ``constant GP without function descriptor'' data model. | |
46 | This model is like the ``constant GP'' model, except that it | |
062b7c0c | 47 | additionally does away with function descriptors. What this means is |
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48 | that the address of a function refers directly to the function's code |
49 | entry-point. Normally, such an address would refer to a function | |
50 | descriptor, which contains both the code entry-point and the GP-value | |
51 | needed by the function. Note that this option does not in any fashion | |
52 | affect the machine code emitted by the assembler. All it does is | |
53 | turn on the EF_IA_64_NOFUNCDESC_CONS_GP flag in the ELF file header. | |
54 | ||
55 | @item -milp32 | |
56 | @item -milp64 | |
57 | @item -mlp64 | |
58 | @item -mp64 | |
59 | These options select the data model. The assembler defaults to @code{-mlp64} | |
60 | (LP64 data model). | |
61 | ||
62 | @item -mle | |
63 | @item -mbe | |
64 | These options select the byte order. The @code{-mle} option selects little-endian | |
65 | byte order (default) and @code{-mbe} selects big-endian byte order. Note that | |
66 | IA-64 machine code always uses little-endian byte order. | |
67 | ||
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68 | @item -munwind-check=warning |
69 | @item -munwind-check=error | |
70 | These options control what the assembler will do when performing | |
71 | consistency checks on unwind directives. @code{-munwind-check=warning} | |
72 | will make the assembler issue a warning when an unwind directive check | |
73 | fails. This is the default. @code{-munwind-check=error} will make the | |
74 | assembler issue an error when an unwind directive check fails. | |
75 | ||
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76 | @item -x |
77 | @item -xexplicit | |
78 | These options turn on dependency violation checking. This checking is turned on by | |
79 | default. | |
80 | ||
81 | @item -xauto | |
82 | This option instructs the assembler to automatically insert stop bits where necessary | |
83 | to remove dependency violations. | |
84 | ||
85 | @item -xdebug | |
86 | This turns on debug output intended to help tracking down bugs in the dependency | |
87 | violation checker. | |
88 | ||
89 | @end table | |
90 | ||
91 | @cindex IA-64 Syntax | |
92 | @node IA-64 Syntax | |
93 | @section Syntax | |
94 | The assembler syntax closely follows the IA-64 Assembly Language | |
95 | Reference Guide. | |
96 | ||
97 | @menu | |
98 | * IA-64-Chars:: Special Characters | |
99 | * IA-64-Regs:: Register Names | |
100 | * IA-64-Bits:: Bit Names | |
5cb53c21 | 101 | @c * IA-64-Relocs:: Relocations // to be written |
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102 | @end menu |
103 | ||
104 | @node IA-64-Chars | |
105 | @subsection Special Characters | |
106 | ||
107 | @cindex line comment character, IA-64 | |
108 | @cindex IA-64 line comment character | |
109 | @samp{//} is the line comment token. | |
110 | ||
111 | @cindex line separator, IA-64 | |
112 | @cindex statement separator, IA-64 | |
113 | @cindex IA-64 line separator | |
114 | @samp{;} can be used instead of a newline to separate statements. | |
115 | ||
116 | @node IA-64-Regs | |
117 | @subsection Register Names | |
118 | @cindex IA-64 registers | |
119 | @cindex register names, IA-64 | |
120 | ||
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121 | The 128 integer registers are referred to as @samp{r@var{n}}. |
122 | The 128 floating-point registers are referred to as @samp{f@var{n}}. | |
123 | The 128 application registers are referred to as @samp{ar@var{n}}. | |
124 | The 128 control registers are referred to as @samp{cr@var{n}}. | |
125 | The 64 one-bit predicate registers are referred to as @samp{p@var{n}}. | |
126 | The 8 branch registers are referred to as @samp{b@var{n}}. | |
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127 | In addition, the assembler defines a number of aliases: |
128 | @samp{gp} (@samp{r1}), @samp{sp} (@samp{r12}), @samp{rp} (@samp{b0}), | |
129 | @samp{ret0} (@samp{r8}), @samp{ret1} (@samp{r9}), @samp{ret2} (@samp{r10}), | |
130 | @samp{ret3} (@samp{r9}), @samp{farg@var{n}} (@samp{f8+@var{n}}), and | |
131 | @samp{fret@var{n}} (@samp{f8+@var{n}}). | |
132 | ||
133 | For convenience, the assembler also defines aliases for all named application | |
134 | and control registers. For example, @samp{ar.bsp} refers to the register | |
135 | backing store pointer (@samp{ar17}). Similarly, @samp{cr.eoi} refers to | |
136 | the end-of-interrupt register (@samp{cr67}). | |
137 | ||
138 | @node IA-64-Bits | |
139 | @subsection IA-64 Processor-Status-Register (PSR) Bit Names | |
140 | @cindex IA-64 Processor-status-Register bit names | |
141 | @cindex PSR bits | |
142 | @cindex bit names, IA-64 | |
143 | ||
144 | The assembler defines bit masks for each of the bits in the IA-64 | |
145 | processor status register. For example, @samp{psr.ic} corresponds to | |
146 | a value of 0x2000. These masks are primarily intended for use with | |
5cb53c21 | 147 | the @samp{ssm}/@samp{sum} and @samp{rsm}/@samp{rum} |
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148 | instructions, but they can be used anywhere else where an integer |
149 | constant is expected. | |
150 | ||
151 | @node IA-64 Opcodes | |
152 | @section Opcodes | |
153 | For detailed information on the IA-64 machine instruction set, see the | |
154 | @c Attempt to work around a very overfull hbox. | |
155 | @iftex | |
156 | IA-64 Assembly Language Reference Guide available at | |
157 | @smallfonts | |
158 | @example | |
159 | http://developer.intel.com/design/itanium/arch_spec.htm | |
160 | @end example | |
161 | @textfonts | |
162 | @end iftex | |
163 | @ifnottex | |
164 | @uref{http://developer.intel.com/design/itanium/arch_spec.htm,IA-64 Architecture Handbook}. | |
165 | @end ifnottex |