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82704155 | 1 | @c Copyright (C) 2008-2019 Free Software Foundation, Inc. |
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2 | @c This is part of the GAS manual. |
3 | @c For copying conditions, see the file as.texinfo. | |
4 | ||
5 | @ifset GENERIC | |
6 | @page | |
7 | @node LM32-Dependent | |
8 | @chapter LM32 Dependent Features | |
9 | @end ifset | |
10 | ||
11 | @ifclear GENERIC | |
12 | @node Machine Dependencies | |
4e25adb3 | 13 | @chapter LM32 Dependent Features |
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14 | @end ifclear |
15 | ||
16 | @cindex LM32 support | |
17 | @menu | |
18 | * LM32 Options:: Options | |
19 | * LM32 Syntax:: Syntax | |
20 | * LM32 Opcodes:: Opcodes | |
21 | @end menu | |
22 | ||
23 | @node LM32 Options | |
24 | @section Options | |
25 | @cindex LM32 options (none) | |
26 | @cindex options for LM32 (none) | |
27 | ||
28 | @table @code | |
29 | ||
a05a5b64 | 30 | @cindex @code{-mmultiply-enabled} command-line option, LM32 |
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31 | @item -mmultiply-enabled |
32 | Enable multiply instructions. | |
33 | ||
a05a5b64 | 34 | @cindex @code{-mdivide-enabled} command-line option, LM32 |
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35 | @item -mdivide-enabled |
36 | Enable divide instructions. | |
37 | ||
a05a5b64 | 38 | @cindex @code{-mbarrel-shift-enabled} command-line option, LM32 |
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39 | @item -mbarrel-shift-enabled |
40 | Enable barrel-shift instructions. | |
41 | ||
a05a5b64 | 42 | @cindex @code{-msign-extend-enabled} command-line option, LM32 |
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43 | @item -msign-extend-enabled |
44 | Enable sign extend instructions. | |
45 | ||
a05a5b64 | 46 | @cindex @code{-muser-enabled} command-line option, LM32 |
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47 | @item -muser-enabled |
48 | Enable user defined instructions. | |
49 | ||
a05a5b64 | 50 | @cindex @code{-micache-enabled} command-line option, LM32 |
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51 | @item -micache-enabled |
52 | Enable instruction cache related CSRs. | |
53 | ||
a05a5b64 | 54 | @cindex @code{-mdcache-enabled} command-line option, LM32 |
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55 | @item -mdcache-enabled |
56 | Enable data cache related CSRs. | |
57 | ||
a05a5b64 | 58 | @cindex @code{-mbreak-enabled} command-line option, LM32 |
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59 | @item -mbreak-enabled |
60 | Enable break instructions. | |
61 | ||
a05a5b64 | 62 | @cindex @code{-mall-enabled} command-line option, LM32 |
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63 | @item -mall-enabled |
64 | Enable all instructions and CSRs. | |
65 | ||
66 | @end table | |
67 | ||
68 | ||
69 | @node LM32 Syntax | |
70 | @section Syntax | |
71 | @menu | |
72 | * LM32-Regs:: Register Names | |
73 | * LM32-Modifiers:: Relocatable Expression Modifiers | |
7c31ae13 | 74 | * LM32-Chars:: Special Characters |
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75 | @end menu |
76 | ||
77 | @node LM32-Regs | |
78 | @subsection Register Names | |
79 | ||
80 | @cindex LM32 register names | |
81 | @cindex register names, LM32 | |
82 | ||
83 | LM32 has 32 x 32-bit general purpose registers @samp{r0}, | |
84 | @samp{r1}, ... @samp{r31}. | |
85 | ||
86 | The following aliases are defined: @samp{gp} - @samp{r26}, | |
87 | @samp{fp} - @samp{r27}, @samp{sp} - @samp{r28}, | |
88 | @samp{ra} - @samp{r29}, @samp{ea} - @samp{r30}, | |
89 | @samp{ba} - @samp{r31}. | |
90 | ||
91 | LM32 has the following Control and Status Registers (CSRs). | |
92 | ||
93 | @table @code | |
94 | @item IE | |
95 | Interrupt enable. | |
96 | @item IM | |
97 | Interrupt mask. | |
98 | @item IP | |
99 | Interrupt pending. | |
100 | @item ICC | |
101 | Instruction cache control. | |
102 | @item DCC | |
103 | Data cache control. | |
104 | @item CC | |
105 | Cycle counter. | |
106 | @item CFG | |
107 | Configuration. | |
108 | @item EBA | |
109 | Exception base address. | |
110 | @item DC | |
111 | Debug control. | |
112 | @item DEBA | |
113 | Debug exception base address. | |
114 | @item JTX | |
115 | JTAG transmit. | |
116 | @item JRX | |
117 | JTAG receive. | |
118 | @item BP0 | |
119 | Breakpoint 0. | |
120 | @item BP1 | |
121 | Breakpoint 1. | |
122 | @item BP2 | |
123 | Breakpoint 2. | |
124 | @item BP3 | |
125 | Breakpoint 3. | |
126 | @item WP0 | |
127 | Watchpoint 0. | |
128 | @item WP1 | |
129 | Watchpoint 1. | |
130 | @item WP2 | |
131 | Watchpoint 2. | |
132 | @item WP3 | |
133 | Watchpoint 3. | |
134 | @end table | |
135 | ||
136 | @node LM32-Modifiers | |
137 | @subsection Relocatable Expression Modifiers | |
138 | ||
139 | @cindex LM32 modifiers | |
140 | @cindex syntax, LM32 | |
141 | ||
142 | The assembler supports several modifiers when using relocatable addresses | |
143 | in LM32 instruction operands. The general syntax is the following: | |
144 | ||
145 | @smallexample | |
146 | modifier(relocatable-expression) | |
147 | @end smallexample | |
148 | ||
149 | @table @code | |
150 | @cindex symbol modifiers | |
151 | ||
152 | @item lo | |
153 | ||
154 | This modifier allows you to use bits 0 through 15 of | |
155 | an address expression as 16 bit relocatable expression. | |
156 | ||
157 | @item hi | |
158 | ||
159 | This modifier allows you to use bits 16 through 23 of an address expression | |
160 | as 16 bit relocatable expression. | |
161 | ||
162 | For example | |
163 | ||
164 | @smallexample | |
165 | ori r4, r4, lo(sym+10) | |
166 | orhi r4, r4, hi(sym+10) | |
167 | @end smallexample | |
168 | ||
169 | @item gp | |
170 | ||
171 | This modified creates a 16-bit relocatable expression that is | |
172 | the offset of the symbol from the global pointer. | |
173 | ||
174 | @smallexample | |
175 | mva r4, gp(sym) | |
176 | @end smallexample | |
177 | ||
178 | @item got | |
179 | ||
180 | This modifier places a symbol in the GOT and creates a 16-bit | |
181 | relocatable expression that is the offset into the GOT of this | |
182 | symbol. | |
183 | ||
184 | @smallexample | |
185 | lw r4, (gp+got(sym)) | |
186 | @end smallexample | |
187 | ||
188 | @item gotofflo16 | |
189 | ||
190 | This modifier allows you to use the bits 0 through 15 of an | |
191 | address which is an offset from the GOT. | |
192 | ||
193 | @item gotoffhi16 | |
194 | ||
195 | This modifier allows you to use the bits 16 through 31 of an | |
196 | address which is an offset from the GOT. | |
197 | ||
198 | @smallexample | |
199 | orhi r4, r4, gotoffhi16(lsym) | |
200 | addi r4, r4, gotofflo16(lsym) | |
201 | @end smallexample | |
202 | ||
203 | @end table | |
204 | ||
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205 | @node LM32-Chars |
206 | @subsection Special Characters | |
207 | ||
208 | @cindex line comment character, LM32 | |
209 | @cindex LM32 line comment character | |
210 | The presence of a @samp{#} on a line indicates the start of a comment | |
211 | that extends to the end of the current line. Note that if a line | |
212 | starts with a @samp{#} character then it can also be a logical line | |
213 | number directive (@pxref{Comments}) or a preprocessor | |
214 | control command (@pxref{Preprocessing}). | |
215 | ||
216 | @cindex line separator, LM32 | |
217 | @cindex statement separator, LM32 | |
218 | @cindex LM32 line separator | |
219 | A semicolon (@samp{;}) can be used to separate multiple statements on | |
220 | the same line. | |
221 | ||
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222 | @node LM32 Opcodes |
223 | @section Opcodes | |
224 | ||
225 | @cindex LM32 opcode summary | |
226 | @cindex opcode summary, LM32 | |
227 | @cindex mnemonics, LM32 | |
228 | @cindex instruction summary, LM32 | |
229 | For detailed information on the LM32 machine instruction set, see | |
230 | @url{http://www.latticesemi.com/products/intellectualproperty/ipcores/mico32/}. | |
231 | ||
232 | @code{@value{AS}} implements all the standard LM32 opcodes. |