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aa820537 | 1 | @c Copyright 2005, 2008 |
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2 | @c Free Software Foundation, Inc. |
3 | @c This is part of the GAS manual. | |
4 | @c For copying conditions, see the file as.texinfo. | |
5 | @ifset GENERIC | |
6 | @page | |
7 | @node M32C-Dependent | |
8 | @chapter M32C Dependent Features | |
9 | @end ifset | |
10 | @ifclear GENERIC | |
11 | @node Machine Dependencies | |
12 | @chapter M32C Dependent Features | |
13 | @end ifclear | |
14 | ||
15 | @cindex M32C support | |
16 | ||
17 | @code{@value{AS}} can assemble code for several different members of | |
18 | the Renesas M32C family. Normally the default is to assemble code for | |
19 | the M16C microprocessor. The @code{-m32c} option may be used to | |
20 | change the default to the M32C microprocessor. | |
21 | ||
22 | @menu | |
23 | * M32C-Opts:: M32C Options | |
fd54057a | 24 | * M32C-Modifiers:: Symbolic Operand Modifiers |
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25 | @end menu |
26 | ||
27 | @node M32C-Opts | |
28 | @section M32C Options | |
29 | ||
30 | @cindex options, M32C | |
31 | @cindex M32C options | |
32 | ||
6fd4f6cc | 33 | The Renesas M32C version of @code{@value{AS}} has these |
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34 | machine-dependent options: |
35 | ||
36 | @table @code | |
37 | @item -m32c | |
38 | @cindex @samp{-m32c} option, M32C | |
39 | @cindex architecture options, M32C | |
40 | @cindex M32C architecture option | |
41 | Assemble M32C instructions. | |
42 | ||
43 | @item -m16c | |
44 | @cindex @samp{-m16c} option, M16C | |
45 | @cindex architecture options, M16C | |
46 | @cindex M16C architecture option | |
47 | Assemble M16C instructions (default). | |
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48 | |
49 | @item -relax | |
50 | Enable support for link-time relaxations. | |
51 | ||
52 | @item -h-tick-hex | |
53 | Support H'00 style hex constants in addition to 0x00 style. | |
54 | ||
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55 | |
56 | @end table | |
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57 | |
58 | @node M32C-Modifiers | |
59 | @section Symbolic Operand Modifiers | |
60 | ||
61 | @cindex M32C modifiers | |
62 | @cindex syntax, M32C | |
63 | ||
64 | The assembler supports several modifiers when using symbol addresses | |
65 | in M32C instruction operands. The general syntax is the following: | |
66 | ||
67 | @smallexample | |
68 | %modifier(symbol) | |
69 | @end smallexample | |
70 | ||
71 | @table @code | |
72 | @cindex symbol modifiers | |
73 | ||
74 | @item %dsp8 | |
75 | @itemx %dsp16 | |
76 | ||
77 | These modifiers override the assembler's assumptions about how big a | |
78 | symbol's address is. Normally, when it sees an operand like | |
79 | @samp{sym[a0]} it assumes @samp{sym} may require the widest | |
80 | displacement field (16 bits for @samp{-m16c}, 24 bits for | |
81 | @samp{-m32c}). These modifiers tell it to assume the address will fit | |
82 | in an 8 or 16 bit (respectively) unsigned displacement. Note that, of | |
83 | course, if it doesn't actually fit you will get linker errors. Example: | |
84 | ||
85 | @smallexample | |
86 | mov.w %dsp8(sym)[a0],r1 | |
87 | mov.b #0,%dsp8(sym)[a0] | |
88 | @end smallexample | |
89 | ||
90 | @item %hi8 | |
91 | ||
92 | This modifier allows you to load bits 16 through 23 of a 24 bit | |
93 | address into an 8 bit register. This is useful with, for example, the | |
94 | M16C @samp{smovf} instruction, which expects a 20 bit address in | |
95 | @samp{r1h} and @samp{a0}. Example: | |
96 | ||
97 | @smallexample | |
98 | mov.b #%hi8(sym),r1h | |
99 | mov.w #%lo16(sym),a0 | |
100 | smovf.b | |
101 | @end smallexample | |
102 | ||
103 | @item %lo16 | |
104 | ||
105 | Likewise, this modifier allows you to load bits 0 through 15 of a 24 | |
106 | bit address into a 16 bit register. | |
107 | ||
108 | @item %hi16 | |
109 | ||
110 | This modifier allows you to load bits 16 through 31 of a 32 bit | |
111 | address into a 16 bit register. While the M32C family only has 24 | |
112 | bits of address space, it does support addresses in pairs of 16 bit | |
113 | registers (like @samp{a1a0} for the @samp{lde} instruction). This | |
114 | modifier is for loading the upper half in such cases. Example: | |
115 | ||
116 | @smallexample | |
117 | mov.w #%hi16(sym),a1 | |
118 | mov.w #%lo16(sym),a0 | |
119 | @dots{} | |
120 | lde.w [a1a0],r1 | |
121 | @end smallexample | |
122 | ||
123 | @end table |