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1 | @c Copyright 2005 |
2 | @c Free Software Foundation, Inc. | |
3 | @c This is part of the GAS manual. | |
4 | @c For copying conditions, see the file as.texinfo. | |
5 | @ifset GENERIC | |
6 | @page | |
7 | @node M32C-Dependent | |
8 | @chapter M32C Dependent Features | |
9 | @end ifset | |
10 | @ifclear GENERIC | |
11 | @node Machine Dependencies | |
12 | @chapter M32C Dependent Features | |
13 | @end ifclear | |
14 | ||
15 | @cindex M32C support | |
16 | ||
17 | @code{@value{AS}} can assemble code for several different members of | |
18 | the Renesas M32C family. Normally the default is to assemble code for | |
19 | the M16C microprocessor. The @code{-m32c} option may be used to | |
20 | change the default to the M32C microprocessor. | |
21 | ||
22 | @menu | |
23 | * M32C-Opts:: M32C Options | |
fd54057a | 24 | * M32C-Modifiers:: Symbolic Operand Modifiers |
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25 | @end menu |
26 | ||
27 | @node M32C-Opts | |
28 | @section M32C Options | |
29 | ||
30 | @cindex options, M32C | |
31 | @cindex M32C options | |
32 | ||
33 | The Renesas M32C version of @code{@value{AS}} has two | |
34 | machine-dependent options: | |
35 | ||
36 | @table @code | |
37 | @item -m32c | |
38 | @cindex @samp{-m32c} option, M32C | |
39 | @cindex architecture options, M32C | |
40 | @cindex M32C architecture option | |
41 | Assemble M32C instructions. | |
42 | ||
43 | @item -m16c | |
44 | @cindex @samp{-m16c} option, M16C | |
45 | @cindex architecture options, M16C | |
46 | @cindex M16C architecture option | |
47 | Assemble M16C instructions (default). | |
48 | ||
49 | @end table | |
fd54057a DD |
50 | |
51 | @node M32C-Modifiers | |
52 | @section Symbolic Operand Modifiers | |
53 | ||
54 | @cindex M32C modifiers | |
55 | @cindex syntax, M32C | |
56 | ||
57 | The assembler supports several modifiers when using symbol addresses | |
58 | in M32C instruction operands. The general syntax is the following: | |
59 | ||
60 | @smallexample | |
61 | %modifier(symbol) | |
62 | @end smallexample | |
63 | ||
64 | @table @code | |
65 | @cindex symbol modifiers | |
66 | ||
67 | @item %dsp8 | |
68 | @itemx %dsp16 | |
69 | ||
70 | These modifiers override the assembler's assumptions about how big a | |
71 | symbol's address is. Normally, when it sees an operand like | |
72 | @samp{sym[a0]} it assumes @samp{sym} may require the widest | |
73 | displacement field (16 bits for @samp{-m16c}, 24 bits for | |
74 | @samp{-m32c}). These modifiers tell it to assume the address will fit | |
75 | in an 8 or 16 bit (respectively) unsigned displacement. Note that, of | |
76 | course, if it doesn't actually fit you will get linker errors. Example: | |
77 | ||
78 | @smallexample | |
79 | mov.w %dsp8(sym)[a0],r1 | |
80 | mov.b #0,%dsp8(sym)[a0] | |
81 | @end smallexample | |
82 | ||
83 | @item %hi8 | |
84 | ||
85 | This modifier allows you to load bits 16 through 23 of a 24 bit | |
86 | address into an 8 bit register. This is useful with, for example, the | |
87 | M16C @samp{smovf} instruction, which expects a 20 bit address in | |
88 | @samp{r1h} and @samp{a0}. Example: | |
89 | ||
90 | @smallexample | |
91 | mov.b #%hi8(sym),r1h | |
92 | mov.w #%lo16(sym),a0 | |
93 | smovf.b | |
94 | @end smallexample | |
95 | ||
96 | @item %lo16 | |
97 | ||
98 | Likewise, this modifier allows you to load bits 0 through 15 of a 24 | |
99 | bit address into a 16 bit register. | |
100 | ||
101 | @item %hi16 | |
102 | ||
103 | This modifier allows you to load bits 16 through 31 of a 32 bit | |
104 | address into a 16 bit register. While the M32C family only has 24 | |
105 | bits of address space, it does support addresses in pairs of 16 bit | |
106 | registers (like @samp{a1a0} for the @samp{lde} instruction). This | |
107 | modifier is for loading the upper half in such cases. Example: | |
108 | ||
109 | @smallexample | |
110 | mov.w #%hi16(sym),a1 | |
111 | mov.w #%lo16(sym),a0 | |
112 | @dots{} | |
113 | lde.w [a1a0],r1 | |
114 | @end smallexample | |
115 | ||
116 | @end table |