Fix mips16 testsuite failure by allowing finalize_syms to be set before
[deliverable/binutils-gdb.git] / gas / doc / c-m68hc11.texi
CommitLineData
f7e42eb4
NC
1@c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 2000
2@c Free Software Foundation, Inc.
60bcf0fa
NC
3@c This is part of the GAS manual.
4@c For copying conditions, see the file as.texinfo.
5@ifset GENERIC
6@page
7@node M68HC11-Dependent
8@chapter M68HC11 and M68HC12 Dependent Features
9@end ifset
10@ifclear GENERIC
11@node Machine Dependencies
12@chapter M68HC11 and M68HC12 Dependent Features
13@end ifclear
14
15@cindex M68HC11 and M68HC12 support
16@menu
17* M68HC11-Opts:: M68HC11 and M68HC12 Options
18* M68HC11-Syntax:: Syntax
19* M68HC11-Float:: Floating Point
20* M68HC11-opcodes:: Opcodes
21@end menu
22
23@node M68HC11-Opts
24@section M68HC11 and M68HC12 Options
25
26@cindex options, M68HC11
27@cindex M68HC11 options
28The Motorola 68HC11 and 68HC12 version of @code{@value{AS}} has a few machine
29dependent options.
30
31@cindex @samp{-m68hc11}
32This option switches the assembler in the M68HC11 mode. In this mode,
33the assembler only accepts 68HC11 operands and mnemonics. It produces
34code for the 68HC11.
35
36@cindex @samp{-m68hc12}
37This option switches the assembler in the M68HC12 mode. In this mode,
38the assembler also accepts 68HC12 operands and mnemonics. It produces
39code for the 68HC12. A fiew 68HC11 instructions are replaced by
40some 68HC12 instructions as recommended by Motorola specifications.
41
42@cindex @samp{--strict-direct-mode}
43You can use the @samp{--strict-direct-mode} option to disable
44the automatic translation of direct page mode addressing into
45extended mode when the instruction does not support direct mode.
46For example, the @samp{clr} instruction does not support direct page
47mode addressing. When it is used with the direct page mode,
48@code{@value{AS}} will ignore it and generate an absolute addressing.
49This option prevents @code{@value{AS}} from doing this, and the wrong
50usage of the direct page mode will raise an error.
51
52@cindex @samp{--short-branchs}
53The @samp{--short-branchs} option turns off the translation of
54relative branches into absolute branches when the branch offset is
55out of range. By default @code{@value{AS}} transforms the relative
56branch (@samp{bsr}, @samp{bgt}, @samp{bge}, @samp{beq}, @samp{bne},
57@samp{ble}, @samp{blt}, @samp{bhi}, @samp{bcc}, @samp{bls},
58@samp{bcs}, @samp{bmi}, @samp{bvs}, @samp{bvs}, @samp{bra}) into
59an absolute branch when the offset is out of the -128 .. 127 range.
60In that case, the @samp{bsr} instruction is translated into a
61@samp{jsr}, the @samp{bra} instruction is translated into a
62@samp{jmp} and the conditional branchs instructions are inverted and
63followed by a @samp{jmp}. This option disables these translations
64and @code{@value{AS}} will generate an error if a relative branch
65is out of range. This option does not affect the optimization
66associated to the @samp{jbra}, @samp{jbsr} and @samp{jbXX} pseudo opcodes.
67
68@cindex @samp{--force-long-branchs}
69The @samp{--force-long-branchs} option forces the translation of
70relative branches into absolute branches. This option does not affect
71the optimization associated to the @samp{jbra}, @samp{jbsr} and
72@samp{jbXX} pseudo opcodes.
73
74@cindex @samp{--print-insn-syntax}
75You can use the @samp{--print-insn-syntax} option to obtain the
76syntax description of the instruction when an error is detected.
77
78@cindex @samp{--print-opcodes}
79The @samp{--print-opcodes} option prints the list of all the
80instructions with their syntax. The first item of each line
81represents the instruction name and the rest of the line indicates
82the possible operands for that instruction. The list is printed
83in alphabetical order. Once the list is printed @code{@value{AS}}
84exits.
85
86@cindex @samp{--generate-example}
87The @samp{--generate-example} option is similar to @samp{--print-opcodes}
88but it generates an example for each instruction instead.
89
90@node M68HC11-Syntax
91@section Syntax
92
93@cindex M68HC11 syntax
94@cindex syntax, M68HC11
95
96In the M68HC11 syntax, the instruction name comes first and it may
97be followed by one or several operands (up to three). Operands are
98separated by comma (@samp{,}). In the normal mode,
99@code{@value{AS}} will complain if too many operands are specified for
100a given instruction. In the MRI mode (turned on with @samp{-M} option),
101it will treat them as comments. Example:
102
103@smallexample
104inx
105lda #23
106bset 2,x #4
107brclr *bot #8 foo
108@end smallexample
109
110@cindex M68HC11 addressing modes
111@cindex addressing modes, M68HC11
112The following addressing modes are understood:
113@table @dfn
114@item Immediate
115@samp{#@var{number}}
116
117@item Address Register
118@samp{@var{number},X}, @samp{@var{number},Y}
119
120The @var{number} may be omitted in which case 0 is assumed.
121
122@item Direct Addressing mode
123@samp{*@var{symbol}}, or @samp{*@var{digits}}
124
125@item Absolute
126@samp{@var{symbol}}, or @samp{@var{digits}}
127@end table
128
129@node M68HC11-Float
130@section Floating Point
131
132@cindex floating point, M68HC11
133@cindex M68HC11 floating point
134Packed decimal (P) format floating literals are not supported.
135Feel free to add the code!
136
137The floating point formats generated by directives are these.
138
139@table @code
140@cindex @code{float} directive, M68HC11
141@item .float
142@code{Single} precision floating point constants.
143
144@cindex @code{double} directive, M68HC11
145@item .double
146@code{Double} precision floating point constants.
147
148@cindex @code{extend} directive M68HC11
149@cindex @code{ldouble} directive M68HC11
150@item .extend
151@itemx .ldouble
152@code{Extended} precision (@code{long double}) floating point constants.
153@end table
154
155@need 2000
156@node M68HC11-opcodes
157@section Opcodes
158
159@cindex M68HC11 opcodes
160@cindex opcodes, M68HC11
161@cindex instruction set, M68HC11
162
163@menu
164* M68HC11-Branch:: Branch Improvement
165@end menu
166
167@node M68HC11-Branch
168@subsection Branch Improvement
169
170@cindex pseudo-opcodes, M68HC11
171@cindex M68HC11 pseudo-opcodes
172@cindex branch improvement, M68HC11
173@cindex M68HC11 branch improvement
174
175Certain pseudo opcodes are permitted for branch instructions.
176They expand to the shortest branch instruction that reach the
177target. Generally these mnemonics are made by prepending @samp{j} to
178the start of Motorola mnemonic. These pseudo opcodes are not affected
179by the @samp{--short-branchs} or @samp{--force-long-branchs} options.
180
181The following table summarizes the pseudo-operations.
182
183@smallexample
184 Displacement Width
185 +-------------------------------------------------------------+
186 | Options |
187 | --short-branchs --force-long-branchs |
188 +--------------------------+----------------------------------+
189Pseudo-Op |BYTE WORD | BYTE WORD |
190 +--------------------------+----------------------------------+
191 bsr | bsr <pc-rel> <error> | jsr <abs> |
192 bra | bra <pc-rel> <error> | jmp <abs> |
193 jbsr | bsr <pc-rel> jsr <abs> | bsr <pc-rel> jsr <abs> |
194 jbra | bra <pc-rel> jmp <abs> | bra <pc-rel> jmp <abs> |
195 bXX | bXX <pc-rel> <error> | bNX +3; jmp <abs> |
196 jbXX | bXX <pc-rel> bNX +3; | bXX <pc-rel> bNX +3; jmp <abs> |
197 | jmp <abs> | |
198 +--------------------------+----------------------------------+
199XX: condition
200NX: negative of condition XX
201
202@end smallexample
203
204@table @code
205@item jbsr
206@itemx jbra
207These are the simplest jump pseudo-operations; they always map to one
208particular machine instruction, depending on the displacement to the
209branch target.
210
211@item jb@var{XX}
212Here, @samp{jb@var{XX}} stands for an entire family of pseudo-operations,
213where @var{XX} is a conditional branch or condition-code test. The full
214list of pseudo-ops in this family is:
215@smallexample
216 jbcc jbeq jbge jbgt jbhi jbvs jbpl jblo
217 jbcs jbne jblt jble jbls jbvc jbmi
218@end smallexample
219
220For the cases of non-PC relative displacements and long displacements,
221@code{@value{AS}} issues a longer code fragment in terms of
222@var{NX}, the opposite condition to @var{XX}. For example, for the
223non-PC relative case:
224@smallexample
225 jb@var{XX} foo
226@end smallexample
227gives
228@smallexample
229 b@var{NX}s oof
230 jmp foo
231 oof:
232@end smallexample
233
234@end table
235
236
This page took 0.063607 seconds and 4 git commands to generate.