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1 | @c Copyright (C) 1991, 92, 93, 94, 95, 96, 1997 Free Software Foundation, Inc. |
2 | @c This is part of the GAS manual. | |
3 | @c For copying conditions, see the file as.texinfo. | |
4 | @ifset GENERIC | |
5 | @page | |
6 | @node M68K-Dependent | |
7 | @chapter M680x0 Dependent Features | |
8 | @end ifset | |
9 | @ifclear GENERIC | |
10 | @node Machine Dependencies | |
11 | @chapter M680x0 Dependent Features | |
12 | @end ifclear | |
13 | ||
14 | @cindex M680x0 support | |
15 | @menu | |
16 | * M68K-Opts:: M680x0 Options | |
17 | * M68K-Syntax:: Syntax | |
18 | * M68K-Moto-Syntax:: Motorola Syntax | |
19 | * M68K-Float:: Floating Point | |
20 | * M68K-Directives:: 680x0 Machine Directives | |
21 | * M68K-opcodes:: Opcodes | |
22 | @end menu | |
23 | ||
24 | @node M68K-Opts | |
25 | @section M680x0 Options | |
26 | ||
27 | @cindex options, M680x0 | |
28 | @cindex M680x0 options | |
29 | The Motorola 680x0 version of @code{@value{AS}} has a few machine | |
a570e639 NC |
30 | dependent options: |
31 | ||
32 | @table @samp | |
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33 | |
34 | @cindex @samp{-l} option, M680x0 | |
a570e639 | 35 | @item -l |
252b5132 RH |
36 | You can use the @samp{-l} option to shorten the size of references to undefined |
37 | symbols. If you do not use the @samp{-l} option, references to undefined | |
38 | symbols are wide enough for a full @code{long} (32 bits). (Since | |
39 | @code{@value{AS}} cannot know where these symbols end up, @code{@value{AS}} can | |
40 | only allocate space for the linker to fill in later. Since @code{@value{AS}} | |
41 | does not know how far away these symbols are, it allocates as much space as it | |
42 | can.) If you use this option, the references are only one word wide (16 bits). | |
43 | This may be useful if you want the object file to be as small as possible, and | |
44 | you know that the relevant symbols are always less than 17 bits away. | |
45 | ||
46 | @cindex @samp{--register-prefix-optional} option, M680x0 | |
a570e639 | 47 | @item --register-prefix-optional |
252b5132 RH |
48 | For some configurations, especially those where the compiler normally |
49 | does not prepend an underscore to the names of user variables, the | |
50 | assembler requires a @samp{%} before any use of a register name. This | |
51 | is intended to let the assembler distinguish between C variables and | |
52 | functions named @samp{a0} through @samp{a7}, and so on. The @samp{%} is | |
53 | always accepted, but is not required for certain configurations, notably | |
54 | @samp{sun3}. The @samp{--register-prefix-optional} option may be used | |
55 | to permit omitting the @samp{%} even for configurations for which it is | |
56 | normally required. If this is done, it will generally be impossible to | |
57 | refer to C variables and functions with the same names as register | |
58 | names. | |
59 | ||
60 | @cindex @samp{--bitwise-or} option, M680x0 | |
a570e639 | 61 | @item --bitwise-or |
252b5132 RH |
62 | Normally the character @samp{|} is treated as a comment character, which |
63 | means that it can not be used in expressions. The @samp{--bitwise-or} | |
64 | option turns @samp{|} into a normal character. In this mode, you must | |
65 | either use C style comments, or start comments with a @samp{#} character | |
66 | at the beginning of a line. | |
67 | ||
68 | @cindex @samp{--base-size-default-16} | |
69 | @cindex @samp{--base-size-default-32} | |
a570e639 | 70 | @item --base-size-default-16 --base-size-default-32 |
252b5132 RH |
71 | If you use an addressing mode with a base register without specifying |
72 | the size, @code{@value{AS}} will normally use the full 32 bit value. | |
73 | For example, the addressing mode @samp{%a0@@(%d0)} is equivalent to | |
74 | @samp{%a0@@(%d0:l)}. You may use the @samp{--base-size-default-16} | |
75 | option to tell @code{@value{AS}} to default to using the 16 bit value. | |
76 | In this case, @samp{%a0@@(%d0)} is equivalent to @samp{%a0@@(%d0:w)}. | |
77 | You may use the @samp{--base-size-default-32} option to restore the | |
78 | default behaviour. | |
79 | ||
80 | @cindex @samp{--disp-size-default-16} | |
81 | @cindex @samp{--disp-size-default-32} | |
a570e639 | 82 | @item --disp-size-default-16 --disp-size-default-32 |
252b5132 RH |
83 | If you use an addressing mode with a displacement, and the value of the |
84 | displacement is not known, @code{@value{AS}} will normally assume that | |
85 | the value is 32 bits. For example, if the symbol @samp{disp} has not | |
86 | been defined, @code{@value{AS}} will assemble the addressing mode | |
87 | @samp{%a0@@(disp,%d0)} as though @samp{disp} is a 32 bit value. You may | |
88 | use the @samp{--disp-size-default-16} option to tell @code{@value{AS}} | |
89 | to instead assume that the displacement is 16 bits. In this case, | |
90 | @code{@value{AS}} will assemble @samp{%a0@@(disp,%d0)} as though | |
91 | @samp{disp} is a 16 bit value. You may use the | |
92 | @samp{--disp-size-default-32} option to restore the default behaviour. | |
93 | ||
28e7409f | 94 | @cindex @samp{--pcrel} |
a570e639 NC |
95 | @item --pcrel |
96 | Always keep branches PC-relative. In the M680x0 architecture all branches | |
97 | are defined as PC-relative. However, on some processors they are limited | |
98 | to word displacements maximum. When @code{@value{AS}} needs a long branch | |
99 | that is not available, it normally emits an absolute jump instead. This | |
100 | option disables this substitution. When this option is given and no long | |
101 | branches are available, only word branches will be emitted. An error | |
102 | message will be generated if a word branch cannot reach its target. This | |
103 | option has no effect on 68020 and other processors that have long branches. | |
104 | @pxref{M68K-Branch,,Branch Improvement}. | |
28e7409f | 105 | |
252b5132 RH |
106 | @cindex @samp{-m68000} and related options |
107 | @cindex architecture options, M680x0 | |
108 | @cindex M680x0 architecture options | |
a570e639 | 109 | @item -m68000 |
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110 | @code{@value{AS}} can assemble code for several different members of the |
111 | Motorola 680x0 family. The default depends upon how @code{@value{AS}} | |
112 | was configured when it was built; normally, the default is to assemble | |
113 | code for the 68020 microprocessor. The following options may be used to | |
114 | change the default. These options control which instructions and | |
115 | addressing modes are permitted. The members of the 680x0 family are | |
116 | very similar. For detailed information about the differences, see the | |
117 | Motorola manuals. | |
118 | ||
119 | @table @samp | |
120 | @item -m68000 | |
121 | @itemx -m68ec000 | |
122 | @itemx -m68hc000 | |
123 | @itemx -m68hc001 | |
124 | @itemx -m68008 | |
125 | @itemx -m68302 | |
126 | @itemx -m68306 | |
127 | @itemx -m68307 | |
128 | @itemx -m68322 | |
129 | @itemx -m68356 | |
130 | Assemble for the 68000. @samp{-m68008}, @samp{-m68302}, and so on are synonyms | |
131 | for @samp{-m68000}, since the chips are the same from the point of view | |
132 | of the assembler. | |
133 | ||
134 | @item -m68010 | |
135 | Assemble for the 68010. | |
136 | ||
137 | @item -m68020 | |
138 | @itemx -m68ec020 | |
139 | Assemble for the 68020. This is normally the default. | |
140 | ||
141 | @item -m68030 | |
142 | @itemx -m68ec030 | |
143 | Assemble for the 68030. | |
144 | ||
145 | @item -m68040 | |
146 | @itemx -m68ec040 | |
147 | Assemble for the 68040. | |
148 | ||
149 | @item -m68060 | |
150 | @itemx -m68ec060 | |
151 | Assemble for the 68060. | |
152 | ||
153 | @item -mcpu32 | |
154 | @itemx -m68330 | |
155 | @itemx -m68331 | |
156 | @itemx -m68332 | |
157 | @itemx -m68333 | |
158 | @itemx -m68334 | |
159 | @itemx -m68336 | |
160 | @itemx -m68340 | |
161 | @itemx -m68341 | |
162 | @itemx -m68349 | |
163 | @itemx -m68360 | |
164 | Assemble for the CPU32 family of chips. | |
165 | ||
166 | @item -m5200 | |
167 | Assemble for the ColdFire family of chips. | |
168 | ||
169 | @item -m68881 | |
170 | @itemx -m68882 | |
171 | Assemble 68881 floating point instructions. This is the default for the | |
172 | 68020, 68030, and the CPU32. The 68040 and 68060 always support | |
173 | floating point instructions. | |
174 | ||
175 | @item -mno-68881 | |
176 | Do not assemble 68881 floating point instructions. This is the default | |
177 | for 68000 and the 68010. The 68040 and 68060 always support floating | |
178 | point instructions, even if this option is used. | |
179 | ||
180 | @item -m68851 | |
181 | Assemble 68851 MMU instructions. This is the default for the 68020, | |
182 | 68030, and 68060. The 68040 accepts a somewhat different set of MMU | |
183 | instructions; @samp{-m68851} and @samp{-m68040} should not be used | |
184 | together. | |
185 | ||
186 | @item -mno-68851 | |
187 | Do not assemble 68851 MMU instructions. This is the default for the | |
188 | 68000, 68010, and the CPU32. The 68040 accepts a somewhat different set | |
189 | of MMU instructions. | |
190 | @end table | |
a570e639 | 191 | @end table |
252b5132 RH |
192 | |
193 | @node M68K-Syntax | |
194 | @section Syntax | |
195 | ||
196 | @cindex @sc{mit} | |
197 | This syntax for the Motorola 680x0 was developed at @sc{mit}. | |
198 | ||
199 | @cindex M680x0 syntax | |
200 | @cindex syntax, M680x0 | |
201 | @cindex M680x0 size modifiers | |
202 | @cindex size modifiers, M680x0 | |
203 | The 680x0 version of @code{@value{AS}} uses instructions names and | |
204 | syntax compatible with the Sun assembler. Intervening periods are | |
205 | ignored; for example, @samp{movl} is equivalent to @samp{mov.l}. | |
206 | ||
207 | In the following table @var{apc} stands for any of the address registers | |
208 | (@samp{%a0} through @samp{%a7}), the program counter (@samp{%pc}), the | |
209 | zero-address relative to the program counter (@samp{%zpc}), a suppressed | |
210 | address register (@samp{%za0} through @samp{%za7}), or it may be omitted | |
211 | entirely. The use of @var{size} means one of @samp{w} or @samp{l}, and | |
212 | it may be omitted, along with the leading colon, unless a scale is also | |
213 | specified. The use of @var{scale} means one of @samp{1}, @samp{2}, | |
214 | @samp{4}, or @samp{8}, and it may always be omitted along with the | |
215 | leading colon. | |
216 | ||
217 | @cindex M680x0 addressing modes | |
218 | @cindex addressing modes, M680x0 | |
219 | The following addressing modes are understood: | |
220 | @table @dfn | |
221 | @item Immediate | |
222 | @samp{#@var{number}} | |
223 | ||
224 | @item Data Register | |
225 | @samp{%d0} through @samp{%d7} | |
226 | ||
227 | @item Address Register | |
228 | @samp{%a0} through @samp{%a7}@* | |
229 | @samp{%a7} is also known as @samp{%sp}, i.e. the Stack Pointer. @code{%a6} | |
230 | is also known as @samp{%fp}, the Frame Pointer. | |
231 | ||
232 | @item Address Register Indirect | |
233 | @samp{%a0@@} through @samp{%a7@@} | |
234 | ||
235 | @item Address Register Postincrement | |
236 | @samp{%a0@@+} through @samp{%a7@@+} | |
237 | ||
238 | @item Address Register Predecrement | |
239 | @samp{%a0@@-} through @samp{%a7@@-} | |
240 | ||
241 | @item Indirect Plus Offset | |
242 | @samp{@var{apc}@@(@var{number})} | |
243 | ||
244 | @item Index | |
245 | @samp{@var{apc}@@(@var{number},@var{register}:@var{size}:@var{scale})} | |
246 | ||
247 | The @var{number} may be omitted. | |
248 | ||
249 | @item Postindex | |
250 | @samp{@var{apc}@@(@var{number})@@(@var{onumber},@var{register}:@var{size}:@var{scale})} | |
251 | ||
252 | The @var{onumber} or the @var{register}, but not both, may be omitted. | |
253 | ||
254 | @item Preindex | |
255 | @samp{@var{apc}@@(@var{number},@var{register}:@var{size}:@var{scale})@@(@var{onumber})} | |
256 | ||
257 | The @var{number} may be omitted. Omitting the @var{register} produces | |
258 | the Postindex addressing mode. | |
259 | ||
260 | @item Absolute | |
261 | @samp{@var{symbol}}, or @samp{@var{digits}}, optionally followed by | |
262 | @samp{:b}, @samp{:w}, or @samp{:l}. | |
263 | @end table | |
264 | ||
265 | @node M68K-Moto-Syntax | |
266 | @section Motorola Syntax | |
267 | ||
268 | @cindex Motorola syntax for the 680x0 | |
269 | @cindex alternate syntax for the 680x0 | |
270 | ||
271 | The standard Motorola syntax for this chip differs from the syntax | |
272 | already discussed (@pxref{M68K-Syntax,,Syntax}). @code{@value{AS}} can | |
273 | accept Motorola syntax for operands, even if @sc{mit} syntax is used for | |
274 | other operands in the same instruction. The two kinds of syntax are | |
275 | fully compatible. | |
276 | ||
277 | In the following table @var{apc} stands for any of the address registers | |
278 | (@samp{%a0} through @samp{%a7}), the program counter (@samp{%pc}), the | |
279 | zero-address relative to the program counter (@samp{%zpc}), or a | |
280 | suppressed address register (@samp{%za0} through @samp{%za7}). The use | |
281 | of @var{size} means one of @samp{w} or @samp{l}, and it may always be | |
282 | omitted along with the leading dot. The use of @var{scale} means one of | |
283 | @samp{1}, @samp{2}, @samp{4}, or @samp{8}, and it may always be omitted | |
284 | along with the leading asterisk. | |
285 | ||
286 | The following additional addressing modes are understood: | |
287 | ||
288 | @table @dfn | |
289 | @item Address Register Indirect | |
290 | @samp{(%a0)} through @samp{(%a7)}@* | |
291 | @samp{%a7} is also known as @samp{%sp}, i.e. the Stack Pointer. @code{%a6} | |
292 | is also known as @samp{%fp}, the Frame Pointer. | |
293 | ||
294 | @item Address Register Postincrement | |
295 | @samp{(%a0)+} through @samp{(%a7)+} | |
296 | ||
297 | @item Address Register Predecrement | |
298 | @samp{-(%a0)} through @samp{-(%a7)} | |
299 | ||
300 | @item Indirect Plus Offset | |
301 | @samp{@var{number}(@var{%a0})} through @samp{@var{number}(@var{%a7})}, | |
302 | or @samp{@var{number}(@var{%pc})}. | |
303 | ||
304 | The @var{number} may also appear within the parentheses, as in | |
305 | @samp{(@var{number},@var{%a0})}. When used with the @var{pc}, the | |
306 | @var{number} may be omitted (with an address register, omitting the | |
307 | @var{number} produces Address Register Indirect mode). | |
308 | ||
309 | @item Index | |
310 | @samp{@var{number}(@var{apc},@var{register}.@var{size}*@var{scale})} | |
311 | ||
312 | The @var{number} may be omitted, or it may appear within the | |
313 | parentheses. The @var{apc} may be omitted. The @var{register} and the | |
314 | @var{apc} may appear in either order. If both @var{apc} and | |
315 | @var{register} are address registers, and the @var{size} and @var{scale} | |
316 | are omitted, then the first register is taken as the base register, and | |
317 | the second as the index register. | |
318 | ||
319 | @item Postindex | |
320 | @samp{([@var{number},@var{apc}],@var{register}.@var{size}*@var{scale},@var{onumber})} | |
321 | ||
322 | The @var{onumber}, or the @var{register}, or both, may be omitted. | |
323 | Either the @var{number} or the @var{apc} may be omitted, but not both. | |
324 | ||
325 | @item Preindex | |
326 | @samp{([@var{number},@var{apc},@var{register}.@var{size}*@var{scale}],@var{onumber})} | |
327 | ||
328 | The @var{number}, or the @var{apc}, or the @var{register}, or any two of | |
329 | them, may be omitted. The @var{onumber} may be omitted. The | |
330 | @var{register} and the @var{apc} may appear in either order. If both | |
331 | @var{apc} and @var{register} are address registers, and the @var{size} | |
332 | and @var{scale} are omitted, then the first register is taken as the | |
333 | base register, and the second as the index register. | |
334 | @end table | |
335 | ||
336 | @node M68K-Float | |
337 | @section Floating Point | |
338 | ||
339 | @cindex floating point, M680x0 | |
340 | @cindex M680x0 floating point | |
341 | Packed decimal (P) format floating literals are not supported. | |
342 | Feel free to add the code! | |
343 | ||
344 | The floating point formats generated by directives are these. | |
345 | ||
346 | @table @code | |
347 | @cindex @code{float} directive, M680x0 | |
348 | @item .float | |
349 | @code{Single} precision floating point constants. | |
350 | ||
351 | @cindex @code{double} directive, M680x0 | |
352 | @item .double | |
353 | @code{Double} precision floating point constants. | |
354 | ||
355 | @cindex @code{extend} directive M680x0 | |
356 | @cindex @code{ldouble} directive M680x0 | |
357 | @item .extend | |
358 | @itemx .ldouble | |
359 | @code{Extended} precision (@code{long double}) floating point constants. | |
360 | @end table | |
361 | ||
362 | @node M68K-Directives | |
363 | @section 680x0 Machine Directives | |
364 | ||
365 | @cindex M680x0 directives | |
366 | @cindex directives, M680x0 | |
367 | In order to be compatible with the Sun assembler the 680x0 assembler | |
368 | understands the following directives. | |
369 | ||
370 | @table @code | |
371 | @cindex @code{data1} directive, M680x0 | |
372 | @item .data1 | |
373 | This directive is identical to a @code{.data 1} directive. | |
374 | ||
375 | @cindex @code{data2} directive, M680x0 | |
376 | @item .data2 | |
377 | This directive is identical to a @code{.data 2} directive. | |
378 | ||
379 | @cindex @code{even} directive, M680x0 | |
380 | @item .even | |
381 | This directive is a special case of the @code{.align} directive; it | |
382 | aligns the output to an even byte boundary. | |
383 | ||
384 | @cindex @code{skip} directive, M680x0 | |
385 | @item .skip | |
386 | This directive is identical to a @code{.space} directive. | |
387 | @end table | |
388 | ||
389 | @need 2000 | |
390 | @node M68K-opcodes | |
391 | @section Opcodes | |
392 | ||
393 | @cindex M680x0 opcodes | |
394 | @cindex opcodes, M680x0 | |
395 | @cindex instruction set, M680x0 | |
396 | @c doc@cygnus.com: I don't see any point in the following | |
397 | @c paragraph. Bugs are bugs; how does saying this | |
398 | @c help anyone? | |
399 | @ignore | |
400 | Danger: Several bugs have been found in the opcode table (and | |
401 | fixed). More bugs may exist. Be careful when using obscure | |
402 | instructions. | |
403 | @end ignore | |
404 | ||
405 | @menu | |
406 | * M68K-Branch:: Branch Improvement | |
407 | * M68K-Chars:: Special Characters | |
408 | @end menu | |
409 | ||
410 | @node M68K-Branch | |
411 | @subsection Branch Improvement | |
412 | ||
413 | @cindex pseudo-opcodes, M680x0 | |
414 | @cindex M680x0 pseudo-opcodes | |
415 | @cindex branch improvement, M680x0 | |
416 | @cindex M680x0 branch improvement | |
417 | Certain pseudo opcodes are permitted for branch instructions. | |
418 | They expand to the shortest branch instruction that reach the | |
419 | target. Generally these mnemonics are made by substituting @samp{j} for | |
420 | @samp{b} at the start of a Motorola mnemonic. | |
421 | ||
422 | The following table summarizes the pseudo-operations. A @code{*} flags | |
423 | cases that are more fully described after the table: | |
424 | ||
425 | @smallexample | |
426 | Displacement | |
a570e639 NC |
427 | +------------------------------------------------------------ |
428 | | 68020 68000/10, not PC-relative OK | |
429 | Pseudo-Op |BYTE WORD LONG ABSOLUTE LONG JUMP ** | |
430 | +------------------------------------------------------------ | |
431 | jbsr |bsrs bsrw bsrl jsr | |
432 | jra |bras braw bral jmp | |
433 | * jXX |bXXs bXXw bXXl bNXs;jmp | |
434 | * dbXX | N/A dbXXw dbXX;bras;bral dbXX;bras;jmp | |
435 | fjXX | N/A fbXXw fbXXl N/A | |
252b5132 RH |
436 | |
437 | XX: condition | |
438 | NX: negative of condition XX | |
439 | ||
440 | @end smallexample | |
441 | @center @code{*}---see full description below | |
a570e639 | 442 | @center @code{**}---this expansion mode is disallowed by @samp{--pcrel} |
252b5132 RH |
443 | |
444 | @table @code | |
445 | @item jbsr | |
446 | @itemx jra | |
447 | These are the simplest jump pseudo-operations; they always map to one | |
448 | particular machine instruction, depending on the displacement to the | |
a570e639 NC |
449 | branch target. This instruction will be a byte or word branch is that |
450 | is sufficient. Otherwise, a long branch will be emitted if available. | |
451 | If no long branches are available and the @samp{--pcrel} option is not | |
452 | given, an absolute long jump will be emitted instead. If no long | |
453 | branches are available, the @samp{--pcrel} option is given, and a word | |
454 | branch cannot reach the target, an error message is generated. | |
455 | ||
456 | In addition to standard branch operands, @code{@value{AS}} allows these | |
457 | pseudo-operations to have all operands that are allowed for jsr and jmp, | |
458 | substituting these instructions if the operand given is not valid for a | |
459 | branch instruction. | |
252b5132 RH |
460 | |
461 | @item j@var{XX} | |
462 | Here, @samp{j@var{XX}} stands for an entire family of pseudo-operations, | |
463 | where @var{XX} is a conditional branch or condition-code test. The full | |
464 | list of pseudo-ops in this family is: | |
465 | @smallexample | |
466 | jhi jls jcc jcs jne jeq jvc | |
467 | jvs jpl jmi jge jlt jgt jle | |
468 | @end smallexample | |
469 | ||
a570e639 NC |
470 | Usually, each of these pseudo-operations expands to a single branch |
471 | instruction. However, if a word branch is not sufficient, no long branches | |
472 | are available, and the @samp{--pcrel} option is not given, @code{@value{AS}} | |
473 | issues a longer code fragment in terms of @var{NX}, the opposite condition | |
474 | to @var{XX}. For example, under these conditions: | |
252b5132 RH |
475 | @smallexample |
476 | j@var{XX} foo | |
477 | @end smallexample | |
478 | gives | |
479 | @smallexample | |
480 | b@var{NX}s oof | |
481 | jmp foo | |
482 | oof: | |
483 | @end smallexample | |
484 | ||
485 | @item db@var{XX} | |
486 | The full family of pseudo-operations covered here is | |
487 | @smallexample | |
488 | dbhi dbls dbcc dbcs dbne dbeq dbvc | |
489 | dbvs dbpl dbmi dbge dblt dbgt dble | |
490 | dbf dbra dbt | |
491 | @end smallexample | |
492 | ||
a570e639 NC |
493 | Motorola @samp{db@var{XX}} instructions allow word displacements only. When |
494 | a word displacement is sufficient, each of these pseudo-operations expands | |
495 | to the corresponding Motorola instruction. When a word displacement is not | |
496 | sufficient and long branches are available, when the source reads | |
252b5132 RH |
497 | @samp{db@var{XX} foo}, @code{@value{AS}} emits |
498 | @smallexample | |
499 | db@var{XX} oo1 | |
a570e639 NC |
500 | bras oo2 |
501 | oo1:bral foo | |
502 | oo2: | |
503 | @end smallexample | |
504 | ||
505 | If, however, long branches are not available and the @samp{--pcrel} option is | |
506 | not given, @code{@value{AS}} emits | |
507 | @smallexample | |
508 | db@var{XX} oo1 | |
509 | bras oo2 | |
510 | oo1:jmp foo | |
252b5132 RH |
511 | oo2: |
512 | @end smallexample | |
513 | ||
514 | @item fj@var{XX} | |
515 | This family includes | |
516 | @smallexample | |
517 | fjne fjeq fjge fjlt fjgt fjle fjf | |
518 | fjt fjgl fjgle fjnge fjngl fjngle fjngt | |
519 | fjnle fjnlt fjoge fjogl fjogt fjole fjolt | |
520 | fjor fjseq fjsf fjsne fjst fjueq fjuge | |
521 | fjugt fjule fjult fjun | |
522 | @end smallexample | |
523 | ||
a570e639 NC |
524 | Each of these pseudo-operations always expands to a single Motorola |
525 | coprocessor branch instruction, word or long. All Motorola coprocessor | |
526 | branch instructions allow both word and long displacements. | |
252b5132 RH |
527 | |
528 | @end table | |
529 | ||
530 | @node M68K-Chars | |
531 | @subsection Special Characters | |
532 | ||
533 | @cindex special characters, M680x0 | |
534 | @cindex M680x0 immediate character | |
535 | @cindex immediate character, M680x0 | |
536 | @cindex M680x0 line comment character | |
537 | @cindex line comment character, M680x0 | |
538 | @cindex comments, M680x0 | |
539 | The immediate character is @samp{#} for Sun compatibility. The | |
540 | line-comment character is @samp{|} (unless the @samp{--bitwise-or} | |
541 | option is used). If a @samp{#} appears at the beginning of a line, it | |
542 | is treated as a comment unless it looks like @samp{# line file}, in | |
543 | which case it is treated normally. | |
544 |