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3cb46b33 | 1 | @c Copyright (C) 1997, 1998 Free Software Foundation, Inc. |
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2 | @c This is part of the GAS manual. |
3 | @c For copying conditions, see the file as.texinfo. | |
4 | ||
11959ebc | 5 | @node V850-Dependent |
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6 | @chapter v850 Dependent Features |
7 | ||
8 | @cindex V850 support | |
9 | @menu | |
10 | * V850 Options:: Options | |
11 | * V850 Syntax:: Syntax | |
12 | * V850 Floating Point:: Floating Point | |
13 | * V850 Directives:: V850 Machine Directives | |
14 | * V850 Opcodes:: Opcodes | |
15 | @end menu | |
16 | ||
17 | @node V850 Options | |
18 | @section Options | |
19 | @cindex V850 options (none) | |
20 | @cindex options for V850 (none) | |
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21 | @code{@value{AS}} supports the following additional command-line options |
22 | for the V850 processor family: | |
23 | ||
24 | @cindex command line options, V850 | |
25 | @cindex V850 command line options | |
26 | @table @code | |
27 | ||
28 | @cindex @code{-wsigned_overflow} command line option, V850 | |
29 | @item -wsigned_overflow | |
30 | Causes warnings to be produced when signed immediate values overflow the | |
31 | space available for then within their opcodes. By default this option | |
32 | is disabled as it is possible to receive spurious warnings due to using | |
33 | exact bit patterns as immediate constants. | |
34 | ||
35 | @cindex @code{-wunsigned_overflow} command line option, V850 | |
36 | @item -wunsigned_overflow | |
37 | Causes warnings to be produced when unsigned immediate values overflow | |
38 | the space available for then within their opcodes. By default this | |
39 | option is disabled as it is possible to receive spurious warnings due to | |
40 | using exact bit patterns as immediate constants. | |
41 | ||
42 | @cindex @code{-mv850} command line option, V850 | |
43 | @item -mv850 | |
44 | Specifies that the assembled code should be marked as being targeted at | |
45 | the V850 processor. This allows the linker to detect attempts to link | |
46 | such code with code assembled for other processors. | |
47 | ||
3e906c08 | 48 | @c start-sanitize-v850e |
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49 | @cindex @code{-mv850e} command line option, V850 |
50 | @item -mv850e | |
51 | Specifies that the assembled code should be marked as being targeted at | |
52 | the V850E processor. This allows the linker to detect attempts to link | |
53 | such code with code assembled for other processors. | |
3e906c08 | 54 | @c end-sanitize-v850e |
92fdb582 | 55 | |
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56 | @c start-sanitize-v850e |
57 | @cindex @code{-mv850ea} command line option, V850 | |
58 | @item -mv850ea | |
92fdb582 | 59 | Specifies that the assembled code should be marked as being targeted at |
3cb46b33 | 60 | the V850EA processor. This allows the linker to detect attempts to link |
92fdb582 | 61 | such code with code assembled for other processors. |
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62 | |
63 | @cindex @code{-mv850any} command line option, V850 | |
64 | @item -mv850any | |
65 | Specifies that the assembled code should be marked as being targeted at | |
66 | the V850 processor but support instructions that are specific to the | |
67 | extended variants of the process. This allows the production of | |
68 | binaries that contain target specific code, but which are also intended | |
69 | to be used in a generic fashion. For example libgcc.a contains generic | |
70 | routines used by the code produced by GCC for all versions of the v850 | |
71 | architecture, together with support routines only used by the V850E and | |
72 | V850EA architectures. | |
73 | ||
74 | @c end-sanitize-v850e | |
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75 | |
76 | @end table | |
77 | ||
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78 | |
79 | @node V850 Syntax | |
80 | @section Syntax | |
81 | @menu | |
82 | * V850-Chars:: Special Characters | |
83 | * V850-Regs:: Register Names | |
84 | @end menu | |
85 | ||
86 | @node V850-Chars | |
87 | @subsection Special Characters | |
88 | ||
89 | @cindex line comment character, V850 | |
90 | @cindex V850 line comment character | |
91 | @samp{#} is the line comment character. | |
92 | @node V850-Regs | |
93 | @subsection Register Names | |
94 | ||
95 | @cindex V850 register names | |
96 | @cindex register names, V850 | |
97 | @code{@value{AS}} supports the following names for registers: | |
98 | @table @code | |
99 | @cindex @code{zero} register, V850 | |
100 | @item general register 0 | |
101 | r0, zero | |
102 | @item general register 1 | |
103 | r1 | |
104 | @item general register 2 | |
3f221096 | 105 | r2, hp |
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106 | @cindex @code{sp} register, V850 |
107 | @item general register 3 | |
108 | r3, sp | |
109 | @cindex @code{gp} register, V850 | |
110 | @item general register 4 | |
111 | r4, gp | |
112 | @cindex @code{tp} register, V850 | |
113 | @item general register 5 | |
114 | r5, tp | |
115 | @item general register 6 | |
116 | r6 | |
117 | @item general register 7 | |
118 | r7 | |
119 | @item general register 8 | |
120 | r8 | |
121 | @item general register 9 | |
122 | r9 | |
123 | @item general register 10 | |
124 | r10 | |
125 | @item general register 11 | |
126 | r11 | |
127 | @item general register 12 | |
128 | r12 | |
129 | @item general register 13 | |
130 | r13 | |
131 | @item general register 14 | |
132 | r14 | |
133 | @item general register 15 | |
134 | r15 | |
135 | @item general register 16 | |
136 | r16 | |
137 | @item general register 17 | |
138 | r17 | |
139 | @item general register 18 | |
140 | r18 | |
141 | @item general register 19 | |
142 | r19 | |
143 | @item general register 20 | |
144 | r20 | |
145 | @item general register 21 | |
146 | r21 | |
147 | @item general register 22 | |
148 | r22 | |
149 | @item general register 23 | |
150 | r23 | |
151 | @item general register 24 | |
152 | r24 | |
153 | @item general register 25 | |
154 | r25 | |
155 | @item general register 26 | |
156 | r26 | |
157 | @item general register 27 | |
158 | r27 | |
159 | @item general register 28 | |
160 | r28 | |
161 | @item general register 29 | |
162 | r29 | |
163 | @cindex @code{ep} register, V850 | |
164 | @item general register 30 | |
165 | r30, ep | |
166 | @cindex @code{lp} register, V850 | |
167 | @item general register 31 | |
168 | r31, lp | |
169 | @cindex @code{eipc} register, V850 | |
170 | @item system register 0 | |
171 | eipc | |
172 | @cindex @code{eipsw} register, V850 | |
173 | @item system register 1 | |
174 | eipsw | |
175 | @cindex @code{fepc} register, V850 | |
176 | @item system register 2 | |
177 | fepc | |
178 | @cindex @code{fepsw} register, V850 | |
179 | @item system register 3 | |
180 | fepsw | |
181 | @cindex @code{ecr} register, V850 | |
182 | @item system register 4 | |
183 | ecr | |
184 | @cindex @code{psw} register, V850 | |
185 | @item system register 5 | |
186 | psw | |
3e906c08 | 187 | @c start-sanitize-v850e |
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188 | @cindex @code{ctpc} register, V850 |
189 | @item system register 16 | |
190 | ctpc | |
191 | @cindex @code{ctpsw} register, V850 | |
192 | @item system register 17 | |
193 | ctpsw | |
194 | @cindex @code{dbpc} register, V850 | |
195 | @item system register 18 | |
196 | dbpc | |
197 | @cindex @code{dbpsw} register, V850 | |
198 | @item system register 19 | |
199 | dbpsw | |
200 | @cindex @code{ctbp} register, V850 | |
201 | @item system register 20 | |
202 | ctbp | |
3e906c08 | 203 | @c end-sanitize-v850e |
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204 | @end table |
205 | ||
206 | @node V850 Floating Point | |
207 | @section Floating Point | |
208 | ||
209 | @cindex floating point, V850 (@sc{ieee}) | |
210 | @cindex V850 floating point (@sc{ieee}) | |
211 | The V850 family uses @sc{ieee} floating-point numbers. | |
212 | ||
213 | @node V850 Directives | |
214 | @section V850 Machine Directives | |
215 | ||
216 | @cindex machine directives, V850 | |
217 | @cindex V850 machine directives | |
218 | @table @code | |
219 | @cindex @code{offset} directive, V850 | |
220 | @item .offset @var{<expression>} | |
221 | Moves the offset into the current section to the specified amount. | |
222 | ||
223 | @cindex @code{section} directive, V850 | |
224 | @item .section "name", <type> | |
225 | This is an extension to the standard .section directive. It sets the | |
226 | current section to be <type> and creates an alias for this section | |
227 | called "name". | |
228 | ||
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229 | @cindex @code{.v850} directive, V850 |
230 | @item .v850 | |
231 | Specifies that the assembled code should be marked as being targeted at | |
232 | the V850 processor. This allows the linker to detect attempts to link | |
233 | such code with code assembled for other processors. | |
234 | ||
3e906c08 | 235 | @c start-sanitize-v850e |
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236 | @cindex @code{.v850e} directive, V850 |
237 | @item .v850e | |
238 | Specifies that the assembled code should be marked as being targeted at | |
239 | the V850E processor. This allows the linker to detect attempts to link | |
240 | such code with code assembled for other processors. | |
3e906c08 | 241 | @c end-sanitize-v850e |
92fdb582 | 242 | |
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243 | @c start-sanitize-v850e |
244 | @cindex @code{.v850ea} directive, V850 | |
245 | @item .v850ea | |
92fdb582 | 246 | Specifies that the assembled code should be marked as being targeted at |
3cb46b33 | 247 | the V850EA processor. This allows the linker to detect attempts to link |
92fdb582 | 248 | such code with code assembled for other processors. |
3cb46b33 | 249 | @c end-sanitize-v850e |
92fdb582 | 250 | |
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251 | @end table |
252 | ||
253 | @node V850 Opcodes | |
254 | @section Opcodes | |
255 | ||
256 | @cindex V850 opcodes | |
257 | @cindex opcodes for V850 | |
258 | @code{@value{AS}} implements all the standard V850 opcodes. | |
259 | ||
260 | @code{@value{AS}} also implements the following pseudo ops: | |
261 | ||
262 | @table @code | |
263 | ||
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264 | @cindex @code{hi0} pseudo-op, V850 |
265 | @item hi0() | |
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266 | Computes the higher 16 bits of the given expression and stores it into |
267 | the immediate operand field of the given instruction. For example: | |
268 | ||
73a04028 | 269 | @samp{mulhi hi0(here - there), r5, r6} |
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270 | |
271 | computes the difference between the address of labels 'here' and | |
272 | 'there', takes the upper 16 bits of this difference, shifts it down 16 | |
273 | bits and then mutliplies it by the lower 16 bits in register 5, putting | |
274 | the result into register 6. | |
275 | ||
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276 | @cindex @code{lo} pseudo-op, V850 |
277 | @item lo() | |
278 | Computes the lower 16 bits of the given expression and stores it into | |
279 | the immediate operand field of the given instruction. For example: | |
280 | ||
281 | @samp{addi lo(here - there), r5, r6} | |
282 | ||
283 | computes the difference between the address of labels 'here' and | |
284 | 'there', takes the lower 16 bits of this difference and adds it to | |
285 | register 5, putting the result into register 6. | |
286 | ||
73a04028 NC |
287 | @cindex @code{hi} pseudo-op, V850 |
288 | @item hi() | |
289 | Computes the higher 16 bits of the given expression and then adds the | |
290 | value of the most significant bit of the lower 16 bits of the expression | |
291 | and stores the result into the immediate operand field of the given | |
292 | instruction. For example the following code can be used to compute the | |
293 | address of the label 'here' and store it into register 6: | |
294 | ||
295 | @samp{movhi hi(here), r0, r6} | |
296 | @samp{movea lo(here), r6, r6} | |
297 | ||
298 | The reason for this special behaviour is that movea performs a sign | |
299 | extention on its immediate operand. So for example if the address of | |
300 | 'here' was 0xFFFFFFFF then without the special behaviour of the hi() | |
301 | pseudo-op the movhi instruction would put 0xFFFF0000 into r6, then the | |
302 | movea instruction would takes its immediate operand, 0xFFFF, sign extend | |
303 | it to 32 bits, 0xFFFFFFFF, and then add it into r6 giving 0xFFFEFFFF | |
304 | which is wrong (the fifth nibble is E). With the hi() pseudo op adding | |
305 | in the top bit of the lo() pseudo op, the movhi instruction actually | |
306 | stores 0 into r6 (0xFFFF + 1 = 0x0000), so that the movea instruction | |
307 | stores 0xFFFFFFFF into r6 - the right value. | |
308 | ||
3e906c08 | 309 | @c start-sanitize-v850e |
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310 | @cindex @code{hilo} pseudo-op, V850 |
311 | @item hilo() | |
312 | Computes the 32 bit value of the given expression and stores it into | |
313 | the immediate operand field of the given instruction (which must be a | |
314 | mov instruction). For example: | |
315 | ||
316 | @samp{mov hilo(here), r6} | |
317 | ||
318 | computes the absolute address of label 'here' and puts the result into | |
319 | register 6. | |
3e906c08 | 320 | @c end-sanitize-v850e |
eb21b6b6 | 321 | |
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322 | @cindex @code{sdaoff} pseudo-op, V850 |
323 | @item sdaoff() | |
324 | Computes the offset of the named variable from the start of the Small | |
325 | Data Area (whoes address is held in register 4, the GP register) and | |
326 | stores the result as a 16 bit signed value in the immediate operand | |
327 | field of the given instruction. For example: | |
328 | ||
329 | @samp{ld.w sdaoff(_a_variable)[gp],r6} | |
330 | ||
331 | loads the contents of the location pointed to by the label '_a_variable' | |
332 | into register 6, provided that the label is located somewhere within +/- | |
333 | 32K of the address held in the GP register. [Note the linker assumes | |
334 | that the GP register contains a fixed address set to the address of the | |
19ebb9e3 NC |
335 | label called '__gp'. This can either be set up automatically by the |
336 | linker, or specifically set by using the @samp{--defsym __gp=<value>} | |
337 | command line option]. | |
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338 | |
339 | @cindex @code{tdaoff} pseudo-op, V850 | |
340 | @item tdaoff() | |
341 | Computes the offset of the named variable from the start of the Tiny | |
342 | Data Area (whoes address is held in register 30, the EP register) and | |
19ebb9e3 | 343 | stores the result as a |
3e906c08 | 344 | @c start-sanitize-v850e |
19ebb9e3 | 345 | 4,5, |
3e906c08 | 346 | @c end-sanitize-v850e |
19ebb9e3 | 347 | 7 or 8 bit unsigned value in the immediate |
68eaa141 NC |
348 | operand field of the given instruction. For example: |
349 | ||
350 | @samp{sld.w tdaoff(_a_variable)[ep],r6} | |
351 | ||
352 | loads the contents of the location pointed to by the label '_a_variable' | |
19ebb9e3 | 353 | into register 6, provided that the label is located somewhere within +256 |
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354 | bytes of the address held in the EP register. [Note the linker assumes |
355 | that the EP register contains a fixed address set to the address of the | |
19ebb9e3 NC |
356 | label called '__ep'. This can either be set up automatically by the |
357 | linker, or specifically set by using the @samp{--defsym __ep=<value>} | |
358 | command line option]. | |
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359 | |
360 | @cindex @code{zdaoff} pseudo-op, V850 | |
361 | @item zdaoff() | |
362 | Computes the offset of the named variable from address 0 and stores the | |
363 | result as a 16 bit signed value in the immediate operand field of the | |
364 | given instruction. For example: | |
365 | ||
366 | @samp{movea zdaoff(_a_variable),zero,r6} | |
367 | ||
368 | puts the address of the label '_a_variable' into register 6, assuming | |
19ebb9e3 NC |
369 | that the label is somewhere within the first 32K of memory. (Strictly |
370 | speaking it also possible to access the last 32K of memory as well, as | |
371 | the offsets are signed). | |
68eaa141 | 372 | |
3e906c08 | 373 | @c start-sanitize-v850e |
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374 | @cindex @code{ctoff} pseudo-op, V850 |
375 | @item ctoff() | |
376 | Computes the offset of the named variable from the start of the Call | |
377 | Table Area (whoes address is helg in system register 20, the CTBP | |
378 | register) and stores the result a 6 or 16 bit unsigned value in the | |
379 | immediate field of then given instruction or piece of data. For | |
380 | example: | |
381 | ||
382 | @samp{callt ctoff(table_func1)} | |
383 | ||
384 | will put the call the function whoes address is held in the call table | |
385 | at the location labeled 'table_func1'. | |
3e906c08 | 386 | @c end-sanitize-v850e |
936a8f55 | 387 | |
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388 | @end table |
389 | ||
390 | ||
936a8f55 | 391 | For information on the V850 instruction set, see @cite{V850 |
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392 | Family 32-/16-Bit single-Chip Microcontroller Architecture Manual} from NEC. |
393 | Ltd. | |
394 |