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de863c74 | 1 | @c Copyright 1997, 2002, 2003, 2006, 2011, 2012 Free Software Foundation, Inc. |
252b5132 RH |
2 | @c This is part of the GAS manual. |
3 | @c For copying conditions, see the file as.texinfo. | |
4 | ||
5 | @node V850-Dependent | |
6 | @chapter v850 Dependent Features | |
7 | ||
8 | @cindex V850 support | |
9 | @menu | |
10 | * V850 Options:: Options | |
11 | * V850 Syntax:: Syntax | |
12 | * V850 Floating Point:: Floating Point | |
13 | * V850 Directives:: V850 Machine Directives | |
14 | * V850 Opcodes:: Opcodes | |
15 | @end menu | |
16 | ||
17 | @node V850 Options | |
18 | @section Options | |
19 | @cindex V850 options (none) | |
20 | @cindex options for V850 (none) | |
21 | @code{@value{AS}} supports the following additional command-line options | |
22 | for the V850 processor family: | |
23 | ||
24 | @cindex command line options, V850 | |
25 | @cindex V850 command line options | |
26 | @table @code | |
27 | ||
28 | @cindex @code{-wsigned_overflow} command line option, V850 | |
29 | @item -wsigned_overflow | |
30 | Causes warnings to be produced when signed immediate values overflow the | |
31 | space available for then within their opcodes. By default this option | |
32 | is disabled as it is possible to receive spurious warnings due to using | |
33 | exact bit patterns as immediate constants. | |
34 | ||
35 | @cindex @code{-wunsigned_overflow} command line option, V850 | |
36 | @item -wunsigned_overflow | |
37 | Causes warnings to be produced when unsigned immediate values overflow | |
38 | the space available for then within their opcodes. By default this | |
39 | option is disabled as it is possible to receive spurious warnings due to | |
40 | using exact bit patterns as immediate constants. | |
41 | ||
42 | @cindex @code{-mv850} command line option, V850 | |
43 | @item -mv850 | |
44 | Specifies that the assembled code should be marked as being targeted at | |
45 | the V850 processor. This allows the linker to detect attempts to link | |
46 | such code with code assembled for other processors. | |
47 | ||
48 | @cindex @code{-mv850e} command line option, V850 | |
49 | @item -mv850e | |
50 | Specifies that the assembled code should be marked as being targeted at | |
51 | the V850E processor. This allows the linker to detect attempts to link | |
52 | such code with code assembled for other processors. | |
53 | ||
8ad30312 NC |
54 | @cindex @code{-mv850e1} command line option, V850 |
55 | @item -mv850e1 | |
56 | Specifies that the assembled code should be marked as being targeted at | |
57 | the V850E1 processor. This allows the linker to detect attempts to link | |
58 | such code with code assembled for other processors. | |
59 | ||
252b5132 RH |
60 | @cindex @code{-mv850any} command line option, V850 |
61 | @item -mv850any | |
62 | Specifies that the assembled code should be marked as being targeted at | |
63 | the V850 processor but support instructions that are specific to the | |
64 | extended variants of the process. This allows the production of | |
65 | binaries that contain target specific code, but which are also intended | |
66 | to be used in a generic fashion. For example libgcc.a contains generic | |
67 | routines used by the code produced by GCC for all versions of the v850 | |
68 | architecture, together with support routines only used by the V850E | |
69 | architecture. | |
70 | ||
1cd986c5 NC |
71 | @cindex @code{-mv850e2} command line option, V850 |
72 | @item -mv850e2 | |
73 | Specifies that the assembled code should be marked as being targeted at | |
74 | the V850E2 processor. This allows the linker to detect attempts to link | |
75 | such code with code assembled for other processors. | |
76 | ||
77 | @cindex @code{-mv850e2v3} command line option, V850 | |
78 | @item -mv850e2v3 | |
79 | Specifies that the assembled code should be marked as being targeted at | |
80 | the V850E2V3 processor. This allows the linker to detect attempts to link | |
81 | such code with code assembled for other processors. | |
82 | ||
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83 | @cindex @code{-mrelax} command line option, V850 |
84 | @item -mrelax | |
85 | Enables relaxation. This allows the .longcall and .longjump pseudo | |
86 | ops to be used in the assembler source code. These ops label sections | |
87 | of code which are either a long function call or a long branch. The | |
88 | assembler will then flag these sections of code and the linker will | |
89 | attempt to relax them. | |
90 | ||
de863c74 NC |
91 | @cindex @code{-mgcc-abi} command line option, V850 |
92 | @item -mgcc-abi | |
93 | Marks the generated objecy file as supporting the old GCC ABI. | |
94 | ||
95 | @cindex @code{-mrh850-abi} command line option, V850 | |
96 | @item -mrh850-abi | |
97 | Marks the generated objecy file as supporting the RH850 ABI. This is | |
98 | the default. | |
99 | ||
100 | @cindex @code{-m8byte-align} command line option, V850 | |
101 | @item -m8byte-align | |
102 | Marks the generated objecy file as supporting a maximum 64-bits of | |
103 | alignment for variables defined in the source code. | |
252b5132 | 104 | |
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105 | @cindex @code{-m4byte-align} command line option, V850 |
106 | @item -m4byte-align | |
107 | Marks the generated objecy file as supporting a maximum 32-bits of | |
108 | alignment for variables defined in the source code. This is the | |
109 | default. | |
110 | ||
111 | @end table | |
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112 | |
113 | @node V850 Syntax | |
114 | @section Syntax | |
115 | @menu | |
116 | * V850-Chars:: Special Characters | |
117 | * V850-Regs:: Register Names | |
118 | @end menu | |
119 | ||
120 | @node V850-Chars | |
121 | @subsection Special Characters | |
122 | ||
123 | @cindex line comment character, V850 | |
124 | @cindex V850 line comment character | |
7c31ae13 NC |
125 | @samp{#} is the line comment character. If a @samp{#} appears as the |
126 | first character of a line, the whole line is treated as a comment, but | |
127 | in this case the line can also be a logical line number directive | |
128 | (@pxref{Comments}) or a preprocessor control command | |
129 | (@pxref{Preprocessing}). | |
130 | ||
131 | Two dashes (@samp{--}) can also be used to start a line comment. | |
132 | ||
133 | @cindex line separator, V850 | |
134 | @cindex statement separator, V850 | |
135 | @cindex V850 line separator | |
136 | ||
137 | The @samp{;} character can be used to separate statements on the same | |
138 | line. | |
139 | ||
252b5132 RH |
140 | @node V850-Regs |
141 | @subsection Register Names | |
142 | ||
143 | @cindex V850 register names | |
144 | @cindex register names, V850 | |
145 | @code{@value{AS}} supports the following names for registers: | |
146 | @table @code | |
147 | @cindex @code{zero} register, V850 | |
148 | @item general register 0 | |
149 | r0, zero | |
150 | @item general register 1 | |
151 | r1 | |
152 | @item general register 2 | |
153 | r2, hp | |
154 | @cindex @code{sp} register, V850 | |
155 | @item general register 3 | |
156 | r3, sp | |
157 | @cindex @code{gp} register, V850 | |
158 | @item general register 4 | |
159 | r4, gp | |
160 | @cindex @code{tp} register, V850 | |
161 | @item general register 5 | |
162 | r5, tp | |
163 | @item general register 6 | |
164 | r6 | |
165 | @item general register 7 | |
166 | r7 | |
167 | @item general register 8 | |
168 | r8 | |
169 | @item general register 9 | |
170 | r9 | |
171 | @item general register 10 | |
172 | r10 | |
173 | @item general register 11 | |
174 | r11 | |
175 | @item general register 12 | |
176 | r12 | |
177 | @item general register 13 | |
178 | r13 | |
179 | @item general register 14 | |
180 | r14 | |
181 | @item general register 15 | |
182 | r15 | |
183 | @item general register 16 | |
184 | r16 | |
185 | @item general register 17 | |
186 | r17 | |
187 | @item general register 18 | |
188 | r18 | |
189 | @item general register 19 | |
190 | r19 | |
191 | @item general register 20 | |
192 | r20 | |
193 | @item general register 21 | |
194 | r21 | |
195 | @item general register 22 | |
196 | r22 | |
197 | @item general register 23 | |
198 | r23 | |
199 | @item general register 24 | |
200 | r24 | |
201 | @item general register 25 | |
202 | r25 | |
203 | @item general register 26 | |
204 | r26 | |
205 | @item general register 27 | |
206 | r27 | |
207 | @item general register 28 | |
208 | r28 | |
209 | @item general register 29 | |
210 | r29 | |
211 | @cindex @code{ep} register, V850 | |
212 | @item general register 30 | |
213 | r30, ep | |
214 | @cindex @code{lp} register, V850 | |
215 | @item general register 31 | |
216 | r31, lp | |
217 | @cindex @code{eipc} register, V850 | |
218 | @item system register 0 | |
219 | eipc | |
220 | @cindex @code{eipsw} register, V850 | |
221 | @item system register 1 | |
222 | eipsw | |
223 | @cindex @code{fepc} register, V850 | |
224 | @item system register 2 | |
225 | fepc | |
226 | @cindex @code{fepsw} register, V850 | |
227 | @item system register 3 | |
228 | fepsw | |
229 | @cindex @code{ecr} register, V850 | |
230 | @item system register 4 | |
231 | ecr | |
232 | @cindex @code{psw} register, V850 | |
233 | @item system register 5 | |
234 | psw | |
235 | @cindex @code{ctpc} register, V850 | |
236 | @item system register 16 | |
237 | ctpc | |
238 | @cindex @code{ctpsw} register, V850 | |
239 | @item system register 17 | |
240 | ctpsw | |
241 | @cindex @code{dbpc} register, V850 | |
242 | @item system register 18 | |
243 | dbpc | |
244 | @cindex @code{dbpsw} register, V850 | |
245 | @item system register 19 | |
246 | dbpsw | |
247 | @cindex @code{ctbp} register, V850 | |
248 | @item system register 20 | |
249 | ctbp | |
250 | @end table | |
251 | ||
252 | @node V850 Floating Point | |
253 | @section Floating Point | |
254 | ||
255 | @cindex floating point, V850 (@sc{ieee}) | |
256 | @cindex V850 floating point (@sc{ieee}) | |
257 | The V850 family uses @sc{ieee} floating-point numbers. | |
258 | ||
259 | @node V850 Directives | |
260 | @section V850 Machine Directives | |
261 | ||
262 | @cindex machine directives, V850 | |
263 | @cindex V850 machine directives | |
264 | @table @code | |
265 | @cindex @code{offset} directive, V850 | |
266 | @item .offset @var{<expression>} | |
34bca508 | 267 | Moves the offset into the current section to the specified amount. |
252b5132 RH |
268 | |
269 | @cindex @code{section} directive, V850 | |
270 | @item .section "name", <type> | |
271 | This is an extension to the standard .section directive. It sets the | |
272 | current section to be <type> and creates an alias for this section | |
34bca508 | 273 | called "name". |
252b5132 RH |
274 | |
275 | @cindex @code{.v850} directive, V850 | |
276 | @item .v850 | |
277 | Specifies that the assembled code should be marked as being targeted at | |
278 | the V850 processor. This allows the linker to detect attempts to link | |
279 | such code with code assembled for other processors. | |
280 | ||
281 | @cindex @code{.v850e} directive, V850 | |
282 | @item .v850e | |
283 | Specifies that the assembled code should be marked as being targeted at | |
284 | the V850E processor. This allows the linker to detect attempts to link | |
8ad30312 NC |
285 | such code with code assembled for other processors. |
286 | ||
287 | @cindex @code{.v850e1} directive, V850 | |
288 | @item .v850e1 | |
289 | Specifies that the assembled code should be marked as being targeted at | |
290 | the V850E1 processor. This allows the linker to detect attempts to link | |
1cd986c5 NC |
291 | such code with code assembled for other processors. |
292 | ||
293 | @cindex @code{.v850e2} directive, V850 | |
294 | @item .v850e2 | |
295 | Specifies that the assembled code should be marked as being targeted at | |
296 | the V850E2 processor. This allows the linker to detect attempts to link | |
297 | such code with code assembled for other processors. | |
298 | ||
299 | @cindex @code{.v850e2v3} directive, V850 | |
300 | @item .v850e2v3 | |
301 | Specifies that the assembled code should be marked as being targeted at | |
302 | the V850E2V3 processor. This allows the linker to detect attempts to link | |
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303 | such code with code assembled for other processors. |
304 | ||
305 | @end table | |
306 | ||
307 | @node V850 Opcodes | |
308 | @section Opcodes | |
309 | ||
310 | @cindex V850 opcodes | |
311 | @cindex opcodes for V850 | |
312 | @code{@value{AS}} implements all the standard V850 opcodes. | |
313 | ||
314 | @code{@value{AS}} also implements the following pseudo ops: | |
315 | ||
316 | @table @code | |
317 | ||
318 | @cindex @code{hi0} pseudo-op, V850 | |
319 | @item hi0() | |
320 | Computes the higher 16 bits of the given expression and stores it into | |
321 | the immediate operand field of the given instruction. For example: | |
322 | ||
323 | @samp{mulhi hi0(here - there), r5, r6} | |
324 | ||
325 | computes the difference between the address of labels 'here' and | |
326 | 'there', takes the upper 16 bits of this difference, shifts it down 16 | |
b45619c0 | 327 | bits and then multiplies it by the lower 16 bits in register 5, putting |
34bca508 | 328 | the result into register 6. |
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329 | |
330 | @cindex @code{lo} pseudo-op, V850 | |
331 | @item lo() | |
332 | Computes the lower 16 bits of the given expression and stores it into | |
333 | the immediate operand field of the given instruction. For example: | |
334 | ||
335 | @samp{addi lo(here - there), r5, r6} | |
336 | ||
337 | computes the difference between the address of labels 'here' and | |
338 | 'there', takes the lower 16 bits of this difference and adds it to | |
339 | register 5, putting the result into register 6. | |
340 | ||
341 | @cindex @code{hi} pseudo-op, V850 | |
342 | @item hi() | |
343 | Computes the higher 16 bits of the given expression and then adds the | |
344 | value of the most significant bit of the lower 16 bits of the expression | |
345 | and stores the result into the immediate operand field of the given | |
346 | instruction. For example the following code can be used to compute the | |
347 | address of the label 'here' and store it into register 6: | |
348 | ||
349 | @samp{movhi hi(here), r0, r6} | |
350 | @samp{movea lo(here), r6, r6} | |
351 | ||
352 | The reason for this special behaviour is that movea performs a sign | |
062b7c0c | 353 | extension on its immediate operand. So for example if the address of |
252b5132 RH |
354 | 'here' was 0xFFFFFFFF then without the special behaviour of the hi() |
355 | pseudo-op the movhi instruction would put 0xFFFF0000 into r6, then the | |
356 | movea instruction would takes its immediate operand, 0xFFFF, sign extend | |
357 | it to 32 bits, 0xFFFFFFFF, and then add it into r6 giving 0xFFFEFFFF | |
358 | which is wrong (the fifth nibble is E). With the hi() pseudo op adding | |
359 | in the top bit of the lo() pseudo op, the movhi instruction actually | |
360 | stores 0 into r6 (0xFFFF + 1 = 0x0000), so that the movea instruction | |
361 | stores 0xFFFFFFFF into r6 - the right value. | |
362 | ||
363 | @cindex @code{hilo} pseudo-op, V850 | |
364 | @item hilo() | |
365 | Computes the 32 bit value of the given expression and stores it into | |
366 | the immediate operand field of the given instruction (which must be a | |
367 | mov instruction). For example: | |
368 | ||
369 | @samp{mov hilo(here), r6} | |
370 | ||
371 | computes the absolute address of label 'here' and puts the result into | |
34bca508 | 372 | register 6. |
252b5132 RH |
373 | |
374 | @cindex @code{sdaoff} pseudo-op, V850 | |
375 | @item sdaoff() | |
376 | Computes the offset of the named variable from the start of the Small | |
377 | Data Area (whoes address is held in register 4, the GP register) and | |
378 | stores the result as a 16 bit signed value in the immediate operand | |
34bca508 | 379 | field of the given instruction. For example: |
252b5132 RH |
380 | |
381 | @samp{ld.w sdaoff(_a_variable)[gp],r6} | |
382 | ||
383 | loads the contents of the location pointed to by the label '_a_variable' | |
384 | into register 6, provided that the label is located somewhere within +/- | |
385 | 32K of the address held in the GP register. [Note the linker assumes | |
386 | that the GP register contains a fixed address set to the address of the | |
387 | label called '__gp'. This can either be set up automatically by the | |
388 | linker, or specifically set by using the @samp{--defsym __gp=<value>} | |
389 | command line option]. | |
390 | ||
391 | @cindex @code{tdaoff} pseudo-op, V850 | |
392 | @item tdaoff() | |
393 | Computes the offset of the named variable from the start of the Tiny | |
394 | Data Area (whoes address is held in register 30, the EP register) and | |
395 | stores the result as a 4,5, 7 or 8 bit unsigned value in the immediate | |
396 | operand field of the given instruction. For example: | |
397 | ||
398 | @samp{sld.w tdaoff(_a_variable)[ep],r6} | |
399 | ||
400 | loads the contents of the location pointed to by the label '_a_variable' | |
401 | into register 6, provided that the label is located somewhere within +256 | |
402 | bytes of the address held in the EP register. [Note the linker assumes | |
403 | that the EP register contains a fixed address set to the address of the | |
404 | label called '__ep'. This can either be set up automatically by the | |
405 | linker, or specifically set by using the @samp{--defsym __ep=<value>} | |
406 | command line option]. | |
407 | ||
408 | @cindex @code{zdaoff} pseudo-op, V850 | |
409 | @item zdaoff() | |
410 | Computes the offset of the named variable from address 0 and stores the | |
411 | result as a 16 bit signed value in the immediate operand field of the | |
412 | given instruction. For example: | |
413 | ||
414 | @samp{movea zdaoff(_a_variable),zero,r6} | |
415 | ||
416 | puts the address of the label '_a_variable' into register 6, assuming | |
417 | that the label is somewhere within the first 32K of memory. (Strictly | |
418 | speaking it also possible to access the last 32K of memory as well, as | |
419 | the offsets are signed). | |
420 | ||
421 | @cindex @code{ctoff} pseudo-op, V850 | |
422 | @item ctoff() | |
423 | Computes the offset of the named variable from the start of the Call | |
424 | Table Area (whoes address is helg in system register 20, the CTBP | |
425 | register) and stores the result a 6 or 16 bit unsigned value in the | |
426 | immediate field of then given instruction or piece of data. For | |
427 | example: | |
428 | ||
429 | @samp{callt ctoff(table_func1)} | |
430 | ||
431 | will put the call the function whoes address is held in the call table | |
432 | at the location labeled 'table_func1'. | |
433 | ||
86aba9db NC |
434 | @cindex @code{longcall} pseudo-op, V850 |
435 | @item .longcall @code{name} | |
436 | Indicates that the following sequence of instructions is a long call | |
437 | to function @code{name}. The linker will attempt to shorten this call | |
438 | sequence if @code{name} is within a 22bit offset of the call. Only | |
439 | valid if the @code{-mrelax} command line switch has been enabled. | |
440 | ||
441 | @cindex @code{longjump} pseudo-op, V850 | |
442 | @item .longjump @code{name} | |
443 | Indicates that the following sequence of instructions is a long jump | |
444 | to label @code{name}. The linker will attempt to shorten this code | |
445 | sequence if @code{name} is within a 22bit offset of the jump. Only | |
446 | valid if the @code{-mrelax} command line switch has been enabled. | |
447 | ||
252b5132 RH |
448 | @end table |
449 | ||
450 | ||
451 | For information on the V850 instruction set, see @cite{V850 | |
452 | Family 32-/16-Bit single-Chip Microcontroller Architecture Manual} from NEC. | |
453 | Ltd. |