[AArch64][PATCH 13/14] Support FP16 Adv.SIMD Shift By Immediate instructions.
[deliverable/binutils-gdb.git] / gas / testsuite / gas / aarch64 / advsimd-fp16.s
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1/* simdhp.s Test file for AArch64 half-precision floating-point
2 vector instructions. */
3
4 /* Vector three-same. */
5
6 .macro three_same, op
7 \op v1.2d, v2.2d, v3.2d
8 \op v1.2s, v2.2s, v3.2s
9 \op v1.4s, v2.4s, v3.4s
10 \op v0.4h, v0.4h, v0.4h
11 \op v1.4h, v2.4h, v3.4h
12 \op v0.8h, v0.8h, v0.8h
13 \op v1.8h, v2.8h, v3.8h
14 .endm
15
16 .text
17
18 three_same fmaxnm
19 three_same fmaxnmp
20 three_same fminnm
21 three_same fminnmp
22 three_same fmla
23 three_same fmls
24 three_same fadd
25 three_same faddp
26 three_same fsub
27 three_same fmulx
28 three_same fmul
29 three_same fcmeq
30 three_same fcmge
31 three_same fcmgt
32 three_same facge
33 three_same facgt
34 three_same fmax
35 three_same fmaxp
36 three_same fmin
37 three_same fminp
38 three_same frecps
39 three_same fdiv
40 three_same frsqrts
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41
42 /* Scalar three-same. */
43
44 .macro sthree_same, op
45 \op d0, d1, d2
46 \op s0, s1, s2
47 \op h0, h1, h2
48 \op h0, h0, h0
49 .endm
50
51 sthree_same fabd
52 sthree_same fmulx
53 sthree_same fcmeq
54 sthree_same fcmgt
55 sthree_same fcmge
56 sthree_same facge
57 sthree_same facgt
58 sthree_same frecps
59 sthree_same frsqrts
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60
61 /* Vector two-register misc. */
62
63 .macro tworeg_zero, op
64 \op v0.2d, v1.2d, #0.0
65 \op v0.2s, v1.2s, #0.0
66 \op v0.4s, v1.4s, #0.0
67 \op v0.4h, v1.4h, #0.0
68 \op v0.8h, v1.8h, #0.0
69 .endm
70
71 tworeg_zero fcmgt
72 tworeg_zero fcmge
73 tworeg_zero fcmeq
74 tworeg_zero fcmle
75 tworeg_zero fcmlt
76
77 .macro tworeg_misc, op
78 \op v0.2d, v1.2d
79 \op v0.2s, v1.2s
80 \op v0.4s, v1.4s
81 \op v0.4h, v1.4h
82 \op v0.8h, v1.8h
83 .endm
84
85 tworeg_misc fabs
86 tworeg_misc fneg
87
88 tworeg_misc frintn
89 tworeg_misc frinta
90 tworeg_misc frintp
91
92 tworeg_misc frintm
93 tworeg_misc frintx
94 tworeg_misc frintz
95 tworeg_misc frinti
96
97 tworeg_misc fcvtns
98 tworeg_misc fcvtnu
99 tworeg_misc fcvtps
100 tworeg_misc fcvtpu
101
102 tworeg_misc fcvtms
103 tworeg_misc fcvtmu
104 tworeg_misc fcvtzs
105 tworeg_misc fcvtzu
106
107 tworeg_misc fcvtas
108 tworeg_misc fcvtau
109
110 tworeg_misc scvtf
111 tworeg_misc ucvtf
112 tworeg_misc frecpe
113 tworeg_misc frsqrte
114 tworeg_misc fsqrt
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115
116 /* Scalar two-register misc. */
117
118 .macro stworeg_zero, op
119 \op d0, d1, #0.0
120 \op s0, s1, #0.0
121 \op h0, h1, #0.0
122 \op h0, h0, #0.0
123 .endm
124
125 stworeg_zero fcmgt
126 stworeg_zero fcmge
127 stworeg_zero fcmeq
128 stworeg_zero fcmle
129 stworeg_zero fcmlt
130
131 .macro stworeg_misc, op
132 \op d0, d1
133 \op s0, s1
134 \op h0, h1
135 \op h0, h0
136 .endm
137
138 stworeg_misc fcvtns
139 stworeg_misc fcvtnu
140 stworeg_misc fcvtps
141 stworeg_misc fcvtpu
142
143 stworeg_misc fcvtms
144 stworeg_misc fcvtmu
145 stworeg_misc fcvtzs
146 stworeg_misc fcvtzu
147
148 stworeg_misc fcvtas
149 stworeg_misc fcvtau
150
151 stworeg_misc scvtf
152 stworeg_misc ucvtf
153
154 stworeg_misc frecpe
155 stworeg_misc frsqrte
156 stworeg_misc frecpx
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157
158 /* Vector indexed element. */
159
160 .macro indexed_elem, op
161 \op v1.2d, v2.2d, v3.d[1]
162 \op v1.2s, v2.2s, v3.s[2]
163 \op v1.4s, v2.4s, v3.s[1]
164 \op v0.4h, v0.4h, v0.h[0]
165 \op v1.4h, v2.4h, v3.h[0]
166 \op v0.8h, v0.8h, v0.h[0]
167 \op v1.8h, v2.8h, v3.h[0]
168 .endm
169
170 indexed_elem fmla
171 indexed_elem fmls
172
173 indexed_elem fmul
174 indexed_elem fmulx
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175
176 /* Scalar indexed element. */
177
178 .macro sindexed_elem, op
179 \op d1, d2, v3.d[1]
180 \op s1, s2, v3.s[1]
181 \op h1, h2, v3.h[1]
182 \op h0, h0, v0.h[0]
183 .endm
184
185 sindexed_elem fmla
186 sindexed_elem fmls
187
188 sindexed_elem fmul
189 sindexed_elem fmulx
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190
191 /* Adv.SIMD across lanes. */
192
193 .macro across_lanes, op
194 \op s1, v2.4s
195 \op h1, v2.4h
196 \op h1, v2.8h
197 \op h0, v0.4h
198 \op h0, v0.8h
199 .endm
200
201 across_lanes fmaxnmv
202 across_lanes fmaxv
203 across_lanes fminnmv
204 across_lanes fminv
205
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206 /* Adv.SIMD modified immediate. */
207
208 fmov v1.2d, #2.0
209 fmov v1.2s, #2.0
210 fmov v1.4s, #2.0
211 fmov v1.4h, #2.0
212 fmov v1.8h, #2.0
213 fmov v0.4h, #1.0
214 fmov v0.8h, #1.0
b195470d 215
b5b0f34c 216 /* Adv.SIMD scalar pairwise. */
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217
218 .macro scalar_pairwise, op
219 \op d1, v2.2d
220 \op s1, v2.2s
221 \op h1, v2.2h
222 \op h0, v0.2h
223 .endm
224
225 scalar_pairwise fmaxnmp
226 scalar_pairwise faddp
227 scalar_pairwise fmaxp
228 scalar_pairwise fminnmp
229 scalar_pairwise fminp
230
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231 /* Adv.SIMD shift by immediate. */
232
233 .macro shift_imm, op
234 \op v1.2d, v2.2d, #3
235 \op v1.2s, v2.2s, #3
236 \op v1.4s, v2.4s, #3
237 \op v1.4h, v2.4h, #3
238 \op v1.8h, v2.8h, #3
239 \op v0.4h, v0.4h, #1
240 \op v0.8h, v0.8h, #1
241 .endm
242
243 shift_imm scvtf
244 shift_imm fcvtzs
245 shift_imm ucvtf
246 shift_imm fcvtzu
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