projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 50cc854c MW |
1 | /* Incorrect use of the RAS extension instructions. */ |
| 2 | .text | |
| 3 | ||
| 4 | .macro rw_sys_reg sys_reg xreg r w | |
| 5 | .ifc \w, 1 | |
| 6 | msr \sys_reg, \xreg | |
| 7 | .endif | |
| 8 | .ifc \r, 1 | |
| 9 | mrs \xreg, \sys_reg | |
| 10 | .endif | |
| 11 | .endm | |
| 12 | ||
| 13 | /* ARMv8-A. */ | |
| 14 | .arch armv8-a | |
| 50cc854c MW |
15 | hint #0x10 |
| 16 | ||
| 17 | rw_sys_reg sys_reg=erridr_el1 xreg=x5 r=1 w=0 | |
| 18 | rw_sys_reg sys_reg=errselr_el1 xreg=x7 r=1 w=1 | |
| 19 | ||
| 20 | rw_sys_reg sys_reg=erxfr_el1 xreg=x5 r=1 w=0 | |
| 21 | rw_sys_reg sys_reg=erxctlr_el1 xreg=x5 r=1 w=1 | |
| 22 | rw_sys_reg sys_reg=erxstatus_el1 xreg=x5 r=1 w=1 | |
| 23 | rw_sys_reg sys_reg=erxaddr_el1 xreg=x5 r=1 w=1 | |
| 24 | ||
| 25 | rw_sys_reg sys_reg=erxmisc0_el1 xreg=x5 r=1 w=1 | |
| 26 | rw_sys_reg sys_reg=erxmisc1_el1 xreg=x5 r=1 w=1 | |
| 27 | ||
| 28 | rw_sys_reg sys_reg=vsesr_el2 xreg=x5 r=1 w=0 | |
| 29 | rw_sys_reg sys_reg=disr_el1 xreg=x5 r=1 w=1 | |
| 30 | rw_sys_reg sys_reg=vdisr_el2 xreg=x5 r=1 w=0 | |
| 31 | ||
| 32 | /* ARMv8.1-A. */ | |
| 33 | ||
| 34 | .arch armv8.1-a | |
| 50cc854c MW |
35 | hint #0x10 |
| 36 | ||
| 37 | rw_sys_reg sys_reg=erridr_el1 xreg=x5 r=1 w=0 | |
| 38 | rw_sys_reg sys_reg=errselr_el1 xreg=x7 r=1 w=1 | |
| 39 | ||
| 40 | rw_sys_reg sys_reg=erxfr_el1 xreg=x5 r=1 w=0 | |
| 41 | rw_sys_reg sys_reg=erxctlr_el1 xreg=x5 r=1 w=1 | |
| 42 | rw_sys_reg sys_reg=erxstatus_el1 xreg=x5 r=1 w=1 | |
| 43 | rw_sys_reg sys_reg=erxaddr_el1 xreg=x5 r=1 w=1 | |
| 44 | ||
| 45 | rw_sys_reg sys_reg=erxmisc0_el1 xreg=x5 r=1 w=1 | |
| 46 | rw_sys_reg sys_reg=erxmisc1_el1 xreg=x5 r=1 w=1 | |
| 47 | ||
| 48 | rw_sys_reg sys_reg=vsesr_el2 xreg=x5 r=1 w=0 | |
| 49 | rw_sys_reg sys_reg=disr_el1 xreg=x5 r=1 w=1 | |
| 50 | rw_sys_reg sys_reg=vdisr_el2 xreg=x5 r=1 w=0 |