Commit | Line | Data |
---|---|---|
a06ea964 | 1 | #objdump: -dr |
1bec0c86 | 2 | #as: -march=armv8-a -mabi=lp64 |
a06ea964 NC |
3 | |
4 | .*: file format .* | |
5 | ||
6 | Disassembly of section .text: | |
7 | ||
8 | 0000000000000000 <.*>: | |
9 | 0: 9ac32041 lsl x1, x2, x3 | |
10 | 4: d340fc41 lsr x1, x2, #0 | |
11 | 8: d37ff841 lsl x1, x2, #1 | |
12 | c: 93c30441 extr x1, x2, x3, #1 | |
13 | 10: 93c3fc41 extr x1, x2, x3, #63 | |
14 | 14: 93c30041 extr x1, x2, x3, #0 | |
15 | 18: 13837c41 extr w1, w2, w3, #31 | |
bb7eff52 RS |
16 | 1c: 9a9f17e1 cset x1, eq // eq = none |
17 | 20: da9f13e1 csetm x1, eq // eq = none | |
a06ea964 NC |
18 | 24: 71000021 subs w1, w1, #0x0 |
19 | 28: 7100003f cmp w1, #0x0 | |
20 | 2c: 4b0203e1 neg w1, w2 | |
21 | 30: 51000041 sub w1, w2, #0x0 | |
22 | 34: f100003f cmp x1, #0x0 | |
23 | 38: f1000021 subs x1, x1, #0x0 | |
24 | 3c: 32000fe1 orr w1, wzr, #0xf | |
25 | 40: aa0203e1 mov x1, x2 | |
26 | 44: 18000061 ldr w1, 50 <sp> | |
27 | 48: 18000621 ldr w1, 10c <sp\+0xbc> | |
28 | 4c: 58000621 ldr x1, 110 <sp\+0xc0> | |
29 | ||
30 | 0000000000000050 <sp>: | |
31 | 50: 12345678 .word 0x12345678 | |
32 | 54: d65f03c0 ret | |
33 | 58: d65f03c0 ret | |
34 | 5c: d65f0040 ret x2 | |
35 | 60: 8b22603f add sp, x1, x2 | |
36 | 64: 91401ca5 add x5, x5, #0x7, lsl #12 | |
37 | 68: 8b430441 add x1, x2, x3, lsr #1 | |
38 | 6c: 91001ca5 add x5, x5, #0x7 | |
39 | 70: 71000421 subs w1, w1, #0x1 | |
fb098a1e YZ |
40 | 74: d2800c82 mov x2, #0x64 // #100 |
41 | 78: d2800c82 mov x2, #0x64 // #100 | |
42 | 7c: d2800c82 mov x2, #0x64 // #100 | |
43 | 80: d2a00c82 mov x2, #0x640000 // #6553600 | |
44 | 84: d2a00c82 mov x2, #0x640000 // #6553600 | |
45 | 88: d2c00c82 mov x2, #0x6400000000 // #429496729600 | |
46 | 8c: d2c00c82 mov x2, #0x6400000000 // #429496729600 | |
47 | 90: d2e00c82 mov x2, #0x64000000000000 // #28147497671065600 | |
48 | 94: d2e00c82 mov x2, #0x64000000000000 // #28147497671065600 | |
49 | 98: 52800c81 mov w1, #0x64 // #100 | |
50 | 9c: 52800c81 mov w1, #0x64 // #100 | |
51 | a0: 52a00c81 mov w1, #0x640000 // #6553600 | |
a06ea964 NC |
52 | a4: 8a030041 and x1, x2, x3 |
53 | a8: 0a0f015e and w30, w10, w15 | |
54 | ac: 12000041 and w1, w2, #0x1 | |
55 | b0: 8a430441 and x1, x2, x3, lsr #1 | |
56 | b4: 32000021 orr w1, w1, #0x1 | |
57 | b8: 32000021 orr w1, w1, #0x1 | |
58 | bc: b2400021 orr x1, x1, #0x1 | |
59 | c0: 92400c41 and x1, x2, #0xf | |
60 | c4: 12000c41 and w1, w2, #0xf | |
61 | c8: 92610041 and x1, x2, #0x80000000 | |
62 | cc: 12010041 and w1, w2, #0x80000000 | |
63 | d0: 925d0041 and x1, x2, #0x800000000 | |
64 | d4: 92400c85 and x5, x4, #0xf | |
65 | d8: 0a230041 bic w1, w2, w3 | |
66 | dc: 8a230041 bic x1, x2, x3 | |
bb7eff52 | 67 | e0: 54000001 b\.ne e0 <sp\+0x90> // b\.any |
a06ea964 NC |
68 | e4: 17ffffff b e0 <sp\+0x90> |
69 | e8: 14000001 b ec <sp\+0x9c> | |
bb7eff52 RS |
70 | ec: 54ffffa0 b\.eq e0 <sp\+0x90> // b\.none |
71 | f0: 54000001 b\.ne f0 <sp\+0xa0> // b\.any | |
a06ea964 NC |
72 | f4: 17ffffff b f0 <sp\+0xa0> |
73 | f8: 14000001 b fc <sp\+0xac> | |
bb7eff52 | 74 | fc: 54ffffa0 b\.eq f0 <sp\+0xa0> // b\.none |
a06ea964 | 75 | 100: d61f0040 br x2 |
bb7eff52 RS |
76 | 104: 54ffffc2 b\.cs fc <sp\+0xac> // b\.hs, b\.nlast |
77 | 108: 54ffffa3 b\.cc fc <sp\+0xac> // b\.lo, b\.ul, b\.last | |
a06ea964 NC |
78 | ... |
79 | 10c: R_AARCH64_ABS32 .text\+0x50 | |
80 | 110: R_AARCH64_ABS64 .text\+0x50 |