[PATCH, BINUTILS, AARCH64, 6/9] Add Random number instructions
[deliverable/binutils-gdb.git] / gas / testsuite / gas / aarch64 / sve-movprfx_25.d
CommitLineData
e66cfcef
TC
1#source: sve-movprfx_25.s
2#warning_output: sve-movprfx_25.l
3#as: -march=armv8-a+sve -I$srcdir/$subdir
4#objdump: -Dr -M notes
5
6.* file format .*
7
8Disassembly of section .*:
9
100+ <.*>:
11[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d
12[^:]+: 05d14181 mov z1.d, p1/m, #12
13[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d
14[^:]+: 05d14001 mov z1.d, p1/m, #0
15[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d
16[^:]+: 05d14001 mov z1.d, p1/m, #0
17[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d
18[^:]+: 05d94181 mov z1.d, p9/m, #12 // note: predicate register differs from that in preceding `movprfx' at operand 2
19[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d
20[^:]+: 05d10181 mov z1.d, p1/z, #12 // note: merging predicate expected due to preceding `movprfx' at operand 2
21[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d
22[^:]+: 05e8a441 mov z1.d, p1/m, x2
23[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d
24[^:]+: 05e8a421 mov z1.d, p1/m, x1 // note: output register of preceding `movprfx' used as input at operand 3
25[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d
26[^:]+: 05e08441 mov z1.d, p1/m, d2
27[^:]+: 04d12461 movprfx z1.d, p1/m, z3.d
28[^:]+: 05e08421 mov z1.d, p1/m, d1 // note: output register of preceding `movprfx' used as input at operand 3
29[^:]+: d65f03c0 ret
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