projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 75468c93 YZ |
1 | /* tracereg-illegal.s Test file for AArch64 trace unit registers. |
| 2 | Reject writing to registers that are read-only and reading from | |
| 3 | registers that are write-only. | |
| 4 | ||
| 5 | Copyright 2013 Free Software Foundation, Inc. | |
| 6 | Contributed by ARM Ltd. | |
| 7 | ||
| 8 | This file is part of GAS. | |
| 9 | ||
| 10 | GAS is free software; you can redistribute it and/or modify | |
| 11 | it under the terms of the GNU General Public License as published by | |
| 12 | the Free Software Foundation; either version 3 of the license, or | |
| 13 | (at your option) any later version. | |
| 14 | ||
| 15 | GAS is distributed in the hope that it will be useful, | |
| 16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 18 | GNU General Public License for more details. | |
| 19 | ||
| 20 | You should have received a copy of the GNU General Public License | |
| 21 | along with this program; see the file COPYING3. If not, | |
| 22 | see <http://www.gnu.org/licenses/>. */ | |
| 23 | ||
| 24 | .macro rw_sys_reg sys_reg xreg r w | |
| 25 | .ifc \w, 1 | |
| 26 | msr \sys_reg, \xreg | |
| 27 | .endif | |
| 28 | .ifc \r, 1 | |
| 29 | mrs \xreg, \sys_reg | |
| 30 | .endif | |
| 31 | .endm | |
| 32 | ||
| 33 | .text | |
| 34 | ||
| 35 | rw_sys_reg sys_reg=trcstatr xreg=x7 r=0 w=1 | |
| 36 | rw_sys_reg sys_reg=trcidr8 xreg=x7 r=0 w=1 | |
| 37 | rw_sys_reg sys_reg=trcidr9 xreg=x7 r=0 w=1 | |
| 38 | rw_sys_reg sys_reg=trcidr10 xreg=x7 r=0 w=1 | |
| 39 | rw_sys_reg sys_reg=trcidr11 xreg=x7 r=0 w=1 | |
| 40 | rw_sys_reg sys_reg=trcidr12 xreg=x7 r=0 w=1 | |
| 41 | rw_sys_reg sys_reg=trcidr13 xreg=x7 r=0 w=1 | |
| 42 | rw_sys_reg sys_reg=trcidr0 xreg=x7 r=0 w=1 | |
| 43 | rw_sys_reg sys_reg=trcidr1 xreg=x7 r=0 w=1 | |
| 44 | rw_sys_reg sys_reg=trcidr2 xreg=x7 r=0 w=1 | |
| 45 | rw_sys_reg sys_reg=trcidr3 xreg=x7 r=0 w=1 | |
| 46 | rw_sys_reg sys_reg=trcidr4 xreg=x7 r=0 w=1 | |
| 47 | rw_sys_reg sys_reg=trcidr5 xreg=x7 r=0 w=1 | |
| 48 | rw_sys_reg sys_reg=trcidr6 xreg=x7 r=0 w=1 | |
| 49 | rw_sys_reg sys_reg=trcidr7 xreg=x7 r=0 w=1 | |
| 50 | rw_sys_reg sys_reg=trcoslar xreg=x7 r=1 w=0 | |
| 51 | rw_sys_reg sys_reg=trcoslsr xreg=x7 r=0 w=1 | |
| 52 | rw_sys_reg sys_reg=trcpdsr xreg=x7 r=0 w=1 | |
| 53 | rw_sys_reg sys_reg=trcdevaff0 xreg=x7 r=0 w=1 | |
| 54 | rw_sys_reg sys_reg=trcdevaff1 xreg=x7 r=0 w=1 | |
| 55 | rw_sys_reg sys_reg=trclar xreg=x7 r=1 w=0 | |
| 56 | rw_sys_reg sys_reg=trclsr xreg=x7 r=0 w=1 | |
| 57 | rw_sys_reg sys_reg=trcauthstatus xreg=x7 r=0 w=1 | |
| 58 | rw_sys_reg sys_reg=trcdevarch xreg=x7 r=0 w=1 | |
| 59 | rw_sys_reg sys_reg=trcdevid xreg=x7 r=0 w=1 | |
| 60 | rw_sys_reg sys_reg=trcdevtype xreg=x7 r=0 w=1 | |
| 61 | rw_sys_reg sys_reg=trcpidr4 xreg=x7 r=0 w=1 | |
| 62 | rw_sys_reg sys_reg=trcpidr5 xreg=x7 r=0 w=1 | |
| 63 | rw_sys_reg sys_reg=trcpidr6 xreg=x7 r=0 w=1 | |
| 64 | rw_sys_reg sys_reg=trcpidr7 xreg=x7 r=0 w=1 | |
| 65 | rw_sys_reg sys_reg=trcpidr0 xreg=x7 r=0 w=1 | |
| 66 | rw_sys_reg sys_reg=trcpidr1 xreg=x7 r=0 w=1 | |
| 67 | rw_sys_reg sys_reg=trcpidr2 xreg=x7 r=0 w=1 | |
| 68 | rw_sys_reg sys_reg=trcpidr3 xreg=x7 r=0 w=1 | |
| 69 | rw_sys_reg sys_reg=trccidr0 xreg=x7 r=0 w=1 | |
| 70 | rw_sys_reg sys_reg=trccidr1 xreg=x7 r=0 w=1 | |
| 71 | rw_sys_reg sys_reg=trccidr2 xreg=x7 r=0 w=1 | |
| 72 | rw_sys_reg sys_reg=trccidr3 xreg=x7 r=0 w=1 |