Commit | Line | Data |
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24b368f8 CZ |
1 | ;; Test ARC EM Code denisty ADD_S extensions. They are only valid for |
2 | ;; ARCv2 architecture. | |
3 | ;; | |
d105775e | 4 | ; { dg-do assemble { target arc*-*-* } } |
24b368f8 CZ |
5 | ; { dg-options "--mcpu=arc700" } |
6 | ;; The following insns are accepted by ARCv2 only | |
7cbc739c | 7 | add_s r4,r4,-1 ; { dg-error "Error: register must be either r0-r3 or r12-r15 for instruction" } |
24b368f8 CZ |
8 | add_s 0,0xAAAA5555,-1 ; { dg-error "Error: inappropriate arguments for opcode 'add_s'" } |
9 | add_s r0,r15,0x20 ; { dg-error "Error: inappropriate arguments for opcode 'add_s'" } | |
10 | add_s r1,r15,0x20 ; { dg-error "Error: inappropriate arguments for opcode 'add_s'" } |