[deliverable/binutils-gdb.git] / gas / testsuite / gas / arc / sda-relocs.s

;;; Test if the assembler generates correctly all SDA relocations.

	.cpu ARC700
	.text
	;; BFD_RELOC_ARC_SDA16_LD2 (s11 range)
	add_s	r0,gp,@a@sda
	ld_s	r0,[gp,@a@sda]

	;; BFD_RELOC_ARC_SDA16_LD1 (s10 range)
	ldw_s	r0,[gp,@a@sda]

	;; BFD_RELOC_ARC_SDA16_LD (s9 range)
	ldb_s	r0,[gp,@a@sda]

	;; BFD_RELOC_ARC_SDA_LDST2 (s11 range)
	ld.as	r12,[gp,@a@sda]
	st.as	r14,[gp,@a@sda]

	;; BFD_RELOC_ARC_SDA_LDST (s9 range)
	ld	r10,[gp,@a@sda]
	st	r9,[gp,@a@sda]
	ldw	r8,[gp,@a@sda]
	stw	r7,[gp,@a@sda]
	ldb	r6,[gp,@a@sda]
	stb	r5,[gp,@a@sda]

	;; BFD_RELOC_ARC_SDA_LDST1 (s10 range)
	ldw.as	r8,[gp,@a@sda]
	stw.as	r7,[gp,@a@sda]

	;; Undefined behavior. However it should be something like: LDST
	ldb.as	r8,[gp,@a@sda]
	stb.as	r7,[gp,@a@sda]

	;; BFD_RELOC_ARC_SDA_ME
	add	r1,gp,@a@sda
Commit	Line	Data
24b368f8 CZ	1	;;; Test if the assembler generates correctly all SDA relocations.
	2
	3	.cpu ARC700
	4	.text
	5	;; BFD_RELOC_ARC_SDA16_LD2 (s11 range)
	6	add_s r0,gp,@a@sda
	7	ld_s r0,[gp,@a@sda]
	8
	9	;; BFD_RELOC_ARC_SDA16_LD1 (s10 range)
	10	ldw_s r0,[gp,@a@sda]
	11
	12	;; BFD_RELOC_ARC_SDA16_LD (s9 range)
	13	ldb_s r0,[gp,@a@sda]
	14
	15	;; BFD_RELOC_ARC_SDA_LDST2 (s11 range)
	16	ld.as r12,[gp,@a@sda]
	17	st.as r14,[gp,@a@sda]
	18
	19	;; BFD_RELOC_ARC_SDA_LDST (s9 range)
	20	ld r10,[gp,@a@sda]
	21	st r9,[gp,@a@sda]
	22	ldw r8,[gp,@a@sda]
	23	stw r7,[gp,@a@sda]
	24	ldb r6,[gp,@a@sda]
	25	stb r5,[gp,@a@sda]
	26
	27	;; BFD_RELOC_ARC_SDA_LDST1 (s10 range)
	28	ldw.as r8,[gp,@a@sda]
	29	stw.as r7,[gp,@a@sda]
	30
	31	;; Undefined behavior. However it should be something like: LDST
	32	ldb.as r8,[gp,@a@sda]
	33	stb.as r7,[gp,@a@sda]
	34
	35	;; BFD_RELOC_ARC_SDA_ME
	36	add r1,gp,@a@sda