Commit | Line | Data |
---|---|---|
886a2506 NC |
1 | #as: -mcpu=archs |
2 | #objdump: -dr --show-raw-insn | |
252b5132 | 3 | |
886a2506 | 4 | .*: +file format .*arc.* |
252b5132 RH |
5 | |
6 | Disassembly of section .text: | |
0d2bcfaf | 7 | |
841fdfcd | 8 | [0-9a-f]+ <.text>: |
886a2506 NC |
9 | 0: 1a00 0040 st r1,\[r2\] |
10 | 4: 1a0e 0040 st r1,\[r2,14\] | |
11 | 8: 1a00 0042 stb r1,\[r2\] | |
12 | c: 1b0e 0048 st.aw r1,\[r3,14\] | |
13 | 10: 1a02 004c st[hw]+.aw r1,\[r2,2\] | |
14 | 14: 1e00 7040 0000 0384 st r1,\[0x384\] | |
15 | 1c: 1a00 0003 stb 0,\[r2\] | |
16 | 20: 1af8 8e01 st 56,\[r2,-8\] | |
17 | 24: 1e00 7080 0000 0000 st r2,\[0\] | |
b05a65d0 | 18 | 28: R_ARC_32_ME foo |
886a2506 NC |
19 | 2c: 1a02 0060 st.di r1,\[r2,2\] |
20 | 30: 1a03 0068 st.di.aw r1,\[r2,3\] | |
21 | 34: 1a04 006c st[hw]+.di.aw r1,\[r2,4\] | |
22 | 38: 1c04 1f80 0000 0000 st 0,\[r12,4\] | |
841fdfcd | 23 | 3c: R_ARC_32_ME .text\+0x40 |
886a2506 | 24 | 40: 212b 0080 sr r1,\[r2\] |
66a5a740 | 25 | 44: 216b 0380 sr r1,\[aux_irq_ctrl\] |
886a2506 NC |
26 | 48: 262b 7040 0000 03e8 sr 0x3e8,\[r1\] |
27 | 50: 262b 7080 0000 0064 sr 0x64,\[r2\] | |
28 | 58: 212b 0f80 0000 2710 sr r1,\[0x2710\] | |
29 | 60: 266b 7fc0 0000 0064 sr 0x64,\[0x3f\] | |
f36e33da | 30 | 68: 26ab 7901 0000 2710 sr 0x2710,\[vbfdw_build\] |