[deliverable/binutils-gdb.git] / gas / testsuite / gas / arc / taux.s

	lr	r5, [status]
	lr	r5, [semaphore]
	lr	r5, [lp_start]
	lr	r5, [lp_end]
	lr	r5, [identity]
	lr	r5, [debug]
	lr	r5, [pc]
	lr	r5, [adcr]
	lr	r5, [apcr]
	lr	r5, [acr]
	lr	r5, [status32]
	lr	r5, [status32_l1]
	lr	r5, [status32_l2]
	lr	r5, [bpu_flush]
	lr	r5, [ivic]
	lr	r5, [ic_ivic]
	lr	r5, [che_mode]
	lr	r5, [ic_ctrl]
	lr	r5, [mulhi]
	lr	r5, [lockline]
	lr	r5, [ic_lil]
	lr	r5, [dmc_code_ram]
	lr	r5, [tag_addr_mask]
	lr	r5, [tag_data_mask]
	lr	r5, [line_length_mask]
	lr	r5, [aux_ldst_ram]
	lr	r5, [aux_dccm]
	lr	r5, [unlockline]
	lr	r5, [ic_ivil]
	lr	r5, [ic_ram_address]
	lr	r5, [ic_tag]
	lr	r5, [ic_wp]
	lr	r5, [ic_data]
	lr	r5, [sram_seq]
	lr	r5, [count0]
	lr	r5, [control0]
	lr	r5, [limit0]
	lr	r5, [pcport]
	lr	r5, [int_vector_base]
	lr	r5, [aux_vbfdw_mode]
	lr	r5, [jli_base]
	lr	r5, [aux_vbfdw_bm0]
	lr	r5, [aux_vbfdw_bm1]
	lr	r5, [aux_vbfdw_accu]
	lr	r5, [aux_vbfdw_ofst]
	lr	r5, [aux_vbfdw_intstat]
	lr	r5, [aux_xmac0_24]
	lr	r5, [aux_xmac1_24]
	lr	r5, [aux_xmac2_24]
	lr	r5, [aux_fbf_store_16]
	lr	r5, [ax0]
	lr	r5, [ax1]
	lr	r5, [aux_crc_poly]
	lr	r5, [aux_crc_mode]
	lr	r5, [mx0]
	lr	r5, [mx1]
	lr	r5, [my0]
	lr	r5, [my1]
	lr	r5, [xyconfig]
	lr	r5, [scratch_a]
	lr	r5, [burstsys]
	lr	r5, [tsch]
	lr	r5, [burstxym]
	lr	r5, [burstsz]
	lr	r5, [burstval]
	lr	r5, [xtp_newval]
	lr	r5, [aux_macmode]
	lr	r5, [lsp_newval]
	lr	r5, [aux_irq_lv12]
	lr	r5, [aux_xmac0]
	lr	r5, [aux_xmac1]
	lr	r5, [aux_xmac2]
	lr	r5, [dc_ivdc]
	lr	r5, [dc_ctrl]
	lr	r5, [dc_ldl]
	lr	r5, [dc_ivdl]
	lr	r5, [dc_flsh]
	lr	r5, [dc_fldl]
	lr	r5, [hexdata]
	lr	r5, [hexctrl]
	lr	r5, [led]
	lr	r5, [dilstat]
	lr	r5, [swstat]
	lr	r5, [dc_ram_addr]
	lr	r5, [dc_tag]
	lr	r5, [dc_wp]
	lr	r5, [dc_data]
	lr	r5, [dccm_base_build]
	lr	r5, [crc_build]
	lr	r5, [bta_link_build]
	lr	r5, [vbfdw_build]
	lr	r5, [ea_build]
	lr	r5, [dataspace]
	lr	r5, [memsubsys]
	lr	r5, [vecbase_ac_build]
	lr	r5, [p_base_addr]
	lr	r5, [data_uncached_build]
	lr	r5, [fp_build]
	lr	r5, [dpfp_build]
	lr	r5, [mpu_build]
	lr	r5, [rf_build]
	lr	r5, [mmu_build]
	lr	r5, [aa2_build]
	lr	r5, [vecbase_build]
	lr	r5, [d_cache_build]
	lr	r5, [madi_build]
	lr	r5, [dccm_build]
	lr	r5, [timer_build]
	lr	r5, [ap_build]
	lr	r5, [i_cache_build]
	lr	r5, [iccm_build]
	lr	r5, [dspram_build]
	lr	r5, [mac_build]
	lr	r5, [multiply_build]
	lr	r5, [swap_build]
	lr	r5, [norm_build]
	lr	r5, [minmax_build]
	lr	r5, [barrel_build]
	lr	r5, [ax0]
	lr	r5, [ax1]
	lr	r5, [ax2]
	lr	r5, [ax3]
	lr	r5, [ay0]
	lr	r5, [ay1]
	lr	r5, [ay2]
	lr	r5, [ay3]
	lr	r5, [mx00]
	lr	r5, [mx01]
	lr	r5, [mx10]
	lr	r5, [mx11]
	lr	r5, [mx20]
	lr	r5, [mx21]
	lr	r5, [mx30]
	lr	r5, [mx31]
	lr	r5, [my00]
	lr	r5, [my01]
	lr	r5, [my10]
	lr	r5, [my11]
	lr	r5, [my20]
	lr	r5, [my21]
	lr	r5, [my30]
	lr	r5, [my31]
	lr	r5, [xyconfig]
	lr	r5, [burstsys]
	lr	r5, [burstxym]
	lr	r5, [burstsz]
	lr	r5, [burstval]
	lr	r5, [xylsbasex]
	lr	r5, [xylsbasey]
	lr	r5, [aux_xmaclw_h]
	lr	r5, [aux_xmaclw_l]
	lr	r5, [se_ctrl]
	lr	r5, [se_stat]
	lr	r5, [se_err]
	lr	r5, [se_eadr]
	lr	r5, [se_spc]
	lr	r5, [sdm_base]
	lr	r5, [scm_base]
	lr	r5, [se_dbg_ctrl]
	lr	r5, [se_dbg_data0]
	lr	r5, [se_dbg_data1]
	lr	r5, [se_dbg_data2]
	lr	r5, [se_dbg_data3]
	lr	r5, [se_watch]
	lr	r5, [bpu_build]
	lr	r5, [arc600_build_config]
	lr	r5, [isa_config]
	lr	r5, [hwp_build]
	lr	r5, [pct_build]
	lr	r5, [cc_build]
	lr	r5, [pm_bcr]
	lr	r5, [scq_switch_build]
	lr	r5, [vraptor_build]
	lr	r5, [dma_config]
	lr	r5, [simd_config]
	lr	r5, [vlc_build]
	lr	r5, [simd_dma_build]
	lr	r5, [ifetch_queue_build]
	lr	r5, [smart_build]
	lr	r5, [count1]
	lr	r5, [control1]
	lr	r5, [limit1]
	lr	r5, [timer_xx]
	lr	r5, [arcangel_periph_xx]
	lr	r5, [periph_xx]
	lr	r5, [aux_irq_lev]
	lr	r5, [aux_irq_hint]
	lr	r5, [aux_inter_core_interrupt]
	lr	r5, [aes_aux_0]
	lr	r5, [aes_aux_1]
	lr	r5, [aes_aux_2]
	lr	r5, [aes_crypt_mode]
	lr	r5, [aes_auxs]
	lr	r5, [aes_auxi]
	lr	r5, [aes_aux_3]
	lr	r5, [aes_aux_4]
	lr	r5, [arith_ctl_aux]
	lr	r5, [des_aux]
	lr	r5, [ap_amv0]
	lr	r5, [ap_amm0]
	lr	r5, [ap_ac0]
	lr	r5, [ap_amv1]
	lr	r5, [ap_amm1]
	lr	r5, [ap_ac1]
	lr	r5, [ap_amv2]
	lr	r5, [ap_amm2]
	lr	r5, [ap_ac2]
	lr	r5, [ap_amv3]
	lr	r5, [ap_amm3]
	lr	r5, [ap_ac3]
	lr	r5, [ap_amv4]
	lr	r5, [ap_amm4]
	lr	r5, [ap_ac4]
	lr	r5, [ap_amv5]
	lr	r5, [ap_amm5]
	lr	r5, [ap_ac5]
	lr	r5, [ap_amv6]
	lr	r5, [ap_amm6]
	lr	r5, [ap_ac6]
	lr	r5, [ap_amv7]
	lr	r5, [ap_amm7]
	lr	r5, [ap_ac7]
	lr	r5, [pct_control]
	lr	r5, [pct_bank]
	lr	r5, [fp_status]
	lr	r5, [aux_dpfp1l]
	lr	r5, [d1l]
	lr	r5, [aux_dpfp1h]
	lr	r5, [d1h]
	lr	r5, [d1l]
	lr	r5, [aux_dpfp2l]
	lr	r5, [d2l]
	lr	r5, [d1h]
	lr	r5, [aux_dpfp2h]
	lr	r5, [d2h]
	lr	r5, [d2l]
	lr	r5, [dpfp_status]
	lr	r5, [d2h]
	lr	r5, [rtt]
	lr	r5, [eret]
	lr	r5, [erbta]
	lr	r5, [erstatus]
	lr	r5, [ecr]
	lr	r5, [efa]
	lr	r5, [tlbpd0]
	lr	r5, [tlbpd1]
	lr	r5, [tlbindex]
	lr	r5, [tlbcommand]
	lr	r5, [pid]
	lr	r5, [mpuen]
	lr	r5, [icause1]
	lr	r5, [icause2]
	lr	r5, [aux_ienable]
	lr	r5, [aux_itrigger]
	lr	r5, [xpu]
	lr	r5, [bta]
	lr	r5, [bta_l1]
	lr	r5, [bta_l2]
	lr	r5, [aux_irq_pulse_cancel]
	lr	r5, [aux_irq_pending]
	lr	r5, [scratch_data0]
	lr	r5, [mpuic]
	lr	r5, [mpufa]
	lr	r5, [mpurdb0]
	lr	r5, [mpurdp0]
	lr	r5, [mpurdb1]
	lr	r5, [mpurdp1]
	lr	r5, [mpurdb2]
	lr	r5, [mpurdp2]
	lr	r5, [mpurdb3]
	lr	r5, [mpurdp3]
	lr	r5, [mpurdb4]
	lr	r5, [mpurdp4]
	lr	r5, [mpurdb5]
	lr	r5, [mpurdp5]
	lr	r5, [mpurdb6]
	lr	r5, [mpurdp6]
	lr	r5, [mpurdb7]
	lr	r5, [mpurdp7]
	lr	r5, [mpurdb8]
	lr	r5, [mpurdp8]
	lr	r5, [mpurdb9]
	lr	r5, [mpurdp9]
	lr	r5, [mpurdb10]
	lr	r5, [mpurdp10]
	lr	r5, [mpurdb11]
	lr	r5, [mpurdp11]
	lr	r5, [mpurdb12]
	lr	r5, [mpurdp12]
	lr	r5, [mpurdb13]
	lr	r5, [mpurdp13]
	lr	r5, [mpurdb14]
	lr	r5, [mpurdp14]
	lr	r5, [mpurdb15]
	lr	r5, [mpurdp15]
	lr	r5, [eia_flags]
	lr	r5, [pm_status]
	lr	r5, [wake]
	lr	r5, [dvfs_performance]
	lr	r5, [pwr_ctrl]
	lr	r5, [aux_vlc_buf_idx]
	lr	r5, [aux_vlc_read_buf]
	lr	r5, [aux_vlc_valid_bits]
	lr	r5, [aux_vlc_buf_in]
	lr	r5, [aux_vlc_buf_free]
	lr	r5, [aux_vlc_ibuf_status]
	lr	r5, [aux_vlc_setup]
	lr	r5, [aux_vlc_bits]
	lr	r5, [aux_vlc_table]
	lr	r5, [aux_vlc_get_symbol]
	lr	r5, [aux_vlc_read_symbol]
	lr	r5, [aux_ucavlc_setup]
	lr	r5, [aux_ucavlc_state]
	lr	r5, [aux_cavlc_zero_left]
	lr	r5, [aux_uvlc_i_state]
	lr	r5, [aux_vlc_dma_ptr]
	lr	r5, [aux_vlc_dma_end]
	lr	r5, [aux_vlc_dma_esc]
	lr	r5, [aux_vlc_dma_ctrl]
	lr	r5, [aux_vlc_get_0bit]
	lr	r5, [aux_vlc_get_1bit]
	lr	r5, [aux_vlc_get_2bit]
	lr	r5, [aux_vlc_get_3bit]
	lr	r5, [aux_vlc_get_4bit]
	lr	r5, [aux_vlc_get_5bit]
	lr	r5, [aux_vlc_get_6bit]
	lr	r5, [aux_vlc_get_7bit]
	lr	r5, [aux_vlc_get_8bit]
	lr	r5, [aux_vlc_get_9bit]
	lr	r5, [aux_vlc_get_10bit]
	lr	r5, [aux_vlc_get_11bit]
	lr	r5, [aux_vlc_get_12bit]
	lr	r5, [aux_vlc_get_13bit]
	lr	r5, [aux_vlc_get_14bit]
	lr	r5, [aux_vlc_get_15bit]
	lr	r5, [aux_vlc_get_16bit]
	lr	r5, [aux_vlc_get_17bit]
	lr	r5, [aux_vlc_get_18bit]
	lr	r5, [aux_vlc_get_19bit]
	lr	r5, [aux_vlc_get_20bit]
	lr	r5, [aux_vlc_get_21bit]
	lr	r5, [aux_vlc_get_22bit]
	lr	r5, [aux_vlc_get_23bit]
	lr	r5, [aux_vlc_get_24bit]
	lr	r5, [aux_vlc_get_25bit]
	lr	r5, [aux_vlc_get_26bit]
	lr	r5, [aux_vlc_get_27bit]
	lr	r5, [aux_vlc_get_28bit]
	lr	r5, [aux_vlc_get_29bit]
	lr	r5, [aux_vlc_get_30bit]
	lr	r5, [aux_vlc_get_31bit]
	lr	r5, [aux_cabac_ctrl]
	lr	r5, [aux_cabac_ctx_state]
	lr	r5, [aux_cabac_cod_param]
	lr	r5, [aux_cabac_misc0]
	lr	r5, [aux_cabac_misc1]
	lr	r5, [aux_cabac_misc2]
 	lr	r5, [arc600_build_config]
	lr	r5, [smart_control]
	lr	r5, [smart_data_0]
	lr	r5, [smart_data_1]
	lr	r5, [smart_data_2]
	lr	r5, [smart_data_3]
Commit	Line	Data
37ab9779 CZ	1	lr r5, [status]
	2	lr r5, [semaphore]
	3	lr r5, [lp_start]
	4	lr r5, [lp_end]
	5	lr r5, [identity]
	6	lr r5, [debug]
	7	lr r5, [pc]
	8	lr r5, [adcr]
	9	lr r5, [apcr]
	10	lr r5, [acr]
	11	lr r5, [status32]
	12	lr r5, [status32_l1]
	13	lr r5, [status32_l2]
	14	lr r5, [bpu_flush]
	15	lr r5, [ivic]
	16	lr r5, [ic_ivic]
	17	lr r5, [che_mode]
	18	lr r5, [ic_ctrl]
	19	lr r5, [mulhi]
	20	lr r5, [lockline]
	21	lr r5, [ic_lil]
	22	lr r5, [dmc_code_ram]
	23	lr r5, [tag_addr_mask]
	24	lr r5, [tag_data_mask]
	25	lr r5, [line_length_mask]
	26	lr r5, [aux_ldst_ram]
	27	lr r5, [aux_dccm]
	28	lr r5, [unlockline]
	29	lr r5, [ic_ivil]
	30	lr r5, [ic_ram_address]
	31	lr r5, [ic_tag]
	32	lr r5, [ic_wp]
	33	lr r5, [ic_data]
	34	lr r5, [sram_seq]
	35	lr r5, [count0]
	36	lr r5, [control0]
	37	lr r5, [limit0]
	38	lr r5, [pcport]
	39	lr r5, [int_vector_base]
	40	lr r5, [aux_vbfdw_mode]
	41	lr r5, [jli_base]
	42	lr r5, [aux_vbfdw_bm0]
	43	lr r5, [aux_vbfdw_bm1]
	44	lr r5, [aux_vbfdw_accu]
	45	lr r5, [aux_vbfdw_ofst]
	46	lr r5, [aux_vbfdw_intstat]
	47	lr r5, [aux_xmac0_24]
	48	lr r5, [aux_xmac1_24]
	49	lr r5, [aux_xmac2_24]
	50	lr r5, [aux_fbf_store_16]
	51	lr r5, [ax0]
	52	lr r5, [ax1]
	53	lr r5, [aux_crc_poly]
	54	lr r5, [aux_crc_mode]
	55	lr r5, [mx0]
	56	lr r5, [mx1]
	57	lr r5, [my0]
	58	lr r5, [my1]
	59	lr r5, [xyconfig]
	60	lr r5, [scratch_a]
	61	lr r5, [burstsys]
	62	lr r5, [tsch]
	63	lr r5, [burstxym]
	64	lr r5, [burstsz]
65	lr r5, [burstval]
66	lr r5, [xtp_newval]
67	lr r5, [aux_macmode]
68	lr r5, [lsp_newval]
69	lr r5, [aux_irq_lv12]
70	lr r5, [aux_xmac0]
71	lr r5, [aux_xmac1]
72	lr r5, [aux_xmac2]
73	lr r5, [dc_ivdc]
74	lr r5, [dc_ctrl]
75	lr r5, [dc_ldl]
76	lr r5, [dc_ivdl]
77	lr r5, [dc_flsh]
78	lr r5, [dc_fldl]
79	lr r5, [hexdata]
80	lr r5, [hexctrl]
81	lr r5, [led]
82	lr r5, [dilstat]
83	lr r5, [swstat]
84	lr r5, [dc_ram_addr]
85	lr r5, [dc_tag]
86	lr r5, [dc_wp]
87	lr r5, [dc_data]
88	lr r5, [dccm_base_build]
89	lr r5, [crc_build]
90	lr r5, [bta_link_build]
91	lr r5, [vbfdw_build]
92	lr r5, [ea_build]
93	lr r5, [dataspace]
94	lr r5, [memsubsys]
95	lr r5, [vecbase_ac_build]
96	lr r5, [p_base_addr]
97	lr r5, [data_uncached_build]
98	lr r5, [fp_build]
99	lr r5, [dpfp_build]
100	lr r5, [mpu_build]
101	lr r5, [rf_build]
102	lr r5, [mmu_build]
103	lr r5, [aa2_build]
104	lr r5, [vecbase_build]
105	lr r5, [d_cache_build]
106	lr r5, [madi_build]
107	lr r5, [dccm_build]
108	lr r5, [timer_build]
109	lr r5, [ap_build]
110	lr r5, [i_cache_build]
111	lr r5, [iccm_build]
112	lr r5, [dspram_build]
113	lr r5, [mac_build]
114	lr r5, [multiply_build]
115	lr r5, [swap_build]
116	lr r5, [norm_build]
117	lr r5, [minmax_build]
118	lr r5, [barrel_build]
119	lr r5, [ax0]
120	lr r5, [ax1]
121	lr r5, [ax2]
122	lr r5, [ax3]
123	lr r5, [ay0]
124	lr r5, [ay1]
125	lr r5, [ay2]
126	lr r5, [ay3]
127	lr r5, [mx00]
128	lr r5, [mx01]
129	lr r5, [mx10]
130	lr r5, [mx11]
131	lr r5, [mx20]
132	lr r5, [mx21]
133	lr r5, [mx30]
134	lr r5, [mx31]
135	lr r5, [my00]
136	lr r5, [my01]
137	lr r5, [my10]
138	lr r5, [my11]
139	lr r5, [my20]
140	lr r5, [my21]
141	lr r5, [my30]
142	lr r5, [my31]
143	lr r5, [xyconfig]
144	lr r5, [burstsys]
145	lr r5, [burstxym]
146	lr r5, [burstsz]
147	lr r5, [burstval]
148	lr r5, [xylsbasex]
149	lr r5, [xylsbasey]
150	lr r5, [aux_xmaclw_h]
151	lr r5, [aux_xmaclw_l]
152	lr r5, [se_ctrl]
153	lr r5, [se_stat]
154	lr r5, [se_err]
155	lr r5, [se_eadr]
156	lr r5, [se_spc]
157	lr r5, [sdm_base]
158	lr r5, [scm_base]
159	lr r5, [se_dbg_ctrl]
160	lr r5, [se_dbg_data0]
161	lr r5, [se_dbg_data1]
162	lr r5, [se_dbg_data2]
163	lr r5, [se_dbg_data3]
164	lr r5, [se_watch]
165	lr r5, [bpu_build]
166	lr r5, [arc600_build_config]
167	lr r5, [isa_config]
168	lr r5, [hwp_build]
169	lr r5, [pct_build]
170	lr r5, [cc_build]
171	lr r5, [pm_bcr]
172	lr r5, [scq_switch_build]
173	lr r5, [vraptor_build]
174	lr r5, [dma_config]
175	lr r5, [simd_config]
176	lr r5, [vlc_build]
177	lr r5, [simd_dma_build]
178	lr r5, [ifetch_queue_build]
179	lr r5, [smart_build]
180	lr r5, [count1]
181	lr r5, [control1]
182	lr r5, [limit1]
183	lr r5, [timer_xx]
184	lr r5, [arcangel_periph_xx]
185	lr r5, [periph_xx]
186	lr r5, [aux_irq_lev]
187	lr r5, [aux_irq_hint]
188	lr r5, [aux_inter_core_interrupt]
189	lr r5, [aes_aux_0]
190	lr r5, [aes_aux_1]
191	lr r5, [aes_aux_2]
192	lr r5, [aes_crypt_mode]
193	lr r5, [aes_auxs]
194	lr r5, [aes_auxi]
195	lr r5, [aes_aux_3]
196	lr r5, [aes_aux_4]
197	lr r5, [arith_ctl_aux]
198	lr r5, [des_aux]
199	lr r5, [ap_amv0]
200	lr r5, [ap_amm0]
201	lr r5, [ap_ac0]
202	lr r5, [ap_amv1]
203	lr r5, [ap_amm1]
204	lr r5, [ap_ac1]
205	lr r5, [ap_amv2]
206	lr r5, [ap_amm2]
207	lr r5, [ap_ac2]
208	lr r5, [ap_amv3]
209	lr r5, [ap_amm3]
210	lr r5, [ap_ac3]
211	lr r5, [ap_amv4]
212	lr r5, [ap_amm4]
213	lr r5, [ap_ac4]
214	lr r5, [ap_amv5]
215	lr r5, [ap_amm5]
216	lr r5, [ap_ac5]
217	lr r5, [ap_amv6]
218	lr r5, [ap_amm6]
219	lr r5, [ap_ac6]
220	lr r5, [ap_amv7]
221	lr r5, [ap_amm7]
222	lr r5, [ap_ac7]
223	lr r5, [pct_control]
224	lr r5, [pct_bank]
225	lr r5, [fp_status]
226	lr r5, [aux_dpfp1l]
227	lr r5, [d1l]
228	lr r5, [aux_dpfp1h]
229	lr r5, [d1h]
230	lr r5, [d1l]
231	lr r5, [aux_dpfp2l]
232	lr r5, [d2l]
233	lr r5, [d1h]
234	lr r5, [aux_dpfp2h]
235	lr r5, [d2h]
236	lr r5, [d2l]
237	lr r5, [dpfp_status]
238	lr r5, [d2h]
239	lr r5, [rtt]
240	lr r5, [eret]
241	lr r5, [erbta]
242	lr r5, [erstatus]
243	lr r5, [ecr]
244	lr r5, [efa]
245	lr r5, [tlbpd0]
246	lr r5, [tlbpd1]
247	lr r5, [tlbindex]
248	lr r5, [tlbcommand]
249	lr r5, [pid]
250	lr r5, [mpuen]
251	lr r5, [icause1]
252	lr r5, [icause2]
253	lr r5, [aux_ienable]
254	lr r5, [aux_itrigger]
255	lr r5, [xpu]
256	lr r5, [bta]
257	lr r5, [bta_l1]
258	lr r5, [bta_l2]
259	lr r5, [aux_irq_pulse_cancel]
260	lr r5, [aux_irq_pending]
261	lr r5, [scratch_data0]
262	lr r5, [mpuic]
263	lr r5, [mpufa]
264	lr r5, [mpurdb0]
265	lr r5, [mpurdp0]
266	lr r5, [mpurdb1]
267	lr r5, [mpurdp1]
268	lr r5, [mpurdb2]
269	lr r5, [mpurdp2]
270	lr r5, [mpurdb3]
271	lr r5, [mpurdp3]
272	lr r5, [mpurdb4]
273	lr r5, [mpurdp4]
274	lr r5, [mpurdb5]
275	lr r5, [mpurdp5]
276	lr r5, [mpurdb6]
277	lr r5, [mpurdp6]
278	lr r5, [mpurdb7]
279	lr r5, [mpurdp7]
280	lr r5, [mpurdb8]
281	lr r5, [mpurdp8]
282	lr r5, [mpurdb9]
283	lr r5, [mpurdp9]
284	lr r5, [mpurdb10]
285	lr r5, [mpurdp10]
286	lr r5, [mpurdb11]
287	lr r5, [mpurdp11]
288	lr r5, [mpurdb12]
289	lr r5, [mpurdp12]
290	lr r5, [mpurdb13]
291	lr r5, [mpurdp13]
292	lr r5, [mpurdb14]
293	lr r5, [mpurdp14]
294	lr r5, [mpurdb15]
295	lr r5, [mpurdp15]
296	lr r5, [eia_flags]
297	lr r5, [pm_status]
298	lr r5, [wake]
299	lr r5, [dvfs_performance]
300	lr r5, [pwr_ctrl]
301	lr r5, [aux_vlc_buf_idx]
302	lr r5, [aux_vlc_read_buf]
303	lr r5, [aux_vlc_valid_bits]
304	lr r5, [aux_vlc_buf_in]
305	lr r5, [aux_vlc_buf_free]
306	lr r5, [aux_vlc_ibuf_status]
307	lr r5, [aux_vlc_setup]
308	lr r5, [aux_vlc_bits]
309	lr r5, [aux_vlc_table]
310	lr r5, [aux_vlc_get_symbol]
311	lr r5, [aux_vlc_read_symbol]
312	lr r5, [aux_ucavlc_setup]
313	lr r5, [aux_ucavlc_state]
314	lr r5, [aux_cavlc_zero_left]
315	lr r5, [aux_uvlc_i_state]
316	lr r5, [aux_vlc_dma_ptr]
317	lr r5, [aux_vlc_dma_end]
318	lr r5, [aux_vlc_dma_esc]
319	lr r5, [aux_vlc_dma_ctrl]
320	lr r5, [aux_vlc_get_0bit]
321	lr r5, [aux_vlc_get_1bit]
322	lr r5, [aux_vlc_get_2bit]
323	lr r5, [aux_vlc_get_3bit]
324	lr r5, [aux_vlc_get_4bit]
325	lr r5, [aux_vlc_get_5bit]
326	lr r5, [aux_vlc_get_6bit]
327	lr r5, [aux_vlc_get_7bit]
328	lr r5, [aux_vlc_get_8bit]
329	lr r5, [aux_vlc_get_9bit]
330	lr r5, [aux_vlc_get_10bit]
331	lr r5, [aux_vlc_get_11bit]
332	lr r5, [aux_vlc_get_12bit]
333	lr r5, [aux_vlc_get_13bit]
334	lr r5, [aux_vlc_get_14bit]
335	lr r5, [aux_vlc_get_15bit]
336	lr r5, [aux_vlc_get_16bit]
337	lr r5, [aux_vlc_get_17bit]
338	lr r5, [aux_vlc_get_18bit]
339	lr r5, [aux_vlc_get_19bit]
340	lr r5, [aux_vlc_get_20bit]
341	lr r5, [aux_vlc_get_21bit]
342	lr r5, [aux_vlc_get_22bit]
343	lr r5, [aux_vlc_get_23bit]
344	lr r5, [aux_vlc_get_24bit]
345	lr r5, [aux_vlc_get_25bit]
346	lr r5, [aux_vlc_get_26bit]
347	lr r5, [aux_vlc_get_27bit]
348	lr r5, [aux_vlc_get_28bit]
349	lr r5, [aux_vlc_get_29bit]
350	lr r5, [aux_vlc_get_30bit]
351	lr r5, [aux_vlc_get_31bit]
352	lr r5, [aux_cabac_ctrl]
353	lr r5, [aux_cabac_ctx_state]
354	lr r5, [aux_cabac_cod_param]
355	lr r5, [aux_cabac_misc0]
356	lr r5, [aux_cabac_misc1]
357	lr r5, [aux_cabac_misc2]
358	lr r5, [arc600_build_config]
359	lr r5, [smart_control]
360	lr r5, [smart_data_0]
361	lr r5, [smart_data_1]
362	lr r5, [smart_data_2]
363	lr r5, [smart_data_3]