Commit | Line | Data |
---|---|---|
62b3e311 PB |
1 | #name: ARM V7 instructions |
2 | #as: -march=armv7r | |
3 | #objdump: -dr --prefix-addresses --show-raw-insn | |
b47b60aa | 4 | #notarget: *-*-pe *-*-wince |
62b3e311 PB |
5 | |
6 | .*: +file format .*arm.* | |
7 | ||
8 | Disassembly of section .text: | |
9 | 0+000 <[^>]*> f6d6f008 pli \[r6, r8\] | |
10 | 0+004 <[^>]*> f6d9f007 pli \[r9, r7\] | |
11 | 0+008 <[^>]*> f6d0f101 pli \[r0, r1, lsl #2\] | |
12 | 0+00c <[^>]*> f4d5f000 pli \[r5\] | |
05413229 NC |
13 | 0+010 <[^>]*> f4d5ffff pli \[r5, #4095\].* |
14 | 0+014 <[^>]*> f455ffff pli \[r5, #-4095\].* | |
62b3e311 PB |
15 | 0+018 <[^>]*> e320f0f0 dbg #0 |
16 | 0+01c <[^>]*> e320f0ff dbg #15 | |
17 | 0+020 <[^>]*> f57ff05f dmb sy | |
18 | 0+024 <[^>]*> f57ff05f dmb sy | |
19 | 0+028 <[^>]*> f57ff04f dsb sy | |
20 | 0+02c <[^>]*> f57ff04f dsb sy | |
21 | 0+030 <[^>]*> f57ff047 dsb un | |
22 | 0+034 <[^>]*> f57ff04e dsb st | |
23 | 0+038 <[^>]*> f57ff046 dsb unst | |
24 | 0+03c <[^>]*> f57ff06f isb sy | |
25 | 0+040 <[^>]*> f57ff06f isb sy | |
26 | 0+044 <[^>]*> f916 f008 pli \[r6, r8\] | |
27 | 0+048 <[^>]*> f919 f007 pli \[r9, r7\] | |
28 | 0+04c <[^>]*> f910 f021 pli \[r0, r1, lsl #2\] | |
29 | 0+050 <[^>]*> f995 f000 pli \[r5\] | |
05413229 | 30 | 0+054 <[^>]*> f995 ffff pli \[r5, #4095\].* |
62b3e311 | 31 | 0+058 <[^>]*> f915 fcff pli \[r5, #-255\] |
aa32346d NC |
32 | 0+05c <[^>]*> f99f ffff pli \[pc, #4095\] ; 0+0105f <[^>]*> |
33 | 0+060 <[^>]*> f91f ffff pli \[pc, #-4095\] ; f+ff065 <[^>]*> | |
62b3e311 PB |
34 | 0+064 <[^>]*> f3af 80f0 dbg #0 |
35 | 0+068 <[^>]*> f3af 80ff dbg #15 | |
36 | 0+06c <[^>]*> f3bf 8f5f dmb sy | |
37 | 0+070 <[^>]*> f3bf 8f5f dmb sy | |
38 | 0+074 <[^>]*> f3bf 8f4f dsb sy | |
39 | 0+078 <[^>]*> f3bf 8f4f dsb sy | |
40 | 0+07c <[^>]*> f3bf 8f47 dsb un | |
41 | 0+080 <[^>]*> f3bf 8f4e dsb st | |
42 | 0+084 <[^>]*> f3bf 8f46 dsb unst | |
43 | 0+088 <[^>]*> f3bf 8f6f isb sy | |
44 | 0+08c <[^>]*> f3bf 8f6f isb sy | |
45 | 0+090 <[^>]*> fb99 f6fc sdiv r6, r9, ip | |
46 | 0+094 <[^>]*> fb96 f9f3 sdiv r9, r6, r3 | |
47 | 0+098 <[^>]*> fbb6 f9f3 udiv r9, r6, r3 | |
48 | 0+09c <[^>]*> fbb9 f6fc udiv r6, r9, ip | |
49 | # V7M APSR has the same encoding as V7A CPSR_f | |
50 | 0+0a0 <[^>]*> f3ef 8000 mrs r0, (CPSR|APSR) | |
51 | 0+0a4 <[^>]*> f3ef 8001 mrs r0, IAPSR | |
52 | 0+0a8 <[^>]*> f3ef 8002 mrs r0, EAPSR | |
53 | 0+0ac <[^>]*> f3ef 8003 mrs r0, PSR | |
54 | 0+0b0 <[^>]*> f3ef 8005 mrs r0, IPSR | |
55 | 0+0b4 <[^>]*> f3ef 8006 mrs r0, EPSR | |
56 | 0+0b8 <[^>]*> f3ef 8007 mrs r0, IEPSR | |
57 | 0+0bc <[^>]*> f3ef 8008 mrs r0, MSP | |
58 | 0+0c0 <[^>]*> f3ef 8009 mrs r0, PSP | |
59 | 0+0c4 <[^>]*> f3ef 8010 mrs r0, PRIMASK | |
60 | 0+0c8 <[^>]*> f3ef 8011 mrs r0, BASEPRI | |
00bbc0bd | 61 | 0+0cc <[^>]*> f3ef 8012 mrs r0, BASEPRI_MAX |
62b3e311 PB |
62 | 0+0d0 <[^>]*> f3ef 8013 mrs r0, FAULTMASK |
63 | 0+0d4 <[^>]*> f3ef 8014 mrs r0, CONTROL | |
d2cd1205 | 64 | 0+0d8 <[^>]*> f380 8800 msr (CPSR_f|APSR_nzcvq), r0 |
ac7f631b NC |
65 | 0+0dc <[^>]*> f380 8801 msr IAPSR, r0 |
66 | 0+0e0 <[^>]*> f380 8802 msr EAPSR, r0 | |
67 | 0+0e4 <[^>]*> f380 8803 msr PSR, r0 | |
62b3e311 PB |
68 | 0+0e8 <[^>]*> f380 8805 msr IPSR, r0 |
69 | 0+0ec <[^>]*> f380 8806 msr EPSR, r0 | |
70 | 0+0f0 <[^>]*> f380 8807 msr IEPSR, r0 | |
71 | 0+0f4 <[^>]*> f380 8808 msr MSP, r0 | |
72 | 0+0f8 <[^>]*> f380 8809 msr PSP, r0 | |
73 | 0+0fc <[^>]*> f380 8810 msr PRIMASK, r0 | |
74 | 0+100 <[^>]*> f380 8811 msr BASEPRI, r0 | |
00bbc0bd | 75 | 0+104 <[^>]*> f380 8812 msr BASEPRI_MAX, r0 |
62b3e311 PB |
76 | 0+108 <[^>]*> f380 8813 msr FAULTMASK, r0 |
77 | 0+10c <[^>]*> f380 8814 msr CONTROL, r0 | |
59b42a0d | 78 | 0+110 <[^>]*> f3ef 8003 mrs r0, PSR |
ac7f631b | 79 | 0+114 <[^>]*> f380 8803 msr PSR, r0 |
84701018 | 80 | 0+118 <[^>]*> df00 svc 0 |
ac7f631b | 81 | #... |